Merge branch 'aosp/upstream-18.0'
Squashes down these Change-Ids:
I73eeba6dabfa83a4404c8371ae39ad0c26b73102
Ica4a80c917beb990b5df18f9bee591ce3cfc9f42
Bug: 79165890
Change-Id: Iec064b10e8ea5a08d57e8660bc9f6a7fb35d02da
Signed-of-by: Alistair Strachan <astrachan@google.com>
diff --git a/Android.mk b/Android.mk
index 914854c..5ccd008 100644
--- a/Android.mk
+++ b/Android.mk
@@ -29,6 +29,8 @@
# The main target is libGLES_mesa. For each classic driver enabled, a DRI
# module will also be built. DRI modules will be loaded by libGLES_mesa.
+ifneq ($(BOARD_USE_CUSTOMIZED_MESA), true)
+
MESA_TOP := $(call my-dir)
MESA_ANDROID_MAJOR_VERSION := $(word 1, $(subst ., , $(PLATFORM_VERSION)))
@@ -125,3 +127,5 @@
INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS))
INC_DIRS += $(call all-named-subdir-makefiles,src/gallium)
include $(INC_DIRS)
+
+endif
diff --git a/CleanSpec.mk b/CleanSpec.mk
index d08b0de..e5030ce 100644
--- a/CleanSpec.mk
+++ b/CleanSpec.mk
@@ -10,7 +10,7 @@
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/i9?5_dri_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libglapi_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/libGLES_mesa_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/mesa_*_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/EXECUTABLES/glsl_compiler_intermediates)
-$(call add-clean-step, rm -rf $(HOST_OUT_release)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/mesa_*_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT)/*/EXECUTABLES/glsl_compiler_intermediates)
+$(call add-clean-step, rm -rf $(HOST_OUT)/*/STATIC_LIBRARIES/libmesa_*_intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/*/SHARED_LIBRARIES/*_dri_intermediates)
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..56a04fb
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,25 @@
+Copyright © 1999-2007 Brian Paul All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+
+---
+
+The above is the version of the MIT "Expat" License used by Mesa:
+
+ https://www.mesa3d.org/license.html
diff --git a/METADATA b/METADATA
new file mode 100644
index 0000000..ea26b8c
--- /dev/null
+++ b/METADATA
@@ -0,0 +1,19 @@
+name: "mesa3d"
+description:
+ "Mesa (or Mesa 3D) is a library which provides the OpenGL, OpenGL ES, EGL, "
+ "Vulkan and other standard graphics APIs, and the userspace part of the "
+ "graphics hardware drivers required to accelerate these APIs."
+
+third_party {
+ url {
+ type: HOMEPAGE
+ value: "https://www.mesa3d.org/"
+ }
+ url {
+ type: GIT
+ value: "git://anongit.freedesktop.org/git/mesa/mesa"
+ }
+ version: "17.0.4"
+ last_upgrade_date { year: 2017 month: 5 day: 22 }
+ license_type: NOTICE
+}
diff --git a/MODULE_LICENSE_MIT b/MODULE_LICENSE_MIT
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/MODULE_LICENSE_MIT
diff --git a/NOTICE b/NOTICE
new file mode 100644
index 0000000..56a04fb
--- /dev/null
+++ b/NOTICE
@@ -0,0 +1,25 @@
+Copyright © 1999-2007 Brian Paul All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a
+copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation
+the rights to use, copy, modify, merge, publish, distribute, sublicense,
+and/or sell copies of the Software, and to permit persons to whom the
+Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included
+in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
+
+---
+
+The above is the version of the MIT "Expat" License used by Mesa:
+
+ https://www.mesa3d.org/license.html
diff --git a/OWNERS b/OWNERS
new file mode 100644
index 0000000..34b2cec2
--- /dev/null
+++ b/OWNERS
@@ -0,0 +1,4 @@
+astrachan@google.com
+dimitrysh@google.com
+marissaw@google.com
+sadmac@google.com
diff --git a/include/xf86drm.h b/include/xf86drm.h
new file mode 100644
index 0000000..dd6e2b9
--- /dev/null
+++ b/include/xf86drm.h
@@ -0,0 +1,130 @@
+/*
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#pragma once
+
+#include_next <xf86drm.h>
+
+#include <string.h>
+#include <errno.h>
+
+/*
+ * FIXME: Below code comes from https://patchwork.kernel.org/patch/10368203/
+ * FIXME: Remove or rework once that has been merged
+ */
+
+typedef enum drm_match_key {
+ /* Match against DRM_NODE_{PRIMARY,RENDER,...} type */
+ DRM_MATCH_NODE_TYPE = 1,
+ DRM_MATCH_DRIVER_NAME = 2,
+ DRM_MATCH_BUS_PCI_VENDOR = 3,
+ DRM_MATCH_FUNCTION = 4,
+} drm_match_key_t;
+
+typedef struct drm_match_func {
+ void *data;
+ int (*fp)(int, void*); /* Intended arguments are fp(fd, data) */
+} drm_match_func_t;
+
+typedef struct drm_match {
+ drm_match_key_t type;
+ union {
+ int s;
+ uint16_t u16;
+ char *str;
+ drm_match_func_t func;
+ };
+} drm_match_t;
+
+static inline int drmHandleMatch(int fd, drm_match_t *filters, int nbr_filters)
+{
+ if (fd < 0)
+ goto error;
+
+ if (nbr_filters > 0 && filters == NULL)
+ goto error;
+
+ drmVersionPtr ver = drmGetVersion(fd);
+ if (!ver)
+ goto fail;
+
+ drmDevicePtr dev = NULL;
+ if (drmGetDevice2(fd, 0, &dev) != 0) {
+ goto fail;
+ }
+
+ for (int i = 0; i < nbr_filters; i++) {
+ drm_match_t *f = &filters[i];
+ switch (f->type) {
+ case DRM_MATCH_NODE_TYPE:
+ if (!(dev->available_nodes & (1 << f->s)))
+ goto fail;
+ break;
+ case DRM_MATCH_DRIVER_NAME:
+ if (!f->str)
+ goto error;
+
+ /* This bypass is used by when the driver name is used
+ by the Android property_get() func, when it hasn't found
+ the property and the string is empty as a result. */
+ if (strlen(f->str) == 0)
+ continue;
+
+ if (strncmp(ver->name, f->str, strlen(ver->name)))
+ goto fail;
+ break;
+ case DRM_MATCH_BUS_PCI_VENDOR:
+ if (dev->bustype != DRM_BUS_PCI)
+ goto fail;
+ if (dev->deviceinfo.pci->vendor_id != f->u16)
+ goto fail;
+ break;
+ case DRM_MATCH_FUNCTION:
+ if (!f->func.fp)
+ goto error;
+ int (*fp)(int, void*) = f->func.fp;
+ void *data = f->func.data;
+ if (!fp(fd, data))
+ goto fail;
+ break;
+ default:
+ goto error;
+ }
+ }
+
+success:
+ drmFreeVersion(ver);
+ drmFreeDevice(&dev);
+ return 0;
+error:
+ drmFreeVersion(ver);
+ drmFreeDevice(&dev);
+ return -EINVAL;
+fail:
+ drmFreeVersion(ver);
+ drmFreeDevice(&dev);
+ return 1;
+}
+
diff --git a/prebuilt-intermediates/compiler/brw_nir_trig_workarounds.c b/prebuilt-intermediates/compiler/brw_nir_trig_workarounds.c
new file mode 100644
index 0000000..73bb3fe
--- /dev/null
+++ b/prebuilt-intermediates/compiler/brw_nir_trig_workarounds.c
@@ -0,0 +1,191 @@
+#include "brw_nir.h"
+
+#include "nir.h"
+#include "nir_search.h"
+#include "nir_search_helpers.h"
+
+#ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+#define NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+
+struct transform {
+ const nir_search_expression *search;
+ const nir_search_value *replace;
+ unsigned condition_offset;
+};
+
+#endif
+
+
+static const nir_search_variable search1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fcos,
+ { &search1_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fcos,
+ { &replace1_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fefffc115df6556 /* 0.99997 */ },
+};
+static const nir_search_expression replace1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace1_0.value, &replace1_1.value },
+ NULL,
+};
+
+static const struct transform brw_nir_apply_trig_workarounds_fcos_xforms[] = {
+ { &search1, &replace1.value, 0 },
+};
+
+static const nir_search_variable search0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsin,
+ { &search0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsin,
+ { &replace0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fefffc115df6556 /* 0.99997 */ },
+};
+static const nir_search_expression replace0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace0_0.value, &replace0_1.value },
+ NULL,
+};
+
+static const struct transform brw_nir_apply_trig_workarounds_fsin_xforms[] = {
+ { &search0, &replace0.value, 0 },
+};
+
+static bool
+brw_nir_apply_trig_workarounds_block(nir_block *block, const bool *condition_flags,
+ void *mem_ctx)
+{
+ bool progress = false;
+
+ nir_foreach_instr_reverse_safe(instr, block) {
+ if (instr->type != nir_instr_type_alu)
+ continue;
+
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+ if (!alu->dest.dest.is_ssa)
+ continue;
+
+ switch (alu->op) {
+ case nir_op_fcos:
+ for (unsigned i = 0; i < ARRAY_SIZE(brw_nir_apply_trig_workarounds_fcos_xforms); i++) {
+ const struct transform *xform = &brw_nir_apply_trig_workarounds_fcos_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fsin:
+ for (unsigned i = 0; i < ARRAY_SIZE(brw_nir_apply_trig_workarounds_fsin_xforms); i++) {
+ const struct transform *xform = &brw_nir_apply_trig_workarounds_fsin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return progress;
+}
+
+static bool
+brw_nir_apply_trig_workarounds_impl(nir_function_impl *impl, const bool *condition_flags)
+{
+ void *mem_ctx = ralloc_parent(impl);
+ bool progress = false;
+
+ nir_foreach_block_reverse(block, impl) {
+ progress |= brw_nir_apply_trig_workarounds_block(block, condition_flags, mem_ctx);
+ }
+
+ if (progress)
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+
+ return progress;
+}
+
+
+bool
+brw_nir_apply_trig_workarounds(nir_shader *shader)
+{
+ bool progress = false;
+ bool condition_flags[1];
+ const nir_shader_compiler_options *options = shader->options;
+ (void) options;
+
+ condition_flags[0] = true;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl)
+ progress |= brw_nir_apply_trig_workarounds_impl(function->impl, condition_flags);
+ }
+
+ return progress;
+}
+
diff --git a/prebuilt-intermediates/genxml/genX_bits.h b/prebuilt-intermediates/genxml/genX_bits.h
new file mode 100644
index 0000000..b79209e
--- /dev/null
+++ b/prebuilt-intermediates/genxml/genX_bits.h
@@ -0,0 +1,220797 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/* THIS FILE HAS BEEN GENERATED, DO NOT HAND EDIT.
+ *
+ * Sizes of bitfields in genxml instructions, structures, and registers.
+ */
+
+#ifndef GENX_BITS_H
+#define GENX_BITS_H
+
+#include <stdint.h>
+
+#include "common/gen_device_info.h"
+#include "util/macros.h"
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* 3DPRIMITIVE */
+
+
+#define GEN10_3DPRIMITIVE_length 7
+#define GEN9_3DPRIMITIVE_length 7
+#define GEN8_3DPRIMITIVE_length 7
+#define GEN75_3DPRIMITIVE_length 7
+#define GEN7_3DPRIMITIVE_length 7
+#define GEN6_3DPRIMITIVE_length 6
+#define GEN5_3DPRIMITIVE_length 6
+#define GEN45_3DPRIMITIVE_length 6
+#define GEN4_3DPRIMITIVE_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::3D Command Opcode */
+
+
+#define GEN10_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN9_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN8_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN75_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN7_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN6_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN5_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN45_3DPRIMITIVE_3DCommandOpcode_bits 3
+#define GEN4_3DPRIMITIVE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN9_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN8_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN75_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN7_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN6_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN5_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN45_3DPRIMITIVE_3DCommandOpcode_start 24
+#define GEN4_3DPRIMITIVE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::3D Command Sub Opcode */
+
+
+#define GEN10_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN9_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN8_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN75_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN7_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN6_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN5_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN45_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+#define GEN4_3DPRIMITIVE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN9_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN8_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN75_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN7_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN6_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN5_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN45_3DPRIMITIVE_3DCommandSubOpcode_start 16
+#define GEN4_3DPRIMITIVE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Base Vertex Location */
+
+
+#define GEN10_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN9_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN8_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN75_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN7_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN6_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN5_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN45_3DPRIMITIVE_BaseVertexLocation_bits 32
+#define GEN4_3DPRIMITIVE_BaseVertexLocation_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_BaseVertexLocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_BaseVertexLocation_start 192
+#define GEN9_3DPRIMITIVE_BaseVertexLocation_start 192
+#define GEN8_3DPRIMITIVE_BaseVertexLocation_start 192
+#define GEN75_3DPRIMITIVE_BaseVertexLocation_start 192
+#define GEN7_3DPRIMITIVE_BaseVertexLocation_start 192
+#define GEN6_3DPRIMITIVE_BaseVertexLocation_start 160
+#define GEN5_3DPRIMITIVE_BaseVertexLocation_start 160
+#define GEN45_3DPRIMITIVE_BaseVertexLocation_start 160
+#define GEN4_3DPRIMITIVE_BaseVertexLocation_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_BaseVertexLocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 160;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Command SubType */
+
+
+#define GEN10_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN9_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN8_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN75_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN7_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN6_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN5_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN45_3DPRIMITIVE_CommandSubType_bits 2
+#define GEN4_3DPRIMITIVE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_CommandSubType_start 27
+#define GEN9_3DPRIMITIVE_CommandSubType_start 27
+#define GEN8_3DPRIMITIVE_CommandSubType_start 27
+#define GEN75_3DPRIMITIVE_CommandSubType_start 27
+#define GEN7_3DPRIMITIVE_CommandSubType_start 27
+#define GEN6_3DPRIMITIVE_CommandSubType_start 27
+#define GEN5_3DPRIMITIVE_CommandSubType_start 27
+#define GEN45_3DPRIMITIVE_CommandSubType_start 27
+#define GEN4_3DPRIMITIVE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Command Type */
+
+
+#define GEN10_3DPRIMITIVE_CommandType_bits 3
+#define GEN9_3DPRIMITIVE_CommandType_bits 3
+#define GEN8_3DPRIMITIVE_CommandType_bits 3
+#define GEN75_3DPRIMITIVE_CommandType_bits 3
+#define GEN7_3DPRIMITIVE_CommandType_bits 3
+#define GEN6_3DPRIMITIVE_CommandType_bits 3
+#define GEN5_3DPRIMITIVE_CommandType_bits 3
+#define GEN45_3DPRIMITIVE_CommandType_bits 3
+#define GEN4_3DPRIMITIVE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_CommandType_start 29
+#define GEN9_3DPRIMITIVE_CommandType_start 29
+#define GEN8_3DPRIMITIVE_CommandType_start 29
+#define GEN75_3DPRIMITIVE_CommandType_start 29
+#define GEN7_3DPRIMITIVE_CommandType_start 29
+#define GEN6_3DPRIMITIVE_CommandType_start 29
+#define GEN5_3DPRIMITIVE_CommandType_start 29
+#define GEN45_3DPRIMITIVE_CommandType_start 29
+#define GEN4_3DPRIMITIVE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::DWord Length */
+
+
+#define GEN10_3DPRIMITIVE_DWordLength_bits 8
+#define GEN9_3DPRIMITIVE_DWordLength_bits 8
+#define GEN8_3DPRIMITIVE_DWordLength_bits 8
+#define GEN75_3DPRIMITIVE_DWordLength_bits 8
+#define GEN7_3DPRIMITIVE_DWordLength_bits 8
+#define GEN6_3DPRIMITIVE_DWordLength_bits 8
+#define GEN5_3DPRIMITIVE_DWordLength_bits 8
+#define GEN45_3DPRIMITIVE_DWordLength_bits 8
+#define GEN4_3DPRIMITIVE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_DWordLength_start 0
+#define GEN9_3DPRIMITIVE_DWordLength_start 0
+#define GEN8_3DPRIMITIVE_DWordLength_start 0
+#define GEN75_3DPRIMITIVE_DWordLength_start 0
+#define GEN7_3DPRIMITIVE_DWordLength_start 0
+#define GEN6_3DPRIMITIVE_DWordLength_start 0
+#define GEN5_3DPRIMITIVE_DWordLength_start 0
+#define GEN45_3DPRIMITIVE_DWordLength_start 0
+#define GEN4_3DPRIMITIVE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::End Offset Enable */
+
+
+#define GEN10_3DPRIMITIVE_EndOffsetEnable_bits 1
+#define GEN9_3DPRIMITIVE_EndOffsetEnable_bits 1
+#define GEN8_3DPRIMITIVE_EndOffsetEnable_bits 1
+#define GEN75_3DPRIMITIVE_EndOffsetEnable_bits 1
+#define GEN7_3DPRIMITIVE_EndOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_EndOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_EndOffsetEnable_start 41
+#define GEN9_3DPRIMITIVE_EndOffsetEnable_start 41
+#define GEN8_3DPRIMITIVE_EndOffsetEnable_start 41
+#define GEN75_3DPRIMITIVE_EndOffsetEnable_start 41
+#define GEN7_3DPRIMITIVE_EndOffsetEnable_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_EndOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 41;
+ case 9: return 41;
+ case 8: return 41;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 41;
+ } else {
+ return 41;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Extended Parameter 0 */
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter0_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Extended Parameter 1 */
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter1_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter1_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Extended Parameter 2 */
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter2_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParameter2_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParameter2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 288;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Extended Parameters Present */
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParametersPresent_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParametersPresent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_ExtendedParametersPresent_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_ExtendedParametersPresent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Indirect Parameter Enable */
+
+
+#define GEN10_3DPRIMITIVE_IndirectParameterEnable_bits 1
+#define GEN9_3DPRIMITIVE_IndirectParameterEnable_bits 1
+#define GEN8_3DPRIMITIVE_IndirectParameterEnable_bits 1
+#define GEN75_3DPRIMITIVE_IndirectParameterEnable_bits 1
+#define GEN7_3DPRIMITIVE_IndirectParameterEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_IndirectParameterEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_IndirectParameterEnable_start 10
+#define GEN9_3DPRIMITIVE_IndirectParameterEnable_start 10
+#define GEN8_3DPRIMITIVE_IndirectParameterEnable_start 10
+#define GEN75_3DPRIMITIVE_IndirectParameterEnable_start 10
+#define GEN7_3DPRIMITIVE_IndirectParameterEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_IndirectParameterEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Indirect Vertex Count */
+
+
+#define GEN5_3DPRIMITIVE_IndirectVertexCount_bits 1
+#define GEN45_3DPRIMITIVE_IndirectVertexCount_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_IndirectVertexCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DPRIMITIVE_IndirectVertexCount_start 9
+#define GEN45_3DPRIMITIVE_IndirectVertexCount_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_IndirectVertexCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Instance Count */
+
+
+#define GEN10_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN9_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN8_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN75_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN7_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN6_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN5_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN45_3DPRIMITIVE_InstanceCount_bits 32
+#define GEN4_3DPRIMITIVE_InstanceCount_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_InstanceCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_InstanceCount_start 128
+#define GEN9_3DPRIMITIVE_InstanceCount_start 128
+#define GEN8_3DPRIMITIVE_InstanceCount_start 128
+#define GEN75_3DPRIMITIVE_InstanceCount_start 128
+#define GEN7_3DPRIMITIVE_InstanceCount_start 128
+#define GEN6_3DPRIMITIVE_InstanceCount_start 96
+#define GEN5_3DPRIMITIVE_InstanceCount_start 96
+#define GEN45_3DPRIMITIVE_InstanceCount_start 96
+#define GEN4_3DPRIMITIVE_InstanceCount_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_InstanceCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Internal Vertex Count */
+
+
+#define GEN6_3DPRIMITIVE_InternalVertexCount_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_InternalVertexCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DPRIMITIVE_InternalVertexCount_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_InternalVertexCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Predicate Enable */
+
+
+#define GEN10_3DPRIMITIVE_PredicateEnable_bits 1
+#define GEN9_3DPRIMITIVE_PredicateEnable_bits 1
+#define GEN8_3DPRIMITIVE_PredicateEnable_bits 1
+#define GEN75_3DPRIMITIVE_PredicateEnable_bits 1
+#define GEN7_3DPRIMITIVE_PredicateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_PredicateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_PredicateEnable_start 8
+#define GEN9_3DPRIMITIVE_PredicateEnable_start 8
+#define GEN8_3DPRIMITIVE_PredicateEnable_start 8
+#define GEN75_3DPRIMITIVE_PredicateEnable_start 8
+#define GEN7_3DPRIMITIVE_PredicateEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_PredicateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Primitive Topology Type */
+
+
+#define GEN10_3DPRIMITIVE_PrimitiveTopologyType_bits 6
+#define GEN9_3DPRIMITIVE_PrimitiveTopologyType_bits 6
+#define GEN8_3DPRIMITIVE_PrimitiveTopologyType_bits 6
+#define GEN75_3DPRIMITIVE_PrimitiveTopologyType_bits 6
+#define GEN7_3DPRIMITIVE_PrimitiveTopologyType_bits 6
+#define GEN6_3DPRIMITIVE_PrimitiveTopologyType_bits 5
+#define GEN5_3DPRIMITIVE_PrimitiveTopologyType_bits 5
+#define GEN45_3DPRIMITIVE_PrimitiveTopologyType_bits 5
+#define GEN4_3DPRIMITIVE_PrimitiveTopologyType_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_PrimitiveTopologyType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_PrimitiveTopologyType_start 32
+#define GEN9_3DPRIMITIVE_PrimitiveTopologyType_start 32
+#define GEN8_3DPRIMITIVE_PrimitiveTopologyType_start 32
+#define GEN75_3DPRIMITIVE_PrimitiveTopologyType_start 32
+#define GEN7_3DPRIMITIVE_PrimitiveTopologyType_start 32
+#define GEN6_3DPRIMITIVE_PrimitiveTopologyType_start 10
+#define GEN5_3DPRIMITIVE_PrimitiveTopologyType_start 10
+#define GEN45_3DPRIMITIVE_PrimitiveTopologyType_start 10
+#define GEN4_3DPRIMITIVE_PrimitiveTopologyType_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_PrimitiveTopologyType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 10;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Start Instance Location */
+
+
+#define GEN10_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN9_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN8_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN75_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN7_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN6_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN5_3DPRIMITIVE_StartInstanceLocation_bits 32
+#define GEN45_3DPRIMITIVE_StartInstanceLocation_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_StartInstanceLocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_StartInstanceLocation_start 160
+#define GEN9_3DPRIMITIVE_StartInstanceLocation_start 160
+#define GEN8_3DPRIMITIVE_StartInstanceLocation_start 160
+#define GEN75_3DPRIMITIVE_StartInstanceLocation_start 160
+#define GEN7_3DPRIMITIVE_StartInstanceLocation_start 160
+#define GEN6_3DPRIMITIVE_StartInstanceLocation_start 128
+#define GEN5_3DPRIMITIVE_StartInstanceLocation_start 128
+#define GEN45_3DPRIMITIVE_StartInstanceLocation_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_StartInstanceLocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 128;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Start Vertex Location */
+
+
+#define GEN10_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN9_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN8_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN75_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN7_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN6_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN5_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN45_3DPRIMITIVE_StartVertexLocation_bits 32
+#define GEN4_3DPRIMITIVE_StartVertexLocation_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_StartVertexLocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_StartVertexLocation_start 96
+#define GEN9_3DPRIMITIVE_StartVertexLocation_start 96
+#define GEN8_3DPRIMITIVE_StartVertexLocation_start 96
+#define GEN75_3DPRIMITIVE_StartVertexLocation_start 96
+#define GEN7_3DPRIMITIVE_StartVertexLocation_start 96
+#define GEN6_3DPRIMITIVE_StartVertexLocation_start 64
+#define GEN5_3DPRIMITIVE_StartVertexLocation_start 64
+#define GEN45_3DPRIMITIVE_StartVertexLocation_start 64
+#define GEN4_3DPRIMITIVE_StartVertexLocation_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_StartVertexLocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::UAV Coherency Required */
+
+
+#define GEN10_3DPRIMITIVE_UAVCoherencyRequired_bits 1
+#define GEN9_3DPRIMITIVE_UAVCoherencyRequired_bits 1
+#define GEN8_3DPRIMITIVE_UAVCoherencyRequired_bits 1
+#define GEN75_3DPRIMITIVE_UAVCoherencyRequired_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_UAVCoherencyRequired_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_UAVCoherencyRequired_start 9
+#define GEN9_3DPRIMITIVE_UAVCoherencyRequired_start 9
+#define GEN8_3DPRIMITIVE_UAVCoherencyRequired_start 9
+#define GEN75_3DPRIMITIVE_UAVCoherencyRequired_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_UAVCoherencyRequired_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Vertex Access Type */
+
+
+#define GEN10_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN9_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN8_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN75_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN7_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN6_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN5_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN45_3DPRIMITIVE_VertexAccessType_bits 1
+#define GEN4_3DPRIMITIVE_VertexAccessType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_VertexAccessType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_VertexAccessType_start 40
+#define GEN9_3DPRIMITIVE_VertexAccessType_start 40
+#define GEN8_3DPRIMITIVE_VertexAccessType_start 40
+#define GEN75_3DPRIMITIVE_VertexAccessType_start 40
+#define GEN7_3DPRIMITIVE_VertexAccessType_start 40
+#define GEN6_3DPRIMITIVE_VertexAccessType_start 15
+#define GEN5_3DPRIMITIVE_VertexAccessType_start 15
+#define GEN45_3DPRIMITIVE_VertexAccessType_start 15
+#define GEN4_3DPRIMITIVE_VertexAccessType_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_VertexAccessType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 15;
+ case 5: return 15;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 15;
+ } else {
+ return 15;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DPRIMITIVE::Vertex Count Per Instance */
+
+
+#define GEN10_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN9_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN8_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN75_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN7_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN6_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN5_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN45_3DPRIMITIVE_VertexCountPerInstance_bits 32
+#define GEN4_3DPRIMITIVE_VertexCountPerInstance_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_VertexCountPerInstance_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DPRIMITIVE_VertexCountPerInstance_start 64
+#define GEN9_3DPRIMITIVE_VertexCountPerInstance_start 64
+#define GEN8_3DPRIMITIVE_VertexCountPerInstance_start 64
+#define GEN75_3DPRIMITIVE_VertexCountPerInstance_start 64
+#define GEN7_3DPRIMITIVE_VertexCountPerInstance_start 64
+#define GEN6_3DPRIMITIVE_VertexCountPerInstance_start 32
+#define GEN5_3DPRIMITIVE_VertexCountPerInstance_start 32
+#define GEN45_3DPRIMITIVE_VertexCountPerInstance_start 32
+#define GEN4_3DPRIMITIVE_VertexCountPerInstance_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DPRIMITIVE_VertexCountPerInstance_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_length 3
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Coverage Bias */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Coverage EndCap Bias */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Coverage EndCap Slope */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageEndCapSlope_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Coverage Slope */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AACoverageSlope_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Point Coverage Bias */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_start 56
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_start 56
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Point Coverage EndCap Bias */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_start 88
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_start 88
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Point Coverage EndCap Slope */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_start 72
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_start 72
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageEndCapSlope_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::AA Point Coverage Slope */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_start 40
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_start 40
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_AAPointCoverageSlope_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::Command SubType */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::Command Type */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_AA_LINE_PARAMETERS::DWord Length */
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN9_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN8_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN75_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN7_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN6_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN5_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+#define GEN45_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_AA_LINE_PARAMETERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS */
+
+
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::Binding Table Block Clear */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start 48
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start 48
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start 48
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::Binding Table Edit Target */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits 9
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits 9
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits 9
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_DS::Entry [n] */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_DS_Entryn_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS */
+
+
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::Binding Table Block Clear */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start 48
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start 48
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start 48
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::Binding Table Edit Target */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits 9
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits 9
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits 9
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_GS::Entry [n] */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_GS_Entryn_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS */
+
+
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::Binding Table Block Clear */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start 48
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start 48
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start 48
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::Binding Table Edit Target */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits 9
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits 9
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits 9
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_HS::Entry [n] */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_HS_Entryn_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS */
+
+
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::Binding Table Block Clear */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start 48
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start 48
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start 48
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::Binding Table Edit Target */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits 9
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits 9
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits 9
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_PS::Entry [n] */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_PS_Entryn_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS */
+
+
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::Binding Table Block Clear */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits 16
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits 16
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits 16
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start 48
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start 48
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start 48
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableBlockClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::Binding Table Edit Target */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_BindingTableEditTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits 9
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits 9
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits 9
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_EDIT_VS::Entry [n] */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits 32
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits 32
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits 32
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_EDIT_VS_Entryn_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_length 4
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_length 6
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_length 6
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::3D Command Opcode */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Command SubType */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits 2
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits 2
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits 2
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start 27
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Command Type */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits 3
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits 3
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits 3
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_CommandType_start 29
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_CommandType_start 29
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_CommandType_start 29
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::DWord Length */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits 8
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits 8
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits 8
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start 0
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start 0
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start 0
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::GS Binding Table Change */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GSBindingTableChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::PS Binding Table Change */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PSBindingTableChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Pointer to CLIP Binding Table */
+
+
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_bits 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_bits 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_start 101
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_start 101
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoCLIPBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 101;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 101;
+ } else {
+ return 101;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Pointer to GS Binding Table */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits 27
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start 69
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start 69
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start 69
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoGSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 69;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 69;
+ } else {
+ return 69;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Pointer to PS Binding Table */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits 27
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start 101
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start 165
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start 165
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoPSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 165;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 165;
+ } else {
+ return 165;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Pointer to SF Binding Table */
+
+
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_bits 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_bits 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_start 133
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_start 133
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoSFBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 133;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 133;
+ } else {
+ return 133;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::Pointer to VS Binding Table */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits 27
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits 27
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits 27
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start 37
+#define GEN5_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start 37
+#define GEN45_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start 37
+#define GEN4_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PointertoVSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 37;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 37;
+ } else {
+ return 37;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS::VS Binding Table Change */
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VSBindingTableChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start 29
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start 0
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_DS::Pointer to DS Binding Table */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits 11
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits 11
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits 11
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits 11
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start 37
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start 37
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start 37
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start 37
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_DS_PointertoDSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start 29
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start 0
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_GS::Pointer to GS Binding Table */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits 11
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits 11
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits 11
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits 11
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start 37
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start 37
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start 37
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start 37
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_GS_PointertoGSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start 29
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start 0
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_HS::Pointer to HS Binding Table */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits 11
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits 11
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits 11
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits 11
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start 37
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start 37
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start 37
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start 37
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_HS_PointertoHSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start 27
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start 29
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start 0
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_PS::Pointer to PS Binding Table */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits 11
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits 11
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits 11
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits 11
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start 37
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start 37
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start 37
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start 37
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_PS_PointertoPSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits 3
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start 29
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start 0
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POINTERS_VS::Pointer to VS Binding Table */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits 11
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits 11
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits 11
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits 11
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start 37
+#define GEN9_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start 37
+#define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start 37
+#define GEN75_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start 37
+#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POINTERS_VS_PointertoVSBindingTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 4
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Binding Table Pool Base Address */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits 52
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits 52
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits 52
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start 44
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start 44
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start 44
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Binding Table Pool Buffer Size */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_bits 20
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_bits 20
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_start 108
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_start 108
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 108;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Binding Table Pool Enable */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits 1
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits 1
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits 1
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start 43
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start 43
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start 43
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Binding Table Pool Upper Bound */
+
+
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_BindingTablePoolUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Command SubType */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits 2
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits 2
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits 2
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start 27
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start 27
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start 27
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Command Type */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits 3
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits 3
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits 3
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start 29
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start 29
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start 29
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::DWord Length */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits 8
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits 8
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits 8
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start 0
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start 0
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start 0
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BINDING_TABLE_POOL_ALLOC::Surface Object Control State */
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_bits 7
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_bits 7
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_bits 7
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_start 32
+#define GEN9_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_start 32
+#define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_start 32
+#define GEN75_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BINDING_TABLE_POOL_ALLOC_SurfaceObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_length 2
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_length 2
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_length 2
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_length 2
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::Blend State Pointer */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits 26
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits 26
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits 26
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits 26
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start 38
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start 38
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start 38
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start 38
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::Blend State Pointer Valid */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_bits 1
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_bits 1
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_start 32
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_start 32
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_BlendStatePointerValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::Command SubType */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits 2
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits 2
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits 2
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start 27
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start 27
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start 27
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start 27
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::Command Type */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits 3
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits 3
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits 3
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits 3
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_CommandType_start 29
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_CommandType_start 29
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_CommandType_start 29
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_CommandType_start 29
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_BLEND_STATE_POINTERS::DWord Length */
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits 8
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits 8
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits 8
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits 8
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start 0
+#define GEN9_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start 0
+#define GEN8_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start 0
+#define GEN75_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start 0
+#define GEN7_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_BLEND_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_length 2
+#define GEN9_3DSTATE_CC_STATE_POINTERS_length 2
+#define GEN8_3DSTATE_CC_STATE_POINTERS_length 2
+#define GEN75_3DSTATE_CC_STATE_POINTERS_length 2
+#define GEN7_3DSTATE_CC_STATE_POINTERS_length 2
+#define GEN6_3DSTATE_CC_STATE_POINTERS_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::BLEND_STATE Change */
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_BLEND_STATEChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Color Calc State Pointer */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+#define GEN9_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+#define GEN8_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+#define GEN75_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+#define GEN7_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+#define GEN6_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 38
+#define GEN9_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 38
+#define GEN8_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 38
+#define GEN75_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 38
+#define GEN7_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 38
+#define GEN6_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start 102
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 102;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Color Calc State Pointer Valid */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits 1
+#define GEN9_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits 1
+#define GEN8_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits 1
+#define GEN6_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start 32
+#define GEN9_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start 32
+#define GEN8_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start 32
+#define GEN6_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_ColorCalcStatePointerValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Command SubType */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+#define GEN6_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+#define GEN9_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+#define GEN8_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+#define GEN75_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+#define GEN7_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+#define GEN6_3DSTATE_CC_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Command Type */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+#define GEN9_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+#define GEN8_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+#define GEN75_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+#define GEN7_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+#define GEN6_3DSTATE_CC_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+#define GEN9_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+#define GEN8_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+#define GEN75_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+#define GEN7_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+#define GEN6_3DSTATE_CC_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::DEPTH_STENCIL_STATE Change */
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_DEPTH_STENCIL_STATEChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::DWord Length */
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+#define GEN9_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+#define GEN8_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+#define GEN75_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+#define GEN7_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+#define GEN6_3DSTATE_CC_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+#define GEN9_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+#define GEN8_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+#define GEN75_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+#define GEN7_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+#define GEN6_3DSTATE_CC_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Pointer to BLEND_STATE */
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_PointertoBLEND_STATE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CC_STATE_POINTERS::Pointer to DEPTH_STENCIL_STATE */
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CC_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 70;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_length 4
+#define GEN9_3DSTATE_CHROMA_KEY_length 4
+#define GEN8_3DSTATE_CHROMA_KEY_length 4
+#define GEN75_3DSTATE_CHROMA_KEY_length 4
+#define GEN7_3DSTATE_CHROMA_KEY_length 4
+#define GEN6_3DSTATE_CHROMA_KEY_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CHROMA_KEY_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::ChromaKey High Value */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyHighValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::ChromaKey Low Value */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyLowValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::ChromaKey Table Index */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+#define GEN9_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+#define GEN8_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+#define GEN75_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+#define GEN7_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+#define GEN6_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_ChromaKeyTableIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 62;
+ } else {
+ return 62;
+ }
+ case 6: return 62;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::Command SubType */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+#define GEN9_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+#define GEN8_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+#define GEN75_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+#define GEN7_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+#define GEN6_3DSTATE_CHROMA_KEY_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+#define GEN9_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+#define GEN8_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+#define GEN75_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+#define GEN7_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+#define GEN6_3DSTATE_CHROMA_KEY_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::Command Type */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_CommandType_bits 3
+#define GEN9_3DSTATE_CHROMA_KEY_CommandType_bits 3
+#define GEN8_3DSTATE_CHROMA_KEY_CommandType_bits 3
+#define GEN75_3DSTATE_CHROMA_KEY_CommandType_bits 3
+#define GEN7_3DSTATE_CHROMA_KEY_CommandType_bits 3
+#define GEN6_3DSTATE_CHROMA_KEY_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_CommandType_start 29
+#define GEN9_3DSTATE_CHROMA_KEY_CommandType_start 29
+#define GEN8_3DSTATE_CHROMA_KEY_CommandType_start 29
+#define GEN75_3DSTATE_CHROMA_KEY_CommandType_start 29
+#define GEN7_3DSTATE_CHROMA_KEY_CommandType_start 29
+#define GEN6_3DSTATE_CHROMA_KEY_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CHROMA_KEY::DWord Length */
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+#define GEN9_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+#define GEN8_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+#define GEN75_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+#define GEN7_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+#define GEN6_3DSTATE_CHROMA_KEY_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CHROMA_KEY_DWordLength_start 0
+#define GEN9_3DSTATE_CHROMA_KEY_DWordLength_start 0
+#define GEN8_3DSTATE_CHROMA_KEY_DWordLength_start 0
+#define GEN75_3DSTATE_CHROMA_KEY_DWordLength_start 0
+#define GEN7_3DSTATE_CHROMA_KEY_DWordLength_start 0
+#define GEN6_3DSTATE_CHROMA_KEY_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CHROMA_KEY_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_length 3
+#define GEN9_3DSTATE_CLEAR_PARAMS_length 3
+#define GEN8_3DSTATE_CLEAR_PARAMS_length 3
+#define GEN75_3DSTATE_CLEAR_PARAMS_length 3
+#define GEN7_3DSTATE_CLEAR_PARAMS_length 3
+#define GEN6_3DSTATE_CLEAR_PARAMS_length 2
+#define GEN5_3DSTATE_CLEAR_PARAMS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::Command SubType */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN6_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+#define GEN5_3DSTATE_CLEAR_PARAMS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN9_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN8_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN75_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN7_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN6_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+#define GEN5_3DSTATE_CLEAR_PARAMS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::Command Type */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN9_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN8_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN75_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN7_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN6_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+#define GEN5_3DSTATE_CLEAR_PARAMS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN9_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN8_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN75_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN7_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN6_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+#define GEN5_3DSTATE_CLEAR_PARAMS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::DWord Length */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN9_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN8_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN75_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN7_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN6_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+#define GEN5_3DSTATE_CLEAR_PARAMS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN9_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN8_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN75_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN7_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN6_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+#define GEN5_3DSTATE_CLEAR_PARAMS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::Depth Clear Value */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN9_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN8_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN75_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN7_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN6_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+#define GEN5_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DepthClearValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN9_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN8_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN75_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN7_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN6_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+#define GEN5_3DSTATE_CLEAR_PARAMS_DepthClearValue_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DepthClearValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLEAR_PARAMS::Depth Clear Value Valid */
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN9_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN8_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN75_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN7_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN6_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+#define GEN5_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 64
+#define GEN9_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 64
+#define GEN8_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 64
+#define GEN75_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 64
+#define GEN7_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 64
+#define GEN6_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 15
+#define GEN5_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLEAR_PARAMS_DepthClearValueValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 15;
+ case 5: return 15;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP */
+
+
+#define GEN10_3DSTATE_CLIP_length 4
+#define GEN9_3DSTATE_CLIP_length 4
+#define GEN8_3DSTATE_CLIP_length 4
+#define GEN75_3DSTATE_CLIP_length 4
+#define GEN7_3DSTATE_CLIP_length 4
+#define GEN6_3DSTATE_CLIP_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CLIP_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CLIP_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CLIP_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CLIP_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CLIP_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CLIP_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CLIP_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CLIP_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CLIP_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CLIP_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CLIP_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CLIP_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CLIP_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::API Mode */
+
+
+#define GEN10_3DSTATE_CLIP_APIMode_bits 1
+#define GEN9_3DSTATE_CLIP_APIMode_bits 1
+#define GEN8_3DSTATE_CLIP_APIMode_bits 1
+#define GEN75_3DSTATE_CLIP_APIMode_bits 1
+#define GEN7_3DSTATE_CLIP_APIMode_bits 1
+#define GEN6_3DSTATE_CLIP_APIMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_APIMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_APIMode_start 94
+#define GEN9_3DSTATE_CLIP_APIMode_start 94
+#define GEN8_3DSTATE_CLIP_APIMode_start 94
+#define GEN75_3DSTATE_CLIP_APIMode_start 94
+#define GEN7_3DSTATE_CLIP_APIMode_start 94
+#define GEN6_3DSTATE_CLIP_APIMode_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_APIMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 94;
+ case 9: return 94;
+ case 8: return 94;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 94;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Clip Enable */
+
+
+#define GEN10_3DSTATE_CLIP_ClipEnable_bits 1
+#define GEN9_3DSTATE_CLIP_ClipEnable_bits 1
+#define GEN8_3DSTATE_CLIP_ClipEnable_bits 1
+#define GEN75_3DSTATE_CLIP_ClipEnable_bits 1
+#define GEN7_3DSTATE_CLIP_ClipEnable_bits 1
+#define GEN6_3DSTATE_CLIP_ClipEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ClipEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ClipEnable_start 95
+#define GEN9_3DSTATE_CLIP_ClipEnable_start 95
+#define GEN8_3DSTATE_CLIP_ClipEnable_start 95
+#define GEN75_3DSTATE_CLIP_ClipEnable_start 95
+#define GEN7_3DSTATE_CLIP_ClipEnable_start 95
+#define GEN6_3DSTATE_CLIP_ClipEnable_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ClipEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 95;
+ case 9: return 95;
+ case 8: return 95;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Clip Mode */
+
+
+#define GEN10_3DSTATE_CLIP_ClipMode_bits 3
+#define GEN9_3DSTATE_CLIP_ClipMode_bits 3
+#define GEN8_3DSTATE_CLIP_ClipMode_bits 3
+#define GEN75_3DSTATE_CLIP_ClipMode_bits 3
+#define GEN7_3DSTATE_CLIP_ClipMode_bits 3
+#define GEN6_3DSTATE_CLIP_ClipMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ClipMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ClipMode_start 77
+#define GEN9_3DSTATE_CLIP_ClipMode_start 77
+#define GEN8_3DSTATE_CLIP_ClipMode_start 77
+#define GEN75_3DSTATE_CLIP_ClipMode_start 77
+#define GEN7_3DSTATE_CLIP_ClipMode_start 77
+#define GEN6_3DSTATE_CLIP_ClipMode_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ClipMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 77;
+ case 9: return 77;
+ case 8: return 77;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 77;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Command SubType */
+
+
+#define GEN10_3DSTATE_CLIP_CommandSubType_bits 2
+#define GEN9_3DSTATE_CLIP_CommandSubType_bits 2
+#define GEN8_3DSTATE_CLIP_CommandSubType_bits 2
+#define GEN75_3DSTATE_CLIP_CommandSubType_bits 2
+#define GEN7_3DSTATE_CLIP_CommandSubType_bits 2
+#define GEN6_3DSTATE_CLIP_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_CommandSubType_start 27
+#define GEN9_3DSTATE_CLIP_CommandSubType_start 27
+#define GEN8_3DSTATE_CLIP_CommandSubType_start 27
+#define GEN75_3DSTATE_CLIP_CommandSubType_start 27
+#define GEN7_3DSTATE_CLIP_CommandSubType_start 27
+#define GEN6_3DSTATE_CLIP_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Command Type */
+
+
+#define GEN10_3DSTATE_CLIP_CommandType_bits 3
+#define GEN9_3DSTATE_CLIP_CommandType_bits 3
+#define GEN8_3DSTATE_CLIP_CommandType_bits 3
+#define GEN75_3DSTATE_CLIP_CommandType_bits 3
+#define GEN7_3DSTATE_CLIP_CommandType_bits 3
+#define GEN6_3DSTATE_CLIP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_CommandType_start 29
+#define GEN9_3DSTATE_CLIP_CommandType_start 29
+#define GEN8_3DSTATE_CLIP_CommandType_start 29
+#define GEN75_3DSTATE_CLIP_CommandType_start 29
+#define GEN7_3DSTATE_CLIP_CommandType_start 29
+#define GEN6_3DSTATE_CLIP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Cull Mode */
+
+
+#define GEN75_3DSTATE_CLIP_CullMode_bits 2
+#define GEN7_3DSTATE_CLIP_CullMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CullMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_CLIP_CullMode_start 48
+#define GEN7_3DSTATE_CLIP_CullMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_CullMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::DWord Length */
+
+
+#define GEN10_3DSTATE_CLIP_DWordLength_bits 8
+#define GEN9_3DSTATE_CLIP_DWordLength_bits 8
+#define GEN8_3DSTATE_CLIP_DWordLength_bits 8
+#define GEN75_3DSTATE_CLIP_DWordLength_bits 8
+#define GEN7_3DSTATE_CLIP_DWordLength_bits 8
+#define GEN6_3DSTATE_CLIP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_DWordLength_start 0
+#define GEN9_3DSTATE_CLIP_DWordLength_start 0
+#define GEN8_3DSTATE_CLIP_DWordLength_start 0
+#define GEN75_3DSTATE_CLIP_DWordLength_start 0
+#define GEN7_3DSTATE_CLIP_DWordLength_start 0
+#define GEN6_3DSTATE_CLIP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Early Cull Enable */
+
+
+#define GEN10_3DSTATE_CLIP_EarlyCullEnable_bits 1
+#define GEN9_3DSTATE_CLIP_EarlyCullEnable_bits 1
+#define GEN8_3DSTATE_CLIP_EarlyCullEnable_bits 1
+#define GEN75_3DSTATE_CLIP_EarlyCullEnable_bits 1
+#define GEN7_3DSTATE_CLIP_EarlyCullEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_EarlyCullEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_EarlyCullEnable_start 50
+#define GEN9_3DSTATE_CLIP_EarlyCullEnable_start 50
+#define GEN8_3DSTATE_CLIP_EarlyCullEnable_start 50
+#define GEN75_3DSTATE_CLIP_EarlyCullEnable_start 50
+#define GEN7_3DSTATE_CLIP_EarlyCullEnable_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_EarlyCullEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Force Clip Mode */
+
+
+#define GEN10_3DSTATE_CLIP_ForceClipMode_bits 1
+#define GEN9_3DSTATE_CLIP_ForceClipMode_bits 1
+#define GEN8_3DSTATE_CLIP_ForceClipMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceClipMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ForceClipMode_start 48
+#define GEN9_3DSTATE_CLIP_ForceClipMode_start 48
+#define GEN8_3DSTATE_CLIP_ForceClipMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceClipMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Force User Clip Distance Clip Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_bits 1
+#define GEN9_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_bits 1
+#define GEN8_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_start 49
+#define GEN9_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_start 49
+#define GEN8_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceUserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 49;
+ case 8: return 49;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Force User Clip Distance Cull Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_bits 1
+#define GEN9_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_bits 1
+#define GEN8_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_start 52
+#define GEN9_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_start 52
+#define GEN8_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceUserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Force Zero RTA Index Enable */
+
+
+#define GEN10_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+#define GEN9_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+#define GEN8_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+#define GEN75_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+#define GEN7_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+#define GEN6_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceZeroRTAIndexEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+#define GEN9_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+#define GEN8_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+#define GEN75_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+#define GEN7_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+#define GEN6_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ForceZeroRTAIndexEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 101;
+ case 9: return 101;
+ case 8: return 101;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 101;
+ } else {
+ return 101;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Front Winding */
+
+
+#define GEN75_3DSTATE_CLIP_FrontWinding_bits 1
+#define GEN7_3DSTATE_CLIP_FrontWinding_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_FrontWinding_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_CLIP_FrontWinding_start 52
+#define GEN7_3DSTATE_CLIP_FrontWinding_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_FrontWinding_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Guardband Clip Test Enable */
+
+
+#define GEN10_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+#define GEN9_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+#define GEN8_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+#define GEN75_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+#define GEN7_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+#define GEN6_3DSTATE_CLIP_GuardbandClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_GuardbandClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+#define GEN9_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+#define GEN8_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+#define GEN75_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+#define GEN7_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+#define GEN6_3DSTATE_CLIP_GuardbandClipTestEnable_start 90
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_GuardbandClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 90;
+ case 9: return 90;
+ case 8: return 90;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 90;
+ } else {
+ return 90;
+ }
+ case 6: return 90;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Line Strip/List Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+#define GEN9_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+#define GEN8_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+#define GEN75_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+#define GEN7_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+#define GEN6_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 66;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Maximum Point Width */
+
+
+#define GEN10_3DSTATE_CLIP_MaximumPointWidth_bits 11
+#define GEN9_3DSTATE_CLIP_MaximumPointWidth_bits 11
+#define GEN8_3DSTATE_CLIP_MaximumPointWidth_bits 11
+#define GEN75_3DSTATE_CLIP_MaximumPointWidth_bits 11
+#define GEN7_3DSTATE_CLIP_MaximumPointWidth_bits 11
+#define GEN6_3DSTATE_CLIP_MaximumPointWidth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MaximumPointWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_MaximumPointWidth_start 102
+#define GEN9_3DSTATE_CLIP_MaximumPointWidth_start 102
+#define GEN8_3DSTATE_CLIP_MaximumPointWidth_start 102
+#define GEN75_3DSTATE_CLIP_MaximumPointWidth_start 102
+#define GEN7_3DSTATE_CLIP_MaximumPointWidth_start 102
+#define GEN6_3DSTATE_CLIP_MaximumPointWidth_start 102
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MaximumPointWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 102;
+ case 9: return 102;
+ case 8: return 102;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 102;
+ } else {
+ return 102;
+ }
+ case 6: return 102;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Maximum VP Index */
+
+
+#define GEN10_3DSTATE_CLIP_MaximumVPIndex_bits 4
+#define GEN9_3DSTATE_CLIP_MaximumVPIndex_bits 4
+#define GEN8_3DSTATE_CLIP_MaximumVPIndex_bits 4
+#define GEN75_3DSTATE_CLIP_MaximumVPIndex_bits 4
+#define GEN7_3DSTATE_CLIP_MaximumVPIndex_bits 4
+#define GEN6_3DSTATE_CLIP_MaximumVPIndex_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MaximumVPIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_MaximumVPIndex_start 96
+#define GEN9_3DSTATE_CLIP_MaximumVPIndex_start 96
+#define GEN8_3DSTATE_CLIP_MaximumVPIndex_start 96
+#define GEN75_3DSTATE_CLIP_MaximumVPIndex_start 96
+#define GEN7_3DSTATE_CLIP_MaximumVPIndex_start 96
+#define GEN6_3DSTATE_CLIP_MaximumVPIndex_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MaximumVPIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Minimum Point Width */
+
+
+#define GEN10_3DSTATE_CLIP_MinimumPointWidth_bits 11
+#define GEN9_3DSTATE_CLIP_MinimumPointWidth_bits 11
+#define GEN8_3DSTATE_CLIP_MinimumPointWidth_bits 11
+#define GEN75_3DSTATE_CLIP_MinimumPointWidth_bits 11
+#define GEN7_3DSTATE_CLIP_MinimumPointWidth_bits 11
+#define GEN6_3DSTATE_CLIP_MinimumPointWidth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MinimumPointWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_MinimumPointWidth_start 113
+#define GEN9_3DSTATE_CLIP_MinimumPointWidth_start 113
+#define GEN8_3DSTATE_CLIP_MinimumPointWidth_start 113
+#define GEN75_3DSTATE_CLIP_MinimumPointWidth_start 113
+#define GEN7_3DSTATE_CLIP_MinimumPointWidth_start 113
+#define GEN6_3DSTATE_CLIP_MinimumPointWidth_start 113
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_MinimumPointWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 113;
+ } else {
+ return 113;
+ }
+ case 6: return 113;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Non-Perspective Barycentric Enable */
+
+
+#define GEN10_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+#define GEN9_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+#define GEN8_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+#define GEN75_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+#define GEN7_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+#define GEN6_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+#define GEN9_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+#define GEN8_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+#define GEN75_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+#define GEN7_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+#define GEN6_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_NonPerspectiveBarycentricEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Perspective Divide Disable */
+
+
+#define GEN10_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+#define GEN9_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+#define GEN8_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+#define GEN75_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+#define GEN7_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+#define GEN6_3DSTATE_CLIP_PerspectiveDivideDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_PerspectiveDivideDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+#define GEN9_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+#define GEN8_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+#define GEN75_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+#define GEN7_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+#define GEN6_3DSTATE_CLIP_PerspectiveDivideDisable_start 73
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_PerspectiveDivideDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 73;
+ case 9: return 73;
+ case 8: return 73;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 73;
+ } else {
+ return 73;
+ }
+ case 6: return 73;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Statistics Enable */
+
+
+#define GEN10_3DSTATE_CLIP_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_CLIP_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_CLIP_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_CLIP_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_CLIP_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_CLIP_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_StatisticsEnable_start 42
+#define GEN9_3DSTATE_CLIP_StatisticsEnable_start 42
+#define GEN8_3DSTATE_CLIP_StatisticsEnable_start 42
+#define GEN75_3DSTATE_CLIP_StatisticsEnable_start 42
+#define GEN7_3DSTATE_CLIP_StatisticsEnable_start 42
+#define GEN6_3DSTATE_CLIP_StatisticsEnable_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 42;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Triangle Fan Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+#define GEN9_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+#define GEN8_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+#define GEN75_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+#define GEN7_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+#define GEN6_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Triangle Strip/List Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+#define GEN9_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+#define GEN8_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+#define GEN75_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+#define GEN7_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+#define GEN6_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 68;
+ case 9: return 68;
+ case 8: return 68;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 68;
+ } else {
+ return 68;
+ }
+ case 6: return 68;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::User Clip Distance Clip Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN75_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN7_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN6_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+#define GEN9_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+#define GEN8_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+#define GEN75_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+#define GEN7_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+#define GEN6_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::User Clip Distance Cull Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN75_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN7_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN6_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+#define GEN9_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+#define GEN8_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+#define GEN75_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+#define GEN7_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+#define GEN6_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Vertex Sub Pixel Precision Select */
+
+
+#define GEN10_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits 1
+#define GEN9_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits 1
+#define GEN8_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits 1
+#define GEN75_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits 1
+#define GEN7_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start 51
+#define GEN9_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start 51
+#define GEN8_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start 51
+#define GEN75_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start 51
+#define GEN7_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 51;
+ } else {
+ return 51;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Viewport XY Clip Test Enable */
+
+
+#define GEN10_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+#define GEN9_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+#define GEN8_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+#define GEN75_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+#define GEN7_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+#define GEN6_3DSTATE_CLIP_ViewportXYClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ViewportXYClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+#define GEN9_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+#define GEN8_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+#define GEN75_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+#define GEN7_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+#define GEN6_3DSTATE_CLIP_ViewportXYClipTestEnable_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ViewportXYClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 92;
+ case 9: return 92;
+ case 8: return 92;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 92;
+ } else {
+ return 92;
+ }
+ case 6: return 92;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CLIP::Viewport Z Clip Test Enable */
+
+
+#define GEN75_3DSTATE_CLIP_ViewportZClipTestEnable_bits 1
+#define GEN7_3DSTATE_CLIP_ViewportZClipTestEnable_bits 1
+#define GEN6_3DSTATE_CLIP_ViewportZClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_CLIP_ViewportZClipTestEnable_start 91
+#define GEN7_3DSTATE_CLIP_ViewportZClipTestEnable_start 91
+#define GEN6_3DSTATE_CLIP_ViewportZClipTestEnable_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CLIP_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 91;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_BODY */
+
+
+#define GEN10_3DSTATE_CONSTANT_BODY_length 10
+#define GEN9_3DSTATE_CONSTANT_BODY_length 10
+#define GEN8_3DSTATE_CONSTANT_BODY_length 10
+#define GEN75_3DSTATE_CONSTANT_BODY_length 6
+#define GEN7_3DSTATE_CONSTANT_BODY_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_BODY::Buffer */
+
+
+#define GEN10_3DSTATE_CONSTANT_BODY_Buffer_bits 59
+#define GEN9_3DSTATE_CONSTANT_BODY_Buffer_bits 59
+#define GEN8_3DSTATE_CONSTANT_BODY_Buffer_bits 59
+#define GEN75_3DSTATE_CONSTANT_BODY_Buffer_bits 27
+#define GEN7_3DSTATE_CONSTANT_BODY_Buffer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_Buffer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_BODY_Buffer_start 5
+#define GEN9_3DSTATE_CONSTANT_BODY_Buffer_start 5
+#define GEN8_3DSTATE_CONSTANT_BODY_Buffer_start 5
+#define GEN75_3DSTATE_CONSTANT_BODY_Buffer_start 5
+#define GEN7_3DSTATE_CONSTANT_BODY_Buffer_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_Buffer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_BODY::Constant Buffer Object Control State */
+
+
+#define GEN75_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_bits 5
+#define GEN7_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_start 64
+#define GEN7_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_BODY::Read Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_BODY_ReadLength_bits 16
+#define GEN9_3DSTATE_CONSTANT_BODY_ReadLength_bits 16
+#define GEN8_3DSTATE_CONSTANT_BODY_ReadLength_bits 16
+#define GEN75_3DSTATE_CONSTANT_BODY_ReadLength_bits 16
+#define GEN7_3DSTATE_CONSTANT_BODY_ReadLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_BODY_ReadLength_start 0
+#define GEN9_3DSTATE_CONSTANT_BODY_ReadLength_start 0
+#define GEN8_3DSTATE_CONSTANT_BODY_ReadLength_start 0
+#define GEN75_3DSTATE_CONSTANT_BODY_ReadLength_start 0
+#define GEN7_3DSTATE_CONSTANT_BODY_ReadLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_BODY_ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_length 5
+#define GEN45_3DSTATE_CONSTANT_COLOR_length 5
+#define GEN4_3DSTATE_CONSTANT_COLOR_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::3D Command Opcode */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::3D Command Sub Opcode */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Blend Constant Color Alpha */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_bits 32
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_bits 32
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_start 128
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_start 128
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Blend Constant Color Blue */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_bits 32
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_bits 32
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_start 96
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_start 96
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Blend Constant Color Green */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_bits 32
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_bits 32
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_start 64
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_start 64
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Blend Constant Color Red */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_bits 32
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_bits 32
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_start 32
+#define GEN45_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_start 32
+#define GEN4_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_BlendConstantColorRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Command SubType */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_CommandSubType_bits 2
+#define GEN45_3DSTATE_CONSTANT_COLOR_CommandSubType_bits 2
+#define GEN4_3DSTATE_CONSTANT_COLOR_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_CommandSubType_start 27
+#define GEN45_3DSTATE_CONSTANT_COLOR_CommandSubType_start 27
+#define GEN4_3DSTATE_CONSTANT_COLOR_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::Command Type */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_CommandType_bits 3
+#define GEN45_3DSTATE_CONSTANT_COLOR_CommandType_bits 3
+#define GEN4_3DSTATE_CONSTANT_COLOR_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_CommandType_start 29
+#define GEN45_3DSTATE_CONSTANT_COLOR_CommandType_start 29
+#define GEN4_3DSTATE_CONSTANT_COLOR_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_COLOR::DWord Length */
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_DWordLength_bits 8
+#define GEN45_3DSTATE_CONSTANT_COLOR_DWordLength_bits 8
+#define GEN4_3DSTATE_CONSTANT_COLOR_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_CONSTANT_COLOR_DWordLength_start 0
+#define GEN45_3DSTATE_CONSTANT_COLOR_DWordLength_start 0
+#define GEN4_3DSTATE_CONSTANT_COLOR_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_COLOR_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_length 11
+#define GEN9_3DSTATE_CONSTANT_DS_length 11
+#define GEN8_3DSTATE_CONSTANT_DS_length 11
+#define GEN75_3DSTATE_CONSTANT_DS_length 7
+#define GEN7_3DSTATE_CONSTANT_DS_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CONSTANT_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CONSTANT_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CONSTANT_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CONSTANT_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CONSTANT_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_CONSTANT_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_CONSTANT_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_CONSTANT_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_CONSTANT_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::Command Type */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_CommandType_bits 3
+#define GEN9_3DSTATE_CONSTANT_DS_CommandType_bits 3
+#define GEN8_3DSTATE_CONSTANT_DS_CommandType_bits 3
+#define GEN75_3DSTATE_CONSTANT_DS_CommandType_bits 3
+#define GEN7_3DSTATE_CONSTANT_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_CommandType_start 29
+#define GEN9_3DSTATE_CONSTANT_DS_CommandType_start 29
+#define GEN8_3DSTATE_CONSTANT_DS_CommandType_start 29
+#define GEN75_3DSTATE_CONSTANT_DS_CommandType_start 29
+#define GEN7_3DSTATE_CONSTANT_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::Constant Body */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_ConstantBody_bits 320
+#define GEN9_3DSTATE_CONSTANT_DS_ConstantBody_bits 320
+#define GEN8_3DSTATE_CONSTANT_DS_ConstantBody_bits 320
+#define GEN75_3DSTATE_CONSTANT_DS_ConstantBody_bits 192
+#define GEN7_3DSTATE_CONSTANT_DS_ConstantBody_bits 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_ConstantBody_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_ConstantBody_start 32
+#define GEN9_3DSTATE_CONSTANT_DS_ConstantBody_start 32
+#define GEN8_3DSTATE_CONSTANT_DS_ConstantBody_start 32
+#define GEN75_3DSTATE_CONSTANT_DS_ConstantBody_start 32
+#define GEN7_3DSTATE_CONSTANT_DS_ConstantBody_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_ConstantBody_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::Constant Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_start 8
+#define GEN9_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_start 8
+#define GEN8_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_CONSTANT_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_CONSTANT_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_CONSTANT_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_CONSTANT_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_DS_DWordLength_start 0
+#define GEN9_3DSTATE_CONSTANT_DS_DWordLength_start 0
+#define GEN8_3DSTATE_CONSTANT_DS_DWordLength_start 0
+#define GEN75_3DSTATE_CONSTANT_DS_DWordLength_start 0
+#define GEN7_3DSTATE_CONSTANT_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_length 11
+#define GEN9_3DSTATE_CONSTANT_GS_length 11
+#define GEN8_3DSTATE_CONSTANT_GS_length 11
+#define GEN75_3DSTATE_CONSTANT_GS_length 7
+#define GEN7_3DSTATE_CONSTANT_GS_length 7
+#define GEN6_3DSTATE_CONSTANT_GS_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CONSTANT_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Buffer 0 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer0Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer0Valid_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer0Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Buffer 1 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer1Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer1Valid_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer1Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Buffer 2 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer2Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer2Valid_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer2Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Buffer 3 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer3Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_Buffer3Valid_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_Buffer3Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+#define GEN6_3DSTATE_CONSTANT_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+#define GEN6_3DSTATE_CONSTANT_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Command Type */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_CommandType_bits 3
+#define GEN9_3DSTATE_CONSTANT_GS_CommandType_bits 3
+#define GEN8_3DSTATE_CONSTANT_GS_CommandType_bits 3
+#define GEN75_3DSTATE_CONSTANT_GS_CommandType_bits 3
+#define GEN7_3DSTATE_CONSTANT_GS_CommandType_bits 3
+#define GEN6_3DSTATE_CONSTANT_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_CommandType_start 29
+#define GEN9_3DSTATE_CONSTANT_GS_CommandType_start 29
+#define GEN8_3DSTATE_CONSTANT_GS_CommandType_start 29
+#define GEN75_3DSTATE_CONSTANT_GS_CommandType_start 29
+#define GEN7_3DSTATE_CONSTANT_GS_CommandType_start 29
+#define GEN6_3DSTATE_CONSTANT_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Constant Body */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_ConstantBody_bits 320
+#define GEN9_3DSTATE_CONSTANT_GS_ConstantBody_bits 320
+#define GEN8_3DSTATE_CONSTANT_GS_ConstantBody_bits 320
+#define GEN75_3DSTATE_CONSTANT_GS_ConstantBody_bits 192
+#define GEN7_3DSTATE_CONSTANT_GS_ConstantBody_bits 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_ConstantBody_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_ConstantBody_start 32
+#define GEN9_3DSTATE_CONSTANT_GS_ConstantBody_start 32
+#define GEN8_3DSTATE_CONSTANT_GS_ConstantBody_start 32
+#define GEN75_3DSTATE_CONSTANT_GS_ConstantBody_start 32
+#define GEN7_3DSTATE_CONSTANT_GS_ConstantBody_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_ConstantBody_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Constant Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_bits 7
+#define GEN6_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_start 8
+#define GEN9_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_start 8
+#define GEN8_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_start 8
+#define GEN6_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+#define GEN6_3DSTATE_CONSTANT_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_GS_DWordLength_start 0
+#define GEN9_3DSTATE_CONSTANT_GS_DWordLength_start 0
+#define GEN8_3DSTATE_CONSTANT_GS_DWordLength_start 0
+#define GEN75_3DSTATE_CONSTANT_GS_DWordLength_start 0
+#define GEN7_3DSTATE_CONSTANT_GS_DWordLength_start 0
+#define GEN6_3DSTATE_CONSTANT_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::GS Constant Buffer 0 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer0ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer0ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer0ReadLength_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer0ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::GS Constant Buffer 1 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer1ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer1ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer1ReadLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer1ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::GS Constant Buffer 2 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer2ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer2ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer2ReadLength_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer2ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::GS Constant Buffer 3 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer3ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer3ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_GSConstantBuffer3ReadLength_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_GSConstantBuffer3ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Pointer to GS Constant Buffer 0 */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer0_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer0_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Pointer to GS Constant Buffer 1 */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer1_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer1_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Pointer to GS Constant Buffer 2 */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer2_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer2_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_GS::Pointer to GS Constant Buffer 3 */
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer3_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer3_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_GS_PointertoGSConstantBuffer3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 133;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_length 11
+#define GEN9_3DSTATE_CONSTANT_HS_length 11
+#define GEN8_3DSTATE_CONSTANT_HS_length 11
+#define GEN75_3DSTATE_CONSTANT_HS_length 7
+#define GEN7_3DSTATE_CONSTANT_HS_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CONSTANT_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CONSTANT_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CONSTANT_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CONSTANT_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CONSTANT_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_CONSTANT_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_CONSTANT_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_CONSTANT_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_CONSTANT_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::Command Type */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_CommandType_bits 3
+#define GEN9_3DSTATE_CONSTANT_HS_CommandType_bits 3
+#define GEN8_3DSTATE_CONSTANT_HS_CommandType_bits 3
+#define GEN75_3DSTATE_CONSTANT_HS_CommandType_bits 3
+#define GEN7_3DSTATE_CONSTANT_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_CommandType_start 29
+#define GEN9_3DSTATE_CONSTANT_HS_CommandType_start 29
+#define GEN8_3DSTATE_CONSTANT_HS_CommandType_start 29
+#define GEN75_3DSTATE_CONSTANT_HS_CommandType_start 29
+#define GEN7_3DSTATE_CONSTANT_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::Constant Body */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_ConstantBody_bits 320
+#define GEN9_3DSTATE_CONSTANT_HS_ConstantBody_bits 320
+#define GEN8_3DSTATE_CONSTANT_HS_ConstantBody_bits 320
+#define GEN75_3DSTATE_CONSTANT_HS_ConstantBody_bits 192
+#define GEN7_3DSTATE_CONSTANT_HS_ConstantBody_bits 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_ConstantBody_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_ConstantBody_start 32
+#define GEN9_3DSTATE_CONSTANT_HS_ConstantBody_start 32
+#define GEN8_3DSTATE_CONSTANT_HS_ConstantBody_start 32
+#define GEN75_3DSTATE_CONSTANT_HS_ConstantBody_start 32
+#define GEN7_3DSTATE_CONSTANT_HS_ConstantBody_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_ConstantBody_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::Constant Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_start 8
+#define GEN9_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_start 8
+#define GEN8_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_CONSTANT_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_CONSTANT_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_CONSTANT_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_CONSTANT_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_HS_DWordLength_start 0
+#define GEN9_3DSTATE_CONSTANT_HS_DWordLength_start 0
+#define GEN8_3DSTATE_CONSTANT_HS_DWordLength_start 0
+#define GEN75_3DSTATE_CONSTANT_HS_DWordLength_start 0
+#define GEN7_3DSTATE_CONSTANT_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_length 11
+#define GEN9_3DSTATE_CONSTANT_PS_length 11
+#define GEN8_3DSTATE_CONSTANT_PS_length 11
+#define GEN75_3DSTATE_CONSTANT_PS_length 7
+#define GEN7_3DSTATE_CONSTANT_PS_length 7
+#define GEN6_3DSTATE_CONSTANT_PS_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CONSTANT_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Buffer 0 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer0Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer0Valid_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer0Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Buffer 1 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer1Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer1Valid_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer1Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Buffer 2 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer2Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer2Valid_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer2Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Buffer 3 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer3Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_Buffer3Valid_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_Buffer3Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+#define GEN6_3DSTATE_CONSTANT_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+#define GEN7_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+#define GEN6_3DSTATE_CONSTANT_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Command Type */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_CommandType_bits 3
+#define GEN9_3DSTATE_CONSTANT_PS_CommandType_bits 3
+#define GEN8_3DSTATE_CONSTANT_PS_CommandType_bits 3
+#define GEN75_3DSTATE_CONSTANT_PS_CommandType_bits 3
+#define GEN7_3DSTATE_CONSTANT_PS_CommandType_bits 3
+#define GEN6_3DSTATE_CONSTANT_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_CommandType_start 29
+#define GEN9_3DSTATE_CONSTANT_PS_CommandType_start 29
+#define GEN8_3DSTATE_CONSTANT_PS_CommandType_start 29
+#define GEN75_3DSTATE_CONSTANT_PS_CommandType_start 29
+#define GEN7_3DSTATE_CONSTANT_PS_CommandType_start 29
+#define GEN6_3DSTATE_CONSTANT_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Constant Body */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_ConstantBody_bits 320
+#define GEN9_3DSTATE_CONSTANT_PS_ConstantBody_bits 320
+#define GEN8_3DSTATE_CONSTANT_PS_ConstantBody_bits 320
+#define GEN75_3DSTATE_CONSTANT_PS_ConstantBody_bits 192
+#define GEN7_3DSTATE_CONSTANT_PS_ConstantBody_bits 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_ConstantBody_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_ConstantBody_start 32
+#define GEN9_3DSTATE_CONSTANT_PS_ConstantBody_start 32
+#define GEN8_3DSTATE_CONSTANT_PS_ConstantBody_start 32
+#define GEN75_3DSTATE_CONSTANT_PS_ConstantBody_start 32
+#define GEN7_3DSTATE_CONSTANT_PS_ConstantBody_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_ConstantBody_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Constant Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_bits 7
+#define GEN6_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_start 8
+#define GEN9_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_start 8
+#define GEN8_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_start 8
+#define GEN6_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+#define GEN7_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+#define GEN6_3DSTATE_CONSTANT_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_DWordLength_start 0
+#define GEN9_3DSTATE_CONSTANT_PS_DWordLength_start 0
+#define GEN8_3DSTATE_CONSTANT_PS_DWordLength_start 0
+#define GEN75_3DSTATE_CONSTANT_PS_DWordLength_start 0
+#define GEN7_3DSTATE_CONSTANT_PS_DWordLength_start 0
+#define GEN6_3DSTATE_CONSTANT_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Disable Gather at Set Shader Hint */
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_DisableGatheratSetShaderHint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::PS Constant Buffer 0 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer0ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer0ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer0ReadLength_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer0ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::PS Constant Buffer 1 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer1ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer1ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer1ReadLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer1ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::PS Constant Buffer 2 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer2ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer2ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer2ReadLength_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer2ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::PS Constant Buffer 3 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer3ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer3ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PSConstantBuffer3ReadLength_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PSConstantBuffer3ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Pointer to PS Constant Buffer 0 */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer0_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer0_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Pointer to PS Constant Buffer 1 */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer1_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer1_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Pointer to PS Constant Buffer 2 */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer2_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer2_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_PS::Pointer to PS Constant Buffer 3 */
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer3_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer3_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_PS_PointertoPSConstantBuffer3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 133;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_length 11
+#define GEN9_3DSTATE_CONSTANT_VS_length 11
+#define GEN8_3DSTATE_CONSTANT_VS_length 11
+#define GEN75_3DSTATE_CONSTANT_VS_length 7
+#define GEN7_3DSTATE_CONSTANT_VS_length 7
+#define GEN6_3DSTATE_CONSTANT_VS_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_CONSTANT_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Buffer 0 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer0Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer0Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer0Valid_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer0Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Buffer 1 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer1Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer1Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer1Valid_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer1Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Buffer 2 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer2Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer2Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer2Valid_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer2Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Buffer 3 Valid */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer3Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer3Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_Buffer3Valid_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_Buffer3Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+#define GEN6_3DSTATE_CONSTANT_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+#define GEN6_3DSTATE_CONSTANT_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Command Type */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_CommandType_bits 3
+#define GEN9_3DSTATE_CONSTANT_VS_CommandType_bits 3
+#define GEN8_3DSTATE_CONSTANT_VS_CommandType_bits 3
+#define GEN75_3DSTATE_CONSTANT_VS_CommandType_bits 3
+#define GEN7_3DSTATE_CONSTANT_VS_CommandType_bits 3
+#define GEN6_3DSTATE_CONSTANT_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_CommandType_start 29
+#define GEN9_3DSTATE_CONSTANT_VS_CommandType_start 29
+#define GEN8_3DSTATE_CONSTANT_VS_CommandType_start 29
+#define GEN75_3DSTATE_CONSTANT_VS_CommandType_start 29
+#define GEN7_3DSTATE_CONSTANT_VS_CommandType_start 29
+#define GEN6_3DSTATE_CONSTANT_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Constant Body */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_ConstantBody_bits 320
+#define GEN9_3DSTATE_CONSTANT_VS_ConstantBody_bits 320
+#define GEN8_3DSTATE_CONSTANT_VS_ConstantBody_bits 320
+#define GEN75_3DSTATE_CONSTANT_VS_ConstantBody_bits 192
+#define GEN7_3DSTATE_CONSTANT_VS_ConstantBody_bits 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_ConstantBody_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_ConstantBody_start 32
+#define GEN9_3DSTATE_CONSTANT_VS_ConstantBody_start 32
+#define GEN8_3DSTATE_CONSTANT_VS_ConstantBody_start 32
+#define GEN75_3DSTATE_CONSTANT_VS_ConstantBody_start 32
+#define GEN7_3DSTATE_CONSTANT_VS_ConstantBody_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_ConstantBody_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Constant Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_bits 7
+#define GEN6_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_start 8
+#define GEN9_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_start 8
+#define GEN8_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_start 8
+#define GEN6_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_ConstantBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+#define GEN6_3DSTATE_CONSTANT_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_CONSTANT_VS_DWordLength_start 0
+#define GEN9_3DSTATE_CONSTANT_VS_DWordLength_start 0
+#define GEN8_3DSTATE_CONSTANT_VS_DWordLength_start 0
+#define GEN75_3DSTATE_CONSTANT_VS_DWordLength_start 0
+#define GEN7_3DSTATE_CONSTANT_VS_DWordLength_start 0
+#define GEN6_3DSTATE_CONSTANT_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Pointer to VS Constant Buffer 0 */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer0_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer0_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Pointer to VS Constant Buffer 1 */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer1_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer1_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Pointer to VS Constant Buffer 2 */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer2_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer2_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::Pointer to VS Constant Buffer 3 */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer3_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer3_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_PointertoVSConstantBuffer3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 133;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::VS Constant Buffer 0 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer0ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer0ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer0ReadLength_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer0ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::VS Constant Buffer 1 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer1ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer1ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer1ReadLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer1ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::VS Constant Buffer 2 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer2ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer2ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer2ReadLength_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer2ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_CONSTANT_VS::VS Constant Buffer 3 Read Length */
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer3ReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer3ReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_CONSTANT_VS_VSConstantBuffer3ReadLength_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_CONSTANT_VS_VSConstantBuffer3ReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_length 8
+#define GEN9_3DSTATE_DEPTH_BUFFER_length 8
+#define GEN8_3DSTATE_DEPTH_BUFFER_length 8
+#define GEN75_3DSTATE_DEPTH_BUFFER_length 7
+#define GEN7_3DSTATE_DEPTH_BUFFER_length 7
+#define GEN6_3DSTATE_DEPTH_BUFFER_length 7
+#define GEN5_3DSTATE_DEPTH_BUFFER_length 6
+#define GEN45_3DSTATE_DEPTH_BUFFER_length 6
+#define GEN4_3DSTATE_DEPTH_BUFFER_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Command SubType */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN9_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN8_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN75_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN7_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN6_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN5_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN45_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN4_3DSTATE_DEPTH_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN9_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN8_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN75_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN7_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN6_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN5_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN45_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN4_3DSTATE_DEPTH_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Command Type */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN9_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN8_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN75_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN7_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN6_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN5_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN45_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+#define GEN4_3DSTATE_DEPTH_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN9_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN8_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN75_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN7_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN6_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN5_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN45_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+#define GEN4_3DSTATE_DEPTH_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::DWord Length */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN9_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN8_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN75_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN7_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN6_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN5_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN45_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN4_3DSTATE_DEPTH_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN9_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN8_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN75_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN7_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN6_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN5_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN45_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+#define GEN4_3DSTATE_DEPTH_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN9_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN8_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN75_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN7_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN6_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN5_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN45_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+#define GEN4_3DSTATE_DEPTH_BUFFER_Depth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Depth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Depth_start 181
+#define GEN9_3DSTATE_DEPTH_BUFFER_Depth_start 181
+#define GEN8_3DSTATE_DEPTH_BUFFER_Depth_start 181
+#define GEN75_3DSTATE_DEPTH_BUFFER_Depth_start 149
+#define GEN7_3DSTATE_DEPTH_BUFFER_Depth_start 149
+#define GEN6_3DSTATE_DEPTH_BUFFER_Depth_start 149
+#define GEN5_3DSTATE_DEPTH_BUFFER_Depth_start 149
+#define GEN45_3DSTATE_DEPTH_BUFFER_Depth_start 149
+#define GEN4_3DSTATE_DEPTH_BUFFER_Depth_start 149
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Depth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 181;
+ case 9: return 181;
+ case 8: return 181;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 149;
+ } else {
+ return 149;
+ }
+ case 6: return 149;
+ case 5: return 149;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 149;
+ } else {
+ return 149;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Buffer Coordinate Offset Disable */
+
+
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_bits 1
+#define GEN4_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_start 57
+#define GEN4_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferCoordinateOffsetDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 57;
+ } else {
+ return 57;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Buffer MOCS */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 7
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 7
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 7
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 4
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 4
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 160
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 160
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 160
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 128
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 128
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start 219
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 219;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 7
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 4
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 4
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 160
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 160
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 160
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 128
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 128
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start 219
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 219;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Coordinate Offset X */
+
+
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits 16
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits 16
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits 16
+#define GEN5_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits 16
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start 160
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start 160
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start 160
+#define GEN5_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start 160
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Coordinate Offset Y */
+
+
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits 16
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits 16
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits 16
+#define GEN5_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits 16
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start 176
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start 176
+#define GEN6_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start 176
+#define GEN5_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start 176
+#define GEN45_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthCoordinateOffsetY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 176;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 176;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Depth Write Enable */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits 1
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits 1
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits 1
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits 1
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start 60
+#define GEN9_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start 60
+#define GEN8_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start 60
+#define GEN75_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start 60
+#define GEN7_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_DepthWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 60;
+ } else {
+ return 60;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Height */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Height_bits 14
+#define GEN9_3DSTATE_DEPTH_BUFFER_Height_bits 14
+#define GEN8_3DSTATE_DEPTH_BUFFER_Height_bits 14
+#define GEN75_3DSTATE_DEPTH_BUFFER_Height_bits 14
+#define GEN7_3DSTATE_DEPTH_BUFFER_Height_bits 14
+#define GEN6_3DSTATE_DEPTH_BUFFER_Height_bits 13
+#define GEN5_3DSTATE_DEPTH_BUFFER_Height_bits 13
+#define GEN45_3DSTATE_DEPTH_BUFFER_Height_bits 13
+#define GEN4_3DSTATE_DEPTH_BUFFER_Height_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Height_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 13;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Height_start 146
+#define GEN9_3DSTATE_DEPTH_BUFFER_Height_start 146
+#define GEN8_3DSTATE_DEPTH_BUFFER_Height_start 146
+#define GEN75_3DSTATE_DEPTH_BUFFER_Height_start 114
+#define GEN7_3DSTATE_DEPTH_BUFFER_Height_start 114
+#define GEN6_3DSTATE_DEPTH_BUFFER_Height_start 115
+#define GEN5_3DSTATE_DEPTH_BUFFER_Height_start 115
+#define GEN45_3DSTATE_DEPTH_BUFFER_Height_start 115
+#define GEN4_3DSTATE_DEPTH_BUFFER_Height_start 115
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Height_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 146;
+ case 9: return 146;
+ case 8: return 146;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 114;
+ } else {
+ return 114;
+ }
+ case 6: return 115;
+ case 5: return 115;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 115;
+ } else {
+ return 115;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Hierarchical Depth Buffer Enable */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN9_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN8_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN75_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN7_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN6_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+#define GEN5_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN9_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN8_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN75_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN7_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN6_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+#define GEN5_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_HierarchicalDepthBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 54;
+ } else {
+ return 54;
+ }
+ case 6: return 54;
+ case 5: return 54;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::LOD */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN9_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN8_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN75_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN7_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN6_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN5_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN45_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+#define GEN4_3DSTATE_DEPTH_BUFFER_LOD_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_LOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_LOD_start 128
+#define GEN9_3DSTATE_DEPTH_BUFFER_LOD_start 128
+#define GEN8_3DSTATE_DEPTH_BUFFER_LOD_start 128
+#define GEN75_3DSTATE_DEPTH_BUFFER_LOD_start 96
+#define GEN7_3DSTATE_DEPTH_BUFFER_LOD_start 96
+#define GEN6_3DSTATE_DEPTH_BUFFER_LOD_start 98
+#define GEN5_3DSTATE_DEPTH_BUFFER_LOD_start 98
+#define GEN45_3DSTATE_DEPTH_BUFFER_LOD_start 98
+#define GEN4_3DSTATE_DEPTH_BUFFER_LOD_start 98
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_LOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 98;
+ case 5: return 98;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 98;
+ } else {
+ return 98;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::MIP Map Layout Mode */
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits 1
+#define GEN5_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits 1
+#define GEN45_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits 1
+#define GEN4_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start 97
+#define GEN5_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start 97
+#define GEN45_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start 97
+#define GEN4_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start 97
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MIPMapLayoutMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 97;
+ case 5: return 97;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 97;
+ } else {
+ return 97;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Minimum Array Element */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN9_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN8_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN75_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN7_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN6_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN5_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN45_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+#define GEN4_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 170
+#define GEN9_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 170
+#define GEN8_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 170
+#define GEN75_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+#define GEN7_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+#define GEN6_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+#define GEN5_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+#define GEN45_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+#define GEN4_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MinimumArrayElement_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 170;
+ case 9: return 170;
+ case 8: return 170;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 138;
+ } else {
+ return 138;
+ }
+ case 6: return 138;
+ case 5: return 138;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 138;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Mip Tail Start LOD */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_bits 4
+#define GEN9_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_start 218
+#define GEN9_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_start 218
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_MipTailStartLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 218;
+ case 9: return 218;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Render Target View Extent */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 11
+#define GEN9_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 11
+#define GEN8_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 11
+#define GEN75_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 11
+#define GEN7_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 11
+#define GEN6_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 9
+#define GEN5_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 9
+#define GEN45_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 9
+#define GEN4_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 245
+#define GEN9_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 245
+#define GEN8_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 245
+#define GEN75_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 213
+#define GEN7_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 213
+#define GEN6_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 129
+#define GEN5_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 129
+#define GEN45_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 129
+#define GEN4_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start 129
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_RenderTargetViewExtent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 245;
+ case 9: return 245;
+ case 8: return 245;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 213;
+ } else {
+ return 213;
+ }
+ case 6: return 129;
+ case 5: return 129;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 129;
+ } else {
+ return 129;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Separate Stencil Buffer Enable */
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_bits 1
+#define GEN5_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_start 53
+#define GEN5_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SeparateStencilBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 53;
+ case 5: return 53;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Software Tiled Rendering Mode */
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits 2
+#define GEN5_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits 2
+#define GEN45_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits 2
+#define GEN4_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start 55
+#define GEN5_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start 55
+#define GEN45_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start 55
+#define GEN4_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SoftwareTiledRenderingMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 55;
+ case 5: return 55;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 55;
+ } else {
+ return 55;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Stencil Write Enable */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits 1
+#define GEN9_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits 1
+#define GEN8_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits 1
+#define GEN75_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits 1
+#define GEN7_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start 59
+#define GEN9_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start 59
+#define GEN8_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start 59
+#define GEN75_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start 59
+#define GEN7_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_StencilWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 59;
+ } else {
+ return 59;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Surface Base Address */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Surface Format */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 50;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Surface Pitch */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 18
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 17;
+ case 5: return 17;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 17;
+ } else {
+ return 17;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfacePitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Surface QPitch */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_bits 15
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_bits 15
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_start 224
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_start 224
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Surface Type */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN9_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN8_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN75_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN7_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN6_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN5_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN45_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+#define GEN4_3DSTATE_DEPTH_BUFFER_SurfaceType_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_SurfaceType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 61;
+ } else {
+ return 61;
+ }
+ case 6: return 61;
+ case 5: return 61;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 61;
+ } else {
+ return 61;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Tile Walk */
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_TileWalk_bits 1
+#define GEN5_3DSTATE_DEPTH_BUFFER_TileWalk_bits 1
+#define GEN45_3DSTATE_DEPTH_BUFFER_TileWalk_bits 1
+#define GEN4_3DSTATE_DEPTH_BUFFER_TileWalk_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TileWalk_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_TileWalk_start 58
+#define GEN5_3DSTATE_DEPTH_BUFFER_TileWalk_start 58
+#define GEN45_3DSTATE_DEPTH_BUFFER_TileWalk_start 58
+#define GEN4_3DSTATE_DEPTH_BUFFER_TileWalk_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TileWalk_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 58;
+ case 5: return 58;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 58;
+ } else {
+ return 58;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Tiled Resource Mode */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_TiledResourceMode_bits 2
+#define GEN9_3DSTATE_DEPTH_BUFFER_TiledResourceMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TiledResourceMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_TiledResourceMode_start 222
+#define GEN9_3DSTATE_DEPTH_BUFFER_TiledResourceMode_start 222
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TiledResourceMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 222;
+ case 9: return 222;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Tiled Surface */
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_TiledSurface_bits 1
+#define GEN5_3DSTATE_DEPTH_BUFFER_TiledSurface_bits 1
+#define GEN45_3DSTATE_DEPTH_BUFFER_TiledSurface_bits 1
+#define GEN4_3DSTATE_DEPTH_BUFFER_TiledSurface_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TiledSurface_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_DEPTH_BUFFER_TiledSurface_start 59
+#define GEN5_3DSTATE_DEPTH_BUFFER_TiledSurface_start 59
+#define GEN45_3DSTATE_DEPTH_BUFFER_TiledSurface_start 59
+#define GEN4_3DSTATE_DEPTH_BUFFER_TiledSurface_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_TiledSurface_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 59;
+ case 5: return 59;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 59;
+ } else {
+ return 59;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_BUFFER::Width */
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Width_bits 14
+#define GEN9_3DSTATE_DEPTH_BUFFER_Width_bits 14
+#define GEN8_3DSTATE_DEPTH_BUFFER_Width_bits 14
+#define GEN75_3DSTATE_DEPTH_BUFFER_Width_bits 14
+#define GEN7_3DSTATE_DEPTH_BUFFER_Width_bits 14
+#define GEN6_3DSTATE_DEPTH_BUFFER_Width_bits 13
+#define GEN5_3DSTATE_DEPTH_BUFFER_Width_bits 13
+#define GEN45_3DSTATE_DEPTH_BUFFER_Width_bits 13
+#define GEN4_3DSTATE_DEPTH_BUFFER_Width_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Width_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 13;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DEPTH_BUFFER_Width_start 132
+#define GEN9_3DSTATE_DEPTH_BUFFER_Width_start 132
+#define GEN8_3DSTATE_DEPTH_BUFFER_Width_start 132
+#define GEN75_3DSTATE_DEPTH_BUFFER_Width_start 100
+#define GEN7_3DSTATE_DEPTH_BUFFER_Width_start 100
+#define GEN6_3DSTATE_DEPTH_BUFFER_Width_start 102
+#define GEN5_3DSTATE_DEPTH_BUFFER_Width_start 102
+#define GEN45_3DSTATE_DEPTH_BUFFER_Width_start 102
+#define GEN4_3DSTATE_DEPTH_BUFFER_Width_start 102
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_BUFFER_Width_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 132;
+ case 9: return 132;
+ case 8: return 132;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 100;
+ } else {
+ return 100;
+ }
+ case 6: return 102;
+ case 5: return 102;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 102;
+ } else {
+ return 102;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 2
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::Command SubType */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_start 27
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::Command Type */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_bits 3
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_start 29
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::DWord Length */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_bits 8
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_start 0
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS::Pointer to DEPTH_STENCIL_STATE */
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits 26
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start 38
+#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DEPTH_STENCIL_STATE_POINTERS_PointertoDEPTH_STENCIL_STATE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_length 4
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Clipped Drawing Rectangle X Max */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Clipped Drawing Rectangle X Min */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleXMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Clipped Drawing Rectangle Y Max */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Clipped Drawing Rectangle Y Min */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_ClippedDrawingRectangleYMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Command SubType */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Command Type */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Core Mode Select */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits 2
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits 2
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits 2
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start 14
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start 14
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start 14
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_CoreModeSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::DWord Length */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Drawing Rectangle Origin X */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DRAWING_RECTANGLE::Drawing Rectangle Origin Y */
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN9_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN8_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN75_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN7_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN6_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN5_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN45_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+#define GEN4_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DRAWING_RECTANGLE_DrawingRectangleOriginY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 112;
+ } else {
+ return 112;
+ }
+ case 6: return 112;
+ case 5: return 112;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 112;
+ } else {
+ return 112;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS */
+
+
+#define GEN10_3DSTATE_DS_length 11
+#define GEN9_3DSTATE_DS_length 11
+#define GEN8_3DSTATE_DS_length 9
+#define GEN75_3DSTATE_DS_length 6
+#define GEN7_3DSTATE_DS_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Accesses UAV */
+
+
+#define GEN10_3DSTATE_DS_AccessesUAV_bits 1
+#define GEN9_3DSTATE_DS_AccessesUAV_bits 1
+#define GEN8_3DSTATE_DS_AccessesUAV_bits 1
+#define GEN75_3DSTATE_DS_AccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_AccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_AccessesUAV_start 110
+#define GEN9_3DSTATE_DS_AccessesUAV_start 110
+#define GEN8_3DSTATE_DS_AccessesUAV_start 110
+#define GEN75_3DSTATE_DS_AccessesUAV_start 78
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_AccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 110;
+ case 9: return 110;
+ case 8: return 110;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 78;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Binding Table Entry Count */
+
+
+#define GEN10_3DSTATE_DS_BindingTableEntryCount_bits 8
+#define GEN9_3DSTATE_DS_BindingTableEntryCount_bits 8
+#define GEN8_3DSTATE_DS_BindingTableEntryCount_bits 8
+#define GEN75_3DSTATE_DS_BindingTableEntryCount_bits 8
+#define GEN7_3DSTATE_DS_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_BindingTableEntryCount_start 114
+#define GEN9_3DSTATE_DS_BindingTableEntryCount_start 114
+#define GEN8_3DSTATE_DS_BindingTableEntryCount_start 114
+#define GEN75_3DSTATE_DS_BindingTableEntryCount_start 82
+#define GEN7_3DSTATE_DS_BindingTableEntryCount_start 82
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 114;
+ case 9: return 114;
+ case 8: return 114;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 82;
+ } else {
+ return 82;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Cache Disable */
+
+
+#define GEN10_3DSTATE_DS_CacheDisable_bits 1
+#define GEN9_3DSTATE_DS_CacheDisable_bits 1
+#define GEN8_3DSTATE_DS_CacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_CacheDisable_start 225
+#define GEN9_3DSTATE_DS_CacheDisable_start 225
+#define GEN8_3DSTATE_DS_CacheDisable_start 225
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 225;
+ case 9: return 225;
+ case 8: return 225;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Command Type */
+
+
+#define GEN10_3DSTATE_DS_CommandType_bits 3
+#define GEN9_3DSTATE_DS_CommandType_bits 3
+#define GEN8_3DSTATE_DS_CommandType_bits 3
+#define GEN75_3DSTATE_DS_CommandType_bits 3
+#define GEN7_3DSTATE_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_CommandType_start 29
+#define GEN9_3DSTATE_DS_CommandType_start 29
+#define GEN8_3DSTATE_DS_CommandType_start 29
+#define GEN75_3DSTATE_DS_CommandType_start 29
+#define GEN7_3DSTATE_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Compute W Coordinate Enable */
+
+
+#define GEN10_3DSTATE_DS_ComputeWCoordinateEnable_bits 1
+#define GEN9_3DSTATE_DS_ComputeWCoordinateEnable_bits 1
+#define GEN8_3DSTATE_DS_ComputeWCoordinateEnable_bits 1
+#define GEN75_3DSTATE_DS_ComputeWCoordinateEnable_bits 1
+#define GEN7_3DSTATE_DS_ComputeWCoordinateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ComputeWCoordinateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_ComputeWCoordinateEnable_start 226
+#define GEN9_3DSTATE_DS_ComputeWCoordinateEnable_start 226
+#define GEN8_3DSTATE_DS_ComputeWCoordinateEnable_start 226
+#define GEN75_3DSTATE_DS_ComputeWCoordinateEnable_start 162
+#define GEN7_3DSTATE_DS_ComputeWCoordinateEnable_start 162
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ComputeWCoordinateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 226;
+ case 9: return 226;
+ case 8: return 226;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 162;
+ } else {
+ return 162;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::DS Cache Disable */
+
+
+#define GEN75_3DSTATE_DS_DSCacheDisable_bits 1
+#define GEN7_3DSTATE_DS_DSCacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DSCacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_DS_DSCacheDisable_start 161
+#define GEN7_3DSTATE_DS_DSCacheDisable_start 161
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DSCacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 161;
+ } else {
+ return 161;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::DUAL_PATCH Kernel Start Pointer */
+
+
+#define GEN10_3DSTATE_DS_DUAL_PATCHKernelStartPointer_bits 58
+#define GEN9_3DSTATE_DS_DUAL_PATCHKernelStartPointer_bits 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DUAL_PATCHKernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_DUAL_PATCHKernelStartPointer_start 294
+#define GEN9_3DSTATE_DS_DUAL_PATCHKernelStartPointer_start 294
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DUAL_PATCHKernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 294;
+ case 9: return 294;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_DWordLength_start 0
+#define GEN9_3DSTATE_DS_DWordLength_start 0
+#define GEN8_3DSTATE_DS_DWordLength_start 0
+#define GEN75_3DSTATE_DS_DWordLength_start 0
+#define GEN7_3DSTATE_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN10_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN9_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN8_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN75_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN7_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN9_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN8_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN75_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start 148
+#define GEN7_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start 148
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 212;
+ case 9: return 212;
+ case 8: return 212;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 148;
+ } else {
+ return 148;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Dispatch Mode */
+
+
+#define GEN10_3DSTATE_DS_DispatchMode_bits 2
+#define GEN9_3DSTATE_DS_DispatchMode_bits 2
+#define GEN8_3DSTATE_DS_DispatchMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DispatchMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_DispatchMode_start 227
+#define GEN9_3DSTATE_DS_DispatchMode_start 227
+#define GEN8_3DSTATE_DS_DispatchMode_start 227
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_DispatchMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 227;
+ case 9: return 227;
+ case 8: return 227;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Enable */
+
+
+#define GEN10_3DSTATE_DS_Enable_bits 1
+#define GEN9_3DSTATE_DS_Enable_bits 1
+#define GEN8_3DSTATE_DS_Enable_bits 1
+#define GEN75_3DSTATE_DS_Enable_bits 1
+#define GEN7_3DSTATE_DS_Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_Enable_start 224
+#define GEN9_3DSTATE_DS_Enable_start 224
+#define GEN8_3DSTATE_DS_Enable_start 224
+#define GEN75_3DSTATE_DS_Enable_start 160
+#define GEN7_3DSTATE_DS_Enable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Floating Point Mode */
+
+
+#define GEN10_3DSTATE_DS_FloatingPointMode_bits 1
+#define GEN9_3DSTATE_DS_FloatingPointMode_bits 1
+#define GEN8_3DSTATE_DS_FloatingPointMode_bits 1
+#define GEN75_3DSTATE_DS_FloatingPointMode_bits 1
+#define GEN7_3DSTATE_DS_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_FloatingPointMode_start 112
+#define GEN9_3DSTATE_DS_FloatingPointMode_start 112
+#define GEN8_3DSTATE_DS_FloatingPointMode_start 112
+#define GEN75_3DSTATE_DS_FloatingPointMode_start 80
+#define GEN7_3DSTATE_DS_FloatingPointMode_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Illegal Opcode Exception Enable */
+
+
+#define GEN10_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_IllegalOpcodeExceptionEnable_start 109
+#define GEN9_3DSTATE_DS_IllegalOpcodeExceptionEnable_start 109
+#define GEN8_3DSTATE_DS_IllegalOpcodeExceptionEnable_start 109
+#define GEN75_3DSTATE_DS_IllegalOpcodeExceptionEnable_start 77
+#define GEN7_3DSTATE_DS_IllegalOpcodeExceptionEnable_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Kernel Start Pointer */
+
+
+#define GEN10_3DSTATE_DS_KernelStartPointer_bits 58
+#define GEN9_3DSTATE_DS_KernelStartPointer_bits 58
+#define GEN8_3DSTATE_DS_KernelStartPointer_bits 58
+#define GEN75_3DSTATE_DS_KernelStartPointer_bits 26
+#define GEN7_3DSTATE_DS_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_KernelStartPointer_start 38
+#define GEN9_3DSTATE_DS_KernelStartPointer_start 38
+#define GEN8_3DSTATE_DS_KernelStartPointer_start 38
+#define GEN75_3DSTATE_DS_KernelStartPointer_start 38
+#define GEN7_3DSTATE_DS_KernelStartPointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Maximum Number of Threads */
+
+
+#define GEN10_3DSTATE_DS_MaximumNumberofThreads_bits 10
+#define GEN9_3DSTATE_DS_MaximumNumberofThreads_bits 9
+#define GEN8_3DSTATE_DS_MaximumNumberofThreads_bits 9
+#define GEN75_3DSTATE_DS_MaximumNumberofThreads_bits 9
+#define GEN7_3DSTATE_DS_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_MaximumNumberofThreads_start 245
+#define GEN9_3DSTATE_DS_MaximumNumberofThreads_start 245
+#define GEN8_3DSTATE_DS_MaximumNumberofThreads_start 245
+#define GEN75_3DSTATE_DS_MaximumNumberofThreads_start 181
+#define GEN7_3DSTATE_DS_MaximumNumberofThreads_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 245;
+ case 9: return 245;
+ case 8: return 245;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 181;
+ } else {
+ return 185;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Patch URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_DS_PatchURBEntryReadLength_bits 7
+#define GEN9_3DSTATE_DS_PatchURBEntryReadLength_bits 7
+#define GEN8_3DSTATE_DS_PatchURBEntryReadLength_bits 7
+#define GEN75_3DSTATE_DS_PatchURBEntryReadLength_bits 7
+#define GEN7_3DSTATE_DS_PatchURBEntryReadLength_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PatchURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_PatchURBEntryReadLength_start 203
+#define GEN9_3DSTATE_DS_PatchURBEntryReadLength_start 203
+#define GEN8_3DSTATE_DS_PatchURBEntryReadLength_start 203
+#define GEN75_3DSTATE_DS_PatchURBEntryReadLength_start 139
+#define GEN7_3DSTATE_DS_PatchURBEntryReadLength_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PatchURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 203;
+ case 9: return 203;
+ case 8: return 203;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 139;
+ } else {
+ return 139;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Patch URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_DS_PatchURBEntryReadOffset_bits 6
+#define GEN9_3DSTATE_DS_PatchURBEntryReadOffset_bits 6
+#define GEN8_3DSTATE_DS_PatchURBEntryReadOffset_bits 6
+#define GEN75_3DSTATE_DS_PatchURBEntryReadOffset_bits 6
+#define GEN7_3DSTATE_DS_PatchURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PatchURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_PatchURBEntryReadOffset_start 196
+#define GEN9_3DSTATE_DS_PatchURBEntryReadOffset_start 196
+#define GEN8_3DSTATE_DS_PatchURBEntryReadOffset_start 196
+#define GEN75_3DSTATE_DS_PatchURBEntryReadOffset_start 132
+#define GEN7_3DSTATE_DS_PatchURBEntryReadOffset_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PatchURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 196;
+ case 9: return 196;
+ case 8: return 196;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 132;
+ } else {
+ return 132;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Per-Thread Scratch Space */
+
+
+#define GEN10_3DSTATE_DS_PerThreadScratchSpace_bits 4
+#define GEN9_3DSTATE_DS_PerThreadScratchSpace_bits 4
+#define GEN8_3DSTATE_DS_PerThreadScratchSpace_bits 4
+#define GEN75_3DSTATE_DS_PerThreadScratchSpace_bits 4
+#define GEN7_3DSTATE_DS_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_PerThreadScratchSpace_start 128
+#define GEN9_3DSTATE_DS_PerThreadScratchSpace_start 128
+#define GEN8_3DSTATE_DS_PerThreadScratchSpace_start 128
+#define GEN75_3DSTATE_DS_PerThreadScratchSpace_start 96
+#define GEN7_3DSTATE_DS_PerThreadScratchSpace_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Sampler Count */
+
+
+#define GEN10_3DSTATE_DS_SamplerCount_bits 3
+#define GEN9_3DSTATE_DS_SamplerCount_bits 3
+#define GEN8_3DSTATE_DS_SamplerCount_bits 3
+#define GEN75_3DSTATE_DS_SamplerCount_bits 3
+#define GEN7_3DSTATE_DS_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_SamplerCount_start 123
+#define GEN9_3DSTATE_DS_SamplerCount_start 123
+#define GEN8_3DSTATE_DS_SamplerCount_start 123
+#define GEN75_3DSTATE_DS_SamplerCount_start 91
+#define GEN7_3DSTATE_DS_SamplerCount_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 123;
+ case 9: return 123;
+ case 8: return 123;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Scratch Space Base Pointer */
+
+
+#define GEN10_3DSTATE_DS_ScratchSpaceBasePointer_bits 54
+#define GEN9_3DSTATE_DS_ScratchSpaceBasePointer_bits 54
+#define GEN8_3DSTATE_DS_ScratchSpaceBasePointer_bits 54
+#define GEN75_3DSTATE_DS_ScratchSpaceBasePointer_bits 22
+#define GEN7_3DSTATE_DS_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_ScratchSpaceBasePointer_start 138
+#define GEN9_3DSTATE_DS_ScratchSpaceBasePointer_start 138
+#define GEN8_3DSTATE_DS_ScratchSpaceBasePointer_start 138
+#define GEN75_3DSTATE_DS_ScratchSpaceBasePointer_start 106
+#define GEN7_3DSTATE_DS_ScratchSpaceBasePointer_start 106
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 138;
+ case 9: return 138;
+ case 8: return 138;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 106;
+ } else {
+ return 106;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Single Domain Point Dispatch */
+
+
+#define GEN8_3DSTATE_DS_SingleDomainPointDispatch_bits 1
+#define GEN75_3DSTATE_DS_SingleDomainPointDispatch_bits 1
+#define GEN7_3DSTATE_DS_SingleDomainPointDispatch_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SingleDomainPointDispatch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_3DSTATE_DS_SingleDomainPointDispatch_start 127
+#define GEN75_3DSTATE_DS_SingleDomainPointDispatch_start 95
+#define GEN7_3DSTATE_DS_SingleDomainPointDispatch_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SingleDomainPointDispatch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 127;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Software Exception Enable */
+
+
+#define GEN10_3DSTATE_DS_SoftwareExceptionEnable_bits 1
+#define GEN9_3DSTATE_DS_SoftwareExceptionEnable_bits 1
+#define GEN8_3DSTATE_DS_SoftwareExceptionEnable_bits 1
+#define GEN75_3DSTATE_DS_SoftwareExceptionEnable_bits 1
+#define GEN7_3DSTATE_DS_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_SoftwareExceptionEnable_start 103
+#define GEN9_3DSTATE_DS_SoftwareExceptionEnable_start 103
+#define GEN8_3DSTATE_DS_SoftwareExceptionEnable_start 103
+#define GEN75_3DSTATE_DS_SoftwareExceptionEnable_start 71
+#define GEN7_3DSTATE_DS_SoftwareExceptionEnable_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 103;
+ case 9: return 103;
+ case 8: return 103;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 71;
+ } else {
+ return 71;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Statistics Enable */
+
+
+#define GEN10_3DSTATE_DS_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_DS_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_DS_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_DS_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_DS_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_StatisticsEnable_start 234
+#define GEN9_3DSTATE_DS_StatisticsEnable_start 234
+#define GEN8_3DSTATE_DS_StatisticsEnable_start 234
+#define GEN75_3DSTATE_DS_StatisticsEnable_start 170
+#define GEN7_3DSTATE_DS_StatisticsEnable_start 170
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 234;
+ case 9: return 234;
+ case 8: return 234;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 170;
+ } else {
+ return 170;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Thread Dispatch Priority */
+
+
+#define GEN10_3DSTATE_DS_ThreadDispatchPriority_bits 1
+#define GEN9_3DSTATE_DS_ThreadDispatchPriority_bits 1
+#define GEN8_3DSTATE_DS_ThreadDispatchPriority_bits 1
+#define GEN75_3DSTATE_DS_ThreadDispatchPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_ThreadDispatchPriority_start 113
+#define GEN9_3DSTATE_DS_ThreadDispatchPriority_start 113
+#define GEN8_3DSTATE_DS_ThreadDispatchPriority_start 113
+#define GEN75_3DSTATE_DS_ThreadDispatchPriority_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::User Clip Distance Clip Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_start 264
+#define GEN9_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_start 264
+#define GEN8_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_start 264
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 264;
+ case 9: return 264;
+ case 8: return 264;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::User Clip Distance Cull Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_start 256
+#define GEN9_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_start 256
+#define GEN8_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Vector Mask Enable */
+
+
+#define GEN10_3DSTATE_DS_VectorMaskEnable_bits 1
+#define GEN9_3DSTATE_DS_VectorMaskEnable_bits 1
+#define GEN8_3DSTATE_DS_VectorMaskEnable_bits 1
+#define GEN75_3DSTATE_DS_VectorMaskEnable_bits 1
+#define GEN7_3DSTATE_DS_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_VectorMaskEnable_start 126
+#define GEN9_3DSTATE_DS_VectorMaskEnable_start 126
+#define GEN8_3DSTATE_DS_VectorMaskEnable_start 126
+#define GEN75_3DSTATE_DS_VectorMaskEnable_start 94
+#define GEN7_3DSTATE_DS_VectorMaskEnable_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 126;
+ case 9: return 126;
+ case 8: return 126;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Vertex URB Entry Output Length */
+
+
+#define GEN10_3DSTATE_DS_VertexURBEntryOutputLength_bits 5
+#define GEN9_3DSTATE_DS_VertexURBEntryOutputLength_bits 5
+#define GEN8_3DSTATE_DS_VertexURBEntryOutputLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_VertexURBEntryOutputLength_start 272
+#define GEN9_3DSTATE_DS_VertexURBEntryOutputLength_start 272
+#define GEN8_3DSTATE_DS_VertexURBEntryOutputLength_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_DS::Vertex URB Entry Output Read Offset */
+
+
+#define GEN10_3DSTATE_DS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN9_3DSTATE_DS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN8_3DSTATE_DS_VertexURBEntryOutputReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_DS_VertexURBEntryOutputReadOffset_start 277
+#define GEN9_3DSTATE_DS_VertexURBEntryOutputReadOffset_start 277
+#define GEN8_3DSTATE_DS_VertexURBEntryOutputReadOffset_start 277
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_DS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 277;
+ case 9: return 277;
+ case 8: return 277;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS */
+
+
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Constant Buffer Binding Table Block */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits 4
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits 4
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits 4
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start 44
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start 44
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start 44
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Constant Buffer Dx9 Generate Stall */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_start 69
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_start 69
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Constant Buffer Valid */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start 48
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start 48
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start 48
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Entry_0 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_Entry_0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_Entry_0_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_Entry_0_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_Entry_0_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_Entry_0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_Entry_0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Entry_1 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_Entry_1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_Entry_1_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_Entry_1_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_Entry_1_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_Entry_1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_Entry_1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Gather Buffer Offset */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits 17
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits 17
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits 17
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start 70
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start 70
+#define GEN8_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start 70
+#define GEN75_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::On-Die Table */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_start 67
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_OnDieTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_DS::Update Gather Table Only */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_start 33
+#define GEN9_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_DS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS */
+
+
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Constant Buffer Binding Table Block */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits 4
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits 4
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits 4
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start 44
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start 44
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start 44
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Constant Buffer Dx9 Generate Stall */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_start 69
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_start 69
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Constant Buffer Valid */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start 48
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start 48
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start 48
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Entry_0 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_Entry_0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_Entry_0_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_Entry_0_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_Entry_0_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_Entry_0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_Entry_0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Entry_1 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_Entry_1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_Entry_1_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_Entry_1_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_Entry_1_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_Entry_1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_Entry_1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Gather Buffer Offset */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits 17
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits 17
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits 17
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start 70
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start 70
+#define GEN8_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start 70
+#define GEN75_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::On-Die Table */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_start 67
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_OnDieTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_GS::Update Gather Table Only */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_start 33
+#define GEN9_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_GS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS */
+
+
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Constant Buffer Binding Table Block */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits 4
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits 4
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits 4
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start 44
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start 44
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start 44
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Constant Buffer Dx9 Generate Stall */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_start 69
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_start 69
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Constant Buffer Valid */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start 48
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start 48
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start 48
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Entry_0 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_Entry_0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_Entry_0_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_Entry_0_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_Entry_0_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_Entry_0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_Entry_0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Entry_1 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_Entry_1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_Entry_1_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_Entry_1_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_Entry_1_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_Entry_1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_Entry_1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Gather Buffer Offset */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits 17
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits 17
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits 17
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start 70
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start 70
+#define GEN8_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start 70
+#define GEN75_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::On-Die Table */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_start 67
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_OnDieTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_HS::Update Gather Table Only */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_start 33
+#define GEN9_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_HS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS */
+
+
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Constant Buffer Binding Table Block */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits 4
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits 4
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits 4
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start 44
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start 44
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start 44
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Constant Buffer Dx9 Enable */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits 1
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start 68
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start 68
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start 68
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 68;
+ case 9: return 68;
+ case 8: return 68;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 68;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Constant Buffer Dx9 Generate Stall */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_start 69
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_start 69
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Constant Buffer Valid */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start 48
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start 48
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start 48
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::DX9 On-Die Register Read Enable */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_start 32
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_DX9OnDieRegisterReadEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Entry_0 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_Entry_0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_Entry_0_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_Entry_0_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_Entry_0_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_Entry_0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_Entry_0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Entry_1 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_Entry_1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_Entry_1_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_Entry_1_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_Entry_1_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_Entry_1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_Entry_1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Gather Buffer Offset */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits 17
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits 17
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits 17
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start 70
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start 70
+#define GEN8_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start 70
+#define GEN75_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::On-Die Table */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_start 67
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_OnDieTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_PS::Update Gather Table Only */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_start 33
+#define GEN9_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_PS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS */
+
+
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Constant Buffer Binding Table Block */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits 4
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits 4
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits 4
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start 44
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start 44
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start 44
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferBindingTableBlock_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Constant Buffer Dx9 Enable */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits 1
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start 68
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start 68
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start 68
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 68;
+ case 9: return 68;
+ case 8: return 68;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 68;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Constant Buffer Dx9 Generate Stall */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_bits 1
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_start 69
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_start 69
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferDx9GenerateStall_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Constant Buffer Valid */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start 48
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start 48
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start 48
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_ConstantBufferValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::DX9 On-Die Register Read Enable */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_start 32
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_DX9OnDieRegisterReadEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Entry_0 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_Entry_0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_Entry_0_start 0
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_Entry_0_start 0
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_Entry_0_start 0
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_Entry_0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_Entry_0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Entry_1 */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_Entry_1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_Entry_1_start 16
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_Entry_1_start 16
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_Entry_1_start 16
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_Entry_1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_Entry_1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Gather Buffer Offset */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits 17
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits 17
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits 17
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start 70
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start 70
+#define GEN8_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start 70
+#define GEN75_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_GatherBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::On-Die Table */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_start 67
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_OnDieTable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_CONSTANT_VS::Update Gather Table Only */
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_bits 1
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_start 33
+#define GEN9_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_CONSTANT_VS_UpdateGatherTableOnly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_length 4
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_length 4
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_length 4
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Command SubType */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits 2
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits 2
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits 2
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start 27
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start 27
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start 27
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Command Type */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_CommandType_bits 3
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_CommandType_bits 3
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_CommandType_bits 3
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_CommandType_start 29
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_CommandType_start 29
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_CommandType_start 29
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::DWord Length */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits 8
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits 8
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits 8
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_DWordLength_start 0
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_DWordLength_start 0
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_DWordLength_start 0
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Gather Pool Base Address */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits 52
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits 52
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits 52
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start 44
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start 44
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start 44
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Gather Pool Buffer Size */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_bits 20
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_bits 20
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_start 108
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_start 108
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 108;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Gather Pool Enable */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits 1
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits 1
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits 1
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start 43
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start 43
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start 43
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Gather Pool Upper Bound */
+
+
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_GatherPoolUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GATHER_POOL_ALLOC::Memory Object Control State */
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_bits 7
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_bits 7
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_bits 7
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_start 32
+#define GEN9_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_start 32
+#define GEN8_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_start 32
+#define GEN75_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GATHER_POOL_ALLOC_MemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length 2
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length 2
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::3D Command Opcode */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::3D Command Sub Opcode */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::Command SubType */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_bits 2
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_bits 2
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_start 27
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_start 27
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::Command Type */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_bits 3
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_bits 3
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_start 29
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_start 29
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::DWord Length */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_bits 8
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_bits 8
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_start 0
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_start 0
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP::Global Depth Offset Clamp */
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_bits 32
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_bits 32
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_start 32
+#define GEN45_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_start 32
+#define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS */
+
+
+#define GEN10_3DSTATE_GS_length 10
+#define GEN9_3DSTATE_GS_length 10
+#define GEN8_3DSTATE_GS_length 10
+#define GEN75_3DSTATE_GS_length 7
+#define GEN7_3DSTATE_GS_length 7
+#define GEN6_3DSTATE_GS_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_GS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_GS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_GS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_GS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Accesses UAV */
+
+
+#define GEN10_3DSTATE_GS_AccessesUAV_bits 1
+#define GEN9_3DSTATE_GS_AccessesUAV_bits 1
+#define GEN8_3DSTATE_GS_AccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_AccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_AccessesUAV_start 108
+#define GEN9_3DSTATE_GS_AccessesUAV_start 108
+#define GEN8_3DSTATE_GS_AccessesUAV_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_AccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 108;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Binding Table Entry Count */
+
+
+#define GEN10_3DSTATE_GS_BindingTableEntryCount_bits 8
+#define GEN9_3DSTATE_GS_BindingTableEntryCount_bits 8
+#define GEN8_3DSTATE_GS_BindingTableEntryCount_bits 8
+#define GEN75_3DSTATE_GS_BindingTableEntryCount_bits 8
+#define GEN7_3DSTATE_GS_BindingTableEntryCount_bits 8
+#define GEN6_3DSTATE_GS_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_BindingTableEntryCount_start 114
+#define GEN9_3DSTATE_GS_BindingTableEntryCount_start 114
+#define GEN8_3DSTATE_GS_BindingTableEntryCount_start 114
+#define GEN75_3DSTATE_GS_BindingTableEntryCount_start 82
+#define GEN7_3DSTATE_GS_BindingTableEntryCount_start 82
+#define GEN6_3DSTATE_GS_BindingTableEntryCount_start 82
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 114;
+ case 9: return 114;
+ case 8: return 114;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 82;
+ } else {
+ return 82;
+ }
+ case 6: return 82;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_GS_CommandSubType_bits 2
+#define GEN6_3DSTATE_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_GS_CommandSubType_start 27
+#define GEN6_3DSTATE_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Command Type */
+
+
+#define GEN10_3DSTATE_GS_CommandType_bits 3
+#define GEN9_3DSTATE_GS_CommandType_bits 3
+#define GEN8_3DSTATE_GS_CommandType_bits 3
+#define GEN75_3DSTATE_GS_CommandType_bits 3
+#define GEN7_3DSTATE_GS_CommandType_bits 3
+#define GEN6_3DSTATE_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_CommandType_start 29
+#define GEN9_3DSTATE_GS_CommandType_start 29
+#define GEN8_3DSTATE_GS_CommandType_start 29
+#define GEN75_3DSTATE_GS_CommandType_start 29
+#define GEN7_3DSTATE_GS_CommandType_start 29
+#define GEN6_3DSTATE_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Control Data Format */
+
+
+#define GEN10_3DSTATE_GS_ControlDataFormat_bits 1
+#define GEN9_3DSTATE_GS_ControlDataFormat_bits 1
+#define GEN8_3DSTATE_GS_ControlDataFormat_bits 1
+#define GEN75_3DSTATE_GS_ControlDataFormat_bits 1
+#define GEN7_3DSTATE_GS_ControlDataFormat_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ControlDataFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ControlDataFormat_start 287
+#define GEN9_3DSTATE_GS_ControlDataFormat_start 287
+#define GEN8_3DSTATE_GS_ControlDataFormat_start 287
+#define GEN75_3DSTATE_GS_ControlDataFormat_start 223
+#define GEN7_3DSTATE_GS_ControlDataFormat_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ControlDataFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 287;
+ case 9: return 287;
+ case 8: return 287;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 223;
+ } else {
+ return 184;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Control Data Header Size */
+
+
+#define GEN10_3DSTATE_GS_ControlDataHeaderSize_bits 4
+#define GEN9_3DSTATE_GS_ControlDataHeaderSize_bits 4
+#define GEN8_3DSTATE_GS_ControlDataHeaderSize_bits 4
+#define GEN75_3DSTATE_GS_ControlDataHeaderSize_bits 4
+#define GEN7_3DSTATE_GS_ControlDataHeaderSize_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ControlDataHeaderSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ControlDataHeaderSize_start 244
+#define GEN9_3DSTATE_GS_ControlDataHeaderSize_start 244
+#define GEN8_3DSTATE_GS_ControlDataHeaderSize_start 244
+#define GEN75_3DSTATE_GS_ControlDataHeaderSize_start 180
+#define GEN7_3DSTATE_GS_ControlDataHeaderSize_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ControlDataHeaderSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 244;
+ case 9: return 244;
+ case 8: return 244;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 180;
+ } else {
+ return 180;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_GS_DWordLength_bits 8
+#define GEN6_3DSTATE_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DWordLength_start 0
+#define GEN9_3DSTATE_GS_DWordLength_start 0
+#define GEN8_3DSTATE_GS_DWordLength_start 0
+#define GEN75_3DSTATE_GS_DWordLength_start 0
+#define GEN7_3DSTATE_GS_DWordLength_start 0
+#define GEN6_3DSTATE_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Default Stream Id */
+
+
+#define GEN10_3DSTATE_GS_DefaultStreamId_bits 2
+#define GEN9_3DSTATE_GS_DefaultStreamId_bits 2
+#define GEN8_3DSTATE_GS_DefaultStreamId_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DefaultStreamId_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DefaultStreamId_start 237
+#define GEN9_3DSTATE_GS_DefaultStreamId_start 237
+#define GEN8_3DSTATE_GS_DefaultStreamId_start 237
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DefaultStreamId_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 237;
+ case 9: return 237;
+ case 8: return 237;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Default StreamID */
+
+
+#define GEN75_3DSTATE_GS_DefaultStreamID_bits 2
+#define GEN7_3DSTATE_GS_DefaultStreamID_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DefaultStreamID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GS_DefaultStreamID_start 173
+#define GEN7_3DSTATE_GS_DefaultStreamID_start 173
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DefaultStreamID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 173;
+ } else {
+ return 173;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Discard Adjacency */
+
+
+#define GEN10_3DSTATE_GS_DiscardAdjacency_bits 1
+#define GEN9_3DSTATE_GS_DiscardAdjacency_bits 1
+#define GEN8_3DSTATE_GS_DiscardAdjacency_bits 1
+#define GEN75_3DSTATE_GS_DiscardAdjacency_bits 1
+#define GEN7_3DSTATE_GS_DiscardAdjacency_bits 1
+#define GEN6_3DSTATE_GS_DiscardAdjacency_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DiscardAdjacency_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DiscardAdjacency_start 225
+#define GEN9_3DSTATE_GS_DiscardAdjacency_start 225
+#define GEN8_3DSTATE_GS_DiscardAdjacency_start 225
+#define GEN75_3DSTATE_GS_DiscardAdjacency_start 161
+#define GEN7_3DSTATE_GS_DiscardAdjacency_start 161
+#define GEN6_3DSTATE_GS_DiscardAdjacency_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DiscardAdjacency_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 225;
+ case 9: return 225;
+ case 8: return 225;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 161;
+ } else {
+ return 161;
+ }
+ case 6: return 221;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN10_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN9_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN8_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN75_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN7_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN6_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 192
+#define GEN9_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 192
+#define GEN8_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 192
+#define GEN75_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 128
+#define GEN7_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 128
+#define GEN6_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Dispatch GRF Start Register For URB Data [5:4] */
+
+
+#define GEN10_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_bits 2
+#define GEN9_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_start 221
+#define GEN9_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchGRFStartRegisterForURBData54_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 221;
+ case 9: return 221;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Dispatch Mode */
+
+
+#define GEN10_3DSTATE_GS_DispatchMode_bits 2
+#define GEN9_3DSTATE_GS_DispatchMode_bits 2
+#define GEN8_3DSTATE_GS_DispatchMode_bits 2
+#define GEN75_3DSTATE_GS_DispatchMode_bits 2
+#define GEN7_3DSTATE_GS_DispatchMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_DispatchMode_start 235
+#define GEN9_3DSTATE_GS_DispatchMode_start 235
+#define GEN8_3DSTATE_GS_DispatchMode_start 235
+#define GEN75_3DSTATE_GS_DispatchMode_start 171
+#define GEN7_3DSTATE_GS_DispatchMode_start 171
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_DispatchMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 235;
+ case 9: return 235;
+ case 8: return 235;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 171;
+ } else {
+ return 171;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Enable */
+
+
+#define GEN10_3DSTATE_GS_Enable_bits 1
+#define GEN9_3DSTATE_GS_Enable_bits 1
+#define GEN8_3DSTATE_GS_Enable_bits 1
+#define GEN75_3DSTATE_GS_Enable_bits 1
+#define GEN7_3DSTATE_GS_Enable_bits 1
+#define GEN6_3DSTATE_GS_Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_Enable_start 224
+#define GEN9_3DSTATE_GS_Enable_start 224
+#define GEN8_3DSTATE_GS_Enable_start 224
+#define GEN75_3DSTATE_GS_Enable_start 160
+#define GEN7_3DSTATE_GS_Enable_start 160
+#define GEN6_3DSTATE_GS_Enable_start 207
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 207;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Expected Vertex Count */
+
+
+#define GEN10_3DSTATE_GS_ExpectedVertexCount_bits 6
+#define GEN9_3DSTATE_GS_ExpectedVertexCount_bits 6
+#define GEN8_3DSTATE_GS_ExpectedVertexCount_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ExpectedVertexCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ExpectedVertexCount_start 96
+#define GEN9_3DSTATE_GS_ExpectedVertexCount_start 96
+#define GEN8_3DSTATE_GS_ExpectedVertexCount_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ExpectedVertexCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Floating Point Mode */
+
+
+#define GEN10_3DSTATE_GS_FloatingPointMode_bits 1
+#define GEN9_3DSTATE_GS_FloatingPointMode_bits 1
+#define GEN8_3DSTATE_GS_FloatingPointMode_bits 1
+#define GEN75_3DSTATE_GS_FloatingPointMode_bits 1
+#define GEN7_3DSTATE_GS_FloatingPointMode_bits 1
+#define GEN6_3DSTATE_GS_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_FloatingPointMode_start 112
+#define GEN9_3DSTATE_GS_FloatingPointMode_start 112
+#define GEN8_3DSTATE_GS_FloatingPointMode_start 112
+#define GEN75_3DSTATE_GS_FloatingPointMode_start 80
+#define GEN7_3DSTATE_GS_FloatingPointMode_start 80
+#define GEN6_3DSTATE_GS_FloatingPointMode_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::GS Invocations Increment Value */
+
+
+#define GEN75_3DSTATE_GS_GSInvocationsIncrementValue_bits 5
+#define GEN7_3DSTATE_GS_GSInvocationsIncrementValue_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_GSInvocationsIncrementValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GS_GSInvocationsIncrementValue_start 165
+#define GEN7_3DSTATE_GS_GSInvocationsIncrementValue_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_GSInvocationsIncrementValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 165;
+ } else {
+ return 165;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::GS accesses UAV */
+
+
+#define GEN75_3DSTATE_GS_GSaccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_GSaccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GS_GSaccessesUAV_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_GSaccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Hint */
+
+
+#define GEN10_3DSTATE_GS_Hint_bits 1
+#define GEN9_3DSTATE_GS_Hint_bits 1
+#define GEN8_3DSTATE_GS_Hint_bits 1
+#define GEN75_3DSTATE_GS_Hint_bits 1
+#define GEN7_3DSTATE_GS_Hint_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_Hint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_Hint_start 227
+#define GEN9_3DSTATE_GS_Hint_start 227
+#define GEN8_3DSTATE_GS_Hint_start 227
+#define GEN75_3DSTATE_GS_Hint_start 163
+#define GEN7_3DSTATE_GS_Hint_start 163
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_Hint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 227;
+ case 9: return 227;
+ case 8: return 227;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 163;
+ } else {
+ return 163;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Illegal Opcode Exception Enable */
+
+
+#define GEN10_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN6_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 109
+#define GEN9_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 109
+#define GEN8_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 109
+#define GEN75_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 77
+#define GEN7_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 77
+#define GEN6_3DSTATE_GS_IllegalOpcodeExceptionEnable_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 77;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Include Primitive ID */
+
+
+#define GEN10_3DSTATE_GS_IncludePrimitiveID_bits 1
+#define GEN9_3DSTATE_GS_IncludePrimitiveID_bits 1
+#define GEN8_3DSTATE_GS_IncludePrimitiveID_bits 1
+#define GEN75_3DSTATE_GS_IncludePrimitiveID_bits 1
+#define GEN7_3DSTATE_GS_IncludePrimitiveID_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IncludePrimitiveID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_IncludePrimitiveID_start 228
+#define GEN9_3DSTATE_GS_IncludePrimitiveID_start 228
+#define GEN8_3DSTATE_GS_IncludePrimitiveID_start 228
+#define GEN75_3DSTATE_GS_IncludePrimitiveID_start 164
+#define GEN7_3DSTATE_GS_IncludePrimitiveID_start 164
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IncludePrimitiveID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 228;
+ case 9: return 228;
+ case 8: return 228;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 164;
+ } else {
+ return 164;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Include Vertex Handles */
+
+
+#define GEN10_3DSTATE_GS_IncludeVertexHandles_bits 1
+#define GEN9_3DSTATE_GS_IncludeVertexHandles_bits 1
+#define GEN8_3DSTATE_GS_IncludeVertexHandles_bits 1
+#define GEN75_3DSTATE_GS_IncludeVertexHandles_bits 1
+#define GEN7_3DSTATE_GS_IncludeVertexHandles_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IncludeVertexHandles_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_IncludeVertexHandles_start 202
+#define GEN9_3DSTATE_GS_IncludeVertexHandles_start 202
+#define GEN8_3DSTATE_GS_IncludeVertexHandles_start 202
+#define GEN75_3DSTATE_GS_IncludeVertexHandles_start 138
+#define GEN7_3DSTATE_GS_IncludeVertexHandles_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_IncludeVertexHandles_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 202;
+ case 9: return 202;
+ case 8: return 202;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 138;
+ } else {
+ return 138;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Instance Control */
+
+
+#define GEN10_3DSTATE_GS_InstanceControl_bits 5
+#define GEN9_3DSTATE_GS_InstanceControl_bits 5
+#define GEN8_3DSTATE_GS_InstanceControl_bits 5
+#define GEN75_3DSTATE_GS_InstanceControl_bits 5
+#define GEN7_3DSTATE_GS_InstanceControl_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_InstanceControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_InstanceControl_start 239
+#define GEN9_3DSTATE_GS_InstanceControl_start 239
+#define GEN8_3DSTATE_GS_InstanceControl_start 239
+#define GEN75_3DSTATE_GS_InstanceControl_start 175
+#define GEN7_3DSTATE_GS_InstanceControl_start 175
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_InstanceControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 239;
+ case 9: return 239;
+ case 8: return 239;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 175;
+ } else {
+ return 175;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Invocations Increment Value */
+
+
+#define GEN10_3DSTATE_GS_InvocationsIncrementValue_bits 5
+#define GEN9_3DSTATE_GS_InvocationsIncrementValue_bits 5
+#define GEN8_3DSTATE_GS_InvocationsIncrementValue_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_InvocationsIncrementValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_InvocationsIncrementValue_start 229
+#define GEN9_3DSTATE_GS_InvocationsIncrementValue_start 229
+#define GEN8_3DSTATE_GS_InvocationsIncrementValue_start 229
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_InvocationsIncrementValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 229;
+ case 9: return 229;
+ case 8: return 229;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Kernel Start Pointer */
+
+
+#define GEN10_3DSTATE_GS_KernelStartPointer_bits 58
+#define GEN9_3DSTATE_GS_KernelStartPointer_bits 58
+#define GEN8_3DSTATE_GS_KernelStartPointer_bits 58
+#define GEN75_3DSTATE_GS_KernelStartPointer_bits 26
+#define GEN7_3DSTATE_GS_KernelStartPointer_bits 26
+#define GEN6_3DSTATE_GS_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_KernelStartPointer_start 38
+#define GEN9_3DSTATE_GS_KernelStartPointer_start 38
+#define GEN8_3DSTATE_GS_KernelStartPointer_start 38
+#define GEN75_3DSTATE_GS_KernelStartPointer_start 38
+#define GEN7_3DSTATE_GS_KernelStartPointer_start 38
+#define GEN6_3DSTATE_GS_KernelStartPointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Mask Stack Exception Enable */
+
+
+#define GEN10_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+#define GEN9_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+#define GEN8_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+#define GEN75_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+#define GEN7_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+#define GEN6_3DSTATE_GS_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_MaskStackExceptionEnable_start 107
+#define GEN9_3DSTATE_GS_MaskStackExceptionEnable_start 107
+#define GEN8_3DSTATE_GS_MaskStackExceptionEnable_start 107
+#define GEN75_3DSTATE_GS_MaskStackExceptionEnable_start 75
+#define GEN7_3DSTATE_GS_MaskStackExceptionEnable_start 75
+#define GEN6_3DSTATE_GS_MaskStackExceptionEnable_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 107;
+ case 9: return 107;
+ case 8: return 107;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 75;
+ } else {
+ return 75;
+ }
+ case 6: return 75;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Maximum Number of Threads */
+
+
+#define GEN10_3DSTATE_GS_MaximumNumberofThreads_bits 9
+#define GEN9_3DSTATE_GS_MaximumNumberofThreads_bits 9
+#define GEN8_3DSTATE_GS_MaximumNumberofThreads_bits 8
+#define GEN75_3DSTATE_GS_MaximumNumberofThreads_bits 8
+#define GEN7_3DSTATE_GS_MaximumNumberofThreads_bits 7
+#define GEN6_3DSTATE_GS_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_MaximumNumberofThreads_start 256
+#define GEN9_3DSTATE_GS_MaximumNumberofThreads_start 256
+#define GEN8_3DSTATE_GS_MaximumNumberofThreads_start 248
+#define GEN75_3DSTATE_GS_MaximumNumberofThreads_start 184
+#define GEN7_3DSTATE_GS_MaximumNumberofThreads_start 185
+#define GEN6_3DSTATE_GS_MaximumNumberofThreads_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 248;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 184;
+ } else {
+ return 185;
+ }
+ case 6: return 185;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Output Topology */
+
+
+#define GEN10_3DSTATE_GS_OutputTopology_bits 6
+#define GEN9_3DSTATE_GS_OutputTopology_bits 6
+#define GEN8_3DSTATE_GS_OutputTopology_bits 6
+#define GEN75_3DSTATE_GS_OutputTopology_bits 6
+#define GEN7_3DSTATE_GS_OutputTopology_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_OutputTopology_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_OutputTopology_start 209
+#define GEN9_3DSTATE_GS_OutputTopology_start 209
+#define GEN8_3DSTATE_GS_OutputTopology_start 209
+#define GEN75_3DSTATE_GS_OutputTopology_start 145
+#define GEN7_3DSTATE_GS_OutputTopology_start 145
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_OutputTopology_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 209;
+ case 9: return 209;
+ case 8: return 209;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 145;
+ } else {
+ return 145;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Output Vertex Size */
+
+
+#define GEN10_3DSTATE_GS_OutputVertexSize_bits 6
+#define GEN9_3DSTATE_GS_OutputVertexSize_bits 6
+#define GEN8_3DSTATE_GS_OutputVertexSize_bits 6
+#define GEN75_3DSTATE_GS_OutputVertexSize_bits 6
+#define GEN7_3DSTATE_GS_OutputVertexSize_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_OutputVertexSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_OutputVertexSize_start 215
+#define GEN9_3DSTATE_GS_OutputVertexSize_start 215
+#define GEN8_3DSTATE_GS_OutputVertexSize_start 215
+#define GEN75_3DSTATE_GS_OutputVertexSize_start 151
+#define GEN7_3DSTATE_GS_OutputVertexSize_start 151
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_OutputVertexSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 215;
+ case 9: return 215;
+ case 8: return 215;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 151;
+ } else {
+ return 151;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Per-Thread Scratch Space */
+
+
+#define GEN10_3DSTATE_GS_PerThreadScratchSpace_bits 4
+#define GEN9_3DSTATE_GS_PerThreadScratchSpace_bits 4
+#define GEN8_3DSTATE_GS_PerThreadScratchSpace_bits 4
+#define GEN75_3DSTATE_GS_PerThreadScratchSpace_bits 4
+#define GEN7_3DSTATE_GS_PerThreadScratchSpace_bits 4
+#define GEN6_3DSTATE_GS_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_PerThreadScratchSpace_start 128
+#define GEN9_3DSTATE_GS_PerThreadScratchSpace_start 128
+#define GEN8_3DSTATE_GS_PerThreadScratchSpace_start 128
+#define GEN75_3DSTATE_GS_PerThreadScratchSpace_start 96
+#define GEN7_3DSTATE_GS_PerThreadScratchSpace_start 96
+#define GEN6_3DSTATE_GS_PerThreadScratchSpace_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Rendering Enabled */
+
+
+#define GEN6_3DSTATE_GS_RenderingEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_RenderingEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_RenderingEnabled_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_RenderingEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 168;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Reorder Mode */
+
+
+#define GEN10_3DSTATE_GS_ReorderMode_bits 1
+#define GEN9_3DSTATE_GS_ReorderMode_bits 1
+#define GEN8_3DSTATE_GS_ReorderMode_bits 1
+#define GEN75_3DSTATE_GS_ReorderMode_bits 1
+#define GEN7_3DSTATE_GS_ReorderMode_bits 1
+#define GEN6_3DSTATE_GS_ReorderMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ReorderMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ReorderMode_start 226
+#define GEN9_3DSTATE_GS_ReorderMode_start 226
+#define GEN8_3DSTATE_GS_ReorderMode_start 226
+#define GEN75_3DSTATE_GS_ReorderMode_start 162
+#define GEN7_3DSTATE_GS_ReorderMode_start 162
+#define GEN6_3DSTATE_GS_ReorderMode_start 222
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ReorderMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 226;
+ case 9: return 226;
+ case 8: return 226;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 162;
+ } else {
+ return 162;
+ }
+ case 6: return 222;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::SO Statistics Enable */
+
+
+#define GEN6_3DSTATE_GS_SOStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SOStatisticsEnable_start 169
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 169;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::SVBI Payload Enable */
+
+
+#define GEN6_3DSTATE_GS_SVBIPayloadEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPayloadEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVBIPayloadEnable_start 220
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPayloadEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 220;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::SVBI Post-Increment Enable */
+
+
+#define GEN6_3DSTATE_GS_SVBIPostIncrementEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPostIncrementEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVBIPostIncrementEnable_start 219
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPostIncrementEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 219;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::SVBI Post-Increment Value */
+
+
+#define GEN6_3DSTATE_GS_SVBIPostIncrementValue_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPostIncrementValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVBIPostIncrementValue_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVBIPostIncrementValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 208;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Sampler Count */
+
+
+#define GEN10_3DSTATE_GS_SamplerCount_bits 3
+#define GEN9_3DSTATE_GS_SamplerCount_bits 3
+#define GEN8_3DSTATE_GS_SamplerCount_bits 3
+#define GEN75_3DSTATE_GS_SamplerCount_bits 3
+#define GEN7_3DSTATE_GS_SamplerCount_bits 3
+#define GEN6_3DSTATE_GS_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_SamplerCount_start 123
+#define GEN9_3DSTATE_GS_SamplerCount_start 123
+#define GEN8_3DSTATE_GS_SamplerCount_start 123
+#define GEN75_3DSTATE_GS_SamplerCount_start 91
+#define GEN7_3DSTATE_GS_SamplerCount_start 91
+#define GEN6_3DSTATE_GS_SamplerCount_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 123;
+ case 9: return 123;
+ case 8: return 123;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 91;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Scratch Space Base Pointer */
+
+
+#define GEN10_3DSTATE_GS_ScratchSpaceBasePointer_bits 54
+#define GEN9_3DSTATE_GS_ScratchSpaceBasePointer_bits 54
+#define GEN8_3DSTATE_GS_ScratchSpaceBasePointer_bits 54
+#define GEN75_3DSTATE_GS_ScratchSpaceBasePointer_bits 22
+#define GEN7_3DSTATE_GS_ScratchSpaceBasePointer_bits 22
+#define GEN6_3DSTATE_GS_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ScratchSpaceBasePointer_start 138
+#define GEN9_3DSTATE_GS_ScratchSpaceBasePointer_start 138
+#define GEN8_3DSTATE_GS_ScratchSpaceBasePointer_start 138
+#define GEN75_3DSTATE_GS_ScratchSpaceBasePointer_start 106
+#define GEN7_3DSTATE_GS_ScratchSpaceBasePointer_start 106
+#define GEN6_3DSTATE_GS_ScratchSpaceBasePointer_start 106
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 138;
+ case 9: return 138;
+ case 8: return 138;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 106;
+ } else {
+ return 106;
+ }
+ case 6: return 106;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Semaphore Handle */
+
+
+#define GEN75_3DSTATE_GS_SemaphoreHandle_bits 13
+#define GEN7_3DSTATE_GS_SemaphoreHandle_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SemaphoreHandle_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GS_SemaphoreHandle_start 192
+#define GEN7_3DSTATE_GS_SemaphoreHandle_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SemaphoreHandle_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Single Program Flow */
+
+
+#define GEN10_3DSTATE_GS_SingleProgramFlow_bits 1
+#define GEN9_3DSTATE_GS_SingleProgramFlow_bits 1
+#define GEN8_3DSTATE_GS_SingleProgramFlow_bits 1
+#define GEN75_3DSTATE_GS_SingleProgramFlow_bits 1
+#define GEN7_3DSTATE_GS_SingleProgramFlow_bits 1
+#define GEN6_3DSTATE_GS_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_SingleProgramFlow_start 127
+#define GEN9_3DSTATE_GS_SingleProgramFlow_start 127
+#define GEN8_3DSTATE_GS_SingleProgramFlow_start 127
+#define GEN75_3DSTATE_GS_SingleProgramFlow_start 95
+#define GEN7_3DSTATE_GS_SingleProgramFlow_start 95
+#define GEN6_3DSTATE_GS_SingleProgramFlow_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 127;
+ case 9: return 127;
+ case 8: return 127;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Software Exception Enable */
+
+
+#define GEN10_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+#define GEN9_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+#define GEN8_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+#define GEN75_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+#define GEN7_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+#define GEN6_3DSTATE_GS_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_SoftwareExceptionEnable_start 103
+#define GEN9_3DSTATE_GS_SoftwareExceptionEnable_start 103
+#define GEN8_3DSTATE_GS_SoftwareExceptionEnable_start 103
+#define GEN75_3DSTATE_GS_SoftwareExceptionEnable_start 71
+#define GEN7_3DSTATE_GS_SoftwareExceptionEnable_start 71
+#define GEN6_3DSTATE_GS_SoftwareExceptionEnable_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 103;
+ case 9: return 103;
+ case 8: return 103;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 71;
+ } else {
+ return 71;
+ }
+ case 6: return 71;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Static Output */
+
+
+#define GEN10_3DSTATE_GS_StaticOutput_bits 1
+#define GEN9_3DSTATE_GS_StaticOutput_bits 1
+#define GEN8_3DSTATE_GS_StaticOutput_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StaticOutput_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_StaticOutput_start 286
+#define GEN9_3DSTATE_GS_StaticOutput_start 286
+#define GEN8_3DSTATE_GS_StaticOutput_start 286
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StaticOutput_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 286;
+ case 9: return 286;
+ case 8: return 286;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Static Output Vertex Count */
+
+
+#define GEN10_3DSTATE_GS_StaticOutputVertexCount_bits 11
+#define GEN9_3DSTATE_GS_StaticOutputVertexCount_bits 11
+#define GEN8_3DSTATE_GS_StaticOutputVertexCount_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StaticOutputVertexCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_StaticOutputVertexCount_start 272
+#define GEN9_3DSTATE_GS_StaticOutputVertexCount_start 272
+#define GEN8_3DSTATE_GS_StaticOutputVertexCount_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StaticOutputVertexCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Statistics Enable */
+
+
+#define GEN10_3DSTATE_GS_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_GS_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_GS_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_GS_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_GS_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_GS_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_StatisticsEnable_start 234
+#define GEN9_3DSTATE_GS_StatisticsEnable_start 234
+#define GEN8_3DSTATE_GS_StatisticsEnable_start 234
+#define GEN75_3DSTATE_GS_StatisticsEnable_start 170
+#define GEN7_3DSTATE_GS_StatisticsEnable_start 170
+#define GEN6_3DSTATE_GS_StatisticsEnable_start 170
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 234;
+ case 9: return 234;
+ case 8: return 234;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 170;
+ } else {
+ return 170;
+ }
+ case 6: return 170;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Thread Dispatch Priority */
+
+
+#define GEN10_3DSTATE_GS_ThreadDispatchPriority_bits 1
+#define GEN9_3DSTATE_GS_ThreadDispatchPriority_bits 1
+#define GEN8_3DSTATE_GS_ThreadDispatchPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_ThreadDispatchPriority_start 113
+#define GEN9_3DSTATE_GS_ThreadDispatchPriority_start 113
+#define GEN8_3DSTATE_GS_ThreadDispatchPriority_start 113
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Thread Priority */
+
+
+#define GEN75_3DSTATE_GS_ThreadPriority_bits 1
+#define GEN7_3DSTATE_GS_ThreadPriority_bits 1
+#define GEN6_3DSTATE_GS_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_GS_ThreadPriority_start 81
+#define GEN7_3DSTATE_GS_ThreadPriority_start 81
+#define GEN6_3DSTATE_GS_ThreadPriority_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 81;
+ }
+ case 6: return 81;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::User Clip Distance Clip Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_start 296
+#define GEN9_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_start 296
+#define GEN8_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_start 296
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 296;
+ case 9: return 296;
+ case 8: return 296;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::User Clip Distance Cull Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_start 288
+#define GEN9_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_start 288
+#define GEN8_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 288;
+ case 9: return 288;
+ case 8: return 288;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Vector Mask Enable */
+
+
+#define GEN10_3DSTATE_GS_VectorMaskEnable_bits 1
+#define GEN9_3DSTATE_GS_VectorMaskEnable_bits 1
+#define GEN8_3DSTATE_GS_VectorMaskEnable_bits 1
+#define GEN75_3DSTATE_GS_VectorMaskEnable_bits 1
+#define GEN7_3DSTATE_GS_VectorMaskEnable_bits 1
+#define GEN6_3DSTATE_GS_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_VectorMaskEnable_start 126
+#define GEN9_3DSTATE_GS_VectorMaskEnable_start 126
+#define GEN8_3DSTATE_GS_VectorMaskEnable_start 126
+#define GEN75_3DSTATE_GS_VectorMaskEnable_start 94
+#define GEN7_3DSTATE_GS_VectorMaskEnable_start 94
+#define GEN6_3DSTATE_GS_VectorMaskEnable_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 126;
+ case 9: return 126;
+ case 8: return 126;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 94;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Vertex URB Entry Output Length */
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryOutputLength_bits 5
+#define GEN9_3DSTATE_GS_VertexURBEntryOutputLength_bits 5
+#define GEN8_3DSTATE_GS_VertexURBEntryOutputLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryOutputLength_start 304
+#define GEN9_3DSTATE_GS_VertexURBEntryOutputLength_start 304
+#define GEN8_3DSTATE_GS_VertexURBEntryOutputLength_start 304
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 304;
+ case 9: return 304;
+ case 8: return 304;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Vertex URB Entry Output Read Offset */
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN9_3DSTATE_GS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN8_3DSTATE_GS_VertexURBEntryOutputReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryOutputReadOffset_start 309
+#define GEN9_3DSTATE_GS_VertexURBEntryOutputReadOffset_start 309
+#define GEN8_3DSTATE_GS_VertexURBEntryOutputReadOffset_start 309
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 309;
+ case 9: return 309;
+ case 8: return 309;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Vertex URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+#define GEN9_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+#define GEN8_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+#define GEN75_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+#define GEN7_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+#define GEN6_3DSTATE_GS_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryReadLength_start 203
+#define GEN9_3DSTATE_GS_VertexURBEntryReadLength_start 203
+#define GEN8_3DSTATE_GS_VertexURBEntryReadLength_start 203
+#define GEN75_3DSTATE_GS_VertexURBEntryReadLength_start 139
+#define GEN7_3DSTATE_GS_VertexURBEntryReadLength_start 139
+#define GEN6_3DSTATE_GS_VertexURBEntryReadLength_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 203;
+ case 9: return 203;
+ case 8: return 203;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 139;
+ } else {
+ return 139;
+ }
+ case 6: return 139;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS::Vertex URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+#define GEN9_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+#define GEN8_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+#define GEN75_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+#define GEN7_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+#define GEN6_3DSTATE_GS_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_GS_VertexURBEntryReadOffset_start 196
+#define GEN9_3DSTATE_GS_VertexURBEntryReadOffset_start 196
+#define GEN8_3DSTATE_GS_VertexURBEntryReadOffset_start 196
+#define GEN75_3DSTATE_GS_VertexURBEntryReadOffset_start 132
+#define GEN7_3DSTATE_GS_VertexURBEntryReadOffset_start 132
+#define GEN6_3DSTATE_GS_VertexURBEntryReadOffset_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 196;
+ case 9: return 196;
+ case 8: return 196;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 132;
+ } else {
+ return 132;
+ }
+ case 6: return 132;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::3D Command Opcode */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::3D Command Sub Opcode */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Command SubType */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Command Type */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::DWord Length */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Index Number */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_IndexNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_IndexNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_IndexNumber_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_IndexNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 61;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Load Internal Vertex Count */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_LoadInternalVertexCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Maximum Index */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_MaximumIndex_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_MaximumIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_MaximumIndex_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_MaximumIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_GS_SVB_INDEX::Streamed Vertex Buffer Index */
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_GS_SVB_INDEX_StreamedVertexBufferIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_length 5
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_length 5
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_length 5
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_length 3
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_length 3
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_length 3
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Command SubType */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Command Type */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::DWord Length */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Hierarchical Depth Buffer MOCS */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 7
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 7
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 7
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 4
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 4
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 57;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Hierarchical Depth Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 7
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 4
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 4
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_HierarchicalDepthBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 57;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Surface Base Address */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Surface Pitch */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 17;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN75_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN7_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN6_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+#define GEN5_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HIER_DEPTH_BUFFER::Surface QPitch */
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_bits 15
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_bits 15
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_start 128
+#define GEN9_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_start 128
+#define GEN8_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HIER_DEPTH_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS */
+
+
+#define GEN10_3DSTATE_HS_length 9
+#define GEN9_3DSTATE_HS_length 9
+#define GEN8_3DSTATE_HS_length 9
+#define GEN75_3DSTATE_HS_length 7
+#define GEN7_3DSTATE_HS_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Accesses UAV */
+
+
+#define GEN10_3DSTATE_HS_AccessesUAV_bits 1
+#define GEN9_3DSTATE_HS_AccessesUAV_bits 1
+#define GEN8_3DSTATE_HS_AccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_AccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_AccessesUAV_start 249
+#define GEN9_3DSTATE_HS_AccessesUAV_start 249
+#define GEN8_3DSTATE_HS_AccessesUAV_start 249
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_AccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 249;
+ case 9: return 249;
+ case 8: return 249;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Binding Table Entry Count */
+
+
+#define GEN10_3DSTATE_HS_BindingTableEntryCount_bits 8
+#define GEN9_3DSTATE_HS_BindingTableEntryCount_bits 8
+#define GEN8_3DSTATE_HS_BindingTableEntryCount_bits 8
+#define GEN75_3DSTATE_HS_BindingTableEntryCount_bits 8
+#define GEN7_3DSTATE_HS_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_BindingTableEntryCount_start 50
+#define GEN9_3DSTATE_HS_BindingTableEntryCount_start 50
+#define GEN8_3DSTATE_HS_BindingTableEntryCount_start 50
+#define GEN75_3DSTATE_HS_BindingTableEntryCount_start 50
+#define GEN7_3DSTATE_HS_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Command Type */
+
+
+#define GEN10_3DSTATE_HS_CommandType_bits 3
+#define GEN9_3DSTATE_HS_CommandType_bits 3
+#define GEN8_3DSTATE_HS_CommandType_bits 3
+#define GEN75_3DSTATE_HS_CommandType_bits 3
+#define GEN7_3DSTATE_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_CommandType_start 29
+#define GEN9_3DSTATE_HS_CommandType_start 29
+#define GEN8_3DSTATE_HS_CommandType_start 29
+#define GEN75_3DSTATE_HS_CommandType_start 29
+#define GEN7_3DSTATE_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_DWordLength_start 0
+#define GEN9_3DSTATE_HS_DWordLength_start 0
+#define GEN8_3DSTATE_HS_DWordLength_start 0
+#define GEN75_3DSTATE_HS_DWordLength_start 0
+#define GEN7_3DSTATE_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN10_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN9_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN8_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN75_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN7_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start 243
+#define GEN9_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start 243
+#define GEN8_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start 243
+#define GEN75_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start 179
+#define GEN7_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start 179
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 243;
+ case 9: return 243;
+ case 8: return 243;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 179;
+ } else {
+ return 179;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Dispatch GRF Start Register For URB Data [5] */
+
+
+#define GEN10_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_bits 1
+#define GEN9_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_start 252
+#define GEN9_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_start 252
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchGRFStartRegisterForURBData5_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 252;
+ case 9: return 252;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Dispatch Mode */
+
+
+#define GEN10_3DSTATE_HS_DispatchMode_bits 2
+#define GEN9_3DSTATE_HS_DispatchMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_DispatchMode_start 241
+#define GEN9_3DSTATE_HS_DispatchMode_start 241
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_DispatchMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 241;
+ case 9: return 241;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Enable */
+
+
+#define GEN10_3DSTATE_HS_Enable_bits 1
+#define GEN9_3DSTATE_HS_Enable_bits 1
+#define GEN8_3DSTATE_HS_Enable_bits 1
+#define GEN75_3DSTATE_HS_Enable_bits 1
+#define GEN7_3DSTATE_HS_Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_Enable_start 95
+#define GEN9_3DSTATE_HS_Enable_start 95
+#define GEN8_3DSTATE_HS_Enable_start 95
+#define GEN75_3DSTATE_HS_Enable_start 95
+#define GEN7_3DSTATE_HS_Enable_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 95;
+ case 9: return 95;
+ case 8: return 95;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Floating Point Mode */
+
+
+#define GEN10_3DSTATE_HS_FloatingPointMode_bits 1
+#define GEN9_3DSTATE_HS_FloatingPointMode_bits 1
+#define GEN8_3DSTATE_HS_FloatingPointMode_bits 1
+#define GEN75_3DSTATE_HS_FloatingPointMode_bits 1
+#define GEN7_3DSTATE_HS_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_FloatingPointMode_start 48
+#define GEN9_3DSTATE_HS_FloatingPointMode_start 48
+#define GEN8_3DSTATE_HS_FloatingPointMode_start 48
+#define GEN75_3DSTATE_HS_FloatingPointMode_start 48
+#define GEN7_3DSTATE_HS_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::HS accesses UAV */
+
+
+#define GEN75_3DSTATE_HS_HSaccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_HSaccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_HS_HSaccessesUAV_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_HSaccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 185;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Illegal Opcode Exception Enable */
+
+
+#define GEN10_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_IllegalOpcodeExceptionEnable_start 45
+#define GEN9_3DSTATE_HS_IllegalOpcodeExceptionEnable_start 45
+#define GEN8_3DSTATE_HS_IllegalOpcodeExceptionEnable_start 45
+#define GEN75_3DSTATE_HS_IllegalOpcodeExceptionEnable_start 45
+#define GEN7_3DSTATE_HS_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 45;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 45;
+ } else {
+ return 45;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Include Primitive ID */
+
+
+#define GEN10_3DSTATE_HS_IncludePrimitiveID_bits 1
+#define GEN9_3DSTATE_HS_IncludePrimitiveID_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IncludePrimitiveID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_IncludePrimitiveID_start 224
+#define GEN9_3DSTATE_HS_IncludePrimitiveID_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IncludePrimitiveID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Include Vertex Handles */
+
+
+#define GEN10_3DSTATE_HS_IncludeVertexHandles_bits 1
+#define GEN9_3DSTATE_HS_IncludeVertexHandles_bits 1
+#define GEN8_3DSTATE_HS_IncludeVertexHandles_bits 1
+#define GEN75_3DSTATE_HS_IncludeVertexHandles_bits 1
+#define GEN7_3DSTATE_HS_IncludeVertexHandles_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IncludeVertexHandles_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_IncludeVertexHandles_start 248
+#define GEN9_3DSTATE_HS_IncludeVertexHandles_start 248
+#define GEN8_3DSTATE_HS_IncludeVertexHandles_start 248
+#define GEN75_3DSTATE_HS_IncludeVertexHandles_start 184
+#define GEN7_3DSTATE_HS_IncludeVertexHandles_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_IncludeVertexHandles_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 248;
+ case 9: return 248;
+ case 8: return 248;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 184;
+ } else {
+ return 184;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Instance Count */
+
+
+#define GEN10_3DSTATE_HS_InstanceCount_bits 4
+#define GEN9_3DSTATE_HS_InstanceCount_bits 4
+#define GEN8_3DSTATE_HS_InstanceCount_bits 4
+#define GEN75_3DSTATE_HS_InstanceCount_bits 4
+#define GEN7_3DSTATE_HS_InstanceCount_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_InstanceCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_InstanceCount_start 64
+#define GEN9_3DSTATE_HS_InstanceCount_start 64
+#define GEN8_3DSTATE_HS_InstanceCount_start 64
+#define GEN75_3DSTATE_HS_InstanceCount_start 64
+#define GEN7_3DSTATE_HS_InstanceCount_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_InstanceCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Kernel Start Pointer */
+
+
+#define GEN10_3DSTATE_HS_KernelStartPointer_bits 58
+#define GEN9_3DSTATE_HS_KernelStartPointer_bits 58
+#define GEN8_3DSTATE_HS_KernelStartPointer_bits 58
+#define GEN75_3DSTATE_HS_KernelStartPointer_bits 26
+#define GEN7_3DSTATE_HS_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_KernelStartPointer_start 102
+#define GEN9_3DSTATE_HS_KernelStartPointer_start 102
+#define GEN8_3DSTATE_HS_KernelStartPointer_start 102
+#define GEN75_3DSTATE_HS_KernelStartPointer_start 102
+#define GEN7_3DSTATE_HS_KernelStartPointer_start 102
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 102;
+ case 9: return 102;
+ case 8: return 102;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 102;
+ } else {
+ return 102;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Maximum Number of Threads */
+
+
+#define GEN10_3DSTATE_HS_MaximumNumberofThreads_bits 9
+#define GEN9_3DSTATE_HS_MaximumNumberofThreads_bits 9
+#define GEN8_3DSTATE_HS_MaximumNumberofThreads_bits 9
+#define GEN75_3DSTATE_HS_MaximumNumberofThreads_bits 8
+#define GEN7_3DSTATE_HS_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_MaximumNumberofThreads_start 72
+#define GEN9_3DSTATE_HS_MaximumNumberofThreads_start 72
+#define GEN8_3DSTATE_HS_MaximumNumberofThreads_start 72
+#define GEN75_3DSTATE_HS_MaximumNumberofThreads_start 32
+#define GEN7_3DSTATE_HS_MaximumNumberofThreads_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Per-Thread Scratch Space */
+
+
+#define GEN10_3DSTATE_HS_PerThreadScratchSpace_bits 4
+#define GEN9_3DSTATE_HS_PerThreadScratchSpace_bits 4
+#define GEN8_3DSTATE_HS_PerThreadScratchSpace_bits 4
+#define GEN75_3DSTATE_HS_PerThreadScratchSpace_bits 4
+#define GEN7_3DSTATE_HS_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_PerThreadScratchSpace_start 160
+#define GEN9_3DSTATE_HS_PerThreadScratchSpace_start 160
+#define GEN8_3DSTATE_HS_PerThreadScratchSpace_start 160
+#define GEN75_3DSTATE_HS_PerThreadScratchSpace_start 128
+#define GEN7_3DSTATE_HS_PerThreadScratchSpace_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Sampler Count */
+
+
+#define GEN10_3DSTATE_HS_SamplerCount_bits 3
+#define GEN9_3DSTATE_HS_SamplerCount_bits 3
+#define GEN8_3DSTATE_HS_SamplerCount_bits 3
+#define GEN75_3DSTATE_HS_SamplerCount_bits 3
+#define GEN7_3DSTATE_HS_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_SamplerCount_start 59
+#define GEN9_3DSTATE_HS_SamplerCount_start 59
+#define GEN8_3DSTATE_HS_SamplerCount_start 59
+#define GEN75_3DSTATE_HS_SamplerCount_start 59
+#define GEN7_3DSTATE_HS_SamplerCount_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 59;
+ } else {
+ return 59;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Scratch Space Base Pointer */
+
+
+#define GEN10_3DSTATE_HS_ScratchSpaceBasePointer_bits 54
+#define GEN9_3DSTATE_HS_ScratchSpaceBasePointer_bits 54
+#define GEN8_3DSTATE_HS_ScratchSpaceBasePointer_bits 54
+#define GEN75_3DSTATE_HS_ScratchSpaceBasePointer_bits 22
+#define GEN7_3DSTATE_HS_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_ScratchSpaceBasePointer_start 170
+#define GEN9_3DSTATE_HS_ScratchSpaceBasePointer_start 170
+#define GEN8_3DSTATE_HS_ScratchSpaceBasePointer_start 170
+#define GEN75_3DSTATE_HS_ScratchSpaceBasePointer_start 138
+#define GEN7_3DSTATE_HS_ScratchSpaceBasePointer_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 170;
+ case 9: return 170;
+ case 8: return 170;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 138;
+ } else {
+ return 138;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Semaphore Handle */
+
+
+#define GEN75_3DSTATE_HS_SemaphoreHandle_bits 13
+#define GEN7_3DSTATE_HS_SemaphoreHandle_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SemaphoreHandle_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_HS_SemaphoreHandle_start 192
+#define GEN7_3DSTATE_HS_SemaphoreHandle_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SemaphoreHandle_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Single Program Flow */
+
+
+#define GEN10_3DSTATE_HS_SingleProgramFlow_bits 1
+#define GEN9_3DSTATE_HS_SingleProgramFlow_bits 1
+#define GEN8_3DSTATE_HS_SingleProgramFlow_bits 1
+#define GEN75_3DSTATE_HS_SingleProgramFlow_bits 1
+#define GEN7_3DSTATE_HS_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_SingleProgramFlow_start 251
+#define GEN9_3DSTATE_HS_SingleProgramFlow_start 251
+#define GEN8_3DSTATE_HS_SingleProgramFlow_start 251
+#define GEN75_3DSTATE_HS_SingleProgramFlow_start 187
+#define GEN7_3DSTATE_HS_SingleProgramFlow_start 187
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 251;
+ case 9: return 251;
+ case 8: return 251;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 187;
+ } else {
+ return 187;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Software Exception Enable */
+
+
+#define GEN10_3DSTATE_HS_SoftwareExceptionEnable_bits 1
+#define GEN9_3DSTATE_HS_SoftwareExceptionEnable_bits 1
+#define GEN8_3DSTATE_HS_SoftwareExceptionEnable_bits 1
+#define GEN75_3DSTATE_HS_SoftwareExceptionEnable_bits 1
+#define GEN7_3DSTATE_HS_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_SoftwareExceptionEnable_start 44
+#define GEN9_3DSTATE_HS_SoftwareExceptionEnable_start 44
+#define GEN8_3DSTATE_HS_SoftwareExceptionEnable_start 44
+#define GEN75_3DSTATE_HS_SoftwareExceptionEnable_start 44
+#define GEN7_3DSTATE_HS_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 39;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Statistics Enable */
+
+
+#define GEN10_3DSTATE_HS_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_HS_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_HS_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_HS_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_HS_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_StatisticsEnable_start 93
+#define GEN9_3DSTATE_HS_StatisticsEnable_start 93
+#define GEN8_3DSTATE_HS_StatisticsEnable_start 93
+#define GEN75_3DSTATE_HS_StatisticsEnable_start 93
+#define GEN7_3DSTATE_HS_StatisticsEnable_start 93
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 93;
+ case 9: return 93;
+ case 8: return 93;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 93;
+ } else {
+ return 93;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Thread Dispatch Priority */
+
+
+#define GEN10_3DSTATE_HS_ThreadDispatchPriority_bits 1
+#define GEN9_3DSTATE_HS_ThreadDispatchPriority_bits 1
+#define GEN8_3DSTATE_HS_ThreadDispatchPriority_bits 1
+#define GEN75_3DSTATE_HS_ThreadDispatchPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_ThreadDispatchPriority_start 49
+#define GEN9_3DSTATE_HS_ThreadDispatchPriority_start 49
+#define GEN8_3DSTATE_HS_ThreadDispatchPriority_start 49
+#define GEN75_3DSTATE_HS_ThreadDispatchPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 49;
+ case 8: return 49;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 49;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Vector Mask Enable */
+
+
+#define GEN10_3DSTATE_HS_VectorMaskEnable_bits 1
+#define GEN9_3DSTATE_HS_VectorMaskEnable_bits 1
+#define GEN8_3DSTATE_HS_VectorMaskEnable_bits 1
+#define GEN75_3DSTATE_HS_VectorMaskEnable_bits 1
+#define GEN7_3DSTATE_HS_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_VectorMaskEnable_start 250
+#define GEN9_3DSTATE_HS_VectorMaskEnable_start 250
+#define GEN8_3DSTATE_HS_VectorMaskEnable_start 250
+#define GEN75_3DSTATE_HS_VectorMaskEnable_start 186
+#define GEN7_3DSTATE_HS_VectorMaskEnable_start 186
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 250;
+ case 9: return 250;
+ case 8: return 250;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 186;
+ } else {
+ return 186;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Vertex URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_HS_VertexURBEntryReadLength_bits 6
+#define GEN9_3DSTATE_HS_VertexURBEntryReadLength_bits 6
+#define GEN8_3DSTATE_HS_VertexURBEntryReadLength_bits 6
+#define GEN75_3DSTATE_HS_VertexURBEntryReadLength_bits 6
+#define GEN7_3DSTATE_HS_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_VertexURBEntryReadLength_start 235
+#define GEN9_3DSTATE_HS_VertexURBEntryReadLength_start 235
+#define GEN8_3DSTATE_HS_VertexURBEntryReadLength_start 235
+#define GEN75_3DSTATE_HS_VertexURBEntryReadLength_start 171
+#define GEN7_3DSTATE_HS_VertexURBEntryReadLength_start 171
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 235;
+ case 9: return 235;
+ case 8: return 235;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 171;
+ } else {
+ return 171;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_HS::Vertex URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_HS_VertexURBEntryReadOffset_bits 6
+#define GEN9_3DSTATE_HS_VertexURBEntryReadOffset_bits 6
+#define GEN8_3DSTATE_HS_VertexURBEntryReadOffset_bits 6
+#define GEN75_3DSTATE_HS_VertexURBEntryReadOffset_bits 6
+#define GEN7_3DSTATE_HS_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_HS_VertexURBEntryReadOffset_start 228
+#define GEN9_3DSTATE_HS_VertexURBEntryReadOffset_start 228
+#define GEN8_3DSTATE_HS_VertexURBEntryReadOffset_start 228
+#define GEN75_3DSTATE_HS_VertexURBEntryReadOffset_start 164
+#define GEN7_3DSTATE_HS_VertexURBEntryReadOffset_start 164
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_HS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 228;
+ case 9: return 228;
+ case 8: return 228;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 164;
+ } else {
+ return 164;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_length 5
+#define GEN9_3DSTATE_INDEX_BUFFER_length 5
+#define GEN8_3DSTATE_INDEX_BUFFER_length 5
+#define GEN75_3DSTATE_INDEX_BUFFER_length 3
+#define GEN7_3DSTATE_INDEX_BUFFER_length 3
+#define GEN6_3DSTATE_INDEX_BUFFER_length 3
+#define GEN5_3DSTATE_INDEX_BUFFER_length 3
+#define GEN45_3DSTATE_INDEX_BUFFER_length 3
+#define GEN4_3DSTATE_INDEX_BUFFER_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Buffer Ending Address */
+
+
+#define GEN75_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+#define GEN7_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+#define GEN6_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+#define GEN5_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+#define GEN45_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+#define GEN4_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferEndingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+#define GEN7_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+#define GEN6_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+#define GEN5_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+#define GEN45_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+#define GEN4_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferEndingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Buffer Size */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_BufferSize_bits 32
+#define GEN9_3DSTATE_INDEX_BUFFER_BufferSize_bits 32
+#define GEN8_3DSTATE_INDEX_BUFFER_BufferSize_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_BufferSize_start 128
+#define GEN9_3DSTATE_INDEX_BUFFER_BufferSize_start 128
+#define GEN8_3DSTATE_INDEX_BUFFER_BufferSize_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Buffer Starting Address */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 64
+#define GEN9_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 64
+#define GEN8_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 64
+#define GEN75_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+#define GEN7_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+#define GEN6_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+#define GEN5_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+#define GEN45_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+#define GEN4_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 64
+#define GEN9_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 64
+#define GEN8_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 64
+#define GEN75_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+#define GEN7_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+#define GEN6_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+#define GEN5_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+#define GEN45_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+#define GEN4_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_BufferStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Command SubType */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN9_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN8_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN75_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN7_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN6_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN5_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN45_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+#define GEN4_3DSTATE_INDEX_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN9_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN8_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN75_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN7_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN6_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN5_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN45_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+#define GEN4_3DSTATE_INDEX_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Command Type */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN9_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN8_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN75_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN7_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN6_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN5_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN45_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+#define GEN4_3DSTATE_INDEX_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN9_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN8_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN75_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN7_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN6_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN5_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN45_3DSTATE_INDEX_BUFFER_CommandType_start 29
+#define GEN4_3DSTATE_INDEX_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Cut Index Enable */
+
+
+#define GEN7_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits 1
+#define GEN6_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits 1
+#define GEN5_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits 1
+#define GEN45_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits 1
+#define GEN4_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CutIndexEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_3DSTATE_INDEX_BUFFER_CutIndexEnable_start 10
+#define GEN6_3DSTATE_INDEX_BUFFER_CutIndexEnable_start 10
+#define GEN5_3DSTATE_INDEX_BUFFER_CutIndexEnable_start 10
+#define GEN45_3DSTATE_INDEX_BUFFER_CutIndexEnable_start 10
+#define GEN4_3DSTATE_INDEX_BUFFER_CutIndexEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_CutIndexEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::DWord Length */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN9_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN8_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN75_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN7_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN6_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN5_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN45_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+#define GEN4_3DSTATE_INDEX_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN9_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN8_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN75_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN7_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN6_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN5_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN45_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+#define GEN4_3DSTATE_INDEX_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Index Format */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN9_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN8_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN75_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN7_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN6_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN5_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN45_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+#define GEN4_3DSTATE_INDEX_BUFFER_IndexFormat_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_IndexFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_IndexFormat_start 40
+#define GEN9_3DSTATE_INDEX_BUFFER_IndexFormat_start 40
+#define GEN8_3DSTATE_INDEX_BUFFER_IndexFormat_start 40
+#define GEN75_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+#define GEN7_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+#define GEN6_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+#define GEN5_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+#define GEN45_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+#define GEN4_3DSTATE_INDEX_BUFFER_IndexFormat_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_IndexFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::IndexBufferMOCS */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 7
+#define GEN9_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 7
+#define GEN8_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 7
+#define GEN75_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 4
+#define GEN7_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 4
+#define GEN6_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 32
+#define GEN9_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 32
+#define GEN8_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 32
+#define GEN75_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 12
+#define GEN7_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 12
+#define GEN6_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_IndexBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_INDEX_BUFFER::Memory Object Control State */
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 7
+#define GEN9_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 7
+#define GEN8_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 7
+#define GEN75_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 4
+#define GEN7_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 4
+#define GEN6_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 32
+#define GEN9_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 32
+#define GEN8_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 32
+#define GEN75_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 12
+#define GEN7_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 12
+#define GEN6_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_INDEX_BUFFER_MemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_length 3
+#define GEN9_3DSTATE_LINE_STIPPLE_length 3
+#define GEN8_3DSTATE_LINE_STIPPLE_length 3
+#define GEN75_3DSTATE_LINE_STIPPLE_length 3
+#define GEN7_3DSTATE_LINE_STIPPLE_length 3
+#define GEN6_3DSTATE_LINE_STIPPLE_length 3
+#define GEN5_3DSTATE_LINE_STIPPLE_length 3
+#define GEN45_3DSTATE_LINE_STIPPLE_length 3
+#define GEN4_3DSTATE_LINE_STIPPLE_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Command SubType */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN9_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN8_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN75_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN7_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN6_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN5_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN45_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+#define GEN4_3DSTATE_LINE_STIPPLE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN9_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN8_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN75_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN7_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN6_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN5_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN45_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+#define GEN4_3DSTATE_LINE_STIPPLE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Command Type */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN9_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN8_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN75_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN7_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN6_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN5_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN45_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+#define GEN4_3DSTATE_LINE_STIPPLE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN9_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN8_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN75_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN7_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN6_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN5_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN45_3DSTATE_LINE_STIPPLE_CommandType_start 29
+#define GEN4_3DSTATE_LINE_STIPPLE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Current Repeat Counter */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN9_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN8_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN75_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN7_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN6_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN5_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN45_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+#define GEN4_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN9_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN8_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN75_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN7_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN6_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN5_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN45_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+#define GEN4_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CurrentRepeatCounter_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 53;
+ } else {
+ return 53;
+ }
+ case 6: return 53;
+ case 5: return 53;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 53;
+ } else {
+ return 53;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Current Stipple Index */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN9_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN8_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN75_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN7_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN6_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN5_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN45_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+#define GEN4_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN9_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN8_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN75_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN7_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN6_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN5_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN45_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+#define GEN4_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_CurrentStippleIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::DWord Length */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN9_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN8_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN75_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN7_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN6_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN5_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN45_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+#define GEN4_3DSTATE_LINE_STIPPLE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN9_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN8_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN75_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN7_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN6_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN5_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN45_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+#define GEN4_3DSTATE_LINE_STIPPLE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Line Stipple Inverse Repeat Count */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 17
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 17
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 17
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 17
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 17
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 16
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 16
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 16
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 79
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 79
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 79
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 79
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 79
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 80
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 80
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 80
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStippleInverseRepeatCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 79;
+ case 9: return 79;
+ case 8: return 79;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 79;
+ } else {
+ return 79;
+ }
+ case 6: return 80;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Line Stipple Pattern */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStipplePattern_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStipplePattern_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStipplePattern_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Line Stipple Repeat Count */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN9_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN8_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN75_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN7_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN6_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN5_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN45_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+#define GEN4_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_LineStippleRepeatCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Modify Enable */
+
+
+#define GEN5_3DSTATE_LINE_STIPPLE_ModifyEnable_bits 1
+#define GEN4_3DSTATE_LINE_STIPPLE_ModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_ModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_LINE_STIPPLE_ModifyEnable_start 63
+#define GEN4_3DSTATE_LINE_STIPPLE_ModifyEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_ModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_LINE_STIPPLE::Modify Enable (Current Repeat Counter, Current Stipple Index) */
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN9_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN8_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN75_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN7_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN6_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+#define GEN45_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN9_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN8_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN75_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN7_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN6_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+#define GEN45_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_LINE_STIPPLE_ModifyEnableCurrentRepeatCounterCurrentStippleIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 63;
+ } else {
+ return 63;
+ }
+ case 6: return 63;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_length 2
+#define GEN9_3DSTATE_MONOFILTER_SIZE_length 2
+#define GEN8_3DSTATE_MONOFILTER_SIZE_length 2
+#define GEN75_3DSTATE_MONOFILTER_SIZE_length 2
+#define GEN7_3DSTATE_MONOFILTER_SIZE_length 2
+#define GEN6_3DSTATE_MONOFILTER_SIZE_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::Command SubType */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+#define GEN9_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+#define GEN8_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+#define GEN75_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+#define GEN7_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+#define GEN6_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+#define GEN9_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+#define GEN8_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+#define GEN75_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+#define GEN7_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+#define GEN6_3DSTATE_MONOFILTER_SIZE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::Command Type */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+#define GEN9_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+#define GEN8_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+#define GEN75_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+#define GEN7_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+#define GEN6_3DSTATE_MONOFILTER_SIZE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+#define GEN9_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+#define GEN8_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+#define GEN75_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+#define GEN7_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+#define GEN6_3DSTATE_MONOFILTER_SIZE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::DWord Length */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+#define GEN9_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+#define GEN8_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+#define GEN75_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+#define GEN7_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+#define GEN6_3DSTATE_MONOFILTER_SIZE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+#define GEN9_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+#define GEN8_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+#define GEN75_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+#define GEN7_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+#define GEN6_3DSTATE_MONOFILTER_SIZE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::Monochrome Filter Height */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+#define GEN9_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+#define GEN8_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+#define GEN75_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+#define GEN7_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+#define GEN6_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+#define GEN9_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+#define GEN8_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+#define GEN75_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+#define GEN7_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+#define GEN6_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_MonochromeFilterHeight_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MONOFILTER_SIZE::Monochrome Filter Width */
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+#define GEN9_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+#define GEN8_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+#define GEN75_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+#define GEN7_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+#define GEN6_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+#define GEN9_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+#define GEN8_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+#define GEN75_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+#define GEN7_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+#define GEN6_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MONOFILTER_SIZE_MonochromeFilterWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 35;
+ } else {
+ return 35;
+ }
+ case 6: return 35;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_length 2
+#define GEN9_3DSTATE_MULTISAMPLE_length 2
+#define GEN8_3DSTATE_MULTISAMPLE_length 2
+#define GEN75_3DSTATE_MULTISAMPLE_length 4
+#define GEN7_3DSTATE_MULTISAMPLE_length 4
+#define GEN6_3DSTATE_MULTISAMPLE_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_MULTISAMPLE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Command SubType */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+#define GEN9_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+#define GEN8_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+#define GEN75_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+#define GEN7_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+#define GEN6_3DSTATE_MULTISAMPLE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+#define GEN9_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+#define GEN8_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+#define GEN75_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+#define GEN7_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+#define GEN6_3DSTATE_MULTISAMPLE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Command Type */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_CommandType_bits 3
+#define GEN9_3DSTATE_MULTISAMPLE_CommandType_bits 3
+#define GEN8_3DSTATE_MULTISAMPLE_CommandType_bits 3
+#define GEN75_3DSTATE_MULTISAMPLE_CommandType_bits 3
+#define GEN7_3DSTATE_MULTISAMPLE_CommandType_bits 3
+#define GEN6_3DSTATE_MULTISAMPLE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_CommandType_start 29
+#define GEN9_3DSTATE_MULTISAMPLE_CommandType_start 29
+#define GEN8_3DSTATE_MULTISAMPLE_CommandType_start 29
+#define GEN75_3DSTATE_MULTISAMPLE_CommandType_start 29
+#define GEN7_3DSTATE_MULTISAMPLE_CommandType_start 29
+#define GEN6_3DSTATE_MULTISAMPLE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::DWord Length */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+#define GEN9_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+#define GEN8_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+#define GEN75_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+#define GEN7_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+#define GEN6_3DSTATE_MULTISAMPLE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_DWordLength_start 0
+#define GEN9_3DSTATE_MULTISAMPLE_DWordLength_start 0
+#define GEN8_3DSTATE_MULTISAMPLE_DWordLength_start 0
+#define GEN75_3DSTATE_MULTISAMPLE_DWordLength_start 0
+#define GEN7_3DSTATE_MULTISAMPLE_DWordLength_start 0
+#define GEN6_3DSTATE_MULTISAMPLE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Multi Sample Enable */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_MultiSampleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_MultiSampleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_MultiSampleEnable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_MultiSampleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Number of Multisamples */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+#define GEN9_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+#define GEN8_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+#define GEN75_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+#define GEN7_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+#define GEN6_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+#define GEN9_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+#define GEN8_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+#define GEN75_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+#define GEN7_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+#define GEN6_3DSTATE_MULTISAMPLE_NumberofMultisamples_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_NumberofMultisamples_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 33;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Pixel Location */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+#define GEN9_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+#define GEN8_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+#define GEN75_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+#define GEN7_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+#define GEN6_3DSTATE_MULTISAMPLE_PixelLocation_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_PixelLocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+#define GEN9_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+#define GEN8_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+#define GEN75_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+#define GEN7_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+#define GEN6_3DSTATE_MULTISAMPLE_PixelLocation_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_PixelLocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 36;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Pixel Position Offset Enable */
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_bits 1
+#define GEN9_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_bits 1
+#define GEN8_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_start 37
+#define GEN9_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_start 37
+#define GEN8_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_PixelPositionOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample0 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample0XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample0XOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample0XOffset_start 68
+#define GEN7_3DSTATE_MULTISAMPLE_Sample0XOffset_start 68
+#define GEN6_3DSTATE_MULTISAMPLE_Sample0XOffset_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 68;
+ } else {
+ return 68;
+ }
+ case 6: return 68;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample0 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample0YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample0YOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample0YOffset_start 64
+#define GEN7_3DSTATE_MULTISAMPLE_Sample0YOffset_start 64
+#define GEN6_3DSTATE_MULTISAMPLE_Sample0YOffset_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample1 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample1XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample1XOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample1XOffset_start 76
+#define GEN7_3DSTATE_MULTISAMPLE_Sample1XOffset_start 76
+#define GEN6_3DSTATE_MULTISAMPLE_Sample1XOffset_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 76;
+ }
+ case 6: return 76;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample1 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample1YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample1YOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample1YOffset_start 72
+#define GEN7_3DSTATE_MULTISAMPLE_Sample1YOffset_start 72
+#define GEN6_3DSTATE_MULTISAMPLE_Sample1YOffset_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample2 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample2XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample2XOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample2XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample2XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample2XOffset_start 84
+#define GEN7_3DSTATE_MULTISAMPLE_Sample2XOffset_start 84
+#define GEN6_3DSTATE_MULTISAMPLE_Sample2XOffset_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample2XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 84;
+ } else {
+ return 84;
+ }
+ case 6: return 84;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample2 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample2YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample2YOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample2YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample2YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample2YOffset_start 80
+#define GEN7_3DSTATE_MULTISAMPLE_Sample2YOffset_start 80
+#define GEN6_3DSTATE_MULTISAMPLE_Sample2YOffset_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample2YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample3 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample3XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample3XOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample3XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample3XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample3XOffset_start 92
+#define GEN7_3DSTATE_MULTISAMPLE_Sample3XOffset_start 92
+#define GEN6_3DSTATE_MULTISAMPLE_Sample3XOffset_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample3XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 92;
+ } else {
+ return 92;
+ }
+ case 6: return 92;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample3 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample3YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample3YOffset_bits 4
+#define GEN6_3DSTATE_MULTISAMPLE_Sample3YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample3YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample3YOffset_start 88
+#define GEN7_3DSTATE_MULTISAMPLE_Sample3YOffset_start 88
+#define GEN6_3DSTATE_MULTISAMPLE_Sample3YOffset_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample3YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 88;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample4 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample4XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample4XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample4XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample4XOffset_start 100
+#define GEN7_3DSTATE_MULTISAMPLE_Sample4XOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample4XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 100;
+ } else {
+ return 100;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample4 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample4YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample4YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample4YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample4YOffset_start 96
+#define GEN7_3DSTATE_MULTISAMPLE_Sample4YOffset_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample4YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample5 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample5XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample5XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample5XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample5XOffset_start 108
+#define GEN7_3DSTATE_MULTISAMPLE_Sample5XOffset_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample5XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 108;
+ } else {
+ return 108;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample5 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample5YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample5YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample5YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample5YOffset_start 104
+#define GEN7_3DSTATE_MULTISAMPLE_Sample5YOffset_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample5YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 104;
+ } else {
+ return 104;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample6 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample6XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample6XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample6XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample6XOffset_start 116
+#define GEN7_3DSTATE_MULTISAMPLE_Sample6XOffset_start 116
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample6XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 116;
+ } else {
+ return 116;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample6 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample6YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample6YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample6YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample6YOffset_start 112
+#define GEN7_3DSTATE_MULTISAMPLE_Sample6YOffset_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample6YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 112;
+ } else {
+ return 112;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample7 X Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample7XOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample7XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample7XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample7XOffset_start 124
+#define GEN7_3DSTATE_MULTISAMPLE_Sample7XOffset_start 124
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample7XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 124;
+ } else {
+ return 124;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_MULTISAMPLE::Sample7 Y Offset */
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample7YOffset_bits 4
+#define GEN7_3DSTATE_MULTISAMPLE_Sample7YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample7YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_MULTISAMPLE_Sample7YOffset_start 120
+#define GEN7_3DSTATE_MULTISAMPLE_Sample7YOffset_start 120
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_MULTISAMPLE_Sample7YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 120;
+ } else {
+ return 120;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_length 7
+#define GEN45_3DSTATE_PIPELINED_POINTERS_length 7
+#define GEN4_3DSTATE_PIPELINED_POINTERS_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::3D Command Opcode */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Clip Enable */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_ClipEnable_bits 1
+#define GEN45_3DSTATE_PIPELINED_POINTERS_ClipEnable_bits 1
+#define GEN4_3DSTATE_PIPELINED_POINTERS_ClipEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_ClipEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_ClipEnable_start 96
+#define GEN45_3DSTATE_PIPELINED_POINTERS_ClipEnable_start 96
+#define GEN4_3DSTATE_PIPELINED_POINTERS_ClipEnable_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_ClipEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Command SubType */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_CommandSubType_bits 2
+#define GEN45_3DSTATE_PIPELINED_POINTERS_CommandSubType_bits 2
+#define GEN4_3DSTATE_PIPELINED_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_CommandSubType_start 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_CommandSubType_start 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Command Type */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_CommandType_bits 3
+#define GEN45_3DSTATE_PIPELINED_POINTERS_CommandType_bits 3
+#define GEN4_3DSTATE_PIPELINED_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_CommandType_start 29
+#define GEN45_3DSTATE_PIPELINED_POINTERS_CommandType_start 29
+#define GEN4_3DSTATE_PIPELINED_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::DWord Length */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_DWordLength_bits 8
+#define GEN45_3DSTATE_PIPELINED_POINTERS_DWordLength_bits 8
+#define GEN4_3DSTATE_PIPELINED_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_DWordLength_start 0
+#define GEN45_3DSTATE_PIPELINED_POINTERS_DWordLength_start 0
+#define GEN4_3DSTATE_PIPELINED_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::GS Enable */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_GSEnable_bits 1
+#define GEN45_3DSTATE_PIPELINED_POINTERS_GSEnable_bits 1
+#define GEN4_3DSTATE_PIPELINED_POINTERS_GSEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_GSEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_GSEnable_start 64
+#define GEN45_3DSTATE_PIPELINED_POINTERS_GSEnable_start 64
+#define GEN4_3DSTATE_PIPELINED_POINTERS_GSEnable_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_GSEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to CLIP State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_start 101
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_start 101
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoCLIPState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 101;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 101;
+ } else {
+ return 101;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to Color Calc State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_start 197
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_start 197
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_start 197
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoColorCalcState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 197;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 197;
+ } else {
+ return 197;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to GS State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoGSState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoGSState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoGSState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoGSState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoGSState_start 69
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoGSState_start 69
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoGSState_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoGSState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 69;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 69;
+ } else {
+ return 69;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to SF State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoSFState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoSFState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoSFState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoSFState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoSFState_start 133
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoSFState_start 133
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoSFState_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoSFState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 133;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 133;
+ } else {
+ return 133;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to VS State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoVSState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoVSState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoVSState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoVSState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoVSState_start 37
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoVSState_start 37
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoVSState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoVSState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 37;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 37;
+ } else {
+ return 37;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PIPELINED_POINTERS::Pointer to WM State */
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoWMState_bits 27
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoWMState_bits 27
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoWMState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoWMState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_3DSTATE_PIPELINED_POINTERS_PointertoWMState_start 165
+#define GEN45_3DSTATE_PIPELINED_POINTERS_PointertoWMState_start 165
+#define GEN4_3DSTATE_PIPELINED_POINTERS_PointertoWMState_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PIPELINED_POINTERS_PointertoWMState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 165;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 165;
+ } else {
+ return 165;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::Command SubType */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::Command Type */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::DWord Length */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::Polygon Stipple X Offset */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleXOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 40;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 40;
+ } else {
+ return 40;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_OFFSET::Polygon Stipple Y Offset */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN9_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN8_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN75_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN5_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN45_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+#define GEN4_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_OFFSET_PolygonStippleYOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_length 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 33;
+ case 5: return 33;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 33;
+ } else {
+ return 33;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::Command SubType */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::Command Type */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::DWord Length */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_POLY_STIPPLE_PATTERN::Pattern Row */
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN9_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN8_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN75_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN5_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN45_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+#define GEN4_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_POLY_STIPPLE_PATTERN_PatternRow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS */
+
+
+#define GEN10_3DSTATE_PS_length 12
+#define GEN9_3DSTATE_PS_length 12
+#define GEN8_3DSTATE_PS_length 12
+#define GEN75_3DSTATE_PS_length 8
+#define GEN7_3DSTATE_PS_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::16 Pixel Dispatch Enable */
+
+
+#define GEN10_3DSTATE_PS_16PixelDispatchEnable_bits 1
+#define GEN9_3DSTATE_PS_16PixelDispatchEnable_bits 1
+#define GEN8_3DSTATE_PS_16PixelDispatchEnable_bits 1
+#define GEN75_3DSTATE_PS_16PixelDispatchEnable_bits 1
+#define GEN7_3DSTATE_PS_16PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_16PixelDispatchEnable_start 193
+#define GEN9_3DSTATE_PS_16PixelDispatchEnable_start 193
+#define GEN8_3DSTATE_PS_16PixelDispatchEnable_start 193
+#define GEN75_3DSTATE_PS_16PixelDispatchEnable_start 129
+#define GEN7_3DSTATE_PS_16PixelDispatchEnable_start 129
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 193;
+ case 9: return 193;
+ case 8: return 193;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 129;
+ } else {
+ return 129;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::32 Pixel Dispatch Enable */
+
+
+#define GEN10_3DSTATE_PS_32PixelDispatchEnable_bits 1
+#define GEN9_3DSTATE_PS_32PixelDispatchEnable_bits 1
+#define GEN8_3DSTATE_PS_32PixelDispatchEnable_bits 1
+#define GEN75_3DSTATE_PS_32PixelDispatchEnable_bits 1
+#define GEN7_3DSTATE_PS_32PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_32PixelDispatchEnable_start 194
+#define GEN9_3DSTATE_PS_32PixelDispatchEnable_start 194
+#define GEN8_3DSTATE_PS_32PixelDispatchEnable_start 194
+#define GEN75_3DSTATE_PS_32PixelDispatchEnable_start 130
+#define GEN7_3DSTATE_PS_32PixelDispatchEnable_start 130
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 194;
+ case 9: return 194;
+ case 8: return 194;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 130;
+ } else {
+ return 130;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::8 Pixel Dispatch Enable */
+
+
+#define GEN10_3DSTATE_PS_8PixelDispatchEnable_bits 1
+#define GEN9_3DSTATE_PS_8PixelDispatchEnable_bits 1
+#define GEN8_3DSTATE_PS_8PixelDispatchEnable_bits 1
+#define GEN75_3DSTATE_PS_8PixelDispatchEnable_bits 1
+#define GEN7_3DSTATE_PS_8PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_8PixelDispatchEnable_start 192
+#define GEN9_3DSTATE_PS_8PixelDispatchEnable_start 192
+#define GEN8_3DSTATE_PS_8PixelDispatchEnable_start 192
+#define GEN75_3DSTATE_PS_8PixelDispatchEnable_start 128
+#define GEN7_3DSTATE_PS_8PixelDispatchEnable_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Attribute Enable */
+
+
+#define GEN75_3DSTATE_PS_AttributeEnable_bits 1
+#define GEN7_3DSTATE_PS_AttributeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_AttributeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_AttributeEnable_start 138
+#define GEN7_3DSTATE_PS_AttributeEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_AttributeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 138;
+ } else {
+ return 138;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Binding Table Entry Count */
+
+
+#define GEN10_3DSTATE_PS_BindingTableEntryCount_bits 8
+#define GEN9_3DSTATE_PS_BindingTableEntryCount_bits 8
+#define GEN8_3DSTATE_PS_BindingTableEntryCount_bits 8
+#define GEN75_3DSTATE_PS_BindingTableEntryCount_bits 8
+#define GEN7_3DSTATE_PS_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BindingTableEntryCount_start 114
+#define GEN9_3DSTATE_PS_BindingTableEntryCount_start 114
+#define GEN8_3DSTATE_PS_BindingTableEntryCount_start 114
+#define GEN75_3DSTATE_PS_BindingTableEntryCount_start 82
+#define GEN7_3DSTATE_PS_BindingTableEntryCount_start 82
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 114;
+ case 9: return 114;
+ case 8: return 114;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 82;
+ } else {
+ return 82;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_PS_CommandSubType_start 27
+#define GEN7_3DSTATE_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Command Type */
+
+
+#define GEN10_3DSTATE_PS_CommandType_bits 3
+#define GEN9_3DSTATE_PS_CommandType_bits 3
+#define GEN8_3DSTATE_PS_CommandType_bits 3
+#define GEN75_3DSTATE_PS_CommandType_bits 3
+#define GEN7_3DSTATE_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_CommandType_start 29
+#define GEN9_3DSTATE_PS_CommandType_start 29
+#define GEN8_3DSTATE_PS_CommandType_start 29
+#define GEN75_3DSTATE_PS_CommandType_start 29
+#define GEN7_3DSTATE_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_PS_DWordLength_bits 8
+#define GEN7_3DSTATE_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_DWordLength_start 0
+#define GEN9_3DSTATE_PS_DWordLength_start 0
+#define GEN8_3DSTATE_PS_DWordLength_start 0
+#define GEN75_3DSTATE_PS_DWordLength_start 0
+#define GEN7_3DSTATE_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Denormal Mode */
+
+
+#define GEN75_3DSTATE_PS_DenormalMode_bits 1
+#define GEN7_3DSTATE_PS_DenormalMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DenormalMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_DenormalMode_start 90
+#define GEN7_3DSTATE_PS_DenormalMode_start 90
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DenormalMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 90;
+ } else {
+ return 90;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Dispatch GRF Start Register For Constant/Setup Data 0 */
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start 240
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start 240
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start 240
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start 176
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 240;
+ case 9: return 240;
+ case 8: return 240;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Dispatch GRF Start Register For Constant/Setup Data 1 */
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start 232
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start 232
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start 232
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start 168
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 232;
+ case 9: return 232;
+ case 8: return 232;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 168;
+ } else {
+ return 168;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Dispatch GRF Start Register For Constant/Setup Data 2 */
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start 224
+#define GEN9_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start 224
+#define GEN8_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start 224
+#define GEN75_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start 160
+#define GEN7_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DispatchGRFStartRegisterForConstantSetupData2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Dual Source Blend Enable */
+
+
+#define GEN75_3DSTATE_PS_DualSourceBlendEnable_bits 1
+#define GEN7_3DSTATE_PS_DualSourceBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DualSourceBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_DualSourceBlendEnable_start 135
+#define GEN7_3DSTATE_PS_DualSourceBlendEnable_start 135
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_DualSourceBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 135;
+ } else {
+ return 135;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Floating Point Mode */
+
+
+#define GEN10_3DSTATE_PS_FloatingPointMode_bits 1
+#define GEN9_3DSTATE_PS_FloatingPointMode_bits 1
+#define GEN8_3DSTATE_PS_FloatingPointMode_bits 1
+#define GEN75_3DSTATE_PS_FloatingPointMode_bits 1
+#define GEN7_3DSTATE_PS_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_FloatingPointMode_start 112
+#define GEN9_3DSTATE_PS_FloatingPointMode_start 112
+#define GEN8_3DSTATE_PS_FloatingPointMode_start 112
+#define GEN75_3DSTATE_PS_FloatingPointMode_start 80
+#define GEN7_3DSTATE_PS_FloatingPointMode_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Illegal Opcode Exception Enable */
+
+
+#define GEN10_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_IllegalOpcodeExceptionEnable_start 109
+#define GEN9_3DSTATE_PS_IllegalOpcodeExceptionEnable_start 109
+#define GEN8_3DSTATE_PS_IllegalOpcodeExceptionEnable_start 109
+#define GEN75_3DSTATE_PS_IllegalOpcodeExceptionEnable_start 77
+#define GEN7_3DSTATE_PS_IllegalOpcodeExceptionEnable_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Kernel Start Pointer 0 */
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer0_bits 58
+#define GEN9_3DSTATE_PS_KernelStartPointer0_bits 58
+#define GEN8_3DSTATE_PS_KernelStartPointer0_bits 58
+#define GEN75_3DSTATE_PS_KernelStartPointer0_bits 26
+#define GEN7_3DSTATE_PS_KernelStartPointer0_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer0_start 38
+#define GEN9_3DSTATE_PS_KernelStartPointer0_start 38
+#define GEN8_3DSTATE_PS_KernelStartPointer0_start 38
+#define GEN75_3DSTATE_PS_KernelStartPointer0_start 38
+#define GEN7_3DSTATE_PS_KernelStartPointer0_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Kernel Start Pointer 1 */
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer1_bits 58
+#define GEN9_3DSTATE_PS_KernelStartPointer1_bits 58
+#define GEN8_3DSTATE_PS_KernelStartPointer1_bits 58
+#define GEN75_3DSTATE_PS_KernelStartPointer1_bits 26
+#define GEN7_3DSTATE_PS_KernelStartPointer1_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer1_start 262
+#define GEN9_3DSTATE_PS_KernelStartPointer1_start 262
+#define GEN8_3DSTATE_PS_KernelStartPointer1_start 262
+#define GEN75_3DSTATE_PS_KernelStartPointer1_start 198
+#define GEN7_3DSTATE_PS_KernelStartPointer1_start 198
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 262;
+ case 9: return 262;
+ case 8: return 262;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 198;
+ } else {
+ return 198;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Kernel Start Pointer 2 */
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer2_bits 58
+#define GEN9_3DSTATE_PS_KernelStartPointer2_bits 58
+#define GEN8_3DSTATE_PS_KernelStartPointer2_bits 58
+#define GEN75_3DSTATE_PS_KernelStartPointer2_bits 26
+#define GEN7_3DSTATE_PS_KernelStartPointer2_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_KernelStartPointer2_start 326
+#define GEN9_3DSTATE_PS_KernelStartPointer2_start 326
+#define GEN8_3DSTATE_PS_KernelStartPointer2_start 326
+#define GEN75_3DSTATE_PS_KernelStartPointer2_start 230
+#define GEN7_3DSTATE_PS_KernelStartPointer2_start 230
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_KernelStartPointer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 326;
+ case 9: return 326;
+ case 8: return 326;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 230;
+ } else {
+ return 230;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Mask Stack Exception Enable */
+
+
+#define GEN10_3DSTATE_PS_MaskStackExceptionEnable_bits 1
+#define GEN9_3DSTATE_PS_MaskStackExceptionEnable_bits 1
+#define GEN8_3DSTATE_PS_MaskStackExceptionEnable_bits 1
+#define GEN75_3DSTATE_PS_MaskStackExceptionEnable_bits 1
+#define GEN7_3DSTATE_PS_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_MaskStackExceptionEnable_start 107
+#define GEN9_3DSTATE_PS_MaskStackExceptionEnable_start 107
+#define GEN8_3DSTATE_PS_MaskStackExceptionEnable_start 107
+#define GEN75_3DSTATE_PS_MaskStackExceptionEnable_start 75
+#define GEN7_3DSTATE_PS_MaskStackExceptionEnable_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 107;
+ case 9: return 107;
+ case 8: return 107;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 75;
+ } else {
+ return 75;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Maximum Number of Threads */
+
+
+#define GEN75_3DSTATE_PS_MaximumNumberofThreads_bits 9
+#define GEN7_3DSTATE_PS_MaximumNumberofThreads_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_MaximumNumberofThreads_start 151
+#define GEN7_3DSTATE_PS_MaximumNumberofThreads_start 152
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 151;
+ } else {
+ return 152;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Maximum Number of Threads Per PSD */
+
+
+#define GEN10_3DSTATE_PS_MaximumNumberofThreadsPerPSD_bits 9
+#define GEN9_3DSTATE_PS_MaximumNumberofThreadsPerPSD_bits 9
+#define GEN8_3DSTATE_PS_MaximumNumberofThreadsPerPSD_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaximumNumberofThreadsPerPSD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_MaximumNumberofThreadsPerPSD_start 215
+#define GEN9_3DSTATE_PS_MaximumNumberofThreadsPerPSD_start 215
+#define GEN8_3DSTATE_PS_MaximumNumberofThreadsPerPSD_start 215
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_MaximumNumberofThreadsPerPSD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 215;
+ case 9: return 215;
+ case 8: return 215;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::PS Accesses UAV */
+
+
+#define GEN75_3DSTATE_PS_PSAccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PSAccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_PSAccessesUAV_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PSAccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 133;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Per Thread Scratch Space */
+
+
+#define GEN10_3DSTATE_PS_PerThreadScratchSpace_bits 4
+#define GEN9_3DSTATE_PS_PerThreadScratchSpace_bits 4
+#define GEN8_3DSTATE_PS_PerThreadScratchSpace_bits 4
+#define GEN75_3DSTATE_PS_PerThreadScratchSpace_bits 4
+#define GEN7_3DSTATE_PS_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_PerThreadScratchSpace_start 128
+#define GEN9_3DSTATE_PS_PerThreadScratchSpace_start 128
+#define GEN8_3DSTATE_PS_PerThreadScratchSpace_start 128
+#define GEN75_3DSTATE_PS_PerThreadScratchSpace_start 96
+#define GEN7_3DSTATE_PS_PerThreadScratchSpace_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Position XY Offset Select */
+
+
+#define GEN10_3DSTATE_PS_PositionXYOffsetSelect_bits 2
+#define GEN9_3DSTATE_PS_PositionXYOffsetSelect_bits 2
+#define GEN8_3DSTATE_PS_PositionXYOffsetSelect_bits 2
+#define GEN75_3DSTATE_PS_PositionXYOffsetSelect_bits 2
+#define GEN7_3DSTATE_PS_PositionXYOffsetSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PositionXYOffsetSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_PositionXYOffsetSelect_start 195
+#define GEN9_3DSTATE_PS_PositionXYOffsetSelect_start 195
+#define GEN8_3DSTATE_PS_PositionXYOffsetSelect_start 195
+#define GEN75_3DSTATE_PS_PositionXYOffsetSelect_start 131
+#define GEN7_3DSTATE_PS_PositionXYOffsetSelect_start 131
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PositionXYOffsetSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 195;
+ case 9: return 195;
+ case 8: return 195;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 131;
+ } else {
+ return 131;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Push Constant Enable */
+
+
+#define GEN10_3DSTATE_PS_PushConstantEnable_bits 1
+#define GEN9_3DSTATE_PS_PushConstantEnable_bits 1
+#define GEN8_3DSTATE_PS_PushConstantEnable_bits 1
+#define GEN75_3DSTATE_PS_PushConstantEnable_bits 1
+#define GEN7_3DSTATE_PS_PushConstantEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PushConstantEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_PushConstantEnable_start 203
+#define GEN9_3DSTATE_PS_PushConstantEnable_start 203
+#define GEN8_3DSTATE_PS_PushConstantEnable_start 203
+#define GEN75_3DSTATE_PS_PushConstantEnable_start 139
+#define GEN7_3DSTATE_PS_PushConstantEnable_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_PushConstantEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 203;
+ case 9: return 203;
+ case 8: return 203;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 139;
+ } else {
+ return 139;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Render Target Fast Clear Enable */
+
+
+#define GEN10_3DSTATE_PS_RenderTargetFastClearEnable_bits 1
+#define GEN9_3DSTATE_PS_RenderTargetFastClearEnable_bits 1
+#define GEN8_3DSTATE_PS_RenderTargetFastClearEnable_bits 1
+#define GEN75_3DSTATE_PS_RenderTargetFastClearEnable_bits 1
+#define GEN7_3DSTATE_PS_RenderTargetFastClearEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetFastClearEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_RenderTargetFastClearEnable_start 200
+#define GEN9_3DSTATE_PS_RenderTargetFastClearEnable_start 200
+#define GEN8_3DSTATE_PS_RenderTargetFastClearEnable_start 200
+#define GEN75_3DSTATE_PS_RenderTargetFastClearEnable_start 136
+#define GEN7_3DSTATE_PS_RenderTargetFastClearEnable_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetFastClearEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 200;
+ case 9: return 200;
+ case 8: return 200;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 136;
+ } else {
+ return 136;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Render Target Resolve Enable */
+
+
+#define GEN8_3DSTATE_PS_RenderTargetResolveEnable_bits 1
+#define GEN75_3DSTATE_PS_RenderTargetResolveEnable_bits 1
+#define GEN7_3DSTATE_PS_RenderTargetResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_3DSTATE_PS_RenderTargetResolveEnable_start 198
+#define GEN75_3DSTATE_PS_RenderTargetResolveEnable_start 134
+#define GEN7_3DSTATE_PS_RenderTargetResolveEnable_start 134
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 198;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 134;
+ } else {
+ return 134;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Render Target Resolve Type */
+
+
+#define GEN10_3DSTATE_PS_RenderTargetResolveType_bits 2
+#define GEN9_3DSTATE_PS_RenderTargetResolveType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetResolveType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_RenderTargetResolveType_start 198
+#define GEN9_3DSTATE_PS_RenderTargetResolveType_start 198
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RenderTargetResolveType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 198;
+ case 9: return 198;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Rounding Mode */
+
+
+#define GEN10_3DSTATE_PS_RoundingMode_bits 2
+#define GEN9_3DSTATE_PS_RoundingMode_bits 2
+#define GEN8_3DSTATE_PS_RoundingMode_bits 2
+#define GEN75_3DSTATE_PS_RoundingMode_bits 2
+#define GEN7_3DSTATE_PS_RoundingMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RoundingMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_RoundingMode_start 110
+#define GEN9_3DSTATE_PS_RoundingMode_start 110
+#define GEN8_3DSTATE_PS_RoundingMode_start 110
+#define GEN75_3DSTATE_PS_RoundingMode_start 78
+#define GEN7_3DSTATE_PS_RoundingMode_start 78
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_RoundingMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 110;
+ case 9: return 110;
+ case 8: return 110;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 78;
+ } else {
+ return 78;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Sample Mask */
+
+
+#define GEN75_3DSTATE_PS_SampleMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SampleMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_SampleMask_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SampleMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 140;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Sampler Count */
+
+
+#define GEN10_3DSTATE_PS_SamplerCount_bits 3
+#define GEN9_3DSTATE_PS_SamplerCount_bits 3
+#define GEN8_3DSTATE_PS_SamplerCount_bits 3
+#define GEN75_3DSTATE_PS_SamplerCount_bits 3
+#define GEN7_3DSTATE_PS_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_SamplerCount_start 123
+#define GEN9_3DSTATE_PS_SamplerCount_start 123
+#define GEN8_3DSTATE_PS_SamplerCount_start 123
+#define GEN75_3DSTATE_PS_SamplerCount_start 91
+#define GEN7_3DSTATE_PS_SamplerCount_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 123;
+ case 9: return 123;
+ case 8: return 123;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Scratch Space Base Pointer */
+
+
+#define GEN10_3DSTATE_PS_ScratchSpaceBasePointer_bits 54
+#define GEN9_3DSTATE_PS_ScratchSpaceBasePointer_bits 54
+#define GEN8_3DSTATE_PS_ScratchSpaceBasePointer_bits 54
+#define GEN75_3DSTATE_PS_ScratchSpaceBasePointer_bits 22
+#define GEN7_3DSTATE_PS_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_ScratchSpaceBasePointer_start 138
+#define GEN9_3DSTATE_PS_ScratchSpaceBasePointer_start 138
+#define GEN8_3DSTATE_PS_ScratchSpaceBasePointer_start 138
+#define GEN75_3DSTATE_PS_ScratchSpaceBasePointer_start 106
+#define GEN7_3DSTATE_PS_ScratchSpaceBasePointer_start 106
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 138;
+ case 9: return 138;
+ case 8: return 138;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 106;
+ } else {
+ return 106;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Single Precision Denormal Mode */
+
+
+#define GEN10_3DSTATE_PS_SinglePrecisionDenormalMode_bits 1
+#define GEN9_3DSTATE_PS_SinglePrecisionDenormalMode_bits 1
+#define GEN8_3DSTATE_PS_SinglePrecisionDenormalMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SinglePrecisionDenormalMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_SinglePrecisionDenormalMode_start 122
+#define GEN9_3DSTATE_PS_SinglePrecisionDenormalMode_start 122
+#define GEN8_3DSTATE_PS_SinglePrecisionDenormalMode_start 122
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SinglePrecisionDenormalMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 122;
+ case 9: return 122;
+ case 8: return 122;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Single Program Flow */
+
+
+#define GEN10_3DSTATE_PS_SingleProgramFlow_bits 1
+#define GEN9_3DSTATE_PS_SingleProgramFlow_bits 1
+#define GEN8_3DSTATE_PS_SingleProgramFlow_bits 1
+#define GEN75_3DSTATE_PS_SingleProgramFlow_bits 1
+#define GEN7_3DSTATE_PS_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_SingleProgramFlow_start 127
+#define GEN9_3DSTATE_PS_SingleProgramFlow_start 127
+#define GEN8_3DSTATE_PS_SingleProgramFlow_start 127
+#define GEN75_3DSTATE_PS_SingleProgramFlow_start 95
+#define GEN7_3DSTATE_PS_SingleProgramFlow_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 127;
+ case 9: return 127;
+ case 8: return 127;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Software Exception Enable */
+
+
+#define GEN10_3DSTATE_PS_SoftwareExceptionEnable_bits 1
+#define GEN9_3DSTATE_PS_SoftwareExceptionEnable_bits 1
+#define GEN8_3DSTATE_PS_SoftwareExceptionEnable_bits 1
+#define GEN75_3DSTATE_PS_SoftwareExceptionEnable_bits 1
+#define GEN7_3DSTATE_PS_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_SoftwareExceptionEnable_start 103
+#define GEN9_3DSTATE_PS_SoftwareExceptionEnable_start 103
+#define GEN8_3DSTATE_PS_SoftwareExceptionEnable_start 103
+#define GEN75_3DSTATE_PS_SoftwareExceptionEnable_start 71
+#define GEN7_3DSTATE_PS_SoftwareExceptionEnable_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 103;
+ case 9: return 103;
+ case 8: return 103;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 71;
+ } else {
+ return 71;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Thread Dispatch Priority */
+
+
+#define GEN10_3DSTATE_PS_ThreadDispatchPriority_bits 1
+#define GEN9_3DSTATE_PS_ThreadDispatchPriority_bits 1
+#define GEN8_3DSTATE_PS_ThreadDispatchPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_ThreadDispatchPriority_start 113
+#define GEN9_3DSTATE_PS_ThreadDispatchPriority_start 113
+#define GEN8_3DSTATE_PS_ThreadDispatchPriority_start 113
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Thread Priority */
+
+
+#define GEN75_3DSTATE_PS_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_ThreadPriority_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::Vector Mask Enable */
+
+
+#define GEN10_3DSTATE_PS_VectorMaskEnable_bits 1
+#define GEN9_3DSTATE_PS_VectorMaskEnable_bits 1
+#define GEN8_3DSTATE_PS_VectorMaskEnable_bits 1
+#define GEN75_3DSTATE_PS_VectorMaskEnable_bits 1
+#define GEN7_3DSTATE_PS_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_VectorMaskEnable_start 126
+#define GEN9_3DSTATE_PS_VectorMaskEnable_start 126
+#define GEN8_3DSTATE_PS_VectorMaskEnable_start 126
+#define GEN75_3DSTATE_PS_VectorMaskEnable_start 94
+#define GEN7_3DSTATE_PS_VectorMaskEnable_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 126;
+ case 9: return 126;
+ case 8: return 126;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS::oMask Present to RenderTarget */
+
+
+#define GEN75_3DSTATE_PS_oMaskPresenttoRenderTarget_bits 1
+#define GEN7_3DSTATE_PS_oMaskPresenttoRenderTarget_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_PS_oMaskPresenttoRenderTarget_start 137
+#define GEN7_3DSTATE_PS_oMaskPresenttoRenderTarget_start 137
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 137;
+ } else {
+ return 137;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND */
+
+
+#define GEN10_3DSTATE_PS_BLEND_length 2
+#define GEN9_3DSTATE_PS_BLEND_length 2
+#define GEN8_3DSTATE_PS_BLEND_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PS_BLEND_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PS_BLEND_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PS_BLEND_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PS_BLEND_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PS_BLEND_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PS_BLEND_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PS_BLEND_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PS_BLEND_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PS_BLEND_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PS_BLEND_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Alpha Test Enable */
+
+
+#define GEN10_3DSTATE_PS_BLEND_AlphaTestEnable_bits 1
+#define GEN9_3DSTATE_PS_BLEND_AlphaTestEnable_bits 1
+#define GEN8_3DSTATE_PS_BLEND_AlphaTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_AlphaTestEnable_start 40
+#define GEN9_3DSTATE_PS_BLEND_AlphaTestEnable_start 40
+#define GEN8_3DSTATE_PS_BLEND_AlphaTestEnable_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_AlphaTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Alpha To Coverage Enable */
+
+
+#define GEN10_3DSTATE_PS_BLEND_AlphaToCoverageEnable_bits 1
+#define GEN9_3DSTATE_PS_BLEND_AlphaToCoverageEnable_bits 1
+#define GEN8_3DSTATE_PS_BLEND_AlphaToCoverageEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_AlphaToCoverageEnable_start 63
+#define GEN9_3DSTATE_PS_BLEND_AlphaToCoverageEnable_start 63
+#define GEN8_3DSTATE_PS_BLEND_AlphaToCoverageEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Color Buffer Blend Enable */
+
+
+#define GEN10_3DSTATE_PS_BLEND_ColorBufferBlendEnable_bits 1
+#define GEN9_3DSTATE_PS_BLEND_ColorBufferBlendEnable_bits 1
+#define GEN8_3DSTATE_PS_BLEND_ColorBufferBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_ColorBufferBlendEnable_start 61
+#define GEN9_3DSTATE_PS_BLEND_ColorBufferBlendEnable_start 61
+#define GEN8_3DSTATE_PS_BLEND_ColorBufferBlendEnable_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Command SubType */
+
+
+#define GEN10_3DSTATE_PS_BLEND_CommandSubType_bits 2
+#define GEN9_3DSTATE_PS_BLEND_CommandSubType_bits 2
+#define GEN8_3DSTATE_PS_BLEND_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_CommandSubType_start 27
+#define GEN9_3DSTATE_PS_BLEND_CommandSubType_start 27
+#define GEN8_3DSTATE_PS_BLEND_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Command Type */
+
+
+#define GEN10_3DSTATE_PS_BLEND_CommandType_bits 3
+#define GEN9_3DSTATE_PS_BLEND_CommandType_bits 3
+#define GEN8_3DSTATE_PS_BLEND_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_CommandType_start 29
+#define GEN9_3DSTATE_PS_BLEND_CommandType_start 29
+#define GEN8_3DSTATE_PS_BLEND_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::DWord Length */
+
+
+#define GEN10_3DSTATE_PS_BLEND_DWordLength_bits 8
+#define GEN9_3DSTATE_PS_BLEND_DWordLength_bits 8
+#define GEN8_3DSTATE_PS_BLEND_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_DWordLength_start 0
+#define GEN9_3DSTATE_PS_BLEND_DWordLength_start 0
+#define GEN8_3DSTATE_PS_BLEND_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Destination Alpha Blend Factor */
+
+
+#define GEN10_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_bits 5
+#define GEN9_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_bits 5
+#define GEN8_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_start 51
+#define GEN9_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_start 51
+#define GEN8_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Destination Blend Factor */
+
+
+#define GEN10_3DSTATE_PS_BLEND_DestinationBlendFactor_bits 5
+#define GEN9_3DSTATE_PS_BLEND_DestinationBlendFactor_bits 5
+#define GEN8_3DSTATE_PS_BLEND_DestinationBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_DestinationBlendFactor_start 41
+#define GEN9_3DSTATE_PS_BLEND_DestinationBlendFactor_start 41
+#define GEN8_3DSTATE_PS_BLEND_DestinationBlendFactor_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 41;
+ case 9: return 41;
+ case 8: return 41;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Has Writeable RT */
+
+
+#define GEN10_3DSTATE_PS_BLEND_HasWriteableRT_bits 1
+#define GEN9_3DSTATE_PS_BLEND_HasWriteableRT_bits 1
+#define GEN8_3DSTATE_PS_BLEND_HasWriteableRT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_HasWriteableRT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_HasWriteableRT_start 62
+#define GEN9_3DSTATE_PS_BLEND_HasWriteableRT_start 62
+#define GEN8_3DSTATE_PS_BLEND_HasWriteableRT_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_HasWriteableRT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Independent Alpha Blend Enable */
+
+
+#define GEN10_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_bits 1
+#define GEN9_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_bits 1
+#define GEN8_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_start 39
+#define GEN9_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_start 39
+#define GEN8_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Source Alpha Blend Factor */
+
+
+#define GEN10_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_bits 5
+#define GEN9_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_bits 5
+#define GEN8_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_start 56
+#define GEN9_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_start 56
+#define GEN8_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_BLEND::Source Blend Factor */
+
+
+#define GEN10_3DSTATE_PS_BLEND_SourceBlendFactor_bits 5
+#define GEN9_3DSTATE_PS_BLEND_SourceBlendFactor_bits 5
+#define GEN8_3DSTATE_PS_BLEND_SourceBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_BLEND_SourceBlendFactor_start 46
+#define GEN9_3DSTATE_PS_BLEND_SourceBlendFactor_start 46
+#define GEN8_3DSTATE_PS_BLEND_SourceBlendFactor_start 46
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_BLEND_SourceBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_length 2
+#define GEN9_3DSTATE_PS_EXTRA_length 2
+#define GEN8_3DSTATE_PS_EXTRA_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PS_EXTRA_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PS_EXTRA_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PS_EXTRA_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PS_EXTRA_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PS_EXTRA_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PS_EXTRA_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PS_EXTRA_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PS_EXTRA_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Attribute Enable */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_AttributeEnable_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_AttributeEnable_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_AttributeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_AttributeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_AttributeEnable_start 40
+#define GEN9_3DSTATE_PS_EXTRA_AttributeEnable_start 40
+#define GEN8_3DSTATE_PS_EXTRA_AttributeEnable_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_AttributeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Command SubType */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_CommandSubType_bits 2
+#define GEN9_3DSTATE_PS_EXTRA_CommandSubType_bits 2
+#define GEN8_3DSTATE_PS_EXTRA_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_CommandSubType_start 27
+#define GEN9_3DSTATE_PS_EXTRA_CommandSubType_start 27
+#define GEN8_3DSTATE_PS_EXTRA_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Command Type */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_CommandType_bits 3
+#define GEN9_3DSTATE_PS_EXTRA_CommandType_bits 3
+#define GEN8_3DSTATE_PS_EXTRA_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_CommandType_start 29
+#define GEN9_3DSTATE_PS_EXTRA_CommandType_start 29
+#define GEN8_3DSTATE_PS_EXTRA_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::DWord Length */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_DWordLength_bits 8
+#define GEN9_3DSTATE_PS_EXTRA_DWordLength_bits 8
+#define GEN8_3DSTATE_PS_EXTRA_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_DWordLength_start 0
+#define GEN9_3DSTATE_PS_EXTRA_DWordLength_start 0
+#define GEN8_3DSTATE_PS_EXTRA_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Force Computed Depth */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_ForceComputedDepth_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_ForceComputedDepth_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_ForceComputedDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_ForceComputedDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_ForceComputedDepth_start 57
+#define GEN9_3DSTATE_PS_EXTRA_ForceComputedDepth_start 57
+#define GEN8_3DSTATE_PS_EXTRA_ForceComputedDepth_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_ForceComputedDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Input Coverage Mask State */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_InputCoverageMaskState_bits 2
+#define GEN9_3DSTATE_PS_EXTRA_InputCoverageMaskState_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_InputCoverageMaskState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_InputCoverageMaskState_start 32
+#define GEN9_3DSTATE_PS_EXTRA_InputCoverageMaskState_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_InputCoverageMaskState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Computed Depth Mode */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_bits 2
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_bits 2
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_start 58
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_start 58
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderComputedDepthMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Computes Stencil */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_start 37
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderComputesStencil_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Disables Alpha To Coverage */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_start 39
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_start 39
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderDisablesAlphaToCoverage_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Does not write to RT */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_start 62
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_start 62
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderDoesnotwritetoRT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Has UAV */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderHasUAV_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderHasUAV_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderHasUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderHasUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderHasUAV_start 34
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderHasUAV_start 34
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderHasUAV_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderHasUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Is Per Sample */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_start 38
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_start 38
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderIsPerSample_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Kills Pixel */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_start 60
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_start 60
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Pulls Bary */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderPullsBary_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderPullsBary_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderPullsBary_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderPullsBary_start 35
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderPullsBary_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderPullsBary_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Requires Non-Perspective Bary Plane Coefficients */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresNonPerspectiveBaryPlaneCoefficients_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Requires Perspective Bary Plane Coefficients */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresPerspectiveBaryPlaneCoefficients_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Requires Source Depth and/or W Plane Coefficients */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresSourceDepthandorWPlaneCoefficients_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Requires Subpixel Sample Offsets */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderRequiresSubpixelSampleOffsets_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Uses Input Coverage Mask */
+
+
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesInputCoverageMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Uses Source Depth */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_start 56
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_start 56
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Uses Source W */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_start 55
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_start 55
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderUsesSourceW_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 55;
+ case 9: return 55;
+ case 8: return 55;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Pixel Shader Valid */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderValid_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderValid_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderValid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_PixelShaderValid_start 63
+#define GEN9_3DSTATE_PS_EXTRA_PixelShaderValid_start 63
+#define GEN8_3DSTATE_PS_EXTRA_PixelShaderValid_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_PixelShaderValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::Simple PS Hint */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_SimplePSHint_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_SimplePSHint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_SimplePSHint_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_SimplePSHint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 41;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PS_EXTRA::oMask Present to Render Target */
+
+
+#define GEN10_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_bits 1
+#define GEN9_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_bits 1
+#define GEN8_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_start 61
+#define GEN9_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_start 61
+#define GEN8_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PS_EXTRA_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::Command Type */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start 29
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start 29
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start 29
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start 29
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::Constant Buffer Offset */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits 5
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits 5
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits 5
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits 5
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start 48
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start 48
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start 48
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start 48
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::Constant Buffer Size */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits 6
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits 6
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits 6
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits 6
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start 32
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start 32
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start 32
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start 32
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start 0
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start 0
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start 0
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start 0
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::Command Type */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start 29
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start 29
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start 29
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start 29
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::Constant Buffer Offset */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits 5
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits 5
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits 5
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits 5
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start 48
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start 48
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start 48
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start 48
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::Constant Buffer Size */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits 6
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits 6
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits 6
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits 6
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start 32
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start 32
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start 32
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start 32
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start 0
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start 0
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start 0
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start 0
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::Command Type */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start 29
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start 29
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start 29
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start 29
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::Constant Buffer Offset */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits 5
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits 5
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits 5
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits 5
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start 48
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start 48
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start 48
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start 48
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::Constant Buffer Size */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits 6
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits 6
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits 6
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits 6
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start 32
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start 32
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start 32
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start 32
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start 0
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start 0
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start 0
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start 0
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start 27
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::Command Type */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start 29
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start 29
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start 29
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start 29
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::Constant Buffer Offset */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits 5
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits 5
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits 5
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits 5
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start 48
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start 48
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start 48
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start 48
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::Constant Buffer Size */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits 6
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits 6
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits 6
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits 6
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start 32
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start 32
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start 32
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start 32
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start 0
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start 0
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start 0
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start 0
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::Command Type */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits 3
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits 3
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits 3
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits 3
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start 29
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start 29
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start 29
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start 29
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::Constant Buffer Offset */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits 5
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits 5
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits 5
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits 5
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start 48
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start 48
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start 48
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start 48
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::Constant Buffer Size */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits 6
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits 6
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits 6
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits 6
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start 32
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start 32
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start 32
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start 32
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_ConstantBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_PUSH_CONSTANT_ALLOC_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start 0
+#define GEN9_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start 0
+#define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start 0
+#define GEN75_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start 0
+#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_PUSH_CONSTANT_ALLOC_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER */
+
+
+#define GEN10_3DSTATE_RASTER_length 5
+#define GEN9_3DSTATE_RASTER_length 5
+#define GEN8_3DSTATE_RASTER_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_RASTER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_RASTER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_RASTER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_RASTER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_RASTER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_RASTER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_RASTER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_RASTER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_RASTER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_RASTER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::API Mode */
+
+
+#define GEN10_3DSTATE_RASTER_APIMode_bits 2
+#define GEN9_3DSTATE_RASTER_APIMode_bits 2
+#define GEN8_3DSTATE_RASTER_APIMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_APIMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_APIMode_start 54
+#define GEN9_3DSTATE_RASTER_APIMode_start 54
+#define GEN8_3DSTATE_RASTER_APIMode_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_APIMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Antialiasing Enable */
+
+
+#define GEN10_3DSTATE_RASTER_AntialiasingEnable_bits 1
+#define GEN9_3DSTATE_RASTER_AntialiasingEnable_bits 1
+#define GEN8_3DSTATE_RASTER_AntialiasingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_AntialiasingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_AntialiasingEnable_start 34
+#define GEN9_3DSTATE_RASTER_AntialiasingEnable_start 34
+#define GEN8_3DSTATE_RASTER_AntialiasingEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_AntialiasingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Back Face Fill Mode */
+
+
+#define GEN10_3DSTATE_RASTER_BackFaceFillMode_bits 2
+#define GEN9_3DSTATE_RASTER_BackFaceFillMode_bits 2
+#define GEN8_3DSTATE_RASTER_BackFaceFillMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_BackFaceFillMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_BackFaceFillMode_start 35
+#define GEN9_3DSTATE_RASTER_BackFaceFillMode_start 35
+#define GEN8_3DSTATE_RASTER_BackFaceFillMode_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_BackFaceFillMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Command SubType */
+
+
+#define GEN10_3DSTATE_RASTER_CommandSubType_bits 2
+#define GEN9_3DSTATE_RASTER_CommandSubType_bits 2
+#define GEN8_3DSTATE_RASTER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_CommandSubType_start 27
+#define GEN9_3DSTATE_RASTER_CommandSubType_start 27
+#define GEN8_3DSTATE_RASTER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Command Type */
+
+
+#define GEN10_3DSTATE_RASTER_CommandType_bits 3
+#define GEN9_3DSTATE_RASTER_CommandType_bits 3
+#define GEN8_3DSTATE_RASTER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_CommandType_start 29
+#define GEN9_3DSTATE_RASTER_CommandType_start 29
+#define GEN8_3DSTATE_RASTER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Conservative Rasterization Enable */
+
+
+#define GEN10_3DSTATE_RASTER_ConservativeRasterizationEnable_bits 1
+#define GEN9_3DSTATE_RASTER_ConservativeRasterizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ConservativeRasterizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ConservativeRasterizationEnable_start 56
+#define GEN9_3DSTATE_RASTER_ConservativeRasterizationEnable_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ConservativeRasterizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Cull Mode */
+
+
+#define GEN10_3DSTATE_RASTER_CullMode_bits 2
+#define GEN9_3DSTATE_RASTER_CullMode_bits 2
+#define GEN8_3DSTATE_RASTER_CullMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CullMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_CullMode_start 48
+#define GEN9_3DSTATE_RASTER_CullMode_start 48
+#define GEN8_3DSTATE_RASTER_CullMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_CullMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::DWord Length */
+
+
+#define GEN10_3DSTATE_RASTER_DWordLength_bits 8
+#define GEN9_3DSTATE_RASTER_DWordLength_bits 8
+#define GEN8_3DSTATE_RASTER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_DWordLength_start 0
+#define GEN9_3DSTATE_RASTER_DWordLength_start 0
+#define GEN8_3DSTATE_RASTER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::DX Multisample Rasterization Enable */
+
+
+#define GEN10_3DSTATE_RASTER_DXMultisampleRasterizationEnable_bits 1
+#define GEN9_3DSTATE_RASTER_DXMultisampleRasterizationEnable_bits 1
+#define GEN8_3DSTATE_RASTER_DXMultisampleRasterizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DXMultisampleRasterizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_DXMultisampleRasterizationEnable_start 44
+#define GEN9_3DSTATE_RASTER_DXMultisampleRasterizationEnable_start 44
+#define GEN8_3DSTATE_RASTER_DXMultisampleRasterizationEnable_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DXMultisampleRasterizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::DX Multisample Rasterization Mode */
+
+
+#define GEN10_3DSTATE_RASTER_DXMultisampleRasterizationMode_bits 2
+#define GEN9_3DSTATE_RASTER_DXMultisampleRasterizationMode_bits 2
+#define GEN8_3DSTATE_RASTER_DXMultisampleRasterizationMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DXMultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_DXMultisampleRasterizationMode_start 42
+#define GEN9_3DSTATE_RASTER_DXMultisampleRasterizationMode_start 42
+#define GEN8_3DSTATE_RASTER_DXMultisampleRasterizationMode_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_DXMultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Force Multisampling */
+
+
+#define GEN10_3DSTATE_RASTER_ForceMultisampling_bits 1
+#define GEN9_3DSTATE_RASTER_ForceMultisampling_bits 1
+#define GEN8_3DSTATE_RASTER_ForceMultisampling_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ForceMultisampling_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ForceMultisampling_start 46
+#define GEN9_3DSTATE_RASTER_ForceMultisampling_start 46
+#define GEN8_3DSTATE_RASTER_ForceMultisampling_start 46
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ForceMultisampling_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Forced Sample Count */
+
+
+#define GEN10_3DSTATE_RASTER_ForcedSampleCount_bits 3
+#define GEN9_3DSTATE_RASTER_ForcedSampleCount_bits 3
+#define GEN8_3DSTATE_RASTER_ForcedSampleCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ForcedSampleCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ForcedSampleCount_start 50
+#define GEN9_3DSTATE_RASTER_ForcedSampleCount_start 50
+#define GEN8_3DSTATE_RASTER_ForcedSampleCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ForcedSampleCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Front Face Fill Mode */
+
+
+#define GEN10_3DSTATE_RASTER_FrontFaceFillMode_bits 2
+#define GEN9_3DSTATE_RASTER_FrontFaceFillMode_bits 2
+#define GEN8_3DSTATE_RASTER_FrontFaceFillMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_FrontFaceFillMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_FrontFaceFillMode_start 37
+#define GEN9_3DSTATE_RASTER_FrontFaceFillMode_start 37
+#define GEN8_3DSTATE_RASTER_FrontFaceFillMode_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_FrontFaceFillMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Front Winding */
+
+
+#define GEN10_3DSTATE_RASTER_FrontWinding_bits 1
+#define GEN9_3DSTATE_RASTER_FrontWinding_bits 1
+#define GEN8_3DSTATE_RASTER_FrontWinding_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_FrontWinding_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_FrontWinding_start 53
+#define GEN9_3DSTATE_RASTER_FrontWinding_start 53
+#define GEN8_3DSTATE_RASTER_FrontWinding_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_FrontWinding_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Clamp */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetClamp_bits 32
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetClamp_bits 32
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetClamp_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetClamp_start 128
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetClamp_start 128
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetClamp_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Constant */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetConstant_bits 32
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetConstant_bits 32
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetConstant_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetConstant_start 64
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetConstant_start 64
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetConstant_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Enable Point */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_bits 1
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_bits 1
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_start 39
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_start 39
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnablePoint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Enable Solid */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_bits 1
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_bits 1
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_start 41
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_start 41
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnableSolid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 41;
+ case 9: return 41;
+ case 8: return 41;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Enable Wireframe */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_bits 1
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_bits 1
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_start 40
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_start 40
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetEnableWireframe_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Global Depth Offset Scale */
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetScale_bits 32
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetScale_bits 32
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetScale_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_GlobalDepthOffsetScale_start 96
+#define GEN9_3DSTATE_RASTER_GlobalDepthOffsetScale_start 96
+#define GEN8_3DSTATE_RASTER_GlobalDepthOffsetScale_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Scissor Rectangle Enable */
+
+
+#define GEN10_3DSTATE_RASTER_ScissorRectangleEnable_bits 1
+#define GEN9_3DSTATE_RASTER_ScissorRectangleEnable_bits 1
+#define GEN8_3DSTATE_RASTER_ScissorRectangleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ScissorRectangleEnable_start 33
+#define GEN9_3DSTATE_RASTER_ScissorRectangleEnable_start 33
+#define GEN8_3DSTATE_RASTER_ScissorRectangleEnable_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Smooth Point Enable */
+
+
+#define GEN10_3DSTATE_RASTER_SmoothPointEnable_bits 1
+#define GEN9_3DSTATE_RASTER_SmoothPointEnable_bits 1
+#define GEN8_3DSTATE_RASTER_SmoothPointEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_SmoothPointEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_SmoothPointEnable_start 45
+#define GEN9_3DSTATE_RASTER_SmoothPointEnable_start 45
+#define GEN8_3DSTATE_RASTER_SmoothPointEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_SmoothPointEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 45;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Viewport Z Clip Test Enable */
+
+
+#define GEN8_3DSTATE_RASTER_ViewportZClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_3DSTATE_RASTER_ViewportZClipTestEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Viewport Z Far Clip Test Enable */
+
+
+#define GEN10_3DSTATE_RASTER_ViewportZFarClipTestEnable_bits 1
+#define GEN9_3DSTATE_RASTER_ViewportZFarClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZFarClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ViewportZFarClipTestEnable_start 58
+#define GEN9_3DSTATE_RASTER_ViewportZFarClipTestEnable_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZFarClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RASTER::Viewport Z Near Clip Test Enable */
+
+
+#define GEN10_3DSTATE_RASTER_ViewportZNearClipTestEnable_bits 1
+#define GEN9_3DSTATE_RASTER_ViewportZNearClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZNearClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RASTER_ViewportZNearClipTestEnable_start 32
+#define GEN9_3DSTATE_RASTER_ViewportZNearClipTestEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RASTER_ViewportZNearClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::3D Command Opcode */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::3D Command Sub Opcode */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Command SubType */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Command Type */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::DWord Length */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Number of Rasterization Multisamples */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_NumberofRasterizationMultisamples_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample0 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 68;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample0 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample1 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample1 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample10 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_start 148
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample10XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 148;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample10 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample10YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 144;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample11 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_start 156
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample11XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 156;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample11 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_start 152
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample11YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 152;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample12 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_start 164
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample12XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 164;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample12 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample12YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample13 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample13XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 172;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample13 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample13YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 168;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample14 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample14XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 180;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample14 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample14YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample15 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_start 188
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample15XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 188;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample15 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample15YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 184;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample2 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample2XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 84;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample2 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample2YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample3 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample3XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 92;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample3 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample3YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample4 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample4XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 100;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample4 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample4YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample5 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample5XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 108;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample5 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample5YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 104;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample6 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_start 116
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample6XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 116;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample6 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample6YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 112;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample7 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_start 124
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample7XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 124;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample7 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_start 120
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample7YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 120;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample8 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample8XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 132;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample8 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample8YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample9 X Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample9XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 140;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RAST_MULTISAMPLE::Sample9 Y Offset */
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RAST_MULTISAMPLE_Sample9YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 136;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_length 4
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Command SubType */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_bits 2
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_start 27
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Command Type */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_CommandType_bits 3
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_CommandType_start 29
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::DWord Length */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_DWordLength_bits 8
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_DWordLength_start 0
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Global Constant Buffer Address */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_bits 26
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_start 70
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Global Constant Buffer Address High */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_bits 32
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_start 96
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_GlobalConstantBufferAddressHigh_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Operation Load or Store */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_bits 1
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_start 44
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_OperationLoadorStore_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_RS_CONSTANT_POINTER::Shader Select */
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_bits 3
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_start 60
+#define GEN9_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_RS_CONSTANT_POINTER_ShaderSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0 */
+
+
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD0::Entry */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD0_Entry_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1 */
+
+
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Palette Alpha[0:N-1] */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteAlpha0N1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Palette Blue[0:N-1] */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteBlue0N1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Palette Green[0:N-1] */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteGreen0N1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_PALETTE_LOAD1::Palette Red[0:N-1] */
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+#define GEN9_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+#define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+#define GEN75_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_PALETTE_LOAD1_PaletteRed0N1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::Command SubType */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::Command Type */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::DWord Length */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::GS Sampler State Change */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GSSamplerStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::PS Sampler State Change */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PSSamplerStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::Pointer to GS Sampler State */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoGSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::Pointer to PS Sampler State */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoPSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::Pointer to VS Sampler State */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PointertoVSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS::VS Sampler State Change */
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VSSamplerStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_DS::Pointer to DS Sampler State */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start 37
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start 37
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start 37
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start 37
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_DS_PointertoDSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_GS::Pointer to GS Sampler State */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start 37
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start 37
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start 37
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start 37
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_GS_PointertoGSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_HS::Pointer to HS Sampler State */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start 37
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start 37
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start 37
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start 37
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_HS_PointertoHSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_PS::Pointer to PS Sampler State */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start 37
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start 37
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start 37
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start 37
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_PS_PointertoPSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLER_STATE_POINTERS_VS::Pointer to VS Sampler State */
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits 27
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits 27
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits 27
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits 27
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start 37
+#define GEN9_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start 37
+#define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start 37
+#define GEN75_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start 37
+#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLER_STATE_POINTERS_VS_PointertoVSSamplerState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_length 2
+#define GEN9_3DSTATE_SAMPLE_MASK_length 2
+#define GEN8_3DSTATE_SAMPLE_MASK_length 2
+#define GEN75_3DSTATE_SAMPLE_MASK_length 2
+#define GEN7_3DSTATE_SAMPLE_MASK_length 2
+#define GEN6_3DSTATE_SAMPLE_MASK_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+#define GEN75_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+#define GEN7_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+#define GEN6_3DSTATE_SAMPLE_MASK_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+#define GEN75_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+#define GEN7_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+#define GEN6_3DSTATE_SAMPLE_MASK_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+#define GEN75_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+#define GEN7_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+#define GEN6_3DSTATE_SAMPLE_MASK_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLE_MASK_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLE_MASK_CommandType_start 29
+#define GEN75_3DSTATE_SAMPLE_MASK_CommandType_start 29
+#define GEN7_3DSTATE_SAMPLE_MASK_CommandType_start 29
+#define GEN6_3DSTATE_SAMPLE_MASK_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+#define GEN75_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+#define GEN7_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+#define GEN6_3DSTATE_SAMPLE_MASK_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+#define GEN75_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+#define GEN7_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+#define GEN6_3DSTATE_SAMPLE_MASK_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_MASK::Sample Mask */
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_SampleMask_bits 16
+#define GEN9_3DSTATE_SAMPLE_MASK_SampleMask_bits 16
+#define GEN8_3DSTATE_SAMPLE_MASK_SampleMask_bits 16
+#define GEN75_3DSTATE_SAMPLE_MASK_SampleMask_bits 8
+#define GEN7_3DSTATE_SAMPLE_MASK_SampleMask_bits 8
+#define GEN6_3DSTATE_SAMPLE_MASK_SampleMask_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_SampleMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+#define GEN9_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+#define GEN8_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+#define GEN75_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+#define GEN7_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+#define GEN6_3DSTATE_SAMPLE_MASK_SampleMask_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_MASK_SampleMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_length 9
+#define GEN9_3DSTATE_SAMPLE_PATTERN_length 9
+#define GEN8_3DSTATE_SAMPLE_PATTERN_length 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample0 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_start 36
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample0 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_start 32
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample1 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_start 44
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample1 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_start 40
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample10 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_start 116
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_start 116
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample10XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 116;
+ case 9: return 116;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample10 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_start 112
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample10YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample11 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_start 124
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_start 124
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample11XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 124;
+ case 9: return 124;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample11 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_start 120
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_start 120
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample11YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 120;
+ case 9: return 120;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample12 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_start 132
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample12XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 132;
+ case 9: return 132;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample12 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_start 128
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample12YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample13 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_start 140
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample13XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 140;
+ case 9: return 140;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample13 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_start 136
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample13YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 136;
+ case 9: return 136;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample14 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_start 148
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_start 148
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample14XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 148;
+ case 9: return 148;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample14 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_start 144
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample14YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample15 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_start 156
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_start 156
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample15XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 156;
+ case 9: return 156;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample15 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_start 152
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_start 152
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample15YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 152;
+ case 9: return 152;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample2 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_start 52
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample2XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample2 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_start 48
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample2YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample3 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_start 60
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample3XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample3 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_start 56
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample3YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample4 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_start 68
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample4XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 68;
+ case 9: return 68;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample4 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_start 64
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample4YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample5 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_start 76
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample5XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 76;
+ case 9: return 76;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample5 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_start 72
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample5YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample6 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_start 84
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample6XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 84;
+ case 9: return 84;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample6 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_start 80
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample6YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample7 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_start 92
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample7XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 92;
+ case 9: return 92;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample7 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_start 88
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample7YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample8 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_start 100
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample8XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 100;
+ case 9: return 100;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample8 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_start 96
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample8YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample9 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_start 108
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample9XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::16x Sample9 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_start 104
+#define GEN9_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_16xSample9YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 104;
+ case 9: return 104;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::1x Sample0 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_start 276
+#define GEN9_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_start 276
+#define GEN8_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_start 276
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_1xSample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 276;
+ case 9: return 276;
+ case 8: return 276;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::1x Sample0 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_start 272
+#define GEN9_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_start 272
+#define GEN8_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_1xSample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::2x Sample0 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_start 260
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_start 260
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_start 260
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 260;
+ case 9: return 260;
+ case 8: return 260;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::2x Sample0 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_start 256
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_start 256
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::2x Sample1 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_start 268
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_start 268
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_start 268
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 268;
+ case 9: return 268;
+ case 8: return 268;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::2x Sample1 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_start 264
+#define GEN9_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_start 264
+#define GEN8_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_start 264
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_2xSample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 264;
+ case 9: return 264;
+ case 8: return 264;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample0 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_start 228
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_start 228
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_start 228
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 228;
+ case 9: return 228;
+ case 8: return 228;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample0 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_start 224
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_start 224
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample1 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_start 236
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_start 236
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_start 236
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 236;
+ case 9: return 236;
+ case 8: return 236;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample1 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_start 232
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_start 232
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_start 232
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 232;
+ case 9: return 232;
+ case 8: return 232;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample2 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_start 244
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_start 244
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_start 244
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample2XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 244;
+ case 9: return 244;
+ case 8: return 244;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample2 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_start 240
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_start 240
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_start 240
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample2YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 240;
+ case 9: return 240;
+ case 8: return 240;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample3 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_start 252
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_start 252
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_start 252
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample3XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 252;
+ case 9: return 252;
+ case 8: return 252;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::4x Sample3 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_start 248
+#define GEN9_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_start 248
+#define GEN8_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_start 248
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_4xSample3YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 248;
+ case 9: return 248;
+ case 8: return 248;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample0 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_start 196
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_start 196
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_start 196
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample0XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 196;
+ case 9: return 196;
+ case 8: return 196;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample0 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_start 192
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_start 192
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample0YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample1 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_start 204
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_start 204
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_start 204
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample1XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 204;
+ case 9: return 204;
+ case 8: return 204;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample1 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_start 200
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_start 200
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_start 200
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample1YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 200;
+ case 9: return 200;
+ case 8: return 200;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample2 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_start 212
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_start 212
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_start 212
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample2XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 212;
+ case 9: return 212;
+ case 8: return 212;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample2 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_start 208
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_start 208
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample2YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample3 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_start 220
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_start 220
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_start 220
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample3XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 220;
+ case 9: return 220;
+ case 8: return 220;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample3 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_start 216
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_start 216
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample3YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 216;
+ case 9: return 216;
+ case 8: return 216;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample4 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_start 164
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_start 164
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_start 164
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample4XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 164;
+ case 9: return 164;
+ case 8: return 164;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample4 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_start 160
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_start 160
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample4YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample5 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_start 172
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_start 172
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample5XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 172;
+ case 9: return 172;
+ case 8: return 172;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample5 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_start 168
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_start 168
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample5YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 168;
+ case 9: return 168;
+ case 8: return 168;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample6 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_start 180
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_start 180
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample6XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 180;
+ case 9: return 180;
+ case 8: return 180;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample6 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_start 176
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_start 176
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample6YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 176;
+ case 9: return 176;
+ case 8: return 176;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample7 X Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_start 188
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_start 188
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_start 188
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample7XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 188;
+ case 9: return 188;
+ case 8: return 188;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::8x Sample7 Y Offset */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_bits 4
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_bits 4
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_start 184
+#define GEN9_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_start 184
+#define GEN8_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_8xSample7YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 184;
+ case 9: return 184;
+ case 8: return 184;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::Command SubType */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_CommandSubType_bits 2
+#define GEN9_3DSTATE_SAMPLE_PATTERN_CommandSubType_bits 2
+#define GEN8_3DSTATE_SAMPLE_PATTERN_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_CommandSubType_start 27
+#define GEN9_3DSTATE_SAMPLE_PATTERN_CommandSubType_start 27
+#define GEN8_3DSTATE_SAMPLE_PATTERN_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::Command Type */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_CommandType_bits 3
+#define GEN9_3DSTATE_SAMPLE_PATTERN_CommandType_bits 3
+#define GEN8_3DSTATE_SAMPLE_PATTERN_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_CommandType_start 29
+#define GEN9_3DSTATE_SAMPLE_PATTERN_CommandType_start 29
+#define GEN8_3DSTATE_SAMPLE_PATTERN_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SAMPLE_PATTERN::DWord Length */
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_DWordLength_bits 8
+#define GEN9_3DSTATE_SAMPLE_PATTERN_DWordLength_bits 8
+#define GEN8_3DSTATE_SAMPLE_PATTERN_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SAMPLE_PATTERN_DWordLength_start 0
+#define GEN9_3DSTATE_SAMPLE_PATTERN_DWordLength_start 0
+#define GEN8_3DSTATE_SAMPLE_PATTERN_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SAMPLE_PATTERN_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE */
+
+
+#define GEN10_3DSTATE_SBE_length 6
+#define GEN9_3DSTATE_SBE_length 6
+#define GEN8_3DSTATE_SBE_length 4
+#define GEN75_3DSTATE_SBE_length 14
+#define GEN7_3DSTATE_SBE_length 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SBE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SBE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SBE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SBE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SBE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SBE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SBE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SBE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SBE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SBE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SBE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SBE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SBE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SBE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SBE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SBE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SBE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SBE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute */
+
+
+#define GEN75_3DSTATE_SBE_Attribute_bits 16
+#define GEN7_3DSTATE_SBE_Attribute_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute_start 0
+#define GEN7_3DSTATE_SBE_Attribute_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 0 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute0WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute0WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute0WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute0WrapShortestEnables_start 384
+#define GEN7_3DSTATE_SBE_Attribute0WrapShortestEnables_start 384
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute0WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 384;
+ } else {
+ return 384;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 1 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute1WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute1WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute1WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute1WrapShortestEnables_start 388
+#define GEN7_3DSTATE_SBE_Attribute1WrapShortestEnables_start 388
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute1WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 388;
+ } else {
+ return 388;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 10 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute10WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute10WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute10WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute10WrapShortestEnables_start 424
+#define GEN7_3DSTATE_SBE_Attribute10WrapShortestEnables_start 424
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute10WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 424;
+ } else {
+ return 424;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 11 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute11WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute11WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute11WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute11WrapShortestEnables_start 428
+#define GEN7_3DSTATE_SBE_Attribute11WrapShortestEnables_start 428
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute11WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 428;
+ } else {
+ return 428;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 12 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute12WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute12WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute12WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute12WrapShortestEnables_start 432
+#define GEN7_3DSTATE_SBE_Attribute12WrapShortestEnables_start 432
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute12WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 432;
+ } else {
+ return 432;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 13 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute13WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute13WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute13WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute13WrapShortestEnables_start 436
+#define GEN7_3DSTATE_SBE_Attribute13WrapShortestEnables_start 436
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute13WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 436;
+ } else {
+ return 436;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 14 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute14WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute14WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute14WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute14WrapShortestEnables_start 440
+#define GEN7_3DSTATE_SBE_Attribute14WrapShortestEnables_start 440
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute14WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 440;
+ } else {
+ return 440;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 15 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute15WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute15WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute15WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute15WrapShortestEnables_start 444
+#define GEN7_3DSTATE_SBE_Attribute15WrapShortestEnables_start 444
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute15WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 444;
+ } else {
+ return 444;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 2 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute2WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute2WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute2WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute2WrapShortestEnables_start 392
+#define GEN7_3DSTATE_SBE_Attribute2WrapShortestEnables_start 392
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute2WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 392;
+ } else {
+ return 392;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 3 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute3WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute3WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute3WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute3WrapShortestEnables_start 396
+#define GEN7_3DSTATE_SBE_Attribute3WrapShortestEnables_start 396
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute3WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 396;
+ } else {
+ return 396;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 4 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute4WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute4WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute4WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute4WrapShortestEnables_start 400
+#define GEN7_3DSTATE_SBE_Attribute4WrapShortestEnables_start 400
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute4WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 400;
+ } else {
+ return 400;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 5 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute5WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute5WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute5WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute5WrapShortestEnables_start 404
+#define GEN7_3DSTATE_SBE_Attribute5WrapShortestEnables_start 404
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute5WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 404;
+ } else {
+ return 404;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 6 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute6WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute6WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute6WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute6WrapShortestEnables_start 408
+#define GEN7_3DSTATE_SBE_Attribute6WrapShortestEnables_start 408
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute6WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 408;
+ } else {
+ return 408;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 7 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute7WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute7WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute7WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute7WrapShortestEnables_start 412
+#define GEN7_3DSTATE_SBE_Attribute7WrapShortestEnables_start 412
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute7WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 412;
+ } else {
+ return 412;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 8 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute8WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute8WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute8WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute8WrapShortestEnables_start 416
+#define GEN7_3DSTATE_SBE_Attribute8WrapShortestEnables_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute8WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 416;
+ } else {
+ return 416;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute 9 WrapShortest Enables */
+
+
+#define GEN75_3DSTATE_SBE_Attribute9WrapShortestEnables_bits 4
+#define GEN7_3DSTATE_SBE_Attribute9WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute9WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_Attribute9WrapShortestEnables_start 420
+#define GEN7_3DSTATE_SBE_Attribute9WrapShortestEnables_start 420
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_Attribute9WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 420;
+ } else {
+ return 420;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute Active Component Format */
+
+
+#define GEN10_3DSTATE_SBE_AttributeActiveComponentFormat_bits 2
+#define GEN9_3DSTATE_SBE_AttributeActiveComponentFormat_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeActiveComponentFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_AttributeActiveComponentFormat_start 0
+#define GEN9_3DSTATE_SBE_AttributeActiveComponentFormat_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeActiveComponentFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute Swizzle Control Mode */
+
+
+#define GEN75_3DSTATE_SBE_AttributeSwizzleControlMode_bits 1
+#define GEN7_3DSTATE_SBE_AttributeSwizzleControlMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeSwizzleControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SBE_AttributeSwizzleControlMode_start 60
+#define GEN7_3DSTATE_SBE_AttributeSwizzleControlMode_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeSwizzleControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 60;
+ } else {
+ return 60;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Attribute Swizzle Enable */
+
+
+#define GEN10_3DSTATE_SBE_AttributeSwizzleEnable_bits 1
+#define GEN9_3DSTATE_SBE_AttributeSwizzleEnable_bits 1
+#define GEN8_3DSTATE_SBE_AttributeSwizzleEnable_bits 1
+#define GEN75_3DSTATE_SBE_AttributeSwizzleEnable_bits 1
+#define GEN7_3DSTATE_SBE_AttributeSwizzleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeSwizzleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_AttributeSwizzleEnable_start 53
+#define GEN9_3DSTATE_SBE_AttributeSwizzleEnable_start 53
+#define GEN8_3DSTATE_SBE_AttributeSwizzleEnable_start 53
+#define GEN75_3DSTATE_SBE_AttributeSwizzleEnable_start 53
+#define GEN7_3DSTATE_SBE_AttributeSwizzleEnable_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_AttributeSwizzleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 53;
+ } else {
+ return 53;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Command SubType */
+
+
+#define GEN10_3DSTATE_SBE_CommandSubType_bits 2
+#define GEN9_3DSTATE_SBE_CommandSubType_bits 2
+#define GEN8_3DSTATE_SBE_CommandSubType_bits 2
+#define GEN75_3DSTATE_SBE_CommandSubType_bits 2
+#define GEN7_3DSTATE_SBE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_CommandSubType_start 27
+#define GEN9_3DSTATE_SBE_CommandSubType_start 27
+#define GEN8_3DSTATE_SBE_CommandSubType_start 27
+#define GEN75_3DSTATE_SBE_CommandSubType_start 27
+#define GEN7_3DSTATE_SBE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Command Type */
+
+
+#define GEN10_3DSTATE_SBE_CommandType_bits 3
+#define GEN9_3DSTATE_SBE_CommandType_bits 3
+#define GEN8_3DSTATE_SBE_CommandType_bits 3
+#define GEN75_3DSTATE_SBE_CommandType_bits 3
+#define GEN7_3DSTATE_SBE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_CommandType_start 29
+#define GEN9_3DSTATE_SBE_CommandType_start 29
+#define GEN8_3DSTATE_SBE_CommandType_start 29
+#define GEN75_3DSTATE_SBE_CommandType_start 29
+#define GEN7_3DSTATE_SBE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Constant Interpolation Enable */
+
+
+#define GEN10_3DSTATE_SBE_ConstantInterpolationEnable_bits 32
+#define GEN9_3DSTATE_SBE_ConstantInterpolationEnable_bits 32
+#define GEN8_3DSTATE_SBE_ConstantInterpolationEnable_bits 32
+#define GEN75_3DSTATE_SBE_ConstantInterpolationEnable_bits 32
+#define GEN7_3DSTATE_SBE_ConstantInterpolationEnable_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ConstantInterpolationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_ConstantInterpolationEnable_start 96
+#define GEN9_3DSTATE_SBE_ConstantInterpolationEnable_start 96
+#define GEN8_3DSTATE_SBE_ConstantInterpolationEnable_start 96
+#define GEN75_3DSTATE_SBE_ConstantInterpolationEnable_start 352
+#define GEN7_3DSTATE_SBE_ConstantInterpolationEnable_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ConstantInterpolationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 352;
+ } else {
+ return 352;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::DWord Length */
+
+
+#define GEN10_3DSTATE_SBE_DWordLength_bits 8
+#define GEN9_3DSTATE_SBE_DWordLength_bits 8
+#define GEN8_3DSTATE_SBE_DWordLength_bits 8
+#define GEN75_3DSTATE_SBE_DWordLength_bits 8
+#define GEN7_3DSTATE_SBE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_DWordLength_start 0
+#define GEN9_3DSTATE_SBE_DWordLength_start 0
+#define GEN8_3DSTATE_SBE_DWordLength_start 0
+#define GEN75_3DSTATE_SBE_DWordLength_start 0
+#define GEN7_3DSTATE_SBE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Force Vertex URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_SBE_ForceVertexURBEntryReadLength_bits 1
+#define GEN9_3DSTATE_SBE_ForceVertexURBEntryReadLength_bits 1
+#define GEN8_3DSTATE_SBE_ForceVertexURBEntryReadLength_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ForceVertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_ForceVertexURBEntryReadLength_start 61
+#define GEN9_3DSTATE_SBE_ForceVertexURBEntryReadLength_start 61
+#define GEN8_3DSTATE_SBE_ForceVertexURBEntryReadLength_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ForceVertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Force Vertex URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_SBE_ForceVertexURBEntryReadOffset_bits 1
+#define GEN9_3DSTATE_SBE_ForceVertexURBEntryReadOffset_bits 1
+#define GEN8_3DSTATE_SBE_ForceVertexURBEntryReadOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ForceVertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_ForceVertexURBEntryReadOffset_start 60
+#define GEN9_3DSTATE_SBE_ForceVertexURBEntryReadOffset_start 60
+#define GEN8_3DSTATE_SBE_ForceVertexURBEntryReadOffset_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_ForceVertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Number of SF Output Attributes */
+
+
+#define GEN10_3DSTATE_SBE_NumberofSFOutputAttributes_bits 6
+#define GEN9_3DSTATE_SBE_NumberofSFOutputAttributes_bits 6
+#define GEN8_3DSTATE_SBE_NumberofSFOutputAttributes_bits 6
+#define GEN75_3DSTATE_SBE_NumberofSFOutputAttributes_bits 6
+#define GEN7_3DSTATE_SBE_NumberofSFOutputAttributes_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_NumberofSFOutputAttributes_start 54
+#define GEN9_3DSTATE_SBE_NumberofSFOutputAttributes_start 54
+#define GEN8_3DSTATE_SBE_NumberofSFOutputAttributes_start 54
+#define GEN75_3DSTATE_SBE_NumberofSFOutputAttributes_start 54
+#define GEN7_3DSTATE_SBE_NumberofSFOutputAttributes_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 54;
+ } else {
+ return 54;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Point Sprite Texture Coordinate Enable */
+
+
+#define GEN10_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits 32
+#define GEN9_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits 32
+#define GEN8_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits 32
+#define GEN75_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits 32
+#define GEN7_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start 64
+#define GEN9_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start 64
+#define GEN8_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start 64
+#define GEN75_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start 320
+#define GEN7_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PointSpriteTextureCoordinateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 320;
+ } else {
+ return 320;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Point Sprite Texture Coordinate Origin */
+
+
+#define GEN10_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits 1
+#define GEN9_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits 1
+#define GEN8_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits 1
+#define GEN75_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits 1
+#define GEN7_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start 52
+#define GEN9_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start 52
+#define GEN8_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start 52
+#define GEN75_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start 52
+#define GEN7_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PointSpriteTextureCoordinateOrigin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Primitive ID Override Attribute Select */
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_bits 5
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_bits 5
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_start 32
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_start 32
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideAttributeSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Primitive ID Override Component W */
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentW_bits 1
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentW_bits 1
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentW_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentW_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentW_start 51
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentW_start 51
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentW_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentW_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Primitive ID Override Component X */
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentX_bits 1
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentX_bits 1
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentX_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentX_start 48
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentX_start 48
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentX_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Primitive ID Override Component Y */
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentY_bits 1
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentY_bits 1
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentY_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentY_start 49
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentY_start 49
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentY_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 49;
+ case 8: return 49;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Primitive ID Override Component Z */
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_bits 1
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_bits 1
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_start 50
+#define GEN9_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_start 50
+#define GEN8_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_PrimitiveIDOverrideComponentZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Vertex URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_SBE_VertexURBEntryReadLength_bits 5
+#define GEN9_3DSTATE_SBE_VertexURBEntryReadLength_bits 5
+#define GEN8_3DSTATE_SBE_VertexURBEntryReadLength_bits 5
+#define GEN75_3DSTATE_SBE_VertexURBEntryReadLength_bits 5
+#define GEN7_3DSTATE_SBE_VertexURBEntryReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_VertexURBEntryReadLength_start 43
+#define GEN9_3DSTATE_SBE_VertexURBEntryReadLength_start 43
+#define GEN8_3DSTATE_SBE_VertexURBEntryReadLength_start 43
+#define GEN75_3DSTATE_SBE_VertexURBEntryReadLength_start 43
+#define GEN7_3DSTATE_SBE_VertexURBEntryReadLength_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE::Vertex URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_SBE_VertexURBEntryReadOffset_bits 6
+#define GEN9_3DSTATE_SBE_VertexURBEntryReadOffset_bits 6
+#define GEN8_3DSTATE_SBE_VertexURBEntryReadOffset_bits 6
+#define GEN75_3DSTATE_SBE_VertexURBEntryReadOffset_bits 6
+#define GEN7_3DSTATE_SBE_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_VertexURBEntryReadOffset_start 37
+#define GEN9_3DSTATE_SBE_VertexURBEntryReadOffset_start 37
+#define GEN8_3DSTATE_SBE_VertexURBEntryReadOffset_start 37
+#define GEN75_3DSTATE_SBE_VertexURBEntryReadOffset_start 36
+#define GEN7_3DSTATE_SBE_VertexURBEntryReadOffset_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_length 11
+#define GEN9_3DSTATE_SBE_SWIZ_length 11
+#define GEN8_3DSTATE_SBE_SWIZ_length 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SBE_SWIZ_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SBE_SWIZ_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SBE_SWIZ_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SBE_SWIZ_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::Attribute */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_Attribute_bits 16
+#define GEN9_3DSTATE_SBE_SWIZ_Attribute_bits 16
+#define GEN8_3DSTATE_SBE_SWIZ_Attribute_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_Attribute_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_Attribute_start 0
+#define GEN9_3DSTATE_SBE_SWIZ_Attribute_start 0
+#define GEN8_3DSTATE_SBE_SWIZ_Attribute_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_Attribute_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::Attribute Wrap Shortest Enables */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_bits 4
+#define GEN9_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_bits 4
+#define GEN8_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_start 0
+#define GEN9_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_start 0
+#define GEN8_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_AttributeWrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::Command SubType */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_CommandSubType_bits 2
+#define GEN9_3DSTATE_SBE_SWIZ_CommandSubType_bits 2
+#define GEN8_3DSTATE_SBE_SWIZ_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_CommandSubType_start 27
+#define GEN9_3DSTATE_SBE_SWIZ_CommandSubType_start 27
+#define GEN8_3DSTATE_SBE_SWIZ_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::Command Type */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_CommandType_bits 3
+#define GEN9_3DSTATE_SBE_SWIZ_CommandType_bits 3
+#define GEN8_3DSTATE_SBE_SWIZ_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_CommandType_start 29
+#define GEN9_3DSTATE_SBE_SWIZ_CommandType_start 29
+#define GEN8_3DSTATE_SBE_SWIZ_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SBE_SWIZ::DWord Length */
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_DWordLength_bits 8
+#define GEN9_3DSTATE_SBE_SWIZ_DWordLength_bits 8
+#define GEN8_3DSTATE_SBE_SWIZ_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SBE_SWIZ_DWordLength_start 0
+#define GEN9_3DSTATE_SBE_SWIZ_DWordLength_start 0
+#define GEN8_3DSTATE_SBE_SWIZ_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SBE_SWIZ_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::Command SubType */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::Command Type */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::DWord Length */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SCISSOR_STATE_POINTERS::Scissor Rect Pointer */
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+#define GEN9_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+#define GEN8_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+#define GEN75_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+#define GEN7_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+#define GEN6_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SCISSOR_STATE_POINTERS_ScissorRectPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF */
+
+
+#define GEN10_3DSTATE_SF_length 4
+#define GEN9_3DSTATE_SF_length 4
+#define GEN8_3DSTATE_SF_length 4
+#define GEN75_3DSTATE_SF_length 7
+#define GEN7_3DSTATE_SF_length 7
+#define GEN6_3DSTATE_SF_length 20
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SF_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SF_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SF_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SF_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SF_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_SF_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SF_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SF_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SF_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SF_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_SF_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SF_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SF_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SF_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SF_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SF_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_SF_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SF_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SF_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SF_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SF_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_SF_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::AA Line Distance Mode */
+
+
+#define GEN10_3DSTATE_SF_AALineDistanceMode_bits 1
+#define GEN9_3DSTATE_SF_AALineDistanceMode_bits 1
+#define GEN8_3DSTATE_SF_AALineDistanceMode_bits 1
+#define GEN75_3DSTATE_SF_AALineDistanceMode_bits 1
+#define GEN7_3DSTATE_SF_AALineDistanceMode_bits 1
+#define GEN6_3DSTATE_SF_AALineDistanceMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AALineDistanceMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_AALineDistanceMode_start 110
+#define GEN9_3DSTATE_SF_AALineDistanceMode_start 110
+#define GEN8_3DSTATE_SF_AALineDistanceMode_start 110
+#define GEN75_3DSTATE_SF_AALineDistanceMode_start 110
+#define GEN7_3DSTATE_SF_AALineDistanceMode_start 110
+#define GEN6_3DSTATE_SF_AALineDistanceMode_start 142
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AALineDistanceMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 110;
+ case 9: return 110;
+ case 8: return 110;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 110;
+ } else {
+ return 110;
+ }
+ case 6: return 142;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Anti-Aliasing Enable */
+
+
+#define GEN75_3DSTATE_SF_AntiAliasingEnable_bits 1
+#define GEN7_3DSTATE_SF_AntiAliasingEnable_bits 1
+#define GEN6_3DSTATE_SF_AntiAliasingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AntiAliasingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_AntiAliasingEnable_start 95
+#define GEN7_3DSTATE_SF_AntiAliasingEnable_start 95
+#define GEN6_3DSTATE_SF_AntiAliasingEnable_start 127
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AntiAliasingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 127;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute */
+
+
+#define GEN6_3DSTATE_SF_Attribute_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 0 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute0WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute0WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute0WrapShortestEnables_start 576
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute0WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 576;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 1 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute1WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute1WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute1WrapShortestEnables_start 580
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute1WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 580;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 10 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute10WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute10WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute10WrapShortestEnables_start 616
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute10WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 616;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 11 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute11WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute11WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute11WrapShortestEnables_start 620
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute11WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 620;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 12 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute12WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute12WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute12WrapShortestEnables_start 624
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute12WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 624;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 13 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute13WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute13WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute13WrapShortestEnables_start 628
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute13WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 628;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 14 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute14WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute14WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute14WrapShortestEnables_start 632
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute14WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 632;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 15 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute15WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute15WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute15WrapShortestEnables_start 636
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute15WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 636;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 2 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute2WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute2WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute2WrapShortestEnables_start 584
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute2WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 584;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 3 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute3WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute3WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute3WrapShortestEnables_start 588
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute3WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 588;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 4 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute4WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute4WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute4WrapShortestEnables_start 592
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute4WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 592;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 5 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute5WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute5WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute5WrapShortestEnables_start 596
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute5WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 596;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 6 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute6WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute6WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute6WrapShortestEnables_start 600
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute6WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 600;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 7 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute7WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute7WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute7WrapShortestEnables_start 604
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute7WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 604;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 8 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute8WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute8WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute8WrapShortestEnables_start 608
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute8WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 608;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute 9 WrapShortest Enables */
+
+
+#define GEN6_3DSTATE_SF_Attribute9WrapShortestEnables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute9WrapShortestEnables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_Attribute9WrapShortestEnables_start 612
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_Attribute9WrapShortestEnables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 612;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Attribute Swizzle Enable */
+
+
+#define GEN6_3DSTATE_SF_AttributeSwizzleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AttributeSwizzleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_AttributeSwizzleEnable_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_AttributeSwizzleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 53;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::BackFace Fill Mode */
+
+
+#define GEN75_3DSTATE_SF_BackFaceFillMode_bits 2
+#define GEN7_3DSTATE_SF_BackFaceFillMode_bits 2
+#define GEN6_3DSTATE_SF_BackFaceFillMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_BackFaceFillMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_BackFaceFillMode_start 35
+#define GEN7_3DSTATE_SF_BackFaceFillMode_start 35
+#define GEN6_3DSTATE_SF_BackFaceFillMode_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_BackFaceFillMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 35;
+ } else {
+ return 35;
+ }
+ case 6: return 67;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::CHV Line Width */
+
+
+#define GEN8_3DSTATE_SF_CHVLineWidth_bits 18
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CHVLineWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_3DSTATE_SF_CHVLineWidth_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CHVLineWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Command SubType */
+
+
+#define GEN10_3DSTATE_SF_CommandSubType_bits 2
+#define GEN9_3DSTATE_SF_CommandSubType_bits 2
+#define GEN8_3DSTATE_SF_CommandSubType_bits 2
+#define GEN75_3DSTATE_SF_CommandSubType_bits 2
+#define GEN7_3DSTATE_SF_CommandSubType_bits 2
+#define GEN6_3DSTATE_SF_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_CommandSubType_start 27
+#define GEN9_3DSTATE_SF_CommandSubType_start 27
+#define GEN8_3DSTATE_SF_CommandSubType_start 27
+#define GEN75_3DSTATE_SF_CommandSubType_start 27
+#define GEN7_3DSTATE_SF_CommandSubType_start 27
+#define GEN6_3DSTATE_SF_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Command Type */
+
+
+#define GEN10_3DSTATE_SF_CommandType_bits 3
+#define GEN9_3DSTATE_SF_CommandType_bits 3
+#define GEN8_3DSTATE_SF_CommandType_bits 3
+#define GEN75_3DSTATE_SF_CommandType_bits 3
+#define GEN7_3DSTATE_SF_CommandType_bits 3
+#define GEN6_3DSTATE_SF_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_CommandType_start 29
+#define GEN9_3DSTATE_SF_CommandType_start 29
+#define GEN8_3DSTATE_SF_CommandType_start 29
+#define GEN75_3DSTATE_SF_CommandType_start 29
+#define GEN7_3DSTATE_SF_CommandType_start 29
+#define GEN6_3DSTATE_SF_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Constant Interpolation Enable */
+
+
+#define GEN6_3DSTATE_SF_ConstantInterpolationEnable_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ConstantInterpolationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_ConstantInterpolationEnable_start 544
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ConstantInterpolationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 544;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Cull Mode */
+
+
+#define GEN75_3DSTATE_SF_CullMode_bits 2
+#define GEN7_3DSTATE_SF_CullMode_bits 2
+#define GEN6_3DSTATE_SF_CullMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CullMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_CullMode_start 93
+#define GEN7_3DSTATE_SF_CullMode_start 93
+#define GEN6_3DSTATE_SF_CullMode_start 125
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_CullMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 93;
+ } else {
+ return 93;
+ }
+ case 6: return 125;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::DWord Length */
+
+
+#define GEN10_3DSTATE_SF_DWordLength_bits 8
+#define GEN9_3DSTATE_SF_DWordLength_bits 8
+#define GEN8_3DSTATE_SF_DWordLength_bits 8
+#define GEN75_3DSTATE_SF_DWordLength_bits 8
+#define GEN7_3DSTATE_SF_DWordLength_bits 8
+#define GEN6_3DSTATE_SF_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_DWordLength_start 0
+#define GEN9_3DSTATE_SF_DWordLength_start 0
+#define GEN8_3DSTATE_SF_DWordLength_start 0
+#define GEN75_3DSTATE_SF_DWordLength_start 0
+#define GEN7_3DSTATE_SF_DWordLength_start 0
+#define GEN6_3DSTATE_SF_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Depth Buffer Surface Format */
+
+
+#define GEN75_3DSTATE_SF_DepthBufferSurfaceFormat_bits 3
+#define GEN7_3DSTATE_SF_DepthBufferSurfaceFormat_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_DepthBufferSurfaceFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_DepthBufferSurfaceFormat_start 44
+#define GEN7_3DSTATE_SF_DepthBufferSurfaceFormat_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_DepthBufferSurfaceFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Front Winding */
+
+
+#define GEN75_3DSTATE_SF_FrontWinding_bits 1
+#define GEN7_3DSTATE_SF_FrontWinding_bits 1
+#define GEN6_3DSTATE_SF_FrontWinding_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_FrontWinding_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_FrontWinding_start 32
+#define GEN7_3DSTATE_SF_FrontWinding_start 32
+#define GEN6_3DSTATE_SF_FrontWinding_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_FrontWinding_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::FrontFace Fill Mode */
+
+
+#define GEN75_3DSTATE_SF_FrontFaceFillMode_bits 2
+#define GEN7_3DSTATE_SF_FrontFaceFillMode_bits 2
+#define GEN6_3DSTATE_SF_FrontFaceFillMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_FrontFaceFillMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_FrontFaceFillMode_start 37
+#define GEN7_3DSTATE_SF_FrontFaceFillMode_start 37
+#define GEN6_3DSTATE_SF_FrontFaceFillMode_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_FrontFaceFillMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Clamp */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetClamp_bits 32
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetClamp_bits 32
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetClamp_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetClamp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetClamp_start 192
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetClamp_start 192
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetClamp_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetClamp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 224;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Constant */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetConstant_bits 32
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetConstant_bits 32
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetConstant_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetConstant_start 128
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetConstant_start 128
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetConstant_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Enable Point */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnablePoint_bits 1
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnablePoint_bits 1
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnablePoint_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnablePoint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnablePoint_start 39
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnablePoint_start 39
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnablePoint_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnablePoint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 39;
+ }
+ case 6: return 71;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Enable Solid */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnableSolid_bits 1
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnableSolid_bits 1
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnableSolid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnableSolid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnableSolid_start 41
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnableSolid_start 41
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnableSolid_start 73
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnableSolid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 41;
+ } else {
+ return 41;
+ }
+ case 6: return 73;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Enable Wireframe */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_bits 1
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_bits 1
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_start 40
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_start 40
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetEnableWireframe_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Global Depth Offset Scale */
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetScale_bits 32
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetScale_bits 32
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetScale_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_GlobalDepthOffsetScale_start 160
+#define GEN7_3DSTATE_SF_GlobalDepthOffsetScale_start 160
+#define GEN6_3DSTATE_SF_GlobalDepthOffsetScale_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 192;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Last Pixel Enable */
+
+
+#define GEN10_3DSTATE_SF_LastPixelEnable_bits 1
+#define GEN9_3DSTATE_SF_LastPixelEnable_bits 1
+#define GEN8_3DSTATE_SF_LastPixelEnable_bits 1
+#define GEN75_3DSTATE_SF_LastPixelEnable_bits 1
+#define GEN7_3DSTATE_SF_LastPixelEnable_bits 1
+#define GEN6_3DSTATE_SF_LastPixelEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LastPixelEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_LastPixelEnable_start 127
+#define GEN9_3DSTATE_SF_LastPixelEnable_start 127
+#define GEN8_3DSTATE_SF_LastPixelEnable_start 127
+#define GEN75_3DSTATE_SF_LastPixelEnable_start 127
+#define GEN7_3DSTATE_SF_LastPixelEnable_start 127
+#define GEN6_3DSTATE_SF_LastPixelEnable_start 159
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LastPixelEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 127;
+ case 9: return 127;
+ case 8: return 127;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 127;
+ } else {
+ return 127;
+ }
+ case 6: return 159;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Legacy Global Depth Bias Enable */
+
+
+#define GEN10_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN9_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN8_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN75_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN7_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN6_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LegacyGlobalDepthBiasEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 43
+#define GEN9_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 43
+#define GEN8_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 43
+#define GEN75_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 43
+#define GEN7_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 43
+#define GEN6_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LegacyGlobalDepthBiasEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 75;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Line End Cap Antialiasing Region Width */
+
+
+#define GEN10_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN9_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN8_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN75_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN7_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN6_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 80
+#define GEN9_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 80
+#define GEN8_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 80
+#define GEN75_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 80
+#define GEN7_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 80
+#define GEN6_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 112;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Line Stipple Enable */
+
+
+#define GEN75_3DSTATE_SF_LineStippleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineStippleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_LineStippleEnable_start 78
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineStippleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 78;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Line Strip/List Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_SF_LineStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_LineStripListProvokingVertexSelect_start 123
+#define GEN9_3DSTATE_SF_LineStripListProvokingVertexSelect_start 123
+#define GEN8_3DSTATE_SF_LineStripListProvokingVertexSelect_start 123
+#define GEN75_3DSTATE_SF_LineStripListProvokingVertexSelect_start 123
+#define GEN7_3DSTATE_SF_LineStripListProvokingVertexSelect_start 123
+#define GEN6_3DSTATE_SF_LineStripListProvokingVertexSelect_start 155
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 123;
+ case 9: return 123;
+ case 8: return 123;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 123;
+ } else {
+ return 123;
+ }
+ case 6: return 155;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Line Width */
+
+
+#define GEN10_3DSTATE_SF_LineWidth_bits 18
+#define GEN9_3DSTATE_SF_LineWidth_bits 18
+#define GEN8_3DSTATE_SF_LineWidth_bits 10
+#define GEN75_3DSTATE_SF_LineWidth_bits 10
+#define GEN7_3DSTATE_SF_LineWidth_bits 10
+#define GEN6_3DSTATE_SF_LineWidth_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_LineWidth_start 44
+#define GEN9_3DSTATE_SF_LineWidth_start 44
+#define GEN8_3DSTATE_SF_LineWidth_start 82
+#define GEN75_3DSTATE_SF_LineWidth_start 82
+#define GEN7_3DSTATE_SF_LineWidth_start 82
+#define GEN6_3DSTATE_SF_LineWidth_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_LineWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 82;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 82;
+ } else {
+ return 82;
+ }
+ case 6: return 114;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Multisample Rasterization Mode */
+
+
+#define GEN75_3DSTATE_SF_MultisampleRasterizationMode_bits 2
+#define GEN7_3DSTATE_SF_MultisampleRasterizationMode_bits 2
+#define GEN6_3DSTATE_SF_MultisampleRasterizationMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_MultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_MultisampleRasterizationMode_start 72
+#define GEN7_3DSTATE_SF_MultisampleRasterizationMode_start 72
+#define GEN6_3DSTATE_SF_MultisampleRasterizationMode_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_MultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 104;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Number of SF Output Attributes */
+
+
+#define GEN6_3DSTATE_SF_NumberofSFOutputAttributes_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_NumberofSFOutputAttributes_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 54;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Point Sprite Texture Coordinate Enable */
+
+
+#define GEN6_3DSTATE_SF_PointSpriteTextureCoordinateEnable_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointSpriteTextureCoordinateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_PointSpriteTextureCoordinateEnable_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointSpriteTextureCoordinateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 512;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Point Sprite Texture Coordinate Origin */
+
+
+#define GEN6_3DSTATE_SF_PointSpriteTextureCoordinateOrigin_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointSpriteTextureCoordinateOrigin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_PointSpriteTextureCoordinateOrigin_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointSpriteTextureCoordinateOrigin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 52;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Point Width */
+
+
+#define GEN10_3DSTATE_SF_PointWidth_bits 11
+#define GEN9_3DSTATE_SF_PointWidth_bits 11
+#define GEN8_3DSTATE_SF_PointWidth_bits 11
+#define GEN75_3DSTATE_SF_PointWidth_bits 11
+#define GEN7_3DSTATE_SF_PointWidth_bits 11
+#define GEN6_3DSTATE_SF_PointWidth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_PointWidth_start 96
+#define GEN9_3DSTATE_SF_PointWidth_start 96
+#define GEN8_3DSTATE_SF_PointWidth_start 96
+#define GEN75_3DSTATE_SF_PointWidth_start 96
+#define GEN7_3DSTATE_SF_PointWidth_start 96
+#define GEN6_3DSTATE_SF_PointWidth_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Point Width Source */
+
+
+#define GEN10_3DSTATE_SF_PointWidthSource_bits 1
+#define GEN9_3DSTATE_SF_PointWidthSource_bits 1
+#define GEN8_3DSTATE_SF_PointWidthSource_bits 1
+#define GEN75_3DSTATE_SF_PointWidthSource_bits 1
+#define GEN7_3DSTATE_SF_PointWidthSource_bits 1
+#define GEN6_3DSTATE_SF_PointWidthSource_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointWidthSource_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_PointWidthSource_start 107
+#define GEN9_3DSTATE_SF_PointWidthSource_start 107
+#define GEN8_3DSTATE_SF_PointWidthSource_start 107
+#define GEN75_3DSTATE_SF_PointWidthSource_start 107
+#define GEN7_3DSTATE_SF_PointWidthSource_start 107
+#define GEN6_3DSTATE_SF_PointWidthSource_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_PointWidthSource_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 107;
+ case 9: return 107;
+ case 8: return 107;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 107;
+ } else {
+ return 107;
+ }
+ case 6: return 139;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::RT Independent Rasterization Enable */
+
+
+#define GEN75_3DSTATE_SF_RTIndependentRasterizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_RTIndependentRasterizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_RTIndependentRasterizationEnable_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_RTIndependentRasterizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 74;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Scissor Rectangle Enable */
+
+
+#define GEN75_3DSTATE_SF_ScissorRectangleEnable_bits 1
+#define GEN7_3DSTATE_SF_ScissorRectangleEnable_bits 1
+#define GEN6_3DSTATE_SF_ScissorRectangleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SF_ScissorRectangleEnable_start 75
+#define GEN7_3DSTATE_SF_ScissorRectangleEnable_start 75
+#define GEN6_3DSTATE_SF_ScissorRectangleEnable_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 75;
+ } else {
+ return 75;
+ }
+ case 6: return 107;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Smooth Point Enable */
+
+
+#define GEN10_3DSTATE_SF_SmoothPointEnable_bits 1
+#define GEN9_3DSTATE_SF_SmoothPointEnable_bits 1
+#define GEN8_3DSTATE_SF_SmoothPointEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_SmoothPointEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_SmoothPointEnable_start 109
+#define GEN9_3DSTATE_SF_SmoothPointEnable_start 109
+#define GEN8_3DSTATE_SF_SmoothPointEnable_start 109
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_SmoothPointEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Statistics Enable */
+
+
+#define GEN10_3DSTATE_SF_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_SF_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_SF_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_SF_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_SF_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_SF_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_StatisticsEnable_start 42
+#define GEN9_3DSTATE_SF_StatisticsEnable_start 42
+#define GEN8_3DSTATE_SF_StatisticsEnable_start 42
+#define GEN75_3DSTATE_SF_StatisticsEnable_start 42
+#define GEN7_3DSTATE_SF_StatisticsEnable_start 42
+#define GEN6_3DSTATE_SF_StatisticsEnable_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 74;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Triangle Fan Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 121
+#define GEN9_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 121
+#define GEN8_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 121
+#define GEN75_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 121
+#define GEN7_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 121
+#define GEN6_3DSTATE_SF_TriangleFanProvokingVertexSelect_start 153
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 121;
+ case 9: return 121;
+ case 8: return 121;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 121;
+ } else {
+ return 121;
+ }
+ case 6: return 153;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Triangle Strip/List Provoking Vertex Select */
+
+
+#define GEN10_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN9_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN8_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN75_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN7_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN6_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 125
+#define GEN9_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 125
+#define GEN8_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 125
+#define GEN75_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 125
+#define GEN7_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 125
+#define GEN6_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start 157
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 125;
+ case 9: return 125;
+ case 8: return 125;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 125;
+ } else {
+ return 125;
+ }
+ case 6: return 157;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Vertex Sub Pixel Precision Select */
+
+
+#define GEN10_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+#define GEN9_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+#define GEN8_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+#define GEN75_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+#define GEN7_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+#define GEN6_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 108
+#define GEN9_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 108
+#define GEN8_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 108
+#define GEN75_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 108
+#define GEN7_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 108
+#define GEN6_3DSTATE_SF_VertexSubPixelPrecisionSelect_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 108;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 108;
+ } else {
+ return 108;
+ }
+ case 6: return 140;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Vertex URB Entry Read Length */
+
+
+#define GEN6_3DSTATE_SF_VertexURBEntryReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_VertexURBEntryReadLength_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 43;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Vertex URB Entry Read Offset */
+
+
+#define GEN6_3DSTATE_SF_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_SF_VertexURBEntryReadOffset_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 36;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SF::Viewport Transform Enable */
+
+
+#define GEN10_3DSTATE_SF_ViewportTransformEnable_bits 1
+#define GEN9_3DSTATE_SF_ViewportTransformEnable_bits 1
+#define GEN8_3DSTATE_SF_ViewportTransformEnable_bits 1
+#define GEN75_3DSTATE_SF_ViewportTransformEnable_bits 1
+#define GEN7_3DSTATE_SF_ViewportTransformEnable_bits 1
+#define GEN6_3DSTATE_SF_ViewportTransformEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ViewportTransformEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SF_ViewportTransformEnable_start 33
+#define GEN9_3DSTATE_SF_ViewportTransformEnable_start 33
+#define GEN8_3DSTATE_SF_ViewportTransformEnable_start 33
+#define GEN75_3DSTATE_SF_ViewportTransformEnable_start 33
+#define GEN7_3DSTATE_SF_ViewportTransformEnable_start 33
+#define GEN6_3DSTATE_SF_ViewportTransformEnable_start 65
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SF_ViewportTransformEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 65;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_length 8
+#define GEN9_3DSTATE_SO_BUFFER_length 8
+#define GEN8_3DSTATE_SO_BUFFER_length 8
+#define GEN75_3DSTATE_SO_BUFFER_length 4
+#define GEN7_3DSTATE_SO_BUFFER_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SO_BUFFER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SO_BUFFER_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SO_BUFFER_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SO_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SO_BUFFER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SO_BUFFER_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SO_BUFFER_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SO_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Command SubType */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_CommandSubType_bits 2
+#define GEN9_3DSTATE_SO_BUFFER_CommandSubType_bits 2
+#define GEN8_3DSTATE_SO_BUFFER_CommandSubType_bits 2
+#define GEN75_3DSTATE_SO_BUFFER_CommandSubType_bits 2
+#define GEN7_3DSTATE_SO_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_CommandSubType_start 27
+#define GEN9_3DSTATE_SO_BUFFER_CommandSubType_start 27
+#define GEN8_3DSTATE_SO_BUFFER_CommandSubType_start 27
+#define GEN75_3DSTATE_SO_BUFFER_CommandSubType_start 27
+#define GEN7_3DSTATE_SO_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Command Type */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_CommandType_bits 3
+#define GEN9_3DSTATE_SO_BUFFER_CommandType_bits 3
+#define GEN8_3DSTATE_SO_BUFFER_CommandType_bits 3
+#define GEN75_3DSTATE_SO_BUFFER_CommandType_bits 3
+#define GEN7_3DSTATE_SO_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_CommandType_start 29
+#define GEN9_3DSTATE_SO_BUFFER_CommandType_start 29
+#define GEN8_3DSTATE_SO_BUFFER_CommandType_start 29
+#define GEN75_3DSTATE_SO_BUFFER_CommandType_start 29
+#define GEN7_3DSTATE_SO_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::DWord Length */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_DWordLength_bits 8
+#define GEN9_3DSTATE_SO_BUFFER_DWordLength_bits 8
+#define GEN8_3DSTATE_SO_BUFFER_DWordLength_bits 8
+#define GEN75_3DSTATE_SO_BUFFER_DWordLength_bits 8
+#define GEN7_3DSTATE_SO_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_DWordLength_start 0
+#define GEN9_3DSTATE_SO_BUFFER_DWordLength_start 0
+#define GEN8_3DSTATE_SO_BUFFER_DWordLength_start 0
+#define GEN75_3DSTATE_SO_BUFFER_DWordLength_start 0
+#define GEN7_3DSTATE_SO_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::SO Buffer Enable */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferEnable_bits 1
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferEnable_bits 1
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferEnable_start 63
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferEnable_start 63
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::SO Buffer Index */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferIndex_bits 2
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferIndex_bits 2
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferIndex_bits 2
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferIndex_bits 2
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferIndex_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferIndex_start 61
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferIndex_start 61
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferIndex_start 61
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferIndex_start 61
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferIndex_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 61;
+ } else {
+ return 61;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::SO Buffer MOCS */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferMOCS_bits 7
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferMOCS_bits 7
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferMOCS_bits 7
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferMOCS_bits 4
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferMOCS_start 54
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferMOCS_start 54
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferMOCS_start 54
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferMOCS_start 57
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferMOCS_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::SO Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits 7
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits 4
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start 54
+#define GEN9_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start 54
+#define GEN8_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start 54
+#define GEN75_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start 57
+#define GEN7_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SOBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Stream Offset */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOffset_bits 32
+#define GEN9_3DSTATE_SO_BUFFER_StreamOffset_bits 32
+#define GEN8_3DSTATE_SO_BUFFER_StreamOffset_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOffset_start 224
+#define GEN9_3DSTATE_SO_BUFFER_StreamOffset_start 224
+#define GEN8_3DSTATE_SO_BUFFER_StreamOffset_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Stream Offset Write Enable */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_bits 1
+#define GEN9_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_bits 1
+#define GEN8_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_start 53
+#define GEN9_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_start 53
+#define GEN8_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOffsetWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Stream Output Buffer Offset Address */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_bits 46
+#define GEN9_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_bits 46
+#define GEN8_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_bits 46
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_start 162
+#define GEN9_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_start 162
+#define GEN8_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_start 162
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 162;
+ case 9: return 162;
+ case 8: return 162;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Stream Output Buffer Offset Address Enable */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_bits 1
+#define GEN9_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_bits 1
+#define GEN8_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_start 52
+#define GEN9_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_start 52
+#define GEN8_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_StreamOutputBufferOffsetAddressEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Surface Base Address */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits 46
+#define GEN9_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits 46
+#define GEN8_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits 46
+#define GEN75_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits 30
+#define GEN7_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start 66
+#define GEN9_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start 66
+#define GEN8_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start 66
+#define GEN75_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start 66
+#define GEN7_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Surface End Address */
+
+
+#define GEN75_3DSTATE_SO_BUFFER_SurfaceEndAddress_bits 30
+#define GEN7_3DSTATE_SO_BUFFER_SurfaceEndAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceEndAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SO_BUFFER_SurfaceEndAddress_start 98
+#define GEN7_3DSTATE_SO_BUFFER_SurfaceEndAddress_start 98
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceEndAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 98;
+ } else {
+ return 98;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Surface Pitch */
+
+
+#define GEN75_3DSTATE_SO_BUFFER_SurfacePitch_bits 12
+#define GEN7_3DSTATE_SO_BUFFER_SurfacePitch_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_SO_BUFFER_SurfacePitch_start 32
+#define GEN7_3DSTATE_SO_BUFFER_SurfacePitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_BUFFER::Surface Size */
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SurfaceSize_bits 30
+#define GEN9_3DSTATE_SO_BUFFER_SurfaceSize_bits 30
+#define GEN8_3DSTATE_SO_BUFFER_SurfaceSize_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_BUFFER_SurfaceSize_start 128
+#define GEN9_3DSTATE_SO_BUFFER_SurfaceSize_start 128
+#define GEN8_3DSTATE_SO_BUFFER_SurfaceSize_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_BUFFER_SurfaceSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST */
+
+
+
+
+
+/* 3DSTATE_SO_DECL_LIST::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Command SubType */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_CommandSubType_bits 2
+#define GEN9_3DSTATE_SO_DECL_LIST_CommandSubType_bits 2
+#define GEN8_3DSTATE_SO_DECL_LIST_CommandSubType_bits 2
+#define GEN75_3DSTATE_SO_DECL_LIST_CommandSubType_bits 2
+#define GEN7_3DSTATE_SO_DECL_LIST_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_CommandSubType_start 27
+#define GEN9_3DSTATE_SO_DECL_LIST_CommandSubType_start 27
+#define GEN8_3DSTATE_SO_DECL_LIST_CommandSubType_start 27
+#define GEN75_3DSTATE_SO_DECL_LIST_CommandSubType_start 27
+#define GEN7_3DSTATE_SO_DECL_LIST_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Command Type */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_CommandType_bits 3
+#define GEN9_3DSTATE_SO_DECL_LIST_CommandType_bits 3
+#define GEN8_3DSTATE_SO_DECL_LIST_CommandType_bits 3
+#define GEN75_3DSTATE_SO_DECL_LIST_CommandType_bits 3
+#define GEN7_3DSTATE_SO_DECL_LIST_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_CommandType_start 29
+#define GEN9_3DSTATE_SO_DECL_LIST_CommandType_start 29
+#define GEN8_3DSTATE_SO_DECL_LIST_CommandType_start 29
+#define GEN75_3DSTATE_SO_DECL_LIST_CommandType_start 29
+#define GEN7_3DSTATE_SO_DECL_LIST_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::DWord Length */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_DWordLength_bits 9
+#define GEN9_3DSTATE_SO_DECL_LIST_DWordLength_bits 9
+#define GEN8_3DSTATE_SO_DECL_LIST_DWordLength_bits 9
+#define GEN75_3DSTATE_SO_DECL_LIST_DWordLength_bits 9
+#define GEN7_3DSTATE_SO_DECL_LIST_DWordLength_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_DWordLength_start 0
+#define GEN9_3DSTATE_SO_DECL_LIST_DWordLength_start 0
+#define GEN8_3DSTATE_SO_DECL_LIST_DWordLength_start 0
+#define GEN75_3DSTATE_SO_DECL_LIST_DWordLength_start 0
+#define GEN7_3DSTATE_SO_DECL_LIST_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Entry */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_Entry_bits 64
+#define GEN9_3DSTATE_SO_DECL_LIST_Entry_bits 64
+#define GEN8_3DSTATE_SO_DECL_LIST_Entry_bits 64
+#define GEN75_3DSTATE_SO_DECL_LIST_Entry_bits 64
+#define GEN7_3DSTATE_SO_DECL_LIST_Entry_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_Entry_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_Entry_start 0
+#define GEN9_3DSTATE_SO_DECL_LIST_Entry_start 0
+#define GEN8_3DSTATE_SO_DECL_LIST_Entry_start 0
+#define GEN75_3DSTATE_SO_DECL_LIST_Entry_start 0
+#define GEN7_3DSTATE_SO_DECL_LIST_Entry_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_Entry_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Num Entries [0] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries0_bits 8
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries0_bits 8
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries0_bits 8
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries0_bits 8
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries0_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries0_start 64
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries0_start 64
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries0_start 64
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries0_start 64
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries0_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Num Entries [1] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries1_bits 8
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries1_bits 8
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries1_bits 8
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries1_bits 8
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries1_start 72
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries1_start 72
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries1_start 72
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries1_start 72
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries1_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Num Entries [2] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries2_bits 8
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries2_bits 8
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries2_bits 8
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries2_bits 8
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries2_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries2_start 80
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries2_start 80
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries2_start 80
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries2_start 80
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries2_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Num Entries [3] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries3_bits 8
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries3_bits 8
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries3_bits 8
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries3_bits 8
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries3_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_NumEntries3_start 88
+#define GEN9_3DSTATE_SO_DECL_LIST_NumEntries3_start 88
+#define GEN8_3DSTATE_SO_DECL_LIST_NumEntries3_start 88
+#define GEN75_3DSTATE_SO_DECL_LIST_NumEntries3_start 88
+#define GEN7_3DSTATE_SO_DECL_LIST_NumEntries3_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_NumEntries3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Stream to Buffer Selects [0] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits 4
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits 4
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits 4
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits 4
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start 32
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start 32
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start 32
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start 32
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Stream to Buffer Selects [1] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits 4
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits 4
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits 4
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits 4
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start 36
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start 36
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start 36
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start 36
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Stream to Buffer Selects [2] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits 4
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits 4
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits 4
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits 4
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start 40
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start 40
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start 40
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start 40
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_SO_DECL_LIST::Stream to Buffer Selects [3] */
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits 4
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits 4
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits 4
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits 4
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start 44
+#define GEN9_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start 44
+#define GEN8_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start 44
+#define GEN75_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start 44
+#define GEN7_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_SO_DECL_LIST_StreamtoBufferSelects3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_length 5
+#define GEN9_3DSTATE_STENCIL_BUFFER_length 5
+#define GEN8_3DSTATE_STENCIL_BUFFER_length 5
+#define GEN75_3DSTATE_STENCIL_BUFFER_length 3
+#define GEN7_3DSTATE_STENCIL_BUFFER_length 3
+#define GEN6_3DSTATE_STENCIL_BUFFER_length 3
+#define GEN5_3DSTATE_STENCIL_BUFFER_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Command SubType */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN9_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN8_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN75_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN7_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN6_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+#define GEN5_3DSTATE_STENCIL_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN9_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN8_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN75_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN7_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN6_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+#define GEN5_3DSTATE_STENCIL_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Command Type */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN9_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN8_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN75_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN7_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN6_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+#define GEN5_3DSTATE_STENCIL_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN9_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN8_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN75_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN7_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN6_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+#define GEN5_3DSTATE_STENCIL_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::DWord Length */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN9_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN8_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN75_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN7_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN6_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+#define GEN5_3DSTATE_STENCIL_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN9_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN8_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN75_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN7_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN6_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+#define GEN5_3DSTATE_STENCIL_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Stencil Buffer Enable */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits 1
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits 1
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits 1
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start 63
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start 63
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start 63
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 63;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Stencil Buffer MOCS */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 7
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 7
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 7
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 4
+#define GEN7_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 4
+#define GEN6_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 54
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 54
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 54
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 57
+#define GEN7_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 57
+#define GEN6_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 57;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Stencil Buffer Object Control State */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 7
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 7
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 7
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 4
+#define GEN7_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 4
+#define GEN6_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 54
+#define GEN9_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 54
+#define GEN8_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 54
+#define GEN75_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 57
+#define GEN7_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 57
+#define GEN6_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_StencilBufferObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 57;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Surface Base Address */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 64
+#define GEN75_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN7_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN6_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 32
+#define GEN5_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN75_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN7_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN6_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+#define GEN5_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Surface Pitch */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN75_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN7_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN6_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+#define GEN5_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 17;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN75_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN7_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN6_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+#define GEN5_3DSTATE_STENCIL_BUFFER_SurfacePitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STENCIL_BUFFER::Surface QPitch */
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_bits 15
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_bits 15
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_start 128
+#define GEN9_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_start 128
+#define GEN8_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STENCIL_BUFFER_SurfaceQPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT */
+
+
+#define GEN10_3DSTATE_STREAMOUT_length 5
+#define GEN9_3DSTATE_STREAMOUT_length 5
+#define GEN8_3DSTATE_STREAMOUT_length 5
+#define GEN75_3DSTATE_STREAMOUT_length 3
+#define GEN7_3DSTATE_STREAMOUT_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_STREAMOUT_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_STREAMOUT_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_STREAMOUT_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_STREAMOUT_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_STREAMOUT_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_STREAMOUT_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_STREAMOUT_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_STREAMOUT_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_STREAMOUT_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_STREAMOUT_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_STREAMOUT_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_STREAMOUT_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_STREAMOUT_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Buffer 0 Surface Pitch */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer0SurfacePitch_bits 12
+#define GEN9_3DSTATE_STREAMOUT_Buffer0SurfacePitch_bits 12
+#define GEN8_3DSTATE_STREAMOUT_Buffer0SurfacePitch_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer0SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer0SurfacePitch_start 96
+#define GEN9_3DSTATE_STREAMOUT_Buffer0SurfacePitch_start 96
+#define GEN8_3DSTATE_STREAMOUT_Buffer0SurfacePitch_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer0SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Buffer 1 Surface Pitch */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer1SurfacePitch_bits 12
+#define GEN9_3DSTATE_STREAMOUT_Buffer1SurfacePitch_bits 12
+#define GEN8_3DSTATE_STREAMOUT_Buffer1SurfacePitch_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer1SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer1SurfacePitch_start 112
+#define GEN9_3DSTATE_STREAMOUT_Buffer1SurfacePitch_start 112
+#define GEN8_3DSTATE_STREAMOUT_Buffer1SurfacePitch_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer1SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Buffer 2 Surface Pitch */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer2SurfacePitch_bits 12
+#define GEN9_3DSTATE_STREAMOUT_Buffer2SurfacePitch_bits 12
+#define GEN8_3DSTATE_STREAMOUT_Buffer2SurfacePitch_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer2SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer2SurfacePitch_start 128
+#define GEN9_3DSTATE_STREAMOUT_Buffer2SurfacePitch_start 128
+#define GEN8_3DSTATE_STREAMOUT_Buffer2SurfacePitch_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer2SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Buffer 3 Surface Pitch */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer3SurfacePitch_bits 12
+#define GEN9_3DSTATE_STREAMOUT_Buffer3SurfacePitch_bits 12
+#define GEN8_3DSTATE_STREAMOUT_Buffer3SurfacePitch_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer3SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Buffer3SurfacePitch_start 144
+#define GEN9_3DSTATE_STREAMOUT_Buffer3SurfacePitch_start 144
+#define GEN8_3DSTATE_STREAMOUT_Buffer3SurfacePitch_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Buffer3SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 144;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Command SubType */
+
+
+#define GEN10_3DSTATE_STREAMOUT_CommandSubType_bits 2
+#define GEN9_3DSTATE_STREAMOUT_CommandSubType_bits 2
+#define GEN8_3DSTATE_STREAMOUT_CommandSubType_bits 2
+#define GEN75_3DSTATE_STREAMOUT_CommandSubType_bits 2
+#define GEN7_3DSTATE_STREAMOUT_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_CommandSubType_start 27
+#define GEN9_3DSTATE_STREAMOUT_CommandSubType_start 27
+#define GEN8_3DSTATE_STREAMOUT_CommandSubType_start 27
+#define GEN75_3DSTATE_STREAMOUT_CommandSubType_start 27
+#define GEN7_3DSTATE_STREAMOUT_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Command Type */
+
+
+#define GEN10_3DSTATE_STREAMOUT_CommandType_bits 3
+#define GEN9_3DSTATE_STREAMOUT_CommandType_bits 3
+#define GEN8_3DSTATE_STREAMOUT_CommandType_bits 3
+#define GEN75_3DSTATE_STREAMOUT_CommandType_bits 3
+#define GEN7_3DSTATE_STREAMOUT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_CommandType_start 29
+#define GEN9_3DSTATE_STREAMOUT_CommandType_start 29
+#define GEN8_3DSTATE_STREAMOUT_CommandType_start 29
+#define GEN75_3DSTATE_STREAMOUT_CommandType_start 29
+#define GEN7_3DSTATE_STREAMOUT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::DWord Length */
+
+
+#define GEN10_3DSTATE_STREAMOUT_DWordLength_bits 8
+#define GEN9_3DSTATE_STREAMOUT_DWordLength_bits 8
+#define GEN8_3DSTATE_STREAMOUT_DWordLength_bits 8
+#define GEN75_3DSTATE_STREAMOUT_DWordLength_bits 8
+#define GEN7_3DSTATE_STREAMOUT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_DWordLength_start 0
+#define GEN9_3DSTATE_STREAMOUT_DWordLength_start 0
+#define GEN8_3DSTATE_STREAMOUT_DWordLength_start 0
+#define GEN75_3DSTATE_STREAMOUT_DWordLength_start 0
+#define GEN7_3DSTATE_STREAMOUT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Force Rendering */
+
+
+#define GEN10_3DSTATE_STREAMOUT_ForceRendering_bits 2
+#define GEN9_3DSTATE_STREAMOUT_ForceRendering_bits 2
+#define GEN8_3DSTATE_STREAMOUT_ForceRendering_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_ForceRendering_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_ForceRendering_start 55
+#define GEN9_3DSTATE_STREAMOUT_ForceRendering_start 55
+#define GEN8_3DSTATE_STREAMOUT_ForceRendering_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_ForceRendering_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 55;
+ case 9: return 55;
+ case 8: return 55;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Render Stream Select */
+
+
+#define GEN10_3DSTATE_STREAMOUT_RenderStreamSelect_bits 2
+#define GEN9_3DSTATE_STREAMOUT_RenderStreamSelect_bits 2
+#define GEN8_3DSTATE_STREAMOUT_RenderStreamSelect_bits 2
+#define GEN75_3DSTATE_STREAMOUT_RenderStreamSelect_bits 2
+#define GEN7_3DSTATE_STREAMOUT_RenderStreamSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_RenderStreamSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_RenderStreamSelect_start 59
+#define GEN9_3DSTATE_STREAMOUT_RenderStreamSelect_start 59
+#define GEN8_3DSTATE_STREAMOUT_RenderStreamSelect_start 59
+#define GEN75_3DSTATE_STREAMOUT_RenderStreamSelect_start 59
+#define GEN7_3DSTATE_STREAMOUT_RenderStreamSelect_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_RenderStreamSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 59;
+ } else {
+ return 59;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Rendering Disable */
+
+
+#define GEN10_3DSTATE_STREAMOUT_RenderingDisable_bits 1
+#define GEN9_3DSTATE_STREAMOUT_RenderingDisable_bits 1
+#define GEN8_3DSTATE_STREAMOUT_RenderingDisable_bits 1
+#define GEN75_3DSTATE_STREAMOUT_RenderingDisable_bits 1
+#define GEN7_3DSTATE_STREAMOUT_RenderingDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_RenderingDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_RenderingDisable_start 62
+#define GEN9_3DSTATE_STREAMOUT_RenderingDisable_start 62
+#define GEN8_3DSTATE_STREAMOUT_RenderingDisable_start 62
+#define GEN75_3DSTATE_STREAMOUT_RenderingDisable_start 62
+#define GEN7_3DSTATE_STREAMOUT_RenderingDisable_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_RenderingDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 62;
+ } else {
+ return 62;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Reorder Mode */
+
+
+#define GEN10_3DSTATE_STREAMOUT_ReorderMode_bits 1
+#define GEN9_3DSTATE_STREAMOUT_ReorderMode_bits 1
+#define GEN8_3DSTATE_STREAMOUT_ReorderMode_bits 1
+#define GEN75_3DSTATE_STREAMOUT_ReorderMode_bits 1
+#define GEN7_3DSTATE_STREAMOUT_ReorderMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_ReorderMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_ReorderMode_start 58
+#define GEN9_3DSTATE_STREAMOUT_ReorderMode_start 58
+#define GEN8_3DSTATE_STREAMOUT_ReorderMode_start 58
+#define GEN75_3DSTATE_STREAMOUT_ReorderMode_start 58
+#define GEN7_3DSTATE_STREAMOUT_ReorderMode_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_ReorderMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 58;
+ } else {
+ return 58;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Buffer Enable [0] */
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable0_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable0_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable0_start 40
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable0_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Buffer Enable [1] */
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable1_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable1_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable1_start 41
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable1_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 41;
+ } else {
+ return 41;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Buffer Enable [2] */
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable2_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable2_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable2_start 42
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable2_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Buffer Enable [3] */
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable3_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable3_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_STREAMOUT_SOBufferEnable3_start 43
+#define GEN7_3DSTATE_STREAMOUT_SOBufferEnable3_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOBufferEnable3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Function Enable */
+
+
+#define GEN10_3DSTATE_STREAMOUT_SOFunctionEnable_bits 1
+#define GEN9_3DSTATE_STREAMOUT_SOFunctionEnable_bits 1
+#define GEN8_3DSTATE_STREAMOUT_SOFunctionEnable_bits 1
+#define GEN75_3DSTATE_STREAMOUT_SOFunctionEnable_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOFunctionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOFunctionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_SOFunctionEnable_start 63
+#define GEN9_3DSTATE_STREAMOUT_SOFunctionEnable_start 63
+#define GEN8_3DSTATE_STREAMOUT_SOFunctionEnable_start 63
+#define GEN75_3DSTATE_STREAMOUT_SOFunctionEnable_start 63
+#define GEN7_3DSTATE_STREAMOUT_SOFunctionEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOFunctionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 63;
+ } else {
+ return 63;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::SO Statistics Enable */
+
+
+#define GEN10_3DSTATE_STREAMOUT_SOStatisticsEnable_bits 1
+#define GEN9_3DSTATE_STREAMOUT_SOStatisticsEnable_bits 1
+#define GEN8_3DSTATE_STREAMOUT_SOStatisticsEnable_bits 1
+#define GEN75_3DSTATE_STREAMOUT_SOStatisticsEnable_bits 1
+#define GEN7_3DSTATE_STREAMOUT_SOStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_SOStatisticsEnable_start 57
+#define GEN9_3DSTATE_STREAMOUT_SOStatisticsEnable_start 57
+#define GEN8_3DSTATE_STREAMOUT_SOStatisticsEnable_start 57
+#define GEN75_3DSTATE_STREAMOUT_SOStatisticsEnable_start 57
+#define GEN7_3DSTATE_STREAMOUT_SOStatisticsEnable_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 0 Vertex Read Length */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits 5
+#define GEN9_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits 5
+#define GEN8_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits 5
+#define GEN75_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits 5
+#define GEN7_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream0VertexReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream0VertexReadLength_start 64
+#define GEN9_3DSTATE_STREAMOUT_Stream0VertexReadLength_start 64
+#define GEN8_3DSTATE_STREAMOUT_Stream0VertexReadLength_start 64
+#define GEN75_3DSTATE_STREAMOUT_Stream0VertexReadLength_start 64
+#define GEN7_3DSTATE_STREAMOUT_Stream0VertexReadLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream0VertexReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 0 Vertex Read Offset */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits 1
+#define GEN9_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits 1
+#define GEN8_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits 1
+#define GEN75_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits 1
+#define GEN7_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream0VertexReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start 69
+#define GEN9_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start 69
+#define GEN8_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start 69
+#define GEN75_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start 69
+#define GEN7_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream0VertexReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 69;
+ case 8: return 69;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 69;
+ } else {
+ return 69;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 1 Vertex Read Length */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits 5
+#define GEN9_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits 5
+#define GEN8_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits 5
+#define GEN75_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits 5
+#define GEN7_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream1VertexReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream1VertexReadLength_start 72
+#define GEN9_3DSTATE_STREAMOUT_Stream1VertexReadLength_start 72
+#define GEN8_3DSTATE_STREAMOUT_Stream1VertexReadLength_start 72
+#define GEN75_3DSTATE_STREAMOUT_Stream1VertexReadLength_start 72
+#define GEN7_3DSTATE_STREAMOUT_Stream1VertexReadLength_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream1VertexReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 1 Vertex Read Offset */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits 1
+#define GEN9_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits 1
+#define GEN8_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits 1
+#define GEN75_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits 1
+#define GEN7_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream1VertexReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start 77
+#define GEN9_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start 77
+#define GEN8_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start 77
+#define GEN75_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start 77
+#define GEN7_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream1VertexReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 77;
+ case 9: return 77;
+ case 8: return 77;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 2 Vertex Read Length */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits 5
+#define GEN9_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits 5
+#define GEN8_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits 5
+#define GEN75_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits 5
+#define GEN7_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream2VertexReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream2VertexReadLength_start 80
+#define GEN9_3DSTATE_STREAMOUT_Stream2VertexReadLength_start 80
+#define GEN8_3DSTATE_STREAMOUT_Stream2VertexReadLength_start 80
+#define GEN75_3DSTATE_STREAMOUT_Stream2VertexReadLength_start 80
+#define GEN7_3DSTATE_STREAMOUT_Stream2VertexReadLength_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream2VertexReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 2 Vertex Read Offset */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits 1
+#define GEN9_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits 1
+#define GEN8_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits 1
+#define GEN75_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits 1
+#define GEN7_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream2VertexReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start 85
+#define GEN9_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start 85
+#define GEN8_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start 85
+#define GEN75_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start 85
+#define GEN7_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start 85
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream2VertexReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 85;
+ case 9: return 85;
+ case 8: return 85;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 85;
+ } else {
+ return 85;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 3 Vertex Read Length */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits 5
+#define GEN9_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits 5
+#define GEN8_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits 5
+#define GEN75_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits 5
+#define GEN7_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream3VertexReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream3VertexReadLength_start 88
+#define GEN9_3DSTATE_STREAMOUT_Stream3VertexReadLength_start 88
+#define GEN8_3DSTATE_STREAMOUT_Stream3VertexReadLength_start 88
+#define GEN75_3DSTATE_STREAMOUT_Stream3VertexReadLength_start 88
+#define GEN7_3DSTATE_STREAMOUT_Stream3VertexReadLength_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream3VertexReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_STREAMOUT::Stream 3 Vertex Read Offset */
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits 1
+#define GEN9_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits 1
+#define GEN8_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits 1
+#define GEN75_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits 1
+#define GEN7_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream3VertexReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start 93
+#define GEN9_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start 93
+#define GEN8_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start 93
+#define GEN75_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start 93
+#define GEN7_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start 93
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_STREAMOUT_Stream3VertexReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 93;
+ case 9: return 93;
+ case 8: return 93;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 93;
+ } else {
+ return 93;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE */
+
+
+#define GEN10_3DSTATE_TE_length 4
+#define GEN9_3DSTATE_TE_length 4
+#define GEN8_3DSTATE_TE_length 4
+#define GEN75_3DSTATE_TE_length 4
+#define GEN7_3DSTATE_TE_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_TE_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_TE_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_TE_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_TE_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_TE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_TE_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_TE_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_TE_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_TE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_TE_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_TE_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_TE_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_TE_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_TE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_TE_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_TE_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_TE_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_TE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Command SubType */
+
+
+#define GEN10_3DSTATE_TE_CommandSubType_bits 2
+#define GEN9_3DSTATE_TE_CommandSubType_bits 2
+#define GEN8_3DSTATE_TE_CommandSubType_bits 2
+#define GEN75_3DSTATE_TE_CommandSubType_bits 2
+#define GEN7_3DSTATE_TE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_CommandSubType_start 27
+#define GEN9_3DSTATE_TE_CommandSubType_start 27
+#define GEN8_3DSTATE_TE_CommandSubType_start 27
+#define GEN75_3DSTATE_TE_CommandSubType_start 27
+#define GEN7_3DSTATE_TE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Command Type */
+
+
+#define GEN10_3DSTATE_TE_CommandType_bits 3
+#define GEN9_3DSTATE_TE_CommandType_bits 3
+#define GEN8_3DSTATE_TE_CommandType_bits 3
+#define GEN75_3DSTATE_TE_CommandType_bits 3
+#define GEN7_3DSTATE_TE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_CommandType_start 29
+#define GEN9_3DSTATE_TE_CommandType_start 29
+#define GEN8_3DSTATE_TE_CommandType_start 29
+#define GEN75_3DSTATE_TE_CommandType_start 29
+#define GEN7_3DSTATE_TE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::DWord Length */
+
+
+#define GEN10_3DSTATE_TE_DWordLength_bits 8
+#define GEN9_3DSTATE_TE_DWordLength_bits 8
+#define GEN8_3DSTATE_TE_DWordLength_bits 8
+#define GEN75_3DSTATE_TE_DWordLength_bits 8
+#define GEN7_3DSTATE_TE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_DWordLength_start 0
+#define GEN9_3DSTATE_TE_DWordLength_start 0
+#define GEN8_3DSTATE_TE_DWordLength_start 0
+#define GEN75_3DSTATE_TE_DWordLength_start 0
+#define GEN7_3DSTATE_TE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Maximum Tessellation Factor Not Odd */
+
+
+#define GEN10_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits 32
+#define GEN9_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits 32
+#define GEN8_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits 32
+#define GEN75_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits 32
+#define GEN7_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_MaximumTessellationFactorNotOdd_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_MaximumTessellationFactorNotOdd_start 96
+#define GEN9_3DSTATE_TE_MaximumTessellationFactorNotOdd_start 96
+#define GEN8_3DSTATE_TE_MaximumTessellationFactorNotOdd_start 96
+#define GEN75_3DSTATE_TE_MaximumTessellationFactorNotOdd_start 96
+#define GEN7_3DSTATE_TE_MaximumTessellationFactorNotOdd_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_MaximumTessellationFactorNotOdd_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Maximum Tessellation Factor Odd */
+
+
+#define GEN10_3DSTATE_TE_MaximumTessellationFactorOdd_bits 32
+#define GEN9_3DSTATE_TE_MaximumTessellationFactorOdd_bits 32
+#define GEN8_3DSTATE_TE_MaximumTessellationFactorOdd_bits 32
+#define GEN75_3DSTATE_TE_MaximumTessellationFactorOdd_bits 32
+#define GEN7_3DSTATE_TE_MaximumTessellationFactorOdd_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_MaximumTessellationFactorOdd_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_MaximumTessellationFactorOdd_start 64
+#define GEN9_3DSTATE_TE_MaximumTessellationFactorOdd_start 64
+#define GEN8_3DSTATE_TE_MaximumTessellationFactorOdd_start 64
+#define GEN75_3DSTATE_TE_MaximumTessellationFactorOdd_start 64
+#define GEN7_3DSTATE_TE_MaximumTessellationFactorOdd_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_MaximumTessellationFactorOdd_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Output Topology */
+
+
+#define GEN10_3DSTATE_TE_OutputTopology_bits 2
+#define GEN9_3DSTATE_TE_OutputTopology_bits 2
+#define GEN8_3DSTATE_TE_OutputTopology_bits 2
+#define GEN75_3DSTATE_TE_OutputTopology_bits 2
+#define GEN7_3DSTATE_TE_OutputTopology_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_OutputTopology_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_OutputTopology_start 40
+#define GEN9_3DSTATE_TE_OutputTopology_start 40
+#define GEN8_3DSTATE_TE_OutputTopology_start 40
+#define GEN75_3DSTATE_TE_OutputTopology_start 40
+#define GEN7_3DSTATE_TE_OutputTopology_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_OutputTopology_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::Partitioning */
+
+
+#define GEN10_3DSTATE_TE_Partitioning_bits 2
+#define GEN9_3DSTATE_TE_Partitioning_bits 2
+#define GEN8_3DSTATE_TE_Partitioning_bits 2
+#define GEN75_3DSTATE_TE_Partitioning_bits 2
+#define GEN7_3DSTATE_TE_Partitioning_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_Partitioning_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_Partitioning_start 44
+#define GEN9_3DSTATE_TE_Partitioning_start 44
+#define GEN8_3DSTATE_TE_Partitioning_start 44
+#define GEN75_3DSTATE_TE_Partitioning_start 44
+#define GEN7_3DSTATE_TE_Partitioning_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_Partitioning_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::TE Domain */
+
+
+#define GEN10_3DSTATE_TE_TEDomain_bits 2
+#define GEN9_3DSTATE_TE_TEDomain_bits 2
+#define GEN8_3DSTATE_TE_TEDomain_bits 2
+#define GEN75_3DSTATE_TE_TEDomain_bits 2
+#define GEN7_3DSTATE_TE_TEDomain_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEDomain_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_TEDomain_start 36
+#define GEN9_3DSTATE_TE_TEDomain_start 36
+#define GEN8_3DSTATE_TE_TEDomain_start 36
+#define GEN75_3DSTATE_TE_TEDomain_start 36
+#define GEN7_3DSTATE_TE_TEDomain_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEDomain_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::TE Enable */
+
+
+#define GEN10_3DSTATE_TE_TEEnable_bits 1
+#define GEN9_3DSTATE_TE_TEEnable_bits 1
+#define GEN8_3DSTATE_TE_TEEnable_bits 1
+#define GEN75_3DSTATE_TE_TEEnable_bits 1
+#define GEN7_3DSTATE_TE_TEEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_TEEnable_start 32
+#define GEN9_3DSTATE_TE_TEEnable_start 32
+#define GEN8_3DSTATE_TE_TEEnable_start 32
+#define GEN75_3DSTATE_TE_TEEnable_start 32
+#define GEN7_3DSTATE_TE_TEEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_TE::TE Mode */
+
+
+#define GEN10_3DSTATE_TE_TEMode_bits 2
+#define GEN9_3DSTATE_TE_TEMode_bits 2
+#define GEN8_3DSTATE_TE_TEMode_bits 2
+#define GEN75_3DSTATE_TE_TEMode_bits 2
+#define GEN7_3DSTATE_TE_TEMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_TE_TEMode_start 33
+#define GEN9_3DSTATE_TE_TEMode_start 33
+#define GEN8_3DSTATE_TE_TEMode_start 33
+#define GEN75_3DSTATE_TE_TEMode_start 33
+#define GEN7_3DSTATE_TE_TEMode_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_TE_TEMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB */
+
+
+#define GEN6_3DSTATE_URB_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::3D Command Opcode */
+
+
+#define GEN6_3DSTATE_URB_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::3D Command Sub Opcode */
+
+
+#define GEN6_3DSTATE_URB_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::Command SubType */
+
+
+#define GEN6_3DSTATE_URB_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::Command Type */
+
+
+#define GEN6_3DSTATE_URB_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::DWord Length */
+
+
+#define GEN6_3DSTATE_URB_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::GS Number of URB Entries */
+
+
+#define GEN6_3DSTATE_URB_GSNumberofURBEntries_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_GSNumberofURBEntries_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::GS URB Entry Allocation Size */
+
+
+#define GEN6_3DSTATE_URB_GSURBEntryAllocationSize_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_GSURBEntryAllocationSize_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::VS Number of URB Entries */
+
+
+#define GEN6_3DSTATE_URB_VSNumberofURBEntries_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_VSNumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB::VS URB Entry Allocation Size */
+
+
+#define GEN6_3DSTATE_URB_VSURBEntryAllocationSize_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_URB_VSURBEntryAllocationSize_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_length 2
+#define GEN9_3DSTATE_URB_CLEAR_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_URB_CLEAR_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_URB_CLEAR_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_URB_CLEAR_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_URB_CLEAR_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::Command SubType */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_CommandSubType_bits 2
+#define GEN9_3DSTATE_URB_CLEAR_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_CommandSubType_start 27
+#define GEN9_3DSTATE_URB_CLEAR_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::Command Type */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_CommandType_bits 3
+#define GEN9_3DSTATE_URB_CLEAR_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_CommandType_start 29
+#define GEN9_3DSTATE_URB_CLEAR_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::DWord Length */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_DWordLength_bits 8
+#define GEN9_3DSTATE_URB_CLEAR_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_DWordLength_start 0
+#define GEN9_3DSTATE_URB_CLEAR_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::URB Address */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_URBAddress_bits 15
+#define GEN9_3DSTATE_URB_CLEAR_URBAddress_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_URBAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_URBAddress_start 32
+#define GEN9_3DSTATE_URB_CLEAR_URBAddress_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_URBAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_CLEAR::URB Clear Length */
+
+
+#define GEN10_3DSTATE_URB_CLEAR_URBClearLength_bits 14
+#define GEN9_3DSTATE_URB_CLEAR_URBClearLength_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_URBClearLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_CLEAR_URBClearLength_start 48
+#define GEN9_3DSTATE_URB_CLEAR_URBClearLength_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_CLEAR_URBClearLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS */
+
+
+#define GEN10_3DSTATE_URB_DS_length 2
+#define GEN9_3DSTATE_URB_DS_length 2
+#define GEN8_3DSTATE_URB_DS_length 2
+#define GEN75_3DSTATE_URB_DS_length 2
+#define GEN7_3DSTATE_URB_DS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_URB_DS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_URB_DS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_URB_DS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_URB_DS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_URB_DS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_URB_DS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_URB_DS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_URB_DS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_URB_DS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_URB_DS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_URB_DS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_URB_DS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_URB_DS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_URB_DS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_URB_DS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_URB_DS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_URB_DS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_URB_DS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::Command SubType */
+
+
+#define GEN10_3DSTATE_URB_DS_CommandSubType_bits 2
+#define GEN9_3DSTATE_URB_DS_CommandSubType_bits 2
+#define GEN8_3DSTATE_URB_DS_CommandSubType_bits 2
+#define GEN75_3DSTATE_URB_DS_CommandSubType_bits 2
+#define GEN7_3DSTATE_URB_DS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_CommandSubType_start 27
+#define GEN9_3DSTATE_URB_DS_CommandSubType_start 27
+#define GEN8_3DSTATE_URB_DS_CommandSubType_start 27
+#define GEN75_3DSTATE_URB_DS_CommandSubType_start 27
+#define GEN7_3DSTATE_URB_DS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::Command Type */
+
+
+#define GEN10_3DSTATE_URB_DS_CommandType_bits 3
+#define GEN9_3DSTATE_URB_DS_CommandType_bits 3
+#define GEN8_3DSTATE_URB_DS_CommandType_bits 3
+#define GEN75_3DSTATE_URB_DS_CommandType_bits 3
+#define GEN7_3DSTATE_URB_DS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_CommandType_start 29
+#define GEN9_3DSTATE_URB_DS_CommandType_start 29
+#define GEN8_3DSTATE_URB_DS_CommandType_start 29
+#define GEN75_3DSTATE_URB_DS_CommandType_start 29
+#define GEN7_3DSTATE_URB_DS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::DS Number of URB Entries */
+
+
+#define GEN10_3DSTATE_URB_DS_DSNumberofURBEntries_bits 16
+#define GEN9_3DSTATE_URB_DS_DSNumberofURBEntries_bits 16
+#define GEN8_3DSTATE_URB_DS_DSNumberofURBEntries_bits 16
+#define GEN75_3DSTATE_URB_DS_DSNumberofURBEntries_bits 16
+#define GEN7_3DSTATE_URB_DS_DSNumberofURBEntries_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_DSNumberofURBEntries_start 32
+#define GEN9_3DSTATE_URB_DS_DSNumberofURBEntries_start 32
+#define GEN8_3DSTATE_URB_DS_DSNumberofURBEntries_start 32
+#define GEN75_3DSTATE_URB_DS_DSNumberofURBEntries_start 32
+#define GEN7_3DSTATE_URB_DS_DSNumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::DS URB Entry Allocation Size */
+
+
+#define GEN10_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits 9
+#define GEN9_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits 9
+#define GEN8_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits 9
+#define GEN75_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits 9
+#define GEN7_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_DSURBEntryAllocationSize_start 48
+#define GEN9_3DSTATE_URB_DS_DSURBEntryAllocationSize_start 48
+#define GEN8_3DSTATE_URB_DS_DSURBEntryAllocationSize_start 48
+#define GEN75_3DSTATE_URB_DS_DSURBEntryAllocationSize_start 48
+#define GEN7_3DSTATE_URB_DS_DSURBEntryAllocationSize_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::DS URB Starting Address */
+
+
+#define GEN10_3DSTATE_URB_DS_DSURBStartingAddress_bits 7
+#define GEN9_3DSTATE_URB_DS_DSURBStartingAddress_bits 7
+#define GEN8_3DSTATE_URB_DS_DSURBStartingAddress_bits 7
+#define GEN75_3DSTATE_URB_DS_DSURBStartingAddress_bits 6
+#define GEN7_3DSTATE_URB_DS_DSURBStartingAddress_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSURBStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_DSURBStartingAddress_start 57
+#define GEN9_3DSTATE_URB_DS_DSURBStartingAddress_start 57
+#define GEN8_3DSTATE_URB_DS_DSURBStartingAddress_start 57
+#define GEN75_3DSTATE_URB_DS_DSURBStartingAddress_start 57
+#define GEN7_3DSTATE_URB_DS_DSURBStartingAddress_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DSURBStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_DS::DWord Length */
+
+
+#define GEN10_3DSTATE_URB_DS_DWordLength_bits 8
+#define GEN9_3DSTATE_URB_DS_DWordLength_bits 8
+#define GEN8_3DSTATE_URB_DS_DWordLength_bits 8
+#define GEN75_3DSTATE_URB_DS_DWordLength_bits 8
+#define GEN7_3DSTATE_URB_DS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_DS_DWordLength_start 0
+#define GEN9_3DSTATE_URB_DS_DWordLength_start 0
+#define GEN8_3DSTATE_URB_DS_DWordLength_start 0
+#define GEN75_3DSTATE_URB_DS_DWordLength_start 0
+#define GEN7_3DSTATE_URB_DS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_DS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS */
+
+
+#define GEN10_3DSTATE_URB_GS_length 2
+#define GEN9_3DSTATE_URB_GS_length 2
+#define GEN8_3DSTATE_URB_GS_length 2
+#define GEN75_3DSTATE_URB_GS_length 2
+#define GEN7_3DSTATE_URB_GS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_URB_GS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_URB_GS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_URB_GS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_URB_GS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_URB_GS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_URB_GS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_URB_GS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_URB_GS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_URB_GS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_URB_GS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_URB_GS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_URB_GS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_URB_GS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_URB_GS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_URB_GS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_URB_GS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_URB_GS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_URB_GS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::Command SubType */
+
+
+#define GEN10_3DSTATE_URB_GS_CommandSubType_bits 2
+#define GEN9_3DSTATE_URB_GS_CommandSubType_bits 2
+#define GEN8_3DSTATE_URB_GS_CommandSubType_bits 2
+#define GEN75_3DSTATE_URB_GS_CommandSubType_bits 2
+#define GEN7_3DSTATE_URB_GS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_CommandSubType_start 27
+#define GEN9_3DSTATE_URB_GS_CommandSubType_start 27
+#define GEN8_3DSTATE_URB_GS_CommandSubType_start 27
+#define GEN75_3DSTATE_URB_GS_CommandSubType_start 27
+#define GEN7_3DSTATE_URB_GS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::Command Type */
+
+
+#define GEN10_3DSTATE_URB_GS_CommandType_bits 3
+#define GEN9_3DSTATE_URB_GS_CommandType_bits 3
+#define GEN8_3DSTATE_URB_GS_CommandType_bits 3
+#define GEN75_3DSTATE_URB_GS_CommandType_bits 3
+#define GEN7_3DSTATE_URB_GS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_CommandType_start 29
+#define GEN9_3DSTATE_URB_GS_CommandType_start 29
+#define GEN8_3DSTATE_URB_GS_CommandType_start 29
+#define GEN75_3DSTATE_URB_GS_CommandType_start 29
+#define GEN7_3DSTATE_URB_GS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::DWord Length */
+
+
+#define GEN10_3DSTATE_URB_GS_DWordLength_bits 8
+#define GEN9_3DSTATE_URB_GS_DWordLength_bits 8
+#define GEN8_3DSTATE_URB_GS_DWordLength_bits 8
+#define GEN75_3DSTATE_URB_GS_DWordLength_bits 8
+#define GEN7_3DSTATE_URB_GS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_DWordLength_start 0
+#define GEN9_3DSTATE_URB_GS_DWordLength_start 0
+#define GEN8_3DSTATE_URB_GS_DWordLength_start 0
+#define GEN75_3DSTATE_URB_GS_DWordLength_start 0
+#define GEN7_3DSTATE_URB_GS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::GS Number of URB Entries */
+
+
+#define GEN10_3DSTATE_URB_GS_GSNumberofURBEntries_bits 16
+#define GEN9_3DSTATE_URB_GS_GSNumberofURBEntries_bits 16
+#define GEN8_3DSTATE_URB_GS_GSNumberofURBEntries_bits 16
+#define GEN75_3DSTATE_URB_GS_GSNumberofURBEntries_bits 16
+#define GEN7_3DSTATE_URB_GS_GSNumberofURBEntries_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_GSNumberofURBEntries_start 32
+#define GEN9_3DSTATE_URB_GS_GSNumberofURBEntries_start 32
+#define GEN8_3DSTATE_URB_GS_GSNumberofURBEntries_start 32
+#define GEN75_3DSTATE_URB_GS_GSNumberofURBEntries_start 32
+#define GEN7_3DSTATE_URB_GS_GSNumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::GS URB Entry Allocation Size */
+
+
+#define GEN10_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits 9
+#define GEN9_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits 9
+#define GEN8_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits 9
+#define GEN75_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits 9
+#define GEN7_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_GSURBEntryAllocationSize_start 48
+#define GEN9_3DSTATE_URB_GS_GSURBEntryAllocationSize_start 48
+#define GEN8_3DSTATE_URB_GS_GSURBEntryAllocationSize_start 48
+#define GEN75_3DSTATE_URB_GS_GSURBEntryAllocationSize_start 48
+#define GEN7_3DSTATE_URB_GS_GSURBEntryAllocationSize_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_GS::GS URB Starting Address */
+
+
+#define GEN10_3DSTATE_URB_GS_GSURBStartingAddress_bits 7
+#define GEN9_3DSTATE_URB_GS_GSURBStartingAddress_bits 7
+#define GEN8_3DSTATE_URB_GS_GSURBStartingAddress_bits 7
+#define GEN75_3DSTATE_URB_GS_GSURBStartingAddress_bits 6
+#define GEN7_3DSTATE_URB_GS_GSURBStartingAddress_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSURBStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_GS_GSURBStartingAddress_start 57
+#define GEN9_3DSTATE_URB_GS_GSURBStartingAddress_start 57
+#define GEN8_3DSTATE_URB_GS_GSURBStartingAddress_start 57
+#define GEN75_3DSTATE_URB_GS_GSURBStartingAddress_start 57
+#define GEN7_3DSTATE_URB_GS_GSURBStartingAddress_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_GS_GSURBStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS */
+
+
+#define GEN10_3DSTATE_URB_HS_length 2
+#define GEN9_3DSTATE_URB_HS_length 2
+#define GEN8_3DSTATE_URB_HS_length 2
+#define GEN75_3DSTATE_URB_HS_length 2
+#define GEN7_3DSTATE_URB_HS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_URB_HS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_URB_HS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_URB_HS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_URB_HS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_URB_HS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_URB_HS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_URB_HS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_URB_HS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_URB_HS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_URB_HS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_URB_HS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_URB_HS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_URB_HS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_URB_HS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_URB_HS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_URB_HS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_URB_HS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_URB_HS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::Command SubType */
+
+
+#define GEN10_3DSTATE_URB_HS_CommandSubType_bits 2
+#define GEN9_3DSTATE_URB_HS_CommandSubType_bits 2
+#define GEN8_3DSTATE_URB_HS_CommandSubType_bits 2
+#define GEN75_3DSTATE_URB_HS_CommandSubType_bits 2
+#define GEN7_3DSTATE_URB_HS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_CommandSubType_start 27
+#define GEN9_3DSTATE_URB_HS_CommandSubType_start 27
+#define GEN8_3DSTATE_URB_HS_CommandSubType_start 27
+#define GEN75_3DSTATE_URB_HS_CommandSubType_start 27
+#define GEN7_3DSTATE_URB_HS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::Command Type */
+
+
+#define GEN10_3DSTATE_URB_HS_CommandType_bits 3
+#define GEN9_3DSTATE_URB_HS_CommandType_bits 3
+#define GEN8_3DSTATE_URB_HS_CommandType_bits 3
+#define GEN75_3DSTATE_URB_HS_CommandType_bits 3
+#define GEN7_3DSTATE_URB_HS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_CommandType_start 29
+#define GEN9_3DSTATE_URB_HS_CommandType_start 29
+#define GEN8_3DSTATE_URB_HS_CommandType_start 29
+#define GEN75_3DSTATE_URB_HS_CommandType_start 29
+#define GEN7_3DSTATE_URB_HS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::DWord Length */
+
+
+#define GEN10_3DSTATE_URB_HS_DWordLength_bits 8
+#define GEN9_3DSTATE_URB_HS_DWordLength_bits 8
+#define GEN8_3DSTATE_URB_HS_DWordLength_bits 8
+#define GEN75_3DSTATE_URB_HS_DWordLength_bits 8
+#define GEN7_3DSTATE_URB_HS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_DWordLength_start 0
+#define GEN9_3DSTATE_URB_HS_DWordLength_start 0
+#define GEN8_3DSTATE_URB_HS_DWordLength_start 0
+#define GEN75_3DSTATE_URB_HS_DWordLength_start 0
+#define GEN7_3DSTATE_URB_HS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::HS Number of URB Entries */
+
+
+#define GEN10_3DSTATE_URB_HS_HSNumberofURBEntries_bits 16
+#define GEN9_3DSTATE_URB_HS_HSNumberofURBEntries_bits 16
+#define GEN8_3DSTATE_URB_HS_HSNumberofURBEntries_bits 16
+#define GEN75_3DSTATE_URB_HS_HSNumberofURBEntries_bits 16
+#define GEN7_3DSTATE_URB_HS_HSNumberofURBEntries_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_HSNumberofURBEntries_start 32
+#define GEN9_3DSTATE_URB_HS_HSNumberofURBEntries_start 32
+#define GEN8_3DSTATE_URB_HS_HSNumberofURBEntries_start 32
+#define GEN75_3DSTATE_URB_HS_HSNumberofURBEntries_start 32
+#define GEN7_3DSTATE_URB_HS_HSNumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::HS URB Entry Allocation Size */
+
+
+#define GEN10_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits 9
+#define GEN9_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits 9
+#define GEN8_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits 9
+#define GEN75_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits 9
+#define GEN7_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_HSURBEntryAllocationSize_start 48
+#define GEN9_3DSTATE_URB_HS_HSURBEntryAllocationSize_start 48
+#define GEN8_3DSTATE_URB_HS_HSURBEntryAllocationSize_start 48
+#define GEN75_3DSTATE_URB_HS_HSURBEntryAllocationSize_start 48
+#define GEN7_3DSTATE_URB_HS_HSURBEntryAllocationSize_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_HS::HS URB Starting Address */
+
+
+#define GEN10_3DSTATE_URB_HS_HSURBStartingAddress_bits 7
+#define GEN9_3DSTATE_URB_HS_HSURBStartingAddress_bits 7
+#define GEN8_3DSTATE_URB_HS_HSURBStartingAddress_bits 7
+#define GEN75_3DSTATE_URB_HS_HSURBStartingAddress_bits 6
+#define GEN7_3DSTATE_URB_HS_HSURBStartingAddress_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSURBStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_HS_HSURBStartingAddress_start 57
+#define GEN9_3DSTATE_URB_HS_HSURBStartingAddress_start 57
+#define GEN8_3DSTATE_URB_HS_HSURBStartingAddress_start 57
+#define GEN75_3DSTATE_URB_HS_HSURBStartingAddress_start 57
+#define GEN7_3DSTATE_URB_HS_HSURBStartingAddress_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_HS_HSURBStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS */
+
+
+#define GEN10_3DSTATE_URB_VS_length 2
+#define GEN9_3DSTATE_URB_VS_length 2
+#define GEN8_3DSTATE_URB_VS_length 2
+#define GEN75_3DSTATE_URB_VS_length 2
+#define GEN7_3DSTATE_URB_VS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_URB_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_URB_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_URB_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_URB_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_URB_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_URB_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_URB_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_URB_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_URB_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_URB_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_URB_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_URB_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_URB_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_URB_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_URB_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_URB_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_URB_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_URB_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_URB_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_URB_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_URB_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_URB_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_URB_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_URB_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_URB_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_URB_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_URB_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::Command Type */
+
+
+#define GEN10_3DSTATE_URB_VS_CommandType_bits 3
+#define GEN9_3DSTATE_URB_VS_CommandType_bits 3
+#define GEN8_3DSTATE_URB_VS_CommandType_bits 3
+#define GEN75_3DSTATE_URB_VS_CommandType_bits 3
+#define GEN7_3DSTATE_URB_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_CommandType_start 29
+#define GEN9_3DSTATE_URB_VS_CommandType_start 29
+#define GEN8_3DSTATE_URB_VS_CommandType_start 29
+#define GEN75_3DSTATE_URB_VS_CommandType_start 29
+#define GEN7_3DSTATE_URB_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_URB_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_URB_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_URB_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_URB_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_URB_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_DWordLength_start 0
+#define GEN9_3DSTATE_URB_VS_DWordLength_start 0
+#define GEN8_3DSTATE_URB_VS_DWordLength_start 0
+#define GEN75_3DSTATE_URB_VS_DWordLength_start 0
+#define GEN7_3DSTATE_URB_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::VS Number of URB Entries */
+
+
+#define GEN10_3DSTATE_URB_VS_VSNumberofURBEntries_bits 16
+#define GEN9_3DSTATE_URB_VS_VSNumberofURBEntries_bits 16
+#define GEN8_3DSTATE_URB_VS_VSNumberofURBEntries_bits 16
+#define GEN75_3DSTATE_URB_VS_VSNumberofURBEntries_bits 16
+#define GEN7_3DSTATE_URB_VS_VSNumberofURBEntries_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSNumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_VSNumberofURBEntries_start 32
+#define GEN9_3DSTATE_URB_VS_VSNumberofURBEntries_start 32
+#define GEN8_3DSTATE_URB_VS_VSNumberofURBEntries_start 32
+#define GEN75_3DSTATE_URB_VS_VSNumberofURBEntries_start 32
+#define GEN7_3DSTATE_URB_VS_VSNumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSNumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::VS URB Entry Allocation Size */
+
+
+#define GEN10_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits 9
+#define GEN9_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits 9
+#define GEN8_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits 9
+#define GEN75_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits 9
+#define GEN7_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSURBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_VSURBEntryAllocationSize_start 48
+#define GEN9_3DSTATE_URB_VS_VSURBEntryAllocationSize_start 48
+#define GEN8_3DSTATE_URB_VS_VSURBEntryAllocationSize_start 48
+#define GEN75_3DSTATE_URB_VS_VSURBEntryAllocationSize_start 48
+#define GEN7_3DSTATE_URB_VS_VSURBEntryAllocationSize_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSURBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_URB_VS::VS URB Starting Address */
+
+
+#define GEN10_3DSTATE_URB_VS_VSURBStartingAddress_bits 7
+#define GEN9_3DSTATE_URB_VS_VSURBStartingAddress_bits 7
+#define GEN8_3DSTATE_URB_VS_VSURBStartingAddress_bits 7
+#define GEN75_3DSTATE_URB_VS_VSURBStartingAddress_bits 6
+#define GEN7_3DSTATE_URB_VS_VSURBStartingAddress_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSURBStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_URB_VS_VSURBStartingAddress_start 57
+#define GEN9_3DSTATE_URB_VS_VSURBStartingAddress_start 57
+#define GEN8_3DSTATE_URB_VS_VSURBStartingAddress_start 57
+#define GEN75_3DSTATE_URB_VS_VSURBStartingAddress_start 57
+#define GEN7_3DSTATE_URB_VS_VSURBStartingAddress_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_URB_VS_VSURBStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS */
+
+
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::Command SubType */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN9_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN8_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN75_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN7_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN6_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN5_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN45_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+#define GEN4_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN9_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN8_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN75_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN7_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN6_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN5_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN45_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+#define GEN4_3DSTATE_VERTEX_BUFFERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::Command Type */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN9_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN8_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN75_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN7_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN6_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN5_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN45_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+#define GEN4_3DSTATE_VERTEX_BUFFERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN9_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN8_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN75_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN7_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN6_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN5_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN45_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+#define GEN4_3DSTATE_VERTEX_BUFFERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::DWord Length */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN9_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN8_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN75_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN7_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN6_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN5_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN45_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+#define GEN4_3DSTATE_VERTEX_BUFFERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN9_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN8_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN75_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN7_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN6_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN5_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN45_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+#define GEN4_3DSTATE_VERTEX_BUFFERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_BUFFERS::Vertex Buffer State */
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN9_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN8_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN75_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN7_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN6_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN5_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN45_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+#define GEN4_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_VertexBufferState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN9_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN8_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN75_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN7_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN6_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN5_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN45_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+#define GEN4_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_BUFFERS_VertexBufferState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS */
+
+
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::Command SubType */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::Command Type */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::DWord Length */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VERTEX_ELEMENTS::Element */
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_Element_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_Element_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN9_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN8_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN75_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN7_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN6_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN5_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN45_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+#define GEN4_3DSTATE_VERTEX_ELEMENTS_Element_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VERTEX_ELEMENTS_Element_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF */
+
+
+#define GEN10_3DSTATE_VF_length 2
+#define GEN9_3DSTATE_VF_length 2
+#define GEN8_3DSTATE_VF_length 2
+#define GEN75_3DSTATE_VF_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VF_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VF_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VF_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VF_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VF_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VF_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VF_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VF_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_CommandSubType_bits 2
+#define GEN8_3DSTATE_VF_CommandSubType_bits 2
+#define GEN75_3DSTATE_VF_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_CommandSubType_start 27
+#define GEN8_3DSTATE_VF_CommandSubType_start 27
+#define GEN75_3DSTATE_VF_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Command Type */
+
+
+#define GEN10_3DSTATE_VF_CommandType_bits 3
+#define GEN9_3DSTATE_VF_CommandType_bits 3
+#define GEN8_3DSTATE_VF_CommandType_bits 3
+#define GEN75_3DSTATE_VF_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_CommandType_start 29
+#define GEN9_3DSTATE_VF_CommandType_start 29
+#define GEN8_3DSTATE_VF_CommandType_start 29
+#define GEN75_3DSTATE_VF_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Component Packing Enable */
+
+
+#define GEN10_3DSTATE_VF_ComponentPackingEnable_bits 1
+#define GEN9_3DSTATE_VF_ComponentPackingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_ComponentPackingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_ComponentPackingEnable_start 9
+#define GEN9_3DSTATE_VF_ComponentPackingEnable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_ComponentPackingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Cut Index */
+
+
+#define GEN10_3DSTATE_VF_CutIndex_bits 32
+#define GEN9_3DSTATE_VF_CutIndex_bits 32
+#define GEN8_3DSTATE_VF_CutIndex_bits 32
+#define GEN75_3DSTATE_VF_CutIndex_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CutIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_CutIndex_start 32
+#define GEN9_3DSTATE_VF_CutIndex_start 32
+#define GEN8_3DSTATE_VF_CutIndex_start 32
+#define GEN75_3DSTATE_VF_CutIndex_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_CutIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_DWordLength_bits 8
+#define GEN9_3DSTATE_VF_DWordLength_bits 8
+#define GEN8_3DSTATE_VF_DWordLength_bits 8
+#define GEN75_3DSTATE_VF_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_DWordLength_start 0
+#define GEN9_3DSTATE_VF_DWordLength_start 0
+#define GEN8_3DSTATE_VF_DWordLength_start 0
+#define GEN75_3DSTATE_VF_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Indexed Draw Cut Index Enable */
+
+
+#define GEN10_3DSTATE_VF_IndexedDrawCutIndexEnable_bits 1
+#define GEN9_3DSTATE_VF_IndexedDrawCutIndexEnable_bits 1
+#define GEN8_3DSTATE_VF_IndexedDrawCutIndexEnable_bits 1
+#define GEN75_3DSTATE_VF_IndexedDrawCutIndexEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_IndexedDrawCutIndexEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_IndexedDrawCutIndexEnable_start 8
+#define GEN9_3DSTATE_VF_IndexedDrawCutIndexEnable_start 8
+#define GEN8_3DSTATE_VF_IndexedDrawCutIndexEnable_start 8
+#define GEN75_3DSTATE_VF_IndexedDrawCutIndexEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_IndexedDrawCutIndexEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::Sequential Draw Cut Index Enable */
+
+
+#define GEN10_3DSTATE_VF_SequentialDrawCutIndexEnable_bits 1
+#define GEN9_3DSTATE_VF_SequentialDrawCutIndexEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SequentialDrawCutIndexEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SequentialDrawCutIndexEnable_start 10
+#define GEN9_3DSTATE_VF_SequentialDrawCutIndexEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SequentialDrawCutIndexEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF::VertexID Offset Enable */
+
+
+#define GEN10_3DSTATE_VF_VertexIDOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_VertexIDOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_VertexIDOffsetEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_VertexIDOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_length 5
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Command Type */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_CommandType_bits 3
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_CommandType_start 29
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_DWordLength_bits 8
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_DWordLength_start 0
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 00 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_start 32
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement00Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 01 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_start 36
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement01Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 02 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_start 40
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement02Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 03 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_start 44
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement03Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 04 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_start 48
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement04Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 05 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_start 52
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement05Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 06 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_start 56
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement06Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 07 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_start 60
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement07Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 08 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_start 64
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement08Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 09 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_start 68
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_start 68
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement09Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 68;
+ case 9: return 68;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 10 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_start 72
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement10Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 11 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_start 76
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement11Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 76;
+ case 9: return 76;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 12 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_start 80
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement12Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 13 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_start 84
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement13Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 84;
+ case 9: return 84;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 14 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_start 88
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement14Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 15 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_start 92
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement15Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 92;
+ case 9: return 92;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 16 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_start 96
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement16Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 17 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_start 100
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement17Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 100;
+ case 9: return 100;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 18 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_start 104
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement18Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 104;
+ case 9: return 104;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 19 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_start 108
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement19Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 20 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_start 112
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement20Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 21 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_start 116
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_start 116
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement21Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 116;
+ case 9: return 116;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 22 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_start 120
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_start 120
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement22Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 120;
+ case 9: return 120;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 23 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_start 124
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_start 124
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement23Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 124;
+ case 9: return 124;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 24 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_start 128
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement24Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 25 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_start 132
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement25Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 132;
+ case 9: return 132;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 26 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_start 136
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement26Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 136;
+ case 9: return 136;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 27 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_start 140
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement27Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 140;
+ case 9: return 140;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 28 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_start 144
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement28Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 29 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_start 148
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_start 148
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement29Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 148;
+ case 9: return 148;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 30 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_start 152
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_start 152
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement30Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 152;
+ case 9: return 152;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_COMPONENT_PACKING::Vertex Element 31 Enables */
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_bits 4
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_start 156
+#define GEN9_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_start 156
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_COMPONENT_PACKING_VertexElement31Enables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 156;
+ case 9: return 156;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_length 3
+#define GEN9_3DSTATE_VF_INSTANCING_length 3
+#define GEN8_3DSTATE_VF_INSTANCING_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_INSTANCING_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VF_INSTANCING_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_INSTANCING_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VF_INSTANCING_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_INSTANCING_CommandSubType_bits 2
+#define GEN8_3DSTATE_VF_INSTANCING_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_INSTANCING_CommandSubType_start 27
+#define GEN8_3DSTATE_VF_INSTANCING_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::Command Type */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_CommandType_bits 3
+#define GEN9_3DSTATE_VF_INSTANCING_CommandType_bits 3
+#define GEN8_3DSTATE_VF_INSTANCING_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_CommandType_start 29
+#define GEN9_3DSTATE_VF_INSTANCING_CommandType_start 29
+#define GEN8_3DSTATE_VF_INSTANCING_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_DWordLength_bits 8
+#define GEN9_3DSTATE_VF_INSTANCING_DWordLength_bits 8
+#define GEN8_3DSTATE_VF_INSTANCING_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_DWordLength_start 0
+#define GEN9_3DSTATE_VF_INSTANCING_DWordLength_start 0
+#define GEN8_3DSTATE_VF_INSTANCING_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::Instance Data Step Rate */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_InstanceDataStepRate_bits 32
+#define GEN9_3DSTATE_VF_INSTANCING_InstanceDataStepRate_bits 32
+#define GEN8_3DSTATE_VF_INSTANCING_InstanceDataStepRate_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_InstanceDataStepRate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_InstanceDataStepRate_start 64
+#define GEN9_3DSTATE_VF_INSTANCING_InstanceDataStepRate_start 64
+#define GEN8_3DSTATE_VF_INSTANCING_InstanceDataStepRate_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_InstanceDataStepRate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::Instancing Enable */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_InstancingEnable_bits 1
+#define GEN9_3DSTATE_VF_INSTANCING_InstancingEnable_bits 1
+#define GEN8_3DSTATE_VF_INSTANCING_InstancingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_InstancingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_InstancingEnable_start 40
+#define GEN9_3DSTATE_VF_INSTANCING_InstancingEnable_start 40
+#define GEN8_3DSTATE_VF_INSTANCING_InstancingEnable_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_InstancingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_INSTANCING::Vertex Element Index */
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_VertexElementIndex_bits 6
+#define GEN9_3DSTATE_VF_INSTANCING_VertexElementIndex_bits 6
+#define GEN8_3DSTATE_VF_INSTANCING_VertexElementIndex_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_VertexElementIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_INSTANCING_VertexElementIndex_start 32
+#define GEN9_3DSTATE_VF_INSTANCING_VertexElementIndex_start 32
+#define GEN8_3DSTATE_VF_INSTANCING_VertexElementIndex_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_INSTANCING_VertexElementIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS */
+
+
+#define GEN10_3DSTATE_VF_SGVS_length 2
+#define GEN9_3DSTATE_VF_SGVS_length 2
+#define GEN8_3DSTATE_VF_SGVS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_SGVS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_SGVS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VF_SGVS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_SGVS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VF_SGVS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_SGVS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_SGVS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VF_SGVS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_SGVS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VF_SGVS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_SGVS_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_SGVS_CommandSubType_bits 2
+#define GEN8_3DSTATE_VF_SGVS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_SGVS_CommandSubType_start 27
+#define GEN8_3DSTATE_VF_SGVS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::Command Type */
+
+
+#define GEN10_3DSTATE_VF_SGVS_CommandType_bits 3
+#define GEN9_3DSTATE_VF_SGVS_CommandType_bits 3
+#define GEN8_3DSTATE_VF_SGVS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_CommandType_start 29
+#define GEN9_3DSTATE_VF_SGVS_CommandType_start 29
+#define GEN8_3DSTATE_VF_SGVS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_SGVS_DWordLength_bits 8
+#define GEN9_3DSTATE_VF_SGVS_DWordLength_bits 8
+#define GEN8_3DSTATE_VF_SGVS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_DWordLength_start 0
+#define GEN9_3DSTATE_VF_SGVS_DWordLength_start 0
+#define GEN8_3DSTATE_VF_SGVS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::InstanceID Component Number */
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDComponentNumber_bits 2
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDComponentNumber_bits 2
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDComponentNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDComponentNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDComponentNumber_start 61
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDComponentNumber_start 61
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDComponentNumber_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDComponentNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::InstanceID Element Offset */
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDElementOffset_bits 6
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDElementOffset_bits 6
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDElementOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDElementOffset_start 48
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDElementOffset_start 48
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDElementOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::InstanceID Enable */
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDEnable_bits 1
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDEnable_bits 1
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_InstanceIDEnable_start 63
+#define GEN9_3DSTATE_VF_SGVS_InstanceIDEnable_start 63
+#define GEN8_3DSTATE_VF_SGVS_InstanceIDEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_InstanceIDEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::VertexID Component Number */
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDComponentNumber_bits 2
+#define GEN9_3DSTATE_VF_SGVS_VertexIDComponentNumber_bits 2
+#define GEN8_3DSTATE_VF_SGVS_VertexIDComponentNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDComponentNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDComponentNumber_start 45
+#define GEN9_3DSTATE_VF_SGVS_VertexIDComponentNumber_start 45
+#define GEN8_3DSTATE_VF_SGVS_VertexIDComponentNumber_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDComponentNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 45;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::VertexID Element Offset */
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDElementOffset_bits 6
+#define GEN9_3DSTATE_VF_SGVS_VertexIDElementOffset_bits 6
+#define GEN8_3DSTATE_VF_SGVS_VertexIDElementOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDElementOffset_start 32
+#define GEN9_3DSTATE_VF_SGVS_VertexIDElementOffset_start 32
+#define GEN8_3DSTATE_VF_SGVS_VertexIDElementOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS::VertexID Enable */
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDEnable_bits 1
+#define GEN9_3DSTATE_VF_SGVS_VertexIDEnable_bits 1
+#define GEN8_3DSTATE_VF_SGVS_VertexIDEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_VertexIDEnable_start 47
+#define GEN9_3DSTATE_VF_SGVS_VertexIDEnable_start 47
+#define GEN8_3DSTATE_VF_SGVS_VertexIDEnable_start 47
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_VertexIDEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 47;
+ case 9: return 47;
+ case 8: return 47;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2 */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::Command Type */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP0 Component Number */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0ComponentNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0ComponentNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0ComponentNumber_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0ComponentNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP0 Element Offset */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0ElementOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0ElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0ElementOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0ElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP0 Enable */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0Enable_start 47
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 47;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP0 Source Select */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0SourceSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0SourceSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP0SourceSelect_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP0SourceSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP1 Component Number */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1ComponentNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1ComponentNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1ComponentNumber_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1ComponentNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP1 Element Offset */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1ElementOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1ElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1ElementOffset_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1ElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP1 Enable */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1Enable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP1 Source Select */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1SourceSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1SourceSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP1SourceSelect_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP1SourceSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP2 Component Number */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2ComponentNumber_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2ComponentNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2ComponentNumber_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2ComponentNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 77;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP2 Element Offset */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2ElementOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2ElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2ElementOffset_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2ElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_SGVS_2::XP2 Enable */
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_SGVS_2_XP2Enable_start 79
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_SGVS_2_XP2Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 79;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_length 1
+#define GEN9_3DSTATE_VF_STATISTICS_length 1
+#define GEN8_3DSTATE_VF_STATISTICS_length 1
+#define GEN75_3DSTATE_VF_STATISTICS_length 1
+#define GEN7_3DSTATE_VF_STATISTICS_length 1
+#define GEN6_3DSTATE_VF_STATISTICS_length 1
+#define GEN5_3DSTATE_VF_STATISTICS_length 1
+#define GEN45_3DSTATE_VF_STATISTICS_length 1
+#define GEN4_3DSTATE_VF_STATISTICS_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN5_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN45_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+#define GEN4_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN5_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN45_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+#define GEN4_3DSTATE_VF_STATISTICS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN5_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN45_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+#define GEN4_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN5_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN45_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+#define GEN4_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN8_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN75_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN7_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN6_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN5_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN45_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+#define GEN4_3DSTATE_VF_STATISTICS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN8_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN75_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN7_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN6_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN5_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN45_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+#define GEN4_3DSTATE_VF_STATISTICS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS::Command Type */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN9_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN8_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN75_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN7_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN6_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN5_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN45_3DSTATE_VF_STATISTICS_CommandType_bits 3
+#define GEN4_3DSTATE_VF_STATISTICS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN9_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN8_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN75_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN7_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN6_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN5_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN45_3DSTATE_VF_STATISTICS_CommandType_start 29
+#define GEN4_3DSTATE_VF_STATISTICS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_STATISTICS::Statistics Enable */
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN5_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN45_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+#define GEN4_3DSTATE_VF_STATISTICS_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN9_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN8_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN75_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN7_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN6_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN5_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN45_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+#define GEN4_3DSTATE_VF_STATISTICS_StatisticsEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_STATISTICS_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_length 2
+#define GEN9_3DSTATE_VF_TOPOLOGY_length 2
+#define GEN8_3DSTATE_VF_TOPOLOGY_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::Command SubType */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_CommandSubType_bits 2
+#define GEN9_3DSTATE_VF_TOPOLOGY_CommandSubType_bits 2
+#define GEN8_3DSTATE_VF_TOPOLOGY_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_CommandSubType_start 27
+#define GEN9_3DSTATE_VF_TOPOLOGY_CommandSubType_start 27
+#define GEN8_3DSTATE_VF_TOPOLOGY_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::Command Type */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_CommandType_bits 3
+#define GEN9_3DSTATE_VF_TOPOLOGY_CommandType_bits 3
+#define GEN8_3DSTATE_VF_TOPOLOGY_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_CommandType_start 29
+#define GEN9_3DSTATE_VF_TOPOLOGY_CommandType_start 29
+#define GEN8_3DSTATE_VF_TOPOLOGY_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::DWord Length */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_DWordLength_bits 8
+#define GEN9_3DSTATE_VF_TOPOLOGY_DWordLength_bits 8
+#define GEN8_3DSTATE_VF_TOPOLOGY_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_DWordLength_start 0
+#define GEN9_3DSTATE_VF_TOPOLOGY_DWordLength_start 0
+#define GEN8_3DSTATE_VF_TOPOLOGY_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VF_TOPOLOGY::Primitive Topology Type */
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_bits 6
+#define GEN9_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_bits 6
+#define GEN8_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_start 32
+#define GEN9_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_start 32
+#define GEN8_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VF_TOPOLOGY_PrimitiveTopologyType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::3D Command Opcode */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::3D Command Sub Opcode */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::CC Viewport State Change */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CCViewportStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::CLIP Viewport State Change */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CLIPViewportStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::Command SubType */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::Command Type */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::DWord Length */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::Pointer to CC_VIEWPORT */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCC_VIEWPORT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::Pointer to CLIP_VIEWPORT */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoCLIP_VIEWPORT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 37;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::Pointer to SF_VIEWPORT */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_PointertoSF_VIEWPORT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS::SF Viewport State Change */
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SFViewportStateChange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::CC Viewport Pointer */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits 27
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits 27
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits 27
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits 27
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start 37
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start 37
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start 37
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start 37
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CCViewportPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::Command SubType */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits 2
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits 2
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits 2
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits 2
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start 27
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start 27
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start 27
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start 27
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::Command Type */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits 3
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits 3
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits 3
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits 3
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start 29
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start 29
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start 29
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start 29
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_CC::DWord Length */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits 8
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits 8
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits 8
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits 8
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start 0
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start 0
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start 0
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start 0
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_CC_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::Command SubType */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits 2
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits 2
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits 2
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits 2
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start 27
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start 27
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start 27
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start 27
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::Command Type */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits 3
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits 3
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits 3
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits 3
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start 29
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start 29
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start 29
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start 29
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::DWord Length */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits 8
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits 8
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits 8
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits 8
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start 0
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start 0
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start 0
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start 0
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP::SF Clip Viewport Pointer */
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits 26
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits 26
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits 26
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits 26
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start 38
+#define GEN9_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start 38
+#define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start 38
+#define GEN75_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start 38
+#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP_SFClipViewportPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS */
+
+
+#define GEN10_3DSTATE_VS_length 9
+#define GEN9_3DSTATE_VS_length 9
+#define GEN8_3DSTATE_VS_length 9
+#define GEN75_3DSTATE_VS_length 6
+#define GEN7_3DSTATE_VS_length 6
+#define GEN6_3DSTATE_VS_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_VS_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_VS_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_VS_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_VS_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_VS_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_VS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_VS_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_VS_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_VS_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_VS_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_VS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_VS_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_VS_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_VS_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_VS_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_VS_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_VS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_VS_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_VS_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_VS_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_VS_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_VS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Accesses UAV */
+
+
+#define GEN10_3DSTATE_VS_AccessesUAV_bits 1
+#define GEN9_3DSTATE_VS_AccessesUAV_bits 1
+#define GEN8_3DSTATE_VS_AccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_AccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_AccessesUAV_start 108
+#define GEN9_3DSTATE_VS_AccessesUAV_start 108
+#define GEN8_3DSTATE_VS_AccessesUAV_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_AccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 108;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Binding Table Entry Count */
+
+
+#define GEN10_3DSTATE_VS_BindingTableEntryCount_bits 8
+#define GEN9_3DSTATE_VS_BindingTableEntryCount_bits 8
+#define GEN8_3DSTATE_VS_BindingTableEntryCount_bits 8
+#define GEN75_3DSTATE_VS_BindingTableEntryCount_bits 8
+#define GEN7_3DSTATE_VS_BindingTableEntryCount_bits 8
+#define GEN6_3DSTATE_VS_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_BindingTableEntryCount_start 114
+#define GEN9_3DSTATE_VS_BindingTableEntryCount_start 114
+#define GEN8_3DSTATE_VS_BindingTableEntryCount_start 114
+#define GEN75_3DSTATE_VS_BindingTableEntryCount_start 82
+#define GEN7_3DSTATE_VS_BindingTableEntryCount_start 82
+#define GEN6_3DSTATE_VS_BindingTableEntryCount_start 82
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 114;
+ case 9: return 114;
+ case 8: return 114;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 82;
+ } else {
+ return 82;
+ }
+ case 6: return 82;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Command SubType */
+
+
+#define GEN10_3DSTATE_VS_CommandSubType_bits 2
+#define GEN9_3DSTATE_VS_CommandSubType_bits 2
+#define GEN8_3DSTATE_VS_CommandSubType_bits 2
+#define GEN75_3DSTATE_VS_CommandSubType_bits 2
+#define GEN7_3DSTATE_VS_CommandSubType_bits 2
+#define GEN6_3DSTATE_VS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_CommandSubType_start 27
+#define GEN9_3DSTATE_VS_CommandSubType_start 27
+#define GEN8_3DSTATE_VS_CommandSubType_start 27
+#define GEN75_3DSTATE_VS_CommandSubType_start 27
+#define GEN7_3DSTATE_VS_CommandSubType_start 27
+#define GEN6_3DSTATE_VS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Command Type */
+
+
+#define GEN10_3DSTATE_VS_CommandType_bits 3
+#define GEN9_3DSTATE_VS_CommandType_bits 3
+#define GEN8_3DSTATE_VS_CommandType_bits 3
+#define GEN75_3DSTATE_VS_CommandType_bits 3
+#define GEN7_3DSTATE_VS_CommandType_bits 3
+#define GEN6_3DSTATE_VS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_CommandType_start 29
+#define GEN9_3DSTATE_VS_CommandType_start 29
+#define GEN8_3DSTATE_VS_CommandType_start 29
+#define GEN75_3DSTATE_VS_CommandType_start 29
+#define GEN7_3DSTATE_VS_CommandType_start 29
+#define GEN6_3DSTATE_VS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::DWord Length */
+
+
+#define GEN10_3DSTATE_VS_DWordLength_bits 8
+#define GEN9_3DSTATE_VS_DWordLength_bits 8
+#define GEN8_3DSTATE_VS_DWordLength_bits 8
+#define GEN75_3DSTATE_VS_DWordLength_bits 8
+#define GEN7_3DSTATE_VS_DWordLength_bits 8
+#define GEN6_3DSTATE_VS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_DWordLength_start 0
+#define GEN9_3DSTATE_VS_DWordLength_start 0
+#define GEN8_3DSTATE_VS_DWordLength_start 0
+#define GEN75_3DSTATE_VS_DWordLength_start 0
+#define GEN7_3DSTATE_VS_DWordLength_start 0
+#define GEN6_3DSTATE_VS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN10_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN9_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN8_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN75_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN7_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+#define GEN6_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN9_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN8_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 212
+#define GEN75_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 148
+#define GEN7_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 148
+#define GEN6_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start 148
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 212;
+ case 9: return 212;
+ case 8: return 212;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 148;
+ } else {
+ return 148;
+ }
+ case 6: return 148;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Enable */
+
+
+#define GEN10_3DSTATE_VS_Enable_bits 1
+#define GEN9_3DSTATE_VS_Enable_bits 1
+#define GEN8_3DSTATE_VS_Enable_bits 1
+#define GEN75_3DSTATE_VS_Enable_bits 1
+#define GEN7_3DSTATE_VS_Enable_bits 1
+#define GEN6_3DSTATE_VS_Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_Enable_start 224
+#define GEN9_3DSTATE_VS_Enable_start 224
+#define GEN8_3DSTATE_VS_Enable_start 224
+#define GEN75_3DSTATE_VS_Enable_start 160
+#define GEN7_3DSTATE_VS_Enable_start 160
+#define GEN6_3DSTATE_VS_Enable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Floating Point Mode */
+
+
+#define GEN10_3DSTATE_VS_FloatingPointMode_bits 1
+#define GEN9_3DSTATE_VS_FloatingPointMode_bits 1
+#define GEN8_3DSTATE_VS_FloatingPointMode_bits 1
+#define GEN75_3DSTATE_VS_FloatingPointMode_bits 1
+#define GEN7_3DSTATE_VS_FloatingPointMode_bits 1
+#define GEN6_3DSTATE_VS_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_FloatingPointMode_start 112
+#define GEN9_3DSTATE_VS_FloatingPointMode_start 112
+#define GEN8_3DSTATE_VS_FloatingPointMode_start 112
+#define GEN75_3DSTATE_VS_FloatingPointMode_start 80
+#define GEN7_3DSTATE_VS_FloatingPointMode_start 80
+#define GEN6_3DSTATE_VS_FloatingPointMode_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Illegal Opcode Exception Enable */
+
+
+#define GEN10_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+#define GEN6_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 109
+#define GEN9_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 109
+#define GEN8_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 109
+#define GEN75_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 77
+#define GEN7_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 77
+#define GEN6_3DSTATE_VS_IllegalOpcodeExceptionEnable_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 77;
+ } else {
+ return 77;
+ }
+ case 6: return 77;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Kernel Start Pointer */
+
+
+#define GEN10_3DSTATE_VS_KernelStartPointer_bits 58
+#define GEN9_3DSTATE_VS_KernelStartPointer_bits 58
+#define GEN8_3DSTATE_VS_KernelStartPointer_bits 58
+#define GEN75_3DSTATE_VS_KernelStartPointer_bits 26
+#define GEN7_3DSTATE_VS_KernelStartPointer_bits 26
+#define GEN6_3DSTATE_VS_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_KernelStartPointer_start 38
+#define GEN9_3DSTATE_VS_KernelStartPointer_start 38
+#define GEN8_3DSTATE_VS_KernelStartPointer_start 38
+#define GEN75_3DSTATE_VS_KernelStartPointer_start 38
+#define GEN7_3DSTATE_VS_KernelStartPointer_start 38
+#define GEN6_3DSTATE_VS_KernelStartPointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Maximum Number of Threads */
+
+
+#define GEN10_3DSTATE_VS_MaximumNumberofThreads_bits 10
+#define GEN9_3DSTATE_VS_MaximumNumberofThreads_bits 9
+#define GEN8_3DSTATE_VS_MaximumNumberofThreads_bits 9
+#define GEN75_3DSTATE_VS_MaximumNumberofThreads_bits 9
+#define GEN7_3DSTATE_VS_MaximumNumberofThreads_bits 7
+#define GEN6_3DSTATE_VS_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_MaximumNumberofThreads_start 246
+#define GEN9_3DSTATE_VS_MaximumNumberofThreads_start 247
+#define GEN8_3DSTATE_VS_MaximumNumberofThreads_start 247
+#define GEN75_3DSTATE_VS_MaximumNumberofThreads_start 183
+#define GEN7_3DSTATE_VS_MaximumNumberofThreads_start 185
+#define GEN6_3DSTATE_VS_MaximumNumberofThreads_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 246;
+ case 9: return 247;
+ case 8: return 247;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 183;
+ } else {
+ return 185;
+ }
+ case 6: return 185;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Per-Thread Scratch Space */
+
+
+#define GEN10_3DSTATE_VS_PerThreadScratchSpace_bits 4
+#define GEN9_3DSTATE_VS_PerThreadScratchSpace_bits 4
+#define GEN8_3DSTATE_VS_PerThreadScratchSpace_bits 4
+#define GEN75_3DSTATE_VS_PerThreadScratchSpace_bits 4
+#define GEN7_3DSTATE_VS_PerThreadScratchSpace_bits 4
+#define GEN6_3DSTATE_VS_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_PerThreadScratchSpace_start 128
+#define GEN9_3DSTATE_VS_PerThreadScratchSpace_start 128
+#define GEN8_3DSTATE_VS_PerThreadScratchSpace_start 128
+#define GEN75_3DSTATE_VS_PerThreadScratchSpace_start 96
+#define GEN7_3DSTATE_VS_PerThreadScratchSpace_start 96
+#define GEN6_3DSTATE_VS_PerThreadScratchSpace_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::SIMD8 Dispatch Enable */
+
+
+#define GEN10_3DSTATE_VS_SIMD8DispatchEnable_bits 1
+#define GEN9_3DSTATE_VS_SIMD8DispatchEnable_bits 1
+#define GEN8_3DSTATE_VS_SIMD8DispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SIMD8DispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_SIMD8DispatchEnable_start 226
+#define GEN9_3DSTATE_VS_SIMD8DispatchEnable_start 226
+#define GEN8_3DSTATE_VS_SIMD8DispatchEnable_start 226
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SIMD8DispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 226;
+ case 9: return 226;
+ case 8: return 226;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::SIMD8 Single Instance Dispatch Enable */
+
+
+#define GEN10_3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_start 233
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SIMD8SingleInstanceDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 233;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Sampler Count */
+
+
+#define GEN10_3DSTATE_VS_SamplerCount_bits 3
+#define GEN9_3DSTATE_VS_SamplerCount_bits 3
+#define GEN8_3DSTATE_VS_SamplerCount_bits 3
+#define GEN75_3DSTATE_VS_SamplerCount_bits 3
+#define GEN7_3DSTATE_VS_SamplerCount_bits 3
+#define GEN6_3DSTATE_VS_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_SamplerCount_start 123
+#define GEN9_3DSTATE_VS_SamplerCount_start 123
+#define GEN8_3DSTATE_VS_SamplerCount_start 123
+#define GEN75_3DSTATE_VS_SamplerCount_start 91
+#define GEN7_3DSTATE_VS_SamplerCount_start 91
+#define GEN6_3DSTATE_VS_SamplerCount_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 123;
+ case 9: return 123;
+ case 8: return 123;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 91;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Scratch Space Base Pointer */
+
+
+#define GEN10_3DSTATE_VS_ScratchSpaceBasePointer_bits 54
+#define GEN9_3DSTATE_VS_ScratchSpaceBasePointer_bits 54
+#define GEN8_3DSTATE_VS_ScratchSpaceBasePointer_bits 54
+#define GEN75_3DSTATE_VS_ScratchSpaceBasePointer_bits 22
+#define GEN7_3DSTATE_VS_ScratchSpaceBasePointer_bits 22
+#define GEN6_3DSTATE_VS_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 54;
+ case 9: return 54;
+ case 8: return 54;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_ScratchSpaceBasePointer_start 138
+#define GEN9_3DSTATE_VS_ScratchSpaceBasePointer_start 138
+#define GEN8_3DSTATE_VS_ScratchSpaceBasePointer_start 138
+#define GEN75_3DSTATE_VS_ScratchSpaceBasePointer_start 106
+#define GEN7_3DSTATE_VS_ScratchSpaceBasePointer_start 106
+#define GEN6_3DSTATE_VS_ScratchSpaceBasePointer_start 106
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 138;
+ case 9: return 138;
+ case 8: return 138;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 106;
+ } else {
+ return 106;
+ }
+ case 6: return 106;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Single Vertex Dispatch */
+
+
+#define GEN10_3DSTATE_VS_SingleVertexDispatch_bits 1
+#define GEN9_3DSTATE_VS_SingleVertexDispatch_bits 1
+#define GEN8_3DSTATE_VS_SingleVertexDispatch_bits 1
+#define GEN75_3DSTATE_VS_SingleVertexDispatch_bits 1
+#define GEN7_3DSTATE_VS_SingleVertexDispatch_bits 1
+#define GEN6_3DSTATE_VS_SingleVertexDispatch_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SingleVertexDispatch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_SingleVertexDispatch_start 127
+#define GEN9_3DSTATE_VS_SingleVertexDispatch_start 127
+#define GEN8_3DSTATE_VS_SingleVertexDispatch_start 127
+#define GEN75_3DSTATE_VS_SingleVertexDispatch_start 95
+#define GEN7_3DSTATE_VS_SingleVertexDispatch_start 95
+#define GEN6_3DSTATE_VS_SingleVertexDispatch_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SingleVertexDispatch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 127;
+ case 9: return 127;
+ case 8: return 127;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Software Exception Enable */
+
+
+#define GEN10_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+#define GEN9_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+#define GEN8_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+#define GEN75_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+#define GEN7_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+#define GEN6_3DSTATE_VS_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_SoftwareExceptionEnable_start 103
+#define GEN9_3DSTATE_VS_SoftwareExceptionEnable_start 103
+#define GEN8_3DSTATE_VS_SoftwareExceptionEnable_start 103
+#define GEN75_3DSTATE_VS_SoftwareExceptionEnable_start 71
+#define GEN7_3DSTATE_VS_SoftwareExceptionEnable_start 71
+#define GEN6_3DSTATE_VS_SoftwareExceptionEnable_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 103;
+ case 9: return 103;
+ case 8: return 103;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 71;
+ } else {
+ return 71;
+ }
+ case 6: return 71;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Statistics Enable */
+
+
+#define GEN10_3DSTATE_VS_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_VS_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_VS_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_VS_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_VS_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_VS_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_StatisticsEnable_start 234
+#define GEN9_3DSTATE_VS_StatisticsEnable_start 234
+#define GEN8_3DSTATE_VS_StatisticsEnable_start 234
+#define GEN75_3DSTATE_VS_StatisticsEnable_start 170
+#define GEN7_3DSTATE_VS_StatisticsEnable_start 170
+#define GEN6_3DSTATE_VS_StatisticsEnable_start 170
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 234;
+ case 9: return 234;
+ case 8: return 234;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 170;
+ } else {
+ return 170;
+ }
+ case 6: return 170;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Thread Dispatch Priority */
+
+
+#define GEN10_3DSTATE_VS_ThreadDispatchPriority_bits 1
+#define GEN9_3DSTATE_VS_ThreadDispatchPriority_bits 1
+#define GEN8_3DSTATE_VS_ThreadDispatchPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ThreadDispatchPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_ThreadDispatchPriority_start 113
+#define GEN9_3DSTATE_VS_ThreadDispatchPriority_start 113
+#define GEN8_3DSTATE_VS_ThreadDispatchPriority_start 113
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ThreadDispatchPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Thread Priority */
+
+
+#define GEN75_3DSTATE_VS_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_VS_ThreadPriority_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::User Clip Distance Clip Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_start 264
+#define GEN9_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_start 264
+#define GEN8_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_start 264
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 264;
+ case 9: return 264;
+ case 8: return 264;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::User Clip Distance Cull Test Enable Bitmask */
+
+
+#define GEN10_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN9_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_bits 8
+#define GEN8_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_start 256
+#define GEN9_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_start 256
+#define GEN8_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_UserClipDistanceCullTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::VS accesses UAV */
+
+
+#define GEN75_3DSTATE_VS_VSaccessesUAV_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VSaccessesUAV_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_VS_VSaccessesUAV_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VSaccessesUAV_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vector Mask Enable */
+
+
+#define GEN10_3DSTATE_VS_VectorMaskEnable_bits 1
+#define GEN9_3DSTATE_VS_VectorMaskEnable_bits 1
+#define GEN8_3DSTATE_VS_VectorMaskEnable_bits 1
+#define GEN75_3DSTATE_VS_VectorMaskEnable_bits 1
+#define GEN7_3DSTATE_VS_VectorMaskEnable_bits 1
+#define GEN6_3DSTATE_VS_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VectorMaskEnable_start 126
+#define GEN9_3DSTATE_VS_VectorMaskEnable_start 126
+#define GEN8_3DSTATE_VS_VectorMaskEnable_start 126
+#define GEN75_3DSTATE_VS_VectorMaskEnable_start 94
+#define GEN7_3DSTATE_VS_VectorMaskEnable_start 94
+#define GEN6_3DSTATE_VS_VectorMaskEnable_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 126;
+ case 9: return 126;
+ case 8: return 126;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 94;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vertex Cache Disable */
+
+
+#define GEN10_3DSTATE_VS_VertexCacheDisable_bits 1
+#define GEN9_3DSTATE_VS_VertexCacheDisable_bits 1
+#define GEN8_3DSTATE_VS_VertexCacheDisable_bits 1
+#define GEN75_3DSTATE_VS_VertexCacheDisable_bits 1
+#define GEN7_3DSTATE_VS_VertexCacheDisable_bits 1
+#define GEN6_3DSTATE_VS_VertexCacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexCacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VertexCacheDisable_start 225
+#define GEN9_3DSTATE_VS_VertexCacheDisable_start 225
+#define GEN8_3DSTATE_VS_VertexCacheDisable_start 225
+#define GEN75_3DSTATE_VS_VertexCacheDisable_start 161
+#define GEN7_3DSTATE_VS_VertexCacheDisable_start 161
+#define GEN6_3DSTATE_VS_VertexCacheDisable_start 161
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexCacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 225;
+ case 9: return 225;
+ case 8: return 225;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 161;
+ } else {
+ return 161;
+ }
+ case 6: return 161;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vertex URB Entry Output Length */
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryOutputLength_bits 5
+#define GEN9_3DSTATE_VS_VertexURBEntryOutputLength_bits 5
+#define GEN8_3DSTATE_VS_VertexURBEntryOutputLength_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryOutputLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryOutputLength_start 272
+#define GEN9_3DSTATE_VS_VertexURBEntryOutputLength_start 272
+#define GEN8_3DSTATE_VS_VertexURBEntryOutputLength_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryOutputLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vertex URB Entry Output Read Offset */
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN9_3DSTATE_VS_VertexURBEntryOutputReadOffset_bits 6
+#define GEN8_3DSTATE_VS_VertexURBEntryOutputReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryOutputReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryOutputReadOffset_start 277
+#define GEN9_3DSTATE_VS_VertexURBEntryOutputReadOffset_start 277
+#define GEN8_3DSTATE_VS_VertexURBEntryOutputReadOffset_start 277
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryOutputReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 277;
+ case 9: return 277;
+ case 8: return 277;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vertex URB Entry Read Length */
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+#define GEN9_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+#define GEN8_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+#define GEN75_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+#define GEN7_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+#define GEN6_3DSTATE_VS_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryReadLength_start 203
+#define GEN9_3DSTATE_VS_VertexURBEntryReadLength_start 203
+#define GEN8_3DSTATE_VS_VertexURBEntryReadLength_start 203
+#define GEN75_3DSTATE_VS_VertexURBEntryReadLength_start 139
+#define GEN7_3DSTATE_VS_VertexURBEntryReadLength_start 139
+#define GEN6_3DSTATE_VS_VertexURBEntryReadLength_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 203;
+ case 9: return 203;
+ case 8: return 203;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 139;
+ } else {
+ return 139;
+ }
+ case 6: return 139;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_VS::Vertex URB Entry Read Offset */
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+#define GEN9_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+#define GEN8_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+#define GEN75_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+#define GEN7_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+#define GEN6_3DSTATE_VS_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_VS_VertexURBEntryReadOffset_start 196
+#define GEN9_3DSTATE_VS_VertexURBEntryReadOffset_start 196
+#define GEN8_3DSTATE_VS_VertexURBEntryReadOffset_start 196
+#define GEN75_3DSTATE_VS_VertexURBEntryReadOffset_start 132
+#define GEN7_3DSTATE_VS_VertexURBEntryReadOffset_start 132
+#define GEN6_3DSTATE_VS_VertexURBEntryReadOffset_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_VS_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 196;
+ case 9: return 196;
+ case 8: return 196;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 132;
+ } else {
+ return 132;
+ }
+ case 6: return 132;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM */
+
+
+#define GEN10_3DSTATE_WM_length 2
+#define GEN9_3DSTATE_WM_length 2
+#define GEN8_3DSTATE_WM_length 2
+#define GEN75_3DSTATE_WM_length 3
+#define GEN7_3DSTATE_WM_length 3
+#define GEN6_3DSTATE_WM_length 9
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::16 Pixel Dispatch Enable */
+
+
+#define GEN6_3DSTATE_WM_16PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_16PixelDispatchEnable_start 161
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 161;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::32 Pixel Dispatch Enable */
+
+
+#define GEN6_3DSTATE_WM_32PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_32PixelDispatchEnable_start 162
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 162;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_WM_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_WM_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_WM_3DCommandOpcode_bits 3
+#define GEN75_3DSTATE_WM_3DCommandOpcode_bits 3
+#define GEN7_3DSTATE_WM_3DCommandOpcode_bits 3
+#define GEN6_3DSTATE_WM_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_WM_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_WM_3DCommandOpcode_start 24
+#define GEN75_3DSTATE_WM_3DCommandOpcode_start 24
+#define GEN7_3DSTATE_WM_3DCommandOpcode_start 24
+#define GEN6_3DSTATE_WM_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_WM_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_WM_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_WM_3DCommandSubOpcode_bits 8
+#define GEN75_3DSTATE_WM_3DCommandSubOpcode_bits 8
+#define GEN7_3DSTATE_WM_3DCommandSubOpcode_bits 8
+#define GEN6_3DSTATE_WM_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_WM_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_WM_3DCommandSubOpcode_start 16
+#define GEN75_3DSTATE_WM_3DCommandSubOpcode_start 16
+#define GEN7_3DSTATE_WM_3DCommandSubOpcode_start 16
+#define GEN6_3DSTATE_WM_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::8 Pixel Dispatch Enable */
+
+
+#define GEN6_3DSTATE_WM_8PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_8PixelDispatchEnable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Barycentric Interpolation Mode */
+
+
+#define GEN10_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+#define GEN9_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+#define GEN8_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+#define GEN75_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+#define GEN7_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+#define GEN6_3DSTATE_WM_BarycentricInterpolationMode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_BarycentricInterpolationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_BarycentricInterpolationMode_start 43
+#define GEN9_3DSTATE_WM_BarycentricInterpolationMode_start 43
+#define GEN8_3DSTATE_WM_BarycentricInterpolationMode_start 43
+#define GEN75_3DSTATE_WM_BarycentricInterpolationMode_start 43
+#define GEN7_3DSTATE_WM_BarycentricInterpolationMode_start 43
+#define GEN6_3DSTATE_WM_BarycentricInterpolationMode_start 202
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_BarycentricInterpolationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 202;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Binding Table Entry Count */
+
+
+#define GEN6_3DSTATE_WM_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_BindingTableEntryCount_start 82
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 82;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Command SubType */
+
+
+#define GEN10_3DSTATE_WM_CommandSubType_bits 2
+#define GEN9_3DSTATE_WM_CommandSubType_bits 2
+#define GEN8_3DSTATE_WM_CommandSubType_bits 2
+#define GEN75_3DSTATE_WM_CommandSubType_bits 2
+#define GEN7_3DSTATE_WM_CommandSubType_bits 2
+#define GEN6_3DSTATE_WM_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CommandSubType_start 27
+#define GEN9_3DSTATE_WM_CommandSubType_start 27
+#define GEN8_3DSTATE_WM_CommandSubType_start 27
+#define GEN75_3DSTATE_WM_CommandSubType_start 27
+#define GEN7_3DSTATE_WM_CommandSubType_start 27
+#define GEN6_3DSTATE_WM_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Command Type */
+
+
+#define GEN10_3DSTATE_WM_CommandType_bits 3
+#define GEN9_3DSTATE_WM_CommandType_bits 3
+#define GEN8_3DSTATE_WM_CommandType_bits 3
+#define GEN75_3DSTATE_WM_CommandType_bits 3
+#define GEN7_3DSTATE_WM_CommandType_bits 3
+#define GEN6_3DSTATE_WM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CommandType_start 29
+#define GEN9_3DSTATE_WM_CommandType_start 29
+#define GEN8_3DSTATE_WM_CommandType_start 29
+#define GEN75_3DSTATE_WM_CommandType_start 29
+#define GEN7_3DSTATE_WM_CommandType_start 29
+#define GEN6_3DSTATE_WM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::DWord Length */
+
+
+#define GEN10_3DSTATE_WM_DWordLength_bits 8
+#define GEN9_3DSTATE_WM_DWordLength_bits 8
+#define GEN8_3DSTATE_WM_DWordLength_bits 8
+#define GEN75_3DSTATE_WM_DWordLength_bits 8
+#define GEN7_3DSTATE_WM_DWordLength_bits 8
+#define GEN6_3DSTATE_WM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DWordLength_start 0
+#define GEN9_3DSTATE_WM_DWordLength_start 0
+#define GEN8_3DSTATE_WM_DWordLength_start 0
+#define GEN75_3DSTATE_WM_DWordLength_start 0
+#define GEN7_3DSTATE_WM_DWordLength_start 0
+#define GEN6_3DSTATE_WM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Depth Buffer Clear */
+
+
+#define GEN75_3DSTATE_WM_DepthBufferClear_bits 1
+#define GEN7_3DSTATE_WM_DepthBufferClear_bits 1
+#define GEN6_3DSTATE_WM_DepthBufferClear_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DepthBufferClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_DepthBufferClear_start 62
+#define GEN7_3DSTATE_WM_DepthBufferClear_start 62
+#define GEN6_3DSTATE_WM_DepthBufferClear_start 158
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DepthBufferClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 62;
+ } else {
+ return 62;
+ }
+ case 6: return 158;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Depth Buffer Resolve Enable */
+
+
+#define GEN75_3DSTATE_WM_DepthBufferResolveEnable_bits 1
+#define GEN7_3DSTATE_WM_DepthBufferResolveEnable_bits 1
+#define GEN6_3DSTATE_WM_DepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_DepthBufferResolveEnable_start 60
+#define GEN7_3DSTATE_WM_DepthBufferResolveEnable_start 60
+#define GEN6_3DSTATE_WM_DepthBufferResolveEnable_start 156
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 60;
+ } else {
+ return 60;
+ }
+ case 6: return 156;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Dispatch GRF Start Register For Constant/Setup Data 0 */
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 144;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Dispatch GRF Start Register For Constant/Setup Data 1 */
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 136;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Dispatch GRF Start Register For Constant/Setup Data 2 */
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DispatchGRFStartRegisterForConstantSetupData2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Dual Source Blend Enable */
+
+
+#define GEN6_3DSTATE_WM_DualSourceBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DualSourceBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_DualSourceBlendEnable_start 167
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DualSourceBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 167;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Early Depth/Stencil Control */
+
+
+#define GEN10_3DSTATE_WM_EarlyDepthStencilControl_bits 2
+#define GEN9_3DSTATE_WM_EarlyDepthStencilControl_bits 2
+#define GEN8_3DSTATE_WM_EarlyDepthStencilControl_bits 2
+#define GEN75_3DSTATE_WM_EarlyDepthStencilControl_bits 2
+#define GEN7_3DSTATE_WM_EarlyDepthStencilControl_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_EarlyDepthStencilControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_EarlyDepthStencilControl_start 53
+#define GEN9_3DSTATE_WM_EarlyDepthStencilControl_start 53
+#define GEN8_3DSTATE_WM_EarlyDepthStencilControl_start 53
+#define GEN75_3DSTATE_WM_EarlyDepthStencilControl_start 53
+#define GEN7_3DSTATE_WM_EarlyDepthStencilControl_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_EarlyDepthStencilControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 53;
+ } else {
+ return 53;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Floating Point Mode */
+
+
+#define GEN6_3DSTATE_WM_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_FloatingPointMode_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Force Kill Pixel Enable */
+
+
+#define GEN10_3DSTATE_WM_ForceKillPixelEnable_bits 2
+#define GEN9_3DSTATE_WM_ForceKillPixelEnable_bits 2
+#define GEN8_3DSTATE_WM_ForceKillPixelEnable_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ForceKillPixelEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_ForceKillPixelEnable_start 32
+#define GEN9_3DSTATE_WM_ForceKillPixelEnable_start 32
+#define GEN8_3DSTATE_WM_ForceKillPixelEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ForceKillPixelEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Force Thread Dispatch Enable */
+
+
+#define GEN10_3DSTATE_WM_ForceThreadDispatchEnable_bits 2
+#define GEN9_3DSTATE_WM_ForceThreadDispatchEnable_bits 2
+#define GEN8_3DSTATE_WM_ForceThreadDispatchEnable_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ForceThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_ForceThreadDispatchEnable_start 51
+#define GEN9_3DSTATE_WM_ForceThreadDispatchEnable_start 51
+#define GEN8_3DSTATE_WM_ForceThreadDispatchEnable_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ForceThreadDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Hierarchical Depth Buffer Resolve Enable */
+
+
+#define GEN75_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_bits 1
+#define GEN7_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_bits 1
+#define GEN6_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_start 59
+#define GEN7_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_start 59
+#define GEN6_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_start 155
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 59;
+ } else {
+ return 59;
+ }
+ case 6: return 155;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Illegal Opcode Exception Enable */
+
+
+#define GEN6_3DSTATE_WM_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_IllegalOpcodeExceptionEnable_start 77
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 77;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Kernel Start Pointer 0 */
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer0_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer0_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Kernel Start Pointer 1 */
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer1_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer1_start 230
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 230;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Kernel Start Pointer 2 */
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer2_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_KernelStartPointer2_start 262
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_KernelStartPointer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 262;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Legacy Depth Buffer Clear Enable */
+
+
+#define GEN10_3DSTATE_WM_LegacyDepthBufferClearEnable_bits 1
+#define GEN9_3DSTATE_WM_LegacyDepthBufferClearEnable_bits 1
+#define GEN8_3DSTATE_WM_LegacyDepthBufferClearEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDepthBufferClearEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LegacyDepthBufferClearEnable_start 62
+#define GEN9_3DSTATE_WM_LegacyDepthBufferClearEnable_start 62
+#define GEN8_3DSTATE_WM_LegacyDepthBufferClearEnable_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDepthBufferClearEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Legacy Depth Buffer Resolve Enable */
+
+
+#define GEN10_3DSTATE_WM_LegacyDepthBufferResolveEnable_bits 1
+#define GEN9_3DSTATE_WM_LegacyDepthBufferResolveEnable_bits 1
+#define GEN8_3DSTATE_WM_LegacyDepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LegacyDepthBufferResolveEnable_start 60
+#define GEN9_3DSTATE_WM_LegacyDepthBufferResolveEnable_start 60
+#define GEN8_3DSTATE_WM_LegacyDepthBufferResolveEnable_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Legacy Diamond Line Rasterization */
+
+
+#define GEN10_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+#define GEN9_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+#define GEN8_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+#define GEN75_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+#define GEN7_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+#define GEN6_3DSTATE_WM_LegacyDiamondLineRasterization_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDiamondLineRasterization_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LegacyDiamondLineRasterization_start 58
+#define GEN9_3DSTATE_WM_LegacyDiamondLineRasterization_start 58
+#define GEN8_3DSTATE_WM_LegacyDiamondLineRasterization_start 58
+#define GEN75_3DSTATE_WM_LegacyDiamondLineRasterization_start 58
+#define GEN7_3DSTATE_WM_LegacyDiamondLineRasterization_start 58
+#define GEN6_3DSTATE_WM_LegacyDiamondLineRasterization_start 183
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyDiamondLineRasterization_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 58;
+ } else {
+ return 58;
+ }
+ case 6: return 183;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Legacy Hierarchical Depth Buffer Resolve Enable */
+
+
+#define GEN10_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_bits 1
+#define GEN9_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_bits 1
+#define GEN8_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_start 59
+#define GEN9_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_start 59
+#define GEN8_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LegacyHierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Line Antialiasing Region Width */
+
+
+#define GEN10_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+#define GEN9_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+#define GEN8_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+#define GEN75_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+#define GEN7_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+#define GEN6_3DSTATE_WM_LineAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LineAntialiasingRegionWidth_start 38
+#define GEN9_3DSTATE_WM_LineAntialiasingRegionWidth_start 38
+#define GEN8_3DSTATE_WM_LineAntialiasingRegionWidth_start 38
+#define GEN75_3DSTATE_WM_LineAntialiasingRegionWidth_start 38
+#define GEN7_3DSTATE_WM_LineAntialiasingRegionWidth_start 38
+#define GEN6_3DSTATE_WM_LineAntialiasingRegionWidth_start 174
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 174;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Line End Cap Antialiasing Region Width */
+
+
+#define GEN10_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN9_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN8_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN75_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN7_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN6_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 40
+#define GEN9_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 40
+#define GEN8_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 40
+#define GEN75_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 40
+#define GEN7_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 40
+#define GEN6_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 176;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Line Stipple Enable */
+
+
+#define GEN10_3DSTATE_WM_LineStippleEnable_bits 1
+#define GEN9_3DSTATE_WM_LineStippleEnable_bits 1
+#define GEN8_3DSTATE_WM_LineStippleEnable_bits 1
+#define GEN75_3DSTATE_WM_LineStippleEnable_bits 1
+#define GEN7_3DSTATE_WM_LineStippleEnable_bits 1
+#define GEN6_3DSTATE_WM_LineStippleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineStippleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_LineStippleEnable_start 35
+#define GEN9_3DSTATE_WM_LineStippleEnable_start 35
+#define GEN8_3DSTATE_WM_LineStippleEnable_start 35
+#define GEN75_3DSTATE_WM_LineStippleEnable_start 35
+#define GEN7_3DSTATE_WM_LineStippleEnable_start 35
+#define GEN6_3DSTATE_WM_LineStippleEnable_start 171
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_LineStippleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 35;
+ } else {
+ return 35;
+ }
+ case 6: return 171;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::MaskStack Exception Enable */
+
+
+#define GEN6_3DSTATE_WM_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_MaskStackExceptionEnable_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 75;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Maximum Number of Threads */
+
+
+#define GEN6_3DSTATE_WM_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_MaximumNumberofThreads_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 185;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Multisample Dispatch Mode */
+
+
+#define GEN75_3DSTATE_WM_MultisampleDispatchMode_bits 1
+#define GEN7_3DSTATE_WM_MultisampleDispatchMode_bits 1
+#define GEN6_3DSTATE_WM_MultisampleDispatchMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MultisampleDispatchMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_MultisampleDispatchMode_start 95
+#define GEN7_3DSTATE_WM_MultisampleDispatchMode_start 95
+#define GEN6_3DSTATE_WM_MultisampleDispatchMode_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MultisampleDispatchMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 192;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Multisample Rasterization Mode */
+
+
+#define GEN75_3DSTATE_WM_MultisampleRasterizationMode_bits 2
+#define GEN7_3DSTATE_WM_MultisampleRasterizationMode_bits 2
+#define GEN6_3DSTATE_WM_MultisampleRasterizationMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MultisampleRasterizationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_MultisampleRasterizationMode_start 32
+#define GEN7_3DSTATE_WM_MultisampleRasterizationMode_start 32
+#define GEN6_3DSTATE_WM_MultisampleRasterizationMode_start 193
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_MultisampleRasterizationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 193;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Number of SF Output Attributes */
+
+
+#define GEN6_3DSTATE_WM_NumberofSFOutputAttributes_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_NumberofSFOutputAttributes_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_NumberofSFOutputAttributes_start 212
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_NumberofSFOutputAttributes_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 212;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::PS UAV-only */
+
+
+#define GEN75_3DSTATE_WM_PSUAVonly_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PSUAVonly_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PSUAVonly_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PSUAVonly_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Per Thread Scratch Space */
+
+
+#define GEN6_3DSTATE_WM_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_PerThreadScratchSpace_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Computed Depth */
+
+
+#define GEN6_3DSTATE_WM_PixelShaderComputedDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderComputedDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_PixelShaderComputedDepth_start 181
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderComputedDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 181;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Computed Depth Mode */
+
+
+#define GEN75_3DSTATE_WM_PixelShaderComputedDepthMode_bits 2
+#define GEN7_3DSTATE_WM_PixelShaderComputedDepthMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderComputedDepthMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PixelShaderComputedDepthMode_start 55
+#define GEN7_3DSTATE_WM_PixelShaderComputedDepthMode_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderComputedDepthMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 55;
+ } else {
+ return 55;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Kills Pixel */
+
+
+#define GEN75_3DSTATE_WM_PixelShaderKillsPixel_bits 1
+#define GEN7_3DSTATE_WM_PixelShaderKillsPixel_bits 1
+#define GEN6_3DSTATE_WM_PixelShaderKillsPixel_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PixelShaderKillsPixel_start 57
+#define GEN7_3DSTATE_WM_PixelShaderKillsPixel_start 57
+#define GEN6_3DSTATE_WM_PixelShaderKillsPixel_start 182
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 182;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Uses Input Coverage Mask */
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesInputCoverageMask_bits 1
+#define GEN7_3DSTATE_WM_PixelShaderUsesInputCoverageMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesInputCoverageMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesInputCoverageMask_start 42
+#define GEN7_3DSTATE_WM_PixelShaderUsesInputCoverageMask_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesInputCoverageMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Uses Source Depth */
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesSourceDepth_bits 1
+#define GEN7_3DSTATE_WM_PixelShaderUsesSourceDepth_bits 1
+#define GEN6_3DSTATE_WM_PixelShaderUsesSourceDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesSourceDepth_start 52
+#define GEN7_3DSTATE_WM_PixelShaderUsesSourceDepth_start 52
+#define GEN6_3DSTATE_WM_PixelShaderUsesSourceDepth_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 180;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Pixel Shader Uses Source W */
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesSourceW_bits 1
+#define GEN7_3DSTATE_WM_PixelShaderUsesSourceW_bits 1
+#define GEN6_3DSTATE_WM_PixelShaderUsesSourceW_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesSourceW_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_PixelShaderUsesSourceW_start 51
+#define GEN7_3DSTATE_WM_PixelShaderUsesSourceW_start 51
+#define GEN6_3DSTATE_WM_PixelShaderUsesSourceW_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PixelShaderUsesSourceW_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 51;
+ } else {
+ return 51;
+ }
+ case 6: return 168;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Point Rasterization Rule */
+
+
+#define GEN10_3DSTATE_WM_PointRasterizationRule_bits 1
+#define GEN9_3DSTATE_WM_PointRasterizationRule_bits 1
+#define GEN8_3DSTATE_WM_PointRasterizationRule_bits 1
+#define GEN75_3DSTATE_WM_PointRasterizationRule_bits 1
+#define GEN7_3DSTATE_WM_PointRasterizationRule_bits 1
+#define GEN6_3DSTATE_WM_PointRasterizationRule_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PointRasterizationRule_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_PointRasterizationRule_start 34
+#define GEN9_3DSTATE_WM_PointRasterizationRule_start 34
+#define GEN8_3DSTATE_WM_PointRasterizationRule_start 34
+#define GEN75_3DSTATE_WM_PointRasterizationRule_start 34
+#define GEN7_3DSTATE_WM_PointRasterizationRule_start 34
+#define GEN6_3DSTATE_WM_PointRasterizationRule_start 201
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PointRasterizationRule_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 201;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Polygon Stipple Enable */
+
+
+#define GEN10_3DSTATE_WM_PolygonStippleEnable_bits 1
+#define GEN9_3DSTATE_WM_PolygonStippleEnable_bits 1
+#define GEN8_3DSTATE_WM_PolygonStippleEnable_bits 1
+#define GEN75_3DSTATE_WM_PolygonStippleEnable_bits 1
+#define GEN7_3DSTATE_WM_PolygonStippleEnable_bits 1
+#define GEN6_3DSTATE_WM_PolygonStippleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PolygonStippleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_PolygonStippleEnable_start 36
+#define GEN9_3DSTATE_WM_PolygonStippleEnable_start 36
+#define GEN8_3DSTATE_WM_PolygonStippleEnable_start 36
+#define GEN75_3DSTATE_WM_PolygonStippleEnable_start 36
+#define GEN7_3DSTATE_WM_PolygonStippleEnable_start 36
+#define GEN6_3DSTATE_WM_PolygonStippleEnable_start 173
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PolygonStippleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 173;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Position XY Offset Select */
+
+
+#define GEN6_3DSTATE_WM_PositionXYOffsetSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PositionXYOffsetSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_PositionXYOffsetSelect_start 210
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PositionXYOffsetSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 210;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Position ZW Interpolation Mode */
+
+
+#define GEN10_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+#define GEN9_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+#define GEN8_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+#define GEN75_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+#define GEN7_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+#define GEN6_3DSTATE_WM_PositionZWInterpolationMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PositionZWInterpolationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_PositionZWInterpolationMode_start 49
+#define GEN9_3DSTATE_WM_PositionZWInterpolationMode_start 49
+#define GEN8_3DSTATE_WM_PositionZWInterpolationMode_start 49
+#define GEN75_3DSTATE_WM_PositionZWInterpolationMode_start 49
+#define GEN7_3DSTATE_WM_PositionZWInterpolationMode_start 49
+#define GEN6_3DSTATE_WM_PositionZWInterpolationMode_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_PositionZWInterpolationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 49;
+ case 8: return 49;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 49;
+ } else {
+ return 49;
+ }
+ case 6: return 208;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::RT Independent Rasterization Enable */
+
+
+#define GEN75_3DSTATE_WM_RTIndependentRasterizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_RTIndependentRasterizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_RTIndependentRasterizationEnable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_RTIndependentRasterizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Sampler Count */
+
+
+#define GEN6_3DSTATE_WM_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_SamplerCount_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 91;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Scratch Space Base Pointer */
+
+
+#define GEN6_3DSTATE_WM_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_ScratchSpaceBasePointer_start 106
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 106;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Single Program Flow */
+
+
+#define GEN6_3DSTATE_WM_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_SingleProgramFlow_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Software Exception Enable */
+
+
+#define GEN6_3DSTATE_WM_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_SoftwareExceptionEnable_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 71;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Statistics Enable */
+
+
+#define GEN10_3DSTATE_WM_StatisticsEnable_bits 1
+#define GEN9_3DSTATE_WM_StatisticsEnable_bits 1
+#define GEN8_3DSTATE_WM_StatisticsEnable_bits 1
+#define GEN75_3DSTATE_WM_StatisticsEnable_bits 1
+#define GEN7_3DSTATE_WM_StatisticsEnable_bits 1
+#define GEN6_3DSTATE_WM_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_StatisticsEnable_start 63
+#define GEN9_3DSTATE_WM_StatisticsEnable_start 63
+#define GEN8_3DSTATE_WM_StatisticsEnable_start 63
+#define GEN75_3DSTATE_WM_StatisticsEnable_start 63
+#define GEN7_3DSTATE_WM_StatisticsEnable_start 63
+#define GEN6_3DSTATE_WM_StatisticsEnable_start 159
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 63;
+ } else {
+ return 63;
+ }
+ case 6: return 159;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Thread Dispatch Enable */
+
+
+#define GEN75_3DSTATE_WM_ThreadDispatchEnable_bits 1
+#define GEN7_3DSTATE_WM_ThreadDispatchEnable_bits 1
+#define GEN6_3DSTATE_WM_ThreadDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_3DSTATE_WM_ThreadDispatchEnable_start 61
+#define GEN7_3DSTATE_WM_ThreadDispatchEnable_start 61
+#define GEN6_3DSTATE_WM_ThreadDispatchEnable_start 179
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ThreadDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 61;
+ } else {
+ return 61;
+ }
+ case 6: return 179;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Thread Priority */
+
+
+#define GEN6_3DSTATE_WM_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_ThreadPriority_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 81;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::Vector Mask Enable */
+
+
+#define GEN6_3DSTATE_WM_VectorMaskEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_VectorMaskEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_VectorMaskEnable_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_VectorMaskEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 94;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM::oMask Present to RenderTarget */
+
+
+#define GEN6_3DSTATE_WM_oMaskPresenttoRenderTarget_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_oMaskPresenttoRenderTarget_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_3DSTATE_WM_oMaskPresenttoRenderTarget_start 169
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_oMaskPresenttoRenderTarget_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 169;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_length 2
+#define GEN9_3DSTATE_WM_CHROMAKEY_length 2
+#define GEN8_3DSTATE_WM_CHROMAKEY_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::ChromaKey Kill Enable */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_bits 1
+#define GEN9_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_bits 1
+#define GEN8_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_start 63
+#define GEN9_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_start 63
+#define GEN8_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_ChromaKeyKillEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::Command SubType */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_CommandSubType_bits 2
+#define GEN9_3DSTATE_WM_CHROMAKEY_CommandSubType_bits 2
+#define GEN8_3DSTATE_WM_CHROMAKEY_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_CommandSubType_start 27
+#define GEN9_3DSTATE_WM_CHROMAKEY_CommandSubType_start 27
+#define GEN8_3DSTATE_WM_CHROMAKEY_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::Command Type */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_CommandType_bits 3
+#define GEN9_3DSTATE_WM_CHROMAKEY_CommandType_bits 3
+#define GEN8_3DSTATE_WM_CHROMAKEY_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_CommandType_start 29
+#define GEN9_3DSTATE_WM_CHROMAKEY_CommandType_start 29
+#define GEN8_3DSTATE_WM_CHROMAKEY_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_CHROMAKEY::DWord Length */
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_DWordLength_bits 8
+#define GEN9_3DSTATE_WM_CHROMAKEY_DWordLength_bits 8
+#define GEN8_3DSTATE_WM_CHROMAKEY_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_CHROMAKEY_DWordLength_start 0
+#define GEN9_3DSTATE_WM_CHROMAKEY_DWordLength_start 0
+#define GEN8_3DSTATE_WM_CHROMAKEY_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_CHROMAKEY_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_length 4
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_length 4
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Fail Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_start 49
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_start 49
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 49;
+ case 8: return 49;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Pass Depth Fail Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_start 46
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_start 46
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_start 46
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Pass Depth Pass Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_start 43
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_start 43
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Reference Value */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_start 96
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilReferenceValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Test Function */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_start 52
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_start 52
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Test Mask */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_start 72
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_start 72
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Backface Stencil Write Mask */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_start 64
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_start 64
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Command SubType */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_bits 2
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_bits 2
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_start 27
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_start 27
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Command Type */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_CommandType_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_CommandType_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_CommandType_start 29
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_CommandType_start 29
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::DWord Length */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DWordLength_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DWordLength_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DWordLength_start 0
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DWordLength_start 0
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Depth Buffer Write Enable */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_bits 1
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_bits 1
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_start 32
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_start 32
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Depth Test Enable */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_bits 1
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_bits 1
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_start 33
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_start 33
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Depth Test Function */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_start 37
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_start 37
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DepthTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Double Sided Stencil Enable */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_bits 1
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_bits 1
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_start 36
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_start 36
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Buffer Write Enable */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_bits 1
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_bits 1
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_start 34
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_start 34
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Fail Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_start 61
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_start 61
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Pass Depth Fail Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_start 58
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_start 58
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Pass Depth Pass Op */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_start 55
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_start 55
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 55;
+ case 9: return 55;
+ case 8: return 55;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Reference Value */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_start 104
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilReferenceValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 104;
+ case 9: return 104;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Test Enable */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_bits 1
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_bits 1
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_start 35
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_start 35
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Test Function */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_bits 3
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_bits 3
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_start 40
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_start 40
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Test Mask */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_start 88
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_start 88
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_DEPTH_STENCIL::Stencil Write Mask */
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_bits 8
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_bits 8
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_start 80
+#define GEN9_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_start 80
+#define GEN8_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_DEPTH_STENCIL_StencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_length 5
+#define GEN9_3DSTATE_WM_HZ_OP_length 5
+#define GEN8_3DSTATE_WM_HZ_OP_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::3D Command Opcode */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_3DCommandOpcode_bits 3
+#define GEN9_3DSTATE_WM_HZ_OP_3DCommandOpcode_bits 3
+#define GEN8_3DSTATE_WM_HZ_OP_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_3DCommandOpcode_start 24
+#define GEN9_3DSTATE_WM_HZ_OP_3DCommandOpcode_start 24
+#define GEN8_3DSTATE_WM_HZ_OP_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::3D Command Sub Opcode */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_bits 8
+#define GEN9_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_bits 8
+#define GEN8_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_start 16
+#define GEN9_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_start 16
+#define GEN8_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Clear Rectangle X Max */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleXMax_bits 16
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleXMax_bits 16
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleXMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleXMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleXMax_start 96
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleXMax_start 96
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleXMax_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleXMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Clear Rectangle X Min */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleXMin_bits 16
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleXMin_bits 16
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleXMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleXMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleXMin_start 64
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleXMin_start 64
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleXMin_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleXMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Clear Rectangle Y Max */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleYMax_bits 16
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleYMax_bits 16
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleYMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleYMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleYMax_start 112
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleYMax_start 112
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleYMax_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleYMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Clear Rectangle Y Min */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleYMin_bits 16
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleYMin_bits 16
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleYMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleYMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ClearRectangleYMin_start 80
+#define GEN9_3DSTATE_WM_HZ_OP_ClearRectangleYMin_start 80
+#define GEN8_3DSTATE_WM_HZ_OP_ClearRectangleYMin_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ClearRectangleYMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Command SubType */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_CommandSubType_bits 2
+#define GEN9_3DSTATE_WM_HZ_OP_CommandSubType_bits 2
+#define GEN8_3DSTATE_WM_HZ_OP_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_CommandSubType_start 27
+#define GEN9_3DSTATE_WM_HZ_OP_CommandSubType_start 27
+#define GEN8_3DSTATE_WM_HZ_OP_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Command Type */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_CommandType_bits 3
+#define GEN9_3DSTATE_WM_HZ_OP_CommandType_bits 3
+#define GEN8_3DSTATE_WM_HZ_OP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_CommandType_start 29
+#define GEN9_3DSTATE_WM_HZ_OP_CommandType_start 29
+#define GEN8_3DSTATE_WM_HZ_OP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::DWord Length */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DWordLength_bits 8
+#define GEN9_3DSTATE_WM_HZ_OP_DWordLength_bits 8
+#define GEN8_3DSTATE_WM_HZ_OP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DWordLength_start 0
+#define GEN9_3DSTATE_WM_HZ_OP_DWordLength_start 0
+#define GEN8_3DSTATE_WM_HZ_OP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Depth Buffer Clear Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_start 62
+#define GEN9_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_start 62
+#define GEN8_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DepthBufferClearEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Depth Buffer Resolve Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_start 60
+#define GEN9_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_start 60
+#define GEN8_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Full Surface Depth and Stencil Clear */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_start 57
+#define GEN9_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_start 57
+#define GEN8_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_FullSurfaceDepthandStencilClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 57;
+ case 9: return 57;
+ case 8: return 57;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Hierarchical Depth Buffer Resolve Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_start 59
+#define GEN9_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_start 59
+#define GEN8_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Number of Multisamples */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_NumberofMultisamples_bits 3
+#define GEN9_3DSTATE_WM_HZ_OP_NumberofMultisamples_bits 3
+#define GEN8_3DSTATE_WM_HZ_OP_NumberofMultisamples_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_NumberofMultisamples_start 45
+#define GEN9_3DSTATE_WM_HZ_OP_NumberofMultisamples_start 45
+#define GEN8_3DSTATE_WM_HZ_OP_NumberofMultisamples_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_NumberofMultisamples_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 45;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Pixel Position Offset Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_start 58
+#define GEN9_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_start 58
+#define GEN8_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_PixelPositionOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Sample Mask */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_SampleMask_bits 16
+#define GEN9_3DSTATE_WM_HZ_OP_SampleMask_bits 16
+#define GEN8_3DSTATE_WM_HZ_OP_SampleMask_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_SampleMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_SampleMask_start 128
+#define GEN9_3DSTATE_WM_HZ_OP_SampleMask_start 128
+#define GEN8_3DSTATE_WM_HZ_OP_SampleMask_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_SampleMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Scissor Rectangle Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_start 61
+#define GEN9_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_start 61
+#define GEN8_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 61;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Stencil Buffer Clear Enable */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_bits 1
+#define GEN9_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_bits 1
+#define GEN8_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_start 63
+#define GEN9_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_start 63
+#define GEN8_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_StencilBufferClearEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* 3DSTATE_WM_HZ_OP::Stencil Clear Value */
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_StencilClearValue_bits 8
+#define GEN9_3DSTATE_WM_HZ_OP_StencilClearValue_bits 8
+#define GEN8_3DSTATE_WM_HZ_OP_StencilClearValue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_StencilClearValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_3DSTATE_WM_HZ_OP_StencilClearValue_start 48
+#define GEN9_3DSTATE_WM_HZ_OP_StencilClearValue_start 48
+#define GEN8_3DSTATE_WM_HZ_OP_StencilClearValue_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+_3DSTATE_WM_HZ_OP_StencilClearValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ACTHD_UDW */
+
+
+#define GEN9_ACTHD_UDW_length 1
+#define GEN8_ACTHD_UDW_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ACTHD_UDW_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ACTHD_UDW::Head Pointer Upper DWORD */
+
+
+#define GEN9_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+#define GEN8_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+#define GEN8_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_ACTHD_UDW */
+
+
+#define GEN9_BCS_ACTHD_UDW_length 1
+#define GEN8_BCS_ACTHD_UDW_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_ACTHD_UDW::Head Pointer Upper DWORD */
+
+
+#define GEN9_BCS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+#define GEN8_BCS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+#define GEN8_BCS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG */
+
+
+#define GEN75_BCS_FAULT_REG_length 1
+#define GEN7_BCS_FAULT_REG_length 1
+#define GEN6_BCS_FAULT_REG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG::Fault Type */
+
+
+#define GEN75_BCS_FAULT_REG_FaultType_bits 2
+#define GEN7_BCS_FAULT_REG_FaultType_bits 2
+#define GEN6_BCS_FAULT_REG_FaultType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BCS_FAULT_REG_FaultType_start 1
+#define GEN7_BCS_FAULT_REG_FaultType_start 1
+#define GEN6_BCS_FAULT_REG_FaultType_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG::GTTSEL */
+
+
+#define GEN75_BCS_FAULT_REG_GTTSEL_bits -9
+#define GEN7_BCS_FAULT_REG_GTTSEL_bits -9
+#define GEN6_BCS_FAULT_REG_GTTSEL_bits -9
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return -9;
+ } else {
+ return -9;
+ }
+ case 6: return -9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BCS_FAULT_REG_GTTSEL_start 11
+#define GEN7_BCS_FAULT_REG_GTTSEL_start 11
+#define GEN6_BCS_FAULT_REG_GTTSEL_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG::SRCID of Fault */
+
+
+#define GEN75_BCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN7_BCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN6_BCS_FAULT_REG_SRCIDofFault_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN7_BCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN6_BCS_FAULT_REG_SRCIDofFault_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG::Valid Bit */
+
+
+#define GEN75_BCS_FAULT_REG_ValidBit_bits 1
+#define GEN7_BCS_FAULT_REG_ValidBit_bits 1
+#define GEN6_BCS_FAULT_REG_ValidBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BCS_FAULT_REG_ValidBit_start 0
+#define GEN7_BCS_FAULT_REG_ValidBit_start 0
+#define GEN6_BCS_FAULT_REG_ValidBit_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_FAULT_REG::Virtual Address of Fault */
+
+
+#define GEN75_BCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN7_BCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN6_BCS_FAULT_REG_VirtualAddressofFault_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN7_BCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN6_BCS_FAULT_REG_VirtualAddressofFault_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_INSTDONE */
+
+
+#define GEN10_BCS_INSTDONE_length 1
+#define GEN9_BCS_INSTDONE_length 1
+#define GEN8_BCS_INSTDONE_length 1
+#define GEN75_BCS_INSTDONE_length 1
+#define GEN7_BCS_INSTDONE_length 1
+#define GEN6_BCS_INSTDONE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_INSTDONE::BCS Done */
+
+
+#define GEN10_BCS_INSTDONE_BCSDone_bits 1
+#define GEN9_BCS_INSTDONE_BCSDone_bits 1
+#define GEN8_BCS_INSTDONE_BCSDone_bits 1
+#define GEN75_BCS_INSTDONE_BCSDone_bits 1
+#define GEN7_BCS_INSTDONE_BCSDone_bits 1
+#define GEN6_BCS_INSTDONE_BCSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_BCSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BCS_INSTDONE_BCSDone_start 3
+#define GEN9_BCS_INSTDONE_BCSDone_start 3
+#define GEN8_BCS_INSTDONE_BCSDone_start 3
+#define GEN75_BCS_INSTDONE_BCSDone_start 3
+#define GEN7_BCS_INSTDONE_BCSDone_start 3
+#define GEN6_BCS_INSTDONE_BCSDone_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_BCSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_INSTDONE::Blitter IDLE */
+
+
+#define GEN10_BCS_INSTDONE_BlitterIDLE_bits 1
+#define GEN9_BCS_INSTDONE_BlitterIDLE_bits 1
+#define GEN8_BCS_INSTDONE_BlitterIDLE_bits 1
+#define GEN75_BCS_INSTDONE_BlitterIDLE_bits 1
+#define GEN7_BCS_INSTDONE_BlitterIDLE_bits 1
+#define GEN6_BCS_INSTDONE_BlitterIDLE_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_BlitterIDLE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BCS_INSTDONE_BlitterIDLE_start 1
+#define GEN9_BCS_INSTDONE_BlitterIDLE_start 1
+#define GEN8_BCS_INSTDONE_BlitterIDLE_start 1
+#define GEN75_BCS_INSTDONE_BlitterIDLE_start 1
+#define GEN7_BCS_INSTDONE_BlitterIDLE_start 1
+#define GEN6_BCS_INSTDONE_BlitterIDLE_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_BlitterIDLE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_INSTDONE::GAB IDLE */
+
+
+#define GEN10_BCS_INSTDONE_GABIDLE_bits 1
+#define GEN9_BCS_INSTDONE_GABIDLE_bits 1
+#define GEN8_BCS_INSTDONE_GABIDLE_bits 1
+#define GEN75_BCS_INSTDONE_GABIDLE_bits 1
+#define GEN7_BCS_INSTDONE_GABIDLE_bits 1
+#define GEN6_BCS_INSTDONE_GABIDLE_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_GABIDLE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BCS_INSTDONE_GABIDLE_start 2
+#define GEN9_BCS_INSTDONE_GABIDLE_start 2
+#define GEN8_BCS_INSTDONE_GABIDLE_start 2
+#define GEN75_BCS_INSTDONE_GABIDLE_start 2
+#define GEN7_BCS_INSTDONE_GABIDLE_start 2
+#define GEN6_BCS_INSTDONE_GABIDLE_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_GABIDLE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_INSTDONE::Ring Enable */
+
+
+#define GEN10_BCS_INSTDONE_RingEnable_bits 1
+#define GEN9_BCS_INSTDONE_RingEnable_bits 1
+#define GEN8_BCS_INSTDONE_RingEnable_bits 1
+#define GEN75_BCS_INSTDONE_RingEnable_bits 1
+#define GEN7_BCS_INSTDONE_RingEnable_bits 1
+#define GEN6_BCS_INSTDONE_RingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BCS_INSTDONE_RingEnable_start 0
+#define GEN9_BCS_INSTDONE_RingEnable_start 0
+#define GEN8_BCS_INSTDONE_RingEnable_start 0
+#define GEN75_BCS_INSTDONE_RingEnable_start 0
+#define GEN7_BCS_INSTDONE_RingEnable_start 0
+#define GEN6_BCS_INSTDONE_RingEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_length 1
+#define GEN8_BCS_RING_BUFFER_CTL_length 1
+#define GEN75_BCS_RING_BUFFER_CTL_length 1
+#define GEN7_BCS_RING_BUFFER_CTL_length 1
+#define GEN6_BCS_RING_BUFFER_CTL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::Automatic Report Head Pointer */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN8_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN75_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN7_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN6_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN8_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN75_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN7_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN6_BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::Buffer Length (in pages - 1) */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN8_BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN75_BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN7_BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN6_BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN8_BCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN75_BCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN7_BCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN6_BCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::Disable Register Accesses */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN8_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN75_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN7_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN6_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN8_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN75_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN7_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN6_BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::RBWait */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN8_BCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN75_BCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN7_BCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN6_BCS_RING_BUFFER_CTL_RBWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN8_BCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN75_BCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN7_BCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN6_BCS_RING_BUFFER_CTL_RBWait_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::Ring Buffer Enable */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN8_BCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN75_BCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN7_BCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN6_BCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN8_BCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN75_BCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN7_BCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN6_BCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BCS_RING_BUFFER_CTL::Semaphore Wait */
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN8_BCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN75_BCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN7_BCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN6_BCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_BCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN8_BCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN75_BCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN7_BCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN6_BCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+BCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BINDING_TABLE_EDIT_ENTRY */
+
+
+#define GEN10_BINDING_TABLE_EDIT_ENTRY_length 1
+#define GEN9_BINDING_TABLE_EDIT_ENTRY_length 1
+#define GEN8_BINDING_TABLE_EDIT_ENTRY_length 1
+#define GEN75_BINDING_TABLE_EDIT_ENTRY_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_EDIT_ENTRY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BINDING_TABLE_EDIT_ENTRY::Binding Table Index */
+
+
+#define GEN10_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits 8
+#define GEN9_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits 8
+#define GEN8_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits 8
+#define GEN75_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start 16
+#define GEN9_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start 16
+#define GEN8_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start 16
+#define GEN75_BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_EDIT_ENTRY_BindingTableIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BINDING_TABLE_EDIT_ENTRY::Surface State Pointer */
+
+
+#define GEN10_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits 16
+#define GEN9_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits 16
+#define GEN8_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits 16
+#define GEN75_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start 0
+#define GEN9_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start 0
+#define GEN8_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start 0
+#define GEN75_BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_EDIT_ENTRY_SurfaceStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BINDING_TABLE_STATE */
+
+
+#define GEN10_BINDING_TABLE_STATE_length 1
+#define GEN9_BINDING_TABLE_STATE_length 1
+#define GEN8_BINDING_TABLE_STATE_length 1
+#define GEN75_BINDING_TABLE_STATE_length 1
+#define GEN7_BINDING_TABLE_STATE_length 1
+#define GEN6_BINDING_TABLE_STATE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BINDING_TABLE_STATE::Surface State Pointer */
+
+
+#define GEN10_BINDING_TABLE_STATE_SurfaceStatePointer_bits 26
+#define GEN9_BINDING_TABLE_STATE_SurfaceStatePointer_bits 26
+#define GEN8_BINDING_TABLE_STATE_SurfaceStatePointer_bits 26
+#define GEN75_BINDING_TABLE_STATE_SurfaceStatePointer_bits 27
+#define GEN7_BINDING_TABLE_STATE_SurfaceStatePointer_bits 27
+#define GEN6_BINDING_TABLE_STATE_SurfaceStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_STATE_SurfaceStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BINDING_TABLE_STATE_SurfaceStatePointer_start 6
+#define GEN9_BINDING_TABLE_STATE_SurfaceStatePointer_start 6
+#define GEN8_BINDING_TABLE_STATE_SurfaceStatePointer_start 6
+#define GEN75_BINDING_TABLE_STATE_SurfaceStatePointer_start 5
+#define GEN7_BINDING_TABLE_STATE_SurfaceStatePointer_start 5
+#define GEN6_BINDING_TABLE_STATE_SurfaceStatePointer_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BINDING_TABLE_STATE_SurfaceStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE */
+
+
+#define GEN10_BLEND_STATE_length 1
+#define GEN9_BLEND_STATE_length 1
+#define GEN8_BLEND_STATE_length 1
+#define GEN75_BLEND_STATE_length 0
+#define GEN7_BLEND_STATE_length 0
+#define GEN6_BLEND_STATE_length 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Alpha Test Enable */
+
+
+#define GEN10_BLEND_STATE_AlphaTestEnable_bits 1
+#define GEN9_BLEND_STATE_AlphaTestEnable_bits 1
+#define GEN8_BLEND_STATE_AlphaTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_AlphaTestEnable_start 27
+#define GEN9_BLEND_STATE_AlphaTestEnable_start 27
+#define GEN8_BLEND_STATE_AlphaTestEnable_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Alpha Test Function */
+
+
+#define GEN10_BLEND_STATE_AlphaTestFunction_bits 3
+#define GEN9_BLEND_STATE_AlphaTestFunction_bits 3
+#define GEN8_BLEND_STATE_AlphaTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_AlphaTestFunction_start 24
+#define GEN9_BLEND_STATE_AlphaTestFunction_start 24
+#define GEN8_BLEND_STATE_AlphaTestFunction_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Alpha To Coverage Dither Enable */
+
+
+#define GEN10_BLEND_STATE_AlphaToCoverageDitherEnable_bits 1
+#define GEN9_BLEND_STATE_AlphaToCoverageDitherEnable_bits 1
+#define GEN8_BLEND_STATE_AlphaToCoverageDitherEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToCoverageDitherEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_AlphaToCoverageDitherEnable_start 28
+#define GEN9_BLEND_STATE_AlphaToCoverageDitherEnable_start 28
+#define GEN8_BLEND_STATE_AlphaToCoverageDitherEnable_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToCoverageDitherEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 28;
+ case 9: return 28;
+ case 8: return 28;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Alpha To Coverage Enable */
+
+
+#define GEN10_BLEND_STATE_AlphaToCoverageEnable_bits 1
+#define GEN9_BLEND_STATE_AlphaToCoverageEnable_bits 1
+#define GEN8_BLEND_STATE_AlphaToCoverageEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_AlphaToCoverageEnable_start 31
+#define GEN9_BLEND_STATE_AlphaToCoverageEnable_start 31
+#define GEN8_BLEND_STATE_AlphaToCoverageEnable_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 31;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Alpha To One Enable */
+
+
+#define GEN10_BLEND_STATE_AlphaToOneEnable_bits 1
+#define GEN9_BLEND_STATE_AlphaToOneEnable_bits 1
+#define GEN8_BLEND_STATE_AlphaToOneEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToOneEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_AlphaToOneEnable_start 29
+#define GEN9_BLEND_STATE_AlphaToOneEnable_start 29
+#define GEN8_BLEND_STATE_AlphaToOneEnable_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_AlphaToOneEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Color Dither Enable */
+
+
+#define GEN10_BLEND_STATE_ColorDitherEnable_bits 1
+#define GEN9_BLEND_STATE_ColorDitherEnable_bits 1
+#define GEN8_BLEND_STATE_ColorDitherEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ColorDitherEnable_start 23
+#define GEN9_BLEND_STATE_ColorDitherEnable_start 23
+#define GEN8_BLEND_STATE_ColorDitherEnable_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ColorDitherEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Entry */
+
+
+#define GEN10_BLEND_STATE_Entry_bits 64
+#define GEN9_BLEND_STATE_Entry_bits 64
+#define GEN8_BLEND_STATE_Entry_bits 64
+#define GEN75_BLEND_STATE_Entry_bits 64
+#define GEN7_BLEND_STATE_Entry_bits 64
+#define GEN6_BLEND_STATE_Entry_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_Entry_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_Entry_start 0
+#define GEN9_BLEND_STATE_Entry_start 0
+#define GEN8_BLEND_STATE_Entry_start 0
+#define GEN75_BLEND_STATE_Entry_start 0
+#define GEN7_BLEND_STATE_Entry_start 0
+#define GEN6_BLEND_STATE_Entry_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_Entry_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Independent Alpha Blend Enable */
+
+
+#define GEN10_BLEND_STATE_IndependentAlphaBlendEnable_bits 1
+#define GEN9_BLEND_STATE_IndependentAlphaBlendEnable_bits 1
+#define GEN8_BLEND_STATE_IndependentAlphaBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_IndependentAlphaBlendEnable_start 30
+#define GEN9_BLEND_STATE_IndependentAlphaBlendEnable_start 30
+#define GEN8_BLEND_STATE_IndependentAlphaBlendEnable_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::X Dither Offset */
+
+
+#define GEN10_BLEND_STATE_XDitherOffset_bits 2
+#define GEN9_BLEND_STATE_XDitherOffset_bits 2
+#define GEN8_BLEND_STATE_XDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_XDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_XDitherOffset_start 21
+#define GEN9_BLEND_STATE_XDitherOffset_start 21
+#define GEN8_BLEND_STATE_XDitherOffset_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_XDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE::Y Dither Offset */
+
+
+#define GEN10_BLEND_STATE_YDitherOffset_bits 2
+#define GEN9_BLEND_STATE_YDitherOffset_bits 2
+#define GEN8_BLEND_STATE_YDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_YDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_YDitherOffset_start 19
+#define GEN9_BLEND_STATE_YDitherOffset_start 19
+#define GEN8_BLEND_STATE_YDitherOffset_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_YDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY */
+
+
+#define GEN10_BLEND_STATE_ENTRY_length 2
+#define GEN9_BLEND_STATE_ENTRY_length 2
+#define GEN8_BLEND_STATE_ENTRY_length 2
+#define GEN75_BLEND_STATE_ENTRY_length 2
+#define GEN7_BLEND_STATE_ENTRY_length 2
+#define GEN6_BLEND_STATE_ENTRY_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Alpha Blend Function */
+
+
+#define GEN10_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+#define GEN9_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+#define GEN8_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+#define GEN75_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+#define GEN7_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+#define GEN6_BLEND_STATE_ENTRY_AlphaBlendFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaBlendFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_AlphaBlendFunction_start 5
+#define GEN9_BLEND_STATE_ENTRY_AlphaBlendFunction_start 5
+#define GEN8_BLEND_STATE_ENTRY_AlphaBlendFunction_start 5
+#define GEN75_BLEND_STATE_ENTRY_AlphaBlendFunction_start 26
+#define GEN7_BLEND_STATE_ENTRY_AlphaBlendFunction_start 26
+#define GEN6_BLEND_STATE_ENTRY_AlphaBlendFunction_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaBlendFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Alpha Test Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaTestEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_AlphaTestEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_AlphaTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaTestEnable_start 48
+#define GEN7_BLEND_STATE_ENTRY_AlphaTestEnable_start 48
+#define GEN6_BLEND_STATE_ENTRY_AlphaTestEnable_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Alpha Test Function */
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaTestFunction_bits 3
+#define GEN7_BLEND_STATE_ENTRY_AlphaTestFunction_bits 3
+#define GEN6_BLEND_STATE_ENTRY_AlphaTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaTestFunction_start 45
+#define GEN7_BLEND_STATE_ENTRY_AlphaTestFunction_start 45
+#define GEN6_BLEND_STATE_ENTRY_AlphaTestFunction_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 45;
+ } else {
+ return 45;
+ }
+ case 6: return 45;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::AlphaToCoverage Dither Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_start 61
+#define GEN7_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_start 61
+#define GEN6_BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToCoverageDitherEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 61;
+ } else {
+ return 61;
+ }
+ case 6: return 61;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::AlphaToCoverage Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToCoverageEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_AlphaToCoverageEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_AlphaToCoverageEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToCoverageEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToCoverageEnable_start 63
+#define GEN7_BLEND_STATE_ENTRY_AlphaToCoverageEnable_start 63
+#define GEN6_BLEND_STATE_ENTRY_AlphaToCoverageEnable_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToCoverageEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 63;
+ } else {
+ return 63;
+ }
+ case 6: return 63;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::AlphaToOne Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToOneEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_AlphaToOneEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_AlphaToOneEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToOneEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_AlphaToOneEnable_start 62
+#define GEN7_BLEND_STATE_ENTRY_AlphaToOneEnable_start 62
+#define GEN6_BLEND_STATE_ENTRY_AlphaToOneEnable_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_AlphaToOneEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 62;
+ } else {
+ return 62;
+ }
+ case 6: return 62;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Color Blend Function */
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+#define GEN9_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+#define GEN8_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+#define GEN75_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+#define GEN7_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+#define GEN6_BLEND_STATE_ENTRY_ColorBlendFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorBlendFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorBlendFunction_start 18
+#define GEN9_BLEND_STATE_ENTRY_ColorBlendFunction_start 18
+#define GEN8_BLEND_STATE_ENTRY_ColorBlendFunction_start 18
+#define GEN75_BLEND_STATE_ENTRY_ColorBlendFunction_start 11
+#define GEN7_BLEND_STATE_ENTRY_ColorBlendFunction_start 11
+#define GEN6_BLEND_STATE_ENTRY_ColorBlendFunction_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorBlendFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Color Buffer Blend Enable */
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+#define GEN9_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+#define GEN8_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+#define GEN75_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+#define GEN9_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+#define GEN8_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+#define GEN75_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+#define GEN7_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+#define GEN6_BLEND_STATE_ENTRY_ColorBufferBlendEnable_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 31;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 31;
+ } else {
+ return 31;
+ }
+ case 6: return 31;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Color Clamp Range */
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+#define GEN9_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+#define GEN8_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+#define GEN75_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+#define GEN7_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+#define GEN6_BLEND_STATE_ENTRY_ColorClampRange_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorClampRange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_ColorClampRange_start 34
+#define GEN9_BLEND_STATE_ENTRY_ColorClampRange_start 34
+#define GEN8_BLEND_STATE_ENTRY_ColorClampRange_start 34
+#define GEN75_BLEND_STATE_ENTRY_ColorClampRange_start 34
+#define GEN7_BLEND_STATE_ENTRY_ColorClampRange_start 34
+#define GEN6_BLEND_STATE_ENTRY_ColorClampRange_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorClampRange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Color Dither Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_ColorDitherEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_ColorDitherEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_ColorDitherEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_ColorDitherEnable_start 44
+#define GEN7_BLEND_STATE_ENTRY_ColorDitherEnable_start 44
+#define GEN6_BLEND_STATE_ENTRY_ColorDitherEnable_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_ColorDitherEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 44;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Destination Alpha Blend Factor */
+
+
+#define GEN10_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+#define GEN9_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+#define GEN8_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+#define GEN75_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+#define GEN7_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+#define GEN6_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 8
+#define GEN9_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 8
+#define GEN8_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 8
+#define GEN75_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 15
+#define GEN7_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 15
+#define GEN6_BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Destination Blend Factor */
+
+
+#define GEN10_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+#define GEN9_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+#define GEN8_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+#define GEN75_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+#define GEN7_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+#define GEN6_BLEND_STATE_ENTRY_DestinationBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_DestinationBlendFactor_start 21
+#define GEN9_BLEND_STATE_ENTRY_DestinationBlendFactor_start 21
+#define GEN8_BLEND_STATE_ENTRY_DestinationBlendFactor_start 21
+#define GEN75_BLEND_STATE_ENTRY_DestinationBlendFactor_start 0
+#define GEN7_BLEND_STATE_ENTRY_DestinationBlendFactor_start 0
+#define GEN6_BLEND_STATE_ENTRY_DestinationBlendFactor_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Independent Alpha Blend Enable */
+
+
+#define GEN75_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_start 30
+#define GEN7_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_start 30
+#define GEN6_BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 30;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Logic Op Enable */
+
+
+#define GEN10_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+#define GEN9_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+#define GEN8_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+#define GEN75_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_LogicOpEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_LogicOpEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_LogicOpEnable_start 63
+#define GEN9_BLEND_STATE_ENTRY_LogicOpEnable_start 63
+#define GEN8_BLEND_STATE_ENTRY_LogicOpEnable_start 63
+#define GEN75_BLEND_STATE_ENTRY_LogicOpEnable_start 54
+#define GEN7_BLEND_STATE_ENTRY_LogicOpEnable_start 54
+#define GEN6_BLEND_STATE_ENTRY_LogicOpEnable_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_LogicOpEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 63;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 54;
+ } else {
+ return 54;
+ }
+ case 6: return 54;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Logic Op Function */
+
+
+#define GEN10_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+#define GEN9_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+#define GEN8_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+#define GEN75_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+#define GEN7_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+#define GEN6_BLEND_STATE_ENTRY_LogicOpFunction_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_LogicOpFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_LogicOpFunction_start 59
+#define GEN9_BLEND_STATE_ENTRY_LogicOpFunction_start 59
+#define GEN8_BLEND_STATE_ENTRY_LogicOpFunction_start 59
+#define GEN75_BLEND_STATE_ENTRY_LogicOpFunction_start 50
+#define GEN7_BLEND_STATE_ENTRY_LogicOpFunction_start 50
+#define GEN6_BLEND_STATE_ENTRY_LogicOpFunction_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_LogicOpFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 59;
+ case 9: return 59;
+ case 8: return 59;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 50;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Post-Blend Color Clamp Enable */
+
+
+#define GEN10_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+#define GEN9_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+#define GEN8_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+#define GEN75_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PostBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+#define GEN9_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+#define GEN8_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+#define GEN75_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+#define GEN7_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+#define GEN6_BLEND_STATE_ENTRY_PostBlendColorClampEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PostBlendColorClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Pre-Blend Color Clamp Enable */
+
+
+#define GEN10_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+#define GEN9_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+#define GEN8_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+#define GEN75_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+#define GEN7_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+#define GEN6_BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PreBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+#define GEN9_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+#define GEN8_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+#define GEN75_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+#define GEN7_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+#define GEN6_BLEND_STATE_ENTRY_PreBlendColorClampEnable_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PreBlendColorClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 33;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Pre-Blend Source Only Clamp Enable */
+
+
+#define GEN10_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_bits 1
+#define GEN9_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_bits 1
+#define GEN8_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_start 36
+#define GEN9_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_start 36
+#define GEN8_BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_PreBlendSourceOnlyClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Source Alpha Blend Factor */
+
+
+#define GEN10_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+#define GEN9_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+#define GEN8_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+#define GEN75_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+#define GEN7_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+#define GEN6_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 13
+#define GEN9_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 13
+#define GEN8_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 13
+#define GEN75_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 20
+#define GEN7_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 20
+#define GEN6_BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Source Blend Factor */
+
+
+#define GEN10_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+#define GEN9_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+#define GEN8_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+#define GEN75_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+#define GEN7_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+#define GEN6_BLEND_STATE_ENTRY_SourceBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_SourceBlendFactor_start 26
+#define GEN9_BLEND_STATE_ENTRY_SourceBlendFactor_start 26
+#define GEN8_BLEND_STATE_ENTRY_SourceBlendFactor_start 26
+#define GEN75_BLEND_STATE_ENTRY_SourceBlendFactor_start 5
+#define GEN7_BLEND_STATE_ENTRY_SourceBlendFactor_start 5
+#define GEN6_BLEND_STATE_ENTRY_SourceBlendFactor_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_SourceBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Write Disable Alpha */
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableAlpha_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableAlpha_start 3
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableAlpha_start 3
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableAlpha_start 3
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableAlpha_start 59
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableAlpha_start 59
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableAlpha_start 59
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 59;
+ } else {
+ return 59;
+ }
+ case 6: return 59;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Write Disable Blue */
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableBlue_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableBlue_start 0
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableBlue_start 0
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableBlue_start 0
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableBlue_start 56
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableBlue_start 56
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableBlue_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 56;
+ } else {
+ return 56;
+ }
+ case 6: return 56;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Write Disable Green */
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableGreen_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableGreen_start 1
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableGreen_start 1
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableGreen_start 1
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableGreen_start 57
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableGreen_start 57
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableGreen_start 57
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 57;
+ } else {
+ return 57;
+ }
+ case 6: return 57;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Write Disable Red */
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableRed_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_BLEND_STATE_ENTRY_WriteDisableRed_start 2
+#define GEN9_BLEND_STATE_ENTRY_WriteDisableRed_start 2
+#define GEN8_BLEND_STATE_ENTRY_WriteDisableRed_start 2
+#define GEN75_BLEND_STATE_ENTRY_WriteDisableRed_start 58
+#define GEN7_BLEND_STATE_ENTRY_WriteDisableRed_start 58
+#define GEN6_BLEND_STATE_ENTRY_WriteDisableRed_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_WriteDisableRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 58;
+ } else {
+ return 58;
+ }
+ case 6: return 58;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::X Dither Offset */
+
+
+#define GEN75_BLEND_STATE_ENTRY_XDitherOffset_bits 2
+#define GEN7_BLEND_STATE_ENTRY_XDitherOffset_bits 2
+#define GEN6_BLEND_STATE_ENTRY_XDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_XDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_XDitherOffset_start 42
+#define GEN7_BLEND_STATE_ENTRY_XDitherOffset_start 42
+#define GEN6_BLEND_STATE_ENTRY_XDitherOffset_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_XDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 42;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* BLEND_STATE_ENTRY::Y Dither Offset */
+
+
+#define GEN75_BLEND_STATE_ENTRY_YDitherOffset_bits 2
+#define GEN7_BLEND_STATE_ENTRY_YDitherOffset_bits 2
+#define GEN6_BLEND_STATE_ENTRY_YDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_YDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_BLEND_STATE_ENTRY_YDitherOffset_start 40
+#define GEN7_BLEND_STATE_ENTRY_YDitherOffset_start 40
+#define GEN6_BLEND_STATE_ENTRY_YDitherOffset_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+BLEND_STATE_ENTRY_YDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0 */
+
+
+#define GEN10_CACHE_MODE_0_length 1
+#define GEN9_CACHE_MODE_0_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Disable clock gating in the pixel backend */
+
+
+#define GEN10_CACHE_MODE_0_Disableclockgatinginthepixelbackend_bits 1
+#define GEN9_CACHE_MODE_0_Disableclockgatinginthepixelbackend_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_Disableclockgatinginthepixelbackend_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_Disableclockgatinginthepixelbackend_start 1
+#define GEN9_CACHE_MODE_0_Disableclockgatinginthepixelbackend_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_Disableclockgatinginthepixelbackend_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Disable clock gating in the pixel backend Mask */
+
+
+#define GEN10_CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_bits 1
+#define GEN9_CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_start 17
+#define GEN9_CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_DisableclockgatinginthepixelbackendMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Hierarchical Z RAW Stall Optimization Disable */
+
+
+#define GEN10_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_bits 1
+#define GEN9_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_start 2
+#define GEN9_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Hierarchical Z RAW Stall Optimization Disable Mask */
+
+
+#define GEN10_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_bits 1
+#define GEN9_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_start 18
+#define GEN9_CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_HierarchicalZRAWStallOptimizationDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::MSAA Compression Plane Number Threshold for eLLC */
+
+
+#define GEN10_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_bits 3
+#define GEN9_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_start 12
+#define GEN9_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::MSAA Compression Plane Number Threshold for eLLC Mask */
+
+
+#define GEN10_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_bits 3
+#define GEN9_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_start 28
+#define GEN9_CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_MSAACompressionPlaneNumberThresholdforeLLCMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 28;
+ case 9: return 28;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Null tile fix disable */
+
+
+#define GEN10_CACHE_MODE_0_Nulltilefixdisable_bits 1
+#define GEN9_CACHE_MODE_0_Nulltilefixdisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_Nulltilefixdisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_Nulltilefixdisable_start 0
+#define GEN9_CACHE_MODE_0_Nulltilefixdisable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_Nulltilefixdisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Null tile fix disable Mask */
+
+
+#define GEN10_CACHE_MODE_0_NulltilefixdisableMask_bits 1
+#define GEN9_CACHE_MODE_0_NulltilefixdisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_NulltilefixdisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_NulltilefixdisableMask_start 16
+#define GEN9_CACHE_MODE_0_NulltilefixdisableMask_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_NulltilefixdisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::RCC Eviction Policy */
+
+
+#define GEN10_CACHE_MODE_0_RCCEvictionPolicy_bits 1
+#define GEN9_CACHE_MODE_0_RCCEvictionPolicy_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_RCCEvictionPolicy_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_RCCEvictionPolicy_start 4
+#define GEN9_CACHE_MODE_0_RCCEvictionPolicy_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_RCCEvictionPolicy_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::RCC Eviction Policy Mask */
+
+
+#define GEN10_CACHE_MODE_0_RCCEvictionPolicyMask_bits 1
+#define GEN9_CACHE_MODE_0_RCCEvictionPolicyMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_RCCEvictionPolicyMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_RCCEvictionPolicyMask_start 20
+#define GEN9_CACHE_MODE_0_RCCEvictionPolicyMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_RCCEvictionPolicyMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::STC PMA Optimization Enable */
+
+
+#define GEN10_CACHE_MODE_0_STCPMAOptimizationEnable_bits 1
+#define GEN9_CACHE_MODE_0_STCPMAOptimizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_STCPMAOptimizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_STCPMAOptimizationEnable_start 5
+#define GEN9_CACHE_MODE_0_STCPMAOptimizationEnable_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_STCPMAOptimizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::STC PMA Optimization Enable Mask */
+
+
+#define GEN10_CACHE_MODE_0_STCPMAOptimizationEnableMask_bits 1
+#define GEN9_CACHE_MODE_0_STCPMAOptimizationEnableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_STCPMAOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_STCPMAOptimizationEnableMask_start 21
+#define GEN9_CACHE_MODE_0_STCPMAOptimizationEnableMask_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_STCPMAOptimizationEnableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 Disable */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2Disable_bits 1
+#define GEN9_CACHE_MODE_0_SamplerL2Disable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2Disable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2Disable_start 15
+#define GEN9_CACHE_MODE_0_SamplerL2Disable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2Disable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 Disable Mask */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2DisableMask_bits 1
+#define GEN9_CACHE_MODE_0_SamplerL2DisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2DisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2DisableMask_start 31
+#define GEN9_CACHE_MODE_0_SamplerL2DisableMask_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2DisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 Request Arbitration */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2RequestArbitration_bits 2
+#define GEN9_CACHE_MODE_0_SamplerL2RequestArbitration_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2RequestArbitration_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2RequestArbitration_start 6
+#define GEN9_CACHE_MODE_0_SamplerL2RequestArbitration_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2RequestArbitration_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 Request Arbitration Mask */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2RequestArbitrationMask_bits 2
+#define GEN9_CACHE_MODE_0_SamplerL2RequestArbitrationMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2RequestArbitrationMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2RequestArbitrationMask_start 22
+#define GEN9_CACHE_MODE_0_SamplerL2RequestArbitrationMask_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2RequestArbitrationMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 TLB Prefetch Enable */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2TLBPrefetchEnable_bits 1
+#define GEN9_CACHE_MODE_0_SamplerL2TLBPrefetchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2TLBPrefetchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2TLBPrefetchEnable_start 9
+#define GEN9_CACHE_MODE_0_SamplerL2TLBPrefetchEnable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2TLBPrefetchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler L2 TLB Prefetch Enable Mask */
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_bits 1
+#define GEN9_CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_start 25
+#define GEN9_CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerL2TLBPrefetchEnableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 25;
+ case 9: return 25;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler Set Remapping for 3D Disable */
+
+
+#define GEN10_CACHE_MODE_0_SamplerSetRemappingfor3DDisable_bits 1
+#define GEN9_CACHE_MODE_0_SamplerSetRemappingfor3DDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerSetRemappingfor3DDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerSetRemappingfor3DDisable_start 11
+#define GEN9_CACHE_MODE_0_SamplerSetRemappingfor3DDisable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerSetRemappingfor3DDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_0::Sampler Set Remapping for 3D Disable Mask */
+
+
+#define GEN10_CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_bits 1
+#define GEN9_CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_start 27
+#define GEN9_CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_0_SamplerSetRemappingfor3DDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1 */
+
+
+#define GEN10_CACHE_MODE_1_length 1
+#define GEN9_CACHE_MODE_1_length 1
+#define GEN8_CACHE_MODE_1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::4X4 RCPFE-STC Optimization Disable */
+
+
+#define GEN9_CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_bits 1
+#define GEN8_CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_start 6
+#define GEN8_CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_4X4RCPFESTCOptimizationDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::4X4 RCPFE-STC Optimization Disable Mask */
+
+
+#define GEN9_CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_bits 1
+#define GEN8_CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_start 22
+#define GEN8_CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_4X4RCPFESTCOptimizationDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Blend Optimization Fix Disable */
+
+
+#define GEN10_CACHE_MODE_1_BlendOptimizationFixDisable_bits 1
+#define GEN9_CACHE_MODE_1_BlendOptimizationFixDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_BlendOptimizationFixDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_BlendOptimizationFixDisable_start 14
+#define GEN9_CACHE_MODE_1_BlendOptimizationFixDisable_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_BlendOptimizationFixDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Blend Optimization Fix Disable Mask */
+
+
+#define GEN10_CACHE_MODE_1_BlendOptimizationFixDisableMask_bits 1
+#define GEN9_CACHE_MODE_1_BlendOptimizationFixDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_BlendOptimizationFixDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_BlendOptimizationFixDisableMask_start 30
+#define GEN9_CACHE_MODE_1_BlendOptimizationFixDisableMask_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_BlendOptimizationFixDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Color Compression Disable */
+
+
+#define GEN10_CACHE_MODE_1_ColorCompressionDisable_bits 1
+#define GEN9_CACHE_MODE_1_ColorCompressionDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_ColorCompressionDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_ColorCompressionDisable_start 15
+#define GEN9_CACHE_MODE_1_ColorCompressionDisable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_ColorCompressionDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Color Compression Disable Mask */
+
+
+#define GEN10_CACHE_MODE_1_ColorCompressionDisableMask_bits 1
+#define GEN9_CACHE_MODE_1_ColorCompressionDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_ColorCompressionDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_ColorCompressionDisableMask_start 31
+#define GEN9_CACHE_MODE_1_ColorCompressionDisableMask_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_ColorCompressionDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Depth Read Hit Write-Only Optimization Disable */
+
+
+#define GEN9_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_bits 1
+#define GEN8_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_start 3
+#define GEN8_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Depth Read Hit Write-Only Optimization Disable Mask */
+
+
+#define GEN9_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_bits 1
+#define GEN8_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_start 19
+#define GEN8_CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_DepthReadHitWriteOnlyOptimizationDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Float Blend Optimization Enable */
+
+
+#define GEN9_CACHE_MODE_1_FloatBlendOptimizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_FloatBlendOptimizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_FloatBlendOptimizationEnable_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_FloatBlendOptimizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Float Blend Optimization Enable Mask */
+
+
+#define GEN9_CACHE_MODE_1_FloatBlendOptimizationEnableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_FloatBlendOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_FloatBlendOptimizationEnableMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_FloatBlendOptimizationEnableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::HIZ Eviction Policy */
+
+
+#define GEN9_CACHE_MODE_1_HIZEvictionPolicy_bits 1
+#define GEN8_CACHE_MODE_1_HIZEvictionPolicy_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_HIZEvictionPolicy_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_HIZEvictionPolicy_start 12
+#define GEN8_CACHE_MODE_1_HIZEvictionPolicy_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_HIZEvictionPolicy_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::HIZ Eviction Policy Mask */
+
+
+#define GEN9_CACHE_MODE_1_HIZEvictionPolicyMask_bits 1
+#define GEN8_CACHE_MODE_1_HIZEvictionPolicyMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_HIZEvictionPolicyMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_HIZEvictionPolicyMask_start 28
+#define GEN8_CACHE_MODE_1_HIZEvictionPolicyMask_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_HIZEvictionPolicyMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 28;
+ case 8: return 28;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MCS Cache Disable */
+
+
+#define GEN10_CACHE_MODE_1_MCSCacheDisable_bits 1
+#define GEN9_CACHE_MODE_1_MCSCacheDisable_bits 1
+#define GEN8_CACHE_MODE_1_MCSCacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MCSCacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_MCSCacheDisable_start 5
+#define GEN9_CACHE_MODE_1_MCSCacheDisable_start 5
+#define GEN8_CACHE_MODE_1_MCSCacheDisable_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MCSCacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MCS Cache Disable Mask */
+
+
+#define GEN10_CACHE_MODE_1_MCSCacheDisableMask_bits 1
+#define GEN9_CACHE_MODE_1_MCSCacheDisableMask_bits 1
+#define GEN8_CACHE_MODE_1_MCSCacheDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MCSCacheDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_MCSCacheDisableMask_start 21
+#define GEN9_CACHE_MODE_1_MCSCacheDisableMask_start 21
+#define GEN8_CACHE_MODE_1_MCSCacheDisableMask_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MCSCacheDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MSC RAW Hazard Avoidance Bit */
+
+
+#define GEN10_CACHE_MODE_1_MSCRAWHazardAvoidanceBit_bits 1
+#define GEN9_CACHE_MODE_1_MSCRAWHazardAvoidanceBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCRAWHazardAvoidanceBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_MSCRAWHazardAvoidanceBit_start 9
+#define GEN9_CACHE_MODE_1_MSCRAWHazardAvoidanceBit_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCRAWHazardAvoidanceBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MSC RAW Hazard Avoidance Bit Mask */
+
+
+#define GEN10_CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_bits 1
+#define GEN9_CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_start 25
+#define GEN9_CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCRAWHazardAvoidanceBitMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 25;
+ case 9: return 25;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MSC Resolve Optimization Disable */
+
+
+#define GEN8_CACHE_MODE_1_MSCResolveOptimizationDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCResolveOptimizationDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_CACHE_MODE_1_MSCResolveOptimizationDisable_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCResolveOptimizationDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::MSC Resolve Optimization Disable Mask */
+
+
+#define GEN8_CACHE_MODE_1_MSCResolveOptimizationDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCResolveOptimizationDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_CACHE_MODE_1_MSCResolveOptimizationDisableMask_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_MSCResolveOptimizationDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::NP Early Z Fails Disable */
+
+
+#define GEN10_CACHE_MODE_1_NPEarlyZFailsDisable_bits 1
+#define GEN9_CACHE_MODE_1_NPEarlyZFailsDisable_bits 1
+#define GEN8_CACHE_MODE_1_NPEarlyZFailsDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPEarlyZFailsDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_NPEarlyZFailsDisable_start 13
+#define GEN9_CACHE_MODE_1_NPEarlyZFailsDisable_start 13
+#define GEN8_CACHE_MODE_1_NPEarlyZFailsDisable_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPEarlyZFailsDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::NP Early Z Fails Disable Mask */
+
+
+#define GEN10_CACHE_MODE_1_NPEarlyZFailsDisableMask_bits 1
+#define GEN9_CACHE_MODE_1_NPEarlyZFailsDisableMask_bits 1
+#define GEN8_CACHE_MODE_1_NPEarlyZFailsDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPEarlyZFailsDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_NPEarlyZFailsDisableMask_start 29
+#define GEN9_CACHE_MODE_1_NPEarlyZFailsDisableMask_start 29
+#define GEN8_CACHE_MODE_1_NPEarlyZFailsDisableMask_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPEarlyZFailsDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::NP PMA Fix Enable */
+
+
+#define GEN9_CACHE_MODE_1_NPPMAFixEnable_bits 1
+#define GEN8_CACHE_MODE_1_NPPMAFixEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPPMAFixEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_NPPMAFixEnable_start 11
+#define GEN8_CACHE_MODE_1_NPPMAFixEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPPMAFixEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::NP PMA Fix Enable Mask */
+
+
+#define GEN9_CACHE_MODE_1_NPPMAFixEnableMask_bits 1
+#define GEN8_CACHE_MODE_1_NPPMAFixEnableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPPMAFixEnableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_NPPMAFixEnableMask_start 27
+#define GEN8_CACHE_MODE_1_NPPMAFixEnableMask_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_NPPMAFixEnableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Partial Resolve Disable In VC */
+
+
+#define GEN10_CACHE_MODE_1_PartialResolveDisableInVC_bits 1
+#define GEN9_CACHE_MODE_1_PartialResolveDisableInVC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_PartialResolveDisableInVC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_PartialResolveDisableInVC_start 1
+#define GEN9_CACHE_MODE_1_PartialResolveDisableInVC_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_PartialResolveDisableInVC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Partial Resolve Disable In VC Mask */
+
+
+#define GEN10_CACHE_MODE_1_PartialResolveDisableInVCMask_bits 1
+#define GEN9_CACHE_MODE_1_PartialResolveDisableInVCMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_PartialResolveDisableInVCMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_PartialResolveDisableInVCMask_start 17
+#define GEN9_CACHE_MODE_1_PartialResolveDisableInVCMask_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_PartialResolveDisableInVCMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::RCZ PMA Promoted 2 Not-Promoted Allocation stall optimization Disable */
+
+
+#define GEN10_CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::RCZ PMA Promoted 2 Not-Promoted Allocation stall optimization Disable Mask */
+
+
+#define GEN10_CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZPMAPromoted2NotPromotedAllocationstalloptimizationDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::RCZ Read after expansion control fix 2 */
+
+
+#define GEN9_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_bits 1
+#define GEN8_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_start 2
+#define GEN8_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZReadafterexpansioncontrolfix2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::RCZ Read after expansion control fix 2 Mask */
+
+
+#define GEN9_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_bits 1
+#define GEN8_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_start 18
+#define GEN8_CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_RCZReadafterexpansioncontrolfix2Mask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Sampler Cache Set XOR selection */
+
+
+#define GEN9_CACHE_MODE_1_SamplerCacheSetXORselection_bits 2
+#define GEN8_CACHE_MODE_1_SamplerCacheSetXORselection_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_SamplerCacheSetXORselection_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_SamplerCacheSetXORselection_start 7
+#define GEN8_CACHE_MODE_1_SamplerCacheSetXORselection_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_SamplerCacheSetXORselection_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_1::Sampler Cache Set XOR selection Mask */
+
+
+#define GEN9_CACHE_MODE_1_SamplerCacheSetXORselectionMask_bits 2
+#define GEN8_CACHE_MODE_1_SamplerCacheSetXORselectionMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_SamplerCacheSetXORselectionMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_CACHE_MODE_1_SamplerCacheSetXORselectionMask_start 23
+#define GEN8_CACHE_MODE_1_SamplerCacheSetXORselectionMask_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_1_SamplerCacheSetXORselectionMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS */
+
+
+#define GEN10_CACHE_MODE_SS_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Float Blend Optimization Enable */
+
+
+#define GEN10_CACHE_MODE_SS_FloatBlendOptimizationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_FloatBlendOptimizationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_FloatBlendOptimizationEnable_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_FloatBlendOptimizationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Float Blend Optimization Enable Mask */
+
+
+#define GEN10_CACHE_MODE_SS_FloatBlendOptimizationEnableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_FloatBlendOptimizationEnableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_FloatBlendOptimizationEnableMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_FloatBlendOptimizationEnableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Instruction Level 1 Cache Disable */
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheDisable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Instruction Level 1 Cache Disable Mask */
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheDisableMask_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Instruction Level 1 Cache and In-Flight Queue Disable */
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Instruction Level 1 Cache and In-Flight Queue Disable Mask */
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_InstructionLevel1CacheandInFlightQueueDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Per Sample Blend Opt Disable */
+
+
+#define GEN10_CACHE_MODE_SS_PerSampleBlendOptDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_PerSampleBlendOptDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_PerSampleBlendOptDisable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_PerSampleBlendOptDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CACHE_MODE_SS::Per Sample Blend Opt Disable Mask */
+
+
+#define GEN10_CACHE_MODE_SS_PerSampleBlendOptDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_PerSampleBlendOptDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CACHE_MODE_SS_PerSampleBlendOptDisableMask_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CACHE_MODE_SS_PerSampleBlendOptDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CC_VIEWPORT */
+
+
+#define GEN10_CC_VIEWPORT_length 2
+#define GEN9_CC_VIEWPORT_length 2
+#define GEN8_CC_VIEWPORT_length 2
+#define GEN75_CC_VIEWPORT_length 2
+#define GEN7_CC_VIEWPORT_length 2
+#define GEN6_CC_VIEWPORT_length 2
+#define GEN5_CC_VIEWPORT_length 2
+#define GEN45_CC_VIEWPORT_length 2
+#define GEN4_CC_VIEWPORT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CC_VIEWPORT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CC_VIEWPORT::Maximum Depth */
+
+
+#define GEN10_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN9_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN8_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN75_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN7_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN6_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN5_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN45_CC_VIEWPORT_MaximumDepth_bits 32
+#define GEN4_CC_VIEWPORT_MaximumDepth_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CC_VIEWPORT_MaximumDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN9_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN8_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN75_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN7_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN6_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN5_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN45_CC_VIEWPORT_MaximumDepth_start 32
+#define GEN4_CC_VIEWPORT_MaximumDepth_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CC_VIEWPORT_MaximumDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CC_VIEWPORT::Minimum Depth */
+
+
+#define GEN10_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN9_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN8_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN75_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN7_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN6_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN5_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN45_CC_VIEWPORT_MinimumDepth_bits 32
+#define GEN4_CC_VIEWPORT_MinimumDepth_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CC_VIEWPORT_MinimumDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN9_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN8_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN75_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN7_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN6_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN5_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN45_CC_VIEWPORT_MinimumDepth_start 0
+#define GEN4_CC_VIEWPORT_MinimumDepth_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CC_VIEWPORT_MinimumDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CHICKEN3 */
+
+
+#define GEN75_CHICKEN3_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CHICKEN3_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CHICKEN3::L3 Atomic Disable */
+
+
+#define GEN75_CHICKEN3_L3AtomicDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CHICKEN3_L3AtomicDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_CHICKEN3_L3AtomicDisable_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CHICKEN3_L3AtomicDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CHICKEN3::L3 Atomic Disable Mask */
+
+
+#define GEN75_CHICKEN3_L3AtomicDisableMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CHICKEN3_L3AtomicDisableMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_CHICKEN3_L3AtomicDisableMask_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+CHICKEN3_L3AtomicDisableMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE */
+
+
+#define GEN5_CLIP_STATE_length 11
+#define GEN45_CLIP_STATE_length 11
+#define GEN4_CLIP_STATE_length 11
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::API Mode */
+
+
+#define GEN5_CLIP_STATE_APIMode_bits 1
+#define GEN45_CLIP_STATE_APIMode_bits 1
+#define GEN4_CLIP_STATE_APIMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_APIMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_APIMode_start 190
+#define GEN45_CLIP_STATE_APIMode_start 190
+#define GEN4_CLIP_STATE_APIMode_start 190
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_APIMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 190;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 190;
+ } else {
+ return 190;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Binding Table Entry Count */
+
+
+#define GEN5_CLIP_STATE_BindingTableEntryCount_bits 8
+#define GEN45_CLIP_STATE_BindingTableEntryCount_bits 8
+#define GEN4_CLIP_STATE_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_BindingTableEntryCount_start 50
+#define GEN45_CLIP_STATE_BindingTableEntryCount_start 50
+#define GEN4_CLIP_STATE_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Clip Mode */
+
+
+#define GEN5_CLIP_STATE_ClipMode_bits 3
+#define GEN45_CLIP_STATE_ClipMode_bits 3
+#define GEN4_CLIP_STATE_ClipMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ClipMode_start 173
+#define GEN45_CLIP_STATE_ClipMode_start 173
+#define GEN4_CLIP_STATE_ClipMode_start 173
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 173;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 173;
+ } else {
+ return 173;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Clipper Statistics Enable */
+
+
+#define GEN45_CLIP_STATE_ClipperStatisticsEnable_bits 1
+#define GEN4_CLIP_STATE_ClipperStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipperStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_CLIP_STATE_ClipperStatisticsEnable_start 138
+#define GEN4_CLIP_STATE_ClipperStatisticsEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipperStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 138;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Clipper Viewport State Pointer */
+
+
+#define GEN5_CLIP_STATE_ClipperViewportStatePointer_bits 27
+#define GEN45_CLIP_STATE_ClipperViewportStatePointer_bits 27
+#define GEN4_CLIP_STATE_ClipperViewportStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipperViewportStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ClipperViewportStatePointer_start 197
+#define GEN45_CLIP_STATE_ClipperViewportStatePointer_start 197
+#define GEN4_CLIP_STATE_ClipperViewportStatePointer_start 197
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ClipperViewportStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 197;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 197;
+ } else {
+ return 197;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Constant URB Entry Read Length */
+
+
+#define GEN5_CLIP_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN45_CLIP_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN4_CLIP_STATE_ConstantURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ConstantURBEntryReadLength_start 121
+#define GEN45_CLIP_STATE_ConstantURBEntryReadLength_start 121
+#define GEN4_CLIP_STATE_ConstantURBEntryReadLength_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Constant URB Entry Read Offset */
+
+
+#define GEN5_CLIP_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN45_CLIP_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN4_CLIP_STATE_ConstantURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN45_CLIP_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN4_CLIP_STATE_ConstantURBEntryReadOffset_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN5_CLIP_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN45_CLIP_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN4_CLIP_STATE_DispatchGRFStartRegisterForURBData_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN45_CLIP_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN4_CLIP_STATE_DispatchGRFStartRegisterForURBData_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Floating Point Mode */
+
+
+#define GEN5_CLIP_STATE_FloatingPointMode_bits 1
+#define GEN45_CLIP_STATE_FloatingPointMode_bits 1
+#define GEN4_CLIP_STATE_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_FloatingPointMode_start 48
+#define GEN45_CLIP_STATE_FloatingPointMode_start 48
+#define GEN4_CLIP_STATE_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::GRF Register Count */
+
+
+#define GEN5_CLIP_STATE_GRFRegisterCount_bits 3
+#define GEN45_CLIP_STATE_GRFRegisterCount_bits 3
+#define GEN4_CLIP_STATE_GRFRegisterCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_GRFRegisterCount_start 1
+#define GEN45_CLIP_STATE_GRFRegisterCount_start 1
+#define GEN4_CLIP_STATE_GRFRegisterCount_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::GS Output Object Statistics Enable */
+
+
+#define GEN45_CLIP_STATE_GSOutputObjectStatisticsEnable_bits 1
+#define GEN4_CLIP_STATE_GSOutputObjectStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GSOutputObjectStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_CLIP_STATE_GSOutputObjectStatisticsEnable_start 138
+#define GEN4_CLIP_STATE_GSOutputObjectStatisticsEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GSOutputObjectStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 138;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Guardband ClipTest Enable */
+
+
+#define GEN5_CLIP_STATE_GuardbandClipTestEnable_bits 1
+#define GEN45_CLIP_STATE_GuardbandClipTestEnable_bits 1
+#define GEN4_CLIP_STATE_GuardbandClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GuardbandClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_GuardbandClipTestEnable_start 186
+#define GEN45_CLIP_STATE_GuardbandClipTestEnable_start 186
+#define GEN4_CLIP_STATE_GuardbandClipTestEnable_start 186
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_GuardbandClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 186;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 186;
+ } else {
+ return 186;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Illegal Opcode Exception Enable */
+
+
+#define GEN5_CLIP_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN45_CLIP_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN4_CLIP_STATE_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN45_CLIP_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN4_CLIP_STATE_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 45;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 45;
+ } else {
+ return 45;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Kernel Start Pointer */
+
+
+#define GEN5_CLIP_STATE_KernelStartPointer_bits 26
+#define GEN45_CLIP_STATE_KernelStartPointer_bits 26
+#define GEN4_CLIP_STATE_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_KernelStartPointer_start 6
+#define GEN45_CLIP_STATE_KernelStartPointer_start 6
+#define GEN4_CLIP_STATE_KernelStartPointer_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Mask Stack Exception Enable */
+
+
+#define GEN5_CLIP_STATE_MaskStackExceptionEnable_bits 1
+#define GEN45_CLIP_STATE_MaskStackExceptionEnable_bits 1
+#define GEN4_CLIP_STATE_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_MaskStackExceptionEnable_start 43
+#define GEN45_CLIP_STATE_MaskStackExceptionEnable_start 43
+#define GEN4_CLIP_STATE_MaskStackExceptionEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 43;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 43;
+ } else {
+ return 43;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Maximum Number of Threads */
+
+
+#define GEN5_CLIP_STATE_MaximumNumberofThreads_bits 6
+#define GEN45_CLIP_STATE_MaximumNumberofThreads_bits 6
+#define GEN4_CLIP_STATE_MaximumNumberofThreads_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_MaximumNumberofThreads_start 153
+#define GEN45_CLIP_STATE_MaximumNumberofThreads_start 153
+#define GEN4_CLIP_STATE_MaximumNumberofThreads_start 153
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 153;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 153;
+ } else {
+ return 153;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Negative W ClipTest Enable */
+
+
+#define GEN5_CLIP_STATE_NegativeWClipTestEnable_bits 1
+#define GEN45_CLIP_STATE_NegativeWClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_NegativeWClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_NegativeWClipTestEnable_start 185
+#define GEN45_CLIP_STATE_NegativeWClipTestEnable_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_NegativeWClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 185;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 185;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Number of URB Entries */
+
+
+#define GEN5_CLIP_STATE_NumberofURBEntries_bits 8
+#define GEN45_CLIP_STATE_NumberofURBEntries_bits 8
+#define GEN4_CLIP_STATE_NumberofURBEntries_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_NumberofURBEntries_start 139
+#define GEN45_CLIP_STATE_NumberofURBEntries_start 139
+#define GEN4_CLIP_STATE_NumberofURBEntries_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 139;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 139;
+ } else {
+ return 139;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Per-Thread Scratch Space */
+
+
+#define GEN5_CLIP_STATE_PerThreadScratchSpace_bits 4
+#define GEN45_CLIP_STATE_PerThreadScratchSpace_bits 4
+#define GEN4_CLIP_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_PerThreadScratchSpace_start 64
+#define GEN45_CLIP_STATE_PerThreadScratchSpace_start 64
+#define GEN4_CLIP_STATE_PerThreadScratchSpace_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Scratch Space Base Pointer */
+
+
+#define GEN5_CLIP_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN45_CLIP_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN4_CLIP_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ScratchSpaceBasePointer_start 74
+#define GEN45_CLIP_STATE_ScratchSpaceBasePointer_start 74
+#define GEN4_CLIP_STATE_ScratchSpaceBasePointer_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Screen Space Viewport X Max */
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportXMax_bits 32
+#define GEN45_CLIP_STATE_ScreenSpaceViewportXMax_bits 32
+#define GEN4_CLIP_STATE_ScreenSpaceViewportXMax_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportXMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportXMax_start 256
+#define GEN45_CLIP_STATE_ScreenSpaceViewportXMax_start 256
+#define GEN4_CLIP_STATE_ScreenSpaceViewportXMax_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportXMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 256;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 256;
+ } else {
+ return 256;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Screen Space Viewport X Min */
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportXMin_bits 32
+#define GEN45_CLIP_STATE_ScreenSpaceViewportXMin_bits 32
+#define GEN4_CLIP_STATE_ScreenSpaceViewportXMin_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportXMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportXMin_start 224
+#define GEN45_CLIP_STATE_ScreenSpaceViewportXMin_start 224
+#define GEN4_CLIP_STATE_ScreenSpaceViewportXMin_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportXMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Screen Space Viewport Y Max */
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportYMax_bits 32
+#define GEN45_CLIP_STATE_ScreenSpaceViewportYMax_bits 32
+#define GEN4_CLIP_STATE_ScreenSpaceViewportYMax_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportYMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportYMax_start 320
+#define GEN45_CLIP_STATE_ScreenSpaceViewportYMax_start 320
+#define GEN4_CLIP_STATE_ScreenSpaceViewportYMax_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportYMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 320;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 320;
+ } else {
+ return 320;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Screen Space Viewport Y Min */
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportYMin_bits 32
+#define GEN45_CLIP_STATE_ScreenSpaceViewportYMin_bits 32
+#define GEN4_CLIP_STATE_ScreenSpaceViewportYMin_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportYMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ScreenSpaceViewportYMin_start 288
+#define GEN45_CLIP_STATE_ScreenSpaceViewportYMin_start 288
+#define GEN4_CLIP_STATE_ScreenSpaceViewportYMin_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ScreenSpaceViewportYMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 288;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 288;
+ } else {
+ return 288;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Single Program Flow */
+
+
+#define GEN5_CLIP_STATE_SingleProgramFlow_bits 1
+#define GEN45_CLIP_STATE_SingleProgramFlow_bits 1
+#define GEN4_CLIP_STATE_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_SingleProgramFlow_start 63
+#define GEN45_CLIP_STATE_SingleProgramFlow_start 63
+#define GEN4_CLIP_STATE_SingleProgramFlow_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Software Exception Enable */
+
+
+#define GEN5_CLIP_STATE_SoftwareExceptionEnable_bits 1
+#define GEN45_CLIP_STATE_SoftwareExceptionEnable_bits 1
+#define GEN4_CLIP_STATE_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_SoftwareExceptionEnable_start 39
+#define GEN45_CLIP_STATE_SoftwareExceptionEnable_start 39
+#define GEN4_CLIP_STATE_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 39;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 39;
+ } else {
+ return 39;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Thread Priority */
+
+
+#define GEN5_CLIP_STATE_ThreadPriority_bits 1
+#define GEN45_CLIP_STATE_ThreadPriority_bits 1
+#define GEN4_CLIP_STATE_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ThreadPriority_start 49
+#define GEN45_CLIP_STATE_ThreadPriority_start 49
+#define GEN4_CLIP_STATE_ThreadPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 49;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 49;
+ } else {
+ return 49;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::URB Entry Allocation Size */
+
+
+#define GEN5_CLIP_STATE_URBEntryAllocationSize_bits 5
+#define GEN45_CLIP_STATE_URBEntryAllocationSize_bits 5
+#define GEN4_CLIP_STATE_URBEntryAllocationSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_URBEntryAllocationSize_start 147
+#define GEN45_CLIP_STATE_URBEntryAllocationSize_start 147
+#define GEN4_CLIP_STATE_URBEntryAllocationSize_start 147
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 147;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 147;
+ } else {
+ return 147;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::UserClipDistance ClipTest Enable Bitmask */
+
+
+#define GEN5_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN45_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_bits 8
+#define GEN4_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_UserClipDistanceClipTestEnableBitmask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_start 176
+#define GEN45_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_start 176
+#define GEN4_CLIP_STATE_UserClipDistanceClipTestEnableBitmask_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_UserClipDistanceClipTestEnableBitmask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 176;
+ } else {
+ return 176;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::UserClipFlags MustClip Enable */
+
+
+#define GEN5_CLIP_STATE_UserClipFlagsMustClipEnable_bits 1
+#define GEN45_CLIP_STATE_UserClipFlagsMustClipEnable_bits 1
+#define GEN4_CLIP_STATE_UserClipFlagsMustClipEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_UserClipFlagsMustClipEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_UserClipFlagsMustClipEnable_start 184
+#define GEN45_CLIP_STATE_UserClipFlagsMustClipEnable_start 184
+#define GEN4_CLIP_STATE_UserClipFlagsMustClipEnable_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_UserClipFlagsMustClipEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 184;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 184;
+ } else {
+ return 184;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Vertex Position Space */
+
+
+#define GEN5_CLIP_STATE_VertexPositionSpace_bits 1
+#define GEN45_CLIP_STATE_VertexPositionSpace_bits 1
+#define GEN4_CLIP_STATE_VertexPositionSpace_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexPositionSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_VertexPositionSpace_start 189
+#define GEN45_CLIP_STATE_VertexPositionSpace_start 189
+#define GEN4_CLIP_STATE_VertexPositionSpace_start 189
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexPositionSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 189;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 189;
+ } else {
+ return 189;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Vertex URB Entry Read Length */
+
+
+#define GEN5_CLIP_STATE_VertexURBEntryReadLength_bits 6
+#define GEN45_CLIP_STATE_VertexURBEntryReadLength_bits 6
+#define GEN4_CLIP_STATE_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_VertexURBEntryReadLength_start 107
+#define GEN45_CLIP_STATE_VertexURBEntryReadLength_start 107
+#define GEN4_CLIP_STATE_VertexURBEntryReadLength_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Vertex URB Entry Read Offset */
+
+
+#define GEN5_CLIP_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN45_CLIP_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN4_CLIP_STATE_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_VertexURBEntryReadOffset_start 100
+#define GEN45_CLIP_STATE_VertexURBEntryReadOffset_start 100
+#define GEN4_CLIP_STATE_VertexURBEntryReadOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 100;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 100;
+ } else {
+ return 100;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Viewport XY ClipTest Enable */
+
+
+#define GEN5_CLIP_STATE_ViewportXYClipTestEnable_bits 1
+#define GEN45_CLIP_STATE_ViewportXYClipTestEnable_bits 1
+#define GEN4_CLIP_STATE_ViewportXYClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ViewportXYClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ViewportXYClipTestEnable_start 188
+#define GEN45_CLIP_STATE_ViewportXYClipTestEnable_start 188
+#define GEN4_CLIP_STATE_ViewportXYClipTestEnable_start 188
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ViewportXYClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 188;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 188;
+ } else {
+ return 188;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_STATE::Viewport Z ClipTest Enable */
+
+
+#define GEN5_CLIP_STATE_ViewportZClipTestEnable_bits 1
+#define GEN45_CLIP_STATE_ViewportZClipTestEnable_bits 1
+#define GEN4_CLIP_STATE_ViewportZClipTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ViewportZClipTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CLIP_STATE_ViewportZClipTestEnable_start 187
+#define GEN45_CLIP_STATE_ViewportZClipTestEnable_start 187
+#define GEN4_CLIP_STATE_ViewportZClipTestEnable_start 187
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_STATE_ViewportZClipTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 187;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 187;
+ } else {
+ return 187;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_VIEWPORT */
+
+
+#define GEN6_CLIP_VIEWPORT_length 4
+#define GEN5_CLIP_VIEWPORT_length 4
+#define GEN45_CLIP_VIEWPORT_length 4
+#define GEN4_CLIP_VIEWPORT_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_VIEWPORT::XMax Clip Guardband */
+
+
+#define GEN6_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN5_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN45_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN4_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_XMaxClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_CLIP_VIEWPORT_XMaxClipGuardband_start 32
+#define GEN5_CLIP_VIEWPORT_XMaxClipGuardband_start 32
+#define GEN45_CLIP_VIEWPORT_XMaxClipGuardband_start 32
+#define GEN4_CLIP_VIEWPORT_XMaxClipGuardband_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_XMaxClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_VIEWPORT::XMin Clip Guardband */
+
+
+#define GEN6_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN5_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN45_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN4_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_XMinClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_CLIP_VIEWPORT_XMinClipGuardband_start 0
+#define GEN5_CLIP_VIEWPORT_XMinClipGuardband_start 0
+#define GEN45_CLIP_VIEWPORT_XMinClipGuardband_start 0
+#define GEN4_CLIP_VIEWPORT_XMinClipGuardband_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_XMinClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_VIEWPORT::YMax Clip Guardband */
+
+
+#define GEN6_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN5_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN45_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN4_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_YMaxClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_CLIP_VIEWPORT_YMaxClipGuardband_start 96
+#define GEN5_CLIP_VIEWPORT_YMaxClipGuardband_start 96
+#define GEN45_CLIP_VIEWPORT_YMaxClipGuardband_start 96
+#define GEN4_CLIP_VIEWPORT_YMaxClipGuardband_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_YMaxClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CLIP_VIEWPORT::YMin Clip Guardband */
+
+
+#define GEN6_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN5_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN45_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN4_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_YMinClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_CLIP_VIEWPORT_YMinClipGuardband_start 64
+#define GEN5_CLIP_VIEWPORT_YMinClipGuardband_start 64
+#define GEN45_CLIP_VIEWPORT_YMinClipGuardband_start 64
+#define GEN4_CLIP_VIEWPORT_YMinClipGuardband_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+CLIP_VIEWPORT_YMinClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CL_INVOCATION_COUNT */
+
+
+#define GEN10_CL_INVOCATION_COUNT_length 2
+#define GEN9_CL_INVOCATION_COUNT_length 2
+#define GEN8_CL_INVOCATION_COUNT_length 2
+#define GEN75_CL_INVOCATION_COUNT_length 2
+#define GEN7_CL_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CL_INVOCATION_COUNT::CL Invocation Count Report */
+
+
+#define GEN10_CL_INVOCATION_COUNT_CLInvocationCountReport_bits 64
+#define GEN9_CL_INVOCATION_COUNT_CLInvocationCountReport_bits 64
+#define GEN8_CL_INVOCATION_COUNT_CLInvocationCountReport_bits 64
+#define GEN75_CL_INVOCATION_COUNT_CLInvocationCountReport_bits 64
+#define GEN7_CL_INVOCATION_COUNT_CLInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_INVOCATION_COUNT_CLInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CL_INVOCATION_COUNT_CLInvocationCountReport_start 0
+#define GEN9_CL_INVOCATION_COUNT_CLInvocationCountReport_start 0
+#define GEN8_CL_INVOCATION_COUNT_CLInvocationCountReport_start 0
+#define GEN75_CL_INVOCATION_COUNT_CLInvocationCountReport_start 0
+#define GEN7_CL_INVOCATION_COUNT_CLInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_INVOCATION_COUNT_CLInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CL_PRIMITIVES_COUNT */
+
+
+#define GEN10_CL_PRIMITIVES_COUNT_length 2
+#define GEN9_CL_PRIMITIVES_COUNT_length 2
+#define GEN8_CL_PRIMITIVES_COUNT_length 2
+#define GEN75_CL_PRIMITIVES_COUNT_length 2
+#define GEN7_CL_PRIMITIVES_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CL_PRIMITIVES_COUNT::CL Primitives Count Report */
+
+
+#define GEN10_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits 64
+#define GEN9_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits 64
+#define GEN8_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits 64
+#define GEN75_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits 64
+#define GEN7_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start 0
+#define GEN9_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start 0
+#define GEN8_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start 0
+#define GEN75_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start 0
+#define GEN7_CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CL_PRIMITIVES_COUNT_CLPrimitivesCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE */
+
+
+#define GEN10_COLOR_CALC_STATE_length 6
+#define GEN9_COLOR_CALC_STATE_length 6
+#define GEN8_COLOR_CALC_STATE_length 6
+#define GEN75_COLOR_CALC_STATE_length 6
+#define GEN7_COLOR_CALC_STATE_length 6
+#define GEN6_COLOR_CALC_STATE_length 6
+#define GEN5_COLOR_CALC_STATE_length 8
+#define GEN45_COLOR_CALC_STATE_length 8
+#define GEN4_COLOR_CALC_STATE_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Blend Function */
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaBlendFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_AlphaBlendFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_AlphaBlendFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaBlendFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaBlendFunction_start 172
+#define GEN45_COLOR_CALC_STATE_AlphaBlendFunction_start 172
+#define GEN4_COLOR_CALC_STATE_AlphaBlendFunction_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaBlendFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 172;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 172;
+ } else {
+ return 172;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Reference Value As FLOAT32 */
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN9_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN8_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN75_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN7_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN6_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN5_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN45_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+#define GEN4_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN9_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN8_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN75_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN7_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN6_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 32
+#define GEN5_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 224
+#define GEN45_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 224
+#define GEN4_COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaReferenceValueAsFLOAT32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Reference Value As UNORM8 */
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN9_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN8_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN75_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN7_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN6_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN5_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN45_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+#define GEN4_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN9_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN8_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN75_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN7_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN6_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 32
+#define GEN5_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 224
+#define GEN45_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 224
+#define GEN4_COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaReferenceValueAsUNORM8_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Test Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaTestEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_AlphaTestEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_AlphaTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaTestEnable_start 107
+#define GEN45_COLOR_CALC_STATE_AlphaTestEnable_start 107
+#define GEN4_COLOR_CALC_STATE_AlphaTestEnable_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Test Format */
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN9_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN8_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN75_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN7_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN6_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN5_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN45_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+#define GEN4_COLOR_CALC_STATE_AlphaTestFormat_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN9_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN8_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN75_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN7_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN6_COLOR_CALC_STATE_AlphaTestFormat_start 0
+#define GEN5_COLOR_CALC_STATE_AlphaTestFormat_start 111
+#define GEN45_COLOR_CALC_STATE_AlphaTestFormat_start 111
+#define GEN4_COLOR_CALC_STATE_AlphaTestFormat_start 111
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 111;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 111;
+ } else {
+ return 111;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Alpha Test Function */
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaTestFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_AlphaTestFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_AlphaTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_AlphaTestFunction_start 104
+#define GEN45_COLOR_CALC_STATE_AlphaTestFunction_start 104
+#define GEN4_COLOR_CALC_STATE_AlphaTestFunction_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_AlphaTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 104;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 104;
+ } else {
+ return 104;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Fail Op */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilFailOp_bits 3
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilFailOp_bits 3
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilFailOp_start 9
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilFailOp_start 9
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilFailOp_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Pass Depth Fail Op */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_start 6
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_start 6
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Pass Depth Pass Op */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_start 3
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_start 3
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Reference Value */
+
+
+#define GEN8_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN75_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN7_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN6_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilReferenceValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 16
+#define GEN75_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 16
+#define GEN7_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 16
+#define GEN6_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 16
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 32
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 32
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilReferenceValue_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilReferenceValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Test Function */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilTestFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilTestFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilTestFunction_start 12
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilTestFunction_start 12
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilTestFunction_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 12;
+ } else {
+ return 12;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Test Mask */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilTestMask_bits 8
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilTestMask_bits 8
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilTestMask_start 88
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilTestMask_start 88
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilTestMask_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 88;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 88;
+ } else {
+ return 88;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Backface Stencil Write Mask */
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilWriteMask_bits 8
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilWriteMask_bits 8
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_BackfaceStencilWriteMask_start 80
+#define GEN45_COLOR_CALC_STATE_BackfaceStencilWriteMask_start 80
+#define GEN4_COLOR_CALC_STATE_BackfaceStencilWriteMask_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Blend Constant Color Alpha */
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorAlpha_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorAlpha_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Blend Constant Color Blue */
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorBlue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorBlue_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Blend Constant Color Green */
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorGreen_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorGreen_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Blend Constant Color Red */
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorRed_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+#define GEN9_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+#define GEN8_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+#define GEN75_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+#define GEN7_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+#define GEN6_COLOR_CALC_STATE_BlendConstantColorRed_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_BlendConstantColorRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::CC Viewport State Pointer */
+
+
+#define GEN5_COLOR_CALC_STATE_CCViewportStatePointer_bits 27
+#define GEN45_COLOR_CALC_STATE_CCViewportStatePointer_bits 27
+#define GEN4_COLOR_CALC_STATE_CCViewportStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_CCViewportStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_CCViewportStatePointer_start 133
+#define GEN45_COLOR_CALC_STATE_CCViewportStatePointer_start 133
+#define GEN4_COLOR_CALC_STATE_CCViewportStatePointer_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_CCViewportStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 133;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 133;
+ } else {
+ return 133;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Color Blend Function */
+
+
+#define GEN5_COLOR_CALC_STATE_ColorBlendFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_ColorBlendFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_ColorBlendFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorBlendFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_ColorBlendFunction_start 221
+#define GEN45_COLOR_CALC_STATE_ColorBlendFunction_start 221
+#define GEN4_COLOR_CALC_STATE_ColorBlendFunction_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorBlendFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 221;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 221;
+ } else {
+ return 221;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Color Buffer Blend Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_ColorBufferBlendEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_ColorBufferBlendEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_ColorBufferBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorBufferBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_ColorBufferBlendEnable_start 108
+#define GEN45_COLOR_CALC_STATE_ColorBufferBlendEnable_start 108
+#define GEN4_COLOR_CALC_STATE_ColorBufferBlendEnable_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorBufferBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 108;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 108;
+ } else {
+ return 108;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Color Clamp Range */
+
+
+#define GEN5_COLOR_CALC_STATE_ColorClampRange_bits 2
+#define GEN45_COLOR_CALC_STATE_ColorClampRange_bits 2
+#define GEN4_COLOR_CALC_STATE_ColorClampRange_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorClampRange_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_ColorClampRange_start 194
+#define GEN45_COLOR_CALC_STATE_ColorClampRange_start 194
+#define GEN4_COLOR_CALC_STATE_ColorClampRange_start 194
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorClampRange_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 194;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 194;
+ } else {
+ return 194;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Color Dither Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_ColorDitherEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_ColorDitherEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_ColorDitherEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorDitherEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_ColorDitherEnable_start 191
+#define GEN45_COLOR_CALC_STATE_ColorDitherEnable_start 191
+#define GEN4_COLOR_CALC_STATE_ColorDitherEnable_start 191
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_ColorDitherEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 191;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 191;
+ } else {
+ return 191;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Depth Buffer Write Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_DepthBufferWriteEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_DepthBufferWriteEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_DepthBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DepthBufferWriteEnable_start 75
+#define GEN45_COLOR_CALC_STATE_DepthBufferWriteEnable_start 75
+#define GEN4_COLOR_CALC_STATE_DepthBufferWriteEnable_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 75;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 75;
+ } else {
+ return 75;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Depth Test Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_DepthTestEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_DepthTestEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_DepthTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DepthTestEnable_start 79
+#define GEN45_COLOR_CALC_STATE_DepthTestEnable_start 79
+#define GEN4_COLOR_CALC_STATE_DepthTestEnable_start 79
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 79;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 79;
+ } else {
+ return 79;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Depth Test Function */
+
+
+#define GEN5_COLOR_CALC_STATE_DepthTestFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_DepthTestFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_DepthTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DepthTestFunction_start 76
+#define GEN45_COLOR_CALC_STATE_DepthTestFunction_start 76
+#define GEN4_COLOR_CALC_STATE_DepthTestFunction_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DepthTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 76;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 76;
+ } else {
+ return 76;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Destination Alpha Blend Factor */
+
+
+#define GEN5_COLOR_CALC_STATE_DestinationAlphaBlendFactor_bits 5
+#define GEN45_COLOR_CALC_STATE_DestinationAlphaBlendFactor_bits 5
+#define GEN4_COLOR_CALC_STATE_DestinationAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DestinationAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DestinationAlphaBlendFactor_start 162
+#define GEN45_COLOR_CALC_STATE_DestinationAlphaBlendFactor_start 162
+#define GEN4_COLOR_CALC_STATE_DestinationAlphaBlendFactor_start 162
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DestinationAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 162;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 162;
+ } else {
+ return 162;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Destination Blend Factor */
+
+
+#define GEN5_COLOR_CALC_STATE_DestinationBlendFactor_bits 5
+#define GEN45_COLOR_CALC_STATE_DestinationBlendFactor_bits 5
+#define GEN4_COLOR_CALC_STATE_DestinationBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DestinationBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DestinationBlendFactor_start 211
+#define GEN45_COLOR_CALC_STATE_DestinationBlendFactor_start 211
+#define GEN4_COLOR_CALC_STATE_DestinationBlendFactor_start 211
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DestinationBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 211;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 211;
+ } else {
+ return 211;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Double Sided Stencil Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_DoubleSidedStencilEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_DoubleSidedStencilEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_DoubleSidedStencilEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_DoubleSidedStencilEnable_start 15
+#define GEN45_COLOR_CALC_STATE_DoubleSidedStencilEnable_start 15
+#define GEN4_COLOR_CALC_STATE_DoubleSidedStencilEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 15;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 15;
+ } else {
+ return 15;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Independent Alpha Blend Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_IndependentAlphaBlendEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_IndependentAlphaBlendEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_IndependentAlphaBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_IndependentAlphaBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_IndependentAlphaBlendEnable_start 109
+#define GEN45_COLOR_CALC_STATE_IndependentAlphaBlendEnable_start 109
+#define GEN4_COLOR_CALC_STATE_IndependentAlphaBlendEnable_start 109
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_IndependentAlphaBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 109;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 109;
+ } else {
+ return 109;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Logic Op Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_LogicOpEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_LogicOpEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_LogicOpEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_LogicOpEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_LogicOpEnable_start 64
+#define GEN45_COLOR_CALC_STATE_LogicOpEnable_start 64
+#define GEN4_COLOR_CALC_STATE_LogicOpEnable_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_LogicOpEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Logic Op Function */
+
+
+#define GEN5_COLOR_CALC_STATE_LogicOpFunction_bits 4
+#define GEN45_COLOR_CALC_STATE_LogicOpFunction_bits 4
+#define GEN4_COLOR_CALC_STATE_LogicOpFunction_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_LogicOpFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_LogicOpFunction_start 176
+#define GEN45_COLOR_CALC_STATE_LogicOpFunction_start 176
+#define GEN4_COLOR_CALC_STATE_LogicOpFunction_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_LogicOpFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 176;
+ } else {
+ return 176;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Post-Blend Color Clamp Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_PostBlendColorClampEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_PostBlendColorClampEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_PostBlendColorClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_PostBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_PostBlendColorClampEnable_start 192
+#define GEN45_COLOR_CALC_STATE_PostBlendColorClampEnable_start 192
+#define GEN4_COLOR_CALC_STATE_PostBlendColorClampEnable_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_PostBlendColorClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Pre-Blend Color Clamp Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_PreBlendColorClampEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_PreBlendColorClampEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_PreBlendColorClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_PreBlendColorClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_PreBlendColorClampEnable_start 193
+#define GEN45_COLOR_CALC_STATE_PreBlendColorClampEnable_start 193
+#define GEN4_COLOR_CALC_STATE_PreBlendColorClampEnable_start 193
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_PreBlendColorClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 193;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 193;
+ } else {
+ return 193;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Round Disable Function Disable */
+
+
+#define GEN10_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN9_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN8_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN75_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN7_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN6_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN5_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN45_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+#define GEN4_COLOR_CALC_STATE_RoundDisableFunctionDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_RoundDisableFunctionDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN9_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN8_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN75_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN7_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN6_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 15
+#define GEN5_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 190
+#define GEN45_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 190
+#define GEN4_COLOR_CALC_STATE_RoundDisableFunctionDisable_start 190
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_RoundDisableFunctionDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 190;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 190;
+ } else {
+ return 190;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Source Alpha Blend Factor */
+
+
+#define GEN5_COLOR_CALC_STATE_SourceAlphaBlendFactor_bits 5
+#define GEN45_COLOR_CALC_STATE_SourceAlphaBlendFactor_bits 5
+#define GEN4_COLOR_CALC_STATE_SourceAlphaBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_SourceAlphaBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_SourceAlphaBlendFactor_start 167
+#define GEN45_COLOR_CALC_STATE_SourceAlphaBlendFactor_start 167
+#define GEN4_COLOR_CALC_STATE_SourceAlphaBlendFactor_start 167
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_SourceAlphaBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 167;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 167;
+ } else {
+ return 167;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Source Blend Factor */
+
+
+#define GEN5_COLOR_CALC_STATE_SourceBlendFactor_bits 5
+#define GEN45_COLOR_CALC_STATE_SourceBlendFactor_bits 5
+#define GEN4_COLOR_CALC_STATE_SourceBlendFactor_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_SourceBlendFactor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_SourceBlendFactor_start 216
+#define GEN45_COLOR_CALC_STATE_SourceBlendFactor_start 216
+#define GEN4_COLOR_CALC_STATE_SourceBlendFactor_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_SourceBlendFactor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 216;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 216;
+ } else {
+ return 216;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Statistics Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_StatisticsEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_StatisticsEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StatisticsEnable_start 175
+#define GEN45_COLOR_CALC_STATE_StatisticsEnable_start 175
+#define GEN4_COLOR_CALC_STATE_StatisticsEnable_start 175
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 175;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 175;
+ } else {
+ return 175;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Buffer Write Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilBufferWriteEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_StencilBufferWriteEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_StencilBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilBufferWriteEnable_start 18
+#define GEN45_COLOR_CALC_STATE_StencilBufferWriteEnable_start 18
+#define GEN4_COLOR_CALC_STATE_StencilBufferWriteEnable_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 18;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 18;
+ } else {
+ return 18;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Fail Op */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilFailOp_bits 3
+#define GEN45_COLOR_CALC_STATE_StencilFailOp_bits 3
+#define GEN4_COLOR_CALC_STATE_StencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilFailOp_start 25
+#define GEN45_COLOR_CALC_STATE_StencilFailOp_start 25
+#define GEN4_COLOR_CALC_STATE_StencilFailOp_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 25;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 25;
+ } else {
+ return 25;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Pass Depth Fail Op */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilPassDepthFailOp_bits 3
+#define GEN45_COLOR_CALC_STATE_StencilPassDepthFailOp_bits 3
+#define GEN4_COLOR_CALC_STATE_StencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilPassDepthFailOp_start 22
+#define GEN45_COLOR_CALC_STATE_StencilPassDepthFailOp_start 22
+#define GEN4_COLOR_CALC_STATE_StencilPassDepthFailOp_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Pass Depth Pass Op */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilPassDepthPassOp_bits 3
+#define GEN45_COLOR_CALC_STATE_StencilPassDepthPassOp_bits 3
+#define GEN4_COLOR_CALC_STATE_StencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilPassDepthPassOp_start 19
+#define GEN45_COLOR_CALC_STATE_StencilPassDepthPassOp_start 19
+#define GEN4_COLOR_CALC_STATE_StencilPassDepthPassOp_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 19;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 19;
+ } else {
+ return 19;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Reference Value */
+
+
+#define GEN8_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN75_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN7_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN6_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN5_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN45_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+#define GEN4_COLOR_CALC_STATE_StencilReferenceValue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilReferenceValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_COLOR_CALC_STATE_StencilReferenceValue_start 24
+#define GEN75_COLOR_CALC_STATE_StencilReferenceValue_start 24
+#define GEN7_COLOR_CALC_STATE_StencilReferenceValue_start 24
+#define GEN6_COLOR_CALC_STATE_StencilReferenceValue_start 24
+#define GEN5_COLOR_CALC_STATE_StencilReferenceValue_start 56
+#define GEN45_COLOR_CALC_STATE_StencilReferenceValue_start 56
+#define GEN4_COLOR_CALC_STATE_StencilReferenceValue_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilReferenceValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 56;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 56;
+ } else {
+ return 56;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Test Enable */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestEnable_bits 1
+#define GEN45_COLOR_CALC_STATE_StencilTestEnable_bits 1
+#define GEN4_COLOR_CALC_STATE_StencilTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestEnable_start 31
+#define GEN45_COLOR_CALC_STATE_StencilTestEnable_start 31
+#define GEN4_COLOR_CALC_STATE_StencilTestEnable_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 31;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 31;
+ } else {
+ return 31;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Test Function */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestFunction_bits 3
+#define GEN45_COLOR_CALC_STATE_StencilTestFunction_bits 3
+#define GEN4_COLOR_CALC_STATE_StencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestFunction_start 28
+#define GEN45_COLOR_CALC_STATE_StencilTestFunction_start 28
+#define GEN4_COLOR_CALC_STATE_StencilTestFunction_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 28;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 28;
+ } else {
+ return 28;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Test Mask */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestMask_bits 8
+#define GEN45_COLOR_CALC_STATE_StencilTestMask_bits 8
+#define GEN4_COLOR_CALC_STATE_StencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilTestMask_start 48
+#define GEN45_COLOR_CALC_STATE_StencilTestMask_start 48
+#define GEN4_COLOR_CALC_STATE_StencilTestMask_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Stencil Write Mask */
+
+
+#define GEN5_COLOR_CALC_STATE_StencilWriteMask_bits 8
+#define GEN45_COLOR_CALC_STATE_StencilWriteMask_bits 8
+#define GEN4_COLOR_CALC_STATE_StencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_StencilWriteMask_start 40
+#define GEN45_COLOR_CALC_STATE_StencilWriteMask_start 40
+#define GEN4_COLOR_CALC_STATE_StencilWriteMask_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_StencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 40;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 40;
+ } else {
+ return 40;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::X Dither Offset */
+
+
+#define GEN5_COLOR_CALC_STATE_XDitherOffset_bits 2
+#define GEN45_COLOR_CALC_STATE_XDitherOffset_bits 2
+#define GEN4_COLOR_CALC_STATE_XDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_XDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_XDitherOffset_start 209
+#define GEN45_COLOR_CALC_STATE_XDitherOffset_start 209
+#define GEN4_COLOR_CALC_STATE_XDitherOffset_start 209
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_XDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 209;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 209;
+ } else {
+ return 209;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* COLOR_CALC_STATE::Y Dither Offset */
+
+
+#define GEN5_COLOR_CALC_STATE_YDitherOffset_bits 2
+#define GEN45_COLOR_CALC_STATE_YDitherOffset_bits 2
+#define GEN4_COLOR_CALC_STATE_YDitherOffset_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_YDitherOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_COLOR_CALC_STATE_YDitherOffset_start 207
+#define GEN45_COLOR_CALC_STATE_YDitherOffset_start 207
+#define GEN4_COLOR_CALC_STATE_YDitherOffset_start 207
+
+static inline uint32_t ATTRIBUTE_PURE
+COLOR_CALC_STATE_YDitherOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 207;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 207;
+ } else {
+ return 207;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER */
+
+
+#define GEN5_CONSTANT_BUFFER_length 2
+#define GEN45_CONSTANT_BUFFER_length 2
+#define GEN4_CONSTANT_BUFFER_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::3D Command Opcode */
+
+
+#define GEN5_CONSTANT_BUFFER_3DCommandOpcode_bits 3
+#define GEN45_CONSTANT_BUFFER_3DCommandOpcode_bits 3
+#define GEN4_CONSTANT_BUFFER_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_3DCommandOpcode_start 24
+#define GEN45_CONSTANT_BUFFER_3DCommandOpcode_start 24
+#define GEN4_CONSTANT_BUFFER_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::3D Command Sub Opcode */
+
+
+#define GEN5_CONSTANT_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN45_CONSTANT_BUFFER_3DCommandSubOpcode_bits 8
+#define GEN4_CONSTANT_BUFFER_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_3DCommandSubOpcode_start 16
+#define GEN45_CONSTANT_BUFFER_3DCommandSubOpcode_start 16
+#define GEN4_CONSTANT_BUFFER_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::Buffer Length */
+
+
+#define GEN5_CONSTANT_BUFFER_BufferLength_bits 6
+#define GEN45_CONSTANT_BUFFER_BufferLength_bits 6
+#define GEN4_CONSTANT_BUFFER_BufferLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_BufferLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_BufferLength_start 32
+#define GEN45_CONSTANT_BUFFER_BufferLength_start 32
+#define GEN4_CONSTANT_BUFFER_BufferLength_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_BufferLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::Buffer Starting Address */
+
+
+#define GEN5_CONSTANT_BUFFER_BufferStartingAddress_bits 26
+#define GEN45_CONSTANT_BUFFER_BufferStartingAddress_bits 26
+#define GEN4_CONSTANT_BUFFER_BufferStartingAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_BufferStartingAddress_start 38
+#define GEN45_CONSTANT_BUFFER_BufferStartingAddress_start 38
+#define GEN4_CONSTANT_BUFFER_BufferStartingAddress_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_BufferStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 38;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 38;
+ } else {
+ return 38;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::Command SubType */
+
+
+#define GEN5_CONSTANT_BUFFER_CommandSubType_bits 2
+#define GEN45_CONSTANT_BUFFER_CommandSubType_bits 2
+#define GEN4_CONSTANT_BUFFER_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_CommandSubType_start 27
+#define GEN45_CONSTANT_BUFFER_CommandSubType_start 27
+#define GEN4_CONSTANT_BUFFER_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::Command Type */
+
+
+#define GEN5_CONSTANT_BUFFER_CommandType_bits 3
+#define GEN45_CONSTANT_BUFFER_CommandType_bits 3
+#define GEN4_CONSTANT_BUFFER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_CommandType_start 29
+#define GEN45_CONSTANT_BUFFER_CommandType_start 29
+#define GEN4_CONSTANT_BUFFER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::DWord Length */
+
+
+#define GEN5_CONSTANT_BUFFER_DWordLength_bits 8
+#define GEN45_CONSTANT_BUFFER_DWordLength_bits 8
+#define GEN4_CONSTANT_BUFFER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_DWordLength_start 0
+#define GEN45_CONSTANT_BUFFER_DWordLength_start 0
+#define GEN4_CONSTANT_BUFFER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CONSTANT_BUFFER::Valid */
+
+
+#define GEN5_CONSTANT_BUFFER_Valid_bits 1
+#define GEN45_CONSTANT_BUFFER_Valid_bits 1
+#define GEN4_CONSTANT_BUFFER_Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CONSTANT_BUFFER_Valid_start 8
+#define GEN45_CONSTANT_BUFFER_Valid_start 8
+#define GEN4_CONSTANT_BUFFER_Valid_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CONSTANT_BUFFER_Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_INVOCATION_COUNT */
+
+
+#define GEN10_CS_INVOCATION_COUNT_length 2
+#define GEN9_CS_INVOCATION_COUNT_length 2
+#define GEN8_CS_INVOCATION_COUNT_length 2
+#define GEN75_CS_INVOCATION_COUNT_length 2
+#define GEN7_CS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_INVOCATION_COUNT::CS Invocation Count Report */
+
+
+#define GEN10_CS_INVOCATION_COUNT_CSInvocationCountReport_bits 64
+#define GEN9_CS_INVOCATION_COUNT_CSInvocationCountReport_bits 64
+#define GEN8_CS_INVOCATION_COUNT_CSInvocationCountReport_bits 64
+#define GEN75_CS_INVOCATION_COUNT_CSInvocationCountReport_bits 64
+#define GEN7_CS_INVOCATION_COUNT_CSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_INVOCATION_COUNT_CSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_CS_INVOCATION_COUNT_CSInvocationCountReport_start 0
+#define GEN9_CS_INVOCATION_COUNT_CSInvocationCountReport_start 0
+#define GEN8_CS_INVOCATION_COUNT_CSInvocationCountReport_start 0
+#define GEN75_CS_INVOCATION_COUNT_CSInvocationCountReport_start 0
+#define GEN7_CS_INVOCATION_COUNT_CSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_INVOCATION_COUNT_CSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE */
+
+
+#define GEN5_CS_URB_STATE_length 2
+#define GEN45_CS_URB_STATE_length 2
+#define GEN4_CS_URB_STATE_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::3D Command Opcode */
+
+
+#define GEN5_CS_URB_STATE_3DCommandOpcode_bits 3
+#define GEN45_CS_URB_STATE_3DCommandOpcode_bits 3
+#define GEN4_CS_URB_STATE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_3DCommandOpcode_start 24
+#define GEN45_CS_URB_STATE_3DCommandOpcode_start 24
+#define GEN4_CS_URB_STATE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::3D Command Sub Opcode */
+
+
+#define GEN5_CS_URB_STATE_3DCommandSubOpcode_bits 8
+#define GEN45_CS_URB_STATE_3DCommandSubOpcode_bits 8
+#define GEN4_CS_URB_STATE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_3DCommandSubOpcode_start 16
+#define GEN45_CS_URB_STATE_3DCommandSubOpcode_start 16
+#define GEN4_CS_URB_STATE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::Command SubType */
+
+
+#define GEN5_CS_URB_STATE_CommandSubType_bits 2
+#define GEN45_CS_URB_STATE_CommandSubType_bits 2
+#define GEN4_CS_URB_STATE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_CommandSubType_start 27
+#define GEN45_CS_URB_STATE_CommandSubType_start 27
+#define GEN4_CS_URB_STATE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::Command Type */
+
+
+#define GEN5_CS_URB_STATE_CommandType_bits 3
+#define GEN45_CS_URB_STATE_CommandType_bits 3
+#define GEN4_CS_URB_STATE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_CommandType_start 29
+#define GEN45_CS_URB_STATE_CommandType_start 29
+#define GEN4_CS_URB_STATE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::DWord Length */
+
+
+#define GEN5_CS_URB_STATE_DWordLength_bits 8
+#define GEN45_CS_URB_STATE_DWordLength_bits 8
+#define GEN4_CS_URB_STATE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_DWordLength_start 0
+#define GEN45_CS_URB_STATE_DWordLength_start 0
+#define GEN4_CS_URB_STATE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::Number of URB Entries */
+
+
+#define GEN5_CS_URB_STATE_NumberofURBEntries_bits 3
+#define GEN45_CS_URB_STATE_NumberofURBEntries_bits 3
+#define GEN4_CS_URB_STATE_NumberofURBEntries_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_NumberofURBEntries_start 32
+#define GEN45_CS_URB_STATE_NumberofURBEntries_start 32
+#define GEN4_CS_URB_STATE_NumberofURBEntries_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* CS_URB_STATE::URB Entry Allocation Size */
+
+
+#define GEN5_CS_URB_STATE_URBEntryAllocationSize_bits 5
+#define GEN45_CS_URB_STATE_URBEntryAllocationSize_bits 5
+#define GEN4_CS_URB_STATE_URBEntryAllocationSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_CS_URB_STATE_URBEntryAllocationSize_start 36
+#define GEN45_CS_URB_STATE_URBEntryAllocationSize_start 36
+#define GEN4_CS_URB_STATE_URBEntryAllocationSize_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+CS_URB_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 36;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 36;
+ } else {
+ return 36;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_length 3
+#define GEN7_DEPTH_STENCIL_STATE_length 3
+#define GEN6_DEPTH_STENCIL_STATE_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Fail Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_start 9
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_start 9
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilFailOp_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Pass Depth Fail Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_start 6
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_start 6
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Pass Depth Pass Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_start 3
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_start 3
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Test Function */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_start 12
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_start 12
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Test Mask */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_bits 8
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_bits 8
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_start 40
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_start 40
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilTestMask_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Backface Stencil Write Mask */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_bits 8
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_bits 8
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_start 32
+#define GEN7_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_start 32
+#define GEN6_DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_BackfaceStencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Depth Buffer Write Enable */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_bits 1
+#define GEN7_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_bits 1
+#define GEN6_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_start 90
+#define GEN7_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_start 90
+#define GEN6_DEPTH_STENCIL_STATE_DepthBufferWriteEnable_start 90
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 90;
+ } else {
+ return 90;
+ }
+ case 6: return 90;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Depth Test Enable */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthTestEnable_bits 1
+#define GEN7_DEPTH_STENCIL_STATE_DepthTestEnable_bits 1
+#define GEN6_DEPTH_STENCIL_STATE_DepthTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthTestEnable_start 95
+#define GEN7_DEPTH_STENCIL_STATE_DepthTestEnable_start 95
+#define GEN6_DEPTH_STENCIL_STATE_DepthTestEnable_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Depth Test Function */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthTestFunction_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_DepthTestFunction_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_DepthTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DepthTestFunction_start 91
+#define GEN7_DEPTH_STENCIL_STATE_DepthTestFunction_start 91
+#define GEN6_DEPTH_STENCIL_STATE_DepthTestFunction_start 91
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DepthTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 91;
+ } else {
+ return 91;
+ }
+ case 6: return 91;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Double Sided Stencil Enable */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_bits 1
+#define GEN7_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_bits 1
+#define GEN6_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_start 15
+#define GEN7_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_start 15
+#define GEN6_DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_DoubleSidedStencilEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Buffer Write Enable */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_bits 1
+#define GEN7_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_bits 1
+#define GEN6_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilBufferWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_start 18
+#define GEN7_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_start 18
+#define GEN6_DEPTH_STENCIL_STATE_StencilBufferWriteEnable_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilBufferWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 18;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Fail Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilFailOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_StencilFailOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_StencilFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilFailOp_start 25
+#define GEN7_DEPTH_STENCIL_STATE_StencilFailOp_start 25
+#define GEN6_DEPTH_STENCIL_STATE_StencilFailOp_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 25;
+ } else {
+ return 25;
+ }
+ case 6: return 25;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Pass Depth Fail Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilPassDepthFailOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_start 22
+#define GEN7_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_start 22
+#define GEN6_DEPTH_STENCIL_STATE_StencilPassDepthFailOp_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilPassDepthFailOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Pass Depth Pass Op */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilPassDepthPassOp_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_start 19
+#define GEN7_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_start 19
+#define GEN6_DEPTH_STENCIL_STATE_StencilPassDepthPassOp_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilPassDepthPassOp_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 19;
+ } else {
+ return 19;
+ }
+ case 6: return 19;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Test Enable */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestEnable_bits 1
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestEnable_bits 1
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestEnable_start 31
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestEnable_start 31
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestEnable_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 31;
+ } else {
+ return 31;
+ }
+ case 6: return 31;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Test Function */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestFunction_bits 3
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestFunction_bits 3
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestFunction_start 28
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestFunction_start 28
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestFunction_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 28;
+ } else {
+ return 28;
+ }
+ case 6: return 28;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Test Mask */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestMask_bits 8
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestMask_bits 8
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilTestMask_start 56
+#define GEN7_DEPTH_STENCIL_STATE_StencilTestMask_start 56
+#define GEN6_DEPTH_STENCIL_STATE_StencilTestMask_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilTestMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 56;
+ } else {
+ return 56;
+ }
+ case 6: return 56;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DEPTH_STENCIL_STATE::Stencil Write Mask */
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilWriteMask_bits 8
+#define GEN7_DEPTH_STENCIL_STATE_StencilWriteMask_bits 8
+#define GEN6_DEPTH_STENCIL_STATE_StencilWriteMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilWriteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_DEPTH_STENCIL_STATE_StencilWriteMask_start 48
+#define GEN7_DEPTH_STENCIL_STATE_StencilWriteMask_start 48
+#define GEN6_DEPTH_STENCIL_STATE_StencilWriteMask_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+DEPTH_STENCIL_STATE_StencilWriteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DS_INVOCATION_COUNT */
+
+
+#define GEN10_DS_INVOCATION_COUNT_length 2
+#define GEN9_DS_INVOCATION_COUNT_length 2
+#define GEN8_DS_INVOCATION_COUNT_length 2
+#define GEN75_DS_INVOCATION_COUNT_length 2
+#define GEN7_DS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+DS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* DS_INVOCATION_COUNT::DS Invocation Count Report */
+
+
+#define GEN10_DS_INVOCATION_COUNT_DSInvocationCountReport_bits 64
+#define GEN9_DS_INVOCATION_COUNT_DSInvocationCountReport_bits 64
+#define GEN8_DS_INVOCATION_COUNT_DSInvocationCountReport_bits 64
+#define GEN75_DS_INVOCATION_COUNT_DSInvocationCountReport_bits 64
+#define GEN7_DS_INVOCATION_COUNT_DSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+DS_INVOCATION_COUNT_DSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_DS_INVOCATION_COUNT_DSInvocationCountReport_start 0
+#define GEN9_DS_INVOCATION_COUNT_DSInvocationCountReport_start 0
+#define GEN8_DS_INVOCATION_COUNT_DSInvocationCountReport_start 0
+#define GEN75_DS_INVOCATION_COUNT_DSInvocationCountReport_start 0
+#define GEN7_DS_INVOCATION_COUNT_DSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+DS_INVOCATION_COUNT_DSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT */
+
+
+#define GEN75_ERR_INT_length 1
+#define GEN7_ERR_INT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Cursor A GTT Fault Status */
+
+
+#define GEN75_ERR_INT_CursorAGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_CursorAGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_CursorAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_CursorAGTTFaultStatus_start 4
+#define GEN7_ERR_INT_CursorAGTTFaultStatus_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_CursorAGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Cursor B GTT Fault Status */
+
+
+#define GEN75_ERR_INT_CursorBGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_CursorBGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_CursorBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_CursorBGTTFaultStatus_start 5
+#define GEN7_ERR_INT_CursorBGTTFaultStatus_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_CursorBGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Invalid GTT page table entry */
+
+
+#define GEN75_ERR_INT_InvalidGTTpagetableentry_bits 1
+#define GEN7_ERR_INT_InvalidGTTpagetableentry_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_InvalidGTTpagetableentry_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_InvalidGTTpagetableentry_start 7
+#define GEN7_ERR_INT_InvalidGTTpagetableentry_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_InvalidGTTpagetableentry_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Invalid page table entry data */
+
+
+#define GEN75_ERR_INT_Invalidpagetableentrydata_bits 1
+#define GEN7_ERR_INT_Invalidpagetableentrydata_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_Invalidpagetableentrydata_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_Invalidpagetableentrydata_start 6
+#define GEN7_ERR_INT_Invalidpagetableentrydata_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_Invalidpagetableentrydata_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Primary A GTT Fault Status */
+
+
+#define GEN75_ERR_INT_PrimaryAGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_PrimaryAGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_PrimaryAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_PrimaryAGTTFaultStatus_start 0
+#define GEN7_ERR_INT_PrimaryAGTTFaultStatus_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_PrimaryAGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Primary B GTT Fault Status */
+
+
+#define GEN75_ERR_INT_PrimaryBGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_PrimaryBGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_PrimaryBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_PrimaryBGTTFaultStatus_start 1
+#define GEN7_ERR_INT_PrimaryBGTTFaultStatus_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_PrimaryBGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Sprite A GTT Fault Status */
+
+
+#define GEN75_ERR_INT_SpriteAGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_SpriteAGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_SpriteAGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_SpriteAGTTFaultStatus_start 2
+#define GEN7_ERR_INT_SpriteAGTTFaultStatus_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_SpriteAGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ERR_INT::Sprite B GTT Fault Status */
+
+
+#define GEN75_ERR_INT_SpriteBGTTFaultStatus_bits 1
+#define GEN7_ERR_INT_SpriteBGTTFaultStatus_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_SpriteBGTTFaultStatus_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_ERR_INT_SpriteBGTTFaultStatus_start 3
+#define GEN7_ERR_INT_SpriteBGTTFaultStatus_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+ERR_INT_SpriteBGTTFaultStatus_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR */
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 1
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR::End Of Thread */
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_bits 1
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_start 5
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_EndOfThread_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR::Extended Message Length */
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_bits 4
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_start 6
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_ExtendedMessageLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR::Target Function ID */
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_bits 4
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_start 0
+#define GEN9_EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+EXECUTION_UNIT_EXTENDED_MESSAGE_DESCRIPTOR_TargetFunctionID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG */
+
+
+#define GEN9_FAULT_REG_length 1
+#define GEN8_FAULT_REG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG::Engine ID */
+
+
+#define GEN9_FAULT_REG_EngineID_bits 3
+#define GEN8_FAULT_REG_EngineID_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_EngineID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_FAULT_REG_EngineID_start 12
+#define GEN8_FAULT_REG_EngineID_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_EngineID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG::Fault Type */
+
+
+#define GEN9_FAULT_REG_FaultType_bits 2
+#define GEN8_FAULT_REG_FaultType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_FAULT_REG_FaultType_start 1
+#define GEN8_FAULT_REG_FaultType_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG::GTTSEL */
+
+
+#define GEN9_FAULT_REG_GTTSEL_bits 1
+#define GEN8_FAULT_REG_GTTSEL_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_FAULT_REG_GTTSEL_start 11
+#define GEN8_FAULT_REG_GTTSEL_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG::SRCID of Fault */
+
+
+#define GEN9_FAULT_REG_SRCIDofFault_bits 8
+#define GEN8_FAULT_REG_SRCIDofFault_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_FAULT_REG_SRCIDofFault_start 3
+#define GEN8_FAULT_REG_SRCIDofFault_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FAULT_REG::Valid Bit */
+
+
+#define GEN9_FAULT_REG_ValidBit_bits 1
+#define GEN8_FAULT_REG_ValidBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_FAULT_REG_ValidBit_start 0
+#define GEN8_FAULT_REG_ValidBit_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FILTER_COEFFICIENT */
+
+
+#define GEN10_FILTER_COEFFICIENT_length 1
+#define GEN9_FILTER_COEFFICIENT_length 1
+#define GEN8_FILTER_COEFFICIENT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+FILTER_COEFFICIENT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* FILTER_COEFFICIENT::Filter Coefficient */
+
+
+#define GEN10_FILTER_COEFFICIENT_FilterCoefficient_bits 8
+#define GEN9_FILTER_COEFFICIENT_FilterCoefficient_bits 8
+#define GEN8_FILTER_COEFFICIENT_FilterCoefficient_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+FILTER_COEFFICIENT_FilterCoefficient_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_FILTER_COEFFICIENT_FilterCoefficient_start 0
+#define GEN9_FILTER_COEFFICIENT_FilterCoefficient_start 0
+#define GEN8_FILTER_COEFFICIENT_FilterCoefficient_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+FILTER_COEFFICIENT_FilterCoefficient_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GATHER_CONSTANT_ENTRY */
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_length 1
+#define GEN9_GATHER_CONSTANT_ENTRY_length 1
+#define GEN8_GATHER_CONSTANT_ENTRY_length 1
+#define GEN75_GATHER_CONSTANT_ENTRY_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GATHER_CONSTANT_ENTRY::Binding Table Index Offset */
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits 4
+#define GEN9_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits 4
+#define GEN8_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits 4
+#define GEN75_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start 0
+#define GEN9_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start 0
+#define GEN8_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start 0
+#define GEN75_GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_BindingTableIndexOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GATHER_CONSTANT_ENTRY::Channel Mask */
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_ChannelMask_bits 4
+#define GEN9_GATHER_CONSTANT_ENTRY_ChannelMask_bits 4
+#define GEN8_GATHER_CONSTANT_ENTRY_ChannelMask_bits 4
+#define GEN75_GATHER_CONSTANT_ENTRY_ChannelMask_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_ChannelMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_ChannelMask_start 4
+#define GEN9_GATHER_CONSTANT_ENTRY_ChannelMask_start 4
+#define GEN8_GATHER_CONSTANT_ENTRY_ChannelMask_start 4
+#define GEN75_GATHER_CONSTANT_ENTRY_ChannelMask_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_ChannelMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GATHER_CONSTANT_ENTRY::Constant Buffer Offset */
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits 8
+#define GEN9_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits 8
+#define GEN8_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits 8
+#define GEN75_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_ConstantBufferOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start 8
+#define GEN9_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start 8
+#define GEN8_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start 8
+#define GEN75_GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GATHER_CONSTANT_ENTRY_ConstantBufferOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_length 1
+#define GEN8_GFX_ARB_ERROR_RPT_length 1
+#define GEN75_GFX_ARB_ERROR_RPT_length 1
+#define GEN7_GFX_ARB_ERROR_RPT_length 1
+#define GEN6_GFX_ARB_ERROR_RPT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Context Page Fault Error */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_ContextPageFaultError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_ContextPageFaultError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_ContextPageFaultError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextPageFaultError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_ContextPageFaultError_start 1
+#define GEN7_GFX_ARB_ERROR_RPT_ContextPageFaultError_start 1
+#define GEN6_GFX_ARB_ERROR_RPT_ContextPageFaultError_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextPageFaultError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Context Page VTD Translation Error */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_start 5
+#define GEN7_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_start 5
+#define GEN6_GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextPageVTDTranslationError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Context Was Not Marked As Present When Doing DMA */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_start 15
+#define GEN8_GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ContextWasNotMarkedAsPresentWhenDoingDMA_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::GuC VTd translation Page Fault 2nd level (Undefined doorbell) */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_start 9
+#define GEN8_GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_GuCVTdtranslationPageFault2ndlevelUndefineddoorbell_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Hardware Status Page Fault Error */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_start 3
+#define GEN7_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_start 3
+#define GEN6_GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_HardwareStatusPageFaultError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Hardware Status Page VTD Translation Error */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_start 7
+#define GEN7_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_start 7
+#define GEN6_GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_HardwareStatusPageVTDTranslationError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Invalid Page Directory Entry Error */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_start 2
+#define GEN8_GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_InvalidPageDirectoryEntryError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Invalid Page Directory entry error */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_start 2
+#define GEN7_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_start 2
+#define GEN6_GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_InvalidPageDirectoryentryerror_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Non WB memory type for Advanced Context */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_start 10
+#define GEN8_GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_NonWBmemorytypeforAdvancedContext_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::PASID Boundary Violation */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_start 12
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDBoundaryViolation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::PASID Not Enabled */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDNotEnabled_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDNotEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDNotEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDNotEnabled_start 11
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDNotEnabled_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDNotEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::PASID Not Valid */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDNotValid_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDNotValid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDNotValid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDNotValid_start 13
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDNotValid_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDNotValid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::PASID Was Zero For Untranslated Request */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_start 14
+#define GEN8_GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PASIDWasZeroForUntranslatedRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Page Directory Entry VTD Translation Error */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits 1
+#define GEN75_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start 6
+#define GEN8_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start 6
+#define GEN75_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start 6
+#define GEN7_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start 6
+#define GEN6_GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PageDirectoryEntryVTDTranslationError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Pending Page Faults */
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_PendingPageFaults_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PendingPageFaults_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GFX_ARB_ERROR_RPT_PendingPageFaults_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_PendingPageFaults_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::ROSTRM PAVP Invalid Physical Address */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_start 3
+#define GEN8_GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_ROSTRMPAVPInvalidPhysicalAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::RSTRM PAVP Read Invalid */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_start 1
+#define GEN8_GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_RSTRMPAVPReadInvalid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::TLB Page Fault Error */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_TLBPageFaultError_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_TLBPageFaultError_bits 1
+#define GEN75_GFX_ARB_ERROR_RPT_TLBPageFaultError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_TLBPageFaultError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_TLBPageFaultError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_TLBPageFaultError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_TLBPageFaultError_start 0
+#define GEN8_GFX_ARB_ERROR_RPT_TLBPageFaultError_start 0
+#define GEN75_GFX_ARB_ERROR_RPT_TLBPageFaultError_start 0
+#define GEN7_GFX_ARB_ERROR_RPT_TLBPageFaultError_start 0
+#define GEN6_GFX_ARB_ERROR_RPT_TLBPageFaultError_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_TLBPageFaultError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::TLB Page VTD Translation Error */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits 1
+#define GEN75_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start 4
+#define GEN8_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start 4
+#define GEN75_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start 4
+#define GEN7_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start 4
+#define GEN6_GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_TLBPageVTDTranslationError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::Unloaded PD Error */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_UnloadedPDError_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_UnloadedPDError_bits 1
+#define GEN75_GFX_ARB_ERROR_RPT_UnloadedPDError_bits 1
+#define GEN7_GFX_ARB_ERROR_RPT_UnloadedPDError_bits 1
+#define GEN6_GFX_ARB_ERROR_RPT_UnloadedPDError_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_UnloadedPDError_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_UnloadedPDError_start 8
+#define GEN8_GFX_ARB_ERROR_RPT_UnloadedPDError_start 8
+#define GEN75_GFX_ARB_ERROR_RPT_UnloadedPDError_start 8
+#define GEN7_GFX_ARB_ERROR_RPT_UnloadedPDError_start 8
+#define GEN6_GFX_ARB_ERROR_RPT_UnloadedPDError_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_UnloadedPDError_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GFX_ARB_ERROR_RPT::WRDP PAVP Invalid */
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_bits 1
+#define GEN8_GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_start 5
+#define GEN8_GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+GFX_ARB_ERROR_RPT_WRDPPAVPInvalid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_length 3
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_length 3
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::3D Command Opcode */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::3D Command Sub Opcode */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::Command SubType */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_CommandSubType_start 27
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_CommandSubType_start 27
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::Command Type */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_CommandType_bits 3
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_CommandType_bits 3
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_CommandType_start 29
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_CommandType_start 29
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::DWord Length */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_DWordLength_bits 8
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_DWordLength_bits 8
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_DWordLength_start 0
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_DWordLength_start 0
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_CSR_BASE_ADDRESS::GPGPU CSR Base Address */
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_bits 52
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_bits 52
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_start 44
+#define GEN8_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_start 44
+#define GEN75_GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_CSR_BASE_ADDRESS_GPGPUCSRBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT */
+
+
+#define GEN75_GPGPU_OBJECT_length 8
+#define GEN7_GPGPU_OBJECT_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Command Type */
+
+
+#define GEN75_GPGPU_OBJECT_CommandType_bits 3
+#define GEN7_GPGPU_OBJECT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_CommandType_start 29
+#define GEN7_GPGPU_OBJECT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::DWord Length */
+
+
+#define GEN75_GPGPU_OBJECT_DWordLength_bits 8
+#define GEN7_GPGPU_OBJECT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_DWordLength_start 0
+#define GEN7_GPGPU_OBJECT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::End of Thread Group */
+
+
+#define GEN75_GPGPU_OBJECT_EndofThreadGroup_bits 1
+#define GEN7_GPGPU_OBJECT_EndofThreadGroup_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_EndofThreadGroup_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_EndofThreadGroup_start 88
+#define GEN7_GPGPU_OBJECT_EndofThreadGroup_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_EndofThreadGroup_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Execution Mask */
+
+
+#define GEN75_GPGPU_OBJECT_ExecutionMask_bits 32
+#define GEN7_GPGPU_OBJECT_ExecutionMask_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ExecutionMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_ExecutionMask_start 224
+#define GEN7_GPGPU_OBJECT_ExecutionMask_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ExecutionMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Half-Slice Destination Select */
+
+
+#define GEN75_GPGPU_OBJECT_HalfSliceDestinationSelect_bits 2
+#define GEN7_GPGPU_OBJECT_HalfSliceDestinationSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_HalfSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_HalfSliceDestinationSelect_start 81
+#define GEN7_GPGPU_OBJECT_HalfSliceDestinationSelect_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_HalfSliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 81;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Indirect Data Length */
+
+
+#define GEN75_GPGPU_OBJECT_IndirectDataLength_bits 17
+#define GEN7_GPGPU_OBJECT_IndirectDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_IndirectDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_IndirectDataLength_start 64
+#define GEN7_GPGPU_OBJECT_IndirectDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_IndirectDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Indirect Data Start Address */
+
+
+#define GEN75_GPGPU_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN7_GPGPU_OBJECT_IndirectDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_IndirectDataStartAddress_start 96
+#define GEN7_GPGPU_OBJECT_IndirectDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Interface Descriptor Offset */
+
+
+#define GEN75_GPGPU_OBJECT_InterfaceDescriptorOffset_bits 6
+#define GEN7_GPGPU_OBJECT_InterfaceDescriptorOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN7_GPGPU_OBJECT_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Media Command Opcode */
+
+
+#define GEN75_GPGPU_OBJECT_MediaCommandOpcode_bits 3
+#define GEN7_GPGPU_OBJECT_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_MediaCommandOpcode_start 24
+#define GEN7_GPGPU_OBJECT_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Pipeline */
+
+
+#define GEN75_GPGPU_OBJECT_Pipeline_bits 2
+#define GEN7_GPGPU_OBJECT_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_Pipeline_start 27
+#define GEN7_GPGPU_OBJECT_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Predicate Enable */
+
+
+#define GEN75_GPGPU_OBJECT_PredicateEnable_bits 1
+#define GEN7_GPGPU_OBJECT_PredicateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_PredicateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_PredicateEnable_start 8
+#define GEN7_GPGPU_OBJECT_PredicateEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_PredicateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Shared Local Memory Fixed Offset */
+
+
+#define GEN75_GPGPU_OBJECT_SharedLocalMemoryFixedOffset_bits 1
+#define GEN7_GPGPU_OBJECT_SharedLocalMemoryFixedOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SharedLocalMemoryFixedOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_SharedLocalMemoryFixedOffset_start 39
+#define GEN7_GPGPU_OBJECT_SharedLocalMemoryFixedOffset_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SharedLocalMemoryFixedOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 39;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Shared Local Memory Offset */
+
+
+#define GEN75_GPGPU_OBJECT_SharedLocalMemoryOffset_bits 4
+#define GEN7_GPGPU_OBJECT_SharedLocalMemoryOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SharedLocalMemoryOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_SharedLocalMemoryOffset_start 92
+#define GEN7_GPGPU_OBJECT_SharedLocalMemoryOffset_start 92
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SharedLocalMemoryOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 92;
+ } else {
+ return 92;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Slice Destination Select */
+
+
+#define GEN75_GPGPU_OBJECT_SliceDestinationSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_SliceDestinationSelect_start 83
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 83;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::SubOpcode */
+
+
+#define GEN75_GPGPU_OBJECT_SubOpcode_bits 8
+#define GEN7_GPGPU_OBJECT_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_SubOpcode_start 16
+#define GEN7_GPGPU_OBJECT_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Thread Group ID X */
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDX_bits 32
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDX_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDX_start 128
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDX_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Thread Group ID Y */
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDY_bits 32
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDY_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDY_start 160
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDY_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_OBJECT::Thread Group ID Z */
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDZ_bits 32
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDZ_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_OBJECT_ThreadGroupIDZ_start 192
+#define GEN7_GPGPU_OBJECT_ThreadGroupIDZ_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_OBJECT_ThreadGroupIDZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER */
+
+
+#define GEN10_GPGPU_WALKER_length 15
+#define GEN9_GPGPU_WALKER_length 15
+#define GEN8_GPGPU_WALKER_length 15
+#define GEN75_GPGPU_WALKER_length 11
+#define GEN7_GPGPU_WALKER_length 11
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Bottom Execution Mask */
+
+
+#define GEN10_GPGPU_WALKER_BottomExecutionMask_bits 32
+#define GEN9_GPGPU_WALKER_BottomExecutionMask_bits 32
+#define GEN8_GPGPU_WALKER_BottomExecutionMask_bits 32
+#define GEN75_GPGPU_WALKER_BottomExecutionMask_bits 32
+#define GEN7_GPGPU_WALKER_BottomExecutionMask_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_BottomExecutionMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_BottomExecutionMask_start 448
+#define GEN9_GPGPU_WALKER_BottomExecutionMask_start 448
+#define GEN8_GPGPU_WALKER_BottomExecutionMask_start 448
+#define GEN75_GPGPU_WALKER_BottomExecutionMask_start 320
+#define GEN7_GPGPU_WALKER_BottomExecutionMask_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_BottomExecutionMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 448;
+ case 9: return 448;
+ case 8: return 448;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 320;
+ } else {
+ return 320;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Command Type */
+
+
+#define GEN10_GPGPU_WALKER_CommandType_bits 3
+#define GEN9_GPGPU_WALKER_CommandType_bits 3
+#define GEN8_GPGPU_WALKER_CommandType_bits 3
+#define GEN75_GPGPU_WALKER_CommandType_bits 3
+#define GEN7_GPGPU_WALKER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_CommandType_start 29
+#define GEN9_GPGPU_WALKER_CommandType_start 29
+#define GEN8_GPGPU_WALKER_CommandType_start 29
+#define GEN75_GPGPU_WALKER_CommandType_start 29
+#define GEN7_GPGPU_WALKER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::DWord Length */
+
+
+#define GEN10_GPGPU_WALKER_DWordLength_bits 8
+#define GEN9_GPGPU_WALKER_DWordLength_bits 8
+#define GEN8_GPGPU_WALKER_DWordLength_bits 8
+#define GEN75_GPGPU_WALKER_DWordLength_bits 8
+#define GEN7_GPGPU_WALKER_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_DWordLength_start 0
+#define GEN9_GPGPU_WALKER_DWordLength_start 0
+#define GEN8_GPGPU_WALKER_DWordLength_start 0
+#define GEN75_GPGPU_WALKER_DWordLength_start 0
+#define GEN7_GPGPU_WALKER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Indirect Data Length */
+
+
+#define GEN10_GPGPU_WALKER_IndirectDataLength_bits 17
+#define GEN9_GPGPU_WALKER_IndirectDataLength_bits 17
+#define GEN8_GPGPU_WALKER_IndirectDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_IndirectDataLength_start 64
+#define GEN9_GPGPU_WALKER_IndirectDataLength_start 64
+#define GEN8_GPGPU_WALKER_IndirectDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Indirect Data Start Address */
+
+
+#define GEN10_GPGPU_WALKER_IndirectDataStartAddress_bits 26
+#define GEN9_GPGPU_WALKER_IndirectDataStartAddress_bits 26
+#define GEN8_GPGPU_WALKER_IndirectDataStartAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_IndirectDataStartAddress_start 102
+#define GEN9_GPGPU_WALKER_IndirectDataStartAddress_start 102
+#define GEN8_GPGPU_WALKER_IndirectDataStartAddress_start 102
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 102;
+ case 9: return 102;
+ case 8: return 102;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Indirect Parameter Enable */
+
+
+#define GEN10_GPGPU_WALKER_IndirectParameterEnable_bits 1
+#define GEN9_GPGPU_WALKER_IndirectParameterEnable_bits 1
+#define GEN8_GPGPU_WALKER_IndirectParameterEnable_bits 1
+#define GEN75_GPGPU_WALKER_IndirectParameterEnable_bits 1
+#define GEN7_GPGPU_WALKER_IndirectParameterEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectParameterEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_IndirectParameterEnable_start 10
+#define GEN9_GPGPU_WALKER_IndirectParameterEnable_start 10
+#define GEN8_GPGPU_WALKER_IndirectParameterEnable_start 10
+#define GEN75_GPGPU_WALKER_IndirectParameterEnable_start 10
+#define GEN7_GPGPU_WALKER_IndirectParameterEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_IndirectParameterEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Interface Descriptor Offset */
+
+
+#define GEN10_GPGPU_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN9_GPGPU_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN8_GPGPU_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN75_GPGPU_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN7_GPGPU_WALKER_InterfaceDescriptorOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN9_GPGPU_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN8_GPGPU_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN75_GPGPU_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN7_GPGPU_WALKER_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Media Command Opcode */
+
+
+#define GEN10_GPGPU_WALKER_MediaCommandOpcode_bits 3
+#define GEN9_GPGPU_WALKER_MediaCommandOpcode_bits 3
+#define GEN8_GPGPU_WALKER_MediaCommandOpcode_bits 3
+#define GEN75_GPGPU_WALKER_MediaCommandOpcode_bits 3
+#define GEN7_GPGPU_WALKER_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_MediaCommandOpcode_start 24
+#define GEN9_GPGPU_WALKER_MediaCommandOpcode_start 24
+#define GEN8_GPGPU_WALKER_MediaCommandOpcode_start 24
+#define GEN75_GPGPU_WALKER_MediaCommandOpcode_start 24
+#define GEN7_GPGPU_WALKER_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Pipeline */
+
+
+#define GEN10_GPGPU_WALKER_Pipeline_bits 2
+#define GEN9_GPGPU_WALKER_Pipeline_bits 2
+#define GEN8_GPGPU_WALKER_Pipeline_bits 2
+#define GEN75_GPGPU_WALKER_Pipeline_bits 2
+#define GEN7_GPGPU_WALKER_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_Pipeline_start 27
+#define GEN9_GPGPU_WALKER_Pipeline_start 27
+#define GEN8_GPGPU_WALKER_Pipeline_start 27
+#define GEN75_GPGPU_WALKER_Pipeline_start 27
+#define GEN7_GPGPU_WALKER_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Predicate Enable */
+
+
+#define GEN10_GPGPU_WALKER_PredicateEnable_bits 1
+#define GEN9_GPGPU_WALKER_PredicateEnable_bits 1
+#define GEN8_GPGPU_WALKER_PredicateEnable_bits 1
+#define GEN75_GPGPU_WALKER_PredicateEnable_bits 1
+#define GEN7_GPGPU_WALKER_PredicateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_PredicateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_PredicateEnable_start 8
+#define GEN9_GPGPU_WALKER_PredicateEnable_start 8
+#define GEN8_GPGPU_WALKER_PredicateEnable_start 8
+#define GEN75_GPGPU_WALKER_PredicateEnable_start 8
+#define GEN7_GPGPU_WALKER_PredicateEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_PredicateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Right Execution Mask */
+
+
+#define GEN10_GPGPU_WALKER_RightExecutionMask_bits 32
+#define GEN9_GPGPU_WALKER_RightExecutionMask_bits 32
+#define GEN8_GPGPU_WALKER_RightExecutionMask_bits 32
+#define GEN75_GPGPU_WALKER_RightExecutionMask_bits 32
+#define GEN7_GPGPU_WALKER_RightExecutionMask_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_RightExecutionMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_RightExecutionMask_start 416
+#define GEN9_GPGPU_WALKER_RightExecutionMask_start 416
+#define GEN8_GPGPU_WALKER_RightExecutionMask_start 416
+#define GEN75_GPGPU_WALKER_RightExecutionMask_start 288
+#define GEN7_GPGPU_WALKER_RightExecutionMask_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_RightExecutionMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 416;
+ case 8: return 416;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 288;
+ } else {
+ return 288;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::SIMD Size */
+
+
+#define GEN10_GPGPU_WALKER_SIMDSize_bits 2
+#define GEN9_GPGPU_WALKER_SIMDSize_bits 2
+#define GEN8_GPGPU_WALKER_SIMDSize_bits 2
+#define GEN75_GPGPU_WALKER_SIMDSize_bits 2
+#define GEN7_GPGPU_WALKER_SIMDSize_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SIMDSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_SIMDSize_start 158
+#define GEN9_GPGPU_WALKER_SIMDSize_start 158
+#define GEN8_GPGPU_WALKER_SIMDSize_start 158
+#define GEN75_GPGPU_WALKER_SIMDSize_start 94
+#define GEN7_GPGPU_WALKER_SIMDSize_start 94
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SIMDSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 158;
+ case 9: return 158;
+ case 8: return 158;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 94;
+ } else {
+ return 94;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::SubOpcode */
+
+
+#define GEN10_GPGPU_WALKER_SubOpcode_bits 8
+#define GEN9_GPGPU_WALKER_SubOpcode_bits 8
+#define GEN8_GPGPU_WALKER_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_SubOpcode_start 16
+#define GEN9_GPGPU_WALKER_SubOpcode_start 16
+#define GEN8_GPGPU_WALKER_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::SubOpcode A */
+
+
+#define GEN75_GPGPU_WALKER_SubOpcodeA_bits 8
+#define GEN7_GPGPU_WALKER_SubOpcodeA_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SubOpcodeA_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_WALKER_SubOpcodeA_start 16
+#define GEN7_GPGPU_WALKER_SubOpcodeA_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_SubOpcodeA_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Depth Counter Maximum */
+
+
+#define GEN10_GPGPU_WALKER_ThreadDepthCounterMaximum_bits 6
+#define GEN9_GPGPU_WALKER_ThreadDepthCounterMaximum_bits 6
+#define GEN8_GPGPU_WALKER_ThreadDepthCounterMaximum_bits 6
+#define GEN75_GPGPU_WALKER_ThreadDepthCounterMaximum_bits 6
+#define GEN7_GPGPU_WALKER_ThreadDepthCounterMaximum_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadDepthCounterMaximum_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadDepthCounterMaximum_start 144
+#define GEN9_GPGPU_WALKER_ThreadDepthCounterMaximum_start 144
+#define GEN8_GPGPU_WALKER_ThreadDepthCounterMaximum_start 144
+#define GEN75_GPGPU_WALKER_ThreadDepthCounterMaximum_start 80
+#define GEN7_GPGPU_WALKER_ThreadDepthCounterMaximum_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadDepthCounterMaximum_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 144;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Starting X */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingX_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingX_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingX_bits 32
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingX_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingX_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingX_start 160
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingX_start 160
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingX_start 160
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingX_start 96
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingX_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Starting Y */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingY_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingY_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingY_bits 32
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingY_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingY_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingY_start 256
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingY_start 256
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingY_start 256
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingY_start 160
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingY_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Starting Z */
+
+
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingZ_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingZ_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_GPGPU_WALKER_ThreadGroupIDStartingZ_start 224
+#define GEN7_GPGPU_WALKER_ThreadGroupIDStartingZ_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Starting/Resume Z */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingResumeZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_start 352
+#define GEN9_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_start 352
+#define GEN8_GPGPU_WALKER_ThreadGroupIDStartingResumeZ_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDStartingResumeZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 352;
+ case 9: return 352;
+ case 8: return 352;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID X Dimension */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDXDimension_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDXDimension_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDXDimension_bits 32
+#define GEN75_GPGPU_WALKER_ThreadGroupIDXDimension_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDXDimension_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDXDimension_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDXDimension_start 224
+#define GEN9_GPGPU_WALKER_ThreadGroupIDXDimension_start 224
+#define GEN8_GPGPU_WALKER_ThreadGroupIDXDimension_start 224
+#define GEN75_GPGPU_WALKER_ThreadGroupIDXDimension_start 128
+#define GEN7_GPGPU_WALKER_ThreadGroupIDXDimension_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDXDimension_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Y Dimension */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDYDimension_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDYDimension_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDYDimension_bits 32
+#define GEN75_GPGPU_WALKER_ThreadGroupIDYDimension_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDYDimension_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDYDimension_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDYDimension_start 320
+#define GEN9_GPGPU_WALKER_ThreadGroupIDYDimension_start 320
+#define GEN8_GPGPU_WALKER_ThreadGroupIDYDimension_start 320
+#define GEN75_GPGPU_WALKER_ThreadGroupIDYDimension_start 192
+#define GEN7_GPGPU_WALKER_ThreadGroupIDYDimension_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDYDimension_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Group ID Z Dimension */
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDZDimension_bits 32
+#define GEN9_GPGPU_WALKER_ThreadGroupIDZDimension_bits 32
+#define GEN8_GPGPU_WALKER_ThreadGroupIDZDimension_bits 32
+#define GEN75_GPGPU_WALKER_ThreadGroupIDZDimension_bits 32
+#define GEN7_GPGPU_WALKER_ThreadGroupIDZDimension_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDZDimension_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadGroupIDZDimension_start 384
+#define GEN9_GPGPU_WALKER_ThreadGroupIDZDimension_start 384
+#define GEN8_GPGPU_WALKER_ThreadGroupIDZDimension_start 384
+#define GEN75_GPGPU_WALKER_ThreadGroupIDZDimension_start 256
+#define GEN7_GPGPU_WALKER_ThreadGroupIDZDimension_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadGroupIDZDimension_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 384;
+ case 9: return 384;
+ case 8: return 384;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 256;
+ } else {
+ return 256;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Height Counter Maximum */
+
+
+#define GEN10_GPGPU_WALKER_ThreadHeightCounterMaximum_bits 6
+#define GEN9_GPGPU_WALKER_ThreadHeightCounterMaximum_bits 6
+#define GEN8_GPGPU_WALKER_ThreadHeightCounterMaximum_bits 6
+#define GEN75_GPGPU_WALKER_ThreadHeightCounterMaximum_bits 6
+#define GEN7_GPGPU_WALKER_ThreadHeightCounterMaximum_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadHeightCounterMaximum_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadHeightCounterMaximum_start 136
+#define GEN9_GPGPU_WALKER_ThreadHeightCounterMaximum_start 136
+#define GEN8_GPGPU_WALKER_ThreadHeightCounterMaximum_start 136
+#define GEN75_GPGPU_WALKER_ThreadHeightCounterMaximum_start 72
+#define GEN7_GPGPU_WALKER_ThreadHeightCounterMaximum_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadHeightCounterMaximum_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 136;
+ case 9: return 136;
+ case 8: return 136;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GPGPU_WALKER::Thread Width Counter Maximum */
+
+
+#define GEN10_GPGPU_WALKER_ThreadWidthCounterMaximum_bits 6
+#define GEN9_GPGPU_WALKER_ThreadWidthCounterMaximum_bits 6
+#define GEN8_GPGPU_WALKER_ThreadWidthCounterMaximum_bits 6
+#define GEN75_GPGPU_WALKER_ThreadWidthCounterMaximum_bits 6
+#define GEN7_GPGPU_WALKER_ThreadWidthCounterMaximum_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadWidthCounterMaximum_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GPGPU_WALKER_ThreadWidthCounterMaximum_start 128
+#define GEN9_GPGPU_WALKER_ThreadWidthCounterMaximum_start 128
+#define GEN8_GPGPU_WALKER_ThreadWidthCounterMaximum_start 128
+#define GEN75_GPGPU_WALKER_ThreadWidthCounterMaximum_start 64
+#define GEN7_GPGPU_WALKER_ThreadWidthCounterMaximum_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GPGPU_WALKER_ThreadWidthCounterMaximum_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_INVOCATION_COUNT */
+
+
+#define GEN10_GS_INVOCATION_COUNT_length 2
+#define GEN9_GS_INVOCATION_COUNT_length 2
+#define GEN8_GS_INVOCATION_COUNT_length 2
+#define GEN75_GS_INVOCATION_COUNT_length 2
+#define GEN7_GS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_INVOCATION_COUNT::GS Invocation Count Report */
+
+
+#define GEN10_GS_INVOCATION_COUNT_GSInvocationCountReport_bits 64
+#define GEN9_GS_INVOCATION_COUNT_GSInvocationCountReport_bits 64
+#define GEN8_GS_INVOCATION_COUNT_GSInvocationCountReport_bits 64
+#define GEN75_GS_INVOCATION_COUNT_GSInvocationCountReport_bits 64
+#define GEN7_GS_INVOCATION_COUNT_GSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_INVOCATION_COUNT_GSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GS_INVOCATION_COUNT_GSInvocationCountReport_start 0
+#define GEN9_GS_INVOCATION_COUNT_GSInvocationCountReport_start 0
+#define GEN8_GS_INVOCATION_COUNT_GSInvocationCountReport_start 0
+#define GEN75_GS_INVOCATION_COUNT_GSInvocationCountReport_start 0
+#define GEN7_GS_INVOCATION_COUNT_GSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_INVOCATION_COUNT_GSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_PRIMITIVES_COUNT */
+
+
+#define GEN10_GS_PRIMITIVES_COUNT_length 2
+#define GEN9_GS_PRIMITIVES_COUNT_length 2
+#define GEN8_GS_PRIMITIVES_COUNT_length 2
+#define GEN75_GS_PRIMITIVES_COUNT_length 2
+#define GEN7_GS_PRIMITIVES_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_PRIMITIVES_COUNT::GS Primitives Count Report */
+
+
+#define GEN10_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits 64
+#define GEN9_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits 64
+#define GEN8_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits 64
+#define GEN75_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits 64
+#define GEN7_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start 0
+#define GEN9_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start 0
+#define GEN8_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start 0
+#define GEN75_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start 0
+#define GEN7_GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_PRIMITIVES_COUNT_GSPrimitivesCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE */
+
+
+#define GEN5_GS_STATE_length 7
+#define GEN45_GS_STATE_length 7
+#define GEN4_GS_STATE_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Binding Table Entry Count */
+
+
+#define GEN5_GS_STATE_BindingTableEntryCount_bits 8
+#define GEN45_GS_STATE_BindingTableEntryCount_bits 8
+#define GEN4_GS_STATE_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_BindingTableEntryCount_start 50
+#define GEN45_GS_STATE_BindingTableEntryCount_start 50
+#define GEN4_GS_STATE_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Constant URB Entry Read Length */
+
+
+#define GEN5_GS_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN45_GS_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN4_GS_STATE_ConstantURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_ConstantURBEntryReadLength_start 121
+#define GEN45_GS_STATE_ConstantURBEntryReadLength_start 121
+#define GEN4_GS_STATE_ConstantURBEntryReadLength_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Constant URB Entry Read Offset */
+
+
+#define GEN5_GS_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN45_GS_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN4_GS_STATE_ConstantURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN45_GS_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN4_GS_STATE_ConstantURBEntryReadOffset_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Discard Adjacency */
+
+
+#define GEN45_GS_STATE_DiscardAdjacency_bits 1
+#define GEN4_GS_STATE_DiscardAdjacency_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_DiscardAdjacency_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_GS_STATE_DiscardAdjacency_start 221
+#define GEN4_GS_STATE_DiscardAdjacency_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_DiscardAdjacency_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 221;
+ } else {
+ return 221;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN5_GS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN45_GS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN4_GS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN45_GS_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN4_GS_STATE_DispatchGRFStartRegisterForURBData_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Floating Point Mode */
+
+
+#define GEN5_GS_STATE_FloatingPointMode_bits 1
+#define GEN45_GS_STATE_FloatingPointMode_bits 1
+#define GEN4_GS_STATE_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_FloatingPointMode_start 48
+#define GEN45_GS_STATE_FloatingPointMode_start 48
+#define GEN4_GS_STATE_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::GRF Register Count */
+
+
+#define GEN5_GS_STATE_GRFRegisterCount_bits 3
+#define GEN45_GS_STATE_GRFRegisterCount_bits 3
+#define GEN4_GS_STATE_GRFRegisterCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_GRFRegisterCount_start 1
+#define GEN45_GS_STATE_GRFRegisterCount_start 1
+#define GEN4_GS_STATE_GRFRegisterCount_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::GS Statistics Enable */
+
+
+#define GEN5_GS_STATE_GSStatisticsEnable_bits 1
+#define GEN45_GS_STATE_GSStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_GSStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_GSStatisticsEnable_start 138
+#define GEN45_GS_STATE_GSStatisticsEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_GSStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 138;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Illegal Opcode Exception Enable */
+
+
+#define GEN5_GS_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN45_GS_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN4_GS_STATE_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN45_GS_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN4_GS_STATE_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 45;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 45;
+ } else {
+ return 45;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Kernel Start Pointer */
+
+
+#define GEN5_GS_STATE_KernelStartPointer_bits 26
+#define GEN45_GS_STATE_KernelStartPointer_bits 26
+#define GEN4_GS_STATE_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_KernelStartPointer_start 6
+#define GEN45_GS_STATE_KernelStartPointer_start 6
+#define GEN4_GS_STATE_KernelStartPointer_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Mask Stack Exception Enable */
+
+
+#define GEN5_GS_STATE_MaskStackExceptionEnable_bits 1
+#define GEN45_GS_STATE_MaskStackExceptionEnable_bits 1
+#define GEN4_GS_STATE_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_MaskStackExceptionEnable_start 43
+#define GEN45_GS_STATE_MaskStackExceptionEnable_start 43
+#define GEN4_GS_STATE_MaskStackExceptionEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 43;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 43;
+ } else {
+ return 43;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Maximum Number of Threads */
+
+
+#define GEN5_GS_STATE_MaximumNumberofThreads_bits 6
+#define GEN45_GS_STATE_MaximumNumberofThreads_bits 6
+#define GEN4_GS_STATE_MaximumNumberofThreads_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_MaximumNumberofThreads_start 153
+#define GEN45_GS_STATE_MaximumNumberofThreads_start 153
+#define GEN4_GS_STATE_MaximumNumberofThreads_start 153
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 153;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 153;
+ } else {
+ return 153;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Maximum VPIndex */
+
+
+#define GEN5_GS_STATE_MaximumVPIndex_bits 4
+#define GEN45_GS_STATE_MaximumVPIndex_bits 4
+#define GEN4_GS_STATE_MaximumVPIndex_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaximumVPIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_MaximumVPIndex_start 192
+#define GEN45_GS_STATE_MaximumVPIndex_start 192
+#define GEN4_GS_STATE_MaximumVPIndex_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_MaximumVPIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Number of URB Entries */
+
+
+#define GEN5_GS_STATE_NumberofURBEntries_bits 8
+#define GEN45_GS_STATE_NumberofURBEntries_bits 8
+#define GEN4_GS_STATE_NumberofURBEntries_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_NumberofURBEntries_start 139
+#define GEN45_GS_STATE_NumberofURBEntries_start 139
+#define GEN4_GS_STATE_NumberofURBEntries_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 139;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 139;
+ } else {
+ return 139;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Per-Thread Scratch Space */
+
+
+#define GEN5_GS_STATE_PerThreadScratchSpace_bits 4
+#define GEN45_GS_STATE_PerThreadScratchSpace_bits 4
+#define GEN4_GS_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_PerThreadScratchSpace_start 64
+#define GEN45_GS_STATE_PerThreadScratchSpace_start 64
+#define GEN4_GS_STATE_PerThreadScratchSpace_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Rendering Enable */
+
+
+#define GEN45_GS_STATE_RenderingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_RenderingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_GS_STATE_RenderingEnable_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_RenderingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 136;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Rendering Enabled */
+
+
+#define GEN5_GS_STATE_RenderingEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_RenderingEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_RenderingEnabled_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_RenderingEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 136;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Reorder Enable */
+
+
+#define GEN5_GS_STATE_ReorderEnable_bits 1
+#define GEN45_GS_STATE_ReorderEnable_bits 1
+#define GEN4_GS_STATE_ReorderEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ReorderEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_ReorderEnable_start 222
+#define GEN45_GS_STATE_ReorderEnable_start 222
+#define GEN4_GS_STATE_ReorderEnable_start 222
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ReorderEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 222;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 222;
+ } else {
+ return 222;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::SO Statistics Enable */
+
+
+#define GEN5_GS_STATE_SOStatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SOStatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_SOStatisticsEnable_start 137
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SOStatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 137;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Sampler Count */
+
+
+#define GEN5_GS_STATE_SamplerCount_bits 3
+#define GEN45_GS_STATE_SamplerCount_bits 3
+#define GEN4_GS_STATE_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_SamplerCount_start 160
+#define GEN45_GS_STATE_SamplerCount_start 160
+#define GEN4_GS_STATE_SamplerCount_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Sampler State Pointer */
+
+
+#define GEN5_GS_STATE_SamplerStatePointer_bits 27
+#define GEN45_GS_STATE_SamplerStatePointer_bits 27
+#define GEN4_GS_STATE_SamplerStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_SamplerStatePointer_start 165
+#define GEN45_GS_STATE_SamplerStatePointer_start 165
+#define GEN4_GS_STATE_SamplerStatePointer_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 165;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 165;
+ } else {
+ return 165;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Scratch Space Base Pointer */
+
+
+#define GEN5_GS_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN45_GS_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN4_GS_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_ScratchSpaceBasePointer_start 74
+#define GEN45_GS_STATE_ScratchSpaceBasePointer_start 74
+#define GEN4_GS_STATE_ScratchSpaceBasePointer_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Single Program Flow */
+
+
+#define GEN5_GS_STATE_SingleProgramFlow_bits 1
+#define GEN45_GS_STATE_SingleProgramFlow_bits 1
+#define GEN4_GS_STATE_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_SingleProgramFlow_start 63
+#define GEN45_GS_STATE_SingleProgramFlow_start 63
+#define GEN4_GS_STATE_SingleProgramFlow_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Software Exception Enable */
+
+
+#define GEN5_GS_STATE_SoftwareExceptionEnable_bits 1
+#define GEN45_GS_STATE_SoftwareExceptionEnable_bits 1
+#define GEN4_GS_STATE_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_SoftwareExceptionEnable_start 39
+#define GEN45_GS_STATE_SoftwareExceptionEnable_start 39
+#define GEN4_GS_STATE_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 39;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 39;
+ } else {
+ return 39;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::URB Entry Allocation Size */
+
+
+#define GEN5_GS_STATE_URBEntryAllocationSize_bits 5
+#define GEN45_GS_STATE_URBEntryAllocationSize_bits 5
+#define GEN4_GS_STATE_URBEntryAllocationSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_URBEntryAllocationSize_start 147
+#define GEN45_GS_STATE_URBEntryAllocationSize_start 147
+#define GEN4_GS_STATE_URBEntryAllocationSize_start 147
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 147;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 147;
+ } else {
+ return 147;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Vertex URB Entry Read Length */
+
+
+#define GEN5_GS_STATE_VertexURBEntryReadLength_bits 6
+#define GEN45_GS_STATE_VertexURBEntryReadLength_bits 6
+#define GEN4_GS_STATE_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_VertexURBEntryReadLength_start 107
+#define GEN45_GS_STATE_VertexURBEntryReadLength_start 107
+#define GEN4_GS_STATE_VertexURBEntryReadLength_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* GS_STATE::Vertex URB Entry Read Offset */
+
+
+#define GEN5_GS_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN45_GS_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN4_GS_STATE_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_GS_STATE_VertexURBEntryReadOffset_start 100
+#define GEN45_GS_STATE_VertexURBEntryReadOffset_start 100
+#define GEN4_GS_STATE_VertexURBEntryReadOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+GS_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 100;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 100;
+ } else {
+ return 100;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* HS_INVOCATION_COUNT */
+
+
+#define GEN10_HS_INVOCATION_COUNT_length 2
+#define GEN9_HS_INVOCATION_COUNT_length 2
+#define GEN8_HS_INVOCATION_COUNT_length 2
+#define GEN75_HS_INVOCATION_COUNT_length 2
+#define GEN7_HS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+HS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* HS_INVOCATION_COUNT::HS Invocation Count Report */
+
+
+#define GEN10_HS_INVOCATION_COUNT_HSInvocationCountReport_bits 64
+#define GEN9_HS_INVOCATION_COUNT_HSInvocationCountReport_bits 64
+#define GEN8_HS_INVOCATION_COUNT_HSInvocationCountReport_bits 64
+#define GEN75_HS_INVOCATION_COUNT_HSInvocationCountReport_bits 64
+#define GEN7_HS_INVOCATION_COUNT_HSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+HS_INVOCATION_COUNT_HSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_HS_INVOCATION_COUNT_HSInvocationCountReport_start 0
+#define GEN9_HS_INVOCATION_COUNT_HSInvocationCountReport_start 0
+#define GEN8_HS_INVOCATION_COUNT_HSInvocationCountReport_start 0
+#define GEN75_HS_INVOCATION_COUNT_HSInvocationCountReport_start 0
+#define GEN7_HS_INVOCATION_COUNT_HSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+HS_INVOCATION_COUNT_HSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* IA_PRIMITIVES_COUNT */
+
+
+#define GEN10_IA_PRIMITIVES_COUNT_length 2
+#define GEN9_IA_PRIMITIVES_COUNT_length 2
+#define GEN8_IA_PRIMITIVES_COUNT_length 2
+#define GEN75_IA_PRIMITIVES_COUNT_length 2
+#define GEN7_IA_PRIMITIVES_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_PRIMITIVES_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* IA_PRIMITIVES_COUNT::IA Primitives Count Report */
+
+
+#define GEN10_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits 64
+#define GEN9_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits 64
+#define GEN8_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits 64
+#define GEN75_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits 64
+#define GEN7_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start 0
+#define GEN9_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start 0
+#define GEN8_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start 0
+#define GEN75_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start 0
+#define GEN7_IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_PRIMITIVES_COUNT_IAPrimitivesCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* IA_VERTICES_COUNT */
+
+
+#define GEN10_IA_VERTICES_COUNT_length 2
+#define GEN9_IA_VERTICES_COUNT_length 2
+#define GEN8_IA_VERTICES_COUNT_length 2
+#define GEN75_IA_VERTICES_COUNT_length 2
+#define GEN7_IA_VERTICES_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_VERTICES_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* IA_VERTICES_COUNT::IA Vertices Count Report */
+
+
+#define GEN10_IA_VERTICES_COUNT_IAVerticesCountReport_bits 64
+#define GEN9_IA_VERTICES_COUNT_IAVerticesCountReport_bits 64
+#define GEN8_IA_VERTICES_COUNT_IAVerticesCountReport_bits 64
+#define GEN75_IA_VERTICES_COUNT_IAVerticesCountReport_bits 64
+#define GEN7_IA_VERTICES_COUNT_IAVerticesCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_VERTICES_COUNT_IAVerticesCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_IA_VERTICES_COUNT_IAVerticesCountReport_start 0
+#define GEN9_IA_VERTICES_COUNT_IAVerticesCountReport_start 0
+#define GEN8_IA_VERTICES_COUNT_IAVerticesCountReport_start 0
+#define GEN75_IA_VERTICES_COUNT_IAVerticesCountReport_start 0
+#define GEN7_IA_VERTICES_COUNT_IAVerticesCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+IA_VERTICES_COUNT_IAVerticesCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1 */
+
+
+#define GEN10_INSTDONE_1_length 1
+#define GEN9_INSTDONE_1_length 1
+#define GEN8_INSTDONE_1_length 1
+#define GEN75_INSTDONE_1_length 1
+#define GEN7_INSTDONE_1_length 1
+#define GEN6_INSTDONE_1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::AVS Done */
+
+
+#define GEN6_INSTDONE_1_AVSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_AVSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_AVSDone_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_AVSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::CL Done */
+
+
+#define GEN10_INSTDONE_1_CLDone_bits 1
+#define GEN9_INSTDONE_1_CLDone_bits 1
+#define GEN8_INSTDONE_1_CLDone_bits 1
+#define GEN75_INSTDONE_1_CLDone_bits 1
+#define GEN7_INSTDONE_1_CLDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_CLDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_CLDone_start 8
+#define GEN9_INSTDONE_1_CLDone_start 8
+#define GEN8_INSTDONE_1_CLDone_start 8
+#define GEN75_INSTDONE_1_CLDone_start 8
+#define GEN7_INSTDONE_1_CLDone_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_CLDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::CS Done */
+
+
+#define GEN10_INSTDONE_1_CSDone_bits 1
+#define GEN9_INSTDONE_1_CSDone_bits 1
+#define GEN8_INSTDONE_1_CSDone_bits 1
+#define GEN75_INSTDONE_1_CSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_CSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_CSDone_start 21
+#define GEN9_INSTDONE_1_CSDone_start 21
+#define GEN8_INSTDONE_1_CSDone_start 21
+#define GEN75_INSTDONE_1_CSDone_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_CSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::DS Done */
+
+
+#define GEN10_INSTDONE_1_DSDone_bits 1
+#define GEN9_INSTDONE_1_DSDone_bits 1
+#define GEN8_INSTDONE_1_DSDone_bits 1
+#define GEN75_INSTDONE_1_DSDone_bits 1
+#define GEN7_INSTDONE_1_DSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_DSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_DSDone_start 5
+#define GEN9_INSTDONE_1_DSDone_start 5
+#define GEN8_INSTDONE_1_DSDone_start 5
+#define GEN75_INSTDONE_1_DSDone_start 5
+#define GEN7_INSTDONE_1_DSDone_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_DSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU00 Done */
+
+
+#define GEN6_INSTDONE_1_EU00Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU00Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU00Done_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU00Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU01 Done */
+
+
+#define GEN6_INSTDONE_1_EU01Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU01Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU01Done_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU01Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU02 Done */
+
+
+#define GEN6_INSTDONE_1_EU02Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU02Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU02Done_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU02Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 18;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU10 Done */
+
+
+#define GEN6_INSTDONE_1_EU10Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU10Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU10Done_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU10Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU11 Done */
+
+
+#define GEN6_INSTDONE_1_EU11Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU11Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU11Done_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU11Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 21;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU12 Done */
+
+
+#define GEN6_INSTDONE_1_EU12Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU12Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU12Done_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU12Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU20 Done */
+
+
+#define GEN6_INSTDONE_1_EU20Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU20Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU20Done_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU20Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU21 Done */
+
+
+#define GEN6_INSTDONE_1_EU21Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU21Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU21Done_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU21Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 25;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU22 Done */
+
+
+#define GEN6_INSTDONE_1_EU22Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU22Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU22Done_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU22Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU30 Done */
+
+
+#define GEN6_INSTDONE_1_EU30Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU30Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU30Done_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU30Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 28;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU31 Done */
+
+
+#define GEN6_INSTDONE_1_EU31Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU31Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU31Done_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU31Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::EU32 Done */
+
+
+#define GEN6_INSTDONE_1_EU32Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU32Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_EU32Done_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_EU32Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 30;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::GAFM Done */
+
+
+#define GEN10_INSTDONE_1_GAFMDone_bits 1
+#define GEN9_INSTDONE_1_GAFMDone_bits 1
+#define GEN8_INSTDONE_1_GAFMDone_bits 1
+#define GEN75_INSTDONE_1_GAFMDone_bits 1
+#define GEN7_INSTDONE_1_GAFMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAFMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_GAFMDone_start 18
+#define GEN9_INSTDONE_1_GAFMDone_start 18
+#define GEN8_INSTDONE_1_GAFMDone_start 18
+#define GEN75_INSTDONE_1_GAFMDone_start 18
+#define GEN7_INSTDONE_1_GAFMDone_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAFMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::GAFS Done */
+
+
+#define GEN10_INSTDONE_1_GAFSDone_bits 1
+#define GEN9_INSTDONE_1_GAFSDone_bits 1
+#define GEN8_INSTDONE_1_GAFSDone_bits 1
+#define GEN75_INSTDONE_1_GAFSDone_bits 1
+#define GEN7_INSTDONE_1_GAFSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAFSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_GAFSDone_start 15
+#define GEN9_INSTDONE_1_GAFSDone_start 15
+#define GEN8_INSTDONE_1_GAFSDone_start 15
+#define GEN75_INSTDONE_1_GAFSDone_start 15
+#define GEN7_INSTDONE_1_GAFSDone_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAFSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::GAM Done */
+
+
+#define GEN10_INSTDONE_1_GAMDone_bits 1
+#define GEN9_INSTDONE_1_GAMDone_bits 1
+#define GEN8_INSTDONE_1_GAMDone_bits 1
+#define GEN75_INSTDONE_1_GAMDone_bits 1
+#define GEN7_INSTDONE_1_GAMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_GAMDone_start 19
+#define GEN9_INSTDONE_1_GAMDone_start 19
+#define GEN8_INSTDONE_1_GAMDone_start 19
+#define GEN75_INSTDONE_1_GAMDone_start 19
+#define GEN7_INSTDONE_1_GAMDone_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GAMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 19;
+ } else {
+ return 19;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::GS Done */
+
+
+#define GEN10_INSTDONE_1_GSDone_bits 1
+#define GEN9_INSTDONE_1_GSDone_bits 1
+#define GEN8_INSTDONE_1_GSDone_bits 1
+#define GEN75_INSTDONE_1_GSDone_bits 1
+#define GEN7_INSTDONE_1_GSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_GSDone_start 6
+#define GEN9_INSTDONE_1_GSDone_start 6
+#define GEN8_INSTDONE_1_GSDone_start 6
+#define GEN75_INSTDONE_1_GSDone_start 6
+#define GEN7_INSTDONE_1_GSDone_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::GW Done */
+
+
+#define GEN6_INSTDONE_1_GWDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GWDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_GWDone_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_GWDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::HIZ Done */
+
+
+#define GEN6_INSTDONE_1_HIZDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_HIZDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_HIZDone_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_HIZDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::HS Done */
+
+
+#define GEN10_INSTDONE_1_HSDone_bits 1
+#define GEN9_INSTDONE_1_HSDone_bits 1
+#define GEN8_INSTDONE_1_HSDone_bits 1
+#define GEN75_INSTDONE_1_HSDone_bits 1
+#define GEN7_INSTDONE_1_HSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_HSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_HSDone_start 3
+#define GEN9_INSTDONE_1_HSDone_start 3
+#define GEN8_INSTDONE_1_HSDone_start 3
+#define GEN75_INSTDONE_1_HSDone_start 3
+#define GEN7_INSTDONE_1_HSDone_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_HSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::IC0 Done */
+
+
+#define GEN6_INSTDONE_1_IC0Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC0Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_IC0Done_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC0Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::IC1 Done */
+
+
+#define GEN6_INSTDONE_1_IC1Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC1Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_IC1Done_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC1Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::IC2 Done */
+
+
+#define GEN6_INSTDONE_1_IC2Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC2Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_IC2Done_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC2Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::IC3 Done */
+
+
+#define GEN6_INSTDONE_1_IC3Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC3Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_IC3Done_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IC3Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::IEF Done */
+
+
+#define GEN6_INSTDONE_1_IEFDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IEFDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_IEFDone_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_IEFDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::ISC1/0 Done */
+
+
+#define GEN6_INSTDONE_1_ISC10Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_ISC10Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_ISC10Done_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_ISC10Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::ISC2/3 Done */
+
+
+#define GEN6_INSTDONE_1_ISC23Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_ISC23Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_ISC23Done_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_ISC23Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::MA0 Done */
+
+
+#define GEN6_INSTDONE_1_MA0Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA0Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_MA0Done_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA0Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 19;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::MA1 Done */
+
+
+#define GEN6_INSTDONE_1_MA1Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA1Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_MA1Done_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA1Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::MA2 Done */
+
+
+#define GEN6_INSTDONE_1_MA2Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA2Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_MA2Done_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA2Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::MA3 Done */
+
+
+#define GEN6_INSTDONE_1_MA3Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA3Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_MA3Done_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_MA3Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 31;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::PRB0 Ring Enable */
+
+
+#define GEN10_INSTDONE_1_PRB0RingEnable_bits 1
+#define GEN9_INSTDONE_1_PRB0RingEnable_bits 1
+#define GEN8_INSTDONE_1_PRB0RingEnable_bits 1
+#define GEN75_INSTDONE_1_PRB0RingEnable_bits 1
+#define GEN7_INSTDONE_1_PRB0RingEnable_bits 1
+#define GEN6_INSTDONE_1_PRB0RingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_PRB0RingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_PRB0RingEnable_start 0
+#define GEN9_INSTDONE_1_PRB0RingEnable_start 0
+#define GEN8_INSTDONE_1_PRB0RingEnable_start 0
+#define GEN75_INSTDONE_1_PRB0RingEnable_start 0
+#define GEN7_INSTDONE_1_PRB0RingEnable_start 0
+#define GEN6_INSTDONE_1_PRB0RingEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_PRB0RingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::RCCFBC CS Done */
+
+
+#define GEN10_INSTDONE_1_RCCFBCCSDone_bits 1
+#define GEN9_INSTDONE_1_RCCFBCCSDone_bits 1
+#define GEN8_INSTDONE_1_RCCFBCCSDone_bits 1
+#define GEN75_INSTDONE_1_RCCFBCCSDone_bits 1
+#define GEN7_INSTDONE_1_RCCFBCCSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_RCCFBCCSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_RCCFBCCSDone_start 23
+#define GEN9_INSTDONE_1_RCCFBCCSDone_start 23
+#define GEN8_INSTDONE_1_RCCFBCCSDone_start 23
+#define GEN75_INSTDONE_1_RCCFBCCSDone_start 23
+#define GEN7_INSTDONE_1_RCCFBCCSDone_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_RCCFBCCSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::RS Done */
+
+
+#define GEN10_INSTDONE_1_RSDone_bits 1
+#define GEN9_INSTDONE_1_RSDone_bits 1
+#define GEN8_INSTDONE_1_RSDone_bits 1
+#define GEN75_INSTDONE_1_RSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_RSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_RSDone_start 20
+#define GEN9_INSTDONE_1_RSDone_start 20
+#define GEN8_INSTDONE_1_RSDone_start 20
+#define GEN75_INSTDONE_1_RSDone_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_RSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::SDE Done */
+
+
+#define GEN10_INSTDONE_1_SDEDone_bits 1
+#define GEN9_INSTDONE_1_SDEDone_bits 1
+#define GEN8_INSTDONE_1_SDEDone_bits 1
+#define GEN75_INSTDONE_1_SDEDone_bits 1
+#define GEN7_INSTDONE_1_SDEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SDEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_SDEDone_start 22
+#define GEN9_INSTDONE_1_SDEDone_start 22
+#define GEN8_INSTDONE_1_SDEDone_start 22
+#define GEN75_INSTDONE_1_SDEDone_start 22
+#define GEN7_INSTDONE_1_SDEDone_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SDEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::SF Done */
+
+
+#define GEN10_INSTDONE_1_SFDone_bits 1
+#define GEN9_INSTDONE_1_SFDone_bits 1
+#define GEN8_INSTDONE_1_SFDone_bits 1
+#define GEN75_INSTDONE_1_SFDone_bits 1
+#define GEN7_INSTDONE_1_SFDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SFDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_SFDone_start 9
+#define GEN9_INSTDONE_1_SFDone_start 9
+#define GEN8_INSTDONE_1_SFDone_start 9
+#define GEN75_INSTDONE_1_SFDone_start 9
+#define GEN7_INSTDONE_1_SFDone_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SFDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::SOL Done */
+
+
+#define GEN10_INSTDONE_1_SOLDone_bits 1
+#define GEN9_INSTDONE_1_SOLDone_bits 1
+#define GEN8_INSTDONE_1_SOLDone_bits 1
+#define GEN75_INSTDONE_1_SOLDone_bits 1
+#define GEN7_INSTDONE_1_SOLDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SOLDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_SOLDone_start 7
+#define GEN9_INSTDONE_1_SOLDone_start 7
+#define GEN8_INSTDONE_1_SOLDone_start 7
+#define GEN75_INSTDONE_1_SOLDone_start 7
+#define GEN7_INSTDONE_1_SOLDone_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SOLDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::SVG Done */
+
+
+#define GEN10_INSTDONE_1_SVGDone_bits 1
+#define GEN9_INSTDONE_1_SVGDone_bits 1
+#define GEN8_INSTDONE_1_SVGDone_bits 1
+#define GEN75_INSTDONE_1_SVGDone_bits 1
+#define GEN7_INSTDONE_1_SVGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SVGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_SVGDone_start 14
+#define GEN9_INSTDONE_1_SVGDone_start 14
+#define GEN8_INSTDONE_1_SVGDone_start 14
+#define GEN75_INSTDONE_1_SVGDone_start 14
+#define GEN7_INSTDONE_1_SVGDone_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_SVGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::TD Done */
+
+
+#define GEN6_INSTDONE_1_TDDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TDDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_TDDone_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TDDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::TDG Done */
+
+
+#define GEN10_INSTDONE_1_TDGDone_bits 1
+#define GEN9_INSTDONE_1_TDGDone_bits 1
+#define GEN8_INSTDONE_1_TDGDone_bits 1
+#define GEN75_INSTDONE_1_TDGDone_bits 1
+#define GEN7_INSTDONE_1_TDGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TDGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_TDGDone_start 12
+#define GEN9_INSTDONE_1_TDGDone_start 12
+#define GEN8_INSTDONE_1_TDGDone_start 12
+#define GEN75_INSTDONE_1_TDGDone_start 12
+#define GEN7_INSTDONE_1_TDGDone_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TDGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::TE Done */
+
+
+#define GEN10_INSTDONE_1_TEDone_bits 1
+#define GEN9_INSTDONE_1_TEDone_bits 1
+#define GEN8_INSTDONE_1_TEDone_bits 1
+#define GEN75_INSTDONE_1_TEDone_bits 1
+#define GEN7_INSTDONE_1_TEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_TEDone_start 4
+#define GEN9_INSTDONE_1_TEDone_start 4
+#define GEN8_INSTDONE_1_TEDone_start 4
+#define GEN75_INSTDONE_1_TEDone_start 4
+#define GEN7_INSTDONE_1_TEDone_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::TS Done */
+
+
+#define GEN6_INSTDONE_1_TSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_TSDone_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::TSG Done */
+
+
+#define GEN10_INSTDONE_1_TSGDone_bits 1
+#define GEN9_INSTDONE_1_TSGDone_bits 1
+#define GEN8_INSTDONE_1_TSGDone_bits 1
+#define GEN75_INSTDONE_1_TSGDone_bits 1
+#define GEN7_INSTDONE_1_TSGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TSGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_TSGDone_start 17
+#define GEN9_INSTDONE_1_TSGDone_start 17
+#define GEN8_INSTDONE_1_TSGDone_start 17
+#define GEN75_INSTDONE_1_TSGDone_start 17
+#define GEN7_INSTDONE_1_TSGDone_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_TSGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::URBM Done */
+
+
+#define GEN10_INSTDONE_1_URBMDone_bits 1
+#define GEN9_INSTDONE_1_URBMDone_bits 1
+#define GEN8_INSTDONE_1_URBMDone_bits 1
+#define GEN75_INSTDONE_1_URBMDone_bits 1
+#define GEN7_INSTDONE_1_URBMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_URBMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_URBMDone_start 13
+#define GEN9_INSTDONE_1_URBMDone_start 13
+#define GEN8_INSTDONE_1_URBMDone_start 13
+#define GEN75_INSTDONE_1_URBMDone_start 13
+#define GEN7_INSTDONE_1_URBMDone_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_URBMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::VFE Done */
+
+
+#define GEN10_INSTDONE_1_VFEDone_bits 1
+#define GEN9_INSTDONE_1_VFEDone_bits 1
+#define GEN8_INSTDONE_1_VFEDone_bits 1
+#define GEN75_INSTDONE_1_VFEDone_bits 1
+#define GEN7_INSTDONE_1_VFEDone_bits 1
+#define GEN6_INSTDONE_1_VFEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VFEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_VFEDone_start 16
+#define GEN9_INSTDONE_1_VFEDone_start 16
+#define GEN8_INSTDONE_1_VFEDone_start 16
+#define GEN75_INSTDONE_1_VFEDone_start 16
+#define GEN7_INSTDONE_1_VFEDone_start 16
+#define GEN6_INSTDONE_1_VFEDone_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VFEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::VFG Done */
+
+
+#define GEN10_INSTDONE_1_VFGDone_bits 1
+#define GEN9_INSTDONE_1_VFGDone_bits 1
+#define GEN8_INSTDONE_1_VFGDone_bits 1
+#define GEN75_INSTDONE_1_VFGDone_bits 1
+#define GEN7_INSTDONE_1_VFGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VFGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_VFGDone_start 1
+#define GEN9_INSTDONE_1_VFGDone_start 1
+#define GEN8_INSTDONE_1_VFGDone_start 1
+#define GEN75_INSTDONE_1_VFGDone_start 1
+#define GEN7_INSTDONE_1_VFGDone_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VFGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::VS Done */
+
+
+#define GEN10_INSTDONE_1_VSDone_bits 1
+#define GEN9_INSTDONE_1_VSDone_bits 1
+#define GEN8_INSTDONE_1_VSDone_bits 1
+#define GEN75_INSTDONE_1_VSDone_bits 1
+#define GEN7_INSTDONE_1_VSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INSTDONE_1_VSDone_start 2
+#define GEN9_INSTDONE_1_VSDone_start 2
+#define GEN8_INSTDONE_1_VSDone_start 2
+#define GEN75_INSTDONE_1_VSDone_start 2
+#define GEN7_INSTDONE_1_VSDone_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_1::VSC Done */
+
+
+#define GEN6_INSTDONE_1_VSCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VSCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_1_VSCDone_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_1_VSCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2 */
+
+
+#define GEN6_INSTDONE_2_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::CL Done */
+
+
+#define GEN6_INSTDONE_2_CLDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_CLDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_CLDone_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_CLDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::CS Done */
+
+
+#define GEN6_INSTDONE_2_CSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_CSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_CSDone_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_CSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 30;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::DAP Done */
+
+
+#define GEN6_INSTDONE_2_DAPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DAPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_DAPDone_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DAPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 19;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::DG Done */
+
+
+#define GEN6_INSTDONE_2_DGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_DGDone_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::DM Done */
+
+
+#define GEN6_INSTDONE_2_DMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_DMDone_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_DMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::FL Done */
+
+
+#define GEN6_INSTDONE_2_FLDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_FLDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_FLDone_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_FLDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::FT Done */
+
+
+#define GEN6_INSTDONE_2_FTDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_FTDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_FTDone_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_FTDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::GAM Done */
+
+
+#define GEN6_INSTDONE_2_GAMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_GAMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_GAMDone_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_GAMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 31;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::GS Done */
+
+
+#define GEN6_INSTDONE_2_GSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_GSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_GSDone_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_GSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::ISC Done */
+
+
+#define GEN6_INSTDONE_2_ISCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_ISCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_ISCDone_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_ISCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 25;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::IZ Done */
+
+
+#define GEN6_INSTDONE_2_IZDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_IZDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_IZDone_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_IZDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::MT Done */
+
+
+#define GEN6_INSTDONE_2_MTDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_MTDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_MTDone_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_MTDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::PL Done */
+
+
+#define GEN6_INSTDONE_2_PLDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_PLDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_PLDone_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_PLDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::PSD Done */
+
+
+#define GEN6_INSTDONE_2_PSDDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_PSDDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_PSDDone_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_PSDDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 18;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::QC Done */
+
+
+#define GEN6_INSTDONE_2_QCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_QCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_QCDone_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_QCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::RCC Done */
+
+
+#define GEN6_INSTDONE_2_RCCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_RCCDone_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::RCPBE Done */
+
+
+#define GEN6_INSTDONE_2_RCPBEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCPBEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_RCPBEDone_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCPBEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::RCPFE Done */
+
+
+#define GEN6_INSTDONE_2_RCPFEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCPFEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_RCPFEDone_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCPFEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::RCZ Done */
+
+
+#define GEN6_INSTDONE_2_RCZDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCZDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_RCZDone_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_RCZDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SC Done */
+
+
+#define GEN6_INSTDONE_2_SCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SCDone_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SF Done */
+
+
+#define GEN6_INSTDONE_2_SFDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SFDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SFDone_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SFDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SI Done */
+
+
+#define GEN6_INSTDONE_2_SIDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SIDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SIDone_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SIDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SO Done */
+
+
+#define GEN6_INSTDONE_2_SODone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SODone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SODone_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SODone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SVG Done */
+
+
+#define GEN6_INSTDONE_2_SVGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SVGDone_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SVRW Done */
+
+
+#define GEN6_INSTDONE_2_SVRWDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVRWDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SVRWDone_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVRWDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 28;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::SVSM Done */
+
+
+#define GEN6_INSTDONE_2_SVSMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVSMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_SVSMDone_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_SVSMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::VDI Done */
+
+
+#define GEN6_INSTDONE_2_VDIDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VDIDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_VDIDone_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VDIDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 21;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::VF Done */
+
+
+#define GEN6_INSTDONE_2_VFDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VFDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_VFDone_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VFDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::VME Done */
+
+
+#define GEN6_INSTDONE_2_VMEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VMEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_VMEDone_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VMEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::VS0 Done */
+
+
+#define GEN6_INSTDONE_2_VS0Done_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VS0Done_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_VS0Done_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_VS0Done_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::WMBE Done */
+
+
+#define GEN6_INSTDONE_2_WMBEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_WMBEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_WMBEDone_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_WMBEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INSTDONE_2::WMFE Done */
+
+
+#define GEN6_INSTDONE_2_WMFEDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_WMFEDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INSTDONE_2_WMFEDone_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+INSTDONE_2_WMFEDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_length 8
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_length 8
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_length 8
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_length 8
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_length 8
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Barrier Enable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start 213
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start 213
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start 213
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start 181
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start 181
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 213;
+ case 9: return 213;
+ case 8: return 213;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 181;
+ } else {
+ return 181;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Barrier ID */
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierID_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierID_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Barrier Return Byte */
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierReturnByte_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 168;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Barrier Return GRF Offset */
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BarrierReturnGRFOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 184;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Binding Table Entry Count */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 128
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 128
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 128
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 96
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 96
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Binding Table Pointer */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 11
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 11
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 11
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 11
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 11
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 133
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 133
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 133
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 101
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 101
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start 101
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_BindingTablePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 133;
+ case 9: return 133;
+ case 8: return 133;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 101;
+ } else {
+ return 101;
+ }
+ case 6: return 101;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Constant URB Entry Read Length */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 176
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 176
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 176
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 144
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 144
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 176;
+ case 9: return 176;
+ case 8: return 176;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 144;
+ } else {
+ return 144;
+ }
+ case 6: return 144;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Constant URB Entry Read Offset */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits 16
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits 16
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits 16
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits 16
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start 160
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start 160
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start 160
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start 128
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Cross-Thread Constant Data Read Length */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits 8
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits 8
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits 8
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start 224
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start 224
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start 224
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_CrossThreadConstantDataReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Denorm Mode */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_DenormMode_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_DenormMode_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_DenormMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_DenormMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_DenormMode_start 83
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_DenormMode_start 83
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_DenormMode_start 83
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_DenormMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 83;
+ case 9: return 83;
+ case 8: return 83;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Floating Point Mode */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 80
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 80
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 80
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 48
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 48
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Global Barrier Enable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_start 207
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_start 207
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_GlobalBarrierEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 207;
+ case 9: return 207;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Illegal Opcode Exception Enable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 77
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 77
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 77
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 45
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 45
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 77;
+ case 9: return 77;
+ case 8: return 77;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 45;
+ } else {
+ return 45;
+ }
+ case 6: return 45;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Kernel Start Pointer */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 42
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 42
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 42
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 26
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 26
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Mask Stack Exception Enable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 75
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 75
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 75
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 43
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 43
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 75;
+ case 9: return 75;
+ case 8: return 75;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 43;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Number of Threads in GPGPU Thread Group */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits 10
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits 10
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits 10
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits 8
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start 192
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start 192
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start 192
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start 160
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_NumberofThreadsinGPGPUThreadGroup_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Rounding Mode */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits 2
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits 2
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits 2
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits 2
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_RoundingMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_RoundingMode_start 214
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_RoundingMode_start 214
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_RoundingMode_start 214
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_RoundingMode_start 182
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_RoundingMode_start 182
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_RoundingMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 214;
+ case 9: return 214;
+ case 8: return 214;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 182;
+ } else {
+ return 182;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Sampler Count */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 98
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 98
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 98
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 66
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 66
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SamplerCount_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 98;
+ case 9: return 98;
+ case 8: return 98;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 66;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Sampler State Pointer */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 101
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 101
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 101
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 69
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 69
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SamplerStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 101;
+ case 9: return 101;
+ case 8: return 101;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 69;
+ } else {
+ return 69;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Shared Local Memory Size */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits 5
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits 5
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits 5
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits 5
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start 208
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start 208
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start 208
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start 176
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SharedLocalMemorySize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Single Program Flow */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 82
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 82
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 82
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 50
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 50
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 82;
+ case 9: return 82;
+ case 8: return 82;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 50;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Software Exception Enable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 71
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 71
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 71
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 39
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 39
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 71;
+ case 9: return 71;
+ case 8: return 71;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 39;
+ }
+ case 6: return 39;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Thread Preemption disable */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ThreadPreemptiondisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 84;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* INTERFACE_DESCRIPTOR_DATA::Thread Priority */
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 81
+#define GEN9_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 81
+#define GEN8_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 81
+#define GEN75_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 49
+#define GEN7_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 49
+#define GEN6_INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+INTERFACE_DESCRIPTOR_DATA_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 81;
+ case 9: return 81;
+ case 8: return 81;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 49;
+ } else {
+ return 49;
+ }
+ case 6: return 49;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG */
+
+
+#define GEN10_L3CNTLREG_length 1
+#define GEN9_L3CNTLREG_length 1
+#define GEN8_L3CNTLREG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG::All Allocation */
+
+
+#define GEN10_L3CNTLREG_AllAllocation_bits 7
+#define GEN9_L3CNTLREG_AllAllocation_bits 7
+#define GEN8_L3CNTLREG_AllAllocation_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_AllAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_L3CNTLREG_AllAllocation_start 25
+#define GEN9_L3CNTLREG_AllAllocation_start 25
+#define GEN8_L3CNTLREG_AllAllocation_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_AllAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 25;
+ case 9: return 25;
+ case 8: return 25;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG::DC Allocation */
+
+
+#define GEN10_L3CNTLREG_DCAllocation_bits 7
+#define GEN9_L3CNTLREG_DCAllocation_bits 7
+#define GEN8_L3CNTLREG_DCAllocation_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_DCAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_L3CNTLREG_DCAllocation_start 18
+#define GEN9_L3CNTLREG_DCAllocation_start 18
+#define GEN8_L3CNTLREG_DCAllocation_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_DCAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG::RO Allocation */
+
+
+#define GEN10_L3CNTLREG_ROAllocation_bits 7
+#define GEN9_L3CNTLREG_ROAllocation_bits 7
+#define GEN8_L3CNTLREG_ROAllocation_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_ROAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_L3CNTLREG_ROAllocation_start 11
+#define GEN9_L3CNTLREG_ROAllocation_start 11
+#define GEN8_L3CNTLREG_ROAllocation_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_ROAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG::SLM Enable */
+
+
+#define GEN10_L3CNTLREG_SLMEnable_bits 1
+#define GEN9_L3CNTLREG_SLMEnable_bits 1
+#define GEN8_L3CNTLREG_SLMEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_SLMEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_L3CNTLREG_SLMEnable_start 0
+#define GEN9_L3CNTLREG_SLMEnable_start 0
+#define GEN8_L3CNTLREG_SLMEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_SLMEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG::URB Allocation */
+
+
+#define GEN10_L3CNTLREG_URBAllocation_bits 7
+#define GEN9_L3CNTLREG_URBAllocation_bits 7
+#define GEN8_L3CNTLREG_URBAllocation_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_URBAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_L3CNTLREG_URBAllocation_start 1
+#define GEN9_L3CNTLREG_URBAllocation_start 1
+#define GEN8_L3CNTLREG_URBAllocation_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG_URBAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2 */
+
+
+#define GEN75_L3CNTLREG2_length 1
+#define GEN7_L3CNTLREG2_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::ALL Allocation */
+
+
+#define GEN7_L3CNTLREG2_ALLAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ALLAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_L3CNTLREG2_ALLAllocation_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ALLAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::DC Allocation */
+
+
+#define GEN75_L3CNTLREG2_DCAllocation_bits 6
+#define GEN7_L3CNTLREG2_DCAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_DCAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_DCAllocation_start 21
+#define GEN7_L3CNTLREG2_DCAllocation_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_DCAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::DC Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG2_DCLowBandwidth_bits 1
+#define GEN7_L3CNTLREG2_DCLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_DCLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_DCLowBandwidth_start 27
+#define GEN7_L3CNTLREG2_DCLowBandwidth_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_DCLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::RO Allocation */
+
+
+#define GEN75_L3CNTLREG2_ROAllocation_bits 6
+#define GEN7_L3CNTLREG2_ROAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ROAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_ROAllocation_start 14
+#define GEN7_L3CNTLREG2_ROAllocation_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ROAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::RO Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG2_ROLowBandwidth_bits 1
+#define GEN7_L3CNTLREG2_ROLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ROLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_ROLowBandwidth_start 20
+#define GEN7_L3CNTLREG2_ROLowBandwidth_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_ROLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::SLM Enable */
+
+
+#define GEN75_L3CNTLREG2_SLMEnable_bits 1
+#define GEN7_L3CNTLREG2_SLMEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_SLMEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_SLMEnable_start 0
+#define GEN7_L3CNTLREG2_SLMEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_SLMEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::URB Allocation */
+
+
+#define GEN75_L3CNTLREG2_URBAllocation_bits 6
+#define GEN7_L3CNTLREG2_URBAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_URBAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_URBAllocation_start 1
+#define GEN7_L3CNTLREG2_URBAllocation_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_URBAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG2::URB Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG2_URBLowBandwidth_bits 1
+#define GEN7_L3CNTLREG2_URBLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_URBLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG2_URBLowBandwidth_start 7
+#define GEN7_L3CNTLREG2_URBLowBandwidth_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG2_URBLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3 */
+
+
+#define GEN75_L3CNTLREG3_length 1
+#define GEN7_L3CNTLREG3_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::C Allocation */
+
+
+#define GEN75_L3CNTLREG3_CAllocation_bits 6
+#define GEN7_L3CNTLREG3_CAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_CAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_CAllocation_start 8
+#define GEN7_L3CNTLREG3_CAllocation_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_CAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::C Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG3_CLowBandwidth_bits 1
+#define GEN7_L3CNTLREG3_CLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_CLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_CLowBandwidth_start 14
+#define GEN7_L3CNTLREG3_CLowBandwidth_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_CLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::IS Allocation */
+
+
+#define GEN75_L3CNTLREG3_ISAllocation_bits 6
+#define GEN7_L3CNTLREG3_ISAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_ISAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_ISAllocation_start 1
+#define GEN7_L3CNTLREG3_ISAllocation_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_ISAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::IS Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG3_ISLowBandwidth_bits 1
+#define GEN7_L3CNTLREG3_ISLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_ISLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_ISLowBandwidth_start 7
+#define GEN7_L3CNTLREG3_ISLowBandwidth_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_ISLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::T Allocation */
+
+
+#define GEN75_L3CNTLREG3_TAllocation_bits 6
+#define GEN7_L3CNTLREG3_TAllocation_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_TAllocation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_TAllocation_start 15
+#define GEN7_L3CNTLREG3_TAllocation_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_TAllocation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3CNTLREG3::T Low Bandwidth */
+
+
+#define GEN75_L3CNTLREG3_TLowBandwidth_bits 1
+#define GEN7_L3CNTLREG3_TLowBandwidth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_TLowBandwidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3CNTLREG3_TLowBandwidth_start 21
+#define GEN7_L3CNTLREG3_TLowBandwidth_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+L3CNTLREG3_TLowBandwidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3SQCREG1 */
+
+
+#define GEN75_L3SQCREG1_length 1
+#define GEN7_L3SQCREG1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3SQCREG1::Convert C_UC */
+
+
+#define GEN75_L3SQCREG1_ConvertC_UC_bits 1
+#define GEN7_L3SQCREG1_ConvertC_UC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertC_UC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3SQCREG1_ConvertC_UC_start 26
+#define GEN7_L3SQCREG1_ConvertC_UC_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertC_UC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3SQCREG1::Convert DC_UC */
+
+
+#define GEN75_L3SQCREG1_ConvertDC_UC_bits 1
+#define GEN7_L3SQCREG1_ConvertDC_UC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertDC_UC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3SQCREG1_ConvertDC_UC_start 24
+#define GEN7_L3SQCREG1_ConvertDC_UC_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertDC_UC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3SQCREG1::Convert IS_UC */
+
+
+#define GEN75_L3SQCREG1_ConvertIS_UC_bits 1
+#define GEN7_L3SQCREG1_ConvertIS_UC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertIS_UC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3SQCREG1_ConvertIS_UC_start 25
+#define GEN7_L3SQCREG1_ConvertIS_UC_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertIS_UC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 25;
+ } else {
+ return 25;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* L3SQCREG1::Convert T_UC */
+
+
+#define GEN75_L3SQCREG1_ConvertT_UC_bits 1
+#define GEN7_L3SQCREG1_ConvertT_UC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertT_UC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_L3SQCREG1_ConvertT_UC_start 27
+#define GEN7_L3SQCREG1_ConvertT_UC_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+L3SQCREG1_ConvertT_UC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_length 4
+#define GEN9_MEDIA_CURBE_LOAD_length 4
+#define GEN8_MEDIA_CURBE_LOAD_length 4
+#define GEN75_MEDIA_CURBE_LOAD_length 4
+#define GEN7_MEDIA_CURBE_LOAD_length 4
+#define GEN6_MEDIA_CURBE_LOAD_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::CURBE Data Start Address */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+#define GEN9_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+#define GEN8_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+#define GEN75_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+#define GEN7_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+#define GEN6_MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CURBEDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+#define GEN9_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+#define GEN8_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+#define GEN75_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+#define GEN7_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+#define GEN6_MEDIA_CURBE_LOAD_CURBEDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CURBEDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::CURBE Total Data Length */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+#define GEN9_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+#define GEN8_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+#define GEN75_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+#define GEN7_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+#define GEN6_MEDIA_CURBE_LOAD_CURBETotalDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CURBETotalDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+#define GEN9_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+#define GEN8_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+#define GEN75_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+#define GEN7_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+#define GEN6_MEDIA_CURBE_LOAD_CURBETotalDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CURBETotalDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::Command Type */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CommandType_bits 3
+#define GEN9_MEDIA_CURBE_LOAD_CommandType_bits 3
+#define GEN8_MEDIA_CURBE_LOAD_CommandType_bits 3
+#define GEN75_MEDIA_CURBE_LOAD_CommandType_bits 3
+#define GEN7_MEDIA_CURBE_LOAD_CommandType_bits 3
+#define GEN6_MEDIA_CURBE_LOAD_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_CommandType_start 29
+#define GEN9_MEDIA_CURBE_LOAD_CommandType_start 29
+#define GEN8_MEDIA_CURBE_LOAD_CommandType_start 29
+#define GEN75_MEDIA_CURBE_LOAD_CommandType_start 29
+#define GEN7_MEDIA_CURBE_LOAD_CommandType_start 29
+#define GEN6_MEDIA_CURBE_LOAD_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::DWord Length */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_DWordLength_bits 16
+#define GEN9_MEDIA_CURBE_LOAD_DWordLength_bits 16
+#define GEN8_MEDIA_CURBE_LOAD_DWordLength_bits 16
+#define GEN75_MEDIA_CURBE_LOAD_DWordLength_bits 16
+#define GEN7_MEDIA_CURBE_LOAD_DWordLength_bits 16
+#define GEN6_MEDIA_CURBE_LOAD_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_DWordLength_start 0
+#define GEN9_MEDIA_CURBE_LOAD_DWordLength_start 0
+#define GEN8_MEDIA_CURBE_LOAD_DWordLength_start 0
+#define GEN75_MEDIA_CURBE_LOAD_DWordLength_start 0
+#define GEN7_MEDIA_CURBE_LOAD_DWordLength_start 0
+#define GEN6_MEDIA_CURBE_LOAD_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::Media Command Opcode */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_CURBE_LOAD_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_CURBE_LOAD_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::Pipeline */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_Pipeline_bits 2
+#define GEN9_MEDIA_CURBE_LOAD_Pipeline_bits 2
+#define GEN8_MEDIA_CURBE_LOAD_Pipeline_bits 2
+#define GEN75_MEDIA_CURBE_LOAD_Pipeline_bits 2
+#define GEN7_MEDIA_CURBE_LOAD_Pipeline_bits 2
+#define GEN6_MEDIA_CURBE_LOAD_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_Pipeline_start 27
+#define GEN9_MEDIA_CURBE_LOAD_Pipeline_start 27
+#define GEN8_MEDIA_CURBE_LOAD_Pipeline_start 27
+#define GEN75_MEDIA_CURBE_LOAD_Pipeline_start 27
+#define GEN7_MEDIA_CURBE_LOAD_Pipeline_start 27
+#define GEN6_MEDIA_CURBE_LOAD_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_CURBE_LOAD::SubOpcode */
+
+
+#define GEN10_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+#define GEN9_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+#define GEN8_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+#define GEN75_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+#define GEN7_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+#define GEN6_MEDIA_CURBE_LOAD_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_CURBE_LOAD_SubOpcode_start 16
+#define GEN9_MEDIA_CURBE_LOAD_SubOpcode_start 16
+#define GEN8_MEDIA_CURBE_LOAD_SubOpcode_start 16
+#define GEN75_MEDIA_CURBE_LOAD_SubOpcode_start 16
+#define GEN7_MEDIA_CURBE_LOAD_SubOpcode_start 16
+#define GEN6_MEDIA_CURBE_LOAD_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_CURBE_LOAD_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::Barrier.Byte */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierByte_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierByte_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierByte_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierByte_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::Barrier.ThreadCount */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierThreadCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierThreadCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierThreadCount_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierThreadCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::BarrierID */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierID_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_BarrierID_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_BarrierID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::Command Type */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::DWord Length */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::Media Command Opcode */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::Pipeline */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_GATEWAY_STATE::SubOpcode */
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_GATEWAY_STATE_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_GATEWAY_STATE_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::Command Type */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::DWord Length */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::Interface Descriptor Data Start Address */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::Interface Descriptor Total Length */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_InterfaceDescriptorTotalLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::Media Command Opcode */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::Pipeline */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_INTERFACE_DESCRIPTOR_LOAD::SubOpcode */
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+#define GEN9_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+#define GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+#define GEN75_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+#define GEN6_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_INTERFACE_DESCRIPTOR_LOAD_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT */
+
+
+
+
+
+/* MEDIA_OBJECT::Children Present */
+
+
+#define GEN10_MEDIA_OBJECT_ChildrenPresent_bits 1
+#define GEN9_MEDIA_OBJECT_ChildrenPresent_bits 1
+#define GEN8_MEDIA_OBJECT_ChildrenPresent_bits 1
+#define GEN75_MEDIA_OBJECT_ChildrenPresent_bits 1
+#define GEN7_MEDIA_OBJECT_ChildrenPresent_bits 1
+#define GEN6_MEDIA_OBJECT_ChildrenPresent_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ChildrenPresent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ChildrenPresent_start 95
+#define GEN9_MEDIA_OBJECT_ChildrenPresent_start 95
+#define GEN8_MEDIA_OBJECT_ChildrenPresent_start 95
+#define GEN75_MEDIA_OBJECT_ChildrenPresent_start 95
+#define GEN7_MEDIA_OBJECT_ChildrenPresent_start 95
+#define GEN6_MEDIA_OBJECT_ChildrenPresent_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ChildrenPresent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 95;
+ case 9: return 95;
+ case 8: return 95;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Command Type */
+
+
+#define GEN10_MEDIA_OBJECT_CommandType_bits 3
+#define GEN9_MEDIA_OBJECT_CommandType_bits 3
+#define GEN8_MEDIA_OBJECT_CommandType_bits 3
+#define GEN75_MEDIA_OBJECT_CommandType_bits 3
+#define GEN7_MEDIA_OBJECT_CommandType_bits 3
+#define GEN6_MEDIA_OBJECT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_CommandType_start 29
+#define GEN9_MEDIA_OBJECT_CommandType_start 29
+#define GEN8_MEDIA_OBJECT_CommandType_start 29
+#define GEN75_MEDIA_OBJECT_CommandType_start 29
+#define GEN7_MEDIA_OBJECT_CommandType_start 29
+#define GEN6_MEDIA_OBJECT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::DWord Length */
+
+
+#define GEN10_MEDIA_OBJECT_DWordLength_bits 15
+#define GEN9_MEDIA_OBJECT_DWordLength_bits 16
+#define GEN8_MEDIA_OBJECT_DWordLength_bits 16
+#define GEN75_MEDIA_OBJECT_DWordLength_bits 16
+#define GEN7_MEDIA_OBJECT_DWordLength_bits 16
+#define GEN6_MEDIA_OBJECT_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_DWordLength_start 0
+#define GEN9_MEDIA_OBJECT_DWordLength_start 0
+#define GEN8_MEDIA_OBJECT_DWordLength_start 0
+#define GEN75_MEDIA_OBJECT_DWordLength_start 0
+#define GEN7_MEDIA_OBJECT_DWordLength_start 0
+#define GEN6_MEDIA_OBJECT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Force Destination */
+
+
+#define GEN10_MEDIA_OBJECT_ForceDestination_bits 1
+#define GEN9_MEDIA_OBJECT_ForceDestination_bits 1
+#define GEN8_MEDIA_OBJECT_ForceDestination_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ForceDestination_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ForceDestination_start 86
+#define GEN9_MEDIA_OBJECT_ForceDestination_start 86
+#define GEN8_MEDIA_OBJECT_ForceDestination_start 86
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ForceDestination_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 86;
+ case 9: return 86;
+ case 8: return 86;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Half-Slice Destination Select */
+
+
+#define GEN75_MEDIA_OBJECT_HalfSliceDestinationSelect_bits 2
+#define GEN7_MEDIA_OBJECT_HalfSliceDestinationSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_HalfSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_OBJECT_HalfSliceDestinationSelect_start 81
+#define GEN7_MEDIA_OBJECT_HalfSliceDestinationSelect_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_HalfSliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 81;
+ } else {
+ return 81;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Indirect Data Length */
+
+
+#define GEN10_MEDIA_OBJECT_IndirectDataLength_bits 17
+#define GEN9_MEDIA_OBJECT_IndirectDataLength_bits 17
+#define GEN8_MEDIA_OBJECT_IndirectDataLength_bits 17
+#define GEN75_MEDIA_OBJECT_IndirectDataLength_bits 17
+#define GEN7_MEDIA_OBJECT_IndirectDataLength_bits 17
+#define GEN6_MEDIA_OBJECT_IndirectDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_IndirectDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_IndirectDataLength_start 64
+#define GEN9_MEDIA_OBJECT_IndirectDataLength_start 64
+#define GEN8_MEDIA_OBJECT_IndirectDataLength_start 64
+#define GEN75_MEDIA_OBJECT_IndirectDataLength_start 64
+#define GEN7_MEDIA_OBJECT_IndirectDataLength_start 64
+#define GEN6_MEDIA_OBJECT_IndirectDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_IndirectDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Indirect Data Start Address */
+
+
+#define GEN10_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN9_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN8_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN75_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN7_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+#define GEN6_MEDIA_OBJECT_IndirectDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+#define GEN9_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+#define GEN8_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+#define GEN75_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+#define GEN7_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+#define GEN6_MEDIA_OBJECT_IndirectDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Inline Data */
+
+
+#define GEN10_MEDIA_OBJECT_InlineData_bits 32
+#define GEN9_MEDIA_OBJECT_InlineData_bits 32
+#define GEN8_MEDIA_OBJECT_InlineData_bits 32
+#define GEN75_MEDIA_OBJECT_InlineData_bits 32
+#define GEN7_MEDIA_OBJECT_InlineData_bits 32
+#define GEN6_MEDIA_OBJECT_InlineData_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_InlineData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_InlineData_start 0
+#define GEN9_MEDIA_OBJECT_InlineData_start 0
+#define GEN8_MEDIA_OBJECT_InlineData_start 0
+#define GEN75_MEDIA_OBJECT_InlineData_start 0
+#define GEN7_MEDIA_OBJECT_InlineData_start 0
+#define GEN6_MEDIA_OBJECT_InlineData_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_InlineData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Interface Descriptor Offset */
+
+
+#define GEN10_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 6
+#define GEN9_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 6
+#define GEN8_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 6
+#define GEN75_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 6
+#define GEN7_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 5
+#define GEN6_MEDIA_OBJECT_InterfaceDescriptorOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN9_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN8_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN75_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN7_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+#define GEN6_MEDIA_OBJECT_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Media Command Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_OBJECT_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_OBJECT_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_OBJECT_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_OBJECT_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_OBJECT_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_OBJECT_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Media Command Pipeline */
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+#define GEN9_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+#define GEN8_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+#define GEN75_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+#define GEN7_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+#define GEN6_MEDIA_OBJECT_MediaCommandPipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandPipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandPipeline_start 27
+#define GEN9_MEDIA_OBJECT_MediaCommandPipeline_start 27
+#define GEN8_MEDIA_OBJECT_MediaCommandPipeline_start 27
+#define GEN75_MEDIA_OBJECT_MediaCommandPipeline_start 27
+#define GEN7_MEDIA_OBJECT_MediaCommandPipeline_start 27
+#define GEN6_MEDIA_OBJECT_MediaCommandPipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandPipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Media Command Sub-Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+#define GEN9_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+#define GEN8_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+#define GEN75_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+#define GEN7_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+#define GEN6_MEDIA_OBJECT_MediaCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+#define GEN9_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+#define GEN8_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+#define GEN75_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+#define GEN7_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+#define GEN6_MEDIA_OBJECT_MediaCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_MediaCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Scoreboard Color */
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardColor_bits 4
+#define GEN9_MEDIA_OBJECT_ScoreboardColor_bits 4
+#define GEN8_MEDIA_OBJECT_ScoreboardColor_bits 4
+#define GEN75_MEDIA_OBJECT_ScoreboardColor_bits 4
+#define GEN7_MEDIA_OBJECT_ScoreboardColor_bits 4
+#define GEN6_MEDIA_OBJECT_ScoreboardColor_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardColor_start 176
+#define GEN9_MEDIA_OBJECT_ScoreboardColor_start 176
+#define GEN8_MEDIA_OBJECT_ScoreboardColor_start 176
+#define GEN75_MEDIA_OBJECT_ScoreboardColor_start 176
+#define GEN7_MEDIA_OBJECT_ScoreboardColor_start 176
+#define GEN6_MEDIA_OBJECT_ScoreboardColor_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 176;
+ case 9: return 176;
+ case 8: return 176;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 176;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Scoreboard Mask */
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardMask_bits 8
+#define GEN9_MEDIA_OBJECT_ScoreboardMask_bits 8
+#define GEN8_MEDIA_OBJECT_ScoreboardMask_bits 8
+#define GEN75_MEDIA_OBJECT_ScoreboardMask_bits 8
+#define GEN7_MEDIA_OBJECT_ScoreboardMask_bits 8
+#define GEN6_MEDIA_OBJECT_ScoreboardMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardMask_start 160
+#define GEN9_MEDIA_OBJECT_ScoreboardMask_start 160
+#define GEN8_MEDIA_OBJECT_ScoreboardMask_start 160
+#define GEN75_MEDIA_OBJECT_ScoreboardMask_start 160
+#define GEN7_MEDIA_OBJECT_ScoreboardMask_start 160
+#define GEN6_MEDIA_OBJECT_ScoreboardMask_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Scoreboard X */
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardX_bits 9
+#define GEN9_MEDIA_OBJECT_ScoreboardX_bits 9
+#define GEN8_MEDIA_OBJECT_ScoreboardX_bits 9
+#define GEN75_MEDIA_OBJECT_ScoreboardX_bits 9
+#define GEN7_MEDIA_OBJECT_ScoreboardX_bits 9
+#define GEN6_MEDIA_OBJECT_ScoreboardX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ScoreboardX_start 128
+#define GEN9_MEDIA_OBJECT_ScoreboardX_start 128
+#define GEN8_MEDIA_OBJECT_ScoreboardX_start 128
+#define GEN75_MEDIA_OBJECT_ScoreboardX_start 128
+#define GEN7_MEDIA_OBJECT_ScoreboardX_start 128
+#define GEN6_MEDIA_OBJECT_ScoreboardX_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoreboardX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Scoredboard Y */
+
+
+#define GEN10_MEDIA_OBJECT_ScoredboardY_bits 9
+#define GEN9_MEDIA_OBJECT_ScoredboardY_bits 9
+#define GEN8_MEDIA_OBJECT_ScoredboardY_bits 9
+#define GEN75_MEDIA_OBJECT_ScoredboardY_bits 9
+#define GEN7_MEDIA_OBJECT_ScoredboardY_bits 9
+#define GEN6_MEDIA_OBJECT_ScoredboardY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoredboardY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ScoredboardY_start 144
+#define GEN9_MEDIA_OBJECT_ScoredboardY_start 144
+#define GEN8_MEDIA_OBJECT_ScoredboardY_start 144
+#define GEN75_MEDIA_OBJECT_ScoredboardY_start 144
+#define GEN7_MEDIA_OBJECT_ScoredboardY_start 144
+#define GEN6_MEDIA_OBJECT_ScoredboardY_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ScoredboardY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 144;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 144;
+ } else {
+ return 144;
+ }
+ case 6: return 144;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Slice Destination Select */
+
+
+#define GEN10_MEDIA_OBJECT_SliceDestinationSelect_bits 2
+#define GEN9_MEDIA_OBJECT_SliceDestinationSelect_bits 2
+#define GEN8_MEDIA_OBJECT_SliceDestinationSelect_bits 2
+#define GEN75_MEDIA_OBJECT_SliceDestinationSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_SliceDestinationSelect_start 83
+#define GEN9_MEDIA_OBJECT_SliceDestinationSelect_start 83
+#define GEN8_MEDIA_OBJECT_SliceDestinationSelect_start 83
+#define GEN75_MEDIA_OBJECT_SliceDestinationSelect_start 83
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 83;
+ case 9: return 83;
+ case 8: return 83;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 83;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Slice Destination Select MSBs */
+
+
+#define GEN10_MEDIA_OBJECT_SliceDestinationSelectMSBs_bits 2
+#define GEN9_MEDIA_OBJECT_SliceDestinationSelectMSBs_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SliceDestinationSelectMSBs_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_SliceDestinationSelectMSBs_start 89
+#define GEN9_MEDIA_OBJECT_SliceDestinationSelectMSBs_start 89
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SliceDestinationSelectMSBs_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 89;
+ case 9: return 89;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::SubSlice Destination Select */
+
+
+#define GEN10_MEDIA_OBJECT_SubSliceDestinationSelect_bits 2
+#define GEN9_MEDIA_OBJECT_SubSliceDestinationSelect_bits 2
+#define GEN8_MEDIA_OBJECT_SubSliceDestinationSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SubSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_SubSliceDestinationSelect_start 81
+#define GEN9_MEDIA_OBJECT_SubSliceDestinationSelect_start 81
+#define GEN8_MEDIA_OBJECT_SubSliceDestinationSelect_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_SubSliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 81;
+ case 9: return 81;
+ case 8: return 81;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Thread Synchronization */
+
+
+#define GEN10_MEDIA_OBJECT_ThreadSynchronization_bits 1
+#define GEN9_MEDIA_OBJECT_ThreadSynchronization_bits 1
+#define GEN8_MEDIA_OBJECT_ThreadSynchronization_bits 1
+#define GEN75_MEDIA_OBJECT_ThreadSynchronization_bits 1
+#define GEN7_MEDIA_OBJECT_ThreadSynchronization_bits 1
+#define GEN6_MEDIA_OBJECT_ThreadSynchronization_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ThreadSynchronization_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_ThreadSynchronization_start 88
+#define GEN9_MEDIA_OBJECT_ThreadSynchronization_start 88
+#define GEN8_MEDIA_OBJECT_ThreadSynchronization_start 88
+#define GEN75_MEDIA_OBJECT_ThreadSynchronization_start 88
+#define GEN7_MEDIA_OBJECT_ThreadSynchronization_start 88
+#define GEN6_MEDIA_OBJECT_ThreadSynchronization_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_ThreadSynchronization_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 88;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT::Use Scoreboard */
+
+
+#define GEN10_MEDIA_OBJECT_UseScoreboard_bits 1
+#define GEN9_MEDIA_OBJECT_UseScoreboard_bits 1
+#define GEN8_MEDIA_OBJECT_UseScoreboard_bits 1
+#define GEN75_MEDIA_OBJECT_UseScoreboard_bits 1
+#define GEN7_MEDIA_OBJECT_UseScoreboard_bits 1
+#define GEN6_MEDIA_OBJECT_UseScoreboard_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_UseScoreboard_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_UseScoreboard_start 85
+#define GEN9_MEDIA_OBJECT_UseScoreboard_start 85
+#define GEN8_MEDIA_OBJECT_UseScoreboard_start 85
+#define GEN75_MEDIA_OBJECT_UseScoreboard_start 85
+#define GEN7_MEDIA_OBJECT_UseScoreboard_start 85
+#define GEN6_MEDIA_OBJECT_UseScoreboard_start 85
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_UseScoreboard_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 85;
+ case 9: return 85;
+ case 8: return 85;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 85;
+ } else {
+ return 85;
+ }
+ case 6: return 85;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID */
+
+
+
+
+
+/* MEDIA_OBJECT_GRPID::Command Type */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_CommandType_bits 3
+#define GEN9_MEDIA_OBJECT_GRPID_CommandType_bits 3
+#define GEN8_MEDIA_OBJECT_GRPID_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_CommandType_start 29
+#define GEN9_MEDIA_OBJECT_GRPID_CommandType_start 29
+#define GEN8_MEDIA_OBJECT_GRPID_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::DWord Length */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_DWordLength_bits 16
+#define GEN9_MEDIA_OBJECT_GRPID_DWordLength_bits 16
+#define GEN8_MEDIA_OBJECT_GRPID_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_DWordLength_start 0
+#define GEN9_MEDIA_OBJECT_GRPID_DWordLength_start 0
+#define GEN8_MEDIA_OBJECT_GRPID_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::End of Thread Group */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_EndofThreadGroup_bits 1
+#define GEN9_MEDIA_OBJECT_GRPID_EndofThreadGroup_bits 1
+#define GEN8_MEDIA_OBJECT_GRPID_EndofThreadGroup_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_EndofThreadGroup_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_EndofThreadGroup_start 87
+#define GEN9_MEDIA_OBJECT_GRPID_EndofThreadGroup_start 87
+#define GEN8_MEDIA_OBJECT_GRPID_EndofThreadGroup_start 87
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_EndofThreadGroup_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 87;
+ case 9: return 87;
+ case 8: return 87;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Force Destination */
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_ForceDestination_bits 1
+#define GEN8_MEDIA_OBJECT_GRPID_ForceDestination_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ForceDestination_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_ForceDestination_start 86
+#define GEN8_MEDIA_OBJECT_GRPID_ForceDestination_start 86
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ForceDestination_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 86;
+ case 8: return 86;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::GroupID */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_GroupID_bits 32
+#define GEN9_MEDIA_OBJECT_GRPID_GroupID_bits 32
+#define GEN8_MEDIA_OBJECT_GRPID_GroupID_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_GroupID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_GroupID_start 192
+#define GEN9_MEDIA_OBJECT_GRPID_GroupID_start 192
+#define GEN8_MEDIA_OBJECT_GRPID_GroupID_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_GroupID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Indirect Data Length */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_IndirectDataLength_bits 17
+#define GEN9_MEDIA_OBJECT_GRPID_IndirectDataLength_bits 17
+#define GEN8_MEDIA_OBJECT_GRPID_IndirectDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_IndirectDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_IndirectDataLength_start 64
+#define GEN9_MEDIA_OBJECT_GRPID_IndirectDataLength_start 64
+#define GEN8_MEDIA_OBJECT_GRPID_IndirectDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_IndirectDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Indirect Data Start Address */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_bits 32
+#define GEN9_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_bits 32
+#define GEN8_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_start 96
+#define GEN9_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_start 96
+#define GEN8_MEDIA_OBJECT_GRPID_IndirectDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Inline Data */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_InlineData_bits 32
+#define GEN9_MEDIA_OBJECT_GRPID_InlineData_bits 32
+#define GEN8_MEDIA_OBJECT_GRPID_InlineData_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_InlineData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_InlineData_start 0
+#define GEN9_MEDIA_OBJECT_GRPID_InlineData_start 0
+#define GEN8_MEDIA_OBJECT_GRPID_InlineData_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_InlineData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Interface Descriptor Offset */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_bits 6
+#define GEN9_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_bits 6
+#define GEN8_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_start 32
+#define GEN9_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_start 32
+#define GEN8_MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Media Command Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Media Command Pipeline */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandPipeline_bits 2
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandPipeline_bits 2
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandPipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandPipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandPipeline_start 27
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandPipeline_start 27
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandPipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandPipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Media Command Sub-Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_bits 8
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_bits 8
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_start 16
+#define GEN9_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_start 16
+#define GEN8_MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_MediaCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Scoreboard Color */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardColor_bits 4
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardColor_bits 4
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardColor_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardColor_start 176
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardColor_start 176
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardColor_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 176;
+ case 9: return 176;
+ case 8: return 176;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Scoreboard Mask */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardMask_bits 8
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardMask_bits 8
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardMask_start 160
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardMask_start 160
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardMask_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Scoreboard X */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardX_bits 9
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardX_bits 9
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardX_start 128
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardX_start 128
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardX_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Scoreboard Y */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardY_bits 9
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardY_bits 9
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_ScoreboardY_start 144
+#define GEN9_MEDIA_OBJECT_GRPID_ScoreboardY_start 144
+#define GEN8_MEDIA_OBJECT_GRPID_ScoreboardY_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_ScoreboardY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 144;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Slice Destination Select */
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SliceDestinationSelect_bits 2
+#define GEN8_MEDIA_OBJECT_GRPID_SliceDestinationSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SliceDestinationSelect_start 83
+#define GEN8_MEDIA_OBJECT_GRPID_SliceDestinationSelect_start 83
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 83;
+ case 8: return 83;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Slice Destination Select MSB */
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SliceDestinationSelectMSB_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 88;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::SubSlice Destination Select */
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_bits 2
+#define GEN8_MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_start 81
+#define GEN8_MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_start 81
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_SubSliceDestinationSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 81;
+ case 8: return 81;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_GRPID::Use Scoreboard */
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_UseScoreboard_bits 1
+#define GEN9_MEDIA_OBJECT_GRPID_UseScoreboard_bits 1
+#define GEN8_MEDIA_OBJECT_GRPID_UseScoreboard_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_UseScoreboard_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_GRPID_UseScoreboard_start 85
+#define GEN9_MEDIA_OBJECT_GRPID_UseScoreboard_start 85
+#define GEN8_MEDIA_OBJECT_GRPID_UseScoreboard_start 85
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_GRPID_UseScoreboard_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 85;
+ case 9: return 85;
+ case 8: return 85;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_length 16
+#define GEN9_MEDIA_OBJECT_PRT_length 16
+#define GEN8_MEDIA_OBJECT_PRT_length 16
+#define GEN75_MEDIA_OBJECT_PRT_length 16
+#define GEN7_MEDIA_OBJECT_PRT_length 16
+#define GEN6_MEDIA_OBJECT_PRT_length 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Children Present */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+#define GEN9_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+#define GEN8_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+#define GEN75_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+#define GEN7_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+#define GEN6_MEDIA_OBJECT_PRT_ChildrenPresent_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_ChildrenPresent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+#define GEN9_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+#define GEN8_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+#define GEN75_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+#define GEN7_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+#define GEN6_MEDIA_OBJECT_PRT_ChildrenPresent_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_ChildrenPresent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 95;
+ case 9: return 95;
+ case 8: return 95;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Command Type */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_CommandType_bits 3
+#define GEN9_MEDIA_OBJECT_PRT_CommandType_bits 3
+#define GEN8_MEDIA_OBJECT_PRT_CommandType_bits 3
+#define GEN75_MEDIA_OBJECT_PRT_CommandType_bits 3
+#define GEN7_MEDIA_OBJECT_PRT_CommandType_bits 3
+#define GEN6_MEDIA_OBJECT_PRT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_CommandType_start 29
+#define GEN9_MEDIA_OBJECT_PRT_CommandType_start 29
+#define GEN8_MEDIA_OBJECT_PRT_CommandType_start 29
+#define GEN75_MEDIA_OBJECT_PRT_CommandType_start 29
+#define GEN7_MEDIA_OBJECT_PRT_CommandType_start 29
+#define GEN6_MEDIA_OBJECT_PRT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::DWord Length */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_DWordLength_bits 15
+#define GEN9_MEDIA_OBJECT_PRT_DWordLength_bits 16
+#define GEN8_MEDIA_OBJECT_PRT_DWordLength_bits 16
+#define GEN75_MEDIA_OBJECT_PRT_DWordLength_bits 16
+#define GEN7_MEDIA_OBJECT_PRT_DWordLength_bits 16
+#define GEN6_MEDIA_OBJECT_PRT_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_DWordLength_start 0
+#define GEN9_MEDIA_OBJECT_PRT_DWordLength_start 0
+#define GEN8_MEDIA_OBJECT_PRT_DWordLength_start 0
+#define GEN75_MEDIA_OBJECT_PRT_DWordLength_start 0
+#define GEN7_MEDIA_OBJECT_PRT_DWordLength_start 0
+#define GEN6_MEDIA_OBJECT_PRT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Inline Data */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_InlineData_bits 32
+#define GEN9_MEDIA_OBJECT_PRT_InlineData_bits 32
+#define GEN8_MEDIA_OBJECT_PRT_InlineData_bits 32
+#define GEN75_MEDIA_OBJECT_PRT_InlineData_bits 32
+#define GEN7_MEDIA_OBJECT_PRT_InlineData_bits 32
+#define GEN6_MEDIA_OBJECT_PRT_InlineData_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_InlineData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_InlineData_start 0
+#define GEN9_MEDIA_OBJECT_PRT_InlineData_start 0
+#define GEN8_MEDIA_OBJECT_PRT_InlineData_start 0
+#define GEN75_MEDIA_OBJECT_PRT_InlineData_start 0
+#define GEN7_MEDIA_OBJECT_PRT_InlineData_start 0
+#define GEN6_MEDIA_OBJECT_PRT_InlineData_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_InlineData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Interface Descriptor Offset */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 6
+#define GEN9_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 6
+#define GEN8_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 6
+#define GEN75_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 6
+#define GEN7_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 5
+#define GEN6_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+#define GEN9_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+#define GEN8_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+#define GEN75_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+#define GEN7_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+#define GEN6_MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Media Command Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_OBJECT_PRT_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_OBJECT_PRT_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::PRT_Fence Needed */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+#define GEN9_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+#define GEN8_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+#define GEN75_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+#define GEN7_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+#define GEN6_MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_PRT_FenceNeeded_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+#define GEN9_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+#define GEN8_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+#define GEN75_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+#define GEN7_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+#define GEN6_MEDIA_OBJECT_PRT_PRT_FenceNeeded_start 87
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_PRT_FenceNeeded_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 87;
+ case 9: return 87;
+ case 8: return 87;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 87;
+ } else {
+ return 87;
+ }
+ case 6: return 87;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::PRT_FenceType */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+#define GEN9_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+#define GEN8_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+#define GEN75_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+#define GEN7_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+#define GEN6_MEDIA_OBJECT_PRT_PRT_FenceType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_PRT_FenceType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+#define GEN9_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+#define GEN8_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+#define GEN75_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+#define GEN7_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+#define GEN6_MEDIA_OBJECT_PRT_PRT_FenceType_start 86
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_PRT_FenceType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 86;
+ case 9: return 86;
+ case 8: return 86;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 86;
+ } else {
+ return 86;
+ }
+ case 6: return 86;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::Pipeline */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_Pipeline_bits 2
+#define GEN9_MEDIA_OBJECT_PRT_Pipeline_bits 2
+#define GEN8_MEDIA_OBJECT_PRT_Pipeline_bits 2
+#define GEN75_MEDIA_OBJECT_PRT_Pipeline_bits 2
+#define GEN7_MEDIA_OBJECT_PRT_Pipeline_bits 2
+#define GEN6_MEDIA_OBJECT_PRT_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_Pipeline_start 27
+#define GEN9_MEDIA_OBJECT_PRT_Pipeline_start 27
+#define GEN8_MEDIA_OBJECT_PRT_Pipeline_start 27
+#define GEN75_MEDIA_OBJECT_PRT_Pipeline_start 27
+#define GEN7_MEDIA_OBJECT_PRT_Pipeline_start 27
+#define GEN6_MEDIA_OBJECT_PRT_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_PRT::SubOpcode */
+
+
+#define GEN10_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+#define GEN9_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+#define GEN8_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+#define GEN75_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+#define GEN7_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+#define GEN6_MEDIA_OBJECT_PRT_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_PRT_SubOpcode_start 16
+#define GEN9_MEDIA_OBJECT_PRT_SubOpcode_start 16
+#define GEN8_MEDIA_OBJECT_PRT_SubOpcode_start 16
+#define GEN75_MEDIA_OBJECT_PRT_SubOpcode_start 16
+#define GEN7_MEDIA_OBJECT_PRT_SubOpcode_start 16
+#define GEN6_MEDIA_OBJECT_PRT_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_PRT_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER */
+
+
+
+
+
+/* MEDIA_OBJECT_WALKER::Block Resolution X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_BlockResolutionX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_BlockResolutionX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+#define GEN9_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+#define GEN8_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+#define GEN75_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+#define GEN7_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+#define GEN6_MEDIA_OBJECT_WALKER_BlockResolutionX_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_BlockResolutionX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 256;
+ } else {
+ return 256;
+ }
+ case 6: return 256;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Block Resolution Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_BlockResolutionY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_BlockResolutionY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+#define GEN9_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+#define GEN8_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+#define GEN75_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+#define GEN7_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+#define GEN6_MEDIA_OBJECT_WALKER_BlockResolutionY_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_BlockResolutionY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 272;
+ } else {
+ return 272;
+ }
+ case 6: return 272;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Children Present */
+
+
+#define GEN8_MEDIA_OBJECT_WALKER_ChildrenPresent_bits 1
+#define GEN75_MEDIA_OBJECT_WALKER_ChildrenPresent_bits 1
+#define GEN7_MEDIA_OBJECT_WALKER_ChildrenPresent_bits 1
+#define GEN6_MEDIA_OBJECT_WALKER_ChildrenPresent_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ChildrenPresent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MEDIA_OBJECT_WALKER_ChildrenPresent_start 95
+#define GEN75_MEDIA_OBJECT_WALKER_ChildrenPresent_start 95
+#define GEN7_MEDIA_OBJECT_WALKER_ChildrenPresent_start 95
+#define GEN6_MEDIA_OBJECT_WALKER_ChildrenPresent_start 95
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ChildrenPresent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 95;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 95;
+ } else {
+ return 95;
+ }
+ case 6: return 95;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Color Count Minus One */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+#define GEN9_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+#define GEN8_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+#define GEN75_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+#define GEN7_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+#define GEN6_MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ColorCountMinusOne_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+#define GEN9_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+#define GEN8_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+#define GEN75_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+#define GEN7_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+#define GEN6_MEDIA_OBJECT_WALKER_ColorCountMinusOne_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ColorCountMinusOne_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 216;
+ case 9: return 216;
+ case 8: return 216;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 216;
+ } else {
+ return 216;
+ }
+ case 6: return 216;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Command Type */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_CommandType_bits 3
+#define GEN9_MEDIA_OBJECT_WALKER_CommandType_bits 3
+#define GEN8_MEDIA_OBJECT_WALKER_CommandType_bits 3
+#define GEN75_MEDIA_OBJECT_WALKER_CommandType_bits 3
+#define GEN7_MEDIA_OBJECT_WALKER_CommandType_bits 3
+#define GEN6_MEDIA_OBJECT_WALKER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_CommandType_start 29
+#define GEN9_MEDIA_OBJECT_WALKER_CommandType_start 29
+#define GEN8_MEDIA_OBJECT_WALKER_CommandType_start 29
+#define GEN75_MEDIA_OBJECT_WALKER_CommandType_start 29
+#define GEN7_MEDIA_OBJECT_WALKER_CommandType_start 29
+#define GEN6_MEDIA_OBJECT_WALKER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::DWord Length */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_DWordLength_bits 15
+#define GEN9_MEDIA_OBJECT_WALKER_DWordLength_bits 16
+#define GEN8_MEDIA_OBJECT_WALKER_DWordLength_bits 16
+#define GEN75_MEDIA_OBJECT_WALKER_DWordLength_bits 16
+#define GEN7_MEDIA_OBJECT_WALKER_DWordLength_bits 16
+#define GEN6_MEDIA_OBJECT_WALKER_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_DWordLength_start 0
+#define GEN9_MEDIA_OBJECT_WALKER_DWordLength_start 0
+#define GEN8_MEDIA_OBJECT_WALKER_DWordLength_start 0
+#define GEN75_MEDIA_OBJECT_WALKER_DWordLength_start 0
+#define GEN7_MEDIA_OBJECT_WALKER_DWordLength_start 0
+#define GEN6_MEDIA_OBJECT_WALKER_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Dual Mode */
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_DualMode_bits 1
+#define GEN7_MEDIA_OBJECT_WALKER_DualMode_bits 1
+#define GEN6_MEDIA_OBJECT_WALKER_DualMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_DualMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_DualMode_start 223
+#define GEN7_MEDIA_OBJECT_WALKER_DualMode_start 223
+#define GEN6_MEDIA_OBJECT_WALKER_DualMode_start 223
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_DualMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 223;
+ } else {
+ return 223;
+ }
+ case 6: return 223;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Inner Loop Unit X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 512;
+ case 9: return 512;
+ case 8: return 512;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 512;
+ } else {
+ return 512;
+ }
+ case 6: return 512;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Inner Loop Unit Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start 528
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalInnerLoopUnitY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 528;
+ case 9: return 528;
+ case 8: return 528;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 528;
+ } else {
+ return 528;
+ }
+ case 6: return 528;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Loop Exec Count */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalLoopExecCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start 240
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalLoopExecCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 240;
+ case 9: return 240;
+ case 8: return 240;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 240;
+ } else {
+ return 240;
+ }
+ case 6: return 240;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Outer Loop Stride X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start 480
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 480;
+ case 9: return 480;
+ case 8: return 480;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 480;
+ } else {
+ return 480;
+ }
+ case 6: return 480;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Outer Loop Stride Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start 496
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalOuterLoopStrideY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 496;
+ case 9: return 496;
+ case 8: return 496;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 496;
+ } else {
+ return 496;
+ }
+ case 6: return 496;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Resolution X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalResolutionX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalResolutionX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalResolutionX_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalResolutionX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 416;
+ case 8: return 416;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 416;
+ } else {
+ return 416;
+ }
+ case 6: return 416;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Resolution Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalResolutionY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalResolutionY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalResolutionY_start 432
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalResolutionY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 432;
+ case 9: return 432;
+ case 8: return 432;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 432;
+ } else {
+ return 432;
+ }
+ case 6: return 432;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Start X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalStartX_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalStartX_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalStartX_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalStartX_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalStartX_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalStartX_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalStartX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalStartX_start 448
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalStartX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 448;
+ case 9: return 448;
+ case 8: return 448;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 448;
+ } else {
+ return 448;
+ }
+ case 6: return 448;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Global Start Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalStartY_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalStartY_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalStartY_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalStartY_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalStartY_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalStartY_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalStartY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+#define GEN9_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+#define GEN8_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+#define GEN75_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+#define GEN7_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+#define GEN6_MEDIA_OBJECT_WALKER_GlobalStartY_start 464
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GlobalStartY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 464;
+ case 9: return 464;
+ case 8: return 464;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 464;
+ } else {
+ return 464;
+ }
+ case 6: return 464;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Group ID Loop Select */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_bits 24
+#define GEN9_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_bits 24
+#define GEN8_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_bits 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GroupIDLoopSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_start 168
+#define GEN9_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_start 168
+#define GEN8_MEDIA_OBJECT_WALKER_GroupIDLoopSelect_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_GroupIDLoopSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 168;
+ case 9: return 168;
+ case 8: return 168;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Indirect Data Length */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+#define GEN9_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+#define GEN8_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+#define GEN75_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+#define GEN7_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+#define GEN6_MEDIA_OBJECT_WALKER_IndirectDataLength_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_IndirectDataLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+#define GEN9_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+#define GEN8_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+#define GEN75_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+#define GEN7_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+#define GEN6_MEDIA_OBJECT_WALKER_IndirectDataLength_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_IndirectDataLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Indirect Data Start Address */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+#define GEN9_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+#define GEN8_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+#define GEN75_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+#define GEN7_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+#define GEN6_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_IndirectDataStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+#define GEN9_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+#define GEN8_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+#define GEN75_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+#define GEN7_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+#define GEN6_MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_IndirectDataStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Inline Data */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_InlineData_bits 32
+#define GEN9_MEDIA_OBJECT_WALKER_InlineData_bits 32
+#define GEN8_MEDIA_OBJECT_WALKER_InlineData_bits 32
+#define GEN75_MEDIA_OBJECT_WALKER_InlineData_bits 32
+#define GEN7_MEDIA_OBJECT_WALKER_InlineData_bits 32
+#define GEN6_MEDIA_OBJECT_WALKER_InlineData_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_InlineData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_InlineData_start 0
+#define GEN9_MEDIA_OBJECT_WALKER_InlineData_start 0
+#define GEN8_MEDIA_OBJECT_WALKER_InlineData_start 0
+#define GEN75_MEDIA_OBJECT_WALKER_InlineData_start 0
+#define GEN7_MEDIA_OBJECT_WALKER_InlineData_start 0
+#define GEN6_MEDIA_OBJECT_WALKER_InlineData_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_InlineData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Interface Descriptor Offset */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN9_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN8_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN75_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 6
+#define GEN7_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 5
+#define GEN6_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN9_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN8_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN75_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN7_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+#define GEN6_MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local End X */
+
+
+#define GEN7_MEDIA_OBJECT_WALKER_LocalEndX_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_LocalEndX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalEndX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MEDIA_OBJECT_WALKER_LocalEndX_start 320
+#define GEN6_MEDIA_OBJECT_WALKER_LocalEndX_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalEndX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 320;
+ }
+ case 6: return 320;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local End Y */
+
+
+#define GEN7_MEDIA_OBJECT_WALKER_LocalEndY_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_LocalEndY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalEndY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MEDIA_OBJECT_WALKER_LocalEndY_start 336
+#define GEN6_MEDIA_OBJECT_WALKER_LocalEndY_start 336
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalEndY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 336;
+ }
+ case 6: return 336;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Inner Loop Unit X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+#define GEN9_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+#define GEN8_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+#define GEN75_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+#define GEN7_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+#define GEN6_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start 384
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalInnerLoopUnitX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 384;
+ case 9: return 384;
+ case 8: return 384;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 384;
+ } else {
+ return 384;
+ }
+ case 6: return 384;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Inner Loop Unit Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+#define GEN9_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+#define GEN8_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+#define GEN75_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+#define GEN7_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+#define GEN6_MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start 400
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalInnerLoopUnitY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 400;
+ case 9: return 400;
+ case 8: return 400;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 400;
+ } else {
+ return 400;
+ }
+ case 6: return 400;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Loop Exec Count */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalLoopExecCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+#define GEN9_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+#define GEN8_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+#define GEN75_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+#define GEN7_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+#define GEN6_MEDIA_OBJECT_WALKER_LocalLoopExecCount_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalLoopExecCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 224;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Mid-Loop Unit Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+#define GEN9_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+#define GEN8_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+#define GEN75_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+#define GEN7_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+#define GEN6_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+#define GEN9_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+#define GEN8_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+#define GEN75_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+#define GEN7_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+#define GEN6_MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start 204
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalMidLoopUnitY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 204;
+ case 9: return 204;
+ case 8: return 204;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 204;
+ } else {
+ return 204;
+ }
+ case 6: return 204;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Outer Loop Stride X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+#define GEN9_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+#define GEN8_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+#define GEN75_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+#define GEN7_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+#define GEN6_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalOuterLoopStrideX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 352;
+ case 9: return 352;
+ case 8: return 352;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 352;
+ } else {
+ return 352;
+ }
+ case 6: return 352;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Outer Loop Stride Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 12
+#define GEN9_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 12
+#define GEN8_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 10
+#define GEN75_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 10
+#define GEN7_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 10
+#define GEN6_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+#define GEN9_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+#define GEN8_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+#define GEN75_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+#define GEN7_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+#define GEN6_MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start 368
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalOuterLoopStrideY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 368;
+ case 9: return 368;
+ case 8: return 368;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 368;
+ } else {
+ return 368;
+ }
+ case 6: return 368;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Start X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalStartX_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_LocalStartX_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_LocalStartX_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_LocalStartX_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_LocalStartX_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_LocalStartX_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalStartX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+#define GEN9_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+#define GEN8_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+#define GEN75_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+#define GEN7_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+#define GEN6_MEDIA_OBJECT_WALKER_LocalStartX_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalStartX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 288;
+ case 9: return 288;
+ case 8: return 288;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 288;
+ } else {
+ return 288;
+ }
+ case 6: return 288;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Local Start Y */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalStartY_bits 11
+#define GEN9_MEDIA_OBJECT_WALKER_LocalStartY_bits 11
+#define GEN8_MEDIA_OBJECT_WALKER_LocalStartY_bits 9
+#define GEN75_MEDIA_OBJECT_WALKER_LocalStartY_bits 9
+#define GEN7_MEDIA_OBJECT_WALKER_LocalStartY_bits 9
+#define GEN6_MEDIA_OBJECT_WALKER_LocalStartY_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalStartY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+#define GEN9_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+#define GEN8_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+#define GEN75_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+#define GEN7_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+#define GEN6_MEDIA_OBJECT_WALKER_LocalStartY_start 304
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_LocalStartY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 304;
+ case 9: return 304;
+ case 8: return 304;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 304;
+ } else {
+ return 304;
+ }
+ case 6: return 304;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Masked Dispatch */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MaskedDispatch_bits 2
+#define GEN9_MEDIA_OBJECT_WALKER_MaskedDispatch_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MaskedDispatch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MaskedDispatch_start 86
+#define GEN9_MEDIA_OBJECT_WALKER_MaskedDispatch_start 86
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MaskedDispatch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 86;
+ case 9: return 86;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Media Command Opcode */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_OBJECT_WALKER_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Mid-Loop Unit X */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+#define GEN9_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+#define GEN8_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+#define GEN75_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+#define GEN7_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+#define GEN6_MEDIA_OBJECT_WALKER_MidLoopUnitX_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MidLoopUnitX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+#define GEN9_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+#define GEN8_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+#define GEN75_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+#define GEN7_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+#define GEN6_MEDIA_OBJECT_WALKER_MidLoopUnitX_start 200
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MidLoopUnitX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 200;
+ case 9: return 200;
+ case 8: return 200;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 200;
+ } else {
+ return 200;
+ }
+ case 6: return 200;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Middle Loop Extra Steps */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+#define GEN9_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+#define GEN8_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+#define GEN75_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+#define GEN7_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+#define GEN6_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+#define GEN9_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+#define GEN8_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+#define GEN75_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+#define GEN7_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+#define GEN6_MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_MiddleLoopExtraSteps_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 208;
+ } else {
+ return 208;
+ }
+ case 6: return 208;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Pipeline */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+#define GEN9_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+#define GEN8_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+#define GEN75_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+#define GEN7_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+#define GEN6_MEDIA_OBJECT_WALKER_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_Pipeline_start 27
+#define GEN9_MEDIA_OBJECT_WALKER_Pipeline_start 27
+#define GEN8_MEDIA_OBJECT_WALKER_Pipeline_start 27
+#define GEN75_MEDIA_OBJECT_WALKER_Pipeline_start 27
+#define GEN7_MEDIA_OBJECT_WALKER_Pipeline_start 27
+#define GEN6_MEDIA_OBJECT_WALKER_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Quad Mode */
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_QuadMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_QuadMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_QuadMode_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_QuadMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 221;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Repel */
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_Repel_bits 1
+#define GEN7_MEDIA_OBJECT_WALKER_Repel_bits 1
+#define GEN6_MEDIA_OBJECT_WALKER_Repel_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_Repel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_OBJECT_WALKER_Repel_start 222
+#define GEN7_MEDIA_OBJECT_WALKER_Repel_start 222
+#define GEN6_MEDIA_OBJECT_WALKER_Repel_start 222
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_Repel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 222;
+ } else {
+ return 222;
+ }
+ case 6: return 222;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Scoreboard Mask */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+#define GEN9_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+#define GEN8_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+#define GEN75_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+#define GEN7_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+#define GEN6_MEDIA_OBJECT_WALKER_ScoreboardMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ScoreboardMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+#define GEN9_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+#define GEN8_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+#define GEN75_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+#define GEN7_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+#define GEN6_MEDIA_OBJECT_WALKER_ScoreboardMask_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ScoreboardMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::SubOpcode */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+#define GEN9_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+#define GEN8_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+#define GEN75_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+#define GEN7_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+#define GEN6_MEDIA_OBJECT_WALKER_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+#define GEN9_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+#define GEN8_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+#define GEN75_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+#define GEN7_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+#define GEN6_MEDIA_OBJECT_WALKER_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Thread Synchronization */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+#define GEN9_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+#define GEN8_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+#define GEN75_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+#define GEN7_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+#define GEN6_MEDIA_OBJECT_WALKER_ThreadSynchronization_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ThreadSynchronization_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+#define GEN9_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+#define GEN8_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+#define GEN75_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+#define GEN7_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+#define GEN6_MEDIA_OBJECT_WALKER_ThreadSynchronization_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_ThreadSynchronization_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 88;
+ } else {
+ return 88;
+ }
+ case 6: return 88;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_OBJECT_WALKER::Use Scoreboard */
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+#define GEN9_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+#define GEN8_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+#define GEN75_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+#define GEN7_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+#define GEN6_MEDIA_OBJECT_WALKER_UseScoreboard_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_UseScoreboard_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+#define GEN9_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+#define GEN8_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+#define GEN75_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+#define GEN7_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+#define GEN6_MEDIA_OBJECT_WALKER_UseScoreboard_start 85
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_OBJECT_WALKER_UseScoreboard_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 85;
+ case 9: return 85;
+ case 8: return 85;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 85;
+ } else {
+ return 85;
+ }
+ case 6: return 85;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_length 2
+#define GEN9_MEDIA_STATE_FLUSH_length 2
+#define GEN8_MEDIA_STATE_FLUSH_length 2
+#define GEN75_MEDIA_STATE_FLUSH_length 2
+#define GEN7_MEDIA_STATE_FLUSH_length 2
+#define GEN6_MEDIA_STATE_FLUSH_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Barrier Mask */
+
+
+#define GEN6_MEDIA_STATE_FLUSH_BarrierMask_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_BarrierMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_STATE_FLUSH_BarrierMask_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_BarrierMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Command Type */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_CommandType_bits 3
+#define GEN9_MEDIA_STATE_FLUSH_CommandType_bits 3
+#define GEN8_MEDIA_STATE_FLUSH_CommandType_bits 3
+#define GEN75_MEDIA_STATE_FLUSH_CommandType_bits 3
+#define GEN7_MEDIA_STATE_FLUSH_CommandType_bits 3
+#define GEN6_MEDIA_STATE_FLUSH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_CommandType_start 29
+#define GEN9_MEDIA_STATE_FLUSH_CommandType_start 29
+#define GEN8_MEDIA_STATE_FLUSH_CommandType_start 29
+#define GEN75_MEDIA_STATE_FLUSH_CommandType_start 29
+#define GEN7_MEDIA_STATE_FLUSH_CommandType_start 29
+#define GEN6_MEDIA_STATE_FLUSH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::DWord Length */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_DWordLength_bits 16
+#define GEN9_MEDIA_STATE_FLUSH_DWordLength_bits 16
+#define GEN8_MEDIA_STATE_FLUSH_DWordLength_bits 16
+#define GEN75_MEDIA_STATE_FLUSH_DWordLength_bits 16
+#define GEN7_MEDIA_STATE_FLUSH_DWordLength_bits 16
+#define GEN6_MEDIA_STATE_FLUSH_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_DWordLength_start 0
+#define GEN9_MEDIA_STATE_FLUSH_DWordLength_start 0
+#define GEN8_MEDIA_STATE_FLUSH_DWordLength_start 0
+#define GEN75_MEDIA_STATE_FLUSH_DWordLength_start 0
+#define GEN7_MEDIA_STATE_FLUSH_DWordLength_start 0
+#define GEN6_MEDIA_STATE_FLUSH_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Disable Preemption */
+
+
+#define GEN75_MEDIA_STATE_FLUSH_DisablePreemption_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_DisablePreemption_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_STATE_FLUSH_DisablePreemption_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_DisablePreemption_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Flush to GO */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_FlushtoGO_bits 1
+#define GEN9_MEDIA_STATE_FLUSH_FlushtoGO_bits 1
+#define GEN8_MEDIA_STATE_FLUSH_FlushtoGO_bits 1
+#define GEN75_MEDIA_STATE_FLUSH_FlushtoGO_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_FlushtoGO_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_FlushtoGO_start 39
+#define GEN9_MEDIA_STATE_FLUSH_FlushtoGO_start 39
+#define GEN8_MEDIA_STATE_FLUSH_FlushtoGO_start 39
+#define GEN75_MEDIA_STATE_FLUSH_FlushtoGO_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_FlushtoGO_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Interface Descriptor Offset */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits 6
+#define GEN9_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits 6
+#define GEN8_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits 6
+#define GEN75_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits 6
+#define GEN7_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start 32
+#define GEN9_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start 32
+#define GEN8_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start 32
+#define GEN75_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start 32
+#define GEN7_MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_InterfaceDescriptorOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Media Command Opcode */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_STATE_FLUSH_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_STATE_FLUSH_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Pipeline */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_Pipeline_bits 2
+#define GEN9_MEDIA_STATE_FLUSH_Pipeline_bits 2
+#define GEN8_MEDIA_STATE_FLUSH_Pipeline_bits 2
+#define GEN75_MEDIA_STATE_FLUSH_Pipeline_bits 2
+#define GEN7_MEDIA_STATE_FLUSH_Pipeline_bits 2
+#define GEN6_MEDIA_STATE_FLUSH_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_Pipeline_start 27
+#define GEN9_MEDIA_STATE_FLUSH_Pipeline_start 27
+#define GEN8_MEDIA_STATE_FLUSH_Pipeline_start 27
+#define GEN75_MEDIA_STATE_FLUSH_Pipeline_start 27
+#define GEN7_MEDIA_STATE_FLUSH_Pipeline_start 27
+#define GEN6_MEDIA_STATE_FLUSH_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::SubOpcode */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+#define GEN9_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+#define GEN8_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+#define GEN75_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+#define GEN7_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+#define GEN6_MEDIA_STATE_FLUSH_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_SubOpcode_start 16
+#define GEN9_MEDIA_STATE_FLUSH_SubOpcode_start 16
+#define GEN8_MEDIA_STATE_FLUSH_SubOpcode_start 16
+#define GEN75_MEDIA_STATE_FLUSH_SubOpcode_start 16
+#define GEN7_MEDIA_STATE_FLUSH_SubOpcode_start 16
+#define GEN6_MEDIA_STATE_FLUSH_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Thread Count WaterMark */
+
+
+#define GEN6_MEDIA_STATE_FLUSH_ThreadCountWaterMark_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_ThreadCountWaterMark_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_STATE_FLUSH_ThreadCountWaterMark_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_ThreadCountWaterMark_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_STATE_FLUSH::Watermark Required */
+
+
+#define GEN10_MEDIA_STATE_FLUSH_WatermarkRequired_bits 1
+#define GEN9_MEDIA_STATE_FLUSH_WatermarkRequired_bits 1
+#define GEN8_MEDIA_STATE_FLUSH_WatermarkRequired_bits 1
+#define GEN75_MEDIA_STATE_FLUSH_WatermarkRequired_bits 1
+#define GEN7_MEDIA_STATE_FLUSH_WatermarkRequired_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_WatermarkRequired_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_STATE_FLUSH_WatermarkRequired_start 38
+#define GEN9_MEDIA_STATE_FLUSH_WatermarkRequired_start 38
+#define GEN8_MEDIA_STATE_FLUSH_WatermarkRequired_start 38
+#define GEN75_MEDIA_STATE_FLUSH_WatermarkRequired_start 38
+#define GEN7_MEDIA_STATE_FLUSH_WatermarkRequired_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_STATE_FLUSH_WatermarkRequired_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE */
+
+
+#define GEN10_MEDIA_VFE_STATE_length 9
+#define GEN9_MEDIA_VFE_STATE_length 9
+#define GEN8_MEDIA_VFE_STATE_length 9
+#define GEN75_MEDIA_VFE_STATE_length 8
+#define GEN7_MEDIA_VFE_STATE_length 8
+#define GEN6_MEDIA_VFE_STATE_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Bypass Gateway Control */
+
+
+#define GEN8_MEDIA_VFE_STATE_BypassGatewayControl_bits 1
+#define GEN75_MEDIA_VFE_STATE_BypassGatewayControl_bits 1
+#define GEN7_MEDIA_VFE_STATE_BypassGatewayControl_bits 1
+#define GEN6_MEDIA_VFE_STATE_BypassGatewayControl_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_BypassGatewayControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MEDIA_VFE_STATE_BypassGatewayControl_start 102
+#define GEN75_MEDIA_VFE_STATE_BypassGatewayControl_start 70
+#define GEN7_MEDIA_VFE_STATE_BypassGatewayControl_start 70
+#define GEN6_MEDIA_VFE_STATE_BypassGatewayControl_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_BypassGatewayControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 102;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 70;
+ }
+ case 6: return 70;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::CURBE Allocation Size */
+
+
+#define GEN10_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+#define GEN9_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+#define GEN8_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+#define GEN75_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+#define GEN7_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+#define GEN6_MEDIA_VFE_STATE_CURBEAllocationSize_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_CURBEAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_CURBEAllocationSize_start 160
+#define GEN9_MEDIA_VFE_STATE_CURBEAllocationSize_start 160
+#define GEN8_MEDIA_VFE_STATE_CURBEAllocationSize_start 160
+#define GEN75_MEDIA_VFE_STATE_CURBEAllocationSize_start 128
+#define GEN7_MEDIA_VFE_STATE_CURBEAllocationSize_start 128
+#define GEN6_MEDIA_VFE_STATE_CURBEAllocationSize_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_CURBEAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Command Type */
+
+
+#define GEN10_MEDIA_VFE_STATE_CommandType_bits 3
+#define GEN9_MEDIA_VFE_STATE_CommandType_bits 3
+#define GEN8_MEDIA_VFE_STATE_CommandType_bits 3
+#define GEN75_MEDIA_VFE_STATE_CommandType_bits 3
+#define GEN7_MEDIA_VFE_STATE_CommandType_bits 3
+#define GEN6_MEDIA_VFE_STATE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_CommandType_start 29
+#define GEN9_MEDIA_VFE_STATE_CommandType_start 29
+#define GEN8_MEDIA_VFE_STATE_CommandType_start 29
+#define GEN75_MEDIA_VFE_STATE_CommandType_start 29
+#define GEN7_MEDIA_VFE_STATE_CommandType_start 29
+#define GEN6_MEDIA_VFE_STATE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::DWord Length */
+
+
+#define GEN10_MEDIA_VFE_STATE_DWordLength_bits 16
+#define GEN9_MEDIA_VFE_STATE_DWordLength_bits 16
+#define GEN8_MEDIA_VFE_STATE_DWordLength_bits 16
+#define GEN75_MEDIA_VFE_STATE_DWordLength_bits 16
+#define GEN7_MEDIA_VFE_STATE_DWordLength_bits 16
+#define GEN6_MEDIA_VFE_STATE_DWordLength_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_DWordLength_start 0
+#define GEN9_MEDIA_VFE_STATE_DWordLength_start 0
+#define GEN8_MEDIA_VFE_STATE_DWordLength_start 0
+#define GEN75_MEDIA_VFE_STATE_DWordLength_start 0
+#define GEN7_MEDIA_VFE_STATE_DWordLength_start 0
+#define GEN6_MEDIA_VFE_STATE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Fast Preempt */
+
+
+#define GEN6_MEDIA_VFE_STATE_FastPreempt_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_FastPreempt_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEDIA_VFE_STATE_FastPreempt_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_FastPreempt_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 69;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::GPGPU Mode */
+
+
+#define GEN75_MEDIA_VFE_STATE_GPGPUMode_bits 1
+#define GEN7_MEDIA_VFE_STATE_GPGPUMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_GPGPUMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_VFE_STATE_GPGPUMode_start 66
+#define GEN7_MEDIA_VFE_STATE_GPGPUMode_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_GPGPUMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Gateway MMIO Access Control */
+
+
+#define GEN7_MEDIA_VFE_STATE_GatewayMMIOAccessControl_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_GatewayMMIOAccessControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MEDIA_VFE_STATE_GatewayMMIOAccessControl_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_GatewayMMIOAccessControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 67;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Half-Slice Disable */
+
+
+#define GEN75_MEDIA_VFE_STATE_HalfSliceDisable_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_HalfSliceDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEDIA_VFE_STATE_HalfSliceDisable_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_HalfSliceDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Maximum Number of Threads */
+
+
+#define GEN10_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+#define GEN9_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+#define GEN8_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+#define GEN75_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+#define GEN7_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+#define GEN6_MEDIA_VFE_STATE_MaximumNumberofThreads_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_MaximumNumberofThreads_start 112
+#define GEN9_MEDIA_VFE_STATE_MaximumNumberofThreads_start 112
+#define GEN8_MEDIA_VFE_STATE_MaximumNumberofThreads_start 112
+#define GEN75_MEDIA_VFE_STATE_MaximumNumberofThreads_start 80
+#define GEN7_MEDIA_VFE_STATE_MaximumNumberofThreads_start 80
+#define GEN6_MEDIA_VFE_STATE_MaximumNumberofThreads_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 80;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Media Command Opcode */
+
+
+#define GEN10_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+#define GEN9_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+#define GEN8_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+#define GEN75_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+#define GEN7_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+#define GEN6_MEDIA_VFE_STATE_MediaCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_MediaCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+#define GEN9_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+#define GEN8_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+#define GEN75_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+#define GEN7_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+#define GEN6_MEDIA_VFE_STATE_MediaCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_MediaCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Number of Media Objects per Pre-Emption Checkpoint */
+
+
+#define GEN10_MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_start 200
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_NumberofMediaObjectsperPreEmptionCheckpoint_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 200;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Number of URB Entries */
+
+
+#define GEN10_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+#define GEN9_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+#define GEN8_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+#define GEN75_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+#define GEN7_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+#define GEN6_MEDIA_VFE_STATE_NumberofURBEntries_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_NumberofURBEntries_start 104
+#define GEN9_MEDIA_VFE_STATE_NumberofURBEntries_start 104
+#define GEN8_MEDIA_VFE_STATE_NumberofURBEntries_start 104
+#define GEN75_MEDIA_VFE_STATE_NumberofURBEntries_start 72
+#define GEN7_MEDIA_VFE_STATE_NumberofURBEntries_start 72
+#define GEN6_MEDIA_VFE_STATE_NumberofURBEntries_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 104;
+ case 9: return 104;
+ case 8: return 104;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Per Thread Scratch Space */
+
+
+#define GEN10_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+#define GEN9_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+#define GEN8_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+#define GEN75_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+#define GEN7_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+#define GEN6_MEDIA_VFE_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+#define GEN9_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+#define GEN8_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+#define GEN75_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+#define GEN7_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+#define GEN6_MEDIA_VFE_STATE_PerThreadScratchSpace_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Pipeline */
+
+
+#define GEN10_MEDIA_VFE_STATE_Pipeline_bits 2
+#define GEN9_MEDIA_VFE_STATE_Pipeline_bits 2
+#define GEN8_MEDIA_VFE_STATE_Pipeline_bits 2
+#define GEN75_MEDIA_VFE_STATE_Pipeline_bits 2
+#define GEN7_MEDIA_VFE_STATE_Pipeline_bits 2
+#define GEN6_MEDIA_VFE_STATE_Pipeline_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Pipeline_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Pipeline_start 27
+#define GEN9_MEDIA_VFE_STATE_Pipeline_start 27
+#define GEN8_MEDIA_VFE_STATE_Pipeline_start 27
+#define GEN75_MEDIA_VFE_STATE_Pipeline_start 27
+#define GEN7_MEDIA_VFE_STATE_Pipeline_start 27
+#define GEN6_MEDIA_VFE_STATE_Pipeline_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Pipeline_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Reset Gateway Timer */
+
+
+#define GEN10_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+#define GEN9_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+#define GEN8_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+#define GEN75_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+#define GEN7_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+#define GEN6_MEDIA_VFE_STATE_ResetGatewayTimer_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ResetGatewayTimer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ResetGatewayTimer_start 103
+#define GEN9_MEDIA_VFE_STATE_ResetGatewayTimer_start 103
+#define GEN8_MEDIA_VFE_STATE_ResetGatewayTimer_start 103
+#define GEN75_MEDIA_VFE_STATE_ResetGatewayTimer_start 71
+#define GEN7_MEDIA_VFE_STATE_ResetGatewayTimer_start 71
+#define GEN6_MEDIA_VFE_STATE_ResetGatewayTimer_start 71
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ResetGatewayTimer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 103;
+ case 9: return 103;
+ case 8: return 103;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 71;
+ } else {
+ return 71;
+ }
+ case 6: return 71;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::SLM Bank Selection Policy */
+
+
+#define GEN10_MEDIA_VFE_STATE_SLMBankSelectionPolicy_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SLMBankSelectionPolicy_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_SLMBankSelectionPolicy_start 99
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SLMBankSelectionPolicy_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 99;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 0 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard0DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard0DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 224
+#define GEN9_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 224
+#define GEN8_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 224
+#define GEN75_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 192
+#define GEN7_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 192
+#define GEN6_MEDIA_VFE_STATE_Scoreboard0DeltaX_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard0DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 192;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 0 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard0DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard0DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 228
+#define GEN9_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 228
+#define GEN8_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 228
+#define GEN75_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 196
+#define GEN7_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 196
+#define GEN6_MEDIA_VFE_STATE_Scoreboard0DeltaY_start 196
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard0DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 228;
+ case 9: return 228;
+ case 8: return 228;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 196;
+ } else {
+ return 196;
+ }
+ case 6: return 196;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 1 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard1DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard1DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 232
+#define GEN9_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 232
+#define GEN8_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 232
+#define GEN75_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 200
+#define GEN7_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 200
+#define GEN6_MEDIA_VFE_STATE_Scoreboard1DeltaX_start 200
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard1DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 232;
+ case 9: return 232;
+ case 8: return 232;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 200;
+ } else {
+ return 200;
+ }
+ case 6: return 200;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 1 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard1DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard1DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 236
+#define GEN9_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 236
+#define GEN8_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 236
+#define GEN75_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 204
+#define GEN7_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 204
+#define GEN6_MEDIA_VFE_STATE_Scoreboard1DeltaY_start 204
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard1DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 236;
+ case 9: return 236;
+ case 8: return 236;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 204;
+ } else {
+ return 204;
+ }
+ case 6: return 204;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 2 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard2DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard2DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 240
+#define GEN9_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 240
+#define GEN8_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 240
+#define GEN75_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 208
+#define GEN7_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 208
+#define GEN6_MEDIA_VFE_STATE_Scoreboard2DeltaX_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard2DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 240;
+ case 9: return 240;
+ case 8: return 240;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 208;
+ } else {
+ return 208;
+ }
+ case 6: return 208;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 2 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard2DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard2DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 244
+#define GEN9_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 244
+#define GEN8_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 244
+#define GEN75_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 212
+#define GEN7_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 212
+#define GEN6_MEDIA_VFE_STATE_Scoreboard2DeltaY_start 212
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard2DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 244;
+ case 9: return 244;
+ case 8: return 244;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 212;
+ } else {
+ return 212;
+ }
+ case 6: return 212;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 3 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard3DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard3DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 248
+#define GEN9_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 248
+#define GEN8_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 248
+#define GEN75_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 216
+#define GEN7_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 216
+#define GEN6_MEDIA_VFE_STATE_Scoreboard3DeltaX_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard3DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 248;
+ case 9: return 248;
+ case 8: return 248;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 216;
+ } else {
+ return 216;
+ }
+ case 6: return 216;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 3 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard3DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard3DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 252
+#define GEN9_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 252
+#define GEN8_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 252
+#define GEN75_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 220
+#define GEN7_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 220
+#define GEN6_MEDIA_VFE_STATE_Scoreboard3DeltaY_start 220
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard3DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 252;
+ case 9: return 252;
+ case 8: return 252;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 220;
+ } else {
+ return 220;
+ }
+ case 6: return 220;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 4 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard4DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard4DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 256
+#define GEN9_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 256
+#define GEN8_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 256
+#define GEN75_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 224
+#define GEN7_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 224
+#define GEN6_MEDIA_VFE_STATE_Scoreboard4DeltaX_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard4DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 224;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 4 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard4DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard4DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 260
+#define GEN9_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 260
+#define GEN8_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 260
+#define GEN75_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 228
+#define GEN7_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 228
+#define GEN6_MEDIA_VFE_STATE_Scoreboard4DeltaY_start 228
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard4DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 260;
+ case 9: return 260;
+ case 8: return 260;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 228;
+ } else {
+ return 228;
+ }
+ case 6: return 228;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 5 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard5DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard5DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 264
+#define GEN9_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 264
+#define GEN8_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 264
+#define GEN75_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 232
+#define GEN7_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 232
+#define GEN6_MEDIA_VFE_STATE_Scoreboard5DeltaX_start 232
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard5DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 264;
+ case 9: return 264;
+ case 8: return 264;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 232;
+ } else {
+ return 232;
+ }
+ case 6: return 232;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 5 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard5DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard5DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 268
+#define GEN9_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 268
+#define GEN8_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 268
+#define GEN75_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 236
+#define GEN7_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 236
+#define GEN6_MEDIA_VFE_STATE_Scoreboard5DeltaY_start 236
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard5DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 268;
+ case 9: return 268;
+ case 8: return 268;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 236;
+ } else {
+ return 236;
+ }
+ case 6: return 236;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 6 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard6DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard6DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 272
+#define GEN9_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 272
+#define GEN8_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 272
+#define GEN75_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 240
+#define GEN7_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 240
+#define GEN6_MEDIA_VFE_STATE_Scoreboard6DeltaX_start 240
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard6DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 272;
+ case 9: return 272;
+ case 8: return 272;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 240;
+ } else {
+ return 240;
+ }
+ case 6: return 240;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 6 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard6DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard6DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 276
+#define GEN9_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 276
+#define GEN8_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 276
+#define GEN75_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 244
+#define GEN7_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 244
+#define GEN6_MEDIA_VFE_STATE_Scoreboard6DeltaY_start 244
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard6DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 276;
+ case 9: return 276;
+ case 8: return 276;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 244;
+ } else {
+ return 244;
+ }
+ case 6: return 244;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 7 Delta X */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard7DeltaX_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard7DeltaX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 280
+#define GEN9_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 280
+#define GEN8_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 280
+#define GEN75_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 248
+#define GEN7_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 248
+#define GEN6_MEDIA_VFE_STATE_Scoreboard7DeltaX_start 248
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard7DeltaX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 280;
+ case 9: return 280;
+ case 8: return 280;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 248;
+ } else {
+ return 248;
+ }
+ case 6: return 248;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard 7 Delta Y */
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+#define GEN9_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+#define GEN8_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+#define GEN75_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+#define GEN7_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+#define GEN6_MEDIA_VFE_STATE_Scoreboard7DeltaY_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard7DeltaY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 284
+#define GEN9_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 284
+#define GEN8_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 284
+#define GEN75_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 252
+#define GEN7_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 252
+#define GEN6_MEDIA_VFE_STATE_Scoreboard7DeltaY_start 252
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_Scoreboard7DeltaY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 284;
+ case 9: return 284;
+ case 8: return 284;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 252;
+ } else {
+ return 252;
+ }
+ case 6: return 252;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard Enable */
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+#define GEN9_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+#define GEN8_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+#define GEN75_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+#define GEN7_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+#define GEN6_MEDIA_VFE_STATE_ScoreboardEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardEnable_start 223
+#define GEN9_MEDIA_VFE_STATE_ScoreboardEnable_start 223
+#define GEN8_MEDIA_VFE_STATE_ScoreboardEnable_start 223
+#define GEN75_MEDIA_VFE_STATE_ScoreboardEnable_start 191
+#define GEN7_MEDIA_VFE_STATE_ScoreboardEnable_start 191
+#define GEN6_MEDIA_VFE_STATE_ScoreboardEnable_start 191
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 223;
+ case 9: return 223;
+ case 8: return 223;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 191;
+ } else {
+ return 191;
+ }
+ case 6: return 191;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard Mask */
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+#define GEN9_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+#define GEN8_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+#define GEN75_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+#define GEN7_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+#define GEN6_MEDIA_VFE_STATE_ScoreboardMask_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardMask_start 192
+#define GEN9_MEDIA_VFE_STATE_ScoreboardMask_start 192
+#define GEN8_MEDIA_VFE_STATE_ScoreboardMask_start 192
+#define GEN75_MEDIA_VFE_STATE_ScoreboardMask_start 160
+#define GEN7_MEDIA_VFE_STATE_ScoreboardMask_start 160
+#define GEN6_MEDIA_VFE_STATE_ScoreboardMask_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scoreboard Type */
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardType_bits 1
+#define GEN9_MEDIA_VFE_STATE_ScoreboardType_bits 1
+#define GEN8_MEDIA_VFE_STATE_ScoreboardType_bits 1
+#define GEN75_MEDIA_VFE_STATE_ScoreboardType_bits 1
+#define GEN7_MEDIA_VFE_STATE_ScoreboardType_bits 1
+#define GEN6_MEDIA_VFE_STATE_ScoreboardType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ScoreboardType_start 222
+#define GEN9_MEDIA_VFE_STATE_ScoreboardType_start 222
+#define GEN8_MEDIA_VFE_STATE_ScoreboardType_start 222
+#define GEN75_MEDIA_VFE_STATE_ScoreboardType_start 190
+#define GEN7_MEDIA_VFE_STATE_ScoreboardType_start 190
+#define GEN6_MEDIA_VFE_STATE_ScoreboardType_start 190
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScoreboardType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 222;
+ case 9: return 222;
+ case 8: return 222;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 190;
+ } else {
+ return 190;
+ }
+ case 6: return 190;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Scratch Space Base Pointer */
+
+
+#define GEN10_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 38
+#define GEN9_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 38
+#define GEN8_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 38
+#define GEN75_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN7_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN6_MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+#define GEN9_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+#define GEN8_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+#define GEN75_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+#define GEN7_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+#define GEN6_MEDIA_VFE_STATE_ScratchSpaceBasePointer_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 42;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Slice Disable */
+
+
+#define GEN10_MEDIA_VFE_STATE_SliceDisable_bits 2
+#define GEN9_MEDIA_VFE_STATE_SliceDisable_bits 2
+#define GEN8_MEDIA_VFE_STATE_SliceDisable_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SliceDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_SliceDisable_start 128
+#define GEN9_MEDIA_VFE_STATE_SliceDisable_start 128
+#define GEN8_MEDIA_VFE_STATE_SliceDisable_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SliceDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Stack Size */
+
+
+#define GEN10_MEDIA_VFE_STATE_StackSize_bits 4
+#define GEN9_MEDIA_VFE_STATE_StackSize_bits 4
+#define GEN8_MEDIA_VFE_STATE_StackSize_bits 4
+#define GEN75_MEDIA_VFE_STATE_StackSize_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_StackSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_StackSize_start 36
+#define GEN9_MEDIA_VFE_STATE_StackSize_start 36
+#define GEN8_MEDIA_VFE_STATE_StackSize_start 36
+#define GEN75_MEDIA_VFE_STATE_StackSize_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_StackSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::SubOpcode */
+
+
+#define GEN10_MEDIA_VFE_STATE_SubOpcode_bits 8
+#define GEN9_MEDIA_VFE_STATE_SubOpcode_bits 8
+#define GEN8_MEDIA_VFE_STATE_SubOpcode_bits 8
+#define GEN75_MEDIA_VFE_STATE_SubOpcode_bits 8
+#define GEN7_MEDIA_VFE_STATE_SubOpcode_bits 8
+#define GEN6_MEDIA_VFE_STATE_SubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_SubOpcode_start 16
+#define GEN9_MEDIA_VFE_STATE_SubOpcode_start 16
+#define GEN8_MEDIA_VFE_STATE_SubOpcode_start 16
+#define GEN75_MEDIA_VFE_STATE_SubOpcode_start 16
+#define GEN7_MEDIA_VFE_STATE_SubOpcode_start 16
+#define GEN6_MEDIA_VFE_STATE_SubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_SubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::Thread Dispatch Selection Policy */
+
+
+#define GEN10_MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_ThreadDispatchSelectionPolicy_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 100;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEDIA_VFE_STATE::URB Entry Allocation Size */
+
+
+#define GEN10_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+#define GEN9_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+#define GEN8_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+#define GEN75_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+#define GEN7_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+#define GEN6_MEDIA_VFE_STATE_URBEntryAllocationSize_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEDIA_VFE_STATE_URBEntryAllocationSize_start 176
+#define GEN9_MEDIA_VFE_STATE_URBEntryAllocationSize_start 176
+#define GEN8_MEDIA_VFE_STATE_URBEntryAllocationSize_start 176
+#define GEN75_MEDIA_VFE_STATE_URBEntryAllocationSize_start 144
+#define GEN7_MEDIA_VFE_STATE_URBEntryAllocationSize_start 144
+#define GEN6_MEDIA_VFE_STATE_URBEntryAllocationSize_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+MEDIA_VFE_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 176;
+ case 9: return 176;
+ case 8: return 176;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 144;
+ } else {
+ return 144;
+ }
+ case 6: return 144;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE */
+
+
+#define GEN10_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN9_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN75_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN6_MEMORY_OBJECT_CONTROL_STATE_length 1
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Age for QUADLRU */
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_AgeforQUADLRU_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Cacheability Control */
+
+
+#define GEN6_MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_bits 2
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_start 0
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_CacheabilityControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Encrypted Data */
+
+
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_EncryptedData_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_EncryptedData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_EncryptedData_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_EncryptedData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Graphics Data Type (GFDT) */
+
+
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_bits 1
+#define GEN6_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_bits 1
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_start 2
+#define GEN6_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_start 2
+#define GEN5_MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_GraphicsDataTypeGFDT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Index to MOCS Tables */
+
+
+#define GEN10_MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_bits 6
+#define GEN9_MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_start 1
+#define GEN9_MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_IndextoMOCSTables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::L3 Cacheability Control (L3CC) */
+
+
+#define GEN75_MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_bits 1
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_start 0
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_L3CacheabilityControlL3CC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::LLC Cacheability Control (LLCCC) */
+
+
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_LLCCacheabilityControlLLCCC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::LLC/eLLC Cacheability Control (LLCCC) */
+
+
+#define GEN75_MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_LLCeLLCCacheabilityControlLLCCC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Memory Type:LLC/eLLC Cacheability Control */
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_MemoryTypeLLCeLLCCacheabilityControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MEMORY_OBJECT_CONTROL_STATE::Target Cache */
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_TargetCache_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_TargetCache_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MEMORY_OBJECT_CONTROL_STATE_TargetCache_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MEMORY_OBJECT_CONTROL_STATE_TargetCache_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_CHECK */
+
+
+#define GEN10_MI_ARB_CHECK_length 1
+#define GEN9_MI_ARB_CHECK_length 1
+#define GEN8_MI_ARB_CHECK_length 1
+#define GEN75_MI_ARB_CHECK_length 1
+#define GEN7_MI_ARB_CHECK_length 1
+#define GEN6_MI_ARB_CHECK_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_CHECK_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_CHECK::Command Type */
+
+
+#define GEN10_MI_ARB_CHECK_CommandType_bits 3
+#define GEN9_MI_ARB_CHECK_CommandType_bits 3
+#define GEN8_MI_ARB_CHECK_CommandType_bits 3
+#define GEN75_MI_ARB_CHECK_CommandType_bits 3
+#define GEN7_MI_ARB_CHECK_CommandType_bits 3
+#define GEN6_MI_ARB_CHECK_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_CHECK_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ARB_CHECK_CommandType_start 29
+#define GEN9_MI_ARB_CHECK_CommandType_start 29
+#define GEN8_MI_ARB_CHECK_CommandType_start 29
+#define GEN75_MI_ARB_CHECK_CommandType_start 29
+#define GEN7_MI_ARB_CHECK_CommandType_start 29
+#define GEN6_MI_ARB_CHECK_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_CHECK_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_CHECK::MI Command Opcode */
+
+
+#define GEN10_MI_ARB_CHECK_MICommandOpcode_bits 6
+#define GEN9_MI_ARB_CHECK_MICommandOpcode_bits 6
+#define GEN8_MI_ARB_CHECK_MICommandOpcode_bits 6
+#define GEN75_MI_ARB_CHECK_MICommandOpcode_bits 6
+#define GEN7_MI_ARB_CHECK_MICommandOpcode_bits 6
+#define GEN6_MI_ARB_CHECK_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_CHECK_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ARB_CHECK_MICommandOpcode_start 23
+#define GEN9_MI_ARB_CHECK_MICommandOpcode_start 23
+#define GEN8_MI_ARB_CHECK_MICommandOpcode_start 23
+#define GEN75_MI_ARB_CHECK_MICommandOpcode_start 23
+#define GEN7_MI_ARB_CHECK_MICommandOpcode_start 23
+#define GEN6_MI_ARB_CHECK_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_CHECK_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_ON_OFF */
+
+
+#define GEN75_MI_ARB_ON_OFF_length 1
+#define GEN7_MI_ARB_ON_OFF_length 1
+#define GEN6_MI_ARB_ON_OFF_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_ON_OFF::Arbitration Enable */
+
+
+#define GEN75_MI_ARB_ON_OFF_ArbitrationEnable_bits 1
+#define GEN7_MI_ARB_ON_OFF_ArbitrationEnable_bits 1
+#define GEN6_MI_ARB_ON_OFF_ArbitrationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_ArbitrationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_ARB_ON_OFF_ArbitrationEnable_start 0
+#define GEN7_MI_ARB_ON_OFF_ArbitrationEnable_start 0
+#define GEN6_MI_ARB_ON_OFF_ArbitrationEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_ArbitrationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_ON_OFF::Command Type */
+
+
+#define GEN75_MI_ARB_ON_OFF_CommandType_bits 3
+#define GEN7_MI_ARB_ON_OFF_CommandType_bits 3
+#define GEN6_MI_ARB_ON_OFF_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_ARB_ON_OFF_CommandType_start 29
+#define GEN7_MI_ARB_ON_OFF_CommandType_start 29
+#define GEN6_MI_ARB_ON_OFF_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ARB_ON_OFF::MI Command Opcode */
+
+
+#define GEN75_MI_ARB_ON_OFF_MICommandOpcode_bits 6
+#define GEN7_MI_ARB_ON_OFF_MICommandOpcode_bits 6
+#define GEN6_MI_ARB_ON_OFF_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_ARB_ON_OFF_MICommandOpcode_start 23
+#define GEN7_MI_ARB_ON_OFF_MICommandOpcode_start 23
+#define GEN6_MI_ARB_ON_OFF_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ARB_ON_OFF_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC */
+
+
+#define GEN10_MI_ATOMIC_length 3
+#define GEN9_MI_ATOMIC_length 3
+#define GEN8_MI_ATOMIC_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::ATOMIC OPCODE */
+
+
+#define GEN10_MI_ATOMIC_ATOMICOPCODE_bits 8
+#define GEN9_MI_ATOMIC_ATOMICOPCODE_bits 8
+#define GEN8_MI_ATOMIC_ATOMICOPCODE_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_ATOMICOPCODE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_ATOMICOPCODE_start 8
+#define GEN9_MI_ATOMIC_ATOMICOPCODE_start 8
+#define GEN8_MI_ATOMIC_ATOMICOPCODE_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_ATOMICOPCODE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::CS STALL */
+
+
+#define GEN10_MI_ATOMIC_CSSTALL_bits 1
+#define GEN9_MI_ATOMIC_CSSTALL_bits 1
+#define GEN8_MI_ATOMIC_CSSTALL_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_CSSTALL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_CSSTALL_start 17
+#define GEN9_MI_ATOMIC_CSSTALL_start 17
+#define GEN8_MI_ATOMIC_CSSTALL_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_CSSTALL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Command Type */
+
+
+#define GEN10_MI_ATOMIC_CommandType_bits 3
+#define GEN9_MI_ATOMIC_CommandType_bits 3
+#define GEN8_MI_ATOMIC_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_CommandType_start 29
+#define GEN9_MI_ATOMIC_CommandType_start 29
+#define GEN8_MI_ATOMIC_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::DWord Length */
+
+
+#define GEN10_MI_ATOMIC_DWordLength_bits 8
+#define GEN9_MI_ATOMIC_DWordLength_bits 8
+#define GEN8_MI_ATOMIC_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_DWordLength_start 0
+#define GEN9_MI_ATOMIC_DWordLength_start 0
+#define GEN8_MI_ATOMIC_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Data Size */
+
+
+#define GEN10_MI_ATOMIC_DataSize_bits 2
+#define GEN9_MI_ATOMIC_DataSize_bits 2
+#define GEN8_MI_ATOMIC_DataSize_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_DataSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_DataSize_start 19
+#define GEN9_MI_ATOMIC_DataSize_start 19
+#define GEN8_MI_ATOMIC_DataSize_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_DataSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Inline Data */
+
+
+#define GEN10_MI_ATOMIC_InlineData_bits 1
+#define GEN9_MI_ATOMIC_InlineData_bits 1
+#define GEN8_MI_ATOMIC_InlineData_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_InlineData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_InlineData_start 18
+#define GEN9_MI_ATOMIC_InlineData_start 18
+#define GEN8_MI_ATOMIC_InlineData_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_InlineData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::MI Command Opcode */
+
+
+#define GEN10_MI_ATOMIC_MICommandOpcode_bits 6
+#define GEN9_MI_ATOMIC_MICommandOpcode_bits 6
+#define GEN8_MI_ATOMIC_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_MICommandOpcode_start 23
+#define GEN9_MI_ATOMIC_MICommandOpcode_start 23
+#define GEN8_MI_ATOMIC_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Memory Address */
+
+
+#define GEN10_MI_ATOMIC_MemoryAddress_bits 46
+#define GEN9_MI_ATOMIC_MemoryAddress_bits 46
+#define GEN8_MI_ATOMIC_MemoryAddress_bits 46
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_MemoryAddress_start 34
+#define GEN9_MI_ATOMIC_MemoryAddress_start 34
+#define GEN8_MI_ATOMIC_MemoryAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Memory Type */
+
+
+#define GEN10_MI_ATOMIC_MemoryType_bits 1
+#define GEN9_MI_ATOMIC_MemoryType_bits 1
+#define GEN8_MI_ATOMIC_MemoryType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MemoryType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_MemoryType_start 22
+#define GEN9_MI_ATOMIC_MemoryType_start 22
+#define GEN8_MI_ATOMIC_MemoryType_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_MemoryType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand1 Data Dword 0 */
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword0_bits 32
+#define GEN9_MI_ATOMIC_Operand1DataDword0_bits 32
+#define GEN8_MI_ATOMIC_Operand1DataDword0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword0_start 96
+#define GEN9_MI_ATOMIC_Operand1DataDword0_start 96
+#define GEN8_MI_ATOMIC_Operand1DataDword0_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand1 Data Dword 1 */
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword1_bits 32
+#define GEN9_MI_ATOMIC_Operand1DataDword1_bits 32
+#define GEN8_MI_ATOMIC_Operand1DataDword1_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword1_start 160
+#define GEN9_MI_ATOMIC_Operand1DataDword1_start 160
+#define GEN8_MI_ATOMIC_Operand1DataDword1_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand1 Data Dword 2 */
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword2_bits 32
+#define GEN9_MI_ATOMIC_Operand1DataDword2_bits 32
+#define GEN8_MI_ATOMIC_Operand1DataDword2_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword2_start 224
+#define GEN9_MI_ATOMIC_Operand1DataDword2_start 224
+#define GEN8_MI_ATOMIC_Operand1DataDword2_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand1 Data Dword 3 */
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword3_bits 32
+#define GEN9_MI_ATOMIC_Operand1DataDword3_bits 32
+#define GEN8_MI_ATOMIC_Operand1DataDword3_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand1DataDword3_start 288
+#define GEN9_MI_ATOMIC_Operand1DataDword3_start 288
+#define GEN8_MI_ATOMIC_Operand1DataDword3_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand1DataDword3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 288;
+ case 9: return 288;
+ case 8: return 288;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand2 Data Dword 0 */
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword0_bits 32
+#define GEN9_MI_ATOMIC_Operand2DataDword0_bits 32
+#define GEN8_MI_ATOMIC_Operand2DataDword0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword0_start 128
+#define GEN9_MI_ATOMIC_Operand2DataDword0_start 128
+#define GEN8_MI_ATOMIC_Operand2DataDword0_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand2 Data Dword 1 */
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword1_bits 32
+#define GEN9_MI_ATOMIC_Operand2DataDword1_bits 32
+#define GEN8_MI_ATOMIC_Operand2DataDword1_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword1_start 192
+#define GEN9_MI_ATOMIC_Operand2DataDword1_start 192
+#define GEN8_MI_ATOMIC_Operand2DataDword1_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand2 Data Dword 2 */
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword2_bits 32
+#define GEN9_MI_ATOMIC_Operand2DataDword2_bits 32
+#define GEN8_MI_ATOMIC_Operand2DataDword2_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword2_start 256
+#define GEN9_MI_ATOMIC_Operand2DataDword2_start 256
+#define GEN8_MI_ATOMIC_Operand2DataDword2_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Operand2 Data Dword 3 */
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword3_bits 32
+#define GEN9_MI_ATOMIC_Operand2DataDword3_bits 32
+#define GEN8_MI_ATOMIC_Operand2DataDword3_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_Operand2DataDword3_start 320
+#define GEN9_MI_ATOMIC_Operand2DataDword3_start 320
+#define GEN8_MI_ATOMIC_Operand2DataDword3_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_Operand2DataDword3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Post-Sync Operation */
+
+
+#define GEN10_MI_ATOMIC_PostSyncOperation_bits 1
+#define GEN9_MI_ATOMIC_PostSyncOperation_bits 1
+#define GEN8_MI_ATOMIC_PostSyncOperation_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_PostSyncOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_PostSyncOperation_start 21
+#define GEN9_MI_ATOMIC_PostSyncOperation_start 21
+#define GEN8_MI_ATOMIC_PostSyncOperation_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_PostSyncOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_ATOMIC::Return Data Control */
+
+
+#define GEN10_MI_ATOMIC_ReturnDataControl_bits 1
+#define GEN9_MI_ATOMIC_ReturnDataControl_bits 1
+#define GEN8_MI_ATOMIC_ReturnDataControl_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_ReturnDataControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_ATOMIC_ReturnDataControl_start 16
+#define GEN9_MI_ATOMIC_ReturnDataControl_start 16
+#define GEN8_MI_ATOMIC_ReturnDataControl_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_ATOMIC_ReturnDataControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_END */
+
+
+#define GEN10_MI_BATCH_BUFFER_END_length 1
+#define GEN9_MI_BATCH_BUFFER_END_length 1
+#define GEN8_MI_BATCH_BUFFER_END_length 1
+#define GEN75_MI_BATCH_BUFFER_END_length 1
+#define GEN7_MI_BATCH_BUFFER_END_length 1
+#define GEN6_MI_BATCH_BUFFER_END_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_END::Command Type */
+
+
+#define GEN10_MI_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN9_MI_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN8_MI_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN75_MI_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN7_MI_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN6_MI_BATCH_BUFFER_END_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_END_CommandType_start 29
+#define GEN9_MI_BATCH_BUFFER_END_CommandType_start 29
+#define GEN8_MI_BATCH_BUFFER_END_CommandType_start 29
+#define GEN75_MI_BATCH_BUFFER_END_CommandType_start 29
+#define GEN7_MI_BATCH_BUFFER_END_CommandType_start 29
+#define GEN6_MI_BATCH_BUFFER_END_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_END::End Context */
+
+
+#define GEN10_MI_BATCH_BUFFER_END_EndContext_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_EndContext_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_END_EndContext_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_EndContext_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_END::MI Command Opcode */
+
+
+#define GEN10_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN9_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN8_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN75_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN7_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN6_MI_BATCH_BUFFER_END_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN9_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN8_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN75_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN7_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN6_MI_BATCH_BUFFER_END_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_END_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_length 3
+#define GEN9_MI_BATCH_BUFFER_START_length 3
+#define GEN8_MI_BATCH_BUFFER_START_length 3
+#define GEN75_MI_BATCH_BUFFER_START_length 2
+#define GEN7_MI_BATCH_BUFFER_START_length 2
+#define GEN6_MI_BATCH_BUFFER_START_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::2nd Level Batch Buffer */
+
+
+#define GEN8_MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_bits 1
+#define GEN75_MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_start 22
+#define GEN75_MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_2ndLevelBatchBuffer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Add Offset Enable */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_AddOffsetEnable_bits 1
+#define GEN9_MI_BATCH_BUFFER_START_AddOffsetEnable_bits 1
+#define GEN8_MI_BATCH_BUFFER_START_AddOffsetEnable_bits 1
+#define GEN75_MI_BATCH_BUFFER_START_AddOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_AddOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_AddOffsetEnable_start 16
+#define GEN9_MI_BATCH_BUFFER_START_AddOffsetEnable_start 16
+#define GEN8_MI_BATCH_BUFFER_START_AddOffsetEnable_start 16
+#define GEN75_MI_BATCH_BUFFER_START_AddOffsetEnable_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_AddOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Address Space Indicator */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+#define GEN9_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+#define GEN8_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+#define GEN75_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+#define GEN7_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+#define GEN6_MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_AddressSpaceIndicator_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+#define GEN9_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+#define GEN8_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+#define GEN75_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+#define GEN7_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+#define GEN6_MI_BATCH_BUFFER_START_AddressSpaceIndicator_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_AddressSpaceIndicator_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Batch Buffer Start Address */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 62
+#define GEN9_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 62
+#define GEN8_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 46
+#define GEN75_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 30
+#define GEN7_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 30
+#define GEN6_MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_BatchBufferStartAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 30;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+#define GEN9_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+#define GEN8_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+#define GEN75_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+#define GEN7_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+#define GEN6_MI_BATCH_BUFFER_START_BatchBufferStartAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_BatchBufferStartAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Clear Command Buffer Enable */
+
+
+#define GEN75_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_bits 1
+#define GEN7_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_bits 1
+#define GEN6_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_ClearCommandBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_start 11
+#define GEN7_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_start 11
+#define GEN6_MI_BATCH_BUFFER_START_ClearCommandBufferEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_ClearCommandBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Command Type */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_CommandType_bits 3
+#define GEN9_MI_BATCH_BUFFER_START_CommandType_bits 3
+#define GEN8_MI_BATCH_BUFFER_START_CommandType_bits 3
+#define GEN75_MI_BATCH_BUFFER_START_CommandType_bits 3
+#define GEN7_MI_BATCH_BUFFER_START_CommandType_bits 3
+#define GEN6_MI_BATCH_BUFFER_START_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_CommandType_start 29
+#define GEN9_MI_BATCH_BUFFER_START_CommandType_start 29
+#define GEN8_MI_BATCH_BUFFER_START_CommandType_start 29
+#define GEN75_MI_BATCH_BUFFER_START_CommandType_start 29
+#define GEN7_MI_BATCH_BUFFER_START_CommandType_start 29
+#define GEN6_MI_BATCH_BUFFER_START_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::DWord Length */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_DWordLength_bits 8
+#define GEN9_MI_BATCH_BUFFER_START_DWordLength_bits 8
+#define GEN8_MI_BATCH_BUFFER_START_DWordLength_bits 8
+#define GEN75_MI_BATCH_BUFFER_START_DWordLength_bits 8
+#define GEN7_MI_BATCH_BUFFER_START_DWordLength_bits 8
+#define GEN6_MI_BATCH_BUFFER_START_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_DWordLength_start 0
+#define GEN9_MI_BATCH_BUFFER_START_DWordLength_start 0
+#define GEN8_MI_BATCH_BUFFER_START_DWordLength_start 0
+#define GEN75_MI_BATCH_BUFFER_START_DWordLength_start 0
+#define GEN7_MI_BATCH_BUFFER_START_DWordLength_start 0
+#define GEN6_MI_BATCH_BUFFER_START_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::MI Command Opcode */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+#define GEN9_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+#define GEN8_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+#define GEN75_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+#define GEN7_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+#define GEN6_MI_BATCH_BUFFER_START_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+#define GEN9_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+#define GEN8_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+#define GEN75_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+#define GEN7_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+#define GEN6_MI_BATCH_BUFFER_START_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Non-Privileged */
+
+
+#define GEN75_MI_BATCH_BUFFER_START_NonPrivileged_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_NonPrivileged_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_BATCH_BUFFER_START_NonPrivileged_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_NonPrivileged_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Predication Enable */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_PredicationEnable_bits 1
+#define GEN9_MI_BATCH_BUFFER_START_PredicationEnable_bits 1
+#define GEN8_MI_BATCH_BUFFER_START_PredicationEnable_bits 1
+#define GEN75_MI_BATCH_BUFFER_START_PredicationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_PredicationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_PredicationEnable_start 15
+#define GEN9_MI_BATCH_BUFFER_START_PredicationEnable_start 15
+#define GEN8_MI_BATCH_BUFFER_START_PredicationEnable_start 15
+#define GEN75_MI_BATCH_BUFFER_START_PredicationEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_PredicationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Resource Streamer Enable */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits 1
+#define GEN9_MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits 1
+#define GEN8_MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits 1
+#define GEN75_MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_ResourceStreamerEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_ResourceStreamerEnable_start 10
+#define GEN9_MI_BATCH_BUFFER_START_ResourceStreamerEnable_start 10
+#define GEN8_MI_BATCH_BUFFER_START_ResourceStreamerEnable_start 10
+#define GEN75_MI_BATCH_BUFFER_START_ResourceStreamerEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_ResourceStreamerEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_BATCH_BUFFER_START::Second Level Batch Buffer */
+
+
+#define GEN10_MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_bits 1
+#define GEN9_MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_start 22
+#define GEN9_MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_BATCH_BUFFER_START_SecondLevelBatchBuffer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH */
+
+
+
+
+
+/* MI_CLFLUSH::Command Type */
+
+
+#define GEN10_MI_CLFLUSH_CommandType_bits 3
+#define GEN9_MI_CLFLUSH_CommandType_bits 3
+#define GEN8_MI_CLFLUSH_CommandType_bits 3
+#define GEN75_MI_CLFLUSH_CommandType_bits 3
+#define GEN7_MI_CLFLUSH_CommandType_bits 3
+#define GEN6_MI_CLFLUSH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_CommandType_start 29
+#define GEN9_MI_CLFLUSH_CommandType_start 29
+#define GEN8_MI_CLFLUSH_CommandType_start 29
+#define GEN75_MI_CLFLUSH_CommandType_start 29
+#define GEN7_MI_CLFLUSH_CommandType_start 29
+#define GEN6_MI_CLFLUSH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::DW Representing a Half Cache Line */
+
+
+#define GEN10_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+#define GEN9_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+#define GEN8_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+#define GEN75_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+#define GEN7_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+#define GEN6_MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_DWRepresentingaHalfCacheLine_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+#define GEN9_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+#define GEN8_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+#define GEN75_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+#define GEN7_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+#define GEN6_MI_CLFLUSH_DWRepresentingaHalfCacheLine_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_DWRepresentingaHalfCacheLine_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::DWord Length */
+
+
+#define GEN10_MI_CLFLUSH_DWordLength_bits 10
+#define GEN9_MI_CLFLUSH_DWordLength_bits 10
+#define GEN8_MI_CLFLUSH_DWordLength_bits 10
+#define GEN75_MI_CLFLUSH_DWordLength_bits 10
+#define GEN7_MI_CLFLUSH_DWordLength_bits 10
+#define GEN6_MI_CLFLUSH_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_DWordLength_start 0
+#define GEN9_MI_CLFLUSH_DWordLength_start 0
+#define GEN8_MI_CLFLUSH_DWordLength_start 0
+#define GEN75_MI_CLFLUSH_DWordLength_start 0
+#define GEN7_MI_CLFLUSH_DWordLength_start 0
+#define GEN6_MI_CLFLUSH_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::MI Command Opcode */
+
+
+#define GEN10_MI_CLFLUSH_MICommandOpcode_bits 6
+#define GEN9_MI_CLFLUSH_MICommandOpcode_bits 6
+#define GEN8_MI_CLFLUSH_MICommandOpcode_bits 6
+#define GEN75_MI_CLFLUSH_MICommandOpcode_bits 6
+#define GEN7_MI_CLFLUSH_MICommandOpcode_bits 6
+#define GEN6_MI_CLFLUSH_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_MICommandOpcode_start 23
+#define GEN9_MI_CLFLUSH_MICommandOpcode_start 23
+#define GEN8_MI_CLFLUSH_MICommandOpcode_start 23
+#define GEN75_MI_CLFLUSH_MICommandOpcode_start 23
+#define GEN7_MI_CLFLUSH_MICommandOpcode_start 23
+#define GEN6_MI_CLFLUSH_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::Page Base Address */
+
+
+#define GEN10_MI_CLFLUSH_PageBaseAddress_bits 36
+#define GEN9_MI_CLFLUSH_PageBaseAddress_bits 36
+#define GEN8_MI_CLFLUSH_PageBaseAddress_bits 36
+#define GEN75_MI_CLFLUSH_PageBaseAddress_bits 20
+#define GEN7_MI_CLFLUSH_PageBaseAddress_bits 20
+#define GEN6_MI_CLFLUSH_PageBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_PageBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_PageBaseAddress_start 44
+#define GEN9_MI_CLFLUSH_PageBaseAddress_start 44
+#define GEN8_MI_CLFLUSH_PageBaseAddress_start 44
+#define GEN75_MI_CLFLUSH_PageBaseAddress_start 44
+#define GEN7_MI_CLFLUSH_PageBaseAddress_start 44
+#define GEN6_MI_CLFLUSH_PageBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_PageBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 44;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::Page Base Address High */
+
+
+#define GEN75_MI_CLFLUSH_PageBaseAddressHigh_bits 16
+#define GEN7_MI_CLFLUSH_PageBaseAddressHigh_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_PageBaseAddressHigh_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_CLFLUSH_PageBaseAddressHigh_start 64
+#define GEN7_MI_CLFLUSH_PageBaseAddressHigh_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_PageBaseAddressHigh_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::Starting Cacheline Offset */
+
+
+#define GEN10_MI_CLFLUSH_StartingCachelineOffset_bits 6
+#define GEN9_MI_CLFLUSH_StartingCachelineOffset_bits 6
+#define GEN8_MI_CLFLUSH_StartingCachelineOffset_bits 6
+#define GEN75_MI_CLFLUSH_StartingCachelineOffset_bits 6
+#define GEN7_MI_CLFLUSH_StartingCachelineOffset_bits 6
+#define GEN6_MI_CLFLUSH_StartingCachelineOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_StartingCachelineOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_StartingCachelineOffset_start 38
+#define GEN9_MI_CLFLUSH_StartingCachelineOffset_start 38
+#define GEN8_MI_CLFLUSH_StartingCachelineOffset_start 38
+#define GEN75_MI_CLFLUSH_StartingCachelineOffset_start 38
+#define GEN7_MI_CLFLUSH_StartingCachelineOffset_start 38
+#define GEN6_MI_CLFLUSH_StartingCachelineOffset_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_StartingCachelineOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CLFLUSH::Use Global GTT */
+
+
+#define GEN10_MI_CLFLUSH_UseGlobalGTT_bits 1
+#define GEN9_MI_CLFLUSH_UseGlobalGTT_bits 1
+#define GEN8_MI_CLFLUSH_UseGlobalGTT_bits 1
+#define GEN75_MI_CLFLUSH_UseGlobalGTT_bits 1
+#define GEN7_MI_CLFLUSH_UseGlobalGTT_bits 1
+#define GEN6_MI_CLFLUSH_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CLFLUSH_UseGlobalGTT_start 22
+#define GEN9_MI_CLFLUSH_UseGlobalGTT_start 22
+#define GEN8_MI_CLFLUSH_UseGlobalGTT_start 22
+#define GEN75_MI_CLFLUSH_UseGlobalGTT_start 22
+#define GEN7_MI_CLFLUSH_UseGlobalGTT_start 22
+#define GEN6_MI_CLFLUSH_UseGlobalGTT_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CLFLUSH_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_length 4
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_length 4
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_length 3
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_length 2
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_length 2
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Command Type */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Compare Address */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 61
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 61
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 45
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 29
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 29
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 61;
+ case 9: return 61;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start 67
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 67;
+ case 9: return 67;
+ case 8: return 67;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 67;
+ } else {
+ return 67;
+ }
+ case 6: return 67;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Compare Data Dword */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareDataDword_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Compare Mask Mode */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_bits 1
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_start 19
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareMaskMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Compare Semaphore */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_CompareSemaphore_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 21;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::DWord Length */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::MI Command Opcode */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_CONDITIONAL_BATCH_BUFFER_END::Use Global GTT */
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+#define GEN9_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+#define GEN8_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+#define GEN75_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+#define GEN7_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+#define GEN6_MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_CONDITIONAL_BATCH_BUFFER_END_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM */
+
+
+#define GEN10_MI_COPY_MEM_MEM_length 5
+#define GEN9_MI_COPY_MEM_MEM_length 5
+#define GEN8_MI_COPY_MEM_MEM_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::Command Type */
+
+
+#define GEN10_MI_COPY_MEM_MEM_CommandType_bits 3
+#define GEN9_MI_COPY_MEM_MEM_CommandType_bits 3
+#define GEN8_MI_COPY_MEM_MEM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_CommandType_start 29
+#define GEN9_MI_COPY_MEM_MEM_CommandType_start 29
+#define GEN8_MI_COPY_MEM_MEM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::DWord Length */
+
+
+#define GEN10_MI_COPY_MEM_MEM_DWordLength_bits 8
+#define GEN9_MI_COPY_MEM_MEM_DWordLength_bits 8
+#define GEN8_MI_COPY_MEM_MEM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_DWordLength_start 0
+#define GEN9_MI_COPY_MEM_MEM_DWordLength_start 0
+#define GEN8_MI_COPY_MEM_MEM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::Destination Memory Address */
+
+
+#define GEN10_MI_COPY_MEM_MEM_DestinationMemoryAddress_bits 62
+#define GEN9_MI_COPY_MEM_MEM_DestinationMemoryAddress_bits 62
+#define GEN8_MI_COPY_MEM_MEM_DestinationMemoryAddress_bits 62
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_DestinationMemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_DestinationMemoryAddress_start 34
+#define GEN9_MI_COPY_MEM_MEM_DestinationMemoryAddress_start 34
+#define GEN8_MI_COPY_MEM_MEM_DestinationMemoryAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_DestinationMemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::MI Command Opcode */
+
+
+#define GEN10_MI_COPY_MEM_MEM_MICommandOpcode_bits 6
+#define GEN9_MI_COPY_MEM_MEM_MICommandOpcode_bits 6
+#define GEN8_MI_COPY_MEM_MEM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_MICommandOpcode_start 23
+#define GEN9_MI_COPY_MEM_MEM_MICommandOpcode_start 23
+#define GEN8_MI_COPY_MEM_MEM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::Source Memory Address */
+
+
+#define GEN10_MI_COPY_MEM_MEM_SourceMemoryAddress_bits 62
+#define GEN9_MI_COPY_MEM_MEM_SourceMemoryAddress_bits 62
+#define GEN8_MI_COPY_MEM_MEM_SourceMemoryAddress_bits 62
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_SourceMemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_SourceMemoryAddress_start 98
+#define GEN9_MI_COPY_MEM_MEM_SourceMemoryAddress_start 98
+#define GEN8_MI_COPY_MEM_MEM_SourceMemoryAddress_start 98
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_SourceMemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 98;
+ case 9: return 98;
+ case 8: return 98;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::Use Global GTT Destination */
+
+
+#define GEN10_MI_COPY_MEM_MEM_UseGlobalGTTDestination_bits 1
+#define GEN9_MI_COPY_MEM_MEM_UseGlobalGTTDestination_bits 1
+#define GEN8_MI_COPY_MEM_MEM_UseGlobalGTTDestination_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_UseGlobalGTTDestination_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_UseGlobalGTTDestination_start 21
+#define GEN9_MI_COPY_MEM_MEM_UseGlobalGTTDestination_start 21
+#define GEN8_MI_COPY_MEM_MEM_UseGlobalGTTDestination_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_UseGlobalGTTDestination_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_COPY_MEM_MEM::Use Global GTT Source */
+
+
+#define GEN10_MI_COPY_MEM_MEM_UseGlobalGTTSource_bits 1
+#define GEN9_MI_COPY_MEM_MEM_UseGlobalGTTSource_bits 1
+#define GEN8_MI_COPY_MEM_MEM_UseGlobalGTTSource_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_UseGlobalGTTSource_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_COPY_MEM_MEM_UseGlobalGTTSource_start 22
+#define GEN9_MI_COPY_MEM_MEM_UseGlobalGTTSource_start 22
+#define GEN8_MI_COPY_MEM_MEM_UseGlobalGTTSource_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_COPY_MEM_MEM_UseGlobalGTTSource_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP */
+
+
+#define GEN10_MI_DISPLAY_FLIP_length 3
+#define GEN9_MI_DISPLAY_FLIP_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Async Flip Indicator */
+
+
+#define GEN10_MI_DISPLAY_FLIP_AsyncFlipIndicator_bits 1
+#define GEN9_MI_DISPLAY_FLIP_AsyncFlipIndicator_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_AsyncFlipIndicator_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_AsyncFlipIndicator_start 22
+#define GEN9_MI_DISPLAY_FLIP_AsyncFlipIndicator_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_AsyncFlipIndicator_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Command Type */
+
+
+#define GEN10_MI_DISPLAY_FLIP_CommandType_bits 3
+#define GEN9_MI_DISPLAY_FLIP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_CommandType_start 29
+#define GEN9_MI_DISPLAY_FLIP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::DWord Length */
+
+
+#define GEN10_MI_DISPLAY_FLIP_DWordLength_bits 8
+#define GEN9_MI_DISPLAY_FLIP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_DWordLength_start 0
+#define GEN9_MI_DISPLAY_FLIP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Display Buffer Base Address */
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayBufferBaseAddress_bits 20
+#define GEN9_MI_DISPLAY_FLIP_DisplayBufferBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayBufferBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayBufferBaseAddress_start 76
+#define GEN9_MI_DISPLAY_FLIP_DisplayBufferBaseAddress_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayBufferBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 76;
+ case 9: return 76;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Display Buffer Pitch */
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayBufferPitch_bits 10
+#define GEN9_MI_DISPLAY_FLIP_DisplayBufferPitch_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayBufferPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayBufferPitch_start 38
+#define GEN9_MI_DISPLAY_FLIP_DisplayBufferPitch_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayBufferPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Display Plane Select */
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayPlaneSelect_bits 5
+#define GEN9_MI_DISPLAY_FLIP_DisplayPlaneSelect_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_DisplayPlaneSelect_start 8
+#define GEN9_MI_DISPLAY_FLIP_DisplayPlaneSelect_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Flip Type */
+
+
+#define GEN10_MI_DISPLAY_FLIP_FlipType_bits 2
+#define GEN9_MI_DISPLAY_FLIP_FlipType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_FlipType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_FlipType_start 64
+#define GEN9_MI_DISPLAY_FLIP_FlipType_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_FlipType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Left Eye Display Buffer Base Address */
+
+
+#define GEN10_MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_bits 20
+#define GEN9_MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_start 108
+#define GEN9_MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_LeftEyeDisplayBufferBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 108;
+ case 9: return 108;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::MI Command Opcode */
+
+
+#define GEN10_MI_DISPLAY_FLIP_MICommandOpcode_bits 6
+#define GEN9_MI_DISPLAY_FLIP_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_MICommandOpcode_start 23
+#define GEN9_MI_DISPLAY_FLIP_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Stereoscopic 3D Mode */
+
+
+#define GEN10_MI_DISPLAY_FLIP_Stereoscopic3DMode_bits 1
+#define GEN9_MI_DISPLAY_FLIP_Stereoscopic3DMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_Stereoscopic3DMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_Stereoscopic3DMode_start 63
+#define GEN9_MI_DISPLAY_FLIP_Stereoscopic3DMode_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_Stereoscopic3DMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 63;
+ case 9: return 63;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::Tile Parameter */
+
+
+#define GEN10_MI_DISPLAY_FLIP_TileParameter_bits 3
+#define GEN9_MI_DISPLAY_FLIP_TileParameter_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_TileParameter_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_TileParameter_start 32
+#define GEN9_MI_DISPLAY_FLIP_TileParameter_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_TileParameter_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_DISPLAY_FLIP::VRR Master Flip */
+
+
+#define GEN10_MI_DISPLAY_FLIP_VRRMasterFlip_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_VRRMasterFlip_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_DISPLAY_FLIP_VRRMasterFlip_start 75
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_DISPLAY_FLIP_VRRMasterFlip_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 75;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH */
+
+
+#define GEN75_MI_FLUSH_length 1
+#define GEN7_MI_FLUSH_length 1
+#define GEN6_MI_FLUSH_length 1
+#define GEN5_MI_FLUSH_length 1
+#define GEN45_MI_FLUSH_length 1
+#define GEN4_MI_FLUSH_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Command Type */
+
+
+#define GEN75_MI_FLUSH_CommandType_bits 3
+#define GEN7_MI_FLUSH_CommandType_bits 3
+#define GEN6_MI_FLUSH_CommandType_bits 3
+#define GEN5_MI_FLUSH_CommandType_bits 3
+#define GEN45_MI_FLUSH_CommandType_bits 3
+#define GEN4_MI_FLUSH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_CommandType_start 29
+#define GEN7_MI_FLUSH_CommandType_start 29
+#define GEN6_MI_FLUSH_CommandType_start 29
+#define GEN5_MI_FLUSH_CommandType_start 29
+#define GEN45_MI_FLUSH_CommandType_start 29
+#define GEN4_MI_FLUSH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Generic Media State Clear */
+
+
+#define GEN75_MI_FLUSH_GenericMediaStateClear_bits 1
+#define GEN7_MI_FLUSH_GenericMediaStateClear_bits 1
+#define GEN6_MI_FLUSH_GenericMediaStateClear_bits 1
+#define GEN5_MI_FLUSH_GenericMediaStateClear_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_GenericMediaStateClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_GenericMediaStateClear_start 4
+#define GEN7_MI_FLUSH_GenericMediaStateClear_start 4
+#define GEN6_MI_FLUSH_GenericMediaStateClear_start 4
+#define GEN5_MI_FLUSH_GenericMediaStateClear_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_GenericMediaStateClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Global Snapshot Count Reset */
+
+
+#define GEN75_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+#define GEN7_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+#define GEN6_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+#define GEN5_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+#define GEN45_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+#define GEN4_MI_FLUSH_GlobalSnapshotCountReset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_GlobalSnapshotCountReset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_GlobalSnapshotCountReset_start 3
+#define GEN7_MI_FLUSH_GlobalSnapshotCountReset_start 3
+#define GEN6_MI_FLUSH_GlobalSnapshotCountReset_start 3
+#define GEN5_MI_FLUSH_GlobalSnapshotCountReset_start 3
+#define GEN45_MI_FLUSH_GlobalSnapshotCountReset_start 3
+#define GEN4_MI_FLUSH_GlobalSnapshotCountReset_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_GlobalSnapshotCountReset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Indirect State Pointers Disable */
+
+
+#define GEN75_MI_FLUSH_IndirectStatePointersDisable_bits 1
+#define GEN7_MI_FLUSH_IndirectStatePointersDisable_bits 1
+#define GEN6_MI_FLUSH_IndirectStatePointersDisable_bits 1
+#define GEN5_MI_FLUSH_IndirectStatePointersDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_IndirectStatePointersDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_IndirectStatePointersDisable_start 5
+#define GEN7_MI_FLUSH_IndirectStatePointersDisable_start 5
+#define GEN6_MI_FLUSH_IndirectStatePointersDisable_start 5
+#define GEN5_MI_FLUSH_IndirectStatePointersDisable_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_IndirectStatePointersDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::MI Command Opcode */
+
+
+#define GEN75_MI_FLUSH_MICommandOpcode_bits 6
+#define GEN7_MI_FLUSH_MICommandOpcode_bits 6
+#define GEN6_MI_FLUSH_MICommandOpcode_bits 6
+#define GEN5_MI_FLUSH_MICommandOpcode_bits 6
+#define GEN45_MI_FLUSH_MICommandOpcode_bits 6
+#define GEN4_MI_FLUSH_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_MICommandOpcode_start 23
+#define GEN7_MI_FLUSH_MICommandOpcode_start 23
+#define GEN6_MI_FLUSH_MICommandOpcode_start 23
+#define GEN5_MI_FLUSH_MICommandOpcode_start 23
+#define GEN45_MI_FLUSH_MICommandOpcode_start 23
+#define GEN4_MI_FLUSH_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 23;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 23;
+ } else {
+ return 23;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Protected Memory Enable */
+
+
+#define GEN5_MI_FLUSH_ProtectedMemoryEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_ProtectedMemoryEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MI_FLUSH_ProtectedMemoryEnable_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_ProtectedMemoryEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::Render Cache Flush Inhibit */
+
+
+#define GEN75_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+#define GEN7_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+#define GEN6_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+#define GEN5_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+#define GEN45_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+#define GEN4_MI_FLUSH_RenderCacheFlushInhibit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_RenderCacheFlushInhibit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_RenderCacheFlushInhibit_start 2
+#define GEN7_MI_FLUSH_RenderCacheFlushInhibit_start 2
+#define GEN6_MI_FLUSH_RenderCacheFlushInhibit_start 2
+#define GEN5_MI_FLUSH_RenderCacheFlushInhibit_start 2
+#define GEN45_MI_FLUSH_RenderCacheFlushInhibit_start 2
+#define GEN4_MI_FLUSH_RenderCacheFlushInhibit_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_RenderCacheFlushInhibit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FLUSH::State/Instruction Cache Invalidate */
+
+
+#define GEN75_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+#define GEN7_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+#define GEN6_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+#define GEN5_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+#define GEN45_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+#define GEN4_MI_FLUSH_StateInstructionCacheInvalidate_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_StateInstructionCacheInvalidate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+#define GEN7_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+#define GEN6_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+#define GEN5_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+#define GEN45_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+#define GEN4_MI_FLUSH_StateInstructionCacheInvalidate_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FLUSH_StateInstructionCacheInvalidate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP */
+
+
+#define GEN10_MI_FORCE_WAKEUP_length 2
+#define GEN9_MI_FORCE_WAKEUP_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::Command Type */
+
+
+#define GEN10_MI_FORCE_WAKEUP_CommandType_bits 3
+#define GEN9_MI_FORCE_WAKEUP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_CommandType_start 29
+#define GEN9_MI_FORCE_WAKEUP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::DWord Length */
+
+
+#define GEN10_MI_FORCE_WAKEUP_DWordLength_bits 8
+#define GEN9_MI_FORCE_WAKEUP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_DWordLength_start 0
+#define GEN9_MI_FORCE_WAKEUP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::Force Media Awake */
+
+
+#define GEN10_MI_FORCE_WAKEUP_ForceMediaAwake_bits 1
+#define GEN9_MI_FORCE_WAKEUP_ForceMediaAwake_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_ForceMediaAwake_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_ForceMediaAwake_start 32
+#define GEN9_MI_FORCE_WAKEUP_ForceMediaAwake_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_ForceMediaAwake_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::Force Render Awake */
+
+
+#define GEN10_MI_FORCE_WAKEUP_ForceRenderAwake_bits 1
+#define GEN9_MI_FORCE_WAKEUP_ForceRenderAwake_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_ForceRenderAwake_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_ForceRenderAwake_start 33
+#define GEN9_MI_FORCE_WAKEUP_ForceRenderAwake_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_ForceRenderAwake_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::MI Command Opcode */
+
+
+#define GEN10_MI_FORCE_WAKEUP_MICommandOpcode_bits 6
+#define GEN9_MI_FORCE_WAKEUP_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_MICommandOpcode_start 23
+#define GEN9_MI_FORCE_WAKEUP_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_FORCE_WAKEUP::Mask Bits */
+
+
+#define GEN10_MI_FORCE_WAKEUP_MaskBits_bits 16
+#define GEN9_MI_FORCE_WAKEUP_MaskBits_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_MaskBits_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_FORCE_WAKEUP_MaskBits_start 48
+#define GEN9_MI_FORCE_WAKEUP_MaskBits_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_FORCE_WAKEUP_MaskBits_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_length 3
+#define GEN9_MI_LOAD_REGISTER_IMM_length 3
+#define GEN8_MI_LOAD_REGISTER_IMM_length 3
+#define GEN75_MI_LOAD_REGISTER_IMM_length 3
+#define GEN7_MI_LOAD_REGISTER_IMM_length 3
+#define GEN6_MI_LOAD_REGISTER_IMM_length 3
+#define GEN5_MI_LOAD_REGISTER_IMM_length 3
+#define GEN45_MI_LOAD_REGISTER_IMM_length 3
+#define GEN4_MI_LOAD_REGISTER_IMM_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::Byte Write Disables */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN9_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN8_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN75_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN7_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN6_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN5_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN45_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+#define GEN4_MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_ByteWriteDisables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN9_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN8_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN75_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN7_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN6_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN5_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN45_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+#define GEN4_MI_LOAD_REGISTER_IMM_ByteWriteDisables_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_ByteWriteDisables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::Command Type */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN9_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN8_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN75_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN7_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN6_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN5_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN45_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+#define GEN4_MI_LOAD_REGISTER_IMM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN9_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN8_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN75_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN7_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN6_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN5_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN45_MI_LOAD_REGISTER_IMM_CommandType_start 29
+#define GEN4_MI_LOAD_REGISTER_IMM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::DWord Length */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN9_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN8_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN75_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN7_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN6_MI_LOAD_REGISTER_IMM_DWordLength_bits 8
+#define GEN5_MI_LOAD_REGISTER_IMM_DWordLength_bits 6
+#define GEN45_MI_LOAD_REGISTER_IMM_DWordLength_bits 6
+#define GEN4_MI_LOAD_REGISTER_IMM_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN9_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN8_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN75_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN7_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN6_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN5_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN45_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+#define GEN4_MI_LOAD_REGISTER_IMM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::Data DWord */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN9_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN8_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN75_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN7_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN6_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN5_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN45_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+#define GEN4_MI_LOAD_REGISTER_IMM_DataDWord_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_DataDWord_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN9_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN8_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN75_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN7_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN6_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN5_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN45_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+#define GEN4_MI_LOAD_REGISTER_IMM_DataDWord_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_DataDWord_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::MI Command Opcode */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN9_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN7_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN6_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN5_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN45_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+#define GEN4_MI_LOAD_REGISTER_IMM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN9_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN7_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN6_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN5_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN45_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+#define GEN4_MI_LOAD_REGISTER_IMM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 23;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 23;
+ } else {
+ return 23;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_IMM::Register Offset */
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN9_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN8_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN75_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN7_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN6_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 21
+#define GEN5_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 30
+#define GEN45_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 30
+#define GEN4_MI_LOAD_REGISTER_IMM_RegisterOffset_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_RegisterOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 21;
+ case 5: return 30;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 30;
+ } else {
+ return 30;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN9_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN8_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN75_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN7_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN6_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN5_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN45_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+#define GEN4_MI_LOAD_REGISTER_IMM_RegisterOffset_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_IMM_RegisterOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 34;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 34;
+ } else {
+ return 34;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_length 4
+#define GEN9_MI_LOAD_REGISTER_MEM_length 4
+#define GEN8_MI_LOAD_REGISTER_MEM_length 4
+#define GEN75_MI_LOAD_REGISTER_MEM_length 3
+#define GEN7_MI_LOAD_REGISTER_MEM_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::Async Mode Enable */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits 1
+#define GEN9_MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits 1
+#define GEN8_MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits 1
+#define GEN75_MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits 1
+#define GEN7_MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_AsyncModeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_AsyncModeEnable_start 21
+#define GEN9_MI_LOAD_REGISTER_MEM_AsyncModeEnable_start 21
+#define GEN8_MI_LOAD_REGISTER_MEM_AsyncModeEnable_start 21
+#define GEN75_MI_LOAD_REGISTER_MEM_AsyncModeEnable_start 21
+#define GEN7_MI_LOAD_REGISTER_MEM_AsyncModeEnable_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_AsyncModeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::Command Type */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_CommandType_bits 3
+#define GEN9_MI_LOAD_REGISTER_MEM_CommandType_bits 3
+#define GEN8_MI_LOAD_REGISTER_MEM_CommandType_bits 3
+#define GEN75_MI_LOAD_REGISTER_MEM_CommandType_bits 3
+#define GEN7_MI_LOAD_REGISTER_MEM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_CommandType_start 29
+#define GEN9_MI_LOAD_REGISTER_MEM_CommandType_start 29
+#define GEN8_MI_LOAD_REGISTER_MEM_CommandType_start 29
+#define GEN75_MI_LOAD_REGISTER_MEM_CommandType_start 29
+#define GEN7_MI_LOAD_REGISTER_MEM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::DWord Length */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_DWordLength_bits 8
+#define GEN9_MI_LOAD_REGISTER_MEM_DWordLength_bits 8
+#define GEN8_MI_LOAD_REGISTER_MEM_DWordLength_bits 8
+#define GEN75_MI_LOAD_REGISTER_MEM_DWordLength_bits 8
+#define GEN7_MI_LOAD_REGISTER_MEM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_DWordLength_start 0
+#define GEN9_MI_LOAD_REGISTER_MEM_DWordLength_start 0
+#define GEN8_MI_LOAD_REGISTER_MEM_DWordLength_start 0
+#define GEN75_MI_LOAD_REGISTER_MEM_DWordLength_start 0
+#define GEN7_MI_LOAD_REGISTER_MEM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::MI Command Opcode */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN9_MI_LOAD_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN7_MI_LOAD_REGISTER_MEM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN9_MI_LOAD_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN7_MI_LOAD_REGISTER_MEM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::Memory Address */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN9_MI_LOAD_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN8_MI_LOAD_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN75_MI_LOAD_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN7_MI_LOAD_REGISTER_MEM_MemoryAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_MemoryAddress_start 66
+#define GEN9_MI_LOAD_REGISTER_MEM_MemoryAddress_start 66
+#define GEN8_MI_LOAD_REGISTER_MEM_MemoryAddress_start 66
+#define GEN75_MI_LOAD_REGISTER_MEM_MemoryAddress_start 66
+#define GEN7_MI_LOAD_REGISTER_MEM_MemoryAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::Register Address */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN9_MI_LOAD_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN8_MI_LOAD_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN75_MI_LOAD_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN7_MI_LOAD_REGISTER_MEM_RegisterAddress_bits 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_RegisterAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_RegisterAddress_start 34
+#define GEN9_MI_LOAD_REGISTER_MEM_RegisterAddress_start 34
+#define GEN8_MI_LOAD_REGISTER_MEM_RegisterAddress_start 34
+#define GEN75_MI_LOAD_REGISTER_MEM_RegisterAddress_start 34
+#define GEN7_MI_LOAD_REGISTER_MEM_RegisterAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_RegisterAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_MEM::Use Global GTT */
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN9_MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN8_MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN75_MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN7_MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN9_MI_LOAD_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN8_MI_LOAD_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN75_MI_LOAD_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN7_MI_LOAD_REGISTER_MEM_UseGlobalGTT_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_MEM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_length 3
+#define GEN9_MI_LOAD_REGISTER_REG_length 3
+#define GEN8_MI_LOAD_REGISTER_REG_length 3
+#define GEN75_MI_LOAD_REGISTER_REG_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG::Command Type */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_CommandType_bits 3
+#define GEN9_MI_LOAD_REGISTER_REG_CommandType_bits 3
+#define GEN8_MI_LOAD_REGISTER_REG_CommandType_bits 3
+#define GEN75_MI_LOAD_REGISTER_REG_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_CommandType_start 29
+#define GEN9_MI_LOAD_REGISTER_REG_CommandType_start 29
+#define GEN8_MI_LOAD_REGISTER_REG_CommandType_start 29
+#define GEN75_MI_LOAD_REGISTER_REG_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG::DWord Length */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_DWordLength_bits 8
+#define GEN9_MI_LOAD_REGISTER_REG_DWordLength_bits 8
+#define GEN8_MI_LOAD_REGISTER_REG_DWordLength_bits 8
+#define GEN75_MI_LOAD_REGISTER_REG_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_DWordLength_start 0
+#define GEN9_MI_LOAD_REGISTER_REG_DWordLength_start 0
+#define GEN8_MI_LOAD_REGISTER_REG_DWordLength_start 0
+#define GEN75_MI_LOAD_REGISTER_REG_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG::Destination Register Address */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits 21
+#define GEN9_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits 21
+#define GEN8_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits 21
+#define GEN75_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_DestinationRegisterAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start 66
+#define GEN9_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start 66
+#define GEN8_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start 66
+#define GEN75_MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_DestinationRegisterAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG::MI Command Opcode */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_MICommandOpcode_bits 6
+#define GEN9_MI_LOAD_REGISTER_REG_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_REGISTER_REG_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_REGISTER_REG_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_MICommandOpcode_start 23
+#define GEN9_MI_LOAD_REGISTER_REG_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_REGISTER_REG_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_REGISTER_REG_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_REGISTER_REG::Source Register Address */
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits 21
+#define GEN9_MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits 21
+#define GEN8_MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits 21
+#define GEN75_MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_SourceRegisterAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_REGISTER_REG_SourceRegisterAddress_start 34
+#define GEN9_MI_LOAD_REGISTER_REG_SourceRegisterAddress_start 34
+#define GEN8_MI_LOAD_REGISTER_REG_SourceRegisterAddress_start 34
+#define GEN75_MI_LOAD_REGISTER_REG_SourceRegisterAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_REGISTER_REG_SourceRegisterAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_length 2
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_length 2
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_length 2
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_length 2
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::Command Type */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_CommandType_bits 3
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_CommandType_bits 3
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_CommandType_bits 3
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_CommandType_bits 3
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_CommandType_start 29
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_CommandType_start 29
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_CommandType_start 29
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_CommandType_start 29
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::DWord Length */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits 6
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits 6
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits 6
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits 6
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_DWordLength_start 0
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_DWordLength_start 0
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_DWordLength_start 0
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_DWordLength_start 0
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::Display (Plane) Select */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits 3
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits 3
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits 3
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits 3
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start 19
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start 19
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start 19
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start 19
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 19;
+ } else {
+ return 0;
+ }
+ case 6: return 19;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::End Scan Line Number */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits 13
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits 13
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits 13
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits 13
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start 32
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start 32
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start 32
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start 32
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_EndScanLineNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::MI Command Opcode */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits 6
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits 6
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start 23
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start 23
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_EXCL::Start Scan Line Number */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits 13
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits 13
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits 13
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits 13
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start 48
+#define GEN9_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start 48
+#define GEN8_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start 48
+#define GEN75_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start 48
+#define GEN6_MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_EXCL_StartScanLineNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_length 2
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_length 2
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_length 2
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::Command Type */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_CommandType_bits 3
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_CommandType_bits 3
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_CommandType_bits 3
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_CommandType_start 29
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_CommandType_start 29
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_CommandType_start 29
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::DWord Length */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_DWordLength_bits 6
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_DWordLength_bits 6
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_DWordLength_bits 6
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_DWordLength_start 0
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_DWordLength_start 0
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_DWordLength_start 0
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::Display (Plane) Select */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits 3
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits 3
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits 3
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start 19
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start 19
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start 19
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_DisplayPlaneSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 19;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::End Scan Line Number */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits 13
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits 13
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits 13
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start 32
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start 32
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start 32
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_EndScanLineNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::MI Command Opcode */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits 6
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start 23
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::Scan Line Event Done Forward */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_bits 2
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_bits 2
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_start 17
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_start 17
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_ScanLineEventDoneForward_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_SCAN_LINES_INCL::Start Scan Line Number */
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits 13
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits 13
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits 13
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start 48
+#define GEN9_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start 48
+#define GEN8_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start 48
+#define GEN75_MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_SCAN_LINES_INCL_StartScanLineNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM */
+
+
+#define GEN9_MI_LOAD_URB_MEM_length 4
+#define GEN8_MI_LOAD_URB_MEM_length 4
+#define GEN75_MI_LOAD_URB_MEM_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM::Command Type */
+
+
+#define GEN9_MI_LOAD_URB_MEM_CommandType_bits 3
+#define GEN8_MI_LOAD_URB_MEM_CommandType_bits 3
+#define GEN75_MI_LOAD_URB_MEM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_LOAD_URB_MEM_CommandType_start 29
+#define GEN8_MI_LOAD_URB_MEM_CommandType_start 29
+#define GEN75_MI_LOAD_URB_MEM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM::DWord Length */
+
+
+#define GEN9_MI_LOAD_URB_MEM_DWordLength_bits 8
+#define GEN8_MI_LOAD_URB_MEM_DWordLength_bits 8
+#define GEN75_MI_LOAD_URB_MEM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_LOAD_URB_MEM_DWordLength_start 0
+#define GEN8_MI_LOAD_URB_MEM_DWordLength_start 0
+#define GEN75_MI_LOAD_URB_MEM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM::MI Command Opcode */
+
+
+#define GEN9_MI_LOAD_URB_MEM_MICommandOpcode_bits 6
+#define GEN8_MI_LOAD_URB_MEM_MICommandOpcode_bits 6
+#define GEN75_MI_LOAD_URB_MEM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_LOAD_URB_MEM_MICommandOpcode_start 23
+#define GEN8_MI_LOAD_URB_MEM_MICommandOpcode_start 23
+#define GEN75_MI_LOAD_URB_MEM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM::Memory Address */
+
+
+#define GEN9_MI_LOAD_URB_MEM_MemoryAddress_bits 58
+#define GEN8_MI_LOAD_URB_MEM_MemoryAddress_bits 58
+#define GEN75_MI_LOAD_URB_MEM_MemoryAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_LOAD_URB_MEM_MemoryAddress_start 70
+#define GEN8_MI_LOAD_URB_MEM_MemoryAddress_start 70
+#define GEN75_MI_LOAD_URB_MEM_MemoryAddress_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_LOAD_URB_MEM::URB Address */
+
+
+#define GEN9_MI_LOAD_URB_MEM_URBAddress_bits 13
+#define GEN8_MI_LOAD_URB_MEM_URBAddress_bits 13
+#define GEN75_MI_LOAD_URB_MEM_URBAddress_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_URBAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_LOAD_URB_MEM_URBAddress_start 34
+#define GEN8_MI_LOAD_URB_MEM_URBAddress_start 34
+#define GEN75_MI_LOAD_URB_MEM_URBAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_LOAD_URB_MEM_URBAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH */
+
+
+
+
+
+/* MI_MATH::Command Type */
+
+
+#define GEN10_MI_MATH_CommandType_bits 3
+#define GEN9_MI_MATH_CommandType_bits 3
+#define GEN8_MI_MATH_CommandType_bits 3
+#define GEN75_MI_MATH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_CommandType_start 29
+#define GEN9_MI_MATH_CommandType_start 29
+#define GEN8_MI_MATH_CommandType_start 29
+#define GEN75_MI_MATH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH::DWord Length */
+
+
+#define GEN10_MI_MATH_DWordLength_bits 8
+#define GEN9_MI_MATH_DWordLength_bits 8
+#define GEN8_MI_MATH_DWordLength_bits 6
+#define GEN75_MI_MATH_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_DWordLength_start 0
+#define GEN9_MI_MATH_DWordLength_start 0
+#define GEN8_MI_MATH_DWordLength_start 0
+#define GEN75_MI_MATH_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH::Instruction */
+
+
+#define GEN10_MI_MATH_Instruction_bits 32
+#define GEN9_MI_MATH_Instruction_bits 32
+#define GEN8_MI_MATH_Instruction_bits 32
+#define GEN75_MI_MATH_Instruction_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_Instruction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_Instruction_start 0
+#define GEN9_MI_MATH_Instruction_start 0
+#define GEN8_MI_MATH_Instruction_start 0
+#define GEN75_MI_MATH_Instruction_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_Instruction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH::MI Command Opcode */
+
+
+#define GEN10_MI_MATH_MICommandOpcode_bits 6
+#define GEN9_MI_MATH_MICommandOpcode_bits 6
+#define GEN8_MI_MATH_MICommandOpcode_bits 6
+#define GEN75_MI_MATH_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_MICommandOpcode_start 23
+#define GEN9_MI_MATH_MICommandOpcode_start 23
+#define GEN8_MI_MATH_MICommandOpcode_start 23
+#define GEN75_MI_MATH_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH_ALU_INSTRUCTION */
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_length 1
+#define GEN9_MI_MATH_ALU_INSTRUCTION_length 1
+#define GEN8_MI_MATH_ALU_INSTRUCTION_length 1
+#define GEN75_MI_MATH_ALU_INSTRUCTION_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH_ALU_INSTRUCTION::ALU Opcode */
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits 12
+#define GEN9_MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits 12
+#define GEN8_MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits 12
+#define GEN75_MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_ALUOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_ALUOpcode_start 20
+#define GEN9_MI_MATH_ALU_INSTRUCTION_ALUOpcode_start 20
+#define GEN8_MI_MATH_ALU_INSTRUCTION_ALUOpcode_start 20
+#define GEN75_MI_MATH_ALU_INSTRUCTION_ALUOpcode_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_ALUOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH_ALU_INSTRUCTION::Operand 1 */
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_Operand1_bits 10
+#define GEN9_MI_MATH_ALU_INSTRUCTION_Operand1_bits 10
+#define GEN8_MI_MATH_ALU_INSTRUCTION_Operand1_bits 10
+#define GEN75_MI_MATH_ALU_INSTRUCTION_Operand1_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_Operand1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_Operand1_start 10
+#define GEN9_MI_MATH_ALU_INSTRUCTION_Operand1_start 10
+#define GEN8_MI_MATH_ALU_INSTRUCTION_Operand1_start 10
+#define GEN75_MI_MATH_ALU_INSTRUCTION_Operand1_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_Operand1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_MATH_ALU_INSTRUCTION::Operand 2 */
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_Operand2_bits 10
+#define GEN9_MI_MATH_ALU_INSTRUCTION_Operand2_bits 10
+#define GEN8_MI_MATH_ALU_INSTRUCTION_Operand2_bits 10
+#define GEN75_MI_MATH_ALU_INSTRUCTION_Operand2_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_Operand2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_MATH_ALU_INSTRUCTION_Operand2_start 0
+#define GEN9_MI_MATH_ALU_INSTRUCTION_Operand2_start 0
+#define GEN8_MI_MATH_ALU_INSTRUCTION_Operand2_start 0
+#define GEN75_MI_MATH_ALU_INSTRUCTION_Operand2_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_MATH_ALU_INSTRUCTION_Operand2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_NOOP */
+
+
+#define GEN10_MI_NOOP_length 1
+#define GEN9_MI_NOOP_length 1
+#define GEN8_MI_NOOP_length 1
+#define GEN75_MI_NOOP_length 1
+#define GEN7_MI_NOOP_length 1
+#define GEN6_MI_NOOP_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_NOOP::Command Type */
+
+
+#define GEN10_MI_NOOP_CommandType_bits 3
+#define GEN9_MI_NOOP_CommandType_bits 3
+#define GEN8_MI_NOOP_CommandType_bits 3
+#define GEN75_MI_NOOP_CommandType_bits 3
+#define GEN7_MI_NOOP_CommandType_bits 3
+#define GEN6_MI_NOOP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_NOOP_CommandType_start 29
+#define GEN9_MI_NOOP_CommandType_start 29
+#define GEN8_MI_NOOP_CommandType_start 29
+#define GEN75_MI_NOOP_CommandType_start 29
+#define GEN7_MI_NOOP_CommandType_start 29
+#define GEN6_MI_NOOP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_NOOP::Identification Number */
+
+
+#define GEN10_MI_NOOP_IdentificationNumber_bits 22
+#define GEN9_MI_NOOP_IdentificationNumber_bits 22
+#define GEN8_MI_NOOP_IdentificationNumber_bits 22
+#define GEN75_MI_NOOP_IdentificationNumber_bits 22
+#define GEN7_MI_NOOP_IdentificationNumber_bits 22
+#define GEN6_MI_NOOP_IdentificationNumber_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_IdentificationNumber_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_NOOP_IdentificationNumber_start 0
+#define GEN9_MI_NOOP_IdentificationNumber_start 0
+#define GEN8_MI_NOOP_IdentificationNumber_start 0
+#define GEN75_MI_NOOP_IdentificationNumber_start 0
+#define GEN7_MI_NOOP_IdentificationNumber_start 0
+#define GEN6_MI_NOOP_IdentificationNumber_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_IdentificationNumber_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_NOOP::Identification Number Register Write Enable */
+
+
+#define GEN10_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+#define GEN9_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+#define GEN8_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+#define GEN75_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+#define GEN7_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+#define GEN6_MI_NOOP_IdentificationNumberRegisterWriteEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_IdentificationNumberRegisterWriteEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+#define GEN9_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+#define GEN8_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+#define GEN75_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+#define GEN7_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+#define GEN6_MI_NOOP_IdentificationNumberRegisterWriteEnable_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_IdentificationNumberRegisterWriteEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_NOOP::MI Command Opcode */
+
+
+#define GEN10_MI_NOOP_MICommandOpcode_bits 6
+#define GEN9_MI_NOOP_MICommandOpcode_bits 6
+#define GEN8_MI_NOOP_MICommandOpcode_bits 6
+#define GEN75_MI_NOOP_MICommandOpcode_bits 6
+#define GEN7_MI_NOOP_MICommandOpcode_bits 6
+#define GEN6_MI_NOOP_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_NOOP_MICommandOpcode_start 23
+#define GEN9_MI_NOOP_MICommandOpcode_start 23
+#define GEN8_MI_NOOP_MICommandOpcode_start 23
+#define GEN75_MI_NOOP_MICommandOpcode_start 23
+#define GEN7_MI_NOOP_MICommandOpcode_start 23
+#define GEN6_MI_NOOP_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_NOOP_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE */
+
+
+#define GEN10_MI_PREDICATE_length 1
+#define GEN9_MI_PREDICATE_length 1
+#define GEN8_MI_PREDICATE_length 1
+#define GEN75_MI_PREDICATE_length 1
+#define GEN7_MI_PREDICATE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE::Combine Operation */
+
+
+#define GEN10_MI_PREDICATE_CombineOperation_bits 2
+#define GEN9_MI_PREDICATE_CombineOperation_bits 2
+#define GEN8_MI_PREDICATE_CombineOperation_bits 2
+#define GEN75_MI_PREDICATE_CombineOperation_bits 2
+#define GEN7_MI_PREDICATE_CombineOperation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CombineOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_PREDICATE_CombineOperation_start 3
+#define GEN9_MI_PREDICATE_CombineOperation_start 3
+#define GEN8_MI_PREDICATE_CombineOperation_start 3
+#define GEN75_MI_PREDICATE_CombineOperation_start 3
+#define GEN7_MI_PREDICATE_CombineOperation_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CombineOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE::Command Type */
+
+
+#define GEN10_MI_PREDICATE_CommandType_bits 3
+#define GEN9_MI_PREDICATE_CommandType_bits 3
+#define GEN8_MI_PREDICATE_CommandType_bits 3
+#define GEN75_MI_PREDICATE_CommandType_bits 3
+#define GEN7_MI_PREDICATE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_PREDICATE_CommandType_start 29
+#define GEN9_MI_PREDICATE_CommandType_start 29
+#define GEN8_MI_PREDICATE_CommandType_start 29
+#define GEN75_MI_PREDICATE_CommandType_start 29
+#define GEN7_MI_PREDICATE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE::Compare Operation */
+
+
+#define GEN10_MI_PREDICATE_CompareOperation_bits 2
+#define GEN9_MI_PREDICATE_CompareOperation_bits 2
+#define GEN8_MI_PREDICATE_CompareOperation_bits 2
+#define GEN75_MI_PREDICATE_CompareOperation_bits 2
+#define GEN7_MI_PREDICATE_CompareOperation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CompareOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_PREDICATE_CompareOperation_start 0
+#define GEN9_MI_PREDICATE_CompareOperation_start 0
+#define GEN8_MI_PREDICATE_CompareOperation_start 0
+#define GEN75_MI_PREDICATE_CompareOperation_start 0
+#define GEN7_MI_PREDICATE_CompareOperation_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_CompareOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE::Load Operation */
+
+
+#define GEN10_MI_PREDICATE_LoadOperation_bits 2
+#define GEN9_MI_PREDICATE_LoadOperation_bits 2
+#define GEN8_MI_PREDICATE_LoadOperation_bits 2
+#define GEN75_MI_PREDICATE_LoadOperation_bits 2
+#define GEN7_MI_PREDICATE_LoadOperation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_LoadOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_PREDICATE_LoadOperation_start 6
+#define GEN9_MI_PREDICATE_LoadOperation_start 6
+#define GEN8_MI_PREDICATE_LoadOperation_start 6
+#define GEN75_MI_PREDICATE_LoadOperation_start 6
+#define GEN7_MI_PREDICATE_LoadOperation_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_LoadOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_PREDICATE::MI Command Opcode */
+
+
+#define GEN10_MI_PREDICATE_MICommandOpcode_bits 6
+#define GEN9_MI_PREDICATE_MICommandOpcode_bits 6
+#define GEN8_MI_PREDICATE_MICommandOpcode_bits 6
+#define GEN75_MI_PREDICATE_MICommandOpcode_bits 6
+#define GEN7_MI_PREDICATE_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_PREDICATE_MICommandOpcode_start 23
+#define GEN9_MI_PREDICATE_MICommandOpcode_start 23
+#define GEN8_MI_PREDICATE_MICommandOpcode_start 23
+#define GEN75_MI_PREDICATE_MICommandOpcode_start 23
+#define GEN7_MI_PREDICATE_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_PREDICATE_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_HEAD */
+
+
+#define GEN10_MI_REPORT_HEAD_length 1
+#define GEN9_MI_REPORT_HEAD_length 1
+#define GEN8_MI_REPORT_HEAD_length 1
+#define GEN75_MI_REPORT_HEAD_length 1
+#define GEN7_MI_REPORT_HEAD_length 1
+#define GEN6_MI_REPORT_HEAD_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_HEAD_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_HEAD::Command Type */
+
+
+#define GEN10_MI_REPORT_HEAD_CommandType_bits 3
+#define GEN9_MI_REPORT_HEAD_CommandType_bits 3
+#define GEN8_MI_REPORT_HEAD_CommandType_bits 3
+#define GEN75_MI_REPORT_HEAD_CommandType_bits 3
+#define GEN7_MI_REPORT_HEAD_CommandType_bits 3
+#define GEN6_MI_REPORT_HEAD_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_HEAD_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_HEAD_CommandType_start 29
+#define GEN9_MI_REPORT_HEAD_CommandType_start 29
+#define GEN8_MI_REPORT_HEAD_CommandType_start 29
+#define GEN75_MI_REPORT_HEAD_CommandType_start 29
+#define GEN7_MI_REPORT_HEAD_CommandType_start 29
+#define GEN6_MI_REPORT_HEAD_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_HEAD_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_HEAD::MI Command Opcode */
+
+
+#define GEN10_MI_REPORT_HEAD_MICommandOpcode_bits 6
+#define GEN9_MI_REPORT_HEAD_MICommandOpcode_bits 6
+#define GEN8_MI_REPORT_HEAD_MICommandOpcode_bits 6
+#define GEN75_MI_REPORT_HEAD_MICommandOpcode_bits 6
+#define GEN7_MI_REPORT_HEAD_MICommandOpcode_bits 6
+#define GEN6_MI_REPORT_HEAD_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_HEAD_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_HEAD_MICommandOpcode_start 23
+#define GEN9_MI_REPORT_HEAD_MICommandOpcode_start 23
+#define GEN8_MI_REPORT_HEAD_MICommandOpcode_start 23
+#define GEN75_MI_REPORT_HEAD_MICommandOpcode_start 23
+#define GEN7_MI_REPORT_HEAD_MICommandOpcode_start 23
+#define GEN6_MI_REPORT_HEAD_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_HEAD_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_length 4
+#define GEN9_MI_REPORT_PERF_COUNT_length 4
+#define GEN8_MI_REPORT_PERF_COUNT_length 4
+#define GEN75_MI_REPORT_PERF_COUNT_length 3
+#define GEN7_MI_REPORT_PERF_COUNT_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::Command Type */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_CommandType_bits 3
+#define GEN9_MI_REPORT_PERF_COUNT_CommandType_bits 3
+#define GEN8_MI_REPORT_PERF_COUNT_CommandType_bits 3
+#define GEN75_MI_REPORT_PERF_COUNT_CommandType_bits 3
+#define GEN7_MI_REPORT_PERF_COUNT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_CommandType_start 29
+#define GEN9_MI_REPORT_PERF_COUNT_CommandType_start 29
+#define GEN8_MI_REPORT_PERF_COUNT_CommandType_start 29
+#define GEN75_MI_REPORT_PERF_COUNT_CommandType_start 29
+#define GEN7_MI_REPORT_PERF_COUNT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::Core Mode Enable */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_CoreModeEnable_bits 1
+#define GEN9_MI_REPORT_PERF_COUNT_CoreModeEnable_bits 1
+#define GEN8_MI_REPORT_PERF_COUNT_CoreModeEnable_bits 1
+#define GEN75_MI_REPORT_PERF_COUNT_CoreModeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_CoreModeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_CoreModeEnable_start 36
+#define GEN9_MI_REPORT_PERF_COUNT_CoreModeEnable_start 36
+#define GEN8_MI_REPORT_PERF_COUNT_CoreModeEnable_start 36
+#define GEN75_MI_REPORT_PERF_COUNT_CoreModeEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_CoreModeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::DWord Length */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_DWordLength_bits 6
+#define GEN9_MI_REPORT_PERF_COUNT_DWordLength_bits 6
+#define GEN8_MI_REPORT_PERF_COUNT_DWordLength_bits 6
+#define GEN75_MI_REPORT_PERF_COUNT_DWordLength_bits 6
+#define GEN7_MI_REPORT_PERF_COUNT_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_DWordLength_start 0
+#define GEN9_MI_REPORT_PERF_COUNT_DWordLength_start 0
+#define GEN8_MI_REPORT_PERF_COUNT_DWordLength_start 0
+#define GEN75_MI_REPORT_PERF_COUNT_DWordLength_start 0
+#define GEN7_MI_REPORT_PERF_COUNT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::MI Command Opcode */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_MICommandOpcode_bits 6
+#define GEN9_MI_REPORT_PERF_COUNT_MICommandOpcode_bits 6
+#define GEN8_MI_REPORT_PERF_COUNT_MICommandOpcode_bits 6
+#define GEN75_MI_REPORT_PERF_COUNT_MICommandOpcode_bits 6
+#define GEN7_MI_REPORT_PERF_COUNT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_MICommandOpcode_start 23
+#define GEN9_MI_REPORT_PERF_COUNT_MICommandOpcode_start 23
+#define GEN8_MI_REPORT_PERF_COUNT_MICommandOpcode_start 23
+#define GEN75_MI_REPORT_PERF_COUNT_MICommandOpcode_start 23
+#define GEN7_MI_REPORT_PERF_COUNT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::Memory Address */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_MemoryAddress_bits 58
+#define GEN9_MI_REPORT_PERF_COUNT_MemoryAddress_bits 58
+#define GEN8_MI_REPORT_PERF_COUNT_MemoryAddress_bits 58
+#define GEN75_MI_REPORT_PERF_COUNT_MemoryAddress_bits 26
+#define GEN7_MI_REPORT_PERF_COUNT_MemoryAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_MemoryAddress_start 38
+#define GEN9_MI_REPORT_PERF_COUNT_MemoryAddress_start 38
+#define GEN8_MI_REPORT_PERF_COUNT_MemoryAddress_start 38
+#define GEN75_MI_REPORT_PERF_COUNT_MemoryAddress_start 38
+#define GEN7_MI_REPORT_PERF_COUNT_MemoryAddress_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 38;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::Report ID */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_ReportID_bits 32
+#define GEN9_MI_REPORT_PERF_COUNT_ReportID_bits 32
+#define GEN8_MI_REPORT_PERF_COUNT_ReportID_bits 32
+#define GEN75_MI_REPORT_PERF_COUNT_ReportID_bits 32
+#define GEN7_MI_REPORT_PERF_COUNT_ReportID_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_ReportID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_ReportID_start 96
+#define GEN9_MI_REPORT_PERF_COUNT_ReportID_start 96
+#define GEN8_MI_REPORT_PERF_COUNT_ReportID_start 96
+#define GEN75_MI_REPORT_PERF_COUNT_ReportID_start 64
+#define GEN7_MI_REPORT_PERF_COUNT_ReportID_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_ReportID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_REPORT_PERF_COUNT::Use Global GTT */
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_UseGlobalGTT_bits 1
+#define GEN9_MI_REPORT_PERF_COUNT_UseGlobalGTT_bits 1
+#define GEN8_MI_REPORT_PERF_COUNT_UseGlobalGTT_bits 1
+#define GEN75_MI_REPORT_PERF_COUNT_UseGlobalGTT_bits 1
+#define GEN7_MI_REPORT_PERF_COUNT_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_REPORT_PERF_COUNT_UseGlobalGTT_start 32
+#define GEN9_MI_REPORT_PERF_COUNT_UseGlobalGTT_start 32
+#define GEN8_MI_REPORT_PERF_COUNT_UseGlobalGTT_start 32
+#define GEN75_MI_REPORT_PERF_COUNT_UseGlobalGTT_start 32
+#define GEN7_MI_REPORT_PERF_COUNT_UseGlobalGTT_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_REPORT_PERF_COUNT_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTEXT */
+
+
+#define GEN10_MI_RS_CONTEXT_length 1
+#define GEN9_MI_RS_CONTEXT_length 1
+#define GEN8_MI_RS_CONTEXT_length 1
+#define GEN75_MI_RS_CONTEXT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTEXT::Command Type */
+
+
+#define GEN10_MI_RS_CONTEXT_CommandType_bits 3
+#define GEN9_MI_RS_CONTEXT_CommandType_bits 3
+#define GEN8_MI_RS_CONTEXT_CommandType_bits 3
+#define GEN75_MI_RS_CONTEXT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTEXT_CommandType_start 29
+#define GEN9_MI_RS_CONTEXT_CommandType_start 29
+#define GEN8_MI_RS_CONTEXT_CommandType_start 29
+#define GEN75_MI_RS_CONTEXT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTEXT::MI Command Opcode */
+
+
+#define GEN10_MI_RS_CONTEXT_MICommandOpcode_bits 6
+#define GEN9_MI_RS_CONTEXT_MICommandOpcode_bits 6
+#define GEN8_MI_RS_CONTEXT_MICommandOpcode_bits 6
+#define GEN75_MI_RS_CONTEXT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTEXT_MICommandOpcode_start 23
+#define GEN9_MI_RS_CONTEXT_MICommandOpcode_start 23
+#define GEN8_MI_RS_CONTEXT_MICommandOpcode_start 23
+#define GEN75_MI_RS_CONTEXT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTEXT::Resource Streamer Save */
+
+
+#define GEN10_MI_RS_CONTEXT_ResourceStreamerSave_bits 1
+#define GEN9_MI_RS_CONTEXT_ResourceStreamerSave_bits 1
+#define GEN8_MI_RS_CONTEXT_ResourceStreamerSave_bits 1
+#define GEN75_MI_RS_CONTEXT_ResourceStreamerSave_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_ResourceStreamerSave_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTEXT_ResourceStreamerSave_start 0
+#define GEN9_MI_RS_CONTEXT_ResourceStreamerSave_start 0
+#define GEN8_MI_RS_CONTEXT_ResourceStreamerSave_start 0
+#define GEN75_MI_RS_CONTEXT_ResourceStreamerSave_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTEXT_ResourceStreamerSave_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTROL */
+
+
+#define GEN10_MI_RS_CONTROL_length 1
+#define GEN9_MI_RS_CONTROL_length 1
+#define GEN8_MI_RS_CONTROL_length 1
+#define GEN75_MI_RS_CONTROL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTROL::Command Type */
+
+
+#define GEN10_MI_RS_CONTROL_CommandType_bits 3
+#define GEN9_MI_RS_CONTROL_CommandType_bits 3
+#define GEN8_MI_RS_CONTROL_CommandType_bits 3
+#define GEN75_MI_RS_CONTROL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTROL_CommandType_start 29
+#define GEN9_MI_RS_CONTROL_CommandType_start 29
+#define GEN8_MI_RS_CONTROL_CommandType_start 29
+#define GEN75_MI_RS_CONTROL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTROL::MI Command Opcode */
+
+
+#define GEN10_MI_RS_CONTROL_MICommandOpcode_bits 6
+#define GEN9_MI_RS_CONTROL_MICommandOpcode_bits 6
+#define GEN8_MI_RS_CONTROL_MICommandOpcode_bits 6
+#define GEN75_MI_RS_CONTROL_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTROL_MICommandOpcode_start 23
+#define GEN9_MI_RS_CONTROL_MICommandOpcode_start 23
+#define GEN8_MI_RS_CONTROL_MICommandOpcode_start 23
+#define GEN75_MI_RS_CONTROL_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_CONTROL::Resource Streamer Control */
+
+
+#define GEN10_MI_RS_CONTROL_ResourceStreamerControl_bits 1
+#define GEN9_MI_RS_CONTROL_ResourceStreamerControl_bits 1
+#define GEN8_MI_RS_CONTROL_ResourceStreamerControl_bits 1
+#define GEN75_MI_RS_CONTROL_ResourceStreamerControl_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_ResourceStreamerControl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_CONTROL_ResourceStreamerControl_start 0
+#define GEN9_MI_RS_CONTROL_ResourceStreamerControl_start 0
+#define GEN8_MI_RS_CONTROL_ResourceStreamerControl_start 0
+#define GEN75_MI_RS_CONTROL_ResourceStreamerControl_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_CONTROL_ResourceStreamerControl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_length 4
+#define GEN9_MI_RS_STORE_DATA_IMM_length 4
+#define GEN8_MI_RS_STORE_DATA_IMM_length 4
+#define GEN75_MI_RS_STORE_DATA_IMM_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::Command Type */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_CommandType_bits 3
+#define GEN9_MI_RS_STORE_DATA_IMM_CommandType_bits 3
+#define GEN8_MI_RS_STORE_DATA_IMM_CommandType_bits 3
+#define GEN75_MI_RS_STORE_DATA_IMM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_CommandType_start 29
+#define GEN9_MI_RS_STORE_DATA_IMM_CommandType_start 29
+#define GEN8_MI_RS_STORE_DATA_IMM_CommandType_start 29
+#define GEN75_MI_RS_STORE_DATA_IMM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::Core Mode Enable */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN9_MI_RS_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN8_MI_RS_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN75_MI_RS_STORE_DATA_IMM_CoreModeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_CoreModeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN9_MI_RS_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN8_MI_RS_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN75_MI_RS_STORE_DATA_IMM_CoreModeEnable_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_CoreModeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::DWord Length */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DWordLength_bits 8
+#define GEN9_MI_RS_STORE_DATA_IMM_DWordLength_bits 8
+#define GEN8_MI_RS_STORE_DATA_IMM_DWordLength_bits 8
+#define GEN75_MI_RS_STORE_DATA_IMM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DWordLength_start 0
+#define GEN9_MI_RS_STORE_DATA_IMM_DWordLength_start 0
+#define GEN8_MI_RS_STORE_DATA_IMM_DWordLength_start 0
+#define GEN75_MI_RS_STORE_DATA_IMM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::Data DWord 0 */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DataDWord0_bits 32
+#define GEN9_MI_RS_STORE_DATA_IMM_DataDWord0_bits 32
+#define GEN8_MI_RS_STORE_DATA_IMM_DataDWord0_bits 32
+#define GEN75_MI_RS_STORE_DATA_IMM_DataDWord0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DataDWord0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DataDWord0_start 96
+#define GEN9_MI_RS_STORE_DATA_IMM_DataDWord0_start 96
+#define GEN8_MI_RS_STORE_DATA_IMM_DataDWord0_start 96
+#define GEN75_MI_RS_STORE_DATA_IMM_DataDWord0_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DataDWord0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::Destination Address */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DestinationAddress_bits 62
+#define GEN9_MI_RS_STORE_DATA_IMM_DestinationAddress_bits 62
+#define GEN8_MI_RS_STORE_DATA_IMM_DestinationAddress_bits 62
+#define GEN75_MI_RS_STORE_DATA_IMM_DestinationAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DestinationAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_DestinationAddress_start 34
+#define GEN9_MI_RS_STORE_DATA_IMM_DestinationAddress_start 34
+#define GEN8_MI_RS_STORE_DATA_IMM_DestinationAddress_start 34
+#define GEN75_MI_RS_STORE_DATA_IMM_DestinationAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_DestinationAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_RS_STORE_DATA_IMM::MI Command Opcode */
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN9_MI_RS_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN8_MI_RS_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN75_MI_RS_STORE_DATA_IMM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_RS_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN9_MI_RS_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN8_MI_RS_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN75_MI_RS_STORE_DATA_IMM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_RS_STORE_DATA_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_length 3
+#define GEN7_MI_SEMAPHORE_MBOX_length 3
+#define GEN6_MI_SEMAPHORE_MBOX_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::Command Type */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_CommandType_bits 3
+#define GEN7_MI_SEMAPHORE_MBOX_CommandType_bits 3
+#define GEN6_MI_SEMAPHORE_MBOX_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_CommandType_start 29
+#define GEN7_MI_SEMAPHORE_MBOX_CommandType_start 29
+#define GEN6_MI_SEMAPHORE_MBOX_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::DWord Length */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_DWordLength_bits 8
+#define GEN7_MI_SEMAPHORE_MBOX_DWordLength_bits 8
+#define GEN6_MI_SEMAPHORE_MBOX_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_DWordLength_start 0
+#define GEN7_MI_SEMAPHORE_MBOX_DWordLength_start 0
+#define GEN6_MI_SEMAPHORE_MBOX_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::General Register Select */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_GeneralRegisterSelect_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_GeneralRegisterSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_GeneralRegisterSelect_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_GeneralRegisterSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::MI Command Opcode */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_MICommandOpcode_bits 6
+#define GEN7_MI_SEMAPHORE_MBOX_MICommandOpcode_bits 6
+#define GEN6_MI_SEMAPHORE_MBOX_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_MICommandOpcode_start 23
+#define GEN7_MI_SEMAPHORE_MBOX_MICommandOpcode_start 23
+#define GEN6_MI_SEMAPHORE_MBOX_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::Register Select */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_RegisterSelect_bits 2
+#define GEN7_MI_SEMAPHORE_MBOX_RegisterSelect_bits 2
+#define GEN6_MI_SEMAPHORE_MBOX_RegisterSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_RegisterSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_RegisterSelect_start 16
+#define GEN7_MI_SEMAPHORE_MBOX_RegisterSelect_start 16
+#define GEN6_MI_SEMAPHORE_MBOX_RegisterSelect_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_RegisterSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_MBOX::Semaphore Data Dword */
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_SemaphoreDataDword_bits 32
+#define GEN7_MI_SEMAPHORE_MBOX_SemaphoreDataDword_bits 32
+#define GEN6_MI_SEMAPHORE_MBOX_SemaphoreDataDword_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_SemaphoreDataDword_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_SEMAPHORE_MBOX_SemaphoreDataDword_start 32
+#define GEN7_MI_SEMAPHORE_MBOX_SemaphoreDataDword_start 32
+#define GEN6_MI_SEMAPHORE_MBOX_SemaphoreDataDword_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_MBOX_SemaphoreDataDword_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_length 2
+#define GEN9_MI_SEMAPHORE_SIGNAL_length 2
+#define GEN8_MI_SEMAPHORE_SIGNAL_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::Command Type */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_CommandType_bits 3
+#define GEN9_MI_SEMAPHORE_SIGNAL_CommandType_bits 3
+#define GEN8_MI_SEMAPHORE_SIGNAL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_CommandType_start 29
+#define GEN9_MI_SEMAPHORE_SIGNAL_CommandType_start 29
+#define GEN8_MI_SEMAPHORE_SIGNAL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::DWord Length */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_DWordLength_bits 8
+#define GEN9_MI_SEMAPHORE_SIGNAL_DWordLength_bits 8
+#define GEN8_MI_SEMAPHORE_SIGNAL_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_DWordLength_start 0
+#define GEN9_MI_SEMAPHORE_SIGNAL_DWordLength_start 0
+#define GEN8_MI_SEMAPHORE_SIGNAL_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::MI Command Opcode */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_MICommandOpcode_bits 6
+#define GEN9_MI_SEMAPHORE_SIGNAL_MICommandOpcode_bits 6
+#define GEN8_MI_SEMAPHORE_SIGNAL_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_MICommandOpcode_start 23
+#define GEN9_MI_SEMAPHORE_SIGNAL_MICommandOpcode_start 23
+#define GEN8_MI_SEMAPHORE_SIGNAL_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::Post-Sync Operation */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_PostSyncOperation_bits 1
+#define GEN9_MI_SEMAPHORE_SIGNAL_PostSyncOperation_bits 1
+#define GEN8_MI_SEMAPHORE_SIGNAL_PostSyncOperation_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_PostSyncOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_PostSyncOperation_start 21
+#define GEN9_MI_SEMAPHORE_SIGNAL_PostSyncOperation_start 21
+#define GEN8_MI_SEMAPHORE_SIGNAL_PostSyncOperation_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_PostSyncOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::Target Context ID */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_TargetContextID_bits 32
+#define GEN9_MI_SEMAPHORE_SIGNAL_TargetContextID_bits 32
+#define GEN8_MI_SEMAPHORE_SIGNAL_TargetContextID_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_TargetContextID_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_TargetContextID_start 32
+#define GEN9_MI_SEMAPHORE_SIGNAL_TargetContextID_start 32
+#define GEN8_MI_SEMAPHORE_SIGNAL_TargetContextID_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_TargetContextID_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_SIGNAL::Target Engine Select */
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_bits 3
+#define GEN9_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_bits 3
+#define GEN8_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_TargetEngineSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_start 15
+#define GEN9_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_start 15
+#define GEN8_MI_SEMAPHORE_SIGNAL_TargetEngineSelect_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_SIGNAL_TargetEngineSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_length 4
+#define GEN9_MI_SEMAPHORE_WAIT_length 4
+#define GEN8_MI_SEMAPHORE_WAIT_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Command Type */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_CommandType_bits 3
+#define GEN9_MI_SEMAPHORE_WAIT_CommandType_bits 3
+#define GEN8_MI_SEMAPHORE_WAIT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_CommandType_start 29
+#define GEN9_MI_SEMAPHORE_WAIT_CommandType_start 29
+#define GEN8_MI_SEMAPHORE_WAIT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Compare Operation */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_CompareOperation_bits 3
+#define GEN9_MI_SEMAPHORE_WAIT_CompareOperation_bits 3
+#define GEN8_MI_SEMAPHORE_WAIT_CompareOperation_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_CompareOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_CompareOperation_start 12
+#define GEN9_MI_SEMAPHORE_WAIT_CompareOperation_start 12
+#define GEN8_MI_SEMAPHORE_WAIT_CompareOperation_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_CompareOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::DWord Length */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_DWordLength_bits 8
+#define GEN9_MI_SEMAPHORE_WAIT_DWordLength_bits 8
+#define GEN8_MI_SEMAPHORE_WAIT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_DWordLength_start 0
+#define GEN9_MI_SEMAPHORE_WAIT_DWordLength_start 0
+#define GEN8_MI_SEMAPHORE_WAIT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::MI Command Opcode */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_MICommandOpcode_bits 6
+#define GEN9_MI_SEMAPHORE_WAIT_MICommandOpcode_bits 6
+#define GEN8_MI_SEMAPHORE_WAIT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_MICommandOpcode_start 23
+#define GEN9_MI_SEMAPHORE_WAIT_MICommandOpcode_start 23
+#define GEN8_MI_SEMAPHORE_WAIT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Memory Type */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_MemoryType_bits 1
+#define GEN9_MI_SEMAPHORE_WAIT_MemoryType_bits 1
+#define GEN8_MI_SEMAPHORE_WAIT_MemoryType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_MemoryType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_MemoryType_start 22
+#define GEN9_MI_SEMAPHORE_WAIT_MemoryType_start 22
+#define GEN8_MI_SEMAPHORE_WAIT_MemoryType_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_MemoryType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Register Poll Mode */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_RegisterPollMode_bits 1
+#define GEN9_MI_SEMAPHORE_WAIT_RegisterPollMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_RegisterPollMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_RegisterPollMode_start 16
+#define GEN9_MI_SEMAPHORE_WAIT_RegisterPollMode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_RegisterPollMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Semaphore Address */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_SemaphoreAddress_bits 62
+#define GEN9_MI_SEMAPHORE_WAIT_SemaphoreAddress_bits 62
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_SemaphoreAddress_start 66
+#define GEN9_MI_SEMAPHORE_WAIT_SemaphoreAddress_start 66
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Semaphore Address High */
+
+
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreAddressHigh_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Semaphore Data Dword */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_SemaphoreDataDword_bits 32
+#define GEN9_MI_SEMAPHORE_WAIT_SemaphoreDataDword_bits 32
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreDataDword_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreDataDword_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_SemaphoreDataDword_start 32
+#define GEN9_MI_SEMAPHORE_WAIT_SemaphoreDataDword_start 32
+#define GEN8_MI_SEMAPHORE_WAIT_SemaphoreDataDword_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_SemaphoreDataDword_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SEMAPHORE_WAIT::Wait Mode */
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_WaitMode_bits 1
+#define GEN9_MI_SEMAPHORE_WAIT_WaitMode_bits 1
+#define GEN8_MI_SEMAPHORE_WAIT_WaitMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_WaitMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SEMAPHORE_WAIT_WaitMode_start 15
+#define GEN9_MI_SEMAPHORE_WAIT_WaitMode_start 15
+#define GEN8_MI_SEMAPHORE_WAIT_WaitMode_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SEMAPHORE_WAIT_WaitMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT */
+
+
+#define GEN10_MI_SET_CONTEXT_length 2
+#define GEN9_MI_SET_CONTEXT_length 2
+#define GEN8_MI_SET_CONTEXT_length 2
+#define GEN75_MI_SET_CONTEXT_length 2
+#define GEN7_MI_SET_CONTEXT_length 2
+#define GEN6_MI_SET_CONTEXT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Command Type */
+
+
+#define GEN10_MI_SET_CONTEXT_CommandType_bits 3
+#define GEN9_MI_SET_CONTEXT_CommandType_bits 3
+#define GEN8_MI_SET_CONTEXT_CommandType_bits 3
+#define GEN75_MI_SET_CONTEXT_CommandType_bits 3
+#define GEN7_MI_SET_CONTEXT_CommandType_bits 3
+#define GEN6_MI_SET_CONTEXT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_CommandType_start 29
+#define GEN9_MI_SET_CONTEXT_CommandType_start 29
+#define GEN8_MI_SET_CONTEXT_CommandType_start 29
+#define GEN75_MI_SET_CONTEXT_CommandType_start 29
+#define GEN7_MI_SET_CONTEXT_CommandType_start 29
+#define GEN6_MI_SET_CONTEXT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Core Mode Enable */
+
+
+#define GEN10_MI_SET_CONTEXT_CoreModeEnable_bits 1
+#define GEN9_MI_SET_CONTEXT_CoreModeEnable_bits 1
+#define GEN8_MI_SET_CONTEXT_CoreModeEnable_bits 1
+#define GEN75_MI_SET_CONTEXT_CoreModeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_CoreModeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_CoreModeEnable_start 36
+#define GEN9_MI_SET_CONTEXT_CoreModeEnable_start 36
+#define GEN8_MI_SET_CONTEXT_CoreModeEnable_start 36
+#define GEN75_MI_SET_CONTEXT_CoreModeEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_CoreModeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::DWord Length */
+
+
+#define GEN10_MI_SET_CONTEXT_DWordLength_bits 8
+#define GEN9_MI_SET_CONTEXT_DWordLength_bits 8
+#define GEN8_MI_SET_CONTEXT_DWordLength_bits 8
+#define GEN75_MI_SET_CONTEXT_DWordLength_bits 8
+#define GEN7_MI_SET_CONTEXT_DWordLength_bits 8
+#define GEN6_MI_SET_CONTEXT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_DWordLength_start 0
+#define GEN9_MI_SET_CONTEXT_DWordLength_start 0
+#define GEN8_MI_SET_CONTEXT_DWordLength_start 0
+#define GEN75_MI_SET_CONTEXT_DWordLength_start 0
+#define GEN7_MI_SET_CONTEXT_DWordLength_start 0
+#define GEN6_MI_SET_CONTEXT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Extended State Restore Enable */
+
+
+#define GEN7_MI_SET_CONTEXT_ExtendedStateRestoreEnable_bits 1
+#define GEN6_MI_SET_CONTEXT_ExtendedStateRestoreEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ExtendedStateRestoreEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MI_SET_CONTEXT_ExtendedStateRestoreEnable_start 34
+#define GEN6_MI_SET_CONTEXT_ExtendedStateRestoreEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ExtendedStateRestoreEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Extended State Save Enable */
+
+
+#define GEN7_MI_SET_CONTEXT_ExtendedStateSaveEnable_bits 1
+#define GEN6_MI_SET_CONTEXT_ExtendedStateSaveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ExtendedStateSaveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_MI_SET_CONTEXT_ExtendedStateSaveEnable_start 35
+#define GEN6_MI_SET_CONTEXT_ExtendedStateSaveEnable_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ExtendedStateSaveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 35;
+ }
+ case 6: return 35;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Force Restore */
+
+
+#define GEN10_MI_SET_CONTEXT_ForceRestore_bits 1
+#define GEN9_MI_SET_CONTEXT_ForceRestore_bits 1
+#define GEN8_MI_SET_CONTEXT_ForceRestore_bits 1
+#define GEN75_MI_SET_CONTEXT_ForceRestore_bits 1
+#define GEN7_MI_SET_CONTEXT_ForceRestore_bits 1
+#define GEN6_MI_SET_CONTEXT_ForceRestore_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ForceRestore_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_ForceRestore_start 33
+#define GEN9_MI_SET_CONTEXT_ForceRestore_start 33
+#define GEN8_MI_SET_CONTEXT_ForceRestore_start 33
+#define GEN75_MI_SET_CONTEXT_ForceRestore_start 33
+#define GEN7_MI_SET_CONTEXT_ForceRestore_start 33
+#define GEN6_MI_SET_CONTEXT_ForceRestore_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ForceRestore_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 33;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::HD DVD Context */
+
+
+#define GEN6_MI_SET_CONTEXT_HDDVDContext_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_HDDVDContext_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_MI_SET_CONTEXT_HDDVDContext_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_HDDVDContext_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 41;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Logical Context Address */
+
+
+#define GEN10_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+#define GEN9_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+#define GEN8_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+#define GEN75_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+#define GEN7_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+#define GEN6_MI_SET_CONTEXT_LogicalContextAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_LogicalContextAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_LogicalContextAddress_start 44
+#define GEN9_MI_SET_CONTEXT_LogicalContextAddress_start 44
+#define GEN8_MI_SET_CONTEXT_LogicalContextAddress_start 44
+#define GEN75_MI_SET_CONTEXT_LogicalContextAddress_start 44
+#define GEN7_MI_SET_CONTEXT_LogicalContextAddress_start 44
+#define GEN6_MI_SET_CONTEXT_LogicalContextAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_LogicalContextAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 44;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::MI Command Opcode */
+
+
+#define GEN10_MI_SET_CONTEXT_MICommandOpcode_bits 6
+#define GEN9_MI_SET_CONTEXT_MICommandOpcode_bits 6
+#define GEN8_MI_SET_CONTEXT_MICommandOpcode_bits 6
+#define GEN75_MI_SET_CONTEXT_MICommandOpcode_bits 6
+#define GEN7_MI_SET_CONTEXT_MICommandOpcode_bits 6
+#define GEN6_MI_SET_CONTEXT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_MICommandOpcode_start 23
+#define GEN9_MI_SET_CONTEXT_MICommandOpcode_start 23
+#define GEN8_MI_SET_CONTEXT_MICommandOpcode_start 23
+#define GEN75_MI_SET_CONTEXT_MICommandOpcode_start 23
+#define GEN7_MI_SET_CONTEXT_MICommandOpcode_start 23
+#define GEN6_MI_SET_CONTEXT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Reserved, Must be 1 */
+
+
+#define GEN10_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+#define GEN9_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+#define GEN8_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+#define GEN75_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+#define GEN7_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+#define GEN6_MI_SET_CONTEXT_ReservedMustbe1_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ReservedMustbe1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_ReservedMustbe1_start 40
+#define GEN9_MI_SET_CONTEXT_ReservedMustbe1_start 40
+#define GEN8_MI_SET_CONTEXT_ReservedMustbe1_start 40
+#define GEN75_MI_SET_CONTEXT_ReservedMustbe1_start 40
+#define GEN7_MI_SET_CONTEXT_ReservedMustbe1_start 40
+#define GEN6_MI_SET_CONTEXT_ReservedMustbe1_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ReservedMustbe1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Resource Streamer State Restore Enable */
+
+
+#define GEN10_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits 1
+#define GEN9_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits 1
+#define GEN8_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits 1
+#define GEN75_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start 34
+#define GEN9_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start 34
+#define GEN8_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start 34
+#define GEN75_MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ResourceStreamerStateRestoreEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Resource Streamer State Save Enable */
+
+
+#define GEN10_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits 1
+#define GEN9_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits 1
+#define GEN8_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits 1
+#define GEN75_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start 35
+#define GEN9_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start 35
+#define GEN8_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start 35
+#define GEN75_MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_ResourceStreamerStateSaveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 35;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_CONTEXT::Restore Inhibit */
+
+
+#define GEN10_MI_SET_CONTEXT_RestoreInhibit_bits 1
+#define GEN9_MI_SET_CONTEXT_RestoreInhibit_bits 1
+#define GEN8_MI_SET_CONTEXT_RestoreInhibit_bits 1
+#define GEN75_MI_SET_CONTEXT_RestoreInhibit_bits 1
+#define GEN7_MI_SET_CONTEXT_RestoreInhibit_bits 1
+#define GEN6_MI_SET_CONTEXT_RestoreInhibit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_RestoreInhibit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_CONTEXT_RestoreInhibit_start 32
+#define GEN9_MI_SET_CONTEXT_RestoreInhibit_start 32
+#define GEN8_MI_SET_CONTEXT_RestoreInhibit_start 32
+#define GEN75_MI_SET_CONTEXT_RestoreInhibit_start 32
+#define GEN7_MI_SET_CONTEXT_RestoreInhibit_start 32
+#define GEN6_MI_SET_CONTEXT_RestoreInhibit_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_CONTEXT_RestoreInhibit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_PREDICATE */
+
+
+#define GEN10_MI_SET_PREDICATE_length 1
+#define GEN9_MI_SET_PREDICATE_length 1
+#define GEN8_MI_SET_PREDICATE_length 1
+#define GEN75_MI_SET_PREDICATE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_PREDICATE::Command Type */
+
+
+#define GEN10_MI_SET_PREDICATE_CommandType_bits 3
+#define GEN9_MI_SET_PREDICATE_CommandType_bits 3
+#define GEN8_MI_SET_PREDICATE_CommandType_bits 3
+#define GEN75_MI_SET_PREDICATE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_PREDICATE_CommandType_start 29
+#define GEN9_MI_SET_PREDICATE_CommandType_start 29
+#define GEN8_MI_SET_PREDICATE_CommandType_start 29
+#define GEN75_MI_SET_PREDICATE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_PREDICATE::MI Command Opcode */
+
+
+#define GEN10_MI_SET_PREDICATE_MICommandOpcode_bits 6
+#define GEN9_MI_SET_PREDICATE_MICommandOpcode_bits 6
+#define GEN8_MI_SET_PREDICATE_MICommandOpcode_bits 6
+#define GEN75_MI_SET_PREDICATE_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_PREDICATE_MICommandOpcode_start 23
+#define GEN9_MI_SET_PREDICATE_MICommandOpcode_start 23
+#define GEN8_MI_SET_PREDICATE_MICommandOpcode_start 23
+#define GEN75_MI_SET_PREDICATE_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SET_PREDICATE::PREDICATE ENABLE */
+
+
+#define GEN10_MI_SET_PREDICATE_PREDICATEENABLE_bits 4
+#define GEN9_MI_SET_PREDICATE_PREDICATEENABLE_bits 4
+#define GEN8_MI_SET_PREDICATE_PREDICATEENABLE_bits 4
+#define GEN75_MI_SET_PREDICATE_PREDICATEENABLE_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_PREDICATEENABLE_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SET_PREDICATE_PREDICATEENABLE_start 0
+#define GEN9_MI_SET_PREDICATE_PREDICATEENABLE_start 0
+#define GEN8_MI_SET_PREDICATE_PREDICATEENABLE_start 0
+#define GEN75_MI_SET_PREDICATE_PREDICATEENABLE_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SET_PREDICATE_PREDICATEENABLE_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM */
+
+
+#define GEN10_MI_STORE_DATA_IMM_length 4
+#define GEN9_MI_STORE_DATA_IMM_length 4
+#define GEN8_MI_STORE_DATA_IMM_length 4
+#define GEN75_MI_STORE_DATA_IMM_length 4
+#define GEN7_MI_STORE_DATA_IMM_length 4
+#define GEN6_MI_STORE_DATA_IMM_length 4
+#define GEN5_MI_STORE_DATA_IMM_length 5
+#define GEN45_MI_STORE_DATA_IMM_length 5
+#define GEN4_MI_STORE_DATA_IMM_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Address */
+
+
+#define GEN10_MI_STORE_DATA_IMM_Address_bits 46
+#define GEN9_MI_STORE_DATA_IMM_Address_bits 46
+#define GEN8_MI_STORE_DATA_IMM_Address_bits 46
+#define GEN75_MI_STORE_DATA_IMM_Address_bits 30
+#define GEN7_MI_STORE_DATA_IMM_Address_bits 30
+#define GEN6_MI_STORE_DATA_IMM_Address_bits 30
+#define GEN5_MI_STORE_DATA_IMM_Address_bits 30
+#define GEN45_MI_STORE_DATA_IMM_Address_bits 30
+#define GEN4_MI_STORE_DATA_IMM_Address_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_Address_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 30;
+ case 5: return 30;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 30;
+ } else {
+ return 30;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_Address_start 34
+#define GEN9_MI_STORE_DATA_IMM_Address_start 34
+#define GEN8_MI_STORE_DATA_IMM_Address_start 34
+#define GEN75_MI_STORE_DATA_IMM_Address_start 66
+#define GEN7_MI_STORE_DATA_IMM_Address_start 66
+#define GEN6_MI_STORE_DATA_IMM_Address_start 66
+#define GEN5_MI_STORE_DATA_IMM_Address_start 66
+#define GEN45_MI_STORE_DATA_IMM_Address_start 66
+#define GEN4_MI_STORE_DATA_IMM_Address_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_Address_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 66;
+ case 5: return 66;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 66;
+ } else {
+ return 66;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::BitFieldName */
+
+
+#define GEN45_MI_STORE_DATA_IMM_BitFieldName_bits 1
+#define GEN4_MI_STORE_DATA_IMM_BitFieldName_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_BitFieldName_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_MI_STORE_DATA_IMM_BitFieldName_start 21
+#define GEN4_MI_STORE_DATA_IMM_BitFieldName_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_BitFieldName_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 21;
+ } else {
+ return 21;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Command Type */
+
+
+#define GEN10_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN9_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN8_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN75_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN7_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN6_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN5_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN45_MI_STORE_DATA_IMM_CommandType_bits 3
+#define GEN4_MI_STORE_DATA_IMM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN9_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN8_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN75_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN7_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN6_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN5_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN45_MI_STORE_DATA_IMM_CommandType_start 29
+#define GEN4_MI_STORE_DATA_IMM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Core Mode Enable */
+
+
+#define GEN10_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN9_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN8_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN75_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN7_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+#define GEN6_MI_STORE_DATA_IMM_CoreModeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_CoreModeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN9_MI_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN8_MI_STORE_DATA_IMM_CoreModeEnable_start 32
+#define GEN75_MI_STORE_DATA_IMM_CoreModeEnable_start 64
+#define GEN7_MI_STORE_DATA_IMM_CoreModeEnable_start 64
+#define GEN6_MI_STORE_DATA_IMM_CoreModeEnable_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_CoreModeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::DWord Length */
+
+
+#define GEN10_MI_STORE_DATA_IMM_DWordLength_bits 10
+#define GEN9_MI_STORE_DATA_IMM_DWordLength_bits 10
+#define GEN8_MI_STORE_DATA_IMM_DWordLength_bits 10
+#define GEN75_MI_STORE_DATA_IMM_DWordLength_bits 6
+#define GEN7_MI_STORE_DATA_IMM_DWordLength_bits 6
+#define GEN6_MI_STORE_DATA_IMM_DWordLength_bits 6
+#define GEN5_MI_STORE_DATA_IMM_DWordLength_bits 6
+#define GEN45_MI_STORE_DATA_IMM_DWordLength_bits 6
+#define GEN4_MI_STORE_DATA_IMM_DWordLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN9_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN8_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN75_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN7_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN6_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN5_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN45_MI_STORE_DATA_IMM_DWordLength_start 0
+#define GEN4_MI_STORE_DATA_IMM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Data DWord 0 */
+
+
+#define GEN5_MI_STORE_DATA_IMM_DataDWord0_bits 32
+#define GEN45_MI_STORE_DATA_IMM_DataDWord0_bits 32
+#define GEN4_MI_STORE_DATA_IMM_DataDWord0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DataDWord0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MI_STORE_DATA_IMM_DataDWord0_start 96
+#define GEN45_MI_STORE_DATA_IMM_DataDWord0_start 96
+#define GEN4_MI_STORE_DATA_IMM_DataDWord0_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DataDWord0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Data DWord 1 */
+
+
+#define GEN5_MI_STORE_DATA_IMM_DataDWord1_bits 32
+#define GEN45_MI_STORE_DATA_IMM_DataDWord1_bits 32
+#define GEN4_MI_STORE_DATA_IMM_DataDWord1_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DataDWord1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MI_STORE_DATA_IMM_DataDWord1_start 128
+#define GEN45_MI_STORE_DATA_IMM_DataDWord1_start 128
+#define GEN4_MI_STORE_DATA_IMM_DataDWord1_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_DataDWord1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Immediate Data */
+
+
+#define GEN10_MI_STORE_DATA_IMM_ImmediateData_bits 64
+#define GEN9_MI_STORE_DATA_IMM_ImmediateData_bits 64
+#define GEN8_MI_STORE_DATA_IMM_ImmediateData_bits 64
+#define GEN75_MI_STORE_DATA_IMM_ImmediateData_bits 64
+#define GEN7_MI_STORE_DATA_IMM_ImmediateData_bits 64
+#define GEN6_MI_STORE_DATA_IMM_ImmediateData_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_ImmediateData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_ImmediateData_start 96
+#define GEN9_MI_STORE_DATA_IMM_ImmediateData_start 96
+#define GEN8_MI_STORE_DATA_IMM_ImmediateData_start 96
+#define GEN75_MI_STORE_DATA_IMM_ImmediateData_start 96
+#define GEN7_MI_STORE_DATA_IMM_ImmediateData_start 96
+#define GEN6_MI_STORE_DATA_IMM_ImmediateData_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_ImmediateData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::MI Command Opcode */
+
+
+#define GEN10_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN9_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN8_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN75_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN7_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN6_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN5_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN45_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+#define GEN4_MI_STORE_DATA_IMM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN9_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN8_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN75_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN7_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN6_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN5_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN45_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+#define GEN4_MI_STORE_DATA_IMM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 23;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 23;
+ } else {
+ return 23;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Memory Address Type */
+
+
+#define GEN5_MI_STORE_DATA_IMM_MemoryAddressType_bits 1
+#define GEN45_MI_STORE_DATA_IMM_MemoryAddressType_bits 1
+#define GEN4_MI_STORE_DATA_IMM_MemoryAddressType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_MemoryAddressType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MI_STORE_DATA_IMM_MemoryAddressType_start 22
+#define GEN45_MI_STORE_DATA_IMM_MemoryAddressType_start 22
+#define GEN4_MI_STORE_DATA_IMM_MemoryAddressType_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_MemoryAddressType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Physical Start Address Extension */
+
+
+#define GEN5_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_bits 4
+#define GEN45_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_bits 4
+#define GEN4_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_PhysicalStartAddressExtension_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_start 32
+#define GEN45_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_start 32
+#define GEN4_MI_STORE_DATA_IMM_PhysicalStartAddressExtension_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_PhysicalStartAddressExtension_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Store Qword */
+
+
+#define GEN10_MI_STORE_DATA_IMM_StoreQword_bits 1
+#define GEN9_MI_STORE_DATA_IMM_StoreQword_bits 1
+#define GEN8_MI_STORE_DATA_IMM_StoreQword_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_StoreQword_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_StoreQword_start 21
+#define GEN9_MI_STORE_DATA_IMM_StoreQword_start 21
+#define GEN8_MI_STORE_DATA_IMM_StoreQword_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_StoreQword_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_IMM::Use Global GTT */
+
+
+#define GEN10_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+#define GEN9_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+#define GEN8_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+#define GEN75_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+#define GEN7_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+#define GEN6_MI_STORE_DATA_IMM_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+#define GEN9_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+#define GEN8_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+#define GEN75_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+#define GEN7_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+#define GEN6_MI_STORE_DATA_IMM_UseGlobalGTT_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_IMM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_length 3
+#define GEN9_MI_STORE_DATA_INDEX_length 3
+#define GEN8_MI_STORE_DATA_INDEX_length 3
+#define GEN75_MI_STORE_DATA_INDEX_length 3
+#define GEN7_MI_STORE_DATA_INDEX_length 3
+#define GEN6_MI_STORE_DATA_INDEX_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::Command Type */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_CommandType_bits 3
+#define GEN9_MI_STORE_DATA_INDEX_CommandType_bits 3
+#define GEN8_MI_STORE_DATA_INDEX_CommandType_bits 3
+#define GEN75_MI_STORE_DATA_INDEX_CommandType_bits 3
+#define GEN7_MI_STORE_DATA_INDEX_CommandType_bits 3
+#define GEN6_MI_STORE_DATA_INDEX_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_CommandType_start 29
+#define GEN9_MI_STORE_DATA_INDEX_CommandType_start 29
+#define GEN8_MI_STORE_DATA_INDEX_CommandType_start 29
+#define GEN75_MI_STORE_DATA_INDEX_CommandType_start 29
+#define GEN7_MI_STORE_DATA_INDEX_CommandType_start 29
+#define GEN6_MI_STORE_DATA_INDEX_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::DWord Length */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DWordLength_bits 8
+#define GEN9_MI_STORE_DATA_INDEX_DWordLength_bits 8
+#define GEN8_MI_STORE_DATA_INDEX_DWordLength_bits 8
+#define GEN75_MI_STORE_DATA_INDEX_DWordLength_bits 8
+#define GEN7_MI_STORE_DATA_INDEX_DWordLength_bits 8
+#define GEN6_MI_STORE_DATA_INDEX_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DWordLength_start 0
+#define GEN9_MI_STORE_DATA_INDEX_DWordLength_start 0
+#define GEN8_MI_STORE_DATA_INDEX_DWordLength_start 0
+#define GEN75_MI_STORE_DATA_INDEX_DWordLength_start 0
+#define GEN7_MI_STORE_DATA_INDEX_DWordLength_start 0
+#define GEN6_MI_STORE_DATA_INDEX_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::Data DWord 0 */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+#define GEN9_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+#define GEN8_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+#define GEN75_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+#define GEN7_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+#define GEN6_MI_STORE_DATA_INDEX_DataDWord0_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DataDWord0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DataDWord0_start 64
+#define GEN9_MI_STORE_DATA_INDEX_DataDWord0_start 64
+#define GEN8_MI_STORE_DATA_INDEX_DataDWord0_start 64
+#define GEN75_MI_STORE_DATA_INDEX_DataDWord0_start 64
+#define GEN7_MI_STORE_DATA_INDEX_DataDWord0_start 64
+#define GEN6_MI_STORE_DATA_INDEX_DataDWord0_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DataDWord0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::Data DWord 1 */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+#define GEN9_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+#define GEN8_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+#define GEN75_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+#define GEN7_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+#define GEN6_MI_STORE_DATA_INDEX_DataDWord1_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DataDWord1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_DataDWord1_start 96
+#define GEN9_MI_STORE_DATA_INDEX_DataDWord1_start 96
+#define GEN8_MI_STORE_DATA_INDEX_DataDWord1_start 96
+#define GEN75_MI_STORE_DATA_INDEX_DataDWord1_start 96
+#define GEN7_MI_STORE_DATA_INDEX_DataDWord1_start 96
+#define GEN6_MI_STORE_DATA_INDEX_DataDWord1_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_DataDWord1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::MI Command Opcode */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+#define GEN9_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+#define GEN8_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+#define GEN75_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+#define GEN7_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+#define GEN6_MI_STORE_DATA_INDEX_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+#define GEN9_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+#define GEN8_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+#define GEN75_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+#define GEN7_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+#define GEN6_MI_STORE_DATA_INDEX_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::Offset */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_Offset_bits 10
+#define GEN9_MI_STORE_DATA_INDEX_Offset_bits 10
+#define GEN8_MI_STORE_DATA_INDEX_Offset_bits 10
+#define GEN75_MI_STORE_DATA_INDEX_Offset_bits 10
+#define GEN7_MI_STORE_DATA_INDEX_Offset_bits 10
+#define GEN6_MI_STORE_DATA_INDEX_Offset_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_Offset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_Offset_start 34
+#define GEN9_MI_STORE_DATA_INDEX_Offset_start 34
+#define GEN8_MI_STORE_DATA_INDEX_Offset_start 34
+#define GEN75_MI_STORE_DATA_INDEX_Offset_start 34
+#define GEN7_MI_STORE_DATA_INDEX_Offset_start 34
+#define GEN6_MI_STORE_DATA_INDEX_Offset_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_Offset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_DATA_INDEX::Use Per-Process Hardware Status Page */
+
+
+#define GEN10_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_bits 1
+#define GEN9_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_bits 1
+#define GEN8_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_start 21
+#define GEN9_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_start 21
+#define GEN8_MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_DATA_INDEX_UsePerProcessHardwareStatusPage_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_length 4
+#define GEN9_MI_STORE_REGISTER_MEM_length 4
+#define GEN8_MI_STORE_REGISTER_MEM_length 4
+#define GEN75_MI_STORE_REGISTER_MEM_length 3
+#define GEN7_MI_STORE_REGISTER_MEM_length 3
+#define GEN6_MI_STORE_REGISTER_MEM_length 3
+#define GEN5_MI_STORE_REGISTER_MEM_length 3
+#define GEN45_MI_STORE_REGISTER_MEM_length 3
+#define GEN4_MI_STORE_REGISTER_MEM_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Command Type */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN9_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN8_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN75_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN7_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN6_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN5_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN45_MI_STORE_REGISTER_MEM_CommandType_bits 3
+#define GEN4_MI_STORE_REGISTER_MEM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN9_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN8_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN75_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN7_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN6_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN5_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN45_MI_STORE_REGISTER_MEM_CommandType_start 29
+#define GEN4_MI_STORE_REGISTER_MEM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::DWord Length */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN9_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN8_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN75_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN7_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN6_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN5_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN45_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+#define GEN4_MI_STORE_REGISTER_MEM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN9_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN8_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN75_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN7_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN6_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN5_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN45_MI_STORE_REGISTER_MEM_DWordLength_start 0
+#define GEN4_MI_STORE_REGISTER_MEM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::MI Command Opcode */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN9_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN8_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN75_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN7_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN6_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN5_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN45_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+#define GEN4_MI_STORE_REGISTER_MEM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN9_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN8_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN75_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN7_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN6_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN5_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN45_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+#define GEN4_MI_STORE_REGISTER_MEM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 23;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 23;
+ } else {
+ return 23;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Memory Address */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN9_MI_STORE_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN8_MI_STORE_REGISTER_MEM_MemoryAddress_bits 62
+#define GEN75_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN7_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN6_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN5_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN45_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+#define GEN4_MI_STORE_REGISTER_MEM_MemoryAddress_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 62;
+ case 9: return 62;
+ case 8: return 62;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 30;
+ case 5: return 30;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 30;
+ } else {
+ return 30;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN9_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN8_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN75_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN7_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN6_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN5_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN45_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+#define GEN4_MI_STORE_REGISTER_MEM_MemoryAddress_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 66;
+ case 5: return 66;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 66;
+ } else {
+ return 66;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Physical Start Address Extension */
+
+
+#define GEN45_MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_bits 4
+#define GEN4_MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_start 60
+#define GEN4_MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_PhysicalStartAddressExtension_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 60;
+ } else {
+ return 60;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Predicate Enable */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_PredicateEnable_bits 1
+#define GEN9_MI_STORE_REGISTER_MEM_PredicateEnable_bits 1
+#define GEN8_MI_STORE_REGISTER_MEM_PredicateEnable_bits 1
+#define GEN75_MI_STORE_REGISTER_MEM_PredicateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_PredicateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_PredicateEnable_start 21
+#define GEN9_MI_STORE_REGISTER_MEM_PredicateEnable_start 21
+#define GEN8_MI_STORE_REGISTER_MEM_PredicateEnable_start 21
+#define GEN75_MI_STORE_REGISTER_MEM_PredicateEnable_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_PredicateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Register Address */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN9_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN8_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN75_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN7_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN6_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN5_MI_STORE_REGISTER_MEM_RegisterAddress_bits 24
+#define GEN45_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+#define GEN4_MI_STORE_REGISTER_MEM_RegisterAddress_bits 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_RegisterAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 21;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 21;
+ } else {
+ return 21;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN9_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN8_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN75_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN7_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN6_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN5_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN45_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+#define GEN4_MI_STORE_REGISTER_MEM_RegisterAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_RegisterAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 34;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 34;
+ } else {
+ return 34;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_REGISTER_MEM::Use Global GTT */
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN9_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN8_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN75_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN7_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN6_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN5_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN45_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+#define GEN4_MI_STORE_REGISTER_MEM_UseGlobalGTT_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_UseGlobalGTT_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN9_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN8_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN75_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN7_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN6_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN5_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN45_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+#define GEN4_MI_STORE_REGISTER_MEM_UseGlobalGTT_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_REGISTER_MEM_UseGlobalGTT_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM */
+
+
+#define GEN9_MI_STORE_URB_MEM_length 4
+#define GEN8_MI_STORE_URB_MEM_length 4
+#define GEN75_MI_STORE_URB_MEM_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM::Command Type */
+
+
+#define GEN9_MI_STORE_URB_MEM_CommandType_bits 3
+#define GEN8_MI_STORE_URB_MEM_CommandType_bits 3
+#define GEN75_MI_STORE_URB_MEM_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_STORE_URB_MEM_CommandType_start 29
+#define GEN8_MI_STORE_URB_MEM_CommandType_start 29
+#define GEN75_MI_STORE_URB_MEM_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM::DWord Length */
+
+
+#define GEN9_MI_STORE_URB_MEM_DWordLength_bits 8
+#define GEN8_MI_STORE_URB_MEM_DWordLength_bits 8
+#define GEN75_MI_STORE_URB_MEM_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_STORE_URB_MEM_DWordLength_start 0
+#define GEN8_MI_STORE_URB_MEM_DWordLength_start 0
+#define GEN75_MI_STORE_URB_MEM_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM::MI Command Opcode */
+
+
+#define GEN9_MI_STORE_URB_MEM_MICommandOpcode_bits 6
+#define GEN8_MI_STORE_URB_MEM_MICommandOpcode_bits 6
+#define GEN75_MI_STORE_URB_MEM_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_STORE_URB_MEM_MICommandOpcode_start 23
+#define GEN8_MI_STORE_URB_MEM_MICommandOpcode_start 23
+#define GEN75_MI_STORE_URB_MEM_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM::Memory Address */
+
+
+#define GEN9_MI_STORE_URB_MEM_MemoryAddress_bits 58
+#define GEN8_MI_STORE_URB_MEM_MemoryAddress_bits 58
+#define GEN75_MI_STORE_URB_MEM_MemoryAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_MemoryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 58;
+ case 8: return 58;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_STORE_URB_MEM_MemoryAddress_start 70
+#define GEN8_MI_STORE_URB_MEM_MemoryAddress_start 70
+#define GEN75_MI_STORE_URB_MEM_MemoryAddress_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_MemoryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 70;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_STORE_URB_MEM::URB Address */
+
+
+#define GEN9_MI_STORE_URB_MEM_URBAddress_bits 13
+#define GEN8_MI_STORE_URB_MEM_URBAddress_bits 13
+#define GEN75_MI_STORE_URB_MEM_URBAddress_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_URBAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_STORE_URB_MEM_URBAddress_start 34
+#define GEN8_MI_STORE_URB_MEM_URBAddress_start 34
+#define GEN75_MI_STORE_URB_MEM_URBAddress_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_STORE_URB_MEM_URBAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SUSPEND_FLUSH */
+
+
+#define GEN10_MI_SUSPEND_FLUSH_length 1
+#define GEN9_MI_SUSPEND_FLUSH_length 1
+#define GEN8_MI_SUSPEND_FLUSH_length 1
+#define GEN75_MI_SUSPEND_FLUSH_length 1
+#define GEN7_MI_SUSPEND_FLUSH_length 1
+#define GEN6_MI_SUSPEND_FLUSH_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SUSPEND_FLUSH::Command Type */
+
+
+#define GEN10_MI_SUSPEND_FLUSH_CommandType_bits 3
+#define GEN9_MI_SUSPEND_FLUSH_CommandType_bits 3
+#define GEN8_MI_SUSPEND_FLUSH_CommandType_bits 3
+#define GEN75_MI_SUSPEND_FLUSH_CommandType_bits 3
+#define GEN7_MI_SUSPEND_FLUSH_CommandType_bits 3
+#define GEN6_MI_SUSPEND_FLUSH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SUSPEND_FLUSH_CommandType_start 29
+#define GEN9_MI_SUSPEND_FLUSH_CommandType_start 29
+#define GEN8_MI_SUSPEND_FLUSH_CommandType_start 29
+#define GEN75_MI_SUSPEND_FLUSH_CommandType_start 29
+#define GEN7_MI_SUSPEND_FLUSH_CommandType_start 29
+#define GEN6_MI_SUSPEND_FLUSH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SUSPEND_FLUSH::MI Command Opcode */
+
+
+#define GEN10_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+#define GEN9_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+#define GEN8_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+#define GEN75_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+#define GEN7_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+#define GEN6_MI_SUSPEND_FLUSH_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+#define GEN9_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+#define GEN8_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+#define GEN75_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+#define GEN7_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+#define GEN6_MI_SUSPEND_FLUSH_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_SUSPEND_FLUSH::Suspend Flush */
+
+
+#define GEN10_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+#define GEN9_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+#define GEN8_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+#define GEN75_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+#define GEN7_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+#define GEN6_MI_SUSPEND_FLUSH_SuspendFlush_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_SuspendFlush_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+#define GEN9_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+#define GEN8_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+#define GEN75_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+#define GEN7_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+#define GEN6_MI_SUSPEND_FLUSH_SuspendFlush_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_SUSPEND_FLUSH_SuspendFlush_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_TOPOLOGY_FILTER */
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_length 1
+#define GEN9_MI_TOPOLOGY_FILTER_length 1
+#define GEN8_MI_TOPOLOGY_FILTER_length 1
+#define GEN75_MI_TOPOLOGY_FILTER_length 1
+#define GEN7_MI_TOPOLOGY_FILTER_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_TOPOLOGY_FILTER::Command Type */
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_CommandType_bits 3
+#define GEN9_MI_TOPOLOGY_FILTER_CommandType_bits 3
+#define GEN8_MI_TOPOLOGY_FILTER_CommandType_bits 3
+#define GEN75_MI_TOPOLOGY_FILTER_CommandType_bits 3
+#define GEN7_MI_TOPOLOGY_FILTER_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_CommandType_start 29
+#define GEN9_MI_TOPOLOGY_FILTER_CommandType_start 29
+#define GEN8_MI_TOPOLOGY_FILTER_CommandType_start 29
+#define GEN75_MI_TOPOLOGY_FILTER_CommandType_start 29
+#define GEN7_MI_TOPOLOGY_FILTER_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_TOPOLOGY_FILTER::MI Command Opcode */
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_MICommandOpcode_bits 6
+#define GEN9_MI_TOPOLOGY_FILTER_MICommandOpcode_bits 6
+#define GEN8_MI_TOPOLOGY_FILTER_MICommandOpcode_bits 6
+#define GEN75_MI_TOPOLOGY_FILTER_MICommandOpcode_bits 6
+#define GEN7_MI_TOPOLOGY_FILTER_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_MICommandOpcode_start 23
+#define GEN9_MI_TOPOLOGY_FILTER_MICommandOpcode_start 23
+#define GEN8_MI_TOPOLOGY_FILTER_MICommandOpcode_start 23
+#define GEN75_MI_TOPOLOGY_FILTER_MICommandOpcode_start 23
+#define GEN7_MI_TOPOLOGY_FILTER_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_TOPOLOGY_FILTER::Topology Filter Value */
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_TopologyFilterValue_bits 6
+#define GEN9_MI_TOPOLOGY_FILTER_TopologyFilterValue_bits 6
+#define GEN8_MI_TOPOLOGY_FILTER_TopologyFilterValue_bits 6
+#define GEN75_MI_TOPOLOGY_FILTER_TopologyFilterValue_bits 6
+#define GEN7_MI_TOPOLOGY_FILTER_TopologyFilterValue_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_TopologyFilterValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_TOPOLOGY_FILTER_TopologyFilterValue_start 0
+#define GEN9_MI_TOPOLOGY_FILTER_TopologyFilterValue_start 0
+#define GEN8_MI_TOPOLOGY_FILTER_TopologyFilterValue_start 0
+#define GEN75_MI_TOPOLOGY_FILTER_TopologyFilterValue_start 0
+#define GEN7_MI_TOPOLOGY_FILTER_TopologyFilterValue_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_TOPOLOGY_FILTER_TopologyFilterValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_UPDATE_GTT */
+
+
+
+
+
+/* MI_UPDATE_GTT::Command Type */
+
+
+#define GEN10_MI_UPDATE_GTT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_UPDATE_GTT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_UPDATE_GTT::DWord Length */
+
+
+#define GEN10_MI_UPDATE_GTT_DWordLength_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_UPDATE_GTT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_UPDATE_GTT::Entry Address */
+
+
+#define GEN10_MI_UPDATE_GTT_EntryAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_EntryAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_UPDATE_GTT_EntryAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_EntryAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_UPDATE_GTT::Entry Data */
+
+
+#define GEN10_MI_UPDATE_GTT_EntryData_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_EntryData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_UPDATE_GTT_EntryData_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_EntryData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_UPDATE_GTT::MI Command Opcode */
+
+
+#define GEN10_MI_UPDATE_GTT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_UPDATE_GTT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_UPDATE_GTT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_ATOMIC_ALLOC */
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_length 1
+#define GEN8_MI_URB_ATOMIC_ALLOC_length 1
+#define GEN75_MI_URB_ATOMIC_ALLOC_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_ATOMIC_ALLOC::Command Type */
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_CommandType_bits 3
+#define GEN8_MI_URB_ATOMIC_ALLOC_CommandType_bits 3
+#define GEN75_MI_URB_ATOMIC_ALLOC_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_CommandType_start 29
+#define GEN8_MI_URB_ATOMIC_ALLOC_CommandType_start 29
+#define GEN75_MI_URB_ATOMIC_ALLOC_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_ATOMIC_ALLOC::MI Command Opcode */
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_MICommandOpcode_bits 6
+#define GEN8_MI_URB_ATOMIC_ALLOC_MICommandOpcode_bits 6
+#define GEN75_MI_URB_ATOMIC_ALLOC_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_MICommandOpcode_start 23
+#define GEN8_MI_URB_ATOMIC_ALLOC_MICommandOpcode_start 23
+#define GEN75_MI_URB_ATOMIC_ALLOC_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_ATOMIC_ALLOC::URB Atomic Storage Offset */
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_bits 8
+#define GEN8_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_bits 8
+#define GEN75_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_start 12
+#define GEN8_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_start 12
+#define GEN75_MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_URBAtomicStorageOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_ATOMIC_ALLOC::URB Atomic Storage Size */
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_bits 9
+#define GEN8_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_bits 9
+#define GEN75_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_start 0
+#define GEN8_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_start 0
+#define GEN75_MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_ATOMIC_ALLOC_URBAtomicStorageSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR */
+
+
+#define GEN8_MI_URB_CLEAR_length 2
+#define GEN75_MI_URB_CLEAR_length 2
+#define GEN7_MI_URB_CLEAR_length 2
+#define GEN6_MI_URB_CLEAR_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR::Command Type */
+
+
+#define GEN8_MI_URB_CLEAR_CommandType_bits 3
+#define GEN75_MI_URB_CLEAR_CommandType_bits 3
+#define GEN7_MI_URB_CLEAR_CommandType_bits 3
+#define GEN6_MI_URB_CLEAR_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_URB_CLEAR_CommandType_start 29
+#define GEN75_MI_URB_CLEAR_CommandType_start 29
+#define GEN7_MI_URB_CLEAR_CommandType_start 29
+#define GEN6_MI_URB_CLEAR_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR::DWord Length */
+
+
+#define GEN8_MI_URB_CLEAR_DWordLength_bits 8
+#define GEN75_MI_URB_CLEAR_DWordLength_bits 8
+#define GEN7_MI_URB_CLEAR_DWordLength_bits 8
+#define GEN6_MI_URB_CLEAR_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_URB_CLEAR_DWordLength_start 0
+#define GEN75_MI_URB_CLEAR_DWordLength_start 0
+#define GEN7_MI_URB_CLEAR_DWordLength_start 0
+#define GEN6_MI_URB_CLEAR_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR::MI Command Opcode */
+
+
+#define GEN8_MI_URB_CLEAR_MICommandOpcode_bits 6
+#define GEN75_MI_URB_CLEAR_MICommandOpcode_bits 6
+#define GEN7_MI_URB_CLEAR_MICommandOpcode_bits 6
+#define GEN6_MI_URB_CLEAR_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_URB_CLEAR_MICommandOpcode_start 23
+#define GEN75_MI_URB_CLEAR_MICommandOpcode_start 23
+#define GEN7_MI_URB_CLEAR_MICommandOpcode_start 23
+#define GEN6_MI_URB_CLEAR_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR::URB Address */
+
+
+#define GEN8_MI_URB_CLEAR_URBAddress_bits 15
+#define GEN75_MI_URB_CLEAR_URBAddress_bits 15
+#define GEN7_MI_URB_CLEAR_URBAddress_bits 14
+#define GEN6_MI_URB_CLEAR_URBAddress_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_URBAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 14;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_URB_CLEAR_URBAddress_start 32
+#define GEN75_MI_URB_CLEAR_URBAddress_start 32
+#define GEN7_MI_URB_CLEAR_URBAddress_start 32
+#define GEN6_MI_URB_CLEAR_URBAddress_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_URBAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_URB_CLEAR::URB Clear Length */
+
+
+#define GEN8_MI_URB_CLEAR_URBClearLength_bits 14
+#define GEN75_MI_URB_CLEAR_URBClearLength_bits 14
+#define GEN7_MI_URB_CLEAR_URBClearLength_bits 13
+#define GEN6_MI_URB_CLEAR_URBClearLength_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_URBClearLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 13;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_URB_CLEAR_URBClearLength_start 48
+#define GEN75_MI_URB_CLEAR_URBClearLength_start 48
+#define GEN7_MI_URB_CLEAR_URBClearLength_start 48
+#define GEN6_MI_URB_CLEAR_URBClearLength_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_URB_CLEAR_URBClearLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_USER_INTERRUPT */
+
+
+#define GEN10_MI_USER_INTERRUPT_length 1
+#define GEN9_MI_USER_INTERRUPT_length 1
+#define GEN8_MI_USER_INTERRUPT_length 1
+#define GEN75_MI_USER_INTERRUPT_length 1
+#define GEN7_MI_USER_INTERRUPT_length 1
+#define GEN6_MI_USER_INTERRUPT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_USER_INTERRUPT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_USER_INTERRUPT::Command Type */
+
+
+#define GEN10_MI_USER_INTERRUPT_CommandType_bits 3
+#define GEN9_MI_USER_INTERRUPT_CommandType_bits 3
+#define GEN8_MI_USER_INTERRUPT_CommandType_bits 3
+#define GEN75_MI_USER_INTERRUPT_CommandType_bits 3
+#define GEN7_MI_USER_INTERRUPT_CommandType_bits 3
+#define GEN6_MI_USER_INTERRUPT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_USER_INTERRUPT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_USER_INTERRUPT_CommandType_start 29
+#define GEN9_MI_USER_INTERRUPT_CommandType_start 29
+#define GEN8_MI_USER_INTERRUPT_CommandType_start 29
+#define GEN75_MI_USER_INTERRUPT_CommandType_start 29
+#define GEN7_MI_USER_INTERRUPT_CommandType_start 29
+#define GEN6_MI_USER_INTERRUPT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_USER_INTERRUPT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_USER_INTERRUPT::MI Command Opcode */
+
+
+#define GEN10_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+#define GEN9_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+#define GEN8_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+#define GEN75_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+#define GEN7_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+#define GEN6_MI_USER_INTERRUPT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_USER_INTERRUPT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_USER_INTERRUPT_MICommandOpcode_start 23
+#define GEN9_MI_USER_INTERRUPT_MICommandOpcode_start 23
+#define GEN8_MI_USER_INTERRUPT_MICommandOpcode_start 23
+#define GEN75_MI_USER_INTERRUPT_MICommandOpcode_start 23
+#define GEN7_MI_USER_INTERRUPT_MICommandOpcode_start 23
+#define GEN6_MI_USER_INTERRUPT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_USER_INTERRUPT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_length 1
+#define GEN9_MI_WAIT_FOR_EVENT_length 1
+#define GEN8_MI_WAIT_FOR_EVENT_length 1
+#define GEN75_MI_WAIT_FOR_EVENT_length 1
+#define GEN7_MI_WAIT_FOR_EVENT_length 1
+#define GEN6_MI_WAIT_FOR_EVENT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Command Type */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_CommandType_bits 3
+#define GEN9_MI_WAIT_FOR_EVENT_CommandType_bits 3
+#define GEN8_MI_WAIT_FOR_EVENT_CommandType_bits 3
+#define GEN75_MI_WAIT_FOR_EVENT_CommandType_bits 3
+#define GEN7_MI_WAIT_FOR_EVENT_CommandType_bits 3
+#define GEN6_MI_WAIT_FOR_EVENT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_CommandType_start 29
+#define GEN9_MI_WAIT_FOR_EVENT_CommandType_start 29
+#define GEN8_MI_WAIT_FOR_EVENT_CommandType_start 29
+#define GEN75_MI_WAIT_FOR_EVENT_CommandType_start 29
+#define GEN7_MI_WAIT_FOR_EVENT_CommandType_start 29
+#define GEN6_MI_WAIT_FOR_EVENT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Condition Code Wait Select */
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_bits 4
+#define GEN7_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_bits 4
+#define GEN6_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_start 16
+#define GEN7_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_start 16
+#define GEN6_MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_ConditionCodeWaitSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe A Horizontal Blank Wait Enable */
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_start 5
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_start 5
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe A Scan Line Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start 0
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start 0
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start 0
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe A Vertical Blank Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start 3
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start 3
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start 3
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeAVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe B Horizontal Blank Wait Enable */
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_start 13
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_start 13
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe B Scan Line Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start 8
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start 8
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start 8
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe B Vertical Blank Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start 11
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start 11
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start 11
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeBVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe C Horizontal Blank Wait Enable */
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_start 22
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCHorizontalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe C Scan Line Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_start 14
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_start 14
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Pipe C Vertical Blank Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_start 21
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_start 21
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPipeCVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 A Vertical Blank Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_start 3
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1AVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 B Scan Line Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_start 8
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1BScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 B Vertical Blank Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_start 11
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1BVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 C Scan Line Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_start 14
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1CScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 C Vertical Blank Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_start 21
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1CVerticalBlankWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 1 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_start 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane1FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 10 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_start 17
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane10FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 11 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_start 18
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane11FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 12 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_start 19
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane12FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 2 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_start 9
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane2FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 3 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_start 15
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane3FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 4 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_start 2
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane4FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 5 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_start 10
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane5FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 6 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_start 20
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane6FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 7 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_start 6
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane7FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 8 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_start 7
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane8FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane 9 Flip Pending Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_start 16
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlane9FlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane A Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneAFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane B Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start 9
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start 9
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start 9
+#define GEN6_MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneBFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plane C Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_start 15
+#define GEN75_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_start 15
+#define GEN7_MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlaneCFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Plnae 1 A Scan Line Wait Enable */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_bits 1
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_start 0
+#define GEN9_MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplayPlnae1AScanLineWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Sprite A Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start 2
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start 2
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start 2
+#define GEN6_MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteAFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Sprite B Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits 1
+#define GEN6_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start 10
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start 10
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start 10
+#define GEN6_MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteBFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::Display Sprite C Flip Pending Wait Enable */
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_bits 1
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_bits 1
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_start 20
+#define GEN75_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_start 20
+#define GEN7_MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_DisplaySpriteCFlipPendingWaitEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* MI_WAIT_FOR_EVENT::MI Command Opcode */
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+#define GEN9_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+#define GEN8_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+#define GEN75_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+#define GEN7_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+#define GEN6_MI_WAIT_FOR_EVENT_MICommandOpcode_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_MICommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+#define GEN9_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+#define GEN8_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+#define GEN75_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+#define GEN7_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+#define GEN6_MI_WAIT_FOR_EVENT_MICommandOpcode_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+MI_WAIT_FOR_EVENT_MICommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PALETTE_ENTRY */
+
+
+#define GEN10_PALETTE_ENTRY_length 1
+#define GEN9_PALETTE_ENTRY_length 1
+#define GEN8_PALETTE_ENTRY_length 1
+#define GEN75_PALETTE_ENTRY_length 1
+#define GEN7_PALETTE_ENTRY_length 1
+#define GEN6_PALETTE_ENTRY_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PALETTE_ENTRY::Alpha */
+
+
+#define GEN10_PALETTE_ENTRY_Alpha_bits 8
+#define GEN9_PALETTE_ENTRY_Alpha_bits 8
+#define GEN8_PALETTE_ENTRY_Alpha_bits 8
+#define GEN75_PALETTE_ENTRY_Alpha_bits 8
+#define GEN7_PALETTE_ENTRY_Alpha_bits 8
+#define GEN6_PALETTE_ENTRY_Alpha_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Alpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PALETTE_ENTRY_Alpha_start 24
+#define GEN9_PALETTE_ENTRY_Alpha_start 24
+#define GEN8_PALETTE_ENTRY_Alpha_start 24
+#define GEN75_PALETTE_ENTRY_Alpha_start 24
+#define GEN7_PALETTE_ENTRY_Alpha_start 24
+#define GEN6_PALETTE_ENTRY_Alpha_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Alpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PALETTE_ENTRY::Blue */
+
+
+#define GEN10_PALETTE_ENTRY_Blue_bits 8
+#define GEN9_PALETTE_ENTRY_Blue_bits 8
+#define GEN8_PALETTE_ENTRY_Blue_bits 8
+#define GEN75_PALETTE_ENTRY_Blue_bits 8
+#define GEN7_PALETTE_ENTRY_Blue_bits 8
+#define GEN6_PALETTE_ENTRY_Blue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Blue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PALETTE_ENTRY_Blue_start 0
+#define GEN9_PALETTE_ENTRY_Blue_start 0
+#define GEN8_PALETTE_ENTRY_Blue_start 0
+#define GEN75_PALETTE_ENTRY_Blue_start 0
+#define GEN7_PALETTE_ENTRY_Blue_start 0
+#define GEN6_PALETTE_ENTRY_Blue_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Blue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PALETTE_ENTRY::Green */
+
+
+#define GEN10_PALETTE_ENTRY_Green_bits 8
+#define GEN9_PALETTE_ENTRY_Green_bits 8
+#define GEN8_PALETTE_ENTRY_Green_bits 8
+#define GEN75_PALETTE_ENTRY_Green_bits 8
+#define GEN7_PALETTE_ENTRY_Green_bits 8
+#define GEN6_PALETTE_ENTRY_Green_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Green_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PALETTE_ENTRY_Green_start 8
+#define GEN9_PALETTE_ENTRY_Green_start 8
+#define GEN8_PALETTE_ENTRY_Green_start 8
+#define GEN75_PALETTE_ENTRY_Green_start 8
+#define GEN7_PALETTE_ENTRY_Green_start 8
+#define GEN6_PALETTE_ENTRY_Green_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Green_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PALETTE_ENTRY::Red */
+
+
+#define GEN10_PALETTE_ENTRY_Red_bits 8
+#define GEN9_PALETTE_ENTRY_Red_bits 8
+#define GEN8_PALETTE_ENTRY_Red_bits 8
+#define GEN75_PALETTE_ENTRY_Red_bits 8
+#define GEN7_PALETTE_ENTRY_Red_bits 8
+#define GEN6_PALETTE_ENTRY_Red_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Red_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PALETTE_ENTRY_Red_start 16
+#define GEN9_PALETTE_ENTRY_Red_start 16
+#define GEN8_PALETTE_ENTRY_Red_start 16
+#define GEN75_PALETTE_ENTRY_Red_start 16
+#define GEN7_PALETTE_ENTRY_Red_start 16
+#define GEN6_PALETTE_ENTRY_Red_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+PALETTE_ENTRY_Red_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT */
+
+
+#define GEN10_PIPELINE_SELECT_length 1
+#define GEN9_PIPELINE_SELECT_length 1
+#define GEN8_PIPELINE_SELECT_length 1
+#define GEN75_PIPELINE_SELECT_length 1
+#define GEN7_PIPELINE_SELECT_length 1
+#define GEN6_PIPELINE_SELECT_length 1
+#define GEN5_PIPELINE_SELECT_length 1
+#define GEN45_PIPELINE_SELECT_length 1
+#define GEN4_PIPELINE_SELECT_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::3D Command Opcode */
+
+
+#define GEN10_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN9_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN8_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN75_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN7_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN6_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN5_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN45_PIPELINE_SELECT_3DCommandOpcode_bits 3
+#define GEN4_PIPELINE_SELECT_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN9_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN8_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN75_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN7_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN6_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN5_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN45_PIPELINE_SELECT_3DCommandOpcode_start 24
+#define GEN4_PIPELINE_SELECT_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::3D Command Sub Opcode */
+
+
+#define GEN10_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN9_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN8_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN75_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN7_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN6_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN5_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN45_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+#define GEN4_PIPELINE_SELECT_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN9_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN8_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN75_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN7_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN6_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN5_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN45_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+#define GEN4_PIPELINE_SELECT_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Command SubType */
+
+
+#define GEN10_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN9_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN8_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN75_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN7_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN6_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN5_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN45_PIPELINE_SELECT_CommandSubType_bits 2
+#define GEN4_PIPELINE_SELECT_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN9_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN8_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN75_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN7_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN6_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN5_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN45_PIPELINE_SELECT_CommandSubType_start 27
+#define GEN4_PIPELINE_SELECT_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Command Type */
+
+
+#define GEN10_PIPELINE_SELECT_CommandType_bits 3
+#define GEN9_PIPELINE_SELECT_CommandType_bits 3
+#define GEN8_PIPELINE_SELECT_CommandType_bits 3
+#define GEN75_PIPELINE_SELECT_CommandType_bits 3
+#define GEN7_PIPELINE_SELECT_CommandType_bits 3
+#define GEN6_PIPELINE_SELECT_CommandType_bits 3
+#define GEN5_PIPELINE_SELECT_CommandType_bits 3
+#define GEN45_PIPELINE_SELECT_CommandType_bits 3
+#define GEN4_PIPELINE_SELECT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_CommandType_start 29
+#define GEN9_PIPELINE_SELECT_CommandType_start 29
+#define GEN8_PIPELINE_SELECT_CommandType_start 29
+#define GEN75_PIPELINE_SELECT_CommandType_start 29
+#define GEN7_PIPELINE_SELECT_CommandType_start 29
+#define GEN6_PIPELINE_SELECT_CommandType_start 29
+#define GEN5_PIPELINE_SELECT_CommandType_start 29
+#define GEN45_PIPELINE_SELECT_CommandType_start 29
+#define GEN4_PIPELINE_SELECT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Force Media Awake */
+
+
+#define GEN10_PIPELINE_SELECT_ForceMediaAwake_bits 1
+#define GEN9_PIPELINE_SELECT_ForceMediaAwake_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_ForceMediaAwake_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_ForceMediaAwake_start 5
+#define GEN9_PIPELINE_SELECT_ForceMediaAwake_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_ForceMediaAwake_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Mask Bits */
+
+
+#define GEN10_PIPELINE_SELECT_MaskBits_bits 8
+#define GEN9_PIPELINE_SELECT_MaskBits_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_MaskBits_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_MaskBits_start 8
+#define GEN9_PIPELINE_SELECT_MaskBits_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_MaskBits_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Media Sampler DOP Clock Gate Enable */
+
+
+#define GEN10_PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_bits 1
+#define GEN9_PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_start 4
+#define GEN9_PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_MediaSamplerDOPClockGateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPELINE_SELECT::Pipeline Selection */
+
+
+#define GEN10_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN9_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN8_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN75_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN7_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN6_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN5_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN45_PIPELINE_SELECT_PipelineSelection_bits 2
+#define GEN4_PIPELINE_SELECT_PipelineSelection_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_PipelineSelection_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN9_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN8_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN75_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN7_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN6_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN5_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN45_PIPELINE_SELECT_PipelineSelection_start 0
+#define GEN4_PIPELINE_SELECT_PipelineSelection_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPELINE_SELECT_PipelineSelection_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL */
+
+
+#define GEN10_PIPE_CONTROL_length 6
+#define GEN9_PIPE_CONTROL_length 6
+#define GEN8_PIPE_CONTROL_length 6
+#define GEN75_PIPE_CONTROL_length 5
+#define GEN7_PIPE_CONTROL_length 5
+#define GEN6_PIPE_CONTROL_length 5
+#define GEN5_PIPE_CONTROL_length 4
+#define GEN45_PIPE_CONTROL_length 4
+#define GEN4_PIPE_CONTROL_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::3D Command Opcode */
+
+
+#define GEN10_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN9_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN8_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN75_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN7_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN6_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN5_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN45_PIPE_CONTROL_3DCommandOpcode_bits 3
+#define GEN4_PIPE_CONTROL_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN9_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN8_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN75_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN7_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN6_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN5_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN45_PIPE_CONTROL_3DCommandOpcode_start 24
+#define GEN4_PIPE_CONTROL_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::3D Command Sub Opcode */
+
+
+#define GEN10_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN9_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN8_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN75_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN7_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN6_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN5_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN45_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+#define GEN4_PIPE_CONTROL_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN9_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN8_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN75_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN7_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN6_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN5_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN45_PIPE_CONTROL_3DCommandSubOpcode_start 16
+#define GEN4_PIPE_CONTROL_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Address */
+
+
+#define GEN10_PIPE_CONTROL_Address_bits 46
+#define GEN9_PIPE_CONTROL_Address_bits 46
+#define GEN8_PIPE_CONTROL_Address_bits 46
+#define GEN75_PIPE_CONTROL_Address_bits 30
+#define GEN7_PIPE_CONTROL_Address_bits 30
+#define GEN6_PIPE_CONTROL_Address_bits 29
+#define GEN5_PIPE_CONTROL_Address_bits 29
+#define GEN45_PIPE_CONTROL_Address_bits 29
+#define GEN4_PIPE_CONTROL_Address_bits 29
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_Address_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_Address_start 66
+#define GEN9_PIPE_CONTROL_Address_start 66
+#define GEN8_PIPE_CONTROL_Address_start 66
+#define GEN75_PIPE_CONTROL_Address_start 66
+#define GEN7_PIPE_CONTROL_Address_start 66
+#define GEN6_PIPE_CONTROL_Address_start 67
+#define GEN5_PIPE_CONTROL_Address_start 35
+#define GEN45_PIPE_CONTROL_Address_start 35
+#define GEN4_PIPE_CONTROL_Address_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_Address_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 66;
+ case 9: return 66;
+ case 8: return 66;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 66;
+ } else {
+ return 66;
+ }
+ case 6: return 67;
+ case 5: return 35;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 35;
+ } else {
+ return 35;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Command Streamer Stall Enable */
+
+
+#define GEN10_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+#define GEN9_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+#define GEN8_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+#define GEN75_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+#define GEN7_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+#define GEN6_PIPE_CONTROL_CommandStreamerStallEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandStreamerStallEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+#define GEN9_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+#define GEN8_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+#define GEN75_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+#define GEN7_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+#define GEN6_PIPE_CONTROL_CommandStreamerStallEnable_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandStreamerStallEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 52;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Command SubType */
+
+
+#define GEN10_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN9_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN8_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN75_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN7_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN6_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN5_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN45_PIPE_CONTROL_CommandSubType_bits 2
+#define GEN4_PIPE_CONTROL_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_CommandSubType_start 27
+#define GEN9_PIPE_CONTROL_CommandSubType_start 27
+#define GEN8_PIPE_CONTROL_CommandSubType_start 27
+#define GEN75_PIPE_CONTROL_CommandSubType_start 27
+#define GEN7_PIPE_CONTROL_CommandSubType_start 27
+#define GEN6_PIPE_CONTROL_CommandSubType_start 27
+#define GEN5_PIPE_CONTROL_CommandSubType_start 27
+#define GEN45_PIPE_CONTROL_CommandSubType_start 27
+#define GEN4_PIPE_CONTROL_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Command Type */
+
+
+#define GEN10_PIPE_CONTROL_CommandType_bits 3
+#define GEN9_PIPE_CONTROL_CommandType_bits 3
+#define GEN8_PIPE_CONTROL_CommandType_bits 3
+#define GEN75_PIPE_CONTROL_CommandType_bits 3
+#define GEN7_PIPE_CONTROL_CommandType_bits 3
+#define GEN6_PIPE_CONTROL_CommandType_bits 3
+#define GEN5_PIPE_CONTROL_CommandType_bits 3
+#define GEN45_PIPE_CONTROL_CommandType_bits 3
+#define GEN4_PIPE_CONTROL_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_CommandType_start 29
+#define GEN9_PIPE_CONTROL_CommandType_start 29
+#define GEN8_PIPE_CONTROL_CommandType_start 29
+#define GEN75_PIPE_CONTROL_CommandType_start 29
+#define GEN7_PIPE_CONTROL_CommandType_start 29
+#define GEN6_PIPE_CONTROL_CommandType_start 29
+#define GEN5_PIPE_CONTROL_CommandType_start 29
+#define GEN45_PIPE_CONTROL_CommandType_start 29
+#define GEN4_PIPE_CONTROL_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Constant Cache Invalidation Enable */
+
+
+#define GEN10_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+#define GEN9_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+#define GEN8_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+#define GEN75_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+#define GEN7_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+#define GEN6_PIPE_CONTROL_ConstantCacheInvalidationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_ConstantCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+#define GEN9_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+#define GEN8_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+#define GEN75_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+#define GEN7_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+#define GEN6_PIPE_CONTROL_ConstantCacheInvalidationEnable_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_ConstantCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 35;
+ case 9: return 35;
+ case 8: return 35;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 35;
+ } else {
+ return 35;
+ }
+ case 6: return 35;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::DC Flush Enable */
+
+
+#define GEN10_PIPE_CONTROL_DCFlushEnable_bits 1
+#define GEN9_PIPE_CONTROL_DCFlushEnable_bits 1
+#define GEN8_PIPE_CONTROL_DCFlushEnable_bits 1
+#define GEN75_PIPE_CONTROL_DCFlushEnable_bits 1
+#define GEN7_PIPE_CONTROL_DCFlushEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DCFlushEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_DCFlushEnable_start 37
+#define GEN9_PIPE_CONTROL_DCFlushEnable_start 37
+#define GEN8_PIPE_CONTROL_DCFlushEnable_start 37
+#define GEN75_PIPE_CONTROL_DCFlushEnable_start 37
+#define GEN7_PIPE_CONTROL_DCFlushEnable_start 37
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DCFlushEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 37;
+ } else {
+ return 37;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::DWord Length */
+
+
+#define GEN10_PIPE_CONTROL_DWordLength_bits 8
+#define GEN9_PIPE_CONTROL_DWordLength_bits 8
+#define GEN8_PIPE_CONTROL_DWordLength_bits 8
+#define GEN75_PIPE_CONTROL_DWordLength_bits 8
+#define GEN7_PIPE_CONTROL_DWordLength_bits 8
+#define GEN6_PIPE_CONTROL_DWordLength_bits 8
+#define GEN5_PIPE_CONTROL_DWordLength_bits 8
+#define GEN45_PIPE_CONTROL_DWordLength_bits 8
+#define GEN4_PIPE_CONTROL_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_DWordLength_start 0
+#define GEN9_PIPE_CONTROL_DWordLength_start 0
+#define GEN8_PIPE_CONTROL_DWordLength_start 0
+#define GEN75_PIPE_CONTROL_DWordLength_start 0
+#define GEN7_PIPE_CONTROL_DWordLength_start 0
+#define GEN6_PIPE_CONTROL_DWordLength_start 0
+#define GEN5_PIPE_CONTROL_DWordLength_start 0
+#define GEN45_PIPE_CONTROL_DWordLength_start 0
+#define GEN4_PIPE_CONTROL_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Depth Cache Flush Enable */
+
+
+#define GEN10_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+#define GEN9_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+#define GEN8_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+#define GEN75_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+#define GEN7_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+#define GEN6_PIPE_CONTROL_DepthCacheFlushEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthCacheFlushEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+#define GEN9_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+#define GEN8_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+#define GEN75_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+#define GEN7_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+#define GEN6_PIPE_CONTROL_DepthCacheFlushEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthCacheFlushEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Depth Cache Flush Inhibit */
+
+
+#define GEN5_PIPE_CONTROL_DepthCacheFlushInhibit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthCacheFlushInhibit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_PIPE_CONTROL_DepthCacheFlushInhibit_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthCacheFlushInhibit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Depth Stall Enable */
+
+
+#define GEN10_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN9_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN8_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN75_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN7_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN6_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN5_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN45_PIPE_CONTROL_DepthStallEnable_bits 1
+#define GEN4_PIPE_CONTROL_DepthStallEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthStallEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN9_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN8_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN75_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN7_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN6_PIPE_CONTROL_DepthStallEnable_start 45
+#define GEN5_PIPE_CONTROL_DepthStallEnable_start 13
+#define GEN45_PIPE_CONTROL_DepthStallEnable_start 13
+#define GEN4_PIPE_CONTROL_DepthStallEnable_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DepthStallEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 45;
+ case 9: return 45;
+ case 8: return 45;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 45;
+ } else {
+ return 45;
+ }
+ case 6: return 45;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Destination Address Type */
+
+
+#define GEN10_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN9_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN8_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN75_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN7_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN6_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN5_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN45_PIPE_CONTROL_DestinationAddressType_bits 1
+#define GEN4_PIPE_CONTROL_DestinationAddressType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DestinationAddressType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_DestinationAddressType_start 56
+#define GEN9_PIPE_CONTROL_DestinationAddressType_start 56
+#define GEN8_PIPE_CONTROL_DestinationAddressType_start 56
+#define GEN75_PIPE_CONTROL_DestinationAddressType_start 56
+#define GEN7_PIPE_CONTROL_DestinationAddressType_start 56
+#define GEN6_PIPE_CONTROL_DestinationAddressType_start 66
+#define GEN5_PIPE_CONTROL_DestinationAddressType_start 34
+#define GEN45_PIPE_CONTROL_DestinationAddressType_start 34
+#define GEN4_PIPE_CONTROL_DestinationAddressType_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_DestinationAddressType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 56;
+ } else {
+ return 56;
+ }
+ case 6: return 66;
+ case 5: return 34;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 34;
+ } else {
+ return 34;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Flush LLC */
+
+
+#define GEN10_PIPE_CONTROL_FlushLLC_bits 1
+#define GEN9_PIPE_CONTROL_FlushLLC_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_FlushLLC_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_FlushLLC_start 58
+#define GEN9_PIPE_CONTROL_FlushLLC_start 58
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_FlushLLC_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 58;
+ case 9: return 58;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Generic Media State Clear */
+
+
+#define GEN10_PIPE_CONTROL_GenericMediaStateClear_bits 1
+#define GEN9_PIPE_CONTROL_GenericMediaStateClear_bits 1
+#define GEN8_PIPE_CONTROL_GenericMediaStateClear_bits 1
+#define GEN75_PIPE_CONTROL_GenericMediaStateClear_bits 1
+#define GEN7_PIPE_CONTROL_GenericMediaStateClear_bits 1
+#define GEN6_PIPE_CONTROL_GenericMediaStateClear_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_GenericMediaStateClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_GenericMediaStateClear_start 48
+#define GEN9_PIPE_CONTROL_GenericMediaStateClear_start 48
+#define GEN8_PIPE_CONTROL_GenericMediaStateClear_start 48
+#define GEN75_PIPE_CONTROL_GenericMediaStateClear_start 48
+#define GEN7_PIPE_CONTROL_GenericMediaStateClear_start 48
+#define GEN6_PIPE_CONTROL_GenericMediaStateClear_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_GenericMediaStateClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Global Snapshot Count Reset */
+
+
+#define GEN10_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+#define GEN9_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+#define GEN8_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+#define GEN75_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+#define GEN7_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+#define GEN6_PIPE_CONTROL_GlobalSnapshotCountReset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_GlobalSnapshotCountReset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+#define GEN9_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+#define GEN8_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+#define GEN75_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+#define GEN7_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+#define GEN6_PIPE_CONTROL_GlobalSnapshotCountReset_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_GlobalSnapshotCountReset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 51;
+ } else {
+ return 51;
+ }
+ case 6: return 51;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Immediate Data */
+
+
+#define GEN10_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN9_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN8_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN75_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN7_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN6_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN5_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN45_PIPE_CONTROL_ImmediateData_bits 64
+#define GEN4_PIPE_CONTROL_ImmediateData_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_ImmediateData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_ImmediateData_start 128
+#define GEN9_PIPE_CONTROL_ImmediateData_start 128
+#define GEN8_PIPE_CONTROL_ImmediateData_start 128
+#define GEN75_PIPE_CONTROL_ImmediateData_start 96
+#define GEN7_PIPE_CONTROL_ImmediateData_start 96
+#define GEN6_PIPE_CONTROL_ImmediateData_start 96
+#define GEN5_PIPE_CONTROL_ImmediateData_start 64
+#define GEN45_PIPE_CONTROL_ImmediateData_start 64
+#define GEN4_PIPE_CONTROL_ImmediateData_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_ImmediateData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Indirect State Pointers Disable */
+
+
+#define GEN10_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN9_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN8_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN75_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN7_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN6_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN5_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+#define GEN45_PIPE_CONTROL_IndirectStatePointersDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_IndirectStatePointersDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN9_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN8_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN75_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN7_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN6_PIPE_CONTROL_IndirectStatePointersDisable_start 41
+#define GEN5_PIPE_CONTROL_IndirectStatePointersDisable_start 9
+#define GEN45_PIPE_CONTROL_IndirectStatePointersDisable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_IndirectStatePointersDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 41;
+ case 9: return 41;
+ case 8: return 41;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 41;
+ } else {
+ return 41;
+ }
+ case 6: return 41;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Instruction Cache Invalidate Enable */
+
+
+#define GEN10_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN9_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN8_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN75_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN7_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN6_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN5_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN45_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+#define GEN4_PIPE_CONTROL_InstructionCacheInvalidateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_InstructionCacheInvalidateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN9_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN8_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN75_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN7_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN6_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 43
+#define GEN5_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 11
+#define GEN45_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 11
+#define GEN4_PIPE_CONTROL_InstructionCacheInvalidateEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_InstructionCacheInvalidateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 43;
+ case 9: return 43;
+ case 8: return 43;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 43;
+ } else {
+ return 43;
+ }
+ case 6: return 43;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::LRI Post Sync Operation */
+
+
+#define GEN10_PIPE_CONTROL_LRIPostSyncOperation_bits 1
+#define GEN9_PIPE_CONTROL_LRIPostSyncOperation_bits 1
+#define GEN8_PIPE_CONTROL_LRIPostSyncOperation_bits 1
+#define GEN75_PIPE_CONTROL_LRIPostSyncOperation_bits 1
+#define GEN7_PIPE_CONTROL_LRIPostSyncOperation_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_LRIPostSyncOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_LRIPostSyncOperation_start 55
+#define GEN9_PIPE_CONTROL_LRIPostSyncOperation_start 55
+#define GEN8_PIPE_CONTROL_LRIPostSyncOperation_start 55
+#define GEN75_PIPE_CONTROL_LRIPostSyncOperation_start 55
+#define GEN7_PIPE_CONTROL_LRIPostSyncOperation_start 55
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_LRIPostSyncOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 55;
+ case 9: return 55;
+ case 8: return 55;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 55;
+ } else {
+ return 55;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Notify Enable */
+
+
+#define GEN10_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN9_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN8_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN75_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN7_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN6_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN5_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN45_PIPE_CONTROL_NotifyEnable_bits 1
+#define GEN4_PIPE_CONTROL_NotifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_NotifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN9_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN8_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN75_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN7_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN6_PIPE_CONTROL_NotifyEnable_start 40
+#define GEN5_PIPE_CONTROL_NotifyEnable_start 8
+#define GEN45_PIPE_CONTROL_NotifyEnable_start 8
+#define GEN4_PIPE_CONTROL_NotifyEnable_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_NotifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::PSD Sync Enable */
+
+
+#define GEN10_PIPE_CONTROL_PSDSyncEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PSDSyncEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_PSDSyncEnable_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PSDSyncEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 49;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Pipe Control Flush Enable */
+
+
+#define GEN10_PIPE_CONTROL_PipeControlFlushEnable_bits 1
+#define GEN9_PIPE_CONTROL_PipeControlFlushEnable_bits 1
+#define GEN8_PIPE_CONTROL_PipeControlFlushEnable_bits 1
+#define GEN75_PIPE_CONTROL_PipeControlFlushEnable_bits 1
+#define GEN7_PIPE_CONTROL_PipeControlFlushEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PipeControlFlushEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_PipeControlFlushEnable_start 39
+#define GEN9_PIPE_CONTROL_PipeControlFlushEnable_start 39
+#define GEN8_PIPE_CONTROL_PipeControlFlushEnable_start 39
+#define GEN75_PIPE_CONTROL_PipeControlFlushEnable_start 39
+#define GEN7_PIPE_CONTROL_PipeControlFlushEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PipeControlFlushEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 39;
+ } else {
+ return 39;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Post Sync Operation */
+
+
+#define GEN10_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN9_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN8_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN75_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN7_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN6_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN5_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN45_PIPE_CONTROL_PostSyncOperation_bits 2
+#define GEN4_PIPE_CONTROL_PostSyncOperation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PostSyncOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN9_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN8_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN75_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN7_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN6_PIPE_CONTROL_PostSyncOperation_start 46
+#define GEN5_PIPE_CONTROL_PostSyncOperation_start 14
+#define GEN45_PIPE_CONTROL_PostSyncOperation_start 14
+#define GEN4_PIPE_CONTROL_PostSyncOperation_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_PostSyncOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 46;
+ case 9: return 46;
+ case 8: return 46;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 46;
+ } else {
+ return 46;
+ }
+ case 6: return 46;
+ case 5: return 14;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 14;
+ } else {
+ return 14;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Render Target Cache Flush Enable */
+
+
+#define GEN10_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+#define GEN9_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+#define GEN8_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+#define GEN75_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+#define GEN7_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+#define GEN6_PIPE_CONTROL_RenderTargetCacheFlushEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_RenderTargetCacheFlushEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+#define GEN9_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+#define GEN8_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+#define GEN75_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+#define GEN7_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+#define GEN6_PIPE_CONTROL_RenderTargetCacheFlushEnable_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_RenderTargetCacheFlushEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 44;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Stall At Pixel Scoreboard */
+
+
+#define GEN10_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN9_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN8_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN75_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN7_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN6_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+#define GEN5_PIPE_CONTROL_StallAtPixelScoreboard_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StallAtPixelScoreboard_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN9_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN8_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN75_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN7_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN6_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+#define GEN5_PIPE_CONTROL_StallAtPixelScoreboard_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StallAtPixelScoreboard_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 33;
+ case 5: return 33;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::State Cache Invalidation Enable */
+
+
+#define GEN10_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+#define GEN9_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+#define GEN8_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+#define GEN75_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+#define GEN7_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+#define GEN6_PIPE_CONTROL_StateCacheInvalidationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StateCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+#define GEN9_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+#define GEN8_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+#define GEN75_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+#define GEN7_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+#define GEN6_PIPE_CONTROL_StateCacheInvalidationEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StateCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 34;
+ case 9: return 34;
+ case 8: return 34;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 34;
+ } else {
+ return 34;
+ }
+ case 6: return 34;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Store Data Index */
+
+
+#define GEN10_PIPE_CONTROL_StoreDataIndex_bits 1
+#define GEN9_PIPE_CONTROL_StoreDataIndex_bits 1
+#define GEN8_PIPE_CONTROL_StoreDataIndex_bits 1
+#define GEN75_PIPE_CONTROL_StoreDataIndex_bits 1
+#define GEN7_PIPE_CONTROL_StoreDataIndex_bits 1
+#define GEN6_PIPE_CONTROL_StoreDataIndex_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StoreDataIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_StoreDataIndex_start 53
+#define GEN9_PIPE_CONTROL_StoreDataIndex_start 53
+#define GEN8_PIPE_CONTROL_StoreDataIndex_start 53
+#define GEN75_PIPE_CONTROL_StoreDataIndex_start 53
+#define GEN7_PIPE_CONTROL_StoreDataIndex_start 53
+#define GEN6_PIPE_CONTROL_StoreDataIndex_start 53
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_StoreDataIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 53;
+ case 9: return 53;
+ case 8: return 53;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 53;
+ } else {
+ return 53;
+ }
+ case 6: return 53;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Synchronize GFDT Surface */
+
+
+#define GEN6_PIPE_CONTROL_SynchronizeGFDTSurface_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_SynchronizeGFDTSurface_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_PIPE_CONTROL_SynchronizeGFDTSurface_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_SynchronizeGFDTSurface_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 49;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::TLB Invalidate */
+
+
+#define GEN10_PIPE_CONTROL_TLBInvalidate_bits 1
+#define GEN9_PIPE_CONTROL_TLBInvalidate_bits 1
+#define GEN8_PIPE_CONTROL_TLBInvalidate_bits 1
+#define GEN75_PIPE_CONTROL_TLBInvalidate_bits 1
+#define GEN7_PIPE_CONTROL_TLBInvalidate_bits 1
+#define GEN6_PIPE_CONTROL_TLBInvalidate_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TLBInvalidate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_TLBInvalidate_start 50
+#define GEN9_PIPE_CONTROL_TLBInvalidate_start 50
+#define GEN8_PIPE_CONTROL_TLBInvalidate_start 50
+#define GEN75_PIPE_CONTROL_TLBInvalidate_start 50
+#define GEN7_PIPE_CONTROL_TLBInvalidate_start 50
+#define GEN6_PIPE_CONTROL_TLBInvalidate_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TLBInvalidate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 50;
+ case 9: return 50;
+ case 8: return 50;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 50;
+ } else {
+ return 50;
+ }
+ case 6: return 50;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Texture Cache Flush Enable */
+
+
+#define GEN5_PIPE_CONTROL_TextureCacheFlushEnable_bits 1
+#define GEN45_PIPE_CONTROL_TextureCacheFlushEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TextureCacheFlushEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_PIPE_CONTROL_TextureCacheFlushEnable_start 10
+#define GEN45_PIPE_CONTROL_TextureCacheFlushEnable_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TextureCacheFlushEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Texture Cache Invalidation Enable */
+
+
+#define GEN10_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+#define GEN9_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+#define GEN8_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+#define GEN75_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+#define GEN7_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+#define GEN6_PIPE_CONTROL_TextureCacheInvalidationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TextureCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+#define GEN9_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+#define GEN8_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+#define GEN75_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+#define GEN7_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+#define GEN6_PIPE_CONTROL_TextureCacheInvalidationEnable_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_TextureCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 42;
+ case 9: return 42;
+ case 8: return 42;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 42;
+ } else {
+ return 42;
+ }
+ case 6: return 42;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::VF Cache Invalidation Enable */
+
+
+#define GEN10_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+#define GEN9_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+#define GEN8_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+#define GEN75_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+#define GEN7_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+#define GEN6_PIPE_CONTROL_VFCacheInvalidationEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_VFCacheInvalidationEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+#define GEN9_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+#define GEN8_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+#define GEN75_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+#define GEN7_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+#define GEN6_PIPE_CONTROL_VFCacheInvalidationEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_VFCacheInvalidationEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 36;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PIPE_CONTROL::Write Cache Flush */
+
+
+#define GEN5_PIPE_CONTROL_WriteCacheFlush_bits 1
+#define GEN45_PIPE_CONTROL_WriteCacheFlush_bits 1
+#define GEN4_PIPE_CONTROL_WriteCacheFlush_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_WriteCacheFlush_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_PIPE_CONTROL_WriteCacheFlush_start 12
+#define GEN45_PIPE_CONTROL_WriteCacheFlush_start 12
+#define GEN4_PIPE_CONTROL_WriteCacheFlush_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+PIPE_CONTROL_WriteCacheFlush_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 12;
+ } else {
+ return 12;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PS_INVOCATION_COUNT */
+
+
+#define GEN10_PS_INVOCATION_COUNT_length 2
+#define GEN9_PS_INVOCATION_COUNT_length 2
+#define GEN8_PS_INVOCATION_COUNT_length 2
+#define GEN75_PS_INVOCATION_COUNT_length 2
+#define GEN7_PS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+PS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* PS_INVOCATION_COUNT::PS Invocation Count Report */
+
+
+#define GEN10_PS_INVOCATION_COUNT_PSInvocationCountReport_bits 64
+#define GEN9_PS_INVOCATION_COUNT_PSInvocationCountReport_bits 64
+#define GEN8_PS_INVOCATION_COUNT_PSInvocationCountReport_bits 64
+#define GEN75_PS_INVOCATION_COUNT_PSInvocationCountReport_bits 64
+#define GEN7_PS_INVOCATION_COUNT_PSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+PS_INVOCATION_COUNT_PSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_PS_INVOCATION_COUNT_PSInvocationCountReport_start 0
+#define GEN9_PS_INVOCATION_COUNT_PSInvocationCountReport_start 0
+#define GEN8_PS_INVOCATION_COUNT_PSInvocationCountReport_start 0
+#define GEN75_PS_INVOCATION_COUNT_PSInvocationCountReport_start 0
+#define GEN7_PS_INVOCATION_COUNT_PSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+PS_INVOCATION_COUNT_PSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG */
+
+
+#define GEN75_RCS_FAULT_REG_length 1
+#define GEN7_RCS_FAULT_REG_length 1
+#define GEN6_RCS_FAULT_REG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG::Fault Type */
+
+
+#define GEN75_RCS_FAULT_REG_FaultType_bits 2
+#define GEN7_RCS_FAULT_REG_FaultType_bits 2
+#define GEN6_RCS_FAULT_REG_FaultType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RCS_FAULT_REG_FaultType_start 1
+#define GEN7_RCS_FAULT_REG_FaultType_start 1
+#define GEN6_RCS_FAULT_REG_FaultType_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG::GTTSEL */
+
+
+#define GEN75_RCS_FAULT_REG_GTTSEL_bits -9
+#define GEN7_RCS_FAULT_REG_GTTSEL_bits -9
+#define GEN6_RCS_FAULT_REG_GTTSEL_bits -9
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return -9;
+ } else {
+ return -9;
+ }
+ case 6: return -9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RCS_FAULT_REG_GTTSEL_start 11
+#define GEN7_RCS_FAULT_REG_GTTSEL_start 11
+#define GEN6_RCS_FAULT_REG_GTTSEL_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG::SRCID of Fault */
+
+
+#define GEN75_RCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN7_RCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN6_RCS_FAULT_REG_SRCIDofFault_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN7_RCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN6_RCS_FAULT_REG_SRCIDofFault_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG::Valid Bit */
+
+
+#define GEN75_RCS_FAULT_REG_ValidBit_bits 1
+#define GEN7_RCS_FAULT_REG_ValidBit_bits 1
+#define GEN6_RCS_FAULT_REG_ValidBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RCS_FAULT_REG_ValidBit_start 0
+#define GEN7_RCS_FAULT_REG_ValidBit_start 0
+#define GEN6_RCS_FAULT_REG_ValidBit_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_FAULT_REG::Virtual Address of Fault */
+
+
+#define GEN75_RCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN7_RCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN6_RCS_FAULT_REG_VirtualAddressofFault_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN7_RCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN6_RCS_FAULT_REG_VirtualAddressofFault_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_length 1
+#define GEN8_RCS_RING_BUFFER_CTL_length 1
+#define GEN75_RCS_RING_BUFFER_CTL_length 1
+#define GEN7_RCS_RING_BUFFER_CTL_length 1
+#define GEN6_RCS_RING_BUFFER_CTL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL::Automatic Report Head Pointer */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN8_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN75_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN7_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN6_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN8_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN75_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN7_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN6_RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL::Buffer Length (in pages - 1) */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN8_RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN75_RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN7_RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN6_RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN8_RCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN75_RCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN7_RCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN6_RCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL::RBWait */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN8_RCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN75_RCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN7_RCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN6_RCS_RING_BUFFER_CTL_RBWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN8_RCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN75_RCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN7_RCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN6_RCS_RING_BUFFER_CTL_RBWait_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL::Ring Buffer Enable */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN8_RCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN75_RCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN7_RCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN6_RCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN8_RCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN75_RCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN7_RCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN6_RCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RCS_RING_BUFFER_CTL::Semaphore Wait */
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN8_RCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN75_RCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN7_RCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN6_RCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN8_RCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN75_RCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN7_RCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN6_RCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+RCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE */
+
+
+#define GEN10_RENDER_SURFACE_STATE_length 16
+#define GEN9_RENDER_SURFACE_STATE_length 16
+#define GEN8_RENDER_SURFACE_STATE_length 16
+#define GEN75_RENDER_SURFACE_STATE_length 8
+#define GEN7_RENDER_SURFACE_STATE_length 8
+#define GEN6_RENDER_SURFACE_STATE_length 6
+#define GEN5_RENDER_SURFACE_STATE_length 6
+#define GEN45_RENDER_SURFACE_STATE_length 6
+#define GEN4_RENDER_SURFACE_STATE_length 5
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Alpha Clear Color */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AlphaClearColor_bits 32
+#define GEN9_RENDER_SURFACE_STATE_AlphaClearColor_bits 32
+#define GEN8_RENDER_SURFACE_STATE_AlphaClearColor_bits 1
+#define GEN75_RENDER_SURFACE_STATE_AlphaClearColor_bits 1
+#define GEN7_RENDER_SURFACE_STATE_AlphaClearColor_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AlphaClearColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AlphaClearColor_start 480
+#define GEN9_RENDER_SURFACE_STATE_AlphaClearColor_start 480
+#define GEN8_RENDER_SURFACE_STATE_AlphaClearColor_start 252
+#define GEN75_RENDER_SURFACE_STATE_AlphaClearColor_start 252
+#define GEN7_RENDER_SURFACE_STATE_AlphaClearColor_start 252
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AlphaClearColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 480;
+ case 9: return 480;
+ case 8: return 252;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 252;
+ } else {
+ return 252;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Append Counter Address */
+
+
+#define GEN75_RENDER_SURFACE_STATE_AppendCounterAddress_bits 26
+#define GEN7_RENDER_SURFACE_STATE_AppendCounterAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AppendCounterAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_AppendCounterAddress_start 198
+#define GEN7_RENDER_SURFACE_STATE_AppendCounterAddress_start 198
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AppendCounterAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 198;
+ } else {
+ return 198;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Append Counter Enable */
+
+
+#define GEN75_RENDER_SURFACE_STATE_AppendCounterEnable_bits 1
+#define GEN7_RENDER_SURFACE_STATE_AppendCounterEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AppendCounterEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_AppendCounterEnable_start 193
+#define GEN7_RENDER_SURFACE_STATE_AppendCounterEnable_start 193
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AppendCounterEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 193;
+ } else {
+ return 193;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Auxiliary Surface Base Address */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits 52
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits 52
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits 52
+#define GEN75_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits 20
+#define GEN7_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start 332
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start 332
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start 332
+#define GEN75_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start 204
+#define GEN7_RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start 204
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 332;
+ case 9: return 332;
+ case 8: return 332;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 204;
+ } else {
+ return 204;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Auxiliary Surface Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_bits 3
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_bits 3
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_start 192
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_start 192
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceMode_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Auxiliary Surface Pitch */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits 9
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits 9
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits 9
+#define GEN75_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits 9
+#define GEN7_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start 195
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start 195
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start 195
+#define GEN75_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start 195
+#define GEN7_RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start 195
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 195;
+ case 9: return 195;
+ case 8: return 195;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 195;
+ } else {
+ return 195;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Auxiliary Surface QPitch */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_bits 15
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_bits 15
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_start 208
+#define GEN9_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_start 208
+#define GEN8_RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliarySurfaceQPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Auxiliary Table Index for Media Compressed Surface */
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_bits 11
+#define GEN9_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_bits 11
+#define GEN8_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_start 341
+#define GEN9_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_start 341
+#define GEN8_RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_start 341
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_AuxiliaryTableIndexforMediaCompressedSurface_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 341;
+ case 9: return 341;
+ case 8: return 341;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Base Mip Level */
+
+
+#define GEN10_RENDER_SURFACE_STATE_BaseMipLevel_bits 5
+#define GEN9_RENDER_SURFACE_STATE_BaseMipLevel_bits 5
+#define GEN8_RENDER_SURFACE_STATE_BaseMipLevel_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_BaseMipLevel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_BaseMipLevel_start 51
+#define GEN9_RENDER_SURFACE_STATE_BaseMipLevel_start 51
+#define GEN8_RENDER_SURFACE_STATE_BaseMipLevel_start 51
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_BaseMipLevel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 51;
+ case 9: return 51;
+ case 8: return 51;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Blue Clear Color */
+
+
+#define GEN10_RENDER_SURFACE_STATE_BlueClearColor_bits 32
+#define GEN9_RENDER_SURFACE_STATE_BlueClearColor_bits 32
+#define GEN8_RENDER_SURFACE_STATE_BlueClearColor_bits 1
+#define GEN75_RENDER_SURFACE_STATE_BlueClearColor_bits 1
+#define GEN7_RENDER_SURFACE_STATE_BlueClearColor_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_BlueClearColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_BlueClearColor_start 448
+#define GEN9_RENDER_SURFACE_STATE_BlueClearColor_start 448
+#define GEN8_RENDER_SURFACE_STATE_BlueClearColor_start 253
+#define GEN75_RENDER_SURFACE_STATE_BlueClearColor_start 253
+#define GEN7_RENDER_SURFACE_STATE_BlueClearColor_start 253
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_BlueClearColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 448;
+ case 9: return 448;
+ case 8: return 253;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 253;
+ } else {
+ return 253;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Clear Color Address */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearColorAddress_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearColorAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearColorAddress_start 390
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearColorAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 390;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Clear Color Address High */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearColorAddressHigh_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearColorAddressHigh_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearColorAddressHigh_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearColorAddressHigh_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Clear Depth Address High */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearDepthAddressHigh_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearDepthAddressHigh_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearDepthAddressHigh_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearDepthAddressHigh_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Clear Depth Address Low */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearDepthAddressLow_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearDepthAddressLow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearDepthAddressLow_start 390
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearDepthAddressLow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 390;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Clear Value Address Enable */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearValueAddressEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearValueAddressEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ClearValueAddressEnable_start 330
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ClearValueAddressEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 330;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Coherency Type */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CoherencyType_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CoherencyType_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CoherencyType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CoherencyType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CoherencyType_start 174
+#define GEN9_RENDER_SURFACE_STATE_CoherencyType_start 174
+#define GEN8_RENDER_SURFACE_STATE_CoherencyType_start 174
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CoherencyType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 174;
+ case 9: return 174;
+ case 8: return 174;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Color Blend Enable */
+
+
+#define GEN5_RENDER_SURFACE_STATE_ColorBlendEnable_bits 1
+#define GEN45_RENDER_SURFACE_STATE_ColorBlendEnable_bits 1
+#define GEN4_RENDER_SURFACE_STATE_ColorBlendEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ColorBlendEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_RENDER_SURFACE_STATE_ColorBlendEnable_start 13
+#define GEN45_RENDER_SURFACE_STATE_ColorBlendEnable_start 13
+#define GEN4_RENDER_SURFACE_STATE_ColorBlendEnable_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ColorBlendEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Color Buffer Component Write Disables */
+
+
+#define GEN5_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_bits 4
+#define GEN45_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_bits 4
+#define GEN4_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_start 14
+#define GEN45_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_start 14
+#define GEN4_RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ColorBufferComponentWriteDisables_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 14;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 14;
+ } else {
+ return 14;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Negative X */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Negative Y */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Negative Z */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnableNegativeZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Positive X */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Positive Y */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Face Enable - Positive Z */
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN9_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN8_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN75_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN7_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN6_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN5_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN45_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+#define GEN4_RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeFaceEnablePositiveZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Cube Map Corner Mode */
+
+
+#define GEN6_RENDER_SURFACE_STATE_CubeMapCornerMode_bits 1
+#define GEN5_RENDER_SURFACE_STATE_CubeMapCornerMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeMapCornerMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_RENDER_SURFACE_STATE_CubeMapCornerMode_start 9
+#define GEN5_RENDER_SURFACE_STATE_CubeMapCornerMode_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_CubeMapCornerMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Data Return Format */
+
+
+#define GEN6_RENDER_SURFACE_STATE_DataReturnFormat_bits 1
+#define GEN5_RENDER_SURFACE_STATE_DataReturnFormat_bits 1
+#define GEN45_RENDER_SURFACE_STATE_DataReturnFormat_bits 1
+#define GEN4_RENDER_SURFACE_STATE_DataReturnFormat_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_DataReturnFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_RENDER_SURFACE_STATE_DataReturnFormat_start 27
+#define GEN5_RENDER_SURFACE_STATE_DataReturnFormat_start 27
+#define GEN45_RENDER_SURFACE_STATE_DataReturnFormat_start 27
+#define GEN4_RENDER_SURFACE_STATE_DataReturnFormat_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_DataReturnFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Depth */
+
+
+#define GEN10_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN9_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN8_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN75_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN7_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN6_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN5_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN45_RENDER_SURFACE_STATE_Depth_bits 11
+#define GEN4_RENDER_SURFACE_STATE_Depth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Depth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN9_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN8_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN75_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN7_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN6_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN5_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN45_RENDER_SURFACE_STATE_Depth_start 117
+#define GEN4_RENDER_SURFACE_STATE_Depth_start 117
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Depth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 117;
+ case 9: return 117;
+ case 8: return 117;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 117;
+ } else {
+ return 117;
+ }
+ case 6: return 117;
+ case 5: return 117;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 117;
+ } else {
+ return 117;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::EWA Disable For Cube */
+
+
+#define GEN10_RENDER_SURFACE_STATE_EWADisableForCube_bits 1
+#define GEN9_RENDER_SURFACE_STATE_EWADisableForCube_bits 1
+#define GEN8_RENDER_SURFACE_STATE_EWADisableForCube_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_EWADisableForCube_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_EWADisableForCube_start 180
+#define GEN9_RENDER_SURFACE_STATE_EWADisableForCube_start 180
+#define GEN8_RENDER_SURFACE_STATE_EWADisableForCube_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_EWADisableForCube_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 180;
+ case 9: return 180;
+ case 8: return 180;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Force Non-Comparison Reduction Type */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ForceNonComparisonReductionType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ForceNonComparisonReductionType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ForceNonComparisonReductionType_start 159
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ForceNonComparisonReductionType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 159;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Green Clear Color */
+
+
+#define GEN10_RENDER_SURFACE_STATE_GreenClearColor_bits 32
+#define GEN9_RENDER_SURFACE_STATE_GreenClearColor_bits 32
+#define GEN8_RENDER_SURFACE_STATE_GreenClearColor_bits 1
+#define GEN75_RENDER_SURFACE_STATE_GreenClearColor_bits 1
+#define GEN7_RENDER_SURFACE_STATE_GreenClearColor_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_GreenClearColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_GreenClearColor_start 416
+#define GEN9_RENDER_SURFACE_STATE_GreenClearColor_start 416
+#define GEN8_RENDER_SURFACE_STATE_GreenClearColor_start 254
+#define GEN75_RENDER_SURFACE_STATE_GreenClearColor_start 254
+#define GEN7_RENDER_SURFACE_STATE_GreenClearColor_start 254
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_GreenClearColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 416;
+ case 8: return 254;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 254;
+ } else {
+ return 254;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Height */
+
+
+#define GEN10_RENDER_SURFACE_STATE_Height_bits 14
+#define GEN9_RENDER_SURFACE_STATE_Height_bits 14
+#define GEN8_RENDER_SURFACE_STATE_Height_bits 14
+#define GEN75_RENDER_SURFACE_STATE_Height_bits 14
+#define GEN7_RENDER_SURFACE_STATE_Height_bits 14
+#define GEN6_RENDER_SURFACE_STATE_Height_bits 13
+#define GEN5_RENDER_SURFACE_STATE_Height_bits 13
+#define GEN45_RENDER_SURFACE_STATE_Height_bits 13
+#define GEN4_RENDER_SURFACE_STATE_Height_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Height_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 13;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_Height_start 80
+#define GEN9_RENDER_SURFACE_STATE_Height_start 80
+#define GEN8_RENDER_SURFACE_STATE_Height_start 80
+#define GEN75_RENDER_SURFACE_STATE_Height_start 80
+#define GEN7_RENDER_SURFACE_STATE_Height_start 80
+#define GEN6_RENDER_SURFACE_STATE_Height_start 83
+#define GEN5_RENDER_SURFACE_STATE_Height_start 83
+#define GEN45_RENDER_SURFACE_STATE_Height_start 83
+#define GEN4_RENDER_SURFACE_STATE_Height_start 83
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Height_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 80;
+ } else {
+ return 80;
+ }
+ case 6: return 83;
+ case 5: return 83;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 83;
+ } else {
+ return 83;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Hierarchical Depth Clear Value */
+
+
+#define GEN9_RENDER_SURFACE_STATE_HierarchicalDepthClearValue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_HierarchicalDepthClearValue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 32;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_RENDER_SURFACE_STATE_HierarchicalDepthClearValue_start 384
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_HierarchicalDepthClearValue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 384;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Integer Surface Format */
+
+
+#define GEN75_RENDER_SURFACE_STATE_IntegerSurfaceFormat_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_IntegerSurfaceFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_IntegerSurfaceFormat_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_IntegerSurfaceFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 114;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::MCS Enable */
+
+
+#define GEN75_RENDER_SURFACE_STATE_MCSEnable_bits 1
+#define GEN7_RENDER_SURFACE_STATE_MCSEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MCSEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_MCSEnable_start 192
+#define GEN7_RENDER_SURFACE_STATE_MCSEnable_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MCSEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::MIP Count / LOD */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN9_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN8_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN75_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN7_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN6_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN5_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN45_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+#define GEN4_RENDER_SURFACE_STATE_MIPCountLOD_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MIPCountLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MIPCountLOD_start 160
+#define GEN9_RENDER_SURFACE_STATE_MIPCountLOD_start 160
+#define GEN8_RENDER_SURFACE_STATE_MIPCountLOD_start 160
+#define GEN75_RENDER_SURFACE_STATE_MIPCountLOD_start 160
+#define GEN7_RENDER_SURFACE_STATE_MIPCountLOD_start 160
+#define GEN6_RENDER_SURFACE_STATE_MIPCountLOD_start 66
+#define GEN5_RENDER_SURFACE_STATE_MIPCountLOD_start 66
+#define GEN45_RENDER_SURFACE_STATE_MIPCountLOD_start 66
+#define GEN4_RENDER_SURFACE_STATE_MIPCountLOD_start 66
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MIPCountLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 66;
+ case 5: return 66;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 66;
+ } else {
+ return 66;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::MIP Map Layout Mode */
+
+
+#define GEN6_RENDER_SURFACE_STATE_MIPMapLayoutMode_bits 1
+#define GEN5_RENDER_SURFACE_STATE_MIPMapLayoutMode_bits 1
+#define GEN45_RENDER_SURFACE_STATE_MIPMapLayoutMode_bits 1
+#define GEN4_RENDER_SURFACE_STATE_MIPMapLayoutMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MIPMapLayoutMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_RENDER_SURFACE_STATE_MIPMapLayoutMode_start 10
+#define GEN5_RENDER_SURFACE_STATE_MIPMapLayoutMode_start 10
+#define GEN45_RENDER_SURFACE_STATE_MIPMapLayoutMode_start 10
+#define GEN4_RENDER_SURFACE_STATE_MIPMapLayoutMode_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MIPMapLayoutMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 10;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::MOCS */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MOCS_bits 7
+#define GEN9_RENDER_SURFACE_STATE_MOCS_bits 7
+#define GEN8_RENDER_SURFACE_STATE_MOCS_bits 7
+#define GEN75_RENDER_SURFACE_STATE_MOCS_bits 4
+#define GEN7_RENDER_SURFACE_STATE_MOCS_bits 4
+#define GEN6_RENDER_SURFACE_STATE_MOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MOCS_start 56
+#define GEN9_RENDER_SURFACE_STATE_MOCS_start 56
+#define GEN8_RENDER_SURFACE_STATE_MOCS_start 56
+#define GEN75_RENDER_SURFACE_STATE_MOCS_start 176
+#define GEN7_RENDER_SURFACE_STATE_MOCS_start 176
+#define GEN6_RENDER_SURFACE_STATE_MOCS_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 176;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Media Boundary Pixel Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN9_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN8_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN75_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN7_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN6_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN5_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN45_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+#define GEN4_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MediaBoundaryPixelMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN9_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN8_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN75_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN7_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN6_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN5_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN45_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+#define GEN4_RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MediaBoundaryPixelMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Memory Compression Enable */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryCompressionEnable_bits 1
+#define GEN9_RENDER_SURFACE_STATE_MemoryCompressionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryCompressionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryCompressionEnable_start 254
+#define GEN9_RENDER_SURFACE_STATE_MemoryCompressionEnable_start 254
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryCompressionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 254;
+ case 9: return 254;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Memory Compression Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryCompressionMode_bits 1
+#define GEN9_RENDER_SURFACE_STATE_MemoryCompressionMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryCompressionMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryCompressionMode_start 255
+#define GEN9_RENDER_SURFACE_STATE_MemoryCompressionMode_start 255
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryCompressionMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 255;
+ case 9: return 255;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Memory Object Control State */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryObjectControlState_bits 7
+#define GEN9_RENDER_SURFACE_STATE_MemoryObjectControlState_bits 7
+#define GEN8_RENDER_SURFACE_STATE_MemoryObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MemoryObjectControlState_start 56
+#define GEN9_RENDER_SURFACE_STATE_MemoryObjectControlState_start 56
+#define GEN8_RENDER_SURFACE_STATE_MemoryObjectControlState_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Minimum Array Element */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN9_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN8_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN75_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN7_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN6_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN5_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN45_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+#define GEN4_RENDER_SURFACE_STATE_MinimumArrayElement_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MinimumArrayElement_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MinimumArrayElement_start 146
+#define GEN9_RENDER_SURFACE_STATE_MinimumArrayElement_start 146
+#define GEN8_RENDER_SURFACE_STATE_MinimumArrayElement_start 146
+#define GEN75_RENDER_SURFACE_STATE_MinimumArrayElement_start 146
+#define GEN7_RENDER_SURFACE_STATE_MinimumArrayElement_start 146
+#define GEN6_RENDER_SURFACE_STATE_MinimumArrayElement_start 145
+#define GEN5_RENDER_SURFACE_STATE_MinimumArrayElement_start 145
+#define GEN45_RENDER_SURFACE_STATE_MinimumArrayElement_start 145
+#define GEN4_RENDER_SURFACE_STATE_MinimumArrayElement_start 145
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MinimumArrayElement_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 146;
+ case 9: return 146;
+ case 8: return 146;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 146;
+ } else {
+ return 146;
+ }
+ case 6: return 145;
+ case 5: return 145;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 145;
+ } else {
+ return 145;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Mip Tail Start LOD */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MipTailStartLOD_bits 4
+#define GEN9_RENDER_SURFACE_STATE_MipTailStartLOD_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MipTailStartLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MipTailStartLOD_start 168
+#define GEN9_RENDER_SURFACE_STATE_MipTailStartLOD_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MipTailStartLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 168;
+ case 9: return 168;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Multisample Position Palette Index */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+#define GEN9_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+#define GEN8_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+#define GEN75_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+#define GEN7_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+#define GEN6_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+#define GEN9_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+#define GEN8_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+#define GEN75_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+#define GEN7_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+#define GEN6_RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MultisamplePositionPaletteIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Multisampled Surface Storage Format */
+
+
+#define GEN10_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits 1
+#define GEN9_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits 1
+#define GEN8_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits 1
+#define GEN75_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits 1
+#define GEN7_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start 134
+#define GEN9_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start 134
+#define GEN8_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start 134
+#define GEN75_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start 134
+#define GEN7_RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start 134
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_MultisampledSurfaceStorageFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 134;
+ case 9: return 134;
+ case 8: return 134;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 134;
+ } else {
+ return 134;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Number of Multisamples */
+
+
+#define GEN10_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+#define GEN9_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+#define GEN8_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+#define GEN75_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+#define GEN7_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+#define GEN6_RENDER_SURFACE_STATE_NumberofMultisamples_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_NumberofMultisamples_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_NumberofMultisamples_start 131
+#define GEN9_RENDER_SURFACE_STATE_NumberofMultisamples_start 131
+#define GEN8_RENDER_SURFACE_STATE_NumberofMultisamples_start 131
+#define GEN75_RENDER_SURFACE_STATE_NumberofMultisamples_start 131
+#define GEN7_RENDER_SURFACE_STATE_NumberofMultisamples_start 131
+#define GEN6_RENDER_SURFACE_STATE_NumberofMultisamples_start 132
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_NumberofMultisamples_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 131;
+ case 9: return 131;
+ case 8: return 131;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 131;
+ } else {
+ return 131;
+ }
+ case 6: return 132;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Quilt Height */
+
+
+#define GEN10_RENDER_SURFACE_STATE_QuiltHeight_bits 5
+#define GEN9_RENDER_SURFACE_STATE_QuiltHeight_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_QuiltHeight_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_QuiltHeight_start 325
+#define GEN9_RENDER_SURFACE_STATE_QuiltHeight_start 325
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_QuiltHeight_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 325;
+ case 9: return 325;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Quilt Width */
+
+
+#define GEN10_RENDER_SURFACE_STATE_QuiltWidth_bits 5
+#define GEN9_RENDER_SURFACE_STATE_QuiltWidth_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_QuiltWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_QuiltWidth_start 320
+#define GEN9_RENDER_SURFACE_STATE_QuiltWidth_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_QuiltWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Red Clear Color */
+
+
+#define GEN10_RENDER_SURFACE_STATE_RedClearColor_bits 32
+#define GEN9_RENDER_SURFACE_STATE_RedClearColor_bits 32
+#define GEN8_RENDER_SURFACE_STATE_RedClearColor_bits 1
+#define GEN75_RENDER_SURFACE_STATE_RedClearColor_bits 1
+#define GEN7_RENDER_SURFACE_STATE_RedClearColor_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RedClearColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_RedClearColor_start 384
+#define GEN9_RENDER_SURFACE_STATE_RedClearColor_start 384
+#define GEN8_RENDER_SURFACE_STATE_RedClearColor_start 255
+#define GEN75_RENDER_SURFACE_STATE_RedClearColor_start 255
+#define GEN7_RENDER_SURFACE_STATE_RedClearColor_start 255
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RedClearColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 384;
+ case 9: return 384;
+ case 8: return 255;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 255;
+ } else {
+ return 255;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Render Cache Read Write Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN9_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN8_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN75_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN7_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN6_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN5_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN45_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+#define GEN4_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderCacheReadWriteMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN9_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN8_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN75_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN7_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN6_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN5_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN45_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+#define GEN4_RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderCacheReadWriteMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Render Target And Sample Unorm Rotation */
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_bits 2
+#define GEN9_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_bits 2
+#define GEN8_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_start 157
+#define GEN9_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_start 157
+#define GEN8_RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_start 157
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetAndSampleUnormRotation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 157;
+ case 9: return 157;
+ case 8: return 157;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Render Target Rotation */
+
+
+#define GEN75_RENDER_SURFACE_STATE_RenderTargetRotation_bits 2
+#define GEN7_RENDER_SURFACE_STATE_RenderTargetRotation_bits 2
+#define GEN6_RENDER_SURFACE_STATE_RenderTargetRotation_bits 2
+#define GEN5_RENDER_SURFACE_STATE_RenderTargetRotation_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetRotation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_RenderTargetRotation_start 157
+#define GEN7_RENDER_SURFACE_STATE_RenderTargetRotation_start 157
+#define GEN6_RENDER_SURFACE_STATE_RenderTargetRotation_start 64
+#define GEN5_RENDER_SURFACE_STATE_RenderTargetRotation_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetRotation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 157;
+ } else {
+ return 157;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Render Target View Extent */
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 11
+#define GEN9_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 11
+#define GEN8_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 11
+#define GEN75_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 11
+#define GEN7_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 11
+#define GEN6_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 9
+#define GEN5_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 9
+#define GEN45_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 9
+#define GEN4_RENDER_SURFACE_STATE_RenderTargetViewExtent_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetViewExtent_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 135
+#define GEN9_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 135
+#define GEN8_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 135
+#define GEN75_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 135
+#define GEN7_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 135
+#define GEN6_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 136
+#define GEN5_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 136
+#define GEN45_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 136
+#define GEN4_RENDER_SURFACE_STATE_RenderTargetViewExtent_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_RenderTargetViewExtent_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 135;
+ case 9: return 135;
+ case 8: return 135;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 135;
+ } else {
+ return 135;
+ }
+ case 6: return 136;
+ case 5: return 136;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 136;
+ } else {
+ return 136;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Reserved: MBZ */
+
+
+#define GEN75_RENDER_SURFACE_STATE_ReservedMBZ_bits 2
+#define GEN7_RENDER_SURFACE_STATE_ReservedMBZ_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ReservedMBZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_ReservedMBZ_start 222
+#define GEN7_RENDER_SURFACE_STATE_ReservedMBZ_start 222
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ReservedMBZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 222;
+ } else {
+ return 222;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Resource Min LOD */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ResourceMinLOD_bits 12
+#define GEN9_RENDER_SURFACE_STATE_ResourceMinLOD_bits 12
+#define GEN8_RENDER_SURFACE_STATE_ResourceMinLOD_bits 12
+#define GEN75_RENDER_SURFACE_STATE_ResourceMinLOD_bits 12
+#define GEN7_RENDER_SURFACE_STATE_ResourceMinLOD_bits 12
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ResourceMinLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ResourceMinLOD_start 224
+#define GEN9_RENDER_SURFACE_STATE_ResourceMinLOD_start 224
+#define GEN8_RENDER_SURFACE_STATE_ResourceMinLOD_start 224
+#define GEN75_RENDER_SURFACE_STATE_ResourceMinLOD_start 224
+#define GEN7_RENDER_SURFACE_STATE_ResourceMinLOD_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ResourceMinLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Sampler L2 Bypass Mode Disable */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_bits 1
+#define GEN9_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_bits 1
+#define GEN8_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_start 9
+#define GEN9_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_start 9
+#define GEN8_RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SamplerL2BypassModeDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Separate UV Plane Enable */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_bits 1
+#define GEN9_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_bits 1
+#define GEN8_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SeparateUVPlaneEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_start 223
+#define GEN9_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_start 223
+#define GEN8_RENDER_SURFACE_STATE_SeparateUVPlaneEnable_start 223
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SeparateUVPlaneEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 223;
+ case 9: return 223;
+ case 8: return 223;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Shader Channel Select Alpha */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits 3
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits 3
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits 3
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start 240
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start 240
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start 240
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start 240
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 240;
+ case 9: return 240;
+ case 8: return 240;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 240;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Shader Channel Select Blue */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits 3
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits 3
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits 3
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start 243
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start 243
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start 243
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start 243
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 243;
+ case 9: return 243;
+ case 8: return 243;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 243;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Shader Channel Select Green */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits 3
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits 3
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits 3
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start 246
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start 246
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start 246
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start 246
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 246;
+ case 9: return 246;
+ case 8: return 246;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 246;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Shader Channel Select Red */
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits 3
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits 3
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits 3
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_ShaderChannelSelectRed_start 249
+#define GEN9_RENDER_SURFACE_STATE_ShaderChannelSelectRed_start 249
+#define GEN8_RENDER_SURFACE_STATE_ShaderChannelSelectRed_start 249
+#define GEN75_RENDER_SURFACE_STATE_ShaderChannelSelectRed_start 249
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_ShaderChannelSelectRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 249;
+ case 9: return 249;
+ case 8: return 249;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 249;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Strbuf Minimum Array Element */
+
+
+#define GEN75_RENDER_SURFACE_STATE_StrbufMinimumArrayElement_bits 27
+#define GEN7_RENDER_SURFACE_STATE_StrbufMinimumArrayElement_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_StrbufMinimumArrayElement_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_StrbufMinimumArrayElement_start 128
+#define GEN7_RENDER_SURFACE_STATE_StrbufMinimumArrayElement_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_StrbufMinimumArrayElement_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Array */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceArray_bits 1
+#define GEN9_RENDER_SURFACE_STATE_SurfaceArray_bits 1
+#define GEN8_RENDER_SURFACE_STATE_SurfaceArray_bits 1
+#define GEN75_RENDER_SURFACE_STATE_SurfaceArray_bits 1
+#define GEN7_RENDER_SURFACE_STATE_SurfaceArray_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceArray_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceArray_start 28
+#define GEN9_RENDER_SURFACE_STATE_SurfaceArray_start 28
+#define GEN8_RENDER_SURFACE_STATE_SurfaceArray_start 28
+#define GEN75_RENDER_SURFACE_STATE_SurfaceArray_start 28
+#define GEN7_RENDER_SURFACE_STATE_SurfaceArray_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceArray_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 28;
+ case 9: return 28;
+ case 8: return 28;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 28;
+ } else {
+ return 28;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Array Spacing */
+
+
+#define GEN75_RENDER_SURFACE_STATE_SurfaceArraySpacing_bits 1
+#define GEN7_RENDER_SURFACE_STATE_SurfaceArraySpacing_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceArraySpacing_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_SurfaceArraySpacing_start 10
+#define GEN7_RENDER_SURFACE_STATE_SurfaceArraySpacing_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceArraySpacing_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Base Address */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 64
+#define GEN9_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 64
+#define GEN8_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 64
+#define GEN75_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+#define GEN7_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+#define GEN6_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+#define GEN5_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+#define GEN45_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+#define GEN4_RENDER_SURFACE_STATE_SurfaceBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 256
+#define GEN9_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 256
+#define GEN8_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 256
+#define GEN75_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+#define GEN7_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+#define GEN6_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+#define GEN5_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+#define GEN45_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+#define GEN4_RENDER_SURFACE_STATE_SurfaceBaseAddress_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Format */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceFormat_bits 10
+#define GEN9_RENDER_SURFACE_STATE_SurfaceFormat_bits 10
+#define GEN8_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN75_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN7_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN6_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN5_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN45_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+#define GEN4_RENDER_SURFACE_STATE_SurfaceFormat_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN9_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN8_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN75_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN7_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN6_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN5_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN45_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+#define GEN4_RENDER_SURFACE_STATE_SurfaceFormat_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 18;
+ case 5: return 18;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 18;
+ } else {
+ return 18;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Horizontal Alignment */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits 2
+#define GEN9_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits 2
+#define GEN8_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits 2
+#define GEN75_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits 1
+#define GEN7_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start 14
+#define GEN9_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start 14
+#define GEN8_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start 14
+#define GEN75_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start 15
+#define GEN7_RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceHorizontalAlignment_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Min LOD */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN9_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN8_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN75_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN7_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN6_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN5_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN45_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+#define GEN4_RENDER_SURFACE_STATE_SurfaceMinLOD_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceMinLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceMinLOD_start 164
+#define GEN9_RENDER_SURFACE_STATE_SurfaceMinLOD_start 164
+#define GEN8_RENDER_SURFACE_STATE_SurfaceMinLOD_start 164
+#define GEN75_RENDER_SURFACE_STATE_SurfaceMinLOD_start 164
+#define GEN7_RENDER_SURFACE_STATE_SurfaceMinLOD_start 164
+#define GEN6_RENDER_SURFACE_STATE_SurfaceMinLOD_start 156
+#define GEN5_RENDER_SURFACE_STATE_SurfaceMinLOD_start 156
+#define GEN45_RENDER_SURFACE_STATE_SurfaceMinLOD_start 156
+#define GEN4_RENDER_SURFACE_STATE_SurfaceMinLOD_start 156
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceMinLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 164;
+ case 9: return 164;
+ case 8: return 164;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 164;
+ } else {
+ return 164;
+ }
+ case 6: return 156;
+ case 5: return 156;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 156;
+ } else {
+ return 156;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Object Control State */
+
+
+#define GEN75_RENDER_SURFACE_STATE_SurfaceObjectControlState_bits 4
+#define GEN7_RENDER_SURFACE_STATE_SurfaceObjectControlState_bits 4
+#define GEN6_RENDER_SURFACE_STATE_SurfaceObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_SurfaceObjectControlState_start 176
+#define GEN7_RENDER_SURFACE_STATE_SurfaceObjectControlState_start 176
+#define GEN6_RENDER_SURFACE_STATE_SurfaceObjectControlState_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 176;
+ } else {
+ return 176;
+ }
+ case 6: return 176;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Pitch */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfacePitch_bits 18
+#define GEN9_RENDER_SURFACE_STATE_SurfacePitch_bits 18
+#define GEN8_RENDER_SURFACE_STATE_SurfacePitch_bits 18
+#define GEN75_RENDER_SURFACE_STATE_SurfacePitch_bits 18
+#define GEN7_RENDER_SURFACE_STATE_SurfacePitch_bits 18
+#define GEN6_RENDER_SURFACE_STATE_SurfacePitch_bits 17
+#define GEN5_RENDER_SURFACE_STATE_SurfacePitch_bits 17
+#define GEN45_RENDER_SURFACE_STATE_SurfacePitch_bits 17
+#define GEN4_RENDER_SURFACE_STATE_SurfacePitch_bits 17
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfacePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 17;
+ case 5: return 17;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 17;
+ } else {
+ return 17;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfacePitch_start 96
+#define GEN9_RENDER_SURFACE_STATE_SurfacePitch_start 96
+#define GEN8_RENDER_SURFACE_STATE_SurfacePitch_start 96
+#define GEN75_RENDER_SURFACE_STATE_SurfacePitch_start 96
+#define GEN7_RENDER_SURFACE_STATE_SurfacePitch_start 96
+#define GEN6_RENDER_SURFACE_STATE_SurfacePitch_start 99
+#define GEN5_RENDER_SURFACE_STATE_SurfacePitch_start 99
+#define GEN45_RENDER_SURFACE_STATE_SurfacePitch_start 99
+#define GEN4_RENDER_SURFACE_STATE_SurfacePitch_start 99
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfacePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 99;
+ case 5: return 99;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 99;
+ } else {
+ return 99;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface QPitch */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceQPitch_bits 15
+#define GEN9_RENDER_SURFACE_STATE_SurfaceQPitch_bits 15
+#define GEN8_RENDER_SURFACE_STATE_SurfaceQPitch_bits 15
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceQPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceQPitch_start 32
+#define GEN9_RENDER_SURFACE_STATE_SurfaceQPitch_start 32
+#define GEN8_RENDER_SURFACE_STATE_SurfaceQPitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceQPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Type */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN9_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN8_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN75_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN7_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN6_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN5_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN45_RENDER_SURFACE_STATE_SurfaceType_bits 3
+#define GEN4_RENDER_SURFACE_STATE_SurfaceType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN9_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN8_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN75_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN7_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN6_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN5_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN45_RENDER_SURFACE_STATE_SurfaceType_start 29
+#define GEN4_RENDER_SURFACE_STATE_SurfaceType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Surface Vertical Alignment */
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 2
+#define GEN9_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 2
+#define GEN8_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 2
+#define GEN75_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 2
+#define GEN7_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 2
+#define GEN6_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceVerticalAlignment_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 16
+#define GEN9_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 16
+#define GEN8_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 16
+#define GEN75_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 16
+#define GEN7_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 16
+#define GEN6_RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start 184
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_SurfaceVerticalAlignment_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 184;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Tile Address Mapping Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_TileAddressMappingMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileAddressMappingMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_TileAddressMappingMode_start 116
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileAddressMappingMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 116;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Tile Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_TileMode_bits 2
+#define GEN9_RENDER_SURFACE_STATE_TileMode_bits 2
+#define GEN8_RENDER_SURFACE_STATE_TileMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_TileMode_start 12
+#define GEN9_RENDER_SURFACE_STATE_TileMode_start 12
+#define GEN8_RENDER_SURFACE_STATE_TileMode_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Tile Walk */
+
+
+#define GEN75_RENDER_SURFACE_STATE_TileWalk_bits 1
+#define GEN7_RENDER_SURFACE_STATE_TileWalk_bits 1
+#define GEN6_RENDER_SURFACE_STATE_TileWalk_bits 1
+#define GEN5_RENDER_SURFACE_STATE_TileWalk_bits 1
+#define GEN45_RENDER_SURFACE_STATE_TileWalk_bits 1
+#define GEN4_RENDER_SURFACE_STATE_TileWalk_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileWalk_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_TileWalk_start 13
+#define GEN7_RENDER_SURFACE_STATE_TileWalk_start 13
+#define GEN6_RENDER_SURFACE_STATE_TileWalk_start 96
+#define GEN5_RENDER_SURFACE_STATE_TileWalk_start 96
+#define GEN45_RENDER_SURFACE_STATE_TileWalk_start 96
+#define GEN4_RENDER_SURFACE_STATE_TileWalk_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TileWalk_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Tiled Resource Mode */
+
+
+#define GEN10_RENDER_SURFACE_STATE_TiledResourceMode_bits 2
+#define GEN9_RENDER_SURFACE_STATE_TiledResourceMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TiledResourceMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_TiledResourceMode_start 178
+#define GEN9_RENDER_SURFACE_STATE_TiledResourceMode_start 178
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TiledResourceMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 178;
+ case 9: return 178;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Tiled Surface */
+
+
+#define GEN75_RENDER_SURFACE_STATE_TiledSurface_bits 1
+#define GEN7_RENDER_SURFACE_STATE_TiledSurface_bits 1
+#define GEN6_RENDER_SURFACE_STATE_TiledSurface_bits 1
+#define GEN5_RENDER_SURFACE_STATE_TiledSurface_bits 1
+#define GEN45_RENDER_SURFACE_STATE_TiledSurface_bits 1
+#define GEN4_RENDER_SURFACE_STATE_TiledSurface_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TiledSurface_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_TiledSurface_start 14
+#define GEN7_RENDER_SURFACE_STATE_TiledSurface_start 14
+#define GEN6_RENDER_SURFACE_STATE_TiledSurface_start 97
+#define GEN5_RENDER_SURFACE_STATE_TiledSurface_start 97
+#define GEN45_RENDER_SURFACE_STATE_TiledSurface_start 97
+#define GEN4_RENDER_SURFACE_STATE_TiledSurface_start 97
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_TiledSurface_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 97;
+ case 5: return 97;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 97;
+ } else {
+ return 97;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Vertical Line Stride */
+
+
+#define GEN10_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN9_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN8_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN75_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN7_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN6_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN5_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN45_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+#define GEN4_RENDER_SURFACE_STATE_VerticalLineStride_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_VerticalLineStride_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_VerticalLineStride_start 11
+#define GEN9_RENDER_SURFACE_STATE_VerticalLineStride_start 11
+#define GEN8_RENDER_SURFACE_STATE_VerticalLineStride_start 11
+#define GEN75_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+#define GEN7_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+#define GEN6_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+#define GEN5_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+#define GEN45_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+#define GEN4_RENDER_SURFACE_STATE_VerticalLineStride_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_VerticalLineStride_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 12;
+ } else {
+ return 12;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Vertical Line Stride Offset */
+
+
+#define GEN10_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN9_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN8_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN75_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN7_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN6_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN5_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN45_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+#define GEN4_RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_VerticalLineStrideOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 10
+#define GEN9_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 10
+#define GEN8_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 10
+#define GEN75_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+#define GEN7_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+#define GEN6_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+#define GEN5_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+#define GEN45_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+#define GEN4_RENDER_SURFACE_STATE_VerticalLineStrideOffset_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_VerticalLineStrideOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Width */
+
+
+#define GEN10_RENDER_SURFACE_STATE_Width_bits 14
+#define GEN9_RENDER_SURFACE_STATE_Width_bits 14
+#define GEN8_RENDER_SURFACE_STATE_Width_bits 14
+#define GEN75_RENDER_SURFACE_STATE_Width_bits 14
+#define GEN7_RENDER_SURFACE_STATE_Width_bits 14
+#define GEN6_RENDER_SURFACE_STATE_Width_bits 13
+#define GEN5_RENDER_SURFACE_STATE_Width_bits 13
+#define GEN45_RENDER_SURFACE_STATE_Width_bits 13
+#define GEN4_RENDER_SURFACE_STATE_Width_bits 13
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Width_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 13;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_Width_start 64
+#define GEN9_RENDER_SURFACE_STATE_Width_start 64
+#define GEN8_RENDER_SURFACE_STATE_Width_start 64
+#define GEN75_RENDER_SURFACE_STATE_Width_start 64
+#define GEN7_RENDER_SURFACE_STATE_Width_start 64
+#define GEN6_RENDER_SURFACE_STATE_Width_start 70
+#define GEN5_RENDER_SURFACE_STATE_Width_start 70
+#define GEN45_RENDER_SURFACE_STATE_Width_start 70
+#define GEN4_RENDER_SURFACE_STATE_Width_start 70
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_Width_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 70;
+ case 5: return 70;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 70;
+ } else {
+ return 70;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::X Offset */
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN9_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN8_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN75_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN7_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN6_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN5_RENDER_SURFACE_STATE_XOffset_bits 7
+#define GEN45_RENDER_SURFACE_STATE_XOffset_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN9_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN8_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN75_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN7_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN6_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN5_RENDER_SURFACE_STATE_XOffset_start 185
+#define GEN45_RENDER_SURFACE_STATE_XOffset_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 185;
+ case 9: return 185;
+ case 8: return 185;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 185;
+ } else {
+ return 185;
+ }
+ case 6: return 185;
+ case 5: return 185;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 185;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::X Offset for U or UV Plane */
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_bits 14
+#define GEN9_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_bits 14
+#define GEN8_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforUorUVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_start 208
+#define GEN9_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_start 208
+#define GEN8_RENDER_SURFACE_STATE_XOffsetforUorUVPlane_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforUorUVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::X Offset for UV Plane */
+
+
+#define GEN75_RENDER_SURFACE_STATE_XOffsetforUVPlane_bits 14
+#define GEN7_RENDER_SURFACE_STATE_XOffsetforUVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforUVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_XOffsetforUVPlane_start 208
+#define GEN7_RENDER_SURFACE_STATE_XOffsetforUVPlane_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforUVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 208;
+ } else {
+ return 208;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::X Offset for V Plane */
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffsetforVPlane_bits 14
+#define GEN9_RENDER_SURFACE_STATE_XOffsetforVPlane_bits 14
+#define GEN8_RENDER_SURFACE_STATE_XOffsetforVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_XOffsetforVPlane_start 368
+#define GEN9_RENDER_SURFACE_STATE_XOffsetforVPlane_start 368
+#define GEN8_RENDER_SURFACE_STATE_XOffsetforVPlane_start 368
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_XOffsetforVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 368;
+ case 9: return 368;
+ case 8: return 368;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Y Offset */
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffset_bits 3
+#define GEN9_RENDER_SURFACE_STATE_YOffset_bits 3
+#define GEN8_RENDER_SURFACE_STATE_YOffset_bits 3
+#define GEN75_RENDER_SURFACE_STATE_YOffset_bits 4
+#define GEN7_RENDER_SURFACE_STATE_YOffset_bits 4
+#define GEN6_RENDER_SURFACE_STATE_YOffset_bits 4
+#define GEN5_RENDER_SURFACE_STATE_YOffset_bits 4
+#define GEN45_RENDER_SURFACE_STATE_YOffset_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffset_start 181
+#define GEN9_RENDER_SURFACE_STATE_YOffset_start 181
+#define GEN8_RENDER_SURFACE_STATE_YOffset_start 181
+#define GEN75_RENDER_SURFACE_STATE_YOffset_start 180
+#define GEN7_RENDER_SURFACE_STATE_YOffset_start 180
+#define GEN6_RENDER_SURFACE_STATE_YOffset_start 180
+#define GEN5_RENDER_SURFACE_STATE_YOffset_start 180
+#define GEN45_RENDER_SURFACE_STATE_YOffset_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 181;
+ case 9: return 181;
+ case 8: return 181;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 180;
+ } else {
+ return 180;
+ }
+ case 6: return 180;
+ case 5: return 180;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 180;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Y Offset for U or UV Plane */
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_bits 14
+#define GEN9_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_bits 14
+#define GEN8_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforUorUVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_start 192
+#define GEN9_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_start 192
+#define GEN8_RENDER_SURFACE_STATE_YOffsetforUorUVPlane_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforUorUVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Y Offset for UV Plane */
+
+
+#define GEN75_RENDER_SURFACE_STATE_YOffsetforUVPlane_bits 14
+#define GEN7_RENDER_SURFACE_STATE_YOffsetforUVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforUVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_RENDER_SURFACE_STATE_YOffsetforUVPlane_start 192
+#define GEN7_RENDER_SURFACE_STATE_YOffsetforUVPlane_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforUVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* RENDER_SURFACE_STATE::Y Offset for V Plane */
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffsetforVPlane_bits 14
+#define GEN9_RENDER_SURFACE_STATE_YOffsetforVPlane_bits 14
+#define GEN8_RENDER_SURFACE_STATE_YOffsetforVPlane_bits 14
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforVPlane_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_RENDER_SURFACE_STATE_YOffsetforVPlane_start 352
+#define GEN9_RENDER_SURFACE_STATE_YOffsetforVPlane_start 352
+#define GEN8_RENDER_SURFACE_STATE_YOffsetforVPlane_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+RENDER_SURFACE_STATE_YOffsetforVPlane_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 352;
+ case 9: return 352;
+ case 8: return 352;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ROUNDINGPRECISIONTABLE_3_BITS */
+
+
+#define GEN10_ROUNDINGPRECISIONTABLE_3_BITS_length 1
+#define GEN9_ROUNDINGPRECISIONTABLE_3_BITS_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+ROUNDINGPRECISIONTABLE_3_BITS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* ROUNDINGPRECISIONTABLE_3_BITS::Rounding Precision */
+
+
+#define GEN10_ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_bits 3
+#define GEN9_ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_start 0
+#define GEN9_ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+ROUNDINGPRECISIONTABLE_3_BITS_RoundingPrecision_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_length 4
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_length 4
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_length 4
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_length 20
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_length 4
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_length 12
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_length 12
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_length 12
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_length 12
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 4;
+ }
+ case 6: return 12;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 12;
+ } else {
+ return 12;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 16bit Alpha */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_start 592
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 592;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 16bit Blue */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_start 576
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 576;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 16bit Green */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_start 528
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 528;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 16bit Red */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor16bitRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 512;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 32bit Alpha */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start 96
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start 96
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start 96
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start 608
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 608;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 32bit Blue */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start 64
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start 64
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start 64
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start 576
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 576;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 32bit Green */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start 544
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 544;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 32bit Red */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start 0
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start 0
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start 0
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor32bitRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 512;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 8bit Alpha */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_start 536
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 536;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 8bit Blue */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_start 528
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 528;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 8bit Green */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_start 520
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 520;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color 8bit Red */
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColor8bitRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 512;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Alpha */
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_bits 32
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_start 96
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Blue */
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_bits 32
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_start 64
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float Alpha */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 96
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 96
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 96
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 96
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 96
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 128
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 128;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float Blue */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 64
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 64
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 64
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 64
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 64
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 96
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float Green */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 32
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 32
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 64
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float Red */
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 0
+#define GEN9_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 0
+#define GEN8_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 0
+#define GEN75_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 0
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 0
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 32
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloatRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float16 Alpha */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_start 208
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Alpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 208;
+ case 5: return 208;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float16 Blue */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_start 192
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Blue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 192;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float16 Green */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_start 176
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Green_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 176;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Float16 Red */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_start 160
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorFloat16Red_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 160;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Green */
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_bits 32
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_start 32
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Red */
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorRed_bits 32
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorRed_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_SAMPLER_BORDER_COLOR_STATE_BorderColorRed_start 0
+#define GEN4_SAMPLER_BORDER_COLOR_STATE_BorderColorRed_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm16 Alpha */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_start 336
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_start 336
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Alpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 336;
+ case 5: return 336;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm16 Blue */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_start 320
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Blue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 320;
+ case 5: return 320;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm16 Green */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_start 304
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_start 304
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Green_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 304;
+ case 5: return 304;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm16 Red */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_start 288
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm16Red_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 288;
+ case 5: return 288;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm8 Alpha */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_start 376
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_start 376
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Alpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 376;
+ case 5: return 376;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm8 Blue */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_start 368
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_start 368
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Blue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 368;
+ case 5: return 368;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm8 Green */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_start 360
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_start 360
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Green_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 360;
+ case 5: return 360;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Snorm8 Red */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_start 352
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorSnorm8Red_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 352;
+ case 5: return 352;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm Alpha */
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_bits 8
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_start 24
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_start 24
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormAlpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm Blue */
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_bits 8
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_start 16
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_start 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormBlue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm Green */
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_bits 8
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_start 8
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_start 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormGreen_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm Red */
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_bits 8
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_bits 8
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_start 0
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_start 0
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnormRed_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm16 Alpha */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_start 272
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_start 272
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Alpha_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 272;
+ case 5: return 272;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm16 Blue */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_start 256
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Blue_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 256;
+ case 5: return 256;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm16 Green */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_start 240
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_start 240
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Green_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 240;
+ case 5: return 240;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_BORDER_COLOR_STATE::Border Color Unorm16 Red */
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_bits 16
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_start 224
+#define GEN5_SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_BORDER_COLOR_STATE_BorderColorUnorm16Red_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 224;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Alpha As Float */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsFloat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Alpha As S31 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsS31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Alpha As U32 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Alpha As U8 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorAlphaAsU8_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Blue As Float */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsFloat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Blue As S31 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsS31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Blue As U32 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Blue As U8 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorBlueAsU8_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Green As Float */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsFloat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Green As S31 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsS31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Green As U32 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Green As U8 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorGreenAsU8_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Red As Float */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsFloat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Red As S31 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsS31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Red As U32 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_INDIRECT_STATE_BORDER_COLOR::Border Color Red As U8 */
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_INDIRECT_STATE_BORDER_COLOR_BorderColorRedAsU8_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE */
+
+
+#define GEN10_SAMPLER_STATE_length 4
+#define GEN9_SAMPLER_STATE_length 4
+#define GEN8_SAMPLER_STATE_length 4
+#define GEN75_SAMPLER_STATE_length 4
+#define GEN7_SAMPLER_STATE_length 4
+#define GEN6_SAMPLER_STATE_length 4
+#define GEN5_SAMPLER_STATE_length 4
+#define GEN45_SAMPLER_STATE_length 4
+#define GEN4_SAMPLER_STATE_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Anisotropic Algorithm */
+
+
+#define GEN10_SAMPLER_STATE_AnisotropicAlgorithm_bits 1
+#define GEN9_SAMPLER_STATE_AnisotropicAlgorithm_bits 1
+#define GEN8_SAMPLER_STATE_AnisotropicAlgorithm_bits 1
+#define GEN75_SAMPLER_STATE_AnisotropicAlgorithm_bits 1
+#define GEN7_SAMPLER_STATE_AnisotropicAlgorithm_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_AnisotropicAlgorithm_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_AnisotropicAlgorithm_start 0
+#define GEN9_SAMPLER_STATE_AnisotropicAlgorithm_start 0
+#define GEN8_SAMPLER_STATE_AnisotropicAlgorithm_start 0
+#define GEN75_SAMPLER_STATE_AnisotropicAlgorithm_start 0
+#define GEN7_SAMPLER_STATE_AnisotropicAlgorithm_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_AnisotropicAlgorithm_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Base Mip Level */
+
+
+#define GEN8_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN75_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN7_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN6_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN5_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN45_SAMPLER_STATE_BaseMipLevel_bits 5
+#define GEN4_SAMPLER_STATE_BaseMipLevel_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_BaseMipLevel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN75_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN7_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN6_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN5_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN45_SAMPLER_STATE_BaseMipLevel_start 22
+#define GEN4_SAMPLER_STATE_BaseMipLevel_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_BaseMipLevel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Border Color Pointer */
+
+
+#define GEN10_SAMPLER_STATE_BorderColorPointer_bits 18
+#define GEN9_SAMPLER_STATE_BorderColorPointer_bits 18
+#define GEN8_SAMPLER_STATE_BorderColorPointer_bits 18
+#define GEN75_SAMPLER_STATE_BorderColorPointer_bits 27
+#define GEN7_SAMPLER_STATE_BorderColorPointer_bits 27
+#define GEN6_SAMPLER_STATE_BorderColorPointer_bits 27
+#define GEN5_SAMPLER_STATE_BorderColorPointer_bits 27
+#define GEN45_SAMPLER_STATE_BorderColorPointer_bits 27
+#define GEN4_SAMPLER_STATE_BorderColorPointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_BorderColorPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_BorderColorPointer_start 70
+#define GEN9_SAMPLER_STATE_BorderColorPointer_start 70
+#define GEN8_SAMPLER_STATE_BorderColorPointer_start 70
+#define GEN75_SAMPLER_STATE_BorderColorPointer_start 69
+#define GEN7_SAMPLER_STATE_BorderColorPointer_start 69
+#define GEN6_SAMPLER_STATE_BorderColorPointer_start 69
+#define GEN5_SAMPLER_STATE_BorderColorPointer_start 69
+#define GEN45_SAMPLER_STATE_BorderColorPointer_start 69
+#define GEN4_SAMPLER_STATE_BorderColorPointer_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_BorderColorPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 70;
+ case 9: return 70;
+ case 8: return 70;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 69;
+ } else {
+ return 69;
+ }
+ case 6: return 69;
+ case 5: return 69;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 69;
+ } else {
+ return 69;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::ChromaKey Enable */
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN9_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN8_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN75_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN7_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN6_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN5_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN45_SAMPLER_STATE_ChromaKeyEnable_bits 1
+#define GEN4_SAMPLER_STATE_ChromaKeyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyEnable_start 39
+#define GEN9_SAMPLER_STATE_ChromaKeyEnable_start 39
+#define GEN8_SAMPLER_STATE_ChromaKeyEnable_start 39
+#define GEN75_SAMPLER_STATE_ChromaKeyEnable_start 121
+#define GEN7_SAMPLER_STATE_ChromaKeyEnable_start 121
+#define GEN6_SAMPLER_STATE_ChromaKeyEnable_start 121
+#define GEN5_SAMPLER_STATE_ChromaKeyEnable_start 121
+#define GEN45_SAMPLER_STATE_ChromaKeyEnable_start 121
+#define GEN4_SAMPLER_STATE_ChromaKeyEnable_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 39;
+ case 9: return 39;
+ case 8: return 39;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 121;
+ } else {
+ return 121;
+ }
+ case 6: return 121;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::ChromaKey Index */
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN9_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN8_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN75_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN7_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN6_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN5_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN45_SAMPLER_STATE_ChromaKeyIndex_bits 2
+#define GEN4_SAMPLER_STATE_ChromaKeyIndex_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyIndex_start 37
+#define GEN9_SAMPLER_STATE_ChromaKeyIndex_start 37
+#define GEN8_SAMPLER_STATE_ChromaKeyIndex_start 37
+#define GEN75_SAMPLER_STATE_ChromaKeyIndex_start 119
+#define GEN7_SAMPLER_STATE_ChromaKeyIndex_start 119
+#define GEN6_SAMPLER_STATE_ChromaKeyIndex_start 119
+#define GEN5_SAMPLER_STATE_ChromaKeyIndex_start 119
+#define GEN45_SAMPLER_STATE_ChromaKeyIndex_start 119
+#define GEN4_SAMPLER_STATE_ChromaKeyIndex_start 119
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 37;
+ case 9: return 37;
+ case 8: return 37;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 119;
+ } else {
+ return 119;
+ }
+ case 6: return 119;
+ case 5: return 119;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 119;
+ } else {
+ return 119;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::ChromaKey Mode */
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN9_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN8_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN75_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN7_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN6_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN5_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN45_SAMPLER_STATE_ChromaKeyMode_bits 1
+#define GEN4_SAMPLER_STATE_ChromaKeyMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ChromaKeyMode_start 36
+#define GEN9_SAMPLER_STATE_ChromaKeyMode_start 36
+#define GEN8_SAMPLER_STATE_ChromaKeyMode_start 36
+#define GEN75_SAMPLER_STATE_ChromaKeyMode_start 118
+#define GEN7_SAMPLER_STATE_ChromaKeyMode_start 118
+#define GEN6_SAMPLER_STATE_ChromaKeyMode_start 118
+#define GEN5_SAMPLER_STATE_ChromaKeyMode_start 118
+#define GEN45_SAMPLER_STATE_ChromaKeyMode_start 118
+#define GEN4_SAMPLER_STATE_ChromaKeyMode_start 118
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ChromaKeyMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 118;
+ } else {
+ return 118;
+ }
+ case 6: return 118;
+ case 5: return 118;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 118;
+ } else {
+ return 118;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Coarse LOD Quality Mode */
+
+
+#define GEN10_SAMPLER_STATE_CoarseLODQualityMode_bits 5
+#define GEN9_SAMPLER_STATE_CoarseLODQualityMode_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_CoarseLODQualityMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_CoarseLODQualityMode_start 22
+#define GEN9_SAMPLER_STATE_CoarseLODQualityMode_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_CoarseLODQualityMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Cube Surface Control Mode */
+
+
+#define GEN10_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN9_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN8_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN75_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN7_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN6_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN5_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN45_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+#define GEN4_SAMPLER_STATE_CubeSurfaceControlMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_CubeSurfaceControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_CubeSurfaceControlMode_start 32
+#define GEN9_SAMPLER_STATE_CubeSurfaceControlMode_start 32
+#define GEN8_SAMPLER_STATE_CubeSurfaceControlMode_start 32
+#define GEN75_SAMPLER_STATE_CubeSurfaceControlMode_start 32
+#define GEN7_SAMPLER_STATE_CubeSurfaceControlMode_start 32
+#define GEN6_SAMPLER_STATE_CubeSurfaceControlMode_start 41
+#define GEN5_SAMPLER_STATE_CubeSurfaceControlMode_start 41
+#define GEN45_SAMPLER_STATE_CubeSurfaceControlMode_start 41
+#define GEN4_SAMPLER_STATE_CubeSurfaceControlMode_start 41
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_CubeSurfaceControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 41;
+ case 5: return 41;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 41;
+ } else {
+ return 41;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Force gather4 Behavior */
+
+
+#define GEN10_SAMPLER_STATE_Forcegather4Behavior_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_Forcegather4Behavior_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_Forcegather4Behavior_start 69
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_Forcegather4Behavior_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 69;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::LOD Clamp Magnification Mode */
+
+
+#define GEN10_SAMPLER_STATE_LODClampMagnificationMode_bits 1
+#define GEN9_SAMPLER_STATE_LODClampMagnificationMode_bits 1
+#define GEN8_SAMPLER_STATE_LODClampMagnificationMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODClampMagnificationMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_LODClampMagnificationMode_start 64
+#define GEN9_SAMPLER_STATE_LODClampMagnificationMode_start 64
+#define GEN8_SAMPLER_STATE_LODClampMagnificationMode_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODClampMagnificationMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::LOD PreClamp Enable */
+
+
+#define GEN75_SAMPLER_STATE_LODPreClampEnable_bits 1
+#define GEN7_SAMPLER_STATE_LODPreClampEnable_bits 1
+#define GEN6_SAMPLER_STATE_LODPreClampEnable_bits 1
+#define GEN5_SAMPLER_STATE_LODPreClampEnable_bits 1
+#define GEN45_SAMPLER_STATE_LODPreClampEnable_bits 1
+#define GEN4_SAMPLER_STATE_LODPreClampEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODPreClampEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SAMPLER_STATE_LODPreClampEnable_start 28
+#define GEN7_SAMPLER_STATE_LODPreClampEnable_start 28
+#define GEN6_SAMPLER_STATE_LODPreClampEnable_start 28
+#define GEN5_SAMPLER_STATE_LODPreClampEnable_start 28
+#define GEN45_SAMPLER_STATE_LODPreClampEnable_start 28
+#define GEN4_SAMPLER_STATE_LODPreClampEnable_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODPreClampEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 28;
+ } else {
+ return 28;
+ }
+ case 6: return 28;
+ case 5: return 28;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 28;
+ } else {
+ return 28;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::LOD PreClamp Mode */
+
+
+#define GEN10_SAMPLER_STATE_LODPreClampMode_bits 2
+#define GEN9_SAMPLER_STATE_LODPreClampMode_bits 2
+#define GEN8_SAMPLER_STATE_LODPreClampMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODPreClampMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_LODPreClampMode_start 27
+#define GEN9_SAMPLER_STATE_LODPreClampMode_start 27
+#define GEN8_SAMPLER_STATE_LODPreClampMode_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_LODPreClampMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Mag Mode Filter */
+
+
+#define GEN10_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN9_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN8_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN75_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN7_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN6_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN5_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN45_SAMPLER_STATE_MagModeFilter_bits 3
+#define GEN4_SAMPLER_STATE_MagModeFilter_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MagModeFilter_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN9_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN8_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN75_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN7_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN6_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN5_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN45_SAMPLER_STATE_MagModeFilter_start 17
+#define GEN4_SAMPLER_STATE_MagModeFilter_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MagModeFilter_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 17;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 17;
+ } else {
+ return 17;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Max LOD */
+
+
+#define GEN10_SAMPLER_STATE_MaxLOD_bits 12
+#define GEN9_SAMPLER_STATE_MaxLOD_bits 12
+#define GEN8_SAMPLER_STATE_MaxLOD_bits 12
+#define GEN75_SAMPLER_STATE_MaxLOD_bits 12
+#define GEN7_SAMPLER_STATE_MaxLOD_bits 12
+#define GEN6_SAMPLER_STATE_MaxLOD_bits 10
+#define GEN5_SAMPLER_STATE_MaxLOD_bits 10
+#define GEN45_SAMPLER_STATE_MaxLOD_bits 10
+#define GEN4_SAMPLER_STATE_MaxLOD_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MaxLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 10;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MaxLOD_start 40
+#define GEN9_SAMPLER_STATE_MaxLOD_start 40
+#define GEN8_SAMPLER_STATE_MaxLOD_start 40
+#define GEN75_SAMPLER_STATE_MaxLOD_start 40
+#define GEN7_SAMPLER_STATE_MaxLOD_start 40
+#define GEN6_SAMPLER_STATE_MaxLOD_start 44
+#define GEN5_SAMPLER_STATE_MaxLOD_start 44
+#define GEN45_SAMPLER_STATE_MaxLOD_start 44
+#define GEN4_SAMPLER_STATE_MaxLOD_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MaxLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 44;
+ case 5: return 44;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 44;
+ } else {
+ return 44;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Maximum Anisotropy */
+
+
+#define GEN10_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN9_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN8_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN75_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN7_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN6_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN5_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN45_SAMPLER_STATE_MaximumAnisotropy_bits 3
+#define GEN4_SAMPLER_STATE_MaximumAnisotropy_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MaximumAnisotropy_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN9_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN8_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN75_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN7_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN6_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN5_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN45_SAMPLER_STATE_MaximumAnisotropy_start 115
+#define GEN4_SAMPLER_STATE_MaximumAnisotropy_start 115
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MaximumAnisotropy_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 115;
+ case 9: return 115;
+ case 8: return 115;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 115;
+ } else {
+ return 115;
+ }
+ case 6: return 115;
+ case 5: return 115;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 115;
+ } else {
+ return 115;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Min LOD */
+
+
+#define GEN10_SAMPLER_STATE_MinLOD_bits 12
+#define GEN9_SAMPLER_STATE_MinLOD_bits 12
+#define GEN8_SAMPLER_STATE_MinLOD_bits 12
+#define GEN75_SAMPLER_STATE_MinLOD_bits 12
+#define GEN7_SAMPLER_STATE_MinLOD_bits 12
+#define GEN6_SAMPLER_STATE_MinLOD_bits 10
+#define GEN5_SAMPLER_STATE_MinLOD_bits 10
+#define GEN45_SAMPLER_STATE_MinLOD_bits 10
+#define GEN4_SAMPLER_STATE_MinLOD_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinLOD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 10;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MinLOD_start 52
+#define GEN9_SAMPLER_STATE_MinLOD_start 52
+#define GEN8_SAMPLER_STATE_MinLOD_start 52
+#define GEN75_SAMPLER_STATE_MinLOD_start 52
+#define GEN7_SAMPLER_STATE_MinLOD_start 52
+#define GEN6_SAMPLER_STATE_MinLOD_start 54
+#define GEN5_SAMPLER_STATE_MinLOD_start 54
+#define GEN45_SAMPLER_STATE_MinLOD_start 54
+#define GEN4_SAMPLER_STATE_MinLOD_start 54
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinLOD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 54;
+ case 5: return 54;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 54;
+ } else {
+ return 54;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Min Mode Filter */
+
+
+#define GEN10_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN9_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN8_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN75_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN7_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN6_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN5_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN45_SAMPLER_STATE_MinModeFilter_bits 3
+#define GEN4_SAMPLER_STATE_MinModeFilter_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinModeFilter_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN9_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN8_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN75_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN7_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN6_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN5_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN45_SAMPLER_STATE_MinModeFilter_start 14
+#define GEN4_SAMPLER_STATE_MinModeFilter_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinModeFilter_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 14;
+ case 5: return 14;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 14;
+ } else {
+ return 14;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Min and Mag State Not Equal */
+
+
+#define GEN6_SAMPLER_STATE_MinandMagStateNotEqual_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinandMagStateNotEqual_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_STATE_MinandMagStateNotEqual_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MinandMagStateNotEqual_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Mip Mode Filter */
+
+
+#define GEN10_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN9_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN8_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN75_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN7_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN6_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN5_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN45_SAMPLER_STATE_MipModeFilter_bits 2
+#define GEN4_SAMPLER_STATE_MipModeFilter_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MipModeFilter_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN9_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN8_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN75_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN7_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN6_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN5_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN45_SAMPLER_STATE_MipModeFilter_start 20
+#define GEN4_SAMPLER_STATE_MipModeFilter_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MipModeFilter_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Monochrome Filter Height */
+
+
+#define GEN5_SAMPLER_STATE_MonochromeFilterHeight_bits 3
+#define GEN45_SAMPLER_STATE_MonochromeFilterHeight_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterHeight_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SAMPLER_STATE_MonochromeFilterHeight_start 125
+#define GEN45_SAMPLER_STATE_MonochromeFilterHeight_start 125
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterHeight_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 125;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 125;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Monochrome Filter Height: Reserved */
+
+
+#define GEN6_SAMPLER_STATE_MonochromeFilterHeightReserved_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterHeightReserved_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_STATE_MonochromeFilterHeightReserved_start 125
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterHeightReserved_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 125;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Monochrome Filter Width */
+
+
+#define GEN6_SAMPLER_STATE_MonochromeFilterWidth_bits 3
+#define GEN5_SAMPLER_STATE_MonochromeFilterWidth_bits 3
+#define GEN45_SAMPLER_STATE_MonochromeFilterWidth_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SAMPLER_STATE_MonochromeFilterWidth_start 122
+#define GEN5_SAMPLER_STATE_MonochromeFilterWidth_start 122
+#define GEN45_SAMPLER_STATE_MonochromeFilterWidth_start 122
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_MonochromeFilterWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 122;
+ case 5: return 122;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 122;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Non-normalized Coordinate Enable */
+
+
+#define GEN10_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+#define GEN9_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+#define GEN8_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+#define GEN75_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+#define GEN7_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+#define GEN6_SAMPLER_STATE_NonnormalizedCoordinateEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_NonnormalizedCoordinateEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 106
+#define GEN9_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 106
+#define GEN8_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 106
+#define GEN75_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 106
+#define GEN7_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 106
+#define GEN6_SAMPLER_STATE_NonnormalizedCoordinateEnable_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_NonnormalizedCoordinateEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 106;
+ case 9: return 106;
+ case 8: return 106;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 106;
+ } else {
+ return 106;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::R Address Mag Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_RAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN9_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN8_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN75_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN7_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN6_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN5_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN45_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+#define GEN4_SAMPLER_STATE_RAddressMagFilterRoundingEnable_start 110
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_RAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 110;
+ case 9: return 110;
+ case 8: return 110;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 110;
+ } else {
+ return 110;
+ }
+ case 6: return 110;
+ case 5: return 110;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 110;
+ } else {
+ return 110;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::R Address Min Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_RAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN9_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN8_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN75_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN7_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN6_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN5_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN45_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+#define GEN4_SAMPLER_STATE_RAddressMinFilterRoundingEnable_start 109
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_RAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 109;
+ case 9: return 109;
+ case 8: return 109;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 109;
+ } else {
+ return 109;
+ }
+ case 6: return 109;
+ case 5: return 109;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 109;
+ } else {
+ return 109;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Reduction Type */
+
+
+#define GEN10_SAMPLER_STATE_ReductionType_bits 2
+#define GEN9_SAMPLER_STATE_ReductionType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ReductionType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ReductionType_start 118
+#define GEN9_SAMPLER_STATE_ReductionType_start 118
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ReductionType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 118;
+ case 9: return 118;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Reduction Type Enable */
+
+
+#define GEN10_SAMPLER_STATE_ReductionTypeEnable_bits 1
+#define GEN9_SAMPLER_STATE_ReductionTypeEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ReductionTypeEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ReductionTypeEnable_start 105
+#define GEN9_SAMPLER_STATE_ReductionTypeEnable_start 105
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ReductionTypeEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 105;
+ case 9: return 105;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Sampler Disable */
+
+
+#define GEN10_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN9_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN8_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN75_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN7_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN6_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN5_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN45_SAMPLER_STATE_SamplerDisable_bits 1
+#define GEN4_SAMPLER_STATE_SamplerDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_SamplerDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN9_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN8_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN75_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN7_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN6_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN5_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN45_SAMPLER_STATE_SamplerDisable_start 31
+#define GEN4_SAMPLER_STATE_SamplerDisable_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_SamplerDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 31;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 31;
+ } else {
+ return 31;
+ }
+ case 6: return 31;
+ case 5: return 31;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 31;
+ } else {
+ return 31;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Shadow Function */
+
+
+#define GEN10_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN9_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN8_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN75_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN7_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN6_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN5_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN45_SAMPLER_STATE_ShadowFunction_bits 3
+#define GEN4_SAMPLER_STATE_ShadowFunction_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ShadowFunction_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_ShadowFunction_start 33
+#define GEN9_SAMPLER_STATE_ShadowFunction_start 33
+#define GEN8_SAMPLER_STATE_ShadowFunction_start 33
+#define GEN75_SAMPLER_STATE_ShadowFunction_start 33
+#define GEN7_SAMPLER_STATE_ShadowFunction_start 33
+#define GEN6_SAMPLER_STATE_ShadowFunction_start 0
+#define GEN5_SAMPLER_STATE_ShadowFunction_start 0
+#define GEN45_SAMPLER_STATE_ShadowFunction_start 0
+#define GEN4_SAMPLER_STATE_ShadowFunction_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_ShadowFunction_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 33;
+ case 9: return 33;
+ case 8: return 33;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 33;
+ } else {
+ return 33;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::TCX Address Control Mode */
+
+
+#define GEN10_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN9_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN8_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN75_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN7_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN6_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN5_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN45_SAMPLER_STATE_TCXAddressControlMode_bits 3
+#define GEN4_SAMPLER_STATE_TCXAddressControlMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCXAddressControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TCXAddressControlMode_start 102
+#define GEN9_SAMPLER_STATE_TCXAddressControlMode_start 102
+#define GEN8_SAMPLER_STATE_TCXAddressControlMode_start 102
+#define GEN75_SAMPLER_STATE_TCXAddressControlMode_start 102
+#define GEN7_SAMPLER_STATE_TCXAddressControlMode_start 102
+#define GEN6_SAMPLER_STATE_TCXAddressControlMode_start 38
+#define GEN5_SAMPLER_STATE_TCXAddressControlMode_start 38
+#define GEN45_SAMPLER_STATE_TCXAddressControlMode_start 38
+#define GEN4_SAMPLER_STATE_TCXAddressControlMode_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCXAddressControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 102;
+ case 9: return 102;
+ case 8: return 102;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 102;
+ } else {
+ return 102;
+ }
+ case 6: return 38;
+ case 5: return 38;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 38;
+ } else {
+ return 38;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::TCY Address Control Mode */
+
+
+#define GEN10_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN9_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN8_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN75_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN7_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN6_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN5_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN45_SAMPLER_STATE_TCYAddressControlMode_bits 3
+#define GEN4_SAMPLER_STATE_TCYAddressControlMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCYAddressControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TCYAddressControlMode_start 99
+#define GEN9_SAMPLER_STATE_TCYAddressControlMode_start 99
+#define GEN8_SAMPLER_STATE_TCYAddressControlMode_start 99
+#define GEN75_SAMPLER_STATE_TCYAddressControlMode_start 99
+#define GEN7_SAMPLER_STATE_TCYAddressControlMode_start 99
+#define GEN6_SAMPLER_STATE_TCYAddressControlMode_start 35
+#define GEN5_SAMPLER_STATE_TCYAddressControlMode_start 35
+#define GEN45_SAMPLER_STATE_TCYAddressControlMode_start 35
+#define GEN4_SAMPLER_STATE_TCYAddressControlMode_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCYAddressControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 99;
+ case 9: return 99;
+ case 8: return 99;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 99;
+ } else {
+ return 99;
+ }
+ case 6: return 35;
+ case 5: return 35;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 35;
+ } else {
+ return 35;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::TCZ Address Control Mode */
+
+
+#define GEN10_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN9_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN8_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN75_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN7_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN6_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN5_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN45_SAMPLER_STATE_TCZAddressControlMode_bits 3
+#define GEN4_SAMPLER_STATE_TCZAddressControlMode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCZAddressControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TCZAddressControlMode_start 96
+#define GEN9_SAMPLER_STATE_TCZAddressControlMode_start 96
+#define GEN8_SAMPLER_STATE_TCZAddressControlMode_start 96
+#define GEN75_SAMPLER_STATE_TCZAddressControlMode_start 96
+#define GEN7_SAMPLER_STATE_TCZAddressControlMode_start 96
+#define GEN6_SAMPLER_STATE_TCZAddressControlMode_start 32
+#define GEN5_SAMPLER_STATE_TCZAddressControlMode_start 32
+#define GEN45_SAMPLER_STATE_TCZAddressControlMode_start 32
+#define GEN4_SAMPLER_STATE_TCZAddressControlMode_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TCZAddressControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Texture Border Color Mode */
+
+
+#define GEN10_SAMPLER_STATE_TextureBorderColorMode_bits 1
+#define GEN9_SAMPLER_STATE_TextureBorderColorMode_bits 1
+#define GEN8_SAMPLER_STATE_TextureBorderColorMode_bits 1
+#define GEN75_SAMPLER_STATE_TextureBorderColorMode_bits 1
+#define GEN7_SAMPLER_STATE_TextureBorderColorMode_bits 1
+#define GEN6_SAMPLER_STATE_TextureBorderColorMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TextureBorderColorMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TextureBorderColorMode_start 29
+#define GEN9_SAMPLER_STATE_TextureBorderColorMode_start 29
+#define GEN8_SAMPLER_STATE_TextureBorderColorMode_start 29
+#define GEN75_SAMPLER_STATE_TextureBorderColorMode_start 29
+#define GEN7_SAMPLER_STATE_TextureBorderColorMode_start 29
+#define GEN6_SAMPLER_STATE_TextureBorderColorMode_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TextureBorderColorMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Texture LOD Bias */
+
+
+#define GEN10_SAMPLER_STATE_TextureLODBias_bits 13
+#define GEN9_SAMPLER_STATE_TextureLODBias_bits 13
+#define GEN8_SAMPLER_STATE_TextureLODBias_bits 13
+#define GEN75_SAMPLER_STATE_TextureLODBias_bits 13
+#define GEN7_SAMPLER_STATE_TextureLODBias_bits 13
+#define GEN6_SAMPLER_STATE_TextureLODBias_bits 11
+#define GEN5_SAMPLER_STATE_TextureLODBias_bits 11
+#define GEN45_SAMPLER_STATE_TextureLODBias_bits 11
+#define GEN4_SAMPLER_STATE_TextureLODBias_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TextureLODBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 11;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TextureLODBias_start 1
+#define GEN9_SAMPLER_STATE_TextureLODBias_start 1
+#define GEN8_SAMPLER_STATE_TextureLODBias_start 1
+#define GEN75_SAMPLER_STATE_TextureLODBias_start 1
+#define GEN7_SAMPLER_STATE_TextureLODBias_start 1
+#define GEN6_SAMPLER_STATE_TextureLODBias_start 3
+#define GEN5_SAMPLER_STATE_TextureLODBias_start 3
+#define GEN45_SAMPLER_STATE_TextureLODBias_start 3
+#define GEN4_SAMPLER_STATE_TextureLODBias_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TextureLODBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::Trilinear Filter Quality */
+
+
+#define GEN10_SAMPLER_STATE_TrilinearFilterQuality_bits 2
+#define GEN9_SAMPLER_STATE_TrilinearFilterQuality_bits 2
+#define GEN8_SAMPLER_STATE_TrilinearFilterQuality_bits 2
+#define GEN75_SAMPLER_STATE_TrilinearFilterQuality_bits 2
+#define GEN7_SAMPLER_STATE_TrilinearFilterQuality_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TrilinearFilterQuality_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_TrilinearFilterQuality_start 107
+#define GEN9_SAMPLER_STATE_TrilinearFilterQuality_start 107
+#define GEN8_SAMPLER_STATE_TrilinearFilterQuality_start 107
+#define GEN75_SAMPLER_STATE_TrilinearFilterQuality_start 107
+#define GEN7_SAMPLER_STATE_TrilinearFilterQuality_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_TrilinearFilterQuality_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 107;
+ case 9: return 107;
+ case 8: return 107;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 107;
+ } else {
+ return 107;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::U Address Mag Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_UAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN9_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN8_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN75_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN7_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN6_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN5_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN45_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+#define GEN4_SAMPLER_STATE_UAddressMagFilterRoundingEnable_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_UAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 114;
+ case 9: return 114;
+ case 8: return 114;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 114;
+ } else {
+ return 114;
+ }
+ case 6: return 114;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::U Address Min Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_UAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN9_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN8_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN75_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN7_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN6_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN5_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN45_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+#define GEN4_SAMPLER_STATE_UAddressMinFilterRoundingEnable_start 113
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_UAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 113;
+ case 9: return 113;
+ case 8: return 113;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 113;
+ } else {
+ return 113;
+ }
+ case 6: return 113;
+ case 5: return 113;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 113;
+ } else {
+ return 113;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::V Address Mag Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_VAddressMagFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN9_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN8_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN75_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN7_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN6_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN5_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN45_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+#define GEN4_SAMPLER_STATE_VAddressMagFilterRoundingEnable_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_VAddressMagFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 112;
+ } else {
+ return 112;
+ }
+ case 6: return 112;
+ case 5: return 112;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 112;
+ } else {
+ return 112;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE::V Address Min Filter Rounding Enable */
+
+
+#define GEN10_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN9_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN8_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN75_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN7_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN6_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN5_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN45_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+#define GEN4_SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_VAddressMinFilterRoundingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN9_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN8_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN75_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN7_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN6_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN5_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN45_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+#define GEN4_SAMPLER_STATE_VAddressMinFilterRoundingEnable_start 111
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_VAddressMinFilterRoundingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 111;
+ case 9: return 111;
+ case 8: return 111;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 111;
+ } else {
+ return 111;
+ }
+ case 6: return 111;
+ case 5: return 111;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 111;
+ } else {
+ return 111;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,0] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_start 0
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_start 0
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,1] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_start 16
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_start 16
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,2] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_start 32
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_start 32
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,3] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_start 48
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_start 48
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,4] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_start 64
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_start 64
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,5] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_start 80
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_start 80
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 80;
+ case 9: return 80;
+ case 8: return 80;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,6] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_start 96
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_start 96
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn6_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0X Filter Coefficient[n,7] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_start 112
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_start 112
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0XFilterCoefficientn7_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,0] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_start 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_start 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,1] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_start 24
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_start 24
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,2] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_start 40
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_start 40
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 40;
+ case 9: return 40;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,3] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_start 56
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_start 56
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,4] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_start 72
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_start 72
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 72;
+ case 9: return 72;
+ case 8: return 72;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,5] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_start 88
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_start 88
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_start 88
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 88;
+ case 9: return 88;
+ case 8: return 88;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,6] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_start 104
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_start 104
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn6_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 104;
+ case 9: return 104;
+ case 8: return 104;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 0Y Filter Coefficient[n,7] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_start 120
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_start 120
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_start 120
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table0YFilterCoefficientn7_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 120;
+ case 9: return 120;
+ case 8: return 120;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1X Filter Coefficient[n,2] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_start 144
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_start 144
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_start 144
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 144;
+ case 9: return 144;
+ case 8: return 144;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1X Filter Coefficient[n,3] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_start 152
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_start 152
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_start 152
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 152;
+ case 9: return 152;
+ case 8: return 152;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1X Filter Coefficient[n,4] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_start 160
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_start 160
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn4_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1X Filter Coefficient[n,5] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_start 168
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_start 168
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1XFilterCoefficientn5_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 168;
+ case 9: return 168;
+ case 8: return 168;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1Y Filter Coefficient[n,2] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_start 208
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_start 208
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_start 208
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 208;
+ case 9: return 208;
+ case 8: return 208;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1Y Filter Coefficient[n,3] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_start 216
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_start 216
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 216;
+ case 9: return 216;
+ case 8: return 216;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1Y Filter Coefficient[n,4] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_start 224
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_start 224
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn4_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 224;
+ case 9: return 224;
+ case 8: return 224;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SAMPLER_STATE_8X8_AVS_COEFFICIENTS::Table 1Y Filter Coefficient[n,5] */
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_bits 8
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_bits 8
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_start 232
+#define GEN9_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_start 232
+#define GEN8_SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_start 232
+
+static inline uint32_t ATTRIBUTE_PURE
+SAMPLER_STATE_8X8_AVS_COEFFICIENTS_Table1YFilterCoefficientn5_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 232;
+ case 9: return 232;
+ case 8: return 232;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCISSOR_RECT */
+
+
+#define GEN10_SCISSOR_RECT_length 2
+#define GEN9_SCISSOR_RECT_length 2
+#define GEN8_SCISSOR_RECT_length 2
+#define GEN75_SCISSOR_RECT_length 2
+#define GEN7_SCISSOR_RECT_length 2
+#define GEN6_SCISSOR_RECT_length 2
+#define GEN5_SCISSOR_RECT_length 2
+#define GEN45_SCISSOR_RECT_length 2
+#define GEN4_SCISSOR_RECT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCISSOR_RECT::Scissor Rectangle X Max */
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN9_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN8_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN75_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN7_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN6_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN5_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN45_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+#define GEN4_SCISSOR_RECT_ScissorRectangleXMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleXMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN9_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN8_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN75_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN7_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN6_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN5_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN45_SCISSOR_RECT_ScissorRectangleXMax_start 32
+#define GEN4_SCISSOR_RECT_ScissorRectangleXMax_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleXMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCISSOR_RECT::Scissor Rectangle X Min */
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN9_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN8_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN75_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN7_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN6_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN5_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN45_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+#define GEN4_SCISSOR_RECT_ScissorRectangleXMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleXMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN9_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN8_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN75_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN7_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN6_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN5_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN45_SCISSOR_RECT_ScissorRectangleXMin_start 0
+#define GEN4_SCISSOR_RECT_ScissorRectangleXMin_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleXMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCISSOR_RECT::Scissor Rectangle Y Max */
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN9_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN8_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN75_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN7_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN6_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN5_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN45_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+#define GEN4_SCISSOR_RECT_ScissorRectangleYMax_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleYMax_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN9_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN8_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN75_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN7_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN6_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN5_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN45_SCISSOR_RECT_ScissorRectangleYMax_start 48
+#define GEN4_SCISSOR_RECT_ScissorRectangleYMax_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleYMax_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCISSOR_RECT::Scissor Rectangle Y Min */
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN9_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN8_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN75_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN7_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN6_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN5_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN45_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+#define GEN4_SCISSOR_RECT_ScissorRectangleYMin_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleYMin_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN9_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN8_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN75_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN7_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN6_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN5_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN45_SCISSOR_RECT_ScissorRectangleYMin_start 16
+#define GEN4_SCISSOR_RECT_ScissorRectangleYMin_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SCISSOR_RECT_ScissorRectangleYMin_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCRATCH1 */
+
+
+#define GEN75_SCRATCH1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SCRATCH1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SCRATCH1::L3 Atomic Disable */
+
+
+#define GEN75_SCRATCH1_L3AtomicDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SCRATCH1_L3AtomicDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_SCRATCH1_L3AtomicDisable_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SCRATCH1_L3AtomicDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_length 16
+#define GEN9_SF_CLIP_VIEWPORT_length 16
+#define GEN8_SF_CLIP_VIEWPORT_length 16
+#define GEN75_SF_CLIP_VIEWPORT_length 16
+#define GEN7_SF_CLIP_VIEWPORT_length 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m00 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm00_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm00_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m11 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm11_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm11_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m22 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm22_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm22_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m30 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm30_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm30_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m31 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Viewport Matrix Element m32 */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN9_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN8_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN75_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN7_SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_ViewportMatrixElementm32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 160;
+ case 9: return 160;
+ case 8: return 160;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::X Max Clip Guardband */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_XMaxClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMaxClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMaxClipGuardband_start 288
+#define GEN9_SF_CLIP_VIEWPORT_XMaxClipGuardband_start 288
+#define GEN8_SF_CLIP_VIEWPORT_XMaxClipGuardband_start 288
+#define GEN75_SF_CLIP_VIEWPORT_XMaxClipGuardband_start 288
+#define GEN7_SF_CLIP_VIEWPORT_XMaxClipGuardband_start 288
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMaxClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 288;
+ case 9: return 288;
+ case 8: return 288;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 288;
+ } else {
+ return 288;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::X Max ViewPort */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMaxViewPort_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_XMaxViewPort_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_XMaxViewPort_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMaxViewPort_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMaxViewPort_start 416
+#define GEN9_SF_CLIP_VIEWPORT_XMaxViewPort_start 416
+#define GEN8_SF_CLIP_VIEWPORT_XMaxViewPort_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMaxViewPort_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 416;
+ case 8: return 416;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::X Min Clip Guardband */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_XMinClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMinClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMinClipGuardband_start 256
+#define GEN9_SF_CLIP_VIEWPORT_XMinClipGuardband_start 256
+#define GEN8_SF_CLIP_VIEWPORT_XMinClipGuardband_start 256
+#define GEN75_SF_CLIP_VIEWPORT_XMinClipGuardband_start 256
+#define GEN7_SF_CLIP_VIEWPORT_XMinClipGuardband_start 256
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMinClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 256;
+ } else {
+ return 256;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::X Min ViewPort */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMinViewPort_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_XMinViewPort_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_XMinViewPort_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMinViewPort_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_XMinViewPort_start 384
+#define GEN9_SF_CLIP_VIEWPORT_XMinViewPort_start 384
+#define GEN8_SF_CLIP_VIEWPORT_XMinViewPort_start 384
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_XMinViewPort_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 384;
+ case 9: return 384;
+ case 8: return 384;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Y Max Clip Guardband */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_YMaxClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMaxClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMaxClipGuardband_start 352
+#define GEN9_SF_CLIP_VIEWPORT_YMaxClipGuardband_start 352
+#define GEN8_SF_CLIP_VIEWPORT_YMaxClipGuardband_start 352
+#define GEN75_SF_CLIP_VIEWPORT_YMaxClipGuardband_start 352
+#define GEN7_SF_CLIP_VIEWPORT_YMaxClipGuardband_start 352
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMaxClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 352;
+ case 9: return 352;
+ case 8: return 352;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 352;
+ } else {
+ return 352;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Y Max ViewPort */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMaxViewPort_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_YMaxViewPort_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_YMaxViewPort_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMaxViewPort_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMaxViewPort_start 480
+#define GEN9_SF_CLIP_VIEWPORT_YMaxViewPort_start 480
+#define GEN8_SF_CLIP_VIEWPORT_YMaxViewPort_start 480
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMaxViewPort_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 480;
+ case 9: return 480;
+ case 8: return 480;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Y Min Clip Guardband */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN75_SF_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+#define GEN7_SF_CLIP_VIEWPORT_YMinClipGuardband_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMinClipGuardband_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMinClipGuardband_start 320
+#define GEN9_SF_CLIP_VIEWPORT_YMinClipGuardband_start 320
+#define GEN8_SF_CLIP_VIEWPORT_YMinClipGuardband_start 320
+#define GEN75_SF_CLIP_VIEWPORT_YMinClipGuardband_start 320
+#define GEN7_SF_CLIP_VIEWPORT_YMinClipGuardband_start 320
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMinClipGuardband_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 320;
+ } else {
+ return 320;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_CLIP_VIEWPORT::Y Min ViewPort */
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMinViewPort_bits 32
+#define GEN9_SF_CLIP_VIEWPORT_YMinViewPort_bits 32
+#define GEN8_SF_CLIP_VIEWPORT_YMinViewPort_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMinViewPort_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_CLIP_VIEWPORT_YMinViewPort_start 448
+#define GEN9_SF_CLIP_VIEWPORT_YMinViewPort_start 448
+#define GEN8_SF_CLIP_VIEWPORT_YMinViewPort_start 448
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_CLIP_VIEWPORT_YMinViewPort_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 448;
+ case 9: return 448;
+ case 8: return 448;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Component Override W */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideW_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Component Override X */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideX_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Component Override Y */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideY_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Component Override Z */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ComponentOverrideZ_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Constant Source */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_ConstantSource_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Source Attribute */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SourceAttribute_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Swizzle Control Mode */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleControlMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_OUTPUT_ATTRIBUTE_DETAIL::Swizzle Select */
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+#define GEN9_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+#define GEN8_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+#define GEN75_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+#define GEN7_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+#define GEN6_SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_OUTPUT_ATTRIBUTE_DETAIL_SwizzleSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE */
+
+
+#define GEN5_SF_STATE_length 8
+#define GEN45_SF_STATE_length 8
+#define GEN4_SF_STATE_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::2x2 Pixel Triangle Filter Disable */
+
+
+#define GEN5_SF_STATE_2x2PixelTriangleFilterDisable_bits 1
+#define GEN45_SF_STATE_2x2PixelTriangleFilterDisable_bits 1
+#define GEN4_SF_STATE_2x2PixelTriangleFilterDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_2x2PixelTriangleFilterDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_2x2PixelTriangleFilterDisable_start 210
+#define GEN45_SF_STATE_2x2PixelTriangleFilterDisable_start 210
+#define GEN4_SF_STATE_2x2PixelTriangleFilterDisable_start 210
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_2x2PixelTriangleFilterDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 210;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 210;
+ } else {
+ return 210;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::AA Line Distance Mode */
+
+
+#define GEN5_SF_STATE_AALineDistanceMode_bits 1
+#define GEN45_SF_STATE_AALineDistanceMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_AALineDistanceMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_AALineDistanceMode_start 238
+#define GEN45_SF_STATE_AALineDistanceMode_start 238
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_AALineDistanceMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 238;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 238;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Anti-Aliasing Enable */
+
+
+#define GEN5_SF_STATE_AntiAliasingEnable_bits 1
+#define GEN45_SF_STATE_AntiAliasingEnable_bits 1
+#define GEN4_SF_STATE_AntiAliasingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_AntiAliasingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_AntiAliasingEnable_start 223
+#define GEN45_SF_STATE_AntiAliasingEnable_start 223
+#define GEN4_SF_STATE_AntiAliasingEnable_start 223
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_AntiAliasingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 223;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 223;
+ } else {
+ return 223;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Binding Table Entry Count */
+
+
+#define GEN5_SF_STATE_BindingTableEntryCount_bits 8
+#define GEN45_SF_STATE_BindingTableEntryCount_bits 8
+#define GEN4_SF_STATE_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_BindingTableEntryCount_start 50
+#define GEN45_SF_STATE_BindingTableEntryCount_start 50
+#define GEN4_SF_STATE_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Constant URB Entry Read Length */
+
+
+#define GEN5_SF_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN45_SF_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN4_SF_STATE_ConstantURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ConstantURBEntryReadLength_start 121
+#define GEN45_SF_STATE_ConstantURBEntryReadLength_start 121
+#define GEN4_SF_STATE_ConstantURBEntryReadLength_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Constant URB Entry Read Offset */
+
+
+#define GEN5_SF_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN45_SF_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN4_SF_STATE_ConstantURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN45_SF_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN4_SF_STATE_ConstantURBEntryReadOffset_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Cull Mode */
+
+
+#define GEN5_SF_STATE_CullMode_bits 2
+#define GEN45_SF_STATE_CullMode_bits 2
+#define GEN4_SF_STATE_CullMode_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_CullMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_CullMode_start 221
+#define GEN45_SF_STATE_CullMode_start 221
+#define GEN4_SF_STATE_CullMode_start 221
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_CullMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 221;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 221;
+ } else {
+ return 221;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Destination Origin Horizontal Bias */
+
+
+#define GEN5_SF_STATE_DestinationOriginHorizontalBias_bits 4
+#define GEN45_SF_STATE_DestinationOriginHorizontalBias_bits 4
+#define GEN4_SF_STATE_DestinationOriginHorizontalBias_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DestinationOriginHorizontalBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_DestinationOriginHorizontalBias_start 205
+#define GEN45_SF_STATE_DestinationOriginHorizontalBias_start 205
+#define GEN4_SF_STATE_DestinationOriginHorizontalBias_start 205
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DestinationOriginHorizontalBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 205;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 205;
+ } else {
+ return 205;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Destination Origin Vertical Bias */
+
+
+#define GEN5_SF_STATE_DestinationOriginVerticalBias_bits 4
+#define GEN45_SF_STATE_DestinationOriginVerticalBias_bits 4
+#define GEN4_SF_STATE_DestinationOriginVerticalBias_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DestinationOriginVerticalBias_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_DestinationOriginVerticalBias_start 201
+#define GEN45_SF_STATE_DestinationOriginVerticalBias_start 201
+#define GEN4_SF_STATE_DestinationOriginVerticalBias_start 201
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DestinationOriginVerticalBias_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 201;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 201;
+ } else {
+ return 201;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN5_SF_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN45_SF_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN4_SF_STATE_DispatchGRFStartRegisterForURBData_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN45_SF_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN4_SF_STATE_DispatchGRFStartRegisterForURBData_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Fast Scissor Clip Disable */
+
+
+#define GEN5_SF_STATE_FastScissorClipDisable_bits 1
+#define GEN45_SF_STATE_FastScissorClipDisable_bits 1
+#define GEN4_SF_STATE_FastScissorClipDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FastScissorClipDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_FastScissorClipDisable_start 220
+#define GEN45_SF_STATE_FastScissorClipDisable_start 220
+#define GEN4_SF_STATE_FastScissorClipDisable_start 220
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FastScissorClipDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 220;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 220;
+ } else {
+ return 220;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Floating Point Mode */
+
+
+#define GEN5_SF_STATE_FloatingPointMode_bits 1
+#define GEN45_SF_STATE_FloatingPointMode_bits 1
+#define GEN4_SF_STATE_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_FloatingPointMode_start 48
+#define GEN45_SF_STATE_FloatingPointMode_start 48
+#define GEN4_SF_STATE_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Front Winding */
+
+
+#define GEN5_SF_STATE_FrontWinding_bits 1
+#define GEN45_SF_STATE_FrontWinding_bits 1
+#define GEN4_SF_STATE_FrontWinding_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FrontWinding_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_FrontWinding_start 160
+#define GEN45_SF_STATE_FrontWinding_start 160
+#define GEN4_SF_STATE_FrontWinding_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_FrontWinding_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::GRF Register Count */
+
+
+#define GEN5_SF_STATE_GRFRegisterCount_bits 3
+#define GEN45_SF_STATE_GRFRegisterCount_bits 3
+#define GEN4_SF_STATE_GRFRegisterCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_GRFRegisterCount_start 1
+#define GEN45_SF_STATE_GRFRegisterCount_start 1
+#define GEN4_SF_STATE_GRFRegisterCount_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Illegal Opcode Exception Enable */
+
+
+#define GEN5_SF_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN45_SF_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN4_SF_STATE_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN45_SF_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN4_SF_STATE_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 45;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 45;
+ } else {
+ return 45;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Kernel Start Pointer */
+
+
+#define GEN5_SF_STATE_KernelStartPointer_bits 26
+#define GEN45_SF_STATE_KernelStartPointer_bits 26
+#define GEN4_SF_STATE_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_KernelStartPointer_start 6
+#define GEN45_SF_STATE_KernelStartPointer_start 6
+#define GEN4_SF_STATE_KernelStartPointer_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Last Pixel Enable */
+
+
+#define GEN5_SF_STATE_LastPixelEnable_bits 1
+#define GEN45_SF_STATE_LastPixelEnable_bits 1
+#define GEN4_SF_STATE_LastPixelEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LastPixelEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_LastPixelEnable_start 255
+#define GEN45_SF_STATE_LastPixelEnable_start 255
+#define GEN4_SF_STATE_LastPixelEnable_start 255
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LastPixelEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 255;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 255;
+ } else {
+ return 255;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Line End Cap Antialiasing Region Width */
+
+
+#define GEN5_SF_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN45_SF_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN4_SF_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_LineEndCapAntialiasingRegionWidth_start 214
+#define GEN45_SF_STATE_LineEndCapAntialiasingRegionWidth_start 214
+#define GEN4_SF_STATE_LineEndCapAntialiasingRegionWidth_start 214
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 214;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 214;
+ } else {
+ return 214;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Line Strip/List Provoking Vertex Select */
+
+
+#define GEN5_SF_STATE_LineStripListProvokingVertexSelect_bits 2
+#define GEN45_SF_STATE_LineStripListProvokingVertexSelect_bits 2
+#define GEN4_SF_STATE_LineStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_LineStripListProvokingVertexSelect_start 251
+#define GEN45_SF_STATE_LineStripListProvokingVertexSelect_start 251
+#define GEN4_SF_STATE_LineStripListProvokingVertexSelect_start 251
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 251;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 251;
+ } else {
+ return 251;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Line Width */
+
+
+#define GEN5_SF_STATE_LineWidth_bits 4
+#define GEN45_SF_STATE_LineWidth_bits 4
+#define GEN4_SF_STATE_LineWidth_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_LineWidth_start 216
+#define GEN45_SF_STATE_LineWidth_start 216
+#define GEN4_SF_STATE_LineWidth_start 216
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_LineWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 216;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 216;
+ } else {
+ return 216;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Mask Stack Exception Enable */
+
+
+#define GEN5_SF_STATE_MaskStackExceptionEnable_bits 1
+#define GEN45_SF_STATE_MaskStackExceptionEnable_bits 1
+#define GEN4_SF_STATE_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_MaskStackExceptionEnable_start 43
+#define GEN45_SF_STATE_MaskStackExceptionEnable_start 43
+#define GEN4_SF_STATE_MaskStackExceptionEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 43;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 43;
+ } else {
+ return 43;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Maximum Number of Threads */
+
+
+#define GEN5_SF_STATE_MaximumNumberofThreads_bits 6
+#define GEN45_SF_STATE_MaximumNumberofThreads_bits 6
+#define GEN4_SF_STATE_MaximumNumberofThreads_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_MaximumNumberofThreads_start 153
+#define GEN45_SF_STATE_MaximumNumberofThreads_start 153
+#define GEN4_SF_STATE_MaximumNumberofThreads_start 153
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 153;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 153;
+ } else {
+ return 153;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Number of URB Entries */
+
+
+#define GEN5_SF_STATE_NumberofURBEntries_bits 8
+#define GEN45_SF_STATE_NumberofURBEntries_bits 8
+#define GEN4_SF_STATE_NumberofURBEntries_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_NumberofURBEntries_start 139
+#define GEN45_SF_STATE_NumberofURBEntries_start 139
+#define GEN4_SF_STATE_NumberofURBEntries_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 139;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 139;
+ } else {
+ return 139;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Per-Thread Scratch Space */
+
+
+#define GEN5_SF_STATE_PerThreadScratchSpace_bits 4
+#define GEN45_SF_STATE_PerThreadScratchSpace_bits 4
+#define GEN4_SF_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_PerThreadScratchSpace_start 64
+#define GEN45_SF_STATE_PerThreadScratchSpace_start 64
+#define GEN4_SF_STATE_PerThreadScratchSpace_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Point Rasterization Rule */
+
+
+#define GEN5_SF_STATE_PointRasterizationRule_bits 2
+#define GEN45_SF_STATE_PointRasterizationRule_bits 2
+#define GEN4_SF_STATE_PointRasterizationRule_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointRasterizationRule_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_PointRasterizationRule_start 212
+#define GEN45_SF_STATE_PointRasterizationRule_start 212
+#define GEN4_SF_STATE_PointRasterizationRule_start 212
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointRasterizationRule_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 212;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 212;
+ } else {
+ return 212;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Point Width */
+
+
+#define GEN5_SF_STATE_PointWidth_bits 11
+#define GEN45_SF_STATE_PointWidth_bits 11
+#define GEN4_SF_STATE_PointWidth_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_PointWidth_start 224
+#define GEN45_SF_STATE_PointWidth_start 224
+#define GEN4_SF_STATE_PointWidth_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Point Width Source */
+
+
+#define GEN5_SF_STATE_PointWidthSource_bits 1
+#define GEN45_SF_STATE_PointWidthSource_bits 1
+#define GEN4_SF_STATE_PointWidthSource_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointWidthSource_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_PointWidthSource_start 235
+#define GEN45_SF_STATE_PointWidthSource_start 235
+#define GEN4_SF_STATE_PointWidthSource_start 235
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_PointWidthSource_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 235;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 235;
+ } else {
+ return 235;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Scissor Rectangle Enable */
+
+
+#define GEN5_SF_STATE_ScissorRectangleEnable_bits 1
+#define GEN45_SF_STATE_ScissorRectangleEnable_bits 1
+#define GEN4_SF_STATE_ScissorRectangleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ScissorRectangleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ScissorRectangleEnable_start 209
+#define GEN45_SF_STATE_ScissorRectangleEnable_start 209
+#define GEN4_SF_STATE_ScissorRectangleEnable_start 209
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ScissorRectangleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 209;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 209;
+ } else {
+ return 209;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Scratch Space Base Pointer */
+
+
+#define GEN5_SF_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN45_SF_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN4_SF_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ScratchSpaceBasePointer_start 74
+#define GEN45_SF_STATE_ScratchSpaceBasePointer_start 74
+#define GEN4_SF_STATE_ScratchSpaceBasePointer_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Setup Viewport State Offset */
+
+
+#define GEN5_SF_STATE_SetupViewportStateOffset_bits 27
+#define GEN45_SF_STATE_SetupViewportStateOffset_bits 27
+#define GEN4_SF_STATE_SetupViewportStateOffset_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SetupViewportStateOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_SetupViewportStateOffset_start 165
+#define GEN45_SF_STATE_SetupViewportStateOffset_start 165
+#define GEN4_SF_STATE_SetupViewportStateOffset_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SetupViewportStateOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 165;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 165;
+ } else {
+ return 165;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Single Program Flow */
+
+
+#define GEN5_SF_STATE_SingleProgramFlow_bits 1
+#define GEN45_SF_STATE_SingleProgramFlow_bits 1
+#define GEN4_SF_STATE_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_SingleProgramFlow_start 63
+#define GEN45_SF_STATE_SingleProgramFlow_start 63
+#define GEN4_SF_STATE_SingleProgramFlow_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Software Exception Enable */
+
+
+#define GEN5_SF_STATE_SoftwareExceptionEnable_bits 1
+#define GEN45_SF_STATE_SoftwareExceptionEnable_bits 1
+#define GEN4_SF_STATE_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_SoftwareExceptionEnable_start 39
+#define GEN45_SF_STATE_SoftwareExceptionEnable_start 39
+#define GEN4_SF_STATE_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 39;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 39;
+ } else {
+ return 39;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Sprite Point Enable */
+
+
+#define GEN5_SF_STATE_SpritePointEnable_bits 1
+#define GEN45_SF_STATE_SpritePointEnable_bits 1
+#define GEN4_SF_STATE_SpritePointEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SpritePointEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_SpritePointEnable_start 237
+#define GEN45_SF_STATE_SpritePointEnable_start 237
+#define GEN4_SF_STATE_SpritePointEnable_start 237
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_SpritePointEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 237;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 237;
+ } else {
+ return 237;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Statistics Enable */
+
+
+#define GEN45_SF_STATE_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_SF_STATE_StatisticsEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Thread Priority */
+
+
+#define GEN5_SF_STATE_ThreadPriority_bits 1
+#define GEN45_SF_STATE_ThreadPriority_bits 1
+#define GEN4_SF_STATE_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ThreadPriority_start 49
+#define GEN45_SF_STATE_ThreadPriority_start 49
+#define GEN4_SF_STATE_ThreadPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 49;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 49;
+ } else {
+ return 49;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Triangle Fan Provoking Vertex Select */
+
+
+#define GEN5_SF_STATE_TriangleFanProvokingVertexSelect_bits 2
+#define GEN45_SF_STATE_TriangleFanProvokingVertexSelect_bits 2
+#define GEN4_SF_STATE_TriangleFanProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_TriangleFanProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_TriangleFanProvokingVertexSelect_start 249
+#define GEN45_SF_STATE_TriangleFanProvokingVertexSelect_start 249
+#define GEN4_SF_STATE_TriangleFanProvokingVertexSelect_start 249
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_TriangleFanProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 249;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 249;
+ } else {
+ return 249;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Triangle Strip/List Provoking Vertex Select */
+
+
+#define GEN5_SF_STATE_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN45_SF_STATE_TriangleStripListProvokingVertexSelect_bits 2
+#define GEN4_SF_STATE_TriangleStripListProvokingVertexSelect_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_TriangleStripListProvokingVertexSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_TriangleStripListProvokingVertexSelect_start 253
+#define GEN45_SF_STATE_TriangleStripListProvokingVertexSelect_start 253
+#define GEN4_SF_STATE_TriangleStripListProvokingVertexSelect_start 253
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_TriangleStripListProvokingVertexSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 253;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 253;
+ } else {
+ return 253;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::URB Entry Allocation Size */
+
+
+#define GEN5_SF_STATE_URBEntryAllocationSize_bits 5
+#define GEN45_SF_STATE_URBEntryAllocationSize_bits 5
+#define GEN4_SF_STATE_URBEntryAllocationSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_URBEntryAllocationSize_start 147
+#define GEN45_SF_STATE_URBEntryAllocationSize_start 147
+#define GEN4_SF_STATE_URBEntryAllocationSize_start 147
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 147;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 147;
+ } else {
+ return 147;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Vertex Sub Pixel Precision Select */
+
+
+#define GEN5_SF_STATE_VertexSubPixelPrecisionSelect_bits 1
+#define GEN45_SF_STATE_VertexSubPixelPrecisionSelect_bits 1
+#define GEN4_SF_STATE_VertexSubPixelPrecisionSelect_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexSubPixelPrecisionSelect_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_VertexSubPixelPrecisionSelect_start 236
+#define GEN45_SF_STATE_VertexSubPixelPrecisionSelect_start 236
+#define GEN4_SF_STATE_VertexSubPixelPrecisionSelect_start 236
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexSubPixelPrecisionSelect_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 236;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 236;
+ } else {
+ return 236;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Vertex URB Entry Read Length */
+
+
+#define GEN5_SF_STATE_VertexURBEntryReadLength_bits 6
+#define GEN45_SF_STATE_VertexURBEntryReadLength_bits 6
+#define GEN4_SF_STATE_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_VertexURBEntryReadLength_start 107
+#define GEN45_SF_STATE_VertexURBEntryReadLength_start 107
+#define GEN4_SF_STATE_VertexURBEntryReadLength_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Vertex URB Entry Read Offset */
+
+
+#define GEN5_SF_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN45_SF_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN4_SF_STATE_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_VertexURBEntryReadOffset_start 100
+#define GEN45_SF_STATE_VertexURBEntryReadOffset_start 100
+#define GEN4_SF_STATE_VertexURBEntryReadOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 100;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 100;
+ } else {
+ return 100;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Viewport Transform Enable */
+
+
+#define GEN5_SF_STATE_ViewportTransformEnable_bits 1
+#define GEN45_SF_STATE_ViewportTransformEnable_bits 1
+#define GEN4_SF_STATE_ViewportTransformEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ViewportTransformEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ViewportTransformEnable_start 161
+#define GEN45_SF_STATE_ViewportTransformEnable_start 161
+#define GEN4_SF_STATE_ViewportTransformEnable_start 161
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ViewportTransformEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 161;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 161;
+ } else {
+ return 161;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_STATE::Zero Pixel Triangle Filter Disable */
+
+
+#define GEN5_SF_STATE_ZeroPixelTriangleFilterDisable_bits 1
+#define GEN45_SF_STATE_ZeroPixelTriangleFilterDisable_bits 1
+#define GEN4_SF_STATE_ZeroPixelTriangleFilterDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ZeroPixelTriangleFilterDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_STATE_ZeroPixelTriangleFilterDisable_start 211
+#define GEN45_SF_STATE_ZeroPixelTriangleFilterDisable_start 211
+#define GEN4_SF_STATE_ZeroPixelTriangleFilterDisable_start 211
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_STATE_ZeroPixelTriangleFilterDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 211;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 211;
+ } else {
+ return 211;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT */
+
+
+#define GEN6_SF_VIEWPORT_length 8
+#define GEN5_SF_VIEWPORT_length 8
+#define GEN45_SF_VIEWPORT_length 8
+#define GEN4_SF_VIEWPORT_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Scissor Rectangle */
+
+
+#define GEN5_SF_VIEWPORT_ScissorRectangle_bits 64
+#define GEN45_SF_VIEWPORT_ScissorRectangle_bits 64
+#define GEN4_SF_VIEWPORT_ScissorRectangle_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ScissorRectangle_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_SF_VIEWPORT_ScissorRectangle_start 192
+#define GEN45_SF_VIEWPORT_ScissorRectangle_start 192
+#define GEN4_SF_VIEWPORT_ScissorRectangle_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ScissorRectangle_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m00 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm00_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm00_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm00_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm00_start 0
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm00_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm00_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m11 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm11_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm11_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm11_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm11_start 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm11_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm11_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m22 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm22_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm22_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm22_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm22_start 64
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm22_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm22_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m30 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm30_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm30_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm30_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm30_start 96
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm30_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm30_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m31 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm31_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm31_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm31_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm31_start 128
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm31_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm31_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 128;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SF_VIEWPORT::Viewport Matrix Element m32 */
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm32_bits 32
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm32_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm32_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_SF_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN5_SF_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN45_SF_VIEWPORT_ViewportMatrixElementm32_start 160
+#define GEN4_SF_VIEWPORT_ViewportMatrixElementm32_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+SF_VIEWPORT_ViewportMatrixElementm32_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 160;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SLICE_COMMON_ECO_CHICKEN1 */
+
+
+#define GEN9_SLICE_COMMON_ECO_CHICKEN1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SLICE_COMMON_ECO_CHICKEN1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SLICE_COMMON_ECO_CHICKEN1::GLK Barrier Mode */
+
+
+#define GEN9_SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+SLICE_COMMON_ECO_CHICKEN1_GLKBarrierMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 7;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SLICE_COMMON_ECO_CHICKEN1::GLK Barrier Mode Mask */
+
+
+#define GEN9_SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+SLICE_COMMON_ECO_CHICKEN1_GLKBarrierModeMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 23;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL */
+
+
+#define GEN10_SO_DECL_length 1
+#define GEN9_SO_DECL_length 1
+#define GEN8_SO_DECL_length 1
+#define GEN75_SO_DECL_length 1
+#define GEN7_SO_DECL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL::Component Mask */
+
+
+#define GEN10_SO_DECL_ComponentMask_bits 4
+#define GEN9_SO_DECL_ComponentMask_bits 4
+#define GEN8_SO_DECL_ComponentMask_bits 4
+#define GEN75_SO_DECL_ComponentMask_bits 4
+#define GEN7_SO_DECL_ComponentMask_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ComponentMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_ComponentMask_start 0
+#define GEN9_SO_DECL_ComponentMask_start 0
+#define GEN8_SO_DECL_ComponentMask_start 0
+#define GEN75_SO_DECL_ComponentMask_start 0
+#define GEN7_SO_DECL_ComponentMask_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ComponentMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL::Hole Flag */
+
+
+#define GEN10_SO_DECL_HoleFlag_bits 1
+#define GEN9_SO_DECL_HoleFlag_bits 1
+#define GEN8_SO_DECL_HoleFlag_bits 1
+#define GEN75_SO_DECL_HoleFlag_bits 1
+#define GEN7_SO_DECL_HoleFlag_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_HoleFlag_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_HoleFlag_start 11
+#define GEN9_SO_DECL_HoleFlag_start 11
+#define GEN8_SO_DECL_HoleFlag_start 11
+#define GEN75_SO_DECL_HoleFlag_start 11
+#define GEN7_SO_DECL_HoleFlag_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_HoleFlag_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL::Output Buffer Slot */
+
+
+#define GEN10_SO_DECL_OutputBufferSlot_bits 2
+#define GEN9_SO_DECL_OutputBufferSlot_bits 2
+#define GEN8_SO_DECL_OutputBufferSlot_bits 2
+#define GEN75_SO_DECL_OutputBufferSlot_bits 2
+#define GEN7_SO_DECL_OutputBufferSlot_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_OutputBufferSlot_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_OutputBufferSlot_start 12
+#define GEN9_SO_DECL_OutputBufferSlot_start 12
+#define GEN8_SO_DECL_OutputBufferSlot_start 12
+#define GEN75_SO_DECL_OutputBufferSlot_start 12
+#define GEN7_SO_DECL_OutputBufferSlot_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_OutputBufferSlot_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL::Register Index */
+
+
+#define GEN10_SO_DECL_RegisterIndex_bits 6
+#define GEN9_SO_DECL_RegisterIndex_bits 6
+#define GEN8_SO_DECL_RegisterIndex_bits 6
+#define GEN75_SO_DECL_RegisterIndex_bits 6
+#define GEN7_SO_DECL_RegisterIndex_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_RegisterIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_RegisterIndex_start 4
+#define GEN9_SO_DECL_RegisterIndex_start 4
+#define GEN8_SO_DECL_RegisterIndex_start 4
+#define GEN75_SO_DECL_RegisterIndex_start 4
+#define GEN7_SO_DECL_RegisterIndex_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_RegisterIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL_ENTRY */
+
+
+#define GEN10_SO_DECL_ENTRY_length 2
+#define GEN9_SO_DECL_ENTRY_length 2
+#define GEN8_SO_DECL_ENTRY_length 2
+#define GEN75_SO_DECL_ENTRY_length 2
+#define GEN7_SO_DECL_ENTRY_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL_ENTRY::Stream 0 Decl */
+
+
+#define GEN10_SO_DECL_ENTRY_Stream0Decl_bits 16
+#define GEN9_SO_DECL_ENTRY_Stream0Decl_bits 16
+#define GEN8_SO_DECL_ENTRY_Stream0Decl_bits 16
+#define GEN75_SO_DECL_ENTRY_Stream0Decl_bits 16
+#define GEN7_SO_DECL_ENTRY_Stream0Decl_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream0Decl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_ENTRY_Stream0Decl_start 0
+#define GEN9_SO_DECL_ENTRY_Stream0Decl_start 0
+#define GEN8_SO_DECL_ENTRY_Stream0Decl_start 0
+#define GEN75_SO_DECL_ENTRY_Stream0Decl_start 0
+#define GEN7_SO_DECL_ENTRY_Stream0Decl_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream0Decl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL_ENTRY::Stream 1 Decl */
+
+
+#define GEN10_SO_DECL_ENTRY_Stream1Decl_bits 16
+#define GEN9_SO_DECL_ENTRY_Stream1Decl_bits 16
+#define GEN8_SO_DECL_ENTRY_Stream1Decl_bits 16
+#define GEN75_SO_DECL_ENTRY_Stream1Decl_bits 16
+#define GEN7_SO_DECL_ENTRY_Stream1Decl_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream1Decl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_ENTRY_Stream1Decl_start 16
+#define GEN9_SO_DECL_ENTRY_Stream1Decl_start 16
+#define GEN8_SO_DECL_ENTRY_Stream1Decl_start 16
+#define GEN75_SO_DECL_ENTRY_Stream1Decl_start 16
+#define GEN7_SO_DECL_ENTRY_Stream1Decl_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream1Decl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL_ENTRY::Stream 2 Decl */
+
+
+#define GEN10_SO_DECL_ENTRY_Stream2Decl_bits 16
+#define GEN9_SO_DECL_ENTRY_Stream2Decl_bits 16
+#define GEN8_SO_DECL_ENTRY_Stream2Decl_bits 16
+#define GEN75_SO_DECL_ENTRY_Stream2Decl_bits 16
+#define GEN7_SO_DECL_ENTRY_Stream2Decl_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream2Decl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_ENTRY_Stream2Decl_start 32
+#define GEN9_SO_DECL_ENTRY_Stream2Decl_start 32
+#define GEN8_SO_DECL_ENTRY_Stream2Decl_start 32
+#define GEN75_SO_DECL_ENTRY_Stream2Decl_start 32
+#define GEN7_SO_DECL_ENTRY_Stream2Decl_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream2Decl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_DECL_ENTRY::Stream 3 Decl */
+
+
+#define GEN10_SO_DECL_ENTRY_Stream3Decl_bits 16
+#define GEN9_SO_DECL_ENTRY_Stream3Decl_bits 16
+#define GEN8_SO_DECL_ENTRY_Stream3Decl_bits 16
+#define GEN75_SO_DECL_ENTRY_Stream3Decl_bits 16
+#define GEN7_SO_DECL_ENTRY_Stream3Decl_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream3Decl_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_DECL_ENTRY_Stream3Decl_start 48
+#define GEN9_SO_DECL_ENTRY_Stream3Decl_start 48
+#define GEN8_SO_DECL_ENTRY_Stream3Decl_start 48
+#define GEN75_SO_DECL_ENTRY_Stream3Decl_start 48
+#define GEN7_SO_DECL_ENTRY_Stream3Decl_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_DECL_ENTRY_Stream3Decl_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET0 */
+
+
+#define GEN10_SO_WRITE_OFFSET0_length 1
+#define GEN9_SO_WRITE_OFFSET0_length 1
+#define GEN8_SO_WRITE_OFFSET0_length 1
+#define GEN75_SO_WRITE_OFFSET0_length 1
+#define GEN7_SO_WRITE_OFFSET0_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET0_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET0::Write Offset */
+
+
+#define GEN10_SO_WRITE_OFFSET0_WriteOffset_bits 30
+#define GEN9_SO_WRITE_OFFSET0_WriteOffset_bits 30
+#define GEN8_SO_WRITE_OFFSET0_WriteOffset_bits 30
+#define GEN75_SO_WRITE_OFFSET0_WriteOffset_bits 30
+#define GEN7_SO_WRITE_OFFSET0_WriteOffset_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET0_WriteOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_WRITE_OFFSET0_WriteOffset_start 2
+#define GEN9_SO_WRITE_OFFSET0_WriteOffset_start 2
+#define GEN8_SO_WRITE_OFFSET0_WriteOffset_start 2
+#define GEN75_SO_WRITE_OFFSET0_WriteOffset_start 2
+#define GEN7_SO_WRITE_OFFSET0_WriteOffset_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET0_WriteOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET1 */
+
+
+#define GEN10_SO_WRITE_OFFSET1_length 1
+#define GEN9_SO_WRITE_OFFSET1_length 1
+#define GEN8_SO_WRITE_OFFSET1_length 1
+#define GEN75_SO_WRITE_OFFSET1_length 1
+#define GEN7_SO_WRITE_OFFSET1_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET1_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET1::Write Offset */
+
+
+#define GEN10_SO_WRITE_OFFSET1_WriteOffset_bits 30
+#define GEN9_SO_WRITE_OFFSET1_WriteOffset_bits 30
+#define GEN8_SO_WRITE_OFFSET1_WriteOffset_bits 30
+#define GEN75_SO_WRITE_OFFSET1_WriteOffset_bits 30
+#define GEN7_SO_WRITE_OFFSET1_WriteOffset_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET1_WriteOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_WRITE_OFFSET1_WriteOffset_start 2
+#define GEN9_SO_WRITE_OFFSET1_WriteOffset_start 2
+#define GEN8_SO_WRITE_OFFSET1_WriteOffset_start 2
+#define GEN75_SO_WRITE_OFFSET1_WriteOffset_start 2
+#define GEN7_SO_WRITE_OFFSET1_WriteOffset_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET1_WriteOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET2 */
+
+
+#define GEN10_SO_WRITE_OFFSET2_length 1
+#define GEN9_SO_WRITE_OFFSET2_length 1
+#define GEN8_SO_WRITE_OFFSET2_length 1
+#define GEN75_SO_WRITE_OFFSET2_length 1
+#define GEN7_SO_WRITE_OFFSET2_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET2_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET2::Write Offset */
+
+
+#define GEN10_SO_WRITE_OFFSET2_WriteOffset_bits 30
+#define GEN9_SO_WRITE_OFFSET2_WriteOffset_bits 30
+#define GEN8_SO_WRITE_OFFSET2_WriteOffset_bits 30
+#define GEN75_SO_WRITE_OFFSET2_WriteOffset_bits 30
+#define GEN7_SO_WRITE_OFFSET2_WriteOffset_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET2_WriteOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_WRITE_OFFSET2_WriteOffset_start 2
+#define GEN9_SO_WRITE_OFFSET2_WriteOffset_start 2
+#define GEN8_SO_WRITE_OFFSET2_WriteOffset_start 2
+#define GEN75_SO_WRITE_OFFSET2_WriteOffset_start 2
+#define GEN7_SO_WRITE_OFFSET2_WriteOffset_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET2_WriteOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET3 */
+
+
+#define GEN10_SO_WRITE_OFFSET3_length 1
+#define GEN9_SO_WRITE_OFFSET3_length 1
+#define GEN8_SO_WRITE_OFFSET3_length 1
+#define GEN75_SO_WRITE_OFFSET3_length 1
+#define GEN7_SO_WRITE_OFFSET3_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET3_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SO_WRITE_OFFSET3::Write Offset */
+
+
+#define GEN10_SO_WRITE_OFFSET3_WriteOffset_bits 30
+#define GEN9_SO_WRITE_OFFSET3_WriteOffset_bits 30
+#define GEN8_SO_WRITE_OFFSET3_WriteOffset_bits 30
+#define GEN75_SO_WRITE_OFFSET3_WriteOffset_bits 30
+#define GEN7_SO_WRITE_OFFSET3_WriteOffset_bits 30
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET3_WriteOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_SO_WRITE_OFFSET3_WriteOffset_start 2
+#define GEN9_SO_WRITE_OFFSET3_WriteOffset_start 2
+#define GEN8_SO_WRITE_OFFSET3_WriteOffset_start 2
+#define GEN75_SO_WRITE_OFFSET3_WriteOffset_start 2
+#define GEN7_SO_WRITE_OFFSET3_WriteOffset_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SO_WRITE_OFFSET3_WriteOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS */
+
+
+#define GEN10_STATE_BASE_ADDRESS_length 22
+#define GEN9_STATE_BASE_ADDRESS_length 19
+#define GEN8_STATE_BASE_ADDRESS_length 16
+#define GEN75_STATE_BASE_ADDRESS_length 10
+#define GEN7_STATE_BASE_ADDRESS_length 10
+#define GEN6_STATE_BASE_ADDRESS_length 10
+#define GEN5_STATE_BASE_ADDRESS_length 8
+#define GEN45_STATE_BASE_ADDRESS_length 6
+#define GEN4_STATE_BASE_ADDRESS_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 19;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::3D Command Opcode */
+
+
+#define GEN10_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN9_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN8_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN75_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN7_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN6_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN5_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN45_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN4_STATE_BASE_ADDRESS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN9_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN8_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN75_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN7_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN6_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN5_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN45_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN4_STATE_BASE_ADDRESS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::3D Command Sub Opcode */
+
+
+#define GEN10_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN9_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN8_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN75_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN7_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN6_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN5_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN45_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN4_STATE_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN9_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN8_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN75_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN7_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN6_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN5_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN45_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN4_STATE_BASE_ADDRESS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Sampler State Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_bits 52
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_start 620
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 620;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Sampler State Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_start 608
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 608;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Sampler State Buffer Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_start 684
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 684;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Sampler State Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateMemoryObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSamplerStateMemoryObjectControlState_start 612
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSamplerStateMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 612;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Surface State Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_bits 52
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_start 524
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_start 524
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 524;
+ case 9: return 524;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Surface State Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_start 512
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_start 512
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 512;
+ case 9: return 512;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Surface State Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_start 516
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_start 516
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 516;
+ case 9: return 516;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Bindless Surface State Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateSize_bits 20
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_BindlessSurfaceStateSize_start 588
+#define GEN9_STATE_BASE_ADDRESS_BindlessSurfaceStateSize_start 588
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_BindlessSurfaceStateSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 588;
+ case 9: return 588;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Command SubType */
+
+
+#define GEN10_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN9_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN8_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN75_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN7_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN6_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN5_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN45_STATE_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN4_STATE_BASE_ADDRESS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN9_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN8_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN75_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN7_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN6_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN5_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN45_STATE_BASE_ADDRESS_CommandSubType_start 27
+#define GEN4_STATE_BASE_ADDRESS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Command Type */
+
+
+#define GEN10_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN9_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN8_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN75_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN7_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN6_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN5_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN45_STATE_BASE_ADDRESS_CommandType_bits 3
+#define GEN4_STATE_BASE_ADDRESS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN9_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN8_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN75_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN7_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN6_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN5_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN45_STATE_BASE_ADDRESS_CommandType_start 29
+#define GEN4_STATE_BASE_ADDRESS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::DWord Length */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN9_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN8_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN75_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN7_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN6_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN5_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN45_STATE_BASE_ADDRESS_DWordLength_bits 8
+#define GEN4_STATE_BASE_ADDRESS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN9_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN8_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN75_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN7_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN6_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN5_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN45_STATE_BASE_ADDRESS_DWordLength_start 0
+#define GEN4_STATE_BASE_ADDRESS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Access Upper Bound */
+
+
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_bits 20
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_bits 20
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_start 236
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_start 236
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_start 236
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateAccessUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 236;
+ } else {
+ return 236;
+ }
+ case 6: return 236;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Access Upper Bound Modify Enable */
+
+
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_start 224
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_start 224
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 224;
+ } else {
+ return 224;
+ }
+ case 6: return 224;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 52
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 52
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 20
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 20
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 204
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 204
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 204
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 108
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 108
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateBaseAddress_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 204;
+ case 9: return 204;
+ case 8: return 204;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 108;
+ } else {
+ return 108;
+ }
+ case 6: return 108;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 192
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 192
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 192
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 96
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 96
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 192;
+ case 9: return 192;
+ case 8: return 192;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Buffer Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBufferSize_bits 20
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBufferSize_bits 20
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBufferSize_start 428
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBufferSize_start 428
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBufferSize_start 428
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 428;
+ case 9: return 428;
+ case 8: return 428;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Buffer Size Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_start 416
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_start 416
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_start 416
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 416;
+ case 9: return 416;
+ case 8: return 416;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateMOCS_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 104;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Dynamic State Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 196
+#define GEN9_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 196
+#define GEN8_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 196
+#define GEN75_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 104
+#define GEN7_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 104
+#define GEN6_STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start 104
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_DynamicStateMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 196;
+ case 9: return 196;
+ case 8: return 196;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 104;
+ } else {
+ return 104;
+ }
+ case 6: return 104;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Access Upper Bound */
+
+
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 204
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 204
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 204
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 172
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 140
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateAccessUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 204;
+ } else {
+ return 204;
+ }
+ case 6: return 204;
+ case 5: return 172;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 140;
+ } else {
+ return 140;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Access Upper Bound Modify Enable */
+
+
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 192
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 192
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 192
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 160
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 128
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 192;
+ } else {
+ return 192;
+ }
+ case 6: return 192;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 52
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 52
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 44;
+ case 9: return 44;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 44;
+ case 5: return 44;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 44;
+ } else {
+ return 44;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN5_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN45_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+#define GEN4_STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Buffer Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBufferSize_bits 20
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBufferSize_bits 20
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBufferSize_start 396
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBufferSize_start 396
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBufferSize_start 396
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 396;
+ case 9: return 396;
+ case 8: return 396;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Buffer Size Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_start 384
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_start 384
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_start 384
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 384;
+ case 9: return 384;
+ case 8: return 384;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateMOCS_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::General State Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 36
+#define GEN9_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 36
+#define GEN8_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 36
+#define GEN75_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 40
+#define GEN7_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 40
+#define GEN6_STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_GeneralStateMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 40;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Access Upper Bound */
+
+
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits 20
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits 20
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits 20
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits 20
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start 268
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start 268
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start 268
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start 204
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectAccessUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 268;
+ } else {
+ return 268;
+ }
+ case 6: return 268;
+ case 5: return 204;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 172;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Access Upper Bound Modify Enable */
+
+
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits 1
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start 256
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start 256
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start 256
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start 192
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 256;
+ } else {
+ return 256;
+ }
+ case 6: return 256;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 52
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 52
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+#define GEN4_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 268
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 268
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 268
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 140
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 140
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 140
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 108
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 108
+#define GEN4_STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start 108
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 268;
+ case 9: return 268;
+ case 8: return 268;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 140;
+ } else {
+ return 140;
+ }
+ case 6: return 140;
+ case 5: return 108;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 108;
+ } else {
+ return 108;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+#define GEN4_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 256
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 256
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 256
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 128
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 128
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 128
+#define GEN5_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 96
+#define GEN45_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 96
+#define GEN4_STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 256;
+ case 9: return 256;
+ case 8: return 256;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 128;
+ } else {
+ return 128;
+ }
+ case 6: return 128;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Buffer Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBufferSize_bits 20
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBufferSize_bits 20
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBufferSize_start 460
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBufferSize_start 460
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBufferSize_start 460
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 460;
+ case 9: return 460;
+ case 8: return 460;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Buffer Size Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_start 448
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_start 448
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_start 448
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectBufferSizeModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 448;
+ case 9: return 448;
+ case 8: return 448;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectMOCS_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 136;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Indirect Object Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 260
+#define GEN9_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 260
+#define GEN8_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 260
+#define GEN75_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 136
+#define GEN7_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 136
+#define GEN6_STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start 136
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_IndirectObjectMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 260;
+ case 9: return 260;
+ case 8: return 260;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 136;
+ } else {
+ return 136;
+ }
+ case 6: return 136;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Access Upper Bound */
+
+
+#define GEN75_STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits 20
+#define GEN7_STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits 20
+#define GEN6_STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits 20
+#define GEN5_STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits 20
+#define GEN4_STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionAccessUpperBound_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_InstructionAccessUpperBound_start 300
+#define GEN7_STATE_BASE_ADDRESS_InstructionAccessUpperBound_start 300
+#define GEN6_STATE_BASE_ADDRESS_InstructionAccessUpperBound_start 300
+#define GEN5_STATE_BASE_ADDRESS_InstructionAccessUpperBound_start 236
+#define GEN4_STATE_BASE_ADDRESS_InstructionAccessUpperBound_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionAccessUpperBound_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 300;
+ } else {
+ return 300;
+ }
+ case 6: return 300;
+ case 5: return 236;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 172;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Access Upper Bound Modify Enable */
+
+
+#define GEN75_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits 1
+#define GEN4_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start 288
+#define GEN7_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start 288
+#define GEN6_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start 288
+#define GEN5_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start 224
+#define GEN4_STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionAccessUpperBoundModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 288;
+ } else {
+ return 288;
+ }
+ case 6: return 288;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 52
+#define GEN8_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 52
+#define GEN75_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 20
+#define GEN7_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 20
+#define GEN6_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 20
+#define GEN5_STATE_BASE_ADDRESS_InstructionBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBaseAddress_start 332
+#define GEN9_STATE_BASE_ADDRESS_InstructionBaseAddress_start 332
+#define GEN8_STATE_BASE_ADDRESS_InstructionBaseAddress_start 332
+#define GEN75_STATE_BASE_ADDRESS_InstructionBaseAddress_start 172
+#define GEN7_STATE_BASE_ADDRESS_InstructionBaseAddress_start 172
+#define GEN6_STATE_BASE_ADDRESS_InstructionBaseAddress_start 172
+#define GEN5_STATE_BASE_ADDRESS_InstructionBaseAddress_start 140
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 332;
+ case 9: return 332;
+ case 8: return 332;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 172;
+ } else {
+ return 172;
+ }
+ case 6: return 172;
+ case 5: return 140;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN75_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 320
+#define GEN9_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 320
+#define GEN8_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 320
+#define GEN75_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 160
+#define GEN7_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 160
+#define GEN6_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 160
+#define GEN5_STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 320;
+ case 9: return 320;
+ case 8: return 320;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 160;
+ } else {
+ return 160;
+ }
+ case 6: return 160;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Buffer Size */
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBufferSize_bits 20
+#define GEN9_STATE_BASE_ADDRESS_InstructionBufferSize_bits 20
+#define GEN8_STATE_BASE_ADDRESS_InstructionBufferSize_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBufferSize_start 492
+#define GEN9_STATE_BASE_ADDRESS_InstructionBufferSize_start 492
+#define GEN8_STATE_BASE_ADDRESS_InstructionBufferSize_start 492
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 492;
+ case 9: return 492;
+ case 8: return 492;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Buffer size Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_start 480
+#define GEN9_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_start 480
+#define GEN8_STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_start 480
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionBuffersizeModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 480;
+ case 9: return 480;
+ case 8: return 480;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_InstructionMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_InstructionMOCS_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 168;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Instruction Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 324
+#define GEN9_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 324
+#define GEN8_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 324
+#define GEN75_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 168
+#define GEN7_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 168
+#define GEN6_STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_InstructionMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 324;
+ case 9: return 324;
+ case 8: return 324;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 168;
+ } else {
+ return 168;
+ }
+ case 6: return 168;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Stateless Data Port Access Force Write Thru */
+
+
+#define GEN7_STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_bits 1
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN7_STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_start 35
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_start 35
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessForceWriteThru_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 35;
+ }
+ case 6: return 35;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Stateless Data Port Access MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 36;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Stateless Data Port Access Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 112
+#define GEN9_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 112
+#define GEN8_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 112
+#define GEN75_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 36
+#define GEN7_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 36
+#define GEN6_STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_StatelessDataPortAccessMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 112;
+ case 9: return 112;
+ case 8: return 112;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 36;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Surface State Base Address */
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 52
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 52
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 52
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+#define GEN5_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+#define GEN45_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+#define GEN4_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 140
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 140
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 140
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+#define GEN5_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+#define GEN45_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+#define GEN4_STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start 76
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 140;
+ case 9: return 140;
+ case 8: return 140;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 76;
+ } else {
+ return 76;
+ }
+ case 6: return 76;
+ case 5: return 76;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 76;
+ } else {
+ return 76;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Surface State Base Address Modify Enable */
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN5_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN45_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+#define GEN4_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 128
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 128
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 128
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+#define GEN5_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+#define GEN45_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+#define GEN4_STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateBaseAddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 128;
+ case 9: return 128;
+ case 8: return 128;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Surface State MOCS */
+
+
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateMOCS_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_BASE_ADDRESS::Surface State Memory Object Control State */
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 7
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 7
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 7
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 4
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 4
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 132
+#define GEN9_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 132
+#define GEN8_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 132
+#define GEN75_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 72
+#define GEN7_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 72
+#define GEN6_STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start 72
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_BASE_ADDRESS_SurfaceStateMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 132;
+ case 9: return 132;
+ case 8: return 132;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 72;
+ } else {
+ return 72;
+ }
+ case 6: return 72;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH */
+
+
+#define GEN9_STATE_PREFETCH_length 2
+#define GEN8_STATE_PREFETCH_length 2
+#define GEN75_STATE_PREFETCH_length 2
+#define GEN7_STATE_PREFETCH_length 2
+#define GEN6_STATE_PREFETCH_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::3D Command Opcode */
+
+
+#define GEN9_STATE_PREFETCH_3DCommandOpcode_bits 3
+#define GEN8_STATE_PREFETCH_3DCommandOpcode_bits 3
+#define GEN75_STATE_PREFETCH_3DCommandOpcode_bits 3
+#define GEN7_STATE_PREFETCH_3DCommandOpcode_bits 3
+#define GEN6_STATE_PREFETCH_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_3DCommandOpcode_start 24
+#define GEN8_STATE_PREFETCH_3DCommandOpcode_start 24
+#define GEN75_STATE_PREFETCH_3DCommandOpcode_start 24
+#define GEN7_STATE_PREFETCH_3DCommandOpcode_start 24
+#define GEN6_STATE_PREFETCH_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::3D Command Sub Opcode */
+
+
+#define GEN9_STATE_PREFETCH_3DCommandSubOpcode_bits 8
+#define GEN8_STATE_PREFETCH_3DCommandSubOpcode_bits 8
+#define GEN75_STATE_PREFETCH_3DCommandSubOpcode_bits 8
+#define GEN7_STATE_PREFETCH_3DCommandSubOpcode_bits 8
+#define GEN6_STATE_PREFETCH_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_3DCommandSubOpcode_start 16
+#define GEN8_STATE_PREFETCH_3DCommandSubOpcode_start 16
+#define GEN75_STATE_PREFETCH_3DCommandSubOpcode_start 16
+#define GEN7_STATE_PREFETCH_3DCommandSubOpcode_start 16
+#define GEN6_STATE_PREFETCH_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::Command SubType */
+
+
+#define GEN9_STATE_PREFETCH_CommandSubType_bits 2
+#define GEN8_STATE_PREFETCH_CommandSubType_bits 2
+#define GEN75_STATE_PREFETCH_CommandSubType_bits 2
+#define GEN7_STATE_PREFETCH_CommandSubType_bits 2
+#define GEN6_STATE_PREFETCH_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_CommandSubType_start 27
+#define GEN8_STATE_PREFETCH_CommandSubType_start 27
+#define GEN75_STATE_PREFETCH_CommandSubType_start 27
+#define GEN7_STATE_PREFETCH_CommandSubType_start 27
+#define GEN6_STATE_PREFETCH_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::Command Type */
+
+
+#define GEN9_STATE_PREFETCH_CommandType_bits 3
+#define GEN8_STATE_PREFETCH_CommandType_bits 3
+#define GEN75_STATE_PREFETCH_CommandType_bits 3
+#define GEN7_STATE_PREFETCH_CommandType_bits 3
+#define GEN6_STATE_PREFETCH_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_CommandType_start 29
+#define GEN8_STATE_PREFETCH_CommandType_start 29
+#define GEN75_STATE_PREFETCH_CommandType_start 29
+#define GEN7_STATE_PREFETCH_CommandType_start 29
+#define GEN6_STATE_PREFETCH_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::DWord Length */
+
+
+#define GEN9_STATE_PREFETCH_DWordLength_bits 8
+#define GEN8_STATE_PREFETCH_DWordLength_bits 8
+#define GEN75_STATE_PREFETCH_DWordLength_bits 8
+#define GEN7_STATE_PREFETCH_DWordLength_bits 8
+#define GEN6_STATE_PREFETCH_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_DWordLength_start 0
+#define GEN8_STATE_PREFETCH_DWordLength_start 0
+#define GEN75_STATE_PREFETCH_DWordLength_start 0
+#define GEN7_STATE_PREFETCH_DWordLength_start 0
+#define GEN6_STATE_PREFETCH_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::Prefetch Count */
+
+
+#define GEN9_STATE_PREFETCH_PrefetchCount_bits 3
+#define GEN8_STATE_PREFETCH_PrefetchCount_bits 3
+#define GEN75_STATE_PREFETCH_PrefetchCount_bits 3
+#define GEN7_STATE_PREFETCH_PrefetchCount_bits 3
+#define GEN6_STATE_PREFETCH_PrefetchCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_PrefetchCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_PrefetchCount_start 32
+#define GEN8_STATE_PREFETCH_PrefetchCount_start 32
+#define GEN75_STATE_PREFETCH_PrefetchCount_start 32
+#define GEN7_STATE_PREFETCH_PrefetchCount_start 32
+#define GEN6_STATE_PREFETCH_PrefetchCount_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_PrefetchCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_PREFETCH::Prefetch Pointer */
+
+
+#define GEN9_STATE_PREFETCH_PrefetchPointer_bits 26
+#define GEN8_STATE_PREFETCH_PrefetchPointer_bits 26
+#define GEN75_STATE_PREFETCH_PrefetchPointer_bits 26
+#define GEN7_STATE_PREFETCH_PrefetchPointer_bits 26
+#define GEN6_STATE_PREFETCH_PrefetchPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_PrefetchPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_STATE_PREFETCH_PrefetchPointer_start 38
+#define GEN8_STATE_PREFETCH_PrefetchPointer_start 38
+#define GEN75_STATE_PREFETCH_PrefetchPointer_start 38
+#define GEN7_STATE_PREFETCH_PrefetchPointer_start 38
+#define GEN6_STATE_PREFETCH_PrefetchPointer_start 38
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_PREFETCH_PrefetchPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 38;
+ case 8: return 38;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 38;
+ } else {
+ return 38;
+ }
+ case 6: return 38;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP */
+
+
+#define GEN10_STATE_SIP_length 3
+#define GEN9_STATE_SIP_length 3
+#define GEN8_STATE_SIP_length 3
+#define GEN75_STATE_SIP_length 2
+#define GEN7_STATE_SIP_length 2
+#define GEN6_STATE_SIP_length 2
+#define GEN5_STATE_SIP_length 2
+#define GEN45_STATE_SIP_length 2
+#define GEN4_STATE_SIP_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::3D Command Opcode */
+
+
+#define GEN10_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN9_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN8_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN75_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN7_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN6_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN5_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN45_STATE_SIP_3DCommandOpcode_bits 3
+#define GEN4_STATE_SIP_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_3DCommandOpcode_start 24
+#define GEN9_STATE_SIP_3DCommandOpcode_start 24
+#define GEN8_STATE_SIP_3DCommandOpcode_start 24
+#define GEN75_STATE_SIP_3DCommandOpcode_start 24
+#define GEN7_STATE_SIP_3DCommandOpcode_start 24
+#define GEN6_STATE_SIP_3DCommandOpcode_start 24
+#define GEN5_STATE_SIP_3DCommandOpcode_start 24
+#define GEN45_STATE_SIP_3DCommandOpcode_start 24
+#define GEN4_STATE_SIP_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::3D Command Sub Opcode */
+
+
+#define GEN10_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN9_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN8_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN75_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN7_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN6_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN5_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN45_STATE_SIP_3DCommandSubOpcode_bits 8
+#define GEN4_STATE_SIP_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN9_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN8_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN75_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN7_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN6_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN5_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN45_STATE_SIP_3DCommandSubOpcode_start 16
+#define GEN4_STATE_SIP_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::Command SubType */
+
+
+#define GEN10_STATE_SIP_CommandSubType_bits 2
+#define GEN9_STATE_SIP_CommandSubType_bits 2
+#define GEN8_STATE_SIP_CommandSubType_bits 2
+#define GEN75_STATE_SIP_CommandSubType_bits 2
+#define GEN7_STATE_SIP_CommandSubType_bits 2
+#define GEN6_STATE_SIP_CommandSubType_bits 2
+#define GEN5_STATE_SIP_CommandSubType_bits 2
+#define GEN45_STATE_SIP_CommandSubType_bits 2
+#define GEN4_STATE_SIP_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_CommandSubType_start 27
+#define GEN9_STATE_SIP_CommandSubType_start 27
+#define GEN8_STATE_SIP_CommandSubType_start 27
+#define GEN75_STATE_SIP_CommandSubType_start 27
+#define GEN7_STATE_SIP_CommandSubType_start 27
+#define GEN6_STATE_SIP_CommandSubType_start 27
+#define GEN5_STATE_SIP_CommandSubType_start 27
+#define GEN45_STATE_SIP_CommandSubType_start 27
+#define GEN4_STATE_SIP_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::Command Type */
+
+
+#define GEN10_STATE_SIP_CommandType_bits 3
+#define GEN9_STATE_SIP_CommandType_bits 3
+#define GEN8_STATE_SIP_CommandType_bits 3
+#define GEN75_STATE_SIP_CommandType_bits 3
+#define GEN7_STATE_SIP_CommandType_bits 3
+#define GEN6_STATE_SIP_CommandType_bits 3
+#define GEN5_STATE_SIP_CommandType_bits 3
+#define GEN45_STATE_SIP_CommandType_bits 3
+#define GEN4_STATE_SIP_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_CommandType_start 29
+#define GEN9_STATE_SIP_CommandType_start 29
+#define GEN8_STATE_SIP_CommandType_start 29
+#define GEN75_STATE_SIP_CommandType_start 29
+#define GEN7_STATE_SIP_CommandType_start 29
+#define GEN6_STATE_SIP_CommandType_start 29
+#define GEN5_STATE_SIP_CommandType_start 29
+#define GEN45_STATE_SIP_CommandType_start 29
+#define GEN4_STATE_SIP_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 29;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::DWord Length */
+
+
+#define GEN10_STATE_SIP_DWordLength_bits 8
+#define GEN9_STATE_SIP_DWordLength_bits 8
+#define GEN8_STATE_SIP_DWordLength_bits 8
+#define GEN75_STATE_SIP_DWordLength_bits 8
+#define GEN7_STATE_SIP_DWordLength_bits 8
+#define GEN6_STATE_SIP_DWordLength_bits 8
+#define GEN5_STATE_SIP_DWordLength_bits 8
+#define GEN45_STATE_SIP_DWordLength_bits 8
+#define GEN4_STATE_SIP_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_DWordLength_start 0
+#define GEN9_STATE_SIP_DWordLength_start 0
+#define GEN8_STATE_SIP_DWordLength_start 0
+#define GEN75_STATE_SIP_DWordLength_start 0
+#define GEN7_STATE_SIP_DWordLength_start 0
+#define GEN6_STATE_SIP_DWordLength_start 0
+#define GEN5_STATE_SIP_DWordLength_start 0
+#define GEN45_STATE_SIP_DWordLength_start 0
+#define GEN4_STATE_SIP_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* STATE_SIP::System Instruction Pointer */
+
+
+#define GEN10_STATE_SIP_SystemInstructionPointer_bits 60
+#define GEN9_STATE_SIP_SystemInstructionPointer_bits 60
+#define GEN8_STATE_SIP_SystemInstructionPointer_bits 60
+#define GEN75_STATE_SIP_SystemInstructionPointer_bits 28
+#define GEN7_STATE_SIP_SystemInstructionPointer_bits 28
+#define GEN6_STATE_SIP_SystemInstructionPointer_bits 28
+#define GEN5_STATE_SIP_SystemInstructionPointer_bits 28
+#define GEN45_STATE_SIP_SystemInstructionPointer_bits 28
+#define GEN4_STATE_SIP_SystemInstructionPointer_bits 28
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_SystemInstructionPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 28;
+ } else {
+ return 28;
+ }
+ case 6: return 28;
+ case 5: return 28;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 28;
+ } else {
+ return 28;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN9_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN8_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN75_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN7_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN6_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN5_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN45_STATE_SIP_SystemInstructionPointer_start 36
+#define GEN4_STATE_SIP_SystemInstructionPointer_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+STATE_SIP_SystemInstructionPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 36;
+ case 9: return 36;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 36;
+ } else {
+ return 36;
+ }
+ case 6: return 36;
+ case 5: return 36;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 36;
+ } else {
+ return 36;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_length 2
+#define GEN75_SWTESS_BASE_ADDRESS_length 2
+#define GEN7_SWTESS_BASE_ADDRESS_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::3D Command Opcode */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN75_SWTESS_BASE_ADDRESS_3DCommandOpcode_bits 3
+#define GEN7_SWTESS_BASE_ADDRESS_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN75_SWTESS_BASE_ADDRESS_3DCommandOpcode_start 24
+#define GEN7_SWTESS_BASE_ADDRESS_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::3D Command Sub Opcode */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN75_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+#define GEN7_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN75_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_start 16
+#define GEN7_SWTESS_BASE_ADDRESS_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::Command SubType */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN75_SWTESS_BASE_ADDRESS_CommandSubType_bits 2
+#define GEN7_SWTESS_BASE_ADDRESS_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_CommandSubType_start 27
+#define GEN75_SWTESS_BASE_ADDRESS_CommandSubType_start 27
+#define GEN7_SWTESS_BASE_ADDRESS_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::Command Type */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_CommandType_bits 3
+#define GEN75_SWTESS_BASE_ADDRESS_CommandType_bits 3
+#define GEN7_SWTESS_BASE_ADDRESS_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_CommandType_start 29
+#define GEN75_SWTESS_BASE_ADDRESS_CommandType_start 29
+#define GEN7_SWTESS_BASE_ADDRESS_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 29;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::DWord Length */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_DWordLength_bits 8
+#define GEN75_SWTESS_BASE_ADDRESS_DWordLength_bits 8
+#define GEN7_SWTESS_BASE_ADDRESS_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_DWordLength_start 0
+#define GEN75_SWTESS_BASE_ADDRESS_DWordLength_start 0
+#define GEN7_SWTESS_BASE_ADDRESS_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::SW Tessellation Base Address */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_bits 36
+#define GEN75_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_bits 20
+#define GEN7_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 36;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_start 44
+#define GEN75_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_start 44
+#define GEN7_SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_start 44
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_SWTessellationBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 44;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 44;
+ } else {
+ return 44;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* SWTESS_BASE_ADDRESS::SW Tessellation Memory Object Control State */
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_bits 4
+#define GEN75_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_bits 4
+#define GEN7_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN8_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_start 40
+#define GEN75_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_start 40
+#define GEN7_SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+SWTESS_BASE_ADDRESS_SWTessellationMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 40;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 40;
+ } else {
+ return 40;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE */
+
+
+#define GEN5_URB_FENCE_length 3
+#define GEN45_URB_FENCE_length 3
+#define GEN4_URB_FENCE_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::3D Command Opcode */
+
+
+#define GEN5_URB_FENCE_3DCommandOpcode_bits 3
+#define GEN45_URB_FENCE_3DCommandOpcode_bits 3
+#define GEN4_URB_FENCE_3DCommandOpcode_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_3DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_3DCommandOpcode_start 24
+#define GEN45_URB_FENCE_3DCommandOpcode_start 24
+#define GEN4_URB_FENCE_3DCommandOpcode_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_3DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 24;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 24;
+ } else {
+ return 24;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::3D Command Sub Opcode */
+
+
+#define GEN5_URB_FENCE_3DCommandSubOpcode_bits 8
+#define GEN45_URB_FENCE_3DCommandSubOpcode_bits 8
+#define GEN4_URB_FENCE_3DCommandSubOpcode_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_3DCommandSubOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_3DCommandSubOpcode_start 16
+#define GEN45_URB_FENCE_3DCommandSubOpcode_start 16
+#define GEN4_URB_FENCE_3DCommandSubOpcode_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_3DCommandSubOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::CLIP Fence */
+
+
+#define GEN5_URB_FENCE_CLIPFence_bits 10
+#define GEN45_URB_FENCE_CLIPFence_bits 10
+#define GEN4_URB_FENCE_CLIPFence_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CLIPFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CLIPFence_start 52
+#define GEN45_URB_FENCE_CLIPFence_start 52
+#define GEN4_URB_FENCE_CLIPFence_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CLIPFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 52;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 52;
+ } else {
+ return 52;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::CLIP Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_CLIPUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_CLIPUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_CLIPUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CLIPUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CLIPUnitURBReallocationRequest_start 10
+#define GEN45_URB_FENCE_CLIPUnitURBReallocationRequest_start 10
+#define GEN4_URB_FENCE_CLIPUnitURBReallocationRequest_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CLIPUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::CS Fence */
+
+
+#define GEN5_URB_FENCE_CSFence_bits 11
+#define GEN45_URB_FENCE_CSFence_bits 11
+#define GEN4_URB_FENCE_CSFence_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CSFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CSFence_start 84
+#define GEN45_URB_FENCE_CSFence_start 84
+#define GEN4_URB_FENCE_CSFence_start 84
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CSFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 84;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 84;
+ } else {
+ return 84;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::CS Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_CSUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_CSUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_CSUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CSUnitURBReallocationRequest_start 13
+#define GEN45_URB_FENCE_CSUnitURBReallocationRequest_start 13
+#define GEN4_URB_FENCE_CSUnitURBReallocationRequest_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 13;
+ } else {
+ return 13;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::Command SubType */
+
+
+#define GEN5_URB_FENCE_CommandSubType_bits 2
+#define GEN45_URB_FENCE_CommandSubType_bits 2
+#define GEN4_URB_FENCE_CommandSubType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CommandSubType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CommandSubType_start 27
+#define GEN45_URB_FENCE_CommandSubType_start 27
+#define GEN4_URB_FENCE_CommandSubType_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CommandSubType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::Command Type */
+
+
+#define GEN5_URB_FENCE_CommandType_bits 3
+#define GEN45_URB_FENCE_CommandType_bits 3
+#define GEN4_URB_FENCE_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_CommandType_start 29
+#define GEN45_URB_FENCE_CommandType_start 29
+#define GEN4_URB_FENCE_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::DWord Length */
+
+
+#define GEN5_URB_FENCE_DWordLength_bits 8
+#define GEN45_URB_FENCE_DWordLength_bits 8
+#define GEN4_URB_FENCE_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_DWordLength_start 0
+#define GEN45_URB_FENCE_DWordLength_start 0
+#define GEN4_URB_FENCE_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::GS Fence */
+
+
+#define GEN5_URB_FENCE_GSFence_bits 10
+#define GEN45_URB_FENCE_GSFence_bits 10
+#define GEN4_URB_FENCE_GSFence_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_GSFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_GSFence_start 42
+#define GEN45_URB_FENCE_GSFence_start 42
+#define GEN4_URB_FENCE_GSFence_start 42
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_GSFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 42;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 42;
+ } else {
+ return 42;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::GS Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_GSUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_GSUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_GSUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_GSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_GSUnitURBReallocationRequest_start 9
+#define GEN45_URB_FENCE_GSUnitURBReallocationRequest_start 9
+#define GEN4_URB_FENCE_GSUnitURBReallocationRequest_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_GSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::SF Fence */
+
+
+#define GEN5_URB_FENCE_SFFence_bits 10
+#define GEN45_URB_FENCE_SFFence_bits 10
+#define GEN4_URB_FENCE_SFFence_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_SFFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_SFFence_start 64
+#define GEN45_URB_FENCE_SFFence_start 64
+#define GEN4_URB_FENCE_SFFence_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_SFFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::SF Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_SFUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_SFUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_SFUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_SFUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_SFUnitURBReallocationRequest_start 11
+#define GEN45_URB_FENCE_SFUnitURBReallocationRequest_start 11
+#define GEN4_URB_FENCE_SFUnitURBReallocationRequest_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_SFUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::VFE Fence */
+
+
+#define GEN5_URB_FENCE_VFEFence_bits 10
+#define GEN45_URB_FENCE_VFEFence_bits 10
+#define GEN4_URB_FENCE_VFEFence_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VFEFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_VFEFence_start 74
+#define GEN45_URB_FENCE_VFEFence_start 74
+#define GEN4_URB_FENCE_VFEFence_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VFEFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::VFE Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_VFEUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_VFEUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_VFEUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VFEUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_VFEUnitURBReallocationRequest_start 12
+#define GEN45_URB_FENCE_VFEUnitURBReallocationRequest_start 12
+#define GEN4_URB_FENCE_VFEUnitURBReallocationRequest_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VFEUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 12;
+ } else {
+ return 12;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::VS Fence */
+
+
+#define GEN5_URB_FENCE_VSFence_bits 10
+#define GEN45_URB_FENCE_VSFence_bits 10
+#define GEN4_URB_FENCE_VSFence_bits 10
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VSFence_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 10;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 10;
+ } else {
+ return 10;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_VSFence_start 32
+#define GEN45_URB_FENCE_VSFence_start 32
+#define GEN4_URB_FENCE_VSFence_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VSFence_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* URB_FENCE::VS Unit URB Reallocation Request */
+
+
+#define GEN5_URB_FENCE_VSUnitURBReallocationRequest_bits 1
+#define GEN45_URB_FENCE_VSUnitURBReallocationRequest_bits 1
+#define GEN4_URB_FENCE_VSUnitURBReallocationRequest_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VSUnitURBReallocationRequest_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_URB_FENCE_VSUnitURBReallocationRequest_start 8
+#define GEN45_URB_FENCE_VSUnitURBReallocationRequest_start 8
+#define GEN4_URB_FENCE_VSUnitURBReallocationRequest_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+URB_FENCE_VSUnitURBReallocationRequest_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_length 1
+#define GEN8_VCS2_RING_BUFFER_CTL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::Automatic Report Head Pointer */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN8_VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN8_VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::Buffer Length (in pages - 1) */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN8_VCS2_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN8_VCS2_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::Disable Register Accesses */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN8_VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN8_VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::RBWait */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN8_VCS2_RING_BUFFER_CTL_RBWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_RBWait_start 11
+#define GEN8_VCS2_RING_BUFFER_CTL_RBWait_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::Ring Buffer Enable */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN8_VCS2_RING_BUFFER_CTL_RingBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN8_VCS2_RING_BUFFER_CTL_RingBufferEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS2_RING_BUFFER_CTL::Semaphore Wait */
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN8_VCS2_RING_BUFFER_CTL_SemaphoreWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS2_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN8_VCS2_RING_BUFFER_CTL_SemaphoreWait_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS2_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_ACTHD_UDW */
+
+
+#define GEN9_VCS_ACTHD_UDW_length 1
+#define GEN8_VCS_ACTHD_UDW_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_ACTHD_UDW::Head Pointer Upper DWORD */
+
+
+#define GEN9_VCS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+#define GEN8_VCS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+#define GEN8_VCS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG */
+
+
+#define GEN75_VCS_FAULT_REG_length 1
+#define GEN7_VCS_FAULT_REG_length 1
+#define GEN6_VCS_FAULT_REG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG::Fault Type */
+
+
+#define GEN75_VCS_FAULT_REG_FaultType_bits 2
+#define GEN7_VCS_FAULT_REG_FaultType_bits 2
+#define GEN6_VCS_FAULT_REG_FaultType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VCS_FAULT_REG_FaultType_start 1
+#define GEN7_VCS_FAULT_REG_FaultType_start 1
+#define GEN6_VCS_FAULT_REG_FaultType_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG::GTTSEL */
+
+
+#define GEN75_VCS_FAULT_REG_GTTSEL_bits -9
+#define GEN7_VCS_FAULT_REG_GTTSEL_bits -9
+#define GEN6_VCS_FAULT_REG_GTTSEL_bits -9
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return -9;
+ } else {
+ return -9;
+ }
+ case 6: return -9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VCS_FAULT_REG_GTTSEL_start 11
+#define GEN7_VCS_FAULT_REG_GTTSEL_start 11
+#define GEN6_VCS_FAULT_REG_GTTSEL_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG::SRCID of Fault */
+
+
+#define GEN75_VCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN7_VCS_FAULT_REG_SRCIDofFault_bits 8
+#define GEN6_VCS_FAULT_REG_SRCIDofFault_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN7_VCS_FAULT_REG_SRCIDofFault_start 3
+#define GEN6_VCS_FAULT_REG_SRCIDofFault_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG::Valid Bit */
+
+
+#define GEN75_VCS_FAULT_REG_ValidBit_bits 1
+#define GEN7_VCS_FAULT_REG_ValidBit_bits 1
+#define GEN6_VCS_FAULT_REG_ValidBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VCS_FAULT_REG_ValidBit_start 0
+#define GEN7_VCS_FAULT_REG_ValidBit_start 0
+#define GEN6_VCS_FAULT_REG_ValidBit_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_FAULT_REG::Virtual Address of Fault */
+
+
+#define GEN75_VCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN7_VCS_FAULT_REG_VirtualAddressofFault_bits 20
+#define GEN6_VCS_FAULT_REG_VirtualAddressofFault_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN7_VCS_FAULT_REG_VirtualAddressofFault_start 12
+#define GEN6_VCS_FAULT_REG_VirtualAddressofFault_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE */
+
+
+#define GEN10_VCS_INSTDONE_length 1
+#define GEN9_VCS_INSTDONE_length 1
+#define GEN8_VCS_INSTDONE_length 1
+#define GEN75_VCS_INSTDONE_length 1
+#define GEN7_VCS_INSTDONE_length 1
+#define GEN6_VCS_INSTDONE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::BSP Done */
+
+
+#define GEN10_VCS_INSTDONE_BSPDone_bits 1
+#define GEN9_VCS_INSTDONE_BSPDone_bits 1
+#define GEN8_VCS_INSTDONE_BSPDone_bits 1
+#define GEN75_VCS_INSTDONE_BSPDone_bits 1
+#define GEN7_VCS_INSTDONE_BSPDone_bits 1
+#define GEN6_VCS_INSTDONE_BSPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_BSPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_BSPDone_start 6
+#define GEN9_VCS_INSTDONE_BSPDone_start 6
+#define GEN8_VCS_INSTDONE_BSPDone_start 6
+#define GEN75_VCS_INSTDONE_BSPDone_start 6
+#define GEN7_VCS_INSTDONE_BSPDone_start 6
+#define GEN6_VCS_INSTDONE_BSPDone_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_BSPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::GAC Done */
+
+
+#define GEN10_VCS_INSTDONE_GACDone_bits 1
+#define GEN9_VCS_INSTDONE_GACDone_bits 1
+#define GEN8_VCS_INSTDONE_GACDone_bits 1
+#define GEN75_VCS_INSTDONE_GACDone_bits 1
+#define GEN7_VCS_INSTDONE_GACDone_bits 1
+#define GEN6_VCS_INSTDONE_GACDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_GACDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_GACDone_start 31
+#define GEN9_VCS_INSTDONE_GACDone_start 31
+#define GEN8_VCS_INSTDONE_GACDone_start 31
+#define GEN75_VCS_INSTDONE_GACDone_start 31
+#define GEN7_VCS_INSTDONE_GACDone_start 31
+#define GEN6_VCS_INSTDONE_GACDone_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_GACDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 31;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 31;
+ } else {
+ return 31;
+ }
+ case 6: return 31;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::JPG Done */
+
+
+#define GEN10_VCS_INSTDONE_JPGDone_bits 1
+#define GEN9_VCS_INSTDONE_JPGDone_bits 1
+#define GEN8_VCS_INSTDONE_JPGDone_bits 1
+#define GEN75_VCS_INSTDONE_JPGDone_bits 1
+#define GEN7_VCS_INSTDONE_JPGDone_bits 1
+#define GEN6_VCS_INSTDONE_JPGDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_JPGDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_JPGDone_start 21
+#define GEN9_VCS_INSTDONE_JPGDone_start 21
+#define GEN8_VCS_INSTDONE_JPGDone_start 21
+#define GEN75_VCS_INSTDONE_JPGDone_start 21
+#define GEN7_VCS_INSTDONE_JPGDone_start 21
+#define GEN6_VCS_INSTDONE_JPGDone_start 21
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_JPGDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 21;
+ case 9: return 21;
+ case 8: return 21;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 21;
+ } else {
+ return 21;
+ }
+ case 6: return 21;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::MPC Done */
+
+
+#define GEN10_VCS_INSTDONE_MPCDone_bits 1
+#define GEN9_VCS_INSTDONE_MPCDone_bits 1
+#define GEN8_VCS_INSTDONE_MPCDone_bits 1
+#define GEN75_VCS_INSTDONE_MPCDone_bits 1
+#define GEN7_VCS_INSTDONE_MPCDone_bits 1
+#define GEN6_VCS_INSTDONE_MPCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_MPCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_MPCDone_start 4
+#define GEN9_VCS_INSTDONE_MPCDone_start 4
+#define GEN8_VCS_INSTDONE_MPCDone_start 4
+#define GEN75_VCS_INSTDONE_MPCDone_start 4
+#define GEN7_VCS_INSTDONE_MPCDone_start 4
+#define GEN6_VCS_INSTDONE_MPCDone_start 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_MPCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::QRC Done */
+
+
+#define GEN10_VCS_INSTDONE_QRCDone_bits 1
+#define GEN9_VCS_INSTDONE_QRCDone_bits 1
+#define GEN8_VCS_INSTDONE_QRCDone_bits 1
+#define GEN75_VCS_INSTDONE_QRCDone_bits 1
+#define GEN7_VCS_INSTDONE_QRCDone_bits 1
+#define GEN6_VCS_INSTDONE_QRCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_QRCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_QRCDone_start 2
+#define GEN9_VCS_INSTDONE_QRCDone_start 2
+#define GEN8_VCS_INSTDONE_QRCDone_start 2
+#define GEN75_VCS_INSTDONE_QRCDone_start 2
+#define GEN7_VCS_INSTDONE_QRCDone_start 2
+#define GEN6_VCS_INSTDONE_QRCDone_start 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_QRCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::Reserved */
+
+
+#define GEN10_VCS_INSTDONE_Reserved_bits 1
+#define GEN9_VCS_INSTDONE_Reserved_bits 1
+#define GEN8_VCS_INSTDONE_Reserved_bits 1
+#define GEN75_VCS_INSTDONE_Reserved_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_Reserved_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_Reserved_start 29
+#define GEN9_VCS_INSTDONE_Reserved_start 29
+#define GEN8_VCS_INSTDONE_Reserved_start 29
+#define GEN75_VCS_INSTDONE_Reserved_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_Reserved_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 29;
+ case 9: return 29;
+ case 8: return 29;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 29;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::Ring Enable */
+
+
+#define GEN10_VCS_INSTDONE_RingEnable_bits 1
+#define GEN9_VCS_INSTDONE_RingEnable_bits 1
+#define GEN8_VCS_INSTDONE_RingEnable_bits 1
+#define GEN75_VCS_INSTDONE_RingEnable_bits 1
+#define GEN7_VCS_INSTDONE_RingEnable_bits 1
+#define GEN6_VCS_INSTDONE_RingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_RingEnable_start 0
+#define GEN9_VCS_INSTDONE_RingEnable_start 0
+#define GEN8_VCS_INSTDONE_RingEnable_start 0
+#define GEN75_VCS_INSTDONE_RingEnable_start 0
+#define GEN7_VCS_INSTDONE_RingEnable_start 0
+#define GEN6_VCS_INSTDONE_RingEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::SEC Done */
+
+
+#define GEN10_VCS_INSTDONE_SECDone_bits 1
+#define GEN9_VCS_INSTDONE_SECDone_bits 1
+#define GEN8_VCS_INSTDONE_SECDone_bits 1
+#define GEN75_VCS_INSTDONE_SECDone_bits 1
+#define GEN7_VCS_INSTDONE_SECDone_bits 1
+#define GEN6_VCS_INSTDONE_SECDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_SECDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_SECDone_start 3
+#define GEN9_VCS_INSTDONE_SECDone_start 3
+#define GEN8_VCS_INSTDONE_SECDone_start 3
+#define GEN75_VCS_INSTDONE_SECDone_start 3
+#define GEN7_VCS_INSTDONE_SECDone_start 3
+#define GEN6_VCS_INSTDONE_SECDone_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_SECDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::USB Done */
+
+
+#define GEN10_VCS_INSTDONE_USBDone_bits 1
+#define GEN9_VCS_INSTDONE_USBDone_bits 1
+#define GEN8_VCS_INSTDONE_USBDone_bits 1
+#define GEN75_VCS_INSTDONE_USBDone_bits 1
+#define GEN7_VCS_INSTDONE_USBDone_bits 1
+#define GEN6_VCS_INSTDONE_USBDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_USBDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_USBDone_start 1
+#define GEN9_VCS_INSTDONE_USBDone_start 1
+#define GEN8_VCS_INSTDONE_USBDone_start 1
+#define GEN75_VCS_INSTDONE_USBDone_start 1
+#define GEN7_VCS_INSTDONE_USBDone_start 1
+#define GEN6_VCS_INSTDONE_USBDone_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_USBDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VAC Done */
+
+
+#define GEN10_VCS_INSTDONE_VACDone_bits 1
+#define GEN9_VCS_INSTDONE_VACDone_bits 1
+#define GEN8_VCS_INSTDONE_VACDone_bits 1
+#define GEN75_VCS_INSTDONE_VACDone_bits 1
+#define GEN7_VCS_INSTDONE_VACDone_bits 1
+#define GEN6_VCS_INSTDONE_VACDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VACDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VACDone_start 19
+#define GEN9_VCS_INSTDONE_VACDone_start 19
+#define GEN8_VCS_INSTDONE_VACDone_start 19
+#define GEN75_VCS_INSTDONE_VACDone_start 19
+#define GEN7_VCS_INSTDONE_VACDone_start 19
+#define GEN6_VCS_INSTDONE_VACDone_start 19
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VACDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 19;
+ case 9: return 19;
+ case 8: return 19;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 19;
+ } else {
+ return 19;
+ }
+ case 6: return 19;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VAD Done */
+
+
+#define GEN10_VCS_INSTDONE_VADDone_bits 1
+#define GEN9_VCS_INSTDONE_VADDone_bits 1
+#define GEN8_VCS_INSTDONE_VADDone_bits 1
+#define GEN75_VCS_INSTDONE_VADDone_bits 1
+#define GEN7_VCS_INSTDONE_VADDone_bits 1
+#define GEN6_VCS_INSTDONE_VADDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VADDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VADDone_start 16
+#define GEN9_VCS_INSTDONE_VADDone_start 16
+#define GEN8_VCS_INSTDONE_VADDone_start 16
+#define GEN75_VCS_INSTDONE_VADDone_start 16
+#define GEN7_VCS_INSTDONE_VADDone_start 16
+#define GEN6_VCS_INSTDONE_VADDone_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VADDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VAM Done */
+
+
+#define GEN10_VCS_INSTDONE_VAMDone_bits 1
+#define GEN9_VCS_INSTDONE_VAMDone_bits 1
+#define GEN8_VCS_INSTDONE_VAMDone_bits 1
+#define GEN75_VCS_INSTDONE_VAMDone_bits 1
+#define GEN7_VCS_INSTDONE_VAMDone_bits 1
+#define GEN6_VCS_INSTDONE_VAMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VAMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VAMDone_start 20
+#define GEN9_VCS_INSTDONE_VAMDone_start 20
+#define GEN8_VCS_INSTDONE_VAMDone_start 20
+#define GEN75_VCS_INSTDONE_VAMDone_start 20
+#define GEN7_VCS_INSTDONE_VAMDone_start 20
+#define GEN6_VCS_INSTDONE_VAMDone_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VAMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 20;
+ case 9: return 20;
+ case 8: return 20;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VBP Done */
+
+
+#define GEN10_VCS_INSTDONE_VBPDone_bits 1
+#define GEN9_VCS_INSTDONE_VBPDone_bits 1
+#define GEN8_VCS_INSTDONE_VBPDone_bits 1
+#define GEN75_VCS_INSTDONE_VBPDone_bits 1
+#define GEN7_VCS_INSTDONE_VBPDone_bits 1
+#define GEN6_VCS_INSTDONE_VBPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VBPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VBPDone_start 22
+#define GEN9_VCS_INSTDONE_VBPDone_start 22
+#define GEN8_VCS_INSTDONE_VBPDone_start 22
+#define GEN75_VCS_INSTDONE_VBPDone_start 22
+#define GEN7_VCS_INSTDONE_VBPDone_start 22
+#define GEN6_VCS_INSTDONE_VBPDone_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VBPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 22;
+ case 9: return 22;
+ case 8: return 22;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 22;
+ } else {
+ return 22;
+ }
+ case 6: return 22;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VCD Done */
+
+
+#define GEN10_VCS_INSTDONE_VCDDone_bits 1
+#define GEN9_VCS_INSTDONE_VCDDone_bits 1
+#define GEN8_VCS_INSTDONE_VCDDone_bits 1
+#define GEN75_VCS_INSTDONE_VCDDone_bits 1
+#define GEN7_VCS_INSTDONE_VCDDone_bits 1
+#define GEN6_VCS_INSTDONE_VCDDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCDDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VCDDone_start 15
+#define GEN9_VCS_INSTDONE_VCDDone_start 15
+#define GEN8_VCS_INSTDONE_VCDDone_start 15
+#define GEN75_VCS_INSTDONE_VCDDone_start 15
+#define GEN7_VCS_INSTDONE_VCDDone_start 15
+#define GEN6_VCS_INSTDONE_VCDDone_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCDDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VCI Done */
+
+
+#define GEN10_VCS_INSTDONE_VCIDone_bits 1
+#define GEN9_VCS_INSTDONE_VCIDone_bits 1
+#define GEN8_VCS_INSTDONE_VCIDone_bits 1
+#define GEN75_VCS_INSTDONE_VCIDone_bits 1
+#define GEN7_VCS_INSTDONE_VCIDone_bits 1
+#define GEN6_VCS_INSTDONE_VCIDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCIDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VCIDone_start 24
+#define GEN9_VCS_INSTDONE_VCIDone_start 24
+#define GEN8_VCS_INSTDONE_VCIDone_start 24
+#define GEN75_VCS_INSTDONE_VCIDone_start 24
+#define GEN7_VCS_INSTDONE_VCIDone_start 24
+#define GEN6_VCS_INSTDONE_VCIDone_start 24
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCIDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 24;
+ case 9: return 24;
+ case 8: return 24;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 24;
+ } else {
+ return 24;
+ }
+ case 6: return 24;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VCP Done */
+
+
+#define GEN10_VCS_INSTDONE_VCPDone_bits 1
+#define GEN9_VCS_INSTDONE_VCPDone_bits 1
+#define GEN8_VCS_INSTDONE_VCPDone_bits 1
+#define GEN75_VCS_INSTDONE_VCPDone_bits 1
+#define GEN7_VCS_INSTDONE_VCPDone_bits 1
+#define GEN6_VCS_INSTDONE_VCPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VCPDone_start 14
+#define GEN9_VCS_INSTDONE_VCPDone_start 14
+#define GEN8_VCS_INSTDONE_VCPDone_start 14
+#define GEN75_VCS_INSTDONE_VCPDone_start 14
+#define GEN7_VCS_INSTDONE_VCPDone_start 14
+#define GEN6_VCS_INSTDONE_VCPDone_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 14;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VCR Done */
+
+
+#define GEN10_VCS_INSTDONE_VCRDone_bits 1
+#define GEN9_VCS_INSTDONE_VCRDone_bits 1
+#define GEN8_VCS_INSTDONE_VCRDone_bits 1
+#define GEN75_VCS_INSTDONE_VCRDone_bits 1
+#define GEN7_VCS_INSTDONE_VCRDone_bits 1
+#define GEN6_VCS_INSTDONE_VCRDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCRDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VCRDone_start 25
+#define GEN9_VCS_INSTDONE_VCRDone_start 25
+#define GEN8_VCS_INSTDONE_VCRDone_start 25
+#define GEN75_VCS_INSTDONE_VCRDone_start 25
+#define GEN7_VCS_INSTDONE_VCRDone_start 25
+#define GEN6_VCS_INSTDONE_VCRDone_start 25
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCRDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 25;
+ case 9: return 25;
+ case 8: return 25;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 25;
+ } else {
+ return 25;
+ }
+ case 6: return 25;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VCS Done */
+
+
+#define GEN10_VCS_INSTDONE_VCSDone_bits 1
+#define GEN9_VCS_INSTDONE_VCSDone_bits 1
+#define GEN8_VCS_INSTDONE_VCSDone_bits 1
+#define GEN75_VCS_INSTDONE_VCSDone_bits 1
+#define GEN7_VCS_INSTDONE_VCSDone_bits 1
+#define GEN6_VCS_INSTDONE_VCSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VCSDone_start 30
+#define GEN9_VCS_INSTDONE_VCSDone_start 30
+#define GEN8_VCS_INSTDONE_VCSDone_start 30
+#define GEN75_VCS_INSTDONE_VCSDone_start 30
+#define GEN7_VCS_INSTDONE_VCSDone_start 30
+#define GEN6_VCS_INSTDONE_VCSDone_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VCSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 30;
+ }
+ case 6: return 30;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VDS Done */
+
+
+#define GEN10_VCS_INSTDONE_VDSDone_bits 1
+#define GEN9_VCS_INSTDONE_VDSDone_bits 1
+#define GEN8_VCS_INSTDONE_VDSDone_bits 1
+#define GEN75_VCS_INSTDONE_VDSDone_bits 1
+#define GEN7_VCS_INSTDONE_VDSDone_bits 1
+#define GEN6_VCS_INSTDONE_VDSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VDSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VDSDone_start 12
+#define GEN9_VCS_INSTDONE_VDSDone_start 12
+#define GEN8_VCS_INSTDONE_VDSDone_start 12
+#define GEN75_VCS_INSTDONE_VDSDone_start 12
+#define GEN7_VCS_INSTDONE_VDSDone_start 12
+#define GEN6_VCS_INSTDONE_VDSDone_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VDSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VFT Done */
+
+
+#define GEN10_VCS_INSTDONE_VFTDone_bits 1
+#define GEN9_VCS_INSTDONE_VFTDone_bits 1
+#define GEN8_VCS_INSTDONE_VFTDone_bits 1
+#define GEN75_VCS_INSTDONE_VFTDone_bits 1
+#define GEN7_VCS_INSTDONE_VFTDone_bits 1
+#define GEN6_VCS_INSTDONE_VFTDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VFTDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VFTDone_start 5
+#define GEN9_VCS_INSTDONE_VFTDone_start 5
+#define GEN8_VCS_INSTDONE_VFTDone_start 5
+#define GEN75_VCS_INSTDONE_VFTDone_start 5
+#define GEN7_VCS_INSTDONE_VFTDone_start 5
+#define GEN6_VCS_INSTDONE_VFTDone_start 5
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VFTDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 5;
+ case 9: return 5;
+ case 8: return 5;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 5;
+ } else {
+ return 5;
+ }
+ case 6: return 5;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VHR Done */
+
+
+#define GEN10_VCS_INSTDONE_VHRDone_bits 1
+#define GEN9_VCS_INSTDONE_VHRDone_bits 1
+#define GEN8_VCS_INSTDONE_VHRDone_bits 1
+#define GEN75_VCS_INSTDONE_VHRDone_bits 1
+#define GEN7_VCS_INSTDONE_VHRDone_bits 1
+#define GEN6_VCS_INSTDONE_VHRDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VHRDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VHRDone_start 23
+#define GEN9_VCS_INSTDONE_VHRDone_start 23
+#define GEN8_VCS_INSTDONE_VHRDone_start 23
+#define GEN75_VCS_INSTDONE_VHRDone_start 23
+#define GEN7_VCS_INSTDONE_VHRDone_start 23
+#define GEN6_VCS_INSTDONE_VHRDone_start 23
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VHRDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 23;
+ case 9: return 23;
+ case 8: return 23;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 23;
+ } else {
+ return 23;
+ }
+ case 6: return 23;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VIN Done */
+
+
+#define GEN10_VCS_INSTDONE_VINDone_bits 1
+#define GEN9_VCS_INSTDONE_VINDone_bits 1
+#define GEN8_VCS_INSTDONE_VINDone_bits 1
+#define GEN75_VCS_INSTDONE_VINDone_bits 1
+#define GEN7_VCS_INSTDONE_VINDone_bits 1
+#define GEN6_VCS_INSTDONE_VINDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VINDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VINDone_start 26
+#define GEN9_VCS_INSTDONE_VINDone_start 26
+#define GEN8_VCS_INSTDONE_VINDone_start 26
+#define GEN75_VCS_INSTDONE_VINDone_start 26
+#define GEN7_VCS_INSTDONE_VINDone_start 26
+#define GEN6_VCS_INSTDONE_VINDone_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VINDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VIP Done */
+
+
+#define GEN10_VCS_INSTDONE_VIPDone_bits 1
+#define GEN9_VCS_INSTDONE_VIPDone_bits 1
+#define GEN8_VCS_INSTDONE_VIPDone_bits 1
+#define GEN75_VCS_INSTDONE_VIPDone_bits 1
+#define GEN7_VCS_INSTDONE_VIPDone_bits 1
+#define GEN6_VCS_INSTDONE_VIPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VIPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VIPDone_start 10
+#define GEN9_VCS_INSTDONE_VIPDone_start 10
+#define GEN8_VCS_INSTDONE_VIPDone_start 10
+#define GEN75_VCS_INSTDONE_VIPDone_start 10
+#define GEN7_VCS_INSTDONE_VIPDone_start 10
+#define GEN6_VCS_INSTDONE_VIPDone_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VIPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 10;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VIS Done */
+
+
+#define GEN10_VCS_INSTDONE_VISDone_bits 1
+#define GEN9_VCS_INSTDONE_VISDone_bits 1
+#define GEN8_VCS_INSTDONE_VISDone_bits 1
+#define GEN75_VCS_INSTDONE_VISDone_bits 1
+#define GEN7_VCS_INSTDONE_VISDone_bits 1
+#define GEN6_VCS_INSTDONE_VISDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VISDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VISDone_start 18
+#define GEN9_VCS_INSTDONE_VISDone_start 18
+#define GEN8_VCS_INSTDONE_VISDone_start 18
+#define GEN75_VCS_INSTDONE_VISDone_start 18
+#define GEN7_VCS_INSTDONE_VISDone_start 18
+#define GEN6_VCS_INSTDONE_VISDone_start 18
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VISDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 18;
+ case 9: return 18;
+ case 8: return 18;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 18;
+ } else {
+ return 18;
+ }
+ case 6: return 18;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VIT Done */
+
+
+#define GEN10_VCS_INSTDONE_VITDone_bits 1
+#define GEN9_VCS_INSTDONE_VITDone_bits 1
+#define GEN8_VCS_INSTDONE_VITDone_bits 1
+#define GEN75_VCS_INSTDONE_VITDone_bits 1
+#define GEN7_VCS_INSTDONE_VITDone_bits 1
+#define GEN6_VCS_INSTDONE_VITDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VITDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VITDone_start 11
+#define GEN9_VCS_INSTDONE_VITDone_start 11
+#define GEN8_VCS_INSTDONE_VITDone_start 11
+#define GEN75_VCS_INSTDONE_VITDone_start 11
+#define GEN7_VCS_INSTDONE_VITDone_start 11
+#define GEN6_VCS_INSTDONE_VITDone_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VITDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 11;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VLF Done */
+
+
+#define GEN10_VCS_INSTDONE_VLFDone_bits 1
+#define GEN9_VCS_INSTDONE_VLFDone_bits 1
+#define GEN8_VCS_INSTDONE_VLFDone_bits 1
+#define GEN75_VCS_INSTDONE_VLFDone_bits 1
+#define GEN7_VCS_INSTDONE_VLFDone_bits 1
+#define GEN6_VCS_INSTDONE_VLFDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VLFDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VLFDone_start 7
+#define GEN9_VCS_INSTDONE_VLFDone_start 7
+#define GEN8_VCS_INSTDONE_VLFDone_start 7
+#define GEN75_VCS_INSTDONE_VLFDone_start 7
+#define GEN7_VCS_INSTDONE_VLFDone_start 7
+#define GEN6_VCS_INSTDONE_VLFDone_start 7
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VLFDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 7;
+ } else {
+ return 7;
+ }
+ case 6: return 7;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VMC Done */
+
+
+#define GEN10_VCS_INSTDONE_VMCDone_bits 1
+#define GEN9_VCS_INSTDONE_VMCDone_bits 1
+#define GEN8_VCS_INSTDONE_VMCDone_bits 1
+#define GEN75_VCS_INSTDONE_VMCDone_bits 1
+#define GEN7_VCS_INSTDONE_VMCDone_bits 1
+#define GEN6_VCS_INSTDONE_VMCDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMCDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VMCDone_start 9
+#define GEN9_VCS_INSTDONE_VMCDone_start 9
+#define GEN8_VCS_INSTDONE_VMCDone_start 9
+#define GEN75_VCS_INSTDONE_VMCDone_start 9
+#define GEN7_VCS_INSTDONE_VMCDone_start 9
+#define GEN6_VCS_INSTDONE_VMCDone_start 9
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMCDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VMD Done */
+
+
+#define GEN10_VCS_INSTDONE_VMDDone_bits 1
+#define GEN9_VCS_INSTDONE_VMDDone_bits 1
+#define GEN8_VCS_INSTDONE_VMDDone_bits 1
+#define GEN75_VCS_INSTDONE_VMDDone_bits 1
+#define GEN7_VCS_INSTDONE_VMDDone_bits 1
+#define GEN6_VCS_INSTDONE_VMDDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMDDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VMDDone_start 17
+#define GEN9_VCS_INSTDONE_VMDDone_start 17
+#define GEN8_VCS_INSTDONE_VMDDone_start 17
+#define GEN75_VCS_INSTDONE_VMDDone_start 17
+#define GEN7_VCS_INSTDONE_VMDDone_start 17
+#define GEN6_VCS_INSTDONE_VMDDone_start 17
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMDDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 17;
+ case 9: return 17;
+ case 8: return 17;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 17;
+ } else {
+ return 17;
+ }
+ case 6: return 17;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VMX Done */
+
+
+#define GEN10_VCS_INSTDONE_VMXDone_bits 1
+#define GEN9_VCS_INSTDONE_VMXDone_bits 1
+#define GEN8_VCS_INSTDONE_VMXDone_bits 1
+#define GEN75_VCS_INSTDONE_VMXDone_bits 1
+#define GEN7_VCS_INSTDONE_VMXDone_bits 1
+#define GEN6_VCS_INSTDONE_VMXDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMXDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VMXDone_start 13
+#define GEN9_VCS_INSTDONE_VMXDone_start 13
+#define GEN8_VCS_INSTDONE_VMXDone_start 13
+#define GEN75_VCS_INSTDONE_VMXDone_start 13
+#define GEN7_VCS_INSTDONE_VMXDone_start 13
+#define GEN6_VCS_INSTDONE_VMXDone_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VMXDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 13;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VOP Done */
+
+
+#define GEN10_VCS_INSTDONE_VOPDone_bits 1
+#define GEN9_VCS_INSTDONE_VOPDone_bits 1
+#define GEN8_VCS_INSTDONE_VOPDone_bits 1
+#define GEN75_VCS_INSTDONE_VOPDone_bits 1
+#define GEN7_VCS_INSTDONE_VOPDone_bits 1
+#define GEN6_VCS_INSTDONE_VOPDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VOPDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VOPDone_start 8
+#define GEN9_VCS_INSTDONE_VOPDone_start 8
+#define GEN8_VCS_INSTDONE_VOPDone_start 8
+#define GEN75_VCS_INSTDONE_VOPDone_start 8
+#define GEN7_VCS_INSTDONE_VOPDone_start 8
+#define GEN6_VCS_INSTDONE_VOPDone_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VOPDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 8;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VPR Done */
+
+
+#define GEN10_VCS_INSTDONE_VPRDone_bits 1
+#define GEN9_VCS_INSTDONE_VPRDone_bits 1
+#define GEN8_VCS_INSTDONE_VPRDone_bits 1
+#define GEN75_VCS_INSTDONE_VPRDone_bits 1
+#define GEN7_VCS_INSTDONE_VPRDone_bits 1
+#define GEN6_VCS_INSTDONE_VPRDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VPRDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VPRDone_start 27
+#define GEN9_VCS_INSTDONE_VPRDone_start 27
+#define GEN8_VCS_INSTDONE_VPRDone_start 27
+#define GEN75_VCS_INSTDONE_VPRDone_start 27
+#define GEN7_VCS_INSTDONE_VPRDone_start 27
+#define GEN6_VCS_INSTDONE_VPRDone_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VPRDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 27;
+ case 9: return 27;
+ case 8: return 27;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 27;
+ } else {
+ return 27;
+ }
+ case 6: return 27;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_INSTDONE::VTQ Done */
+
+
+#define GEN10_VCS_INSTDONE_VTQDone_bits 1
+#define GEN9_VCS_INSTDONE_VTQDone_bits 1
+#define GEN8_VCS_INSTDONE_VTQDone_bits 1
+#define GEN75_VCS_INSTDONE_VTQDone_bits 1
+#define GEN7_VCS_INSTDONE_VTQDone_bits 1
+#define GEN6_VCS_INSTDONE_VTQDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VTQDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VCS_INSTDONE_VTQDone_start 28
+#define GEN9_VCS_INSTDONE_VTQDone_start 28
+#define GEN8_VCS_INSTDONE_VTQDone_start 28
+#define GEN75_VCS_INSTDONE_VTQDone_start 28
+#define GEN7_VCS_INSTDONE_VTQDone_start 28
+#define GEN6_VCS_INSTDONE_VTQDone_start 28
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_INSTDONE_VTQDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 28;
+ case 9: return 28;
+ case 8: return 28;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 28;
+ } else {
+ return 28;
+ }
+ case 6: return 28;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_length 1
+#define GEN8_VCS_RING_BUFFER_CTL_length 1
+#define GEN75_VCS_RING_BUFFER_CTL_length 1
+#define GEN7_VCS_RING_BUFFER_CTL_length 1
+#define GEN6_VCS_RING_BUFFER_CTL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::Automatic Report Head Pointer */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN8_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN75_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN7_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN6_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN8_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN75_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN7_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN6_VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::Buffer Length (in pages - 1) */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN8_VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN75_VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN7_VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN6_VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN8_VCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN75_VCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN7_VCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN6_VCS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::Disable Register Accesses */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN8_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN75_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN7_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN6_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN8_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN75_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN7_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN6_VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 8;
+ }
+ case 6: return 8;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::RBWait */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN8_VCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN75_VCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN7_VCS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN6_VCS_RING_BUFFER_CTL_RBWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN8_VCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN75_VCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN7_VCS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN6_VCS_RING_BUFFER_CTL_RBWait_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 11;
+ }
+ case 6: return 11;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::Ring Buffer Enable */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN8_VCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN75_VCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN7_VCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN6_VCS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN8_VCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN75_VCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN7_VCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN6_VCS_RING_BUFFER_CTL_RingBufferEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VCS_RING_BUFFER_CTL::Semaphore Wait */
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN8_VCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN75_VCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN7_VCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN6_VCS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN8_VCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN75_VCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN7_VCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN6_VCS_RING_BUFFER_CTL_SemaphoreWait_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+VCS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 10;
+ }
+ case 6: return 10;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_ACTHD_UDW */
+
+
+#define GEN9_VECS_ACTHD_UDW_length 1
+#define GEN8_VECS_ACTHD_UDW_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_ACTHD_UDW_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_ACTHD_UDW::Head Pointer Upper DWORD */
+
+
+#define GEN9_VECS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+#define GEN8_VECS_ACTHD_UDW_HeadPointerUpperDWORD_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_ACTHD_UDW_HeadPointerUpperDWORD_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+#define GEN8_VECS_ACTHD_UDW_HeadPointerUpperDWORD_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_ACTHD_UDW_HeadPointerUpperDWORD_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG */
+
+
+#define GEN75_VECS_FAULT_REG_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG::Fault Type */
+
+
+#define GEN75_VECS_FAULT_REG_FaultType_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_FaultType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VECS_FAULT_REG_FaultType_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_FaultType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG::GTTSEL */
+
+
+#define GEN75_VECS_FAULT_REG_GTTSEL_bits -9
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_GTTSEL_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return -9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VECS_FAULT_REG_GTTSEL_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_GTTSEL_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG::SRCID of Fault */
+
+
+#define GEN75_VECS_FAULT_REG_SRCIDofFault_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_SRCIDofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VECS_FAULT_REG_SRCIDofFault_start 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_SRCIDofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG::Valid Bit */
+
+
+#define GEN75_VECS_FAULT_REG_ValidBit_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_ValidBit_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VECS_FAULT_REG_ValidBit_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_ValidBit_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_FAULT_REG::Virtual Address of Fault */
+
+
+#define GEN75_VECS_FAULT_REG_VirtualAddressofFault_bits 20
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_VirtualAddressofFault_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VECS_FAULT_REG_VirtualAddressofFault_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_FAULT_REG_VirtualAddressofFault_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_INSTDONE */
+
+
+#define GEN10_VECS_INSTDONE_length 1
+#define GEN9_VECS_INSTDONE_length 1
+#define GEN8_VECS_INSTDONE_length 1
+#define GEN75_VECS_INSTDONE_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_INSTDONE::GAM Done */
+
+
+#define GEN10_VECS_INSTDONE_GAMDone_bits 1
+#define GEN9_VECS_INSTDONE_GAMDone_bits 1
+#define GEN8_VECS_INSTDONE_GAMDone_bits 1
+#define GEN75_VECS_INSTDONE_GAMDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_GAMDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VECS_INSTDONE_GAMDone_start 31
+#define GEN9_VECS_INSTDONE_GAMDone_start 31
+#define GEN8_VECS_INSTDONE_GAMDone_start 31
+#define GEN75_VECS_INSTDONE_GAMDone_start 31
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_GAMDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 31;
+ case 9: return 31;
+ case 8: return 31;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 31;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_INSTDONE::Ring Enable */
+
+
+#define GEN10_VECS_INSTDONE_RingEnable_bits 1
+#define GEN9_VECS_INSTDONE_RingEnable_bits 1
+#define GEN8_VECS_INSTDONE_RingEnable_bits 1
+#define GEN75_VECS_INSTDONE_RingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_RingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VECS_INSTDONE_RingEnable_start 0
+#define GEN9_VECS_INSTDONE_RingEnable_start 0
+#define GEN8_VECS_INSTDONE_RingEnable_start 0
+#define GEN75_VECS_INSTDONE_RingEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_RingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_INSTDONE::VECS Done */
+
+
+#define GEN10_VECS_INSTDONE_VECSDone_bits 1
+#define GEN9_VECS_INSTDONE_VECSDone_bits 1
+#define GEN8_VECS_INSTDONE_VECSDone_bits 1
+#define GEN75_VECS_INSTDONE_VECSDone_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_VECSDone_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VECS_INSTDONE_VECSDone_start 30
+#define GEN9_VECS_INSTDONE_VECSDone_start 30
+#define GEN8_VECS_INSTDONE_VECSDone_start 30
+#define GEN75_VECS_INSTDONE_VECSDone_start 30
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_INSTDONE_VECSDone_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 30;
+ case 9: return 30;
+ case 8: return 30;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 30;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_length 1
+#define GEN8_VECS_RING_BUFFER_CTL_length 1
+#define GEN75_VECS_RING_BUFFER_CTL_length 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::Automatic Report Head Pointer */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN8_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+#define GEN75_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN8_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+#define GEN75_VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_AutomaticReportHeadPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::Buffer Length (in pages - 1) */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN8_VECS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+#define GEN75_VECS_RING_BUFFER_CTL_BufferLengthinpages1_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_BufferLengthinpages1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN8_VECS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+#define GEN75_VECS_RING_BUFFER_CTL_BufferLengthinpages1_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_BufferLengthinpages1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::Disable Register Accesses */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN8_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+#define GEN75_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_DisableRegisterAccesses_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN8_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+#define GEN75_VECS_RING_BUFFER_CTL_DisableRegisterAccesses_start 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_DisableRegisterAccesses_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 8;
+ case 8: return 8;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 8;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::RBWait */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN8_VECS_RING_BUFFER_CTL_RBWait_bits 1
+#define GEN75_VECS_RING_BUFFER_CTL_RBWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_RBWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN8_VECS_RING_BUFFER_CTL_RBWait_start 11
+#define GEN75_VECS_RING_BUFFER_CTL_RBWait_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_RBWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 11;
+ case 8: return 11;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 11;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::Ring Buffer Enable */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN8_VECS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+#define GEN75_VECS_RING_BUFFER_CTL_RingBufferEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_RingBufferEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN8_VECS_RING_BUFFER_CTL_RingBufferEnable_start 0
+#define GEN75_VECS_RING_BUFFER_CTL_RingBufferEnable_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_RingBufferEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VECS_RING_BUFFER_CTL::Semaphore Wait */
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN8_VECS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+#define GEN75_VECS_RING_BUFFER_CTL_SemaphoreWait_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_SemaphoreWait_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN9_VECS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN8_VECS_RING_BUFFER_CTL_SemaphoreWait_start 10
+#define GEN75_VECS_RING_BUFFER_CTL_SemaphoreWait_start 10
+
+static inline uint32_t ATTRIBUTE_PURE
+VECS_RING_BUFFER_CTL_SemaphoreWait_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 10;
+ case 8: return 10;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 10;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_length 4
+#define GEN9_VERTEX_BUFFER_STATE_length 4
+#define GEN8_VERTEX_BUFFER_STATE_length 4
+#define GEN75_VERTEX_BUFFER_STATE_length 4
+#define GEN7_VERTEX_BUFFER_STATE_length 4
+#define GEN6_VERTEX_BUFFER_STATE_length 4
+#define GEN5_VERTEX_BUFFER_STATE_length 4
+#define GEN45_VERTEX_BUFFER_STATE_length 4
+#define GEN4_VERTEX_BUFFER_STATE_length 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 4;
+ case 9: return 4;
+ case 8: return 4;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Address Modify Enable */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_AddressModifyEnable_bits 1
+#define GEN9_VERTEX_BUFFER_STATE_AddressModifyEnable_bits 1
+#define GEN8_VERTEX_BUFFER_STATE_AddressModifyEnable_bits 1
+#define GEN75_VERTEX_BUFFER_STATE_AddressModifyEnable_bits 1
+#define GEN7_VERTEX_BUFFER_STATE_AddressModifyEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_AddressModifyEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_AddressModifyEnable_start 14
+#define GEN9_VERTEX_BUFFER_STATE_AddressModifyEnable_start 14
+#define GEN8_VERTEX_BUFFER_STATE_AddressModifyEnable_start 14
+#define GEN75_VERTEX_BUFFER_STATE_AddressModifyEnable_start 14
+#define GEN7_VERTEX_BUFFER_STATE_AddressModifyEnable_start 14
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_AddressModifyEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 14;
+ case 9: return 14;
+ case 8: return 14;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 14;
+ } else {
+ return 14;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Buffer Access Type */
+
+
+#define GEN75_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+#define GEN7_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+#define GEN6_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+#define GEN5_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+#define GEN45_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+#define GEN4_VERTEX_BUFFER_STATE_BufferAccessType_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferAccessType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VERTEX_BUFFER_STATE_BufferAccessType_start 20
+#define GEN7_VERTEX_BUFFER_STATE_BufferAccessType_start 20
+#define GEN6_VERTEX_BUFFER_STATE_BufferAccessType_start 20
+#define GEN5_VERTEX_BUFFER_STATE_BufferAccessType_start 26
+#define GEN45_VERTEX_BUFFER_STATE_BufferAccessType_start 26
+#define GEN4_VERTEX_BUFFER_STATE_BufferAccessType_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferAccessType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 20;
+ } else {
+ return 20;
+ }
+ case 6: return 20;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Buffer Pitch */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN9_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN8_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN75_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN7_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN6_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN5_VERTEX_BUFFER_STATE_BufferPitch_bits 12
+#define GEN45_VERTEX_BUFFER_STATE_BufferPitch_bits 11
+#define GEN4_VERTEX_BUFFER_STATE_BufferPitch_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 12;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN9_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN8_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN75_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN7_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN6_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN5_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN45_VERTEX_BUFFER_STATE_BufferPitch_start 0
+#define GEN4_VERTEX_BUFFER_STATE_BufferPitch_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Buffer Size */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferSize_bits 32
+#define GEN9_VERTEX_BUFFER_STATE_BufferSize_bits 32
+#define GEN8_VERTEX_BUFFER_STATE_BufferSize_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferSize_start 96
+#define GEN9_VERTEX_BUFFER_STATE_BufferSize_start 96
+#define GEN8_VERTEX_BUFFER_STATE_BufferSize_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 96;
+ case 9: return 96;
+ case 8: return 96;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Buffer Starting Address */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 64
+#define GEN9_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 64
+#define GEN8_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 64
+#define GEN75_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+#define GEN7_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+#define GEN6_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+#define GEN5_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+#define GEN45_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+#define GEN4_VERTEX_BUFFER_STATE_BufferStartingAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferStartingAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN9_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN8_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN75_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN7_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN6_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN5_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN45_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+#define GEN4_VERTEX_BUFFER_STATE_BufferStartingAddress_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_BufferStartingAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 32;
+ case 9: return 32;
+ case 8: return 32;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::End Address */
+
+
+#define GEN75_VERTEX_BUFFER_STATE_EndAddress_bits 32
+#define GEN7_VERTEX_BUFFER_STATE_EndAddress_bits 32
+#define GEN6_VERTEX_BUFFER_STATE_EndAddress_bits 32
+#define GEN5_VERTEX_BUFFER_STATE_EndAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_EndAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VERTEX_BUFFER_STATE_EndAddress_start 64
+#define GEN7_VERTEX_BUFFER_STATE_EndAddress_start 64
+#define GEN6_VERTEX_BUFFER_STATE_EndAddress_start 64
+#define GEN5_VERTEX_BUFFER_STATE_EndAddress_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_EndAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 64;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Instance Data Step Rate */
+
+
+#define GEN75_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+#define GEN7_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+#define GEN6_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+#define GEN5_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+#define GEN45_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+#define GEN4_VERTEX_BUFFER_STATE_InstanceDataStepRate_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_InstanceDataStepRate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 32;
+ } else {
+ return 32;
+ }
+ case 6: return 32;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+#define GEN7_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+#define GEN6_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+#define GEN5_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+#define GEN45_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+#define GEN4_VERTEX_BUFFER_STATE_InstanceDataStepRate_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_InstanceDataStepRate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 96;
+ } else {
+ return 96;
+ }
+ case 6: return 96;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Max Index */
+
+
+#define GEN45_VERTEX_BUFFER_STATE_MaxIndex_bits 32
+#define GEN4_VERTEX_BUFFER_STATE_MaxIndex_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_MaxIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN45_VERTEX_BUFFER_STATE_MaxIndex_start 64
+#define GEN4_VERTEX_BUFFER_STATE_MaxIndex_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_MaxIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Memory Object Control State */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_MemoryObjectControlState_bits 7
+#define GEN9_VERTEX_BUFFER_STATE_MemoryObjectControlState_bits 7
+#define GEN8_VERTEX_BUFFER_STATE_MemoryObjectControlState_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_MemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_MemoryObjectControlState_start 16
+#define GEN9_VERTEX_BUFFER_STATE_MemoryObjectControlState_start 16
+#define GEN8_VERTEX_BUFFER_STATE_MemoryObjectControlState_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_MemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Null Vertex Buffer */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN9_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN8_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN75_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN7_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN6_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+#define GEN5_VERTEX_BUFFER_STATE_NullVertexBuffer_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_NullVertexBuffer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN9_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN8_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN75_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN7_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN6_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+#define GEN5_VERTEX_BUFFER_STATE_NullVertexBuffer_start 13
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_NullVertexBuffer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 13;
+ case 9: return 13;
+ case 8: return 13;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 13;
+ } else {
+ return 13;
+ }
+ case 6: return 13;
+ case 5: return 13;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Vertex Buffer Index */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN9_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN8_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 6
+#define GEN5_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 5
+#define GEN45_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 5
+#define GEN4_VERTEX_BUFFER_STATE_VertexBufferIndex_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN9_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN8_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferIndex_start 26
+#define GEN5_VERTEX_BUFFER_STATE_VertexBufferIndex_start 27
+#define GEN45_VERTEX_BUFFER_STATE_VertexBufferIndex_start 27
+#define GEN4_VERTEX_BUFFER_STATE_VertexBufferIndex_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Vertex Buffer MOCS */
+
+
+#define GEN10_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 7
+#define GEN9_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 7
+#define GEN8_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 7
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 4
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 4
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferMOCS_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferMOCS_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 7;
+ case 9: return 7;
+ case 8: return 7;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+#define GEN9_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+#define GEN8_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferMOCS_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferMOCS_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Vertex Buffer Memory Object Control State */
+
+
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_bits 4
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_bits 4
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 4;
+ } else {
+ return 4;
+ }
+ case 6: return 4;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_start 16
+#define GEN7_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_start 16
+#define GEN6_VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexBufferMemoryObjectControlState_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_BUFFER_STATE::Vertex Fetch Invalidate */
+
+
+#define GEN75_VERTEX_BUFFER_STATE_VertexFetchInvalidate_bits 1
+#define GEN7_VERTEX_BUFFER_STATE_VertexFetchInvalidate_bits 1
+#define GEN6_VERTEX_BUFFER_STATE_VertexFetchInvalidate_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexFetchInvalidate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN75_VERTEX_BUFFER_STATE_VertexFetchInvalidate_start 12
+#define GEN7_VERTEX_BUFFER_STATE_VertexFetchInvalidate_start 12
+#define GEN6_VERTEX_BUFFER_STATE_VertexFetchInvalidate_start 12
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_BUFFER_STATE_VertexFetchInvalidate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_length 2
+#define GEN9_VERTEX_ELEMENT_STATE_length 2
+#define GEN8_VERTEX_ELEMENT_STATE_length 2
+#define GEN75_VERTEX_ELEMENT_STATE_length 2
+#define GEN7_VERTEX_ELEMENT_STATE_length 2
+#define GEN6_VERTEX_ELEMENT_STATE_length 2
+#define GEN5_VERTEX_ELEMENT_STATE_length 2
+#define GEN45_VERTEX_ELEMENT_STATE_length 2
+#define GEN4_VERTEX_ELEMENT_STATE_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 2;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Component 0 Control */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN9_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN8_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN75_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN7_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN6_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN5_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN45_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+#define GEN4_VERTEX_ELEMENT_STATE_Component0Control_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component0Control_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN9_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN8_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN75_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN7_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN6_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN5_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN45_VERTEX_ELEMENT_STATE_Component0Control_start 60
+#define GEN4_VERTEX_ELEMENT_STATE_Component0Control_start 60
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component0Control_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 60;
+ case 9: return 60;
+ case 8: return 60;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 60;
+ } else {
+ return 60;
+ }
+ case 6: return 60;
+ case 5: return 60;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 60;
+ } else {
+ return 60;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Component 1 Control */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN9_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN8_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN75_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN7_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN6_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN5_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN45_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+#define GEN4_VERTEX_ELEMENT_STATE_Component1Control_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component1Control_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN9_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN8_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN75_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN7_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN6_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN5_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN45_VERTEX_ELEMENT_STATE_Component1Control_start 56
+#define GEN4_VERTEX_ELEMENT_STATE_Component1Control_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component1Control_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 56;
+ case 9: return 56;
+ case 8: return 56;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 56;
+ } else {
+ return 56;
+ }
+ case 6: return 56;
+ case 5: return 56;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 56;
+ } else {
+ return 56;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Component 2 Control */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN9_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN8_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN75_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN7_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN6_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN5_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN45_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+#define GEN4_VERTEX_ELEMENT_STATE_Component2Control_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component2Control_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN9_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN8_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN75_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN7_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN6_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN5_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN45_VERTEX_ELEMENT_STATE_Component2Control_start 52
+#define GEN4_VERTEX_ELEMENT_STATE_Component2Control_start 52
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component2Control_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 52;
+ case 9: return 52;
+ case 8: return 52;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 52;
+ } else {
+ return 52;
+ }
+ case 6: return 52;
+ case 5: return 52;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 52;
+ } else {
+ return 52;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Component 3 Control */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN9_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN8_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN75_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN7_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN6_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN5_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN45_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+#define GEN4_VERTEX_ELEMENT_STATE_Component3Control_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component3Control_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 3;
+ case 9: return 3;
+ case 8: return 3;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 3;
+ } else {
+ return 3;
+ }
+ case 6: return 3;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN9_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN8_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN75_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN7_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN6_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN5_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN45_VERTEX_ELEMENT_STATE_Component3Control_start 48
+#define GEN4_VERTEX_ELEMENT_STATE_Component3Control_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Component3Control_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 48;
+ case 9: return 48;
+ case 8: return 48;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 48;
+ } else {
+ return 48;
+ }
+ case 6: return 48;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Destination Element Offset */
+
+
+#define GEN5_VERTEX_ELEMENT_STATE_DestinationElementOffset_bits 8
+#define GEN45_VERTEX_ELEMENT_STATE_DestinationElementOffset_bits 8
+#define GEN4_VERTEX_ELEMENT_STATE_DestinationElementOffset_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_DestinationElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VERTEX_ELEMENT_STATE_DestinationElementOffset_start 32
+#define GEN45_VERTEX_ELEMENT_STATE_DestinationElementOffset_start 32
+#define GEN4_VERTEX_ELEMENT_STATE_DestinationElementOffset_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_DestinationElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Edge Flag Enable */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+#define GEN9_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+#define GEN8_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+#define GEN75_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+#define GEN7_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+#define GEN6_VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_EdgeFlagEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+#define GEN9_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+#define GEN8_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+#define GEN75_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+#define GEN7_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+#define GEN6_VERTEX_ELEMENT_STATE_EdgeFlagEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_EdgeFlagEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 15;
+ case 9: return 15;
+ case 8: return 15;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 15;
+ } else {
+ return 15;
+ }
+ case 6: return 15;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Source Element Format */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN9_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN8_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN75_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN7_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN6_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN5_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN45_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+#define GEN4_VERTEX_ELEMENT_STATE_SourceElementFormat_bits 9
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_SourceElementFormat_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 9;
+ case 9: return 9;
+ case 8: return 9;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 9;
+ } else {
+ return 9;
+ }
+ case 6: return 9;
+ case 5: return 9;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 9;
+ } else {
+ return 9;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN9_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN8_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN75_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN7_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN6_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN5_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN45_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+#define GEN4_VERTEX_ELEMENT_STATE_SourceElementFormat_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_SourceElementFormat_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 16;
+ case 9: return 16;
+ case 8: return 16;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 16;
+ } else {
+ return 16;
+ }
+ case 6: return 16;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Source Element Offset */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN9_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN8_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN75_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN7_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN6_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 12
+#define GEN5_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 11
+#define GEN45_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 11
+#define GEN4_VERTEX_ELEMENT_STATE_SourceElementOffset_bits 11
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_SourceElementOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 12;
+ case 9: return 12;
+ case 8: return 12;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 12;
+ } else {
+ return 12;
+ }
+ case 6: return 12;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN9_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN8_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN75_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN7_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN6_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN5_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN45_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+#define GEN4_VERTEX_ELEMENT_STATE_SourceElementOffset_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_SourceElementOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Valid */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN9_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN8_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN75_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN7_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN6_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN5_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN45_VERTEX_ELEMENT_STATE_Valid_bits 1
+#define GEN4_VERTEX_ELEMENT_STATE_Valid_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Valid_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 1;
+ case 9: return 1;
+ case 8: return 1;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 1;
+ } else {
+ return 1;
+ }
+ case 6: return 1;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN9_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN8_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN75_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN7_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN6_VERTEX_ELEMENT_STATE_Valid_start 25
+#define GEN5_VERTEX_ELEMENT_STATE_Valid_start 26
+#define GEN45_VERTEX_ELEMENT_STATE_Valid_start 26
+#define GEN4_VERTEX_ELEMENT_STATE_Valid_start 26
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_Valid_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 25;
+ case 9: return 25;
+ case 8: return 25;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 25;
+ } else {
+ return 25;
+ }
+ case 6: return 25;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VERTEX_ELEMENT_STATE::Vertex Buffer Index */
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN9_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN8_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN75_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN7_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN6_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 6
+#define GEN5_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 5
+#define GEN45_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 5
+#define GEN4_VERTEX_ELEMENT_STATE_VertexBufferIndex_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_VertexBufferIndex_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 6;
+ case 9: return 6;
+ case 8: return 6;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 6;
+ } else {
+ return 6;
+ }
+ case 6: return 6;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN9_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN8_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN75_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN7_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN6_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 26
+#define GEN5_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 27
+#define GEN45_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 27
+#define GEN4_VERTEX_ELEMENT_STATE_VertexBufferIndex_start 27
+
+static inline uint32_t ATTRIBUTE_PURE
+VERTEX_ELEMENT_STATE_VertexBufferIndex_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 26;
+ case 9: return 26;
+ case 8: return 26;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 26;
+ } else {
+ return 26;
+ }
+ case 6: return 26;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_INVOCATION_COUNT */
+
+
+#define GEN10_VS_INVOCATION_COUNT_length 2
+#define GEN9_VS_INVOCATION_COUNT_length 2
+#define GEN8_VS_INVOCATION_COUNT_length 2
+#define GEN75_VS_INVOCATION_COUNT_length 2
+#define GEN7_VS_INVOCATION_COUNT_length 2
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_INVOCATION_COUNT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 2;
+ case 9: return 2;
+ case 8: return 2;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 2;
+ } else {
+ return 2;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_INVOCATION_COUNT::VS Invocation Count Report */
+
+
+#define GEN10_VS_INVOCATION_COUNT_VSInvocationCountReport_bits 64
+#define GEN9_VS_INVOCATION_COUNT_VSInvocationCountReport_bits 64
+#define GEN8_VS_INVOCATION_COUNT_VSInvocationCountReport_bits 64
+#define GEN75_VS_INVOCATION_COUNT_VSInvocationCountReport_bits 64
+#define GEN7_VS_INVOCATION_COUNT_VSInvocationCountReport_bits 64
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_INVOCATION_COUNT_VSInvocationCountReport_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 64;
+ case 9: return 64;
+ case 8: return 64;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 64;
+ } else {
+ return 64;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN10_VS_INVOCATION_COUNT_VSInvocationCountReport_start 0
+#define GEN9_VS_INVOCATION_COUNT_VSInvocationCountReport_start 0
+#define GEN8_VS_INVOCATION_COUNT_VSInvocationCountReport_start 0
+#define GEN75_VS_INVOCATION_COUNT_VSInvocationCountReport_start 0
+#define GEN7_VS_INVOCATION_COUNT_VSInvocationCountReport_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_INVOCATION_COUNT_VSInvocationCountReport_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE */
+
+
+#define GEN5_VS_STATE_length 7
+#define GEN45_VS_STATE_length 7
+#define GEN4_VS_STATE_length 7
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Binding Table Entry Count */
+
+
+#define GEN5_VS_STATE_BindingTableEntryCount_bits 8
+#define GEN45_VS_STATE_BindingTableEntryCount_bits 8
+#define GEN4_VS_STATE_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_BindingTableEntryCount_start 50
+#define GEN45_VS_STATE_BindingTableEntryCount_start 50
+#define GEN4_VS_STATE_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Constant URB Entry Read Length */
+
+
+#define GEN5_VS_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN45_VS_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN4_VS_STATE_ConstantURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_ConstantURBEntryReadLength_start 121
+#define GEN45_VS_STATE_ConstantURBEntryReadLength_start 121
+#define GEN4_VS_STATE_ConstantURBEntryReadLength_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Constant URB Entry Read Offset */
+
+
+#define GEN5_VS_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN45_VS_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN4_VS_STATE_ConstantURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN45_VS_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN4_VS_STATE_ConstantURBEntryReadOffset_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Dispatch GRF Start Register For URB Data */
+
+
+#define GEN5_VS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN45_VS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+#define GEN4_VS_STATE_DispatchGRFStartRegisterForURBData_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_DispatchGRFStartRegisterForURBData_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN45_VS_STATE_DispatchGRFStartRegisterForURBData_start 96
+#define GEN4_VS_STATE_DispatchGRFStartRegisterForURBData_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_DispatchGRFStartRegisterForURBData_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Enable */
+
+
+#define GEN5_VS_STATE_Enable_bits 1
+#define GEN45_VS_STATE_Enable_bits 1
+#define GEN4_VS_STATE_Enable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_Enable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_Enable_start 192
+#define GEN45_VS_STATE_Enable_start 192
+#define GEN4_VS_STATE_Enable_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_Enable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Floating Point Mode */
+
+
+#define GEN5_VS_STATE_FloatingPointMode_bits 1
+#define GEN45_VS_STATE_FloatingPointMode_bits 1
+#define GEN4_VS_STATE_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_FloatingPointMode_start 48
+#define GEN45_VS_STATE_FloatingPointMode_start 48
+#define GEN4_VS_STATE_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::GRF Register Count */
+
+
+#define GEN5_VS_STATE_GRFRegisterCount_bits 3
+#define GEN45_VS_STATE_GRFRegisterCount_bits 3
+#define GEN4_VS_STATE_GRFRegisterCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_GRFRegisterCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_GRFRegisterCount_start 1
+#define GEN45_VS_STATE_GRFRegisterCount_start 1
+#define GEN4_VS_STATE_GRFRegisterCount_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_GRFRegisterCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Illegal Opcode Exception Enable */
+
+
+#define GEN5_VS_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN45_VS_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN4_VS_STATE_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN45_VS_STATE_IllegalOpcodeExceptionEnable_start 45
+#define GEN4_VS_STATE_IllegalOpcodeExceptionEnable_start 45
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 45;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 45;
+ } else {
+ return 45;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Kernel Start Pointer */
+
+
+#define GEN5_VS_STATE_KernelStartPointer_bits 26
+#define GEN45_VS_STATE_KernelStartPointer_bits 26
+#define GEN4_VS_STATE_KernelStartPointer_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_KernelStartPointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_KernelStartPointer_start 6
+#define GEN45_VS_STATE_KernelStartPointer_start 6
+#define GEN4_VS_STATE_KernelStartPointer_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_KernelStartPointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Mask Stack Exception Enable */
+
+
+#define GEN5_VS_STATE_MaskStackExceptionEnable_bits 1
+#define GEN45_VS_STATE_MaskStackExceptionEnable_bits 1
+#define GEN4_VS_STATE_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_MaskStackExceptionEnable_start 43
+#define GEN45_VS_STATE_MaskStackExceptionEnable_start 43
+#define GEN4_VS_STATE_MaskStackExceptionEnable_start 43
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 43;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 43;
+ } else {
+ return 43;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Maximum Number of Threads */
+
+
+#define GEN5_VS_STATE_MaximumNumberofThreads_bits 6
+#define GEN45_VS_STATE_MaximumNumberofThreads_bits 6
+#define GEN4_VS_STATE_MaximumNumberofThreads_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_MaximumNumberofThreads_start 153
+#define GEN45_VS_STATE_MaximumNumberofThreads_start 153
+#define GEN4_VS_STATE_MaximumNumberofThreads_start 153
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 153;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 153;
+ } else {
+ return 153;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Number of URB Entries */
+
+
+#define GEN5_VS_STATE_NumberofURBEntries_bits 8
+#define GEN45_VS_STATE_NumberofURBEntries_bits 8
+#define GEN4_VS_STATE_NumberofURBEntries_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_NumberofURBEntries_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_NumberofURBEntries_start 139
+#define GEN45_VS_STATE_NumberofURBEntries_start 139
+#define GEN4_VS_STATE_NumberofURBEntries_start 139
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_NumberofURBEntries_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 139;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 139;
+ } else {
+ return 139;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Per-Thread Scratch Space */
+
+
+#define GEN5_VS_STATE_PerThreadScratchSpace_bits 4
+#define GEN45_VS_STATE_PerThreadScratchSpace_bits 4
+#define GEN4_VS_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_PerThreadScratchSpace_start 64
+#define GEN45_VS_STATE_PerThreadScratchSpace_start 64
+#define GEN4_VS_STATE_PerThreadScratchSpace_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Sampler Count */
+
+
+#define GEN5_VS_STATE_SamplerCount_bits 3
+#define GEN45_VS_STATE_SamplerCount_bits 3
+#define GEN4_VS_STATE_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_SamplerCount_start 160
+#define GEN45_VS_STATE_SamplerCount_start 160
+#define GEN4_VS_STATE_SamplerCount_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Sampler State Pointer */
+
+
+#define GEN5_VS_STATE_SamplerStatePointer_bits 27
+#define GEN45_VS_STATE_SamplerStatePointer_bits 27
+#define GEN4_VS_STATE_SamplerStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_SamplerStatePointer_start 165
+#define GEN45_VS_STATE_SamplerStatePointer_start 165
+#define GEN4_VS_STATE_SamplerStatePointer_start 165
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 165;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 165;
+ } else {
+ return 165;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Scratch Space Base Pointer */
+
+
+#define GEN5_VS_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN45_VS_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN4_VS_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_ScratchSpaceBasePointer_start 74
+#define GEN45_VS_STATE_ScratchSpaceBasePointer_start 74
+#define GEN4_VS_STATE_ScratchSpaceBasePointer_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Single Program Flow */
+
+
+#define GEN5_VS_STATE_SingleProgramFlow_bits 1
+#define GEN45_VS_STATE_SingleProgramFlow_bits 1
+#define GEN4_VS_STATE_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_SingleProgramFlow_start 63
+#define GEN45_VS_STATE_SingleProgramFlow_start 63
+#define GEN4_VS_STATE_SingleProgramFlow_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Software Exception Enable */
+
+
+#define GEN5_VS_STATE_SoftwareExceptionEnable_bits 1
+#define GEN45_VS_STATE_SoftwareExceptionEnable_bits 1
+#define GEN4_VS_STATE_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_SoftwareExceptionEnable_start 39
+#define GEN45_VS_STATE_SoftwareExceptionEnable_start 39
+#define GEN4_VS_STATE_SoftwareExceptionEnable_start 39
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 39;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 39;
+ } else {
+ return 39;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Statistics Enable */
+
+
+#define GEN5_VS_STATE_StatisticsEnable_bits 1
+#define GEN45_VS_STATE_StatisticsEnable_bits 1
+#define GEN4_VS_STATE_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_StatisticsEnable_start 138
+#define GEN45_VS_STATE_StatisticsEnable_start 138
+#define GEN4_VS_STATE_StatisticsEnable_start 138
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 138;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 138;
+ } else {
+ return 138;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Thread Priority */
+
+
+#define GEN5_VS_STATE_ThreadPriority_bits 1
+#define GEN45_VS_STATE_ThreadPriority_bits 1
+#define GEN4_VS_STATE_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_ThreadPriority_start 49
+#define GEN45_VS_STATE_ThreadPriority_start 49
+#define GEN4_VS_STATE_ThreadPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 49;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 49;
+ } else {
+ return 49;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::URB Entry Allocation Size */
+
+
+#define GEN5_VS_STATE_URBEntryAllocationSize_bits 5
+#define GEN45_VS_STATE_URBEntryAllocationSize_bits 5
+#define GEN4_VS_STATE_URBEntryAllocationSize_bits 5
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_URBEntryAllocationSize_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 5;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 5;
+ } else {
+ return 5;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_URBEntryAllocationSize_start 147
+#define GEN45_VS_STATE_URBEntryAllocationSize_start 147
+#define GEN4_VS_STATE_URBEntryAllocationSize_start 147
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_URBEntryAllocationSize_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 147;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 147;
+ } else {
+ return 147;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Vertex Cache Disable */
+
+
+#define GEN5_VS_STATE_VertexCacheDisable_bits 1
+#define GEN45_VS_STATE_VertexCacheDisable_bits 1
+#define GEN4_VS_STATE_VertexCacheDisable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexCacheDisable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_VertexCacheDisable_start 193
+#define GEN45_VS_STATE_VertexCacheDisable_start 193
+#define GEN4_VS_STATE_VertexCacheDisable_start 193
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexCacheDisable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 193;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 193;
+ } else {
+ return 193;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Vertex URB Entry Read Length */
+
+
+#define GEN5_VS_STATE_VertexURBEntryReadLength_bits 6
+#define GEN45_VS_STATE_VertexURBEntryReadLength_bits 6
+#define GEN4_VS_STATE_VertexURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_VertexURBEntryReadLength_start 107
+#define GEN45_VS_STATE_VertexURBEntryReadLength_start 107
+#define GEN4_VS_STATE_VertexURBEntryReadLength_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* VS_STATE::Vertex URB Entry Read Offset */
+
+
+#define GEN5_VS_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN45_VS_STATE_VertexURBEntryReadOffset_bits 6
+#define GEN4_VS_STATE_VertexURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_VS_STATE_VertexURBEntryReadOffset_start 100
+#define GEN45_VS_STATE_VertexURBEntryReadOffset_start 100
+#define GEN4_VS_STATE_VertexURBEntryReadOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+VS_STATE_VertexURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 100;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 100;
+ } else {
+ return 100;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE */
+
+
+#define GEN5_WM_STATE_length 11
+#define GEN45_WM_STATE_length 8
+#define GEN4_WM_STATE_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::16 Pixel Dispatch Enable */
+
+
+#define GEN5_WM_STATE_16PixelDispatchEnable_bits 1
+#define GEN45_WM_STATE_16PixelDispatchEnable_bits 1
+#define GEN4_WM_STATE_16PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_16PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_16PixelDispatchEnable_start 161
+#define GEN45_WM_STATE_16PixelDispatchEnable_start 161
+#define GEN4_WM_STATE_16PixelDispatchEnable_start 161
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_16PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 161;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 161;
+ } else {
+ return 161;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::32 Pixel Dispatch Enable */
+
+
+#define GEN5_WM_STATE_32PixelDispatchEnable_bits 1
+#define GEN45_WM_STATE_32PixelDispatchEnable_bits 1
+#define GEN4_WM_STATE_32PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_32PixelDispatchEnable_start 162
+#define GEN45_WM_STATE_32PixelDispatchEnable_start 162
+#define GEN4_WM_STATE_32PixelDispatchEnable_start 162
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 162;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 162;
+ } else {
+ return 162;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::8 Pixel Dispatch Enable */
+
+
+#define GEN5_WM_STATE_8PixelDispatchEnable_bits 1
+#define GEN45_WM_STATE_8PixelDispatchEnable_bits 1
+#define GEN4_WM_STATE_8PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_8PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_8PixelDispatchEnable_start 160
+#define GEN45_WM_STATE_8PixelDispatchEnable_start 160
+#define GEN4_WM_STATE_8PixelDispatchEnable_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_8PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Binding Table Entry Count */
+
+
+#define GEN5_WM_STATE_BindingTableEntryCount_bits 8
+#define GEN45_WM_STATE_BindingTableEntryCount_bits 8
+#define GEN4_WM_STATE_BindingTableEntryCount_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_BindingTableEntryCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_BindingTableEntryCount_start 50
+#define GEN45_WM_STATE_BindingTableEntryCount_start 50
+#define GEN4_WM_STATE_BindingTableEntryCount_start 50
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_BindingTableEntryCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 50;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 50;
+ } else {
+ return 50;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Constant URB Entry Read Length */
+
+
+#define GEN5_WM_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN45_WM_STATE_ConstantURBEntryReadLength_bits 6
+#define GEN4_WM_STATE_ConstantURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ConstantURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_ConstantURBEntryReadLength_start 121
+#define GEN45_WM_STATE_ConstantURBEntryReadLength_start 121
+#define GEN4_WM_STATE_ConstantURBEntryReadLength_start 121
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ConstantURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 121;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 121;
+ } else {
+ return 121;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Constant URB Entry Read Offset */
+
+
+#define GEN5_WM_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN45_WM_STATE_ConstantURBEntryReadOffset_bits 6
+#define GEN4_WM_STATE_ConstantURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ConstantURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN45_WM_STATE_ConstantURBEntryReadOffset_start 114
+#define GEN4_WM_STATE_ConstantURBEntryReadOffset_start 114
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ConstantURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 114;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 114;
+ } else {
+ return 114;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Contiguous 32 Pixel Dispatch Enable */
+
+
+#define GEN5_WM_STATE_Contiguous32PixelDispatchEnable_bits 1
+#define GEN45_WM_STATE_Contiguous32PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_Contiguous32PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_Contiguous32PixelDispatchEnable_start 163
+#define GEN45_WM_STATE_Contiguous32PixelDispatchEnable_start 163
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_Contiguous32PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 163;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 163;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Contiguous 64 Pixel Dispatch Enable */
+
+
+#define GEN5_WM_STATE_Contiguous64PixelDispatchEnable_bits 1
+#define GEN45_WM_STATE_Contiguous64PixelDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_Contiguous64PixelDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_Contiguous64PixelDispatchEnable_start 164
+#define GEN45_WM_STATE_Contiguous64PixelDispatchEnable_start 164
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_Contiguous64PixelDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 164;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 164;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Depth Buffer Clear */
+
+
+#define GEN5_WM_STATE_DepthBufferClear_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthBufferClear_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_DepthBufferClear_start 167
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthBufferClear_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 167;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Depth Buffer Resolve Enable */
+
+
+#define GEN5_WM_STATE_DepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_DepthBufferResolveEnable_start 168
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 168;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Depth Coefficient URB Read Offset */
+
+
+#define GEN5_WM_STATE_DepthCoefficientURBReadOffset_bits 6
+#define GEN45_WM_STATE_DepthCoefficientURBReadOffset_bits 6
+#define GEN4_WM_STATE_DepthCoefficientURBReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthCoefficientURBReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_DepthCoefficientURBReadOffset_start 40
+#define GEN45_WM_STATE_DepthCoefficientURBReadOffset_start 40
+#define GEN4_WM_STATE_DepthCoefficientURBReadOffset_start 40
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DepthCoefficientURBReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 40;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 40;
+ } else {
+ return 40;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Dispatch GRF Start Register For Constant/Setup Data 0 */
+
+
+#define GEN5_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_bits 4
+#define GEN45_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_bits 4
+#define GEN4_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_start 96
+#define GEN45_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_start 96
+#define GEN4_WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_DispatchGRFStartRegisterForConstantSetupData0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Early Depth Test Enable */
+
+
+#define GEN5_WM_STATE_EarlyDepthTestEnable_bits 1
+#define GEN45_WM_STATE_EarlyDepthTestEnable_bits 1
+#define GEN4_WM_STATE_EarlyDepthTestEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_EarlyDepthTestEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_EarlyDepthTestEnable_start 178
+#define GEN45_WM_STATE_EarlyDepthTestEnable_start 178
+#define GEN4_WM_STATE_EarlyDepthTestEnable_start 178
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_EarlyDepthTestEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 178;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 178;
+ } else {
+ return 178;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Fast Span Coverage Enable */
+
+
+#define GEN5_WM_STATE_FastSpanCoverageEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_FastSpanCoverageEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_FastSpanCoverageEnable_start 166
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_FastSpanCoverageEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 166;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Floating Point Mode */
+
+
+#define GEN5_WM_STATE_FloatingPointMode_bits 1
+#define GEN45_WM_STATE_FloatingPointMode_bits 1
+#define GEN4_WM_STATE_FloatingPointMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_FloatingPointMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_FloatingPointMode_start 48
+#define GEN45_WM_STATE_FloatingPointMode_start 48
+#define GEN4_WM_STATE_FloatingPointMode_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_FloatingPointMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::GRF Register Count 0 */
+
+
+#define GEN5_WM_STATE_GRFRegisterCount0_bits 3
+#define GEN45_WM_STATE_GRFRegisterCount0_bits 3
+#define GEN4_WM_STATE_GRFRegisterCount0_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GRFRegisterCount0_start 1
+#define GEN45_WM_STATE_GRFRegisterCount0_start 1
+#define GEN4_WM_STATE_GRFRegisterCount0_start 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::GRF Register Count 1 */
+
+
+#define GEN5_WM_STATE_GRFRegisterCount1_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GRFRegisterCount1_start 257
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 257;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::GRF Register Count 2 */
+
+
+#define GEN5_WM_STATE_GRFRegisterCount2_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GRFRegisterCount2_start 289
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 289;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::GRF Register Count 3 */
+
+
+#define GEN5_WM_STATE_GRFRegisterCount3_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GRFRegisterCount3_start 321
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GRFRegisterCount3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 321;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Global Depth Offset Constant */
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetConstant_bits 32
+#define GEN45_WM_STATE_GlobalDepthOffsetConstant_bits 32
+#define GEN4_WM_STATE_GlobalDepthOffsetConstant_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetConstant_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetConstant_start 192
+#define GEN45_WM_STATE_GlobalDepthOffsetConstant_start 192
+#define GEN4_WM_STATE_GlobalDepthOffsetConstant_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetConstant_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Global Depth Offset Enable */
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetEnable_bits 1
+#define GEN45_WM_STATE_GlobalDepthOffsetEnable_bits 1
+#define GEN4_WM_STATE_GlobalDepthOffsetEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetEnable_start 172
+#define GEN45_WM_STATE_GlobalDepthOffsetEnable_start 172
+#define GEN4_WM_STATE_GlobalDepthOffsetEnable_start 172
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 172;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 172;
+ } else {
+ return 172;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Global Depth Offset Scale */
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetScale_bits 32
+#define GEN45_WM_STATE_GlobalDepthOffsetScale_bits 32
+#define GEN4_WM_STATE_GlobalDepthOffsetScale_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetScale_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_GlobalDepthOffsetScale_start 224
+#define GEN45_WM_STATE_GlobalDepthOffsetScale_start 224
+#define GEN4_WM_STATE_GlobalDepthOffsetScale_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_GlobalDepthOffsetScale_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Hierarchical Depth Buffer Resolve Enable */
+
+
+#define GEN5_WM_STATE_HierarchicalDepthBufferResolveEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_HierarchicalDepthBufferResolveEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_HierarchicalDepthBufferResolveEnable_start 169
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_HierarchicalDepthBufferResolveEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 169;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Illegal Opcode Exception Enable */
+
+
+#define GEN5_WM_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN45_WM_STATE_IllegalOpcodeExceptionEnable_bits 1
+#define GEN4_WM_STATE_IllegalOpcodeExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_IllegalOpcodeExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_IllegalOpcodeExceptionEnable_start 36
+#define GEN45_WM_STATE_IllegalOpcodeExceptionEnable_start 36
+#define GEN4_WM_STATE_IllegalOpcodeExceptionEnable_start 36
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_IllegalOpcodeExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 36;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 36;
+ } else {
+ return 36;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Kernel Start Pointer 0 */
+
+
+#define GEN5_WM_STATE_KernelStartPointer0_bits 26
+#define GEN45_WM_STATE_KernelStartPointer0_bits 26
+#define GEN4_WM_STATE_KernelStartPointer0_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer0_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 26;
+ } else {
+ return 26;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_KernelStartPointer0_start 6
+#define GEN45_WM_STATE_KernelStartPointer0_start 6
+#define GEN4_WM_STATE_KernelStartPointer0_start 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer0_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Kernel Start Pointer 1 */
+
+
+#define GEN5_WM_STATE_KernelStartPointer1_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer1_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_KernelStartPointer1_start 262
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer1_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 262;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Kernel Start Pointer 2 */
+
+
+#define GEN5_WM_STATE_KernelStartPointer2_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer2_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_KernelStartPointer2_start 294
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer2_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 294;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Kernel Start Pointer 3 */
+
+
+#define GEN5_WM_STATE_KernelStartPointer3_bits 26
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer3_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 26;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_KernelStartPointer3_start 326
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_KernelStartPointer3_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 326;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Legacy Diamond Line Rasterization */
+
+
+#define GEN5_WM_STATE_LegacyDiamondLineRasterization_bits 1
+#define GEN45_WM_STATE_LegacyDiamondLineRasterization_bits 1
+#define GEN4_WM_STATE_LegacyDiamondLineRasterization_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LegacyDiamondLineRasterization_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_LegacyDiamondLineRasterization_start 183
+#define GEN45_WM_STATE_LegacyDiamondLineRasterization_start 183
+#define GEN4_WM_STATE_LegacyDiamondLineRasterization_start 183
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LegacyDiamondLineRasterization_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 183;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 183;
+ } else {
+ return 183;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Legacy Global Depth Bias Enable */
+
+
+#define GEN5_WM_STATE_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN45_WM_STATE_LegacyGlobalDepthBiasEnable_bits 1
+#define GEN4_WM_STATE_LegacyGlobalDepthBiasEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LegacyGlobalDepthBiasEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_LegacyGlobalDepthBiasEnable_start 170
+#define GEN45_WM_STATE_LegacyGlobalDepthBiasEnable_start 170
+#define GEN4_WM_STATE_LegacyGlobalDepthBiasEnable_start 170
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LegacyGlobalDepthBiasEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 170;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 170;
+ } else {
+ return 170;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Line Antialiasing Region Width */
+
+
+#define GEN5_WM_STATE_LineAntialiasingRegionWidth_bits 2
+#define GEN45_WM_STATE_LineAntialiasingRegionWidth_bits 2
+#define GEN4_WM_STATE_LineAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_LineAntialiasingRegionWidth_start 174
+#define GEN45_WM_STATE_LineAntialiasingRegionWidth_start 174
+#define GEN4_WM_STATE_LineAntialiasingRegionWidth_start 174
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 174;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 174;
+ } else {
+ return 174;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Line End Cap Antialiasing Region Width */
+
+
+#define GEN5_WM_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN45_WM_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+#define GEN4_WM_STATE_LineEndCapAntialiasingRegionWidth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineEndCapAntialiasingRegionWidth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_LineEndCapAntialiasingRegionWidth_start 176
+#define GEN45_WM_STATE_LineEndCapAntialiasingRegionWidth_start 176
+#define GEN4_WM_STATE_LineEndCapAntialiasingRegionWidth_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineEndCapAntialiasingRegionWidth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 176;
+ } else {
+ return 176;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Line Stipple Enable */
+
+
+#define GEN5_WM_STATE_LineStippleEnable_bits 1
+#define GEN45_WM_STATE_LineStippleEnable_bits 1
+#define GEN4_WM_STATE_LineStippleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineStippleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_LineStippleEnable_start 171
+#define GEN45_WM_STATE_LineStippleEnable_start 171
+#define GEN4_WM_STATE_LineStippleEnable_start 171
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_LineStippleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 171;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 171;
+ } else {
+ return 171;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Mask Stack Exception Enable */
+
+
+#define GEN5_WM_STATE_MaskStackExceptionEnable_bits 1
+#define GEN45_WM_STATE_MaskStackExceptionEnable_bits 1
+#define GEN4_WM_STATE_MaskStackExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_MaskStackExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_MaskStackExceptionEnable_start 34
+#define GEN45_WM_STATE_MaskStackExceptionEnable_start 34
+#define GEN4_WM_STATE_MaskStackExceptionEnable_start 34
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_MaskStackExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 34;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 34;
+ } else {
+ return 34;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Maximum Number of Threads */
+
+
+#define GEN5_WM_STATE_MaximumNumberofThreads_bits 7
+#define GEN45_WM_STATE_MaximumNumberofThreads_bits 7
+#define GEN4_WM_STATE_MaximumNumberofThreads_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_MaximumNumberofThreads_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_MaximumNumberofThreads_start 185
+#define GEN45_WM_STATE_MaximumNumberofThreads_start 185
+#define GEN4_WM_STATE_MaximumNumberofThreads_start 185
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_MaximumNumberofThreads_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 185;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 185;
+ } else {
+ return 185;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Per-Thread Scratch Space */
+
+
+#define GEN5_WM_STATE_PerThreadScratchSpace_bits 4
+#define GEN45_WM_STATE_PerThreadScratchSpace_bits 4
+#define GEN4_WM_STATE_PerThreadScratchSpace_bits 4
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PerThreadScratchSpace_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 4;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 4;
+ } else {
+ return 4;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_PerThreadScratchSpace_start 64
+#define GEN45_WM_STATE_PerThreadScratchSpace_start 64
+#define GEN4_WM_STATE_PerThreadScratchSpace_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PerThreadScratchSpace_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Pixel Shader Computed Depth */
+
+
+#define GEN5_WM_STATE_PixelShaderComputedDepth_bits 1
+#define GEN45_WM_STATE_PixelShaderComputedDepth_bits 1
+#define GEN4_WM_STATE_PixelShaderComputedDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderComputedDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_PixelShaderComputedDepth_start 181
+#define GEN45_WM_STATE_PixelShaderComputedDepth_start 181
+#define GEN4_WM_STATE_PixelShaderComputedDepth_start 181
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderComputedDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 181;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 181;
+ } else {
+ return 181;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Pixel Shader Kills Pixel */
+
+
+#define GEN5_WM_STATE_PixelShaderKillsPixel_bits 1
+#define GEN45_WM_STATE_PixelShaderKillsPixel_bits 1
+#define GEN4_WM_STATE_PixelShaderKillsPixel_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderKillsPixel_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_PixelShaderKillsPixel_start 182
+#define GEN45_WM_STATE_PixelShaderKillsPixel_start 182
+#define GEN4_WM_STATE_PixelShaderKillsPixel_start 182
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderKillsPixel_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 182;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 182;
+ } else {
+ return 182;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Pixel Shader Uses Source Depth */
+
+
+#define GEN5_WM_STATE_PixelShaderUsesSourceDepth_bits 1
+#define GEN45_WM_STATE_PixelShaderUsesSourceDepth_bits 1
+#define GEN4_WM_STATE_PixelShaderUsesSourceDepth_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderUsesSourceDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_PixelShaderUsesSourceDepth_start 180
+#define GEN45_WM_STATE_PixelShaderUsesSourceDepth_start 180
+#define GEN4_WM_STATE_PixelShaderUsesSourceDepth_start 180
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PixelShaderUsesSourceDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 180;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 180;
+ } else {
+ return 180;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Polygon Stipple Enable */
+
+
+#define GEN5_WM_STATE_PolygonStippleEnable_bits 1
+#define GEN45_WM_STATE_PolygonStippleEnable_bits 1
+#define GEN4_WM_STATE_PolygonStippleEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PolygonStippleEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_PolygonStippleEnable_start 173
+#define GEN45_WM_STATE_PolygonStippleEnable_start 173
+#define GEN4_WM_STATE_PolygonStippleEnable_start 173
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_PolygonStippleEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 173;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 173;
+ } else {
+ return 173;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Sampler Count */
+
+
+#define GEN5_WM_STATE_SamplerCount_bits 3
+#define GEN45_WM_STATE_SamplerCount_bits 3
+#define GEN4_WM_STATE_SamplerCount_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SamplerCount_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SamplerCount_start 130
+#define GEN45_WM_STATE_SamplerCount_start 130
+#define GEN4_WM_STATE_SamplerCount_start 130
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SamplerCount_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 130;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 130;
+ } else {
+ return 130;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Sampler State Pointer */
+
+
+#define GEN5_WM_STATE_SamplerStatePointer_bits 27
+#define GEN45_WM_STATE_SamplerStatePointer_bits 27
+#define GEN4_WM_STATE_SamplerStatePointer_bits 27
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SamplerStatePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 27;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 27;
+ } else {
+ return 27;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SamplerStatePointer_start 133
+#define GEN45_WM_STATE_SamplerStatePointer_start 133
+#define GEN4_WM_STATE_SamplerStatePointer_start 133
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SamplerStatePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 133;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 133;
+ } else {
+ return 133;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Scratch Space Base Pointer */
+
+
+#define GEN5_WM_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN45_WM_STATE_ScratchSpaceBasePointer_bits 22
+#define GEN4_WM_STATE_ScratchSpaceBasePointer_bits 22
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ScratchSpaceBasePointer_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_ScratchSpaceBasePointer_start 74
+#define GEN45_WM_STATE_ScratchSpaceBasePointer_start 74
+#define GEN4_WM_STATE_ScratchSpaceBasePointer_start 74
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ScratchSpaceBasePointer_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 74;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 74;
+ } else {
+ return 74;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Setup URB Entry Read Length */
+
+
+#define GEN5_WM_STATE_SetupURBEntryReadLength_bits 6
+#define GEN45_WM_STATE_SetupURBEntryReadLength_bits 6
+#define GEN4_WM_STATE_SetupURBEntryReadLength_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SetupURBEntryReadLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SetupURBEntryReadLength_start 107
+#define GEN45_WM_STATE_SetupURBEntryReadLength_start 107
+#define GEN4_WM_STATE_SetupURBEntryReadLength_start 107
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SetupURBEntryReadLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 107;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 107;
+ } else {
+ return 107;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Setup URB Entry Read Offset */
+
+
+#define GEN5_WM_STATE_SetupURBEntryReadOffset_bits 6
+#define GEN45_WM_STATE_SetupURBEntryReadOffset_bits 6
+#define GEN4_WM_STATE_SetupURBEntryReadOffset_bits 6
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SetupURBEntryReadOffset_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SetupURBEntryReadOffset_start 100
+#define GEN45_WM_STATE_SetupURBEntryReadOffset_start 100
+#define GEN4_WM_STATE_SetupURBEntryReadOffset_start 100
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SetupURBEntryReadOffset_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 100;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 100;
+ } else {
+ return 100;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Single Program Flow */
+
+
+#define GEN5_WM_STATE_SingleProgramFlow_bits 1
+#define GEN45_WM_STATE_SingleProgramFlow_bits 1
+#define GEN4_WM_STATE_SingleProgramFlow_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SingleProgramFlow_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SingleProgramFlow_start 63
+#define GEN45_WM_STATE_SingleProgramFlow_start 63
+#define GEN4_WM_STATE_SingleProgramFlow_start 63
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SingleProgramFlow_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 63;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 63;
+ } else {
+ return 63;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Software Exception Enable */
+
+
+#define GEN5_WM_STATE_SoftwareExceptionEnable_bits 1
+#define GEN45_WM_STATE_SoftwareExceptionEnable_bits 1
+#define GEN4_WM_STATE_SoftwareExceptionEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SoftwareExceptionEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_SoftwareExceptionEnable_start 33
+#define GEN45_WM_STATE_SoftwareExceptionEnable_start 33
+#define GEN4_WM_STATE_SoftwareExceptionEnable_start 33
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_SoftwareExceptionEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 33;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 33;
+ } else {
+ return 33;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Statistics Enable */
+
+
+#define GEN5_WM_STATE_StatisticsEnable_bits 1
+#define GEN45_WM_STATE_StatisticsEnable_bits 1
+#define GEN4_WM_STATE_StatisticsEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_StatisticsEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_StatisticsEnable_start 128
+#define GEN45_WM_STATE_StatisticsEnable_start 128
+#define GEN4_WM_STATE_StatisticsEnable_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_StatisticsEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Thread Dispatch Enable */
+
+
+#define GEN5_WM_STATE_ThreadDispatchEnable_bits 1
+#define GEN45_WM_STATE_ThreadDispatchEnable_bits 1
+#define GEN4_WM_STATE_ThreadDispatchEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ThreadDispatchEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_ThreadDispatchEnable_start 179
+#define GEN45_WM_STATE_ThreadDispatchEnable_start 179
+#define GEN4_WM_STATE_ThreadDispatchEnable_start 179
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ThreadDispatchEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 179;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 179;
+ } else {
+ return 179;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* WM_STATE::Thread Priority */
+
+
+#define GEN5_WM_STATE_ThreadPriority_bits 1
+#define GEN45_WM_STATE_ThreadPriority_bits 1
+#define GEN4_WM_STATE_ThreadPriority_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ThreadPriority_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_WM_STATE_ThreadPriority_start 49
+#define GEN45_WM_STATE_ThreadPriority_start 49
+#define GEN4_WM_STATE_ThreadPriority_start 49
+
+static inline uint32_t ATTRIBUTE_PURE
+WM_STATE_ThreadPriority_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 49;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 49;
+ } else {
+ return 49;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT */
+
+
+#define GEN5_XY_COLOR_BLT_length 6
+#define GEN45_XY_COLOR_BLT_length 6
+#define GEN4_XY_COLOR_BLT_length 6
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 6;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 6;
+ } else {
+ return 6;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::2D Command Opcode */
+
+
+#define GEN5_XY_COLOR_BLT_2DCommandOpcode_bits 7
+#define GEN45_XY_COLOR_BLT_2DCommandOpcode_bits 7
+#define GEN4_XY_COLOR_BLT_2DCommandOpcode_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_2DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_2DCommandOpcode_start 22
+#define GEN45_XY_COLOR_BLT_2DCommandOpcode_start 22
+#define GEN4_XY_COLOR_BLT_2DCommandOpcode_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_2DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::32bpp Byte Mask */
+
+
+#define GEN5_XY_COLOR_BLT_32bppByteMask_bits 2
+#define GEN45_XY_COLOR_BLT_32bppByteMask_bits 2
+#define GEN4_XY_COLOR_BLT_32bppByteMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_32bppByteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_32bppByteMask_start 20
+#define GEN45_XY_COLOR_BLT_32bppByteMask_start 20
+#define GEN4_XY_COLOR_BLT_32bppByteMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_32bppByteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Clipping Enabled */
+
+
+#define GEN5_XY_COLOR_BLT_ClippingEnabled_bits 1
+#define GEN45_XY_COLOR_BLT_ClippingEnabled_bits 1
+#define GEN4_XY_COLOR_BLT_ClippingEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_ClippingEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_ClippingEnabled_start 62
+#define GEN45_XY_COLOR_BLT_ClippingEnabled_start 62
+#define GEN4_XY_COLOR_BLT_ClippingEnabled_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_ClippingEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 62;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 62;
+ } else {
+ return 62;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Color Depth */
+
+
+#define GEN5_XY_COLOR_BLT_ColorDepth_bits 3
+#define GEN45_XY_COLOR_BLT_ColorDepth_bits 2
+#define GEN4_XY_COLOR_BLT_ColorDepth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_ColorDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_ColorDepth_start 56
+#define GEN45_XY_COLOR_BLT_ColorDepth_start 56
+#define GEN4_XY_COLOR_BLT_ColorDepth_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_ColorDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 56;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 56;
+ } else {
+ return 56;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Command Type */
+
+
+#define GEN5_XY_COLOR_BLT_CommandType_bits 3
+#define GEN45_XY_COLOR_BLT_CommandType_bits 3
+#define GEN4_XY_COLOR_BLT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_CommandType_start 29
+#define GEN45_XY_COLOR_BLT_CommandType_start 29
+#define GEN4_XY_COLOR_BLT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::DWord Length */
+
+
+#define GEN5_XY_COLOR_BLT_DWordLength_bits 8
+#define GEN45_XY_COLOR_BLT_DWordLength_bits 8
+#define GEN4_XY_COLOR_BLT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DWordLength_start 0
+#define GEN45_XY_COLOR_BLT_DWordLength_start 0
+#define GEN4_XY_COLOR_BLT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination Base Address */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationBaseAddress_bits 32
+#define GEN45_XY_COLOR_BLT_DestinationBaseAddress_bits 32
+#define GEN4_XY_COLOR_BLT_DestinationBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationBaseAddress_start 128
+#define GEN45_XY_COLOR_BLT_DestinationBaseAddress_start 128
+#define GEN4_XY_COLOR_BLT_DestinationBaseAddress_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination Pitch */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationPitch_bits 16
+#define GEN45_XY_COLOR_BLT_DestinationPitch_bits 16
+#define GEN4_XY_COLOR_BLT_DestinationPitch_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationPitch_start 32
+#define GEN45_XY_COLOR_BLT_DestinationPitch_start 32
+#define GEN4_XY_COLOR_BLT_DestinationPitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination X1 Coordinate */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationX1Coordinate_bits 16
+#define GEN45_XY_COLOR_BLT_DestinationX1Coordinate_bits 16
+#define GEN4_XY_COLOR_BLT_DestinationX1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationX1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationX1Coordinate_start 64
+#define GEN45_XY_COLOR_BLT_DestinationX1Coordinate_start 64
+#define GEN4_XY_COLOR_BLT_DestinationX1Coordinate_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationX1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination X2 Coordinate */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationX2Coordinate_bits 16
+#define GEN45_XY_COLOR_BLT_DestinationX2Coordinate_bits 16
+#define GEN4_XY_COLOR_BLT_DestinationX2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationX2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationX2Coordinate_start 96
+#define GEN45_XY_COLOR_BLT_DestinationX2Coordinate_start 96
+#define GEN4_XY_COLOR_BLT_DestinationX2Coordinate_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationX2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination Y1 Coordinate */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationY1Coordinate_bits 16
+#define GEN45_XY_COLOR_BLT_DestinationY1Coordinate_bits 16
+#define GEN4_XY_COLOR_BLT_DestinationY1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationY1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationY1Coordinate_start 80
+#define GEN45_XY_COLOR_BLT_DestinationY1Coordinate_start 80
+#define GEN4_XY_COLOR_BLT_DestinationY1Coordinate_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationY1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Destination Y2 Coordinate */
+
+
+#define GEN5_XY_COLOR_BLT_DestinationY2Coordinate_bits 16
+#define GEN45_XY_COLOR_BLT_DestinationY2Coordinate_bits 16
+#define GEN4_XY_COLOR_BLT_DestinationY2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationY2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_DestinationY2Coordinate_start 112
+#define GEN45_XY_COLOR_BLT_DestinationY2Coordinate_start 112
+#define GEN4_XY_COLOR_BLT_DestinationY2Coordinate_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_DestinationY2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 112;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 112;
+ } else {
+ return 112;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Raster Operation */
+
+
+#define GEN5_XY_COLOR_BLT_RasterOperation_bits 8
+#define GEN45_XY_COLOR_BLT_RasterOperation_bits 8
+#define GEN4_XY_COLOR_BLT_RasterOperation_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_RasterOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_RasterOperation_start 48
+#define GEN45_XY_COLOR_BLT_RasterOperation_start 48
+#define GEN4_XY_COLOR_BLT_RasterOperation_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_RasterOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Solid Pattern Color */
+
+
+#define GEN5_XY_COLOR_BLT_SolidPatternColor_bits 32
+#define GEN45_XY_COLOR_BLT_SolidPatternColor_bits 32
+#define GEN4_XY_COLOR_BLT_SolidPatternColor_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_SolidPatternColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_SolidPatternColor_start 160
+#define GEN45_XY_COLOR_BLT_SolidPatternColor_start 160
+#define GEN4_XY_COLOR_BLT_SolidPatternColor_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_SolidPatternColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_COLOR_BLT::Tiling Enable */
+
+
+#define GEN5_XY_COLOR_BLT_TilingEnable_bits 1
+#define GEN45_XY_COLOR_BLT_TilingEnable_bits 1
+#define GEN4_XY_COLOR_BLT_TilingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_TilingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_COLOR_BLT_TilingEnable_start 11
+#define GEN45_XY_COLOR_BLT_TilingEnable_start 11
+#define GEN4_XY_COLOR_BLT_TilingEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_COLOR_BLT_TilingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT */
+
+
+#define GEN5_XY_SETUP_BLT_length 8
+#define GEN45_XY_SETUP_BLT_length 8
+#define GEN4_XY_SETUP_BLT_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::2D Command Opcode */
+
+
+#define GEN5_XY_SETUP_BLT_2DCommandOpcode_bits 7
+#define GEN45_XY_SETUP_BLT_2DCommandOpcode_bits 7
+#define GEN4_XY_SETUP_BLT_2DCommandOpcode_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_2DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_2DCommandOpcode_start 22
+#define GEN45_XY_SETUP_BLT_2DCommandOpcode_start 22
+#define GEN4_XY_SETUP_BLT_2DCommandOpcode_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_2DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::32bpp Byte Mask */
+
+
+#define GEN5_XY_SETUP_BLT_32bppByteMask_bits 2
+#define GEN45_XY_SETUP_BLT_32bppByteMask_bits 2
+#define GEN4_XY_SETUP_BLT_32bppByteMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_32bppByteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_32bppByteMask_start 20
+#define GEN45_XY_SETUP_BLT_32bppByteMask_start 20
+#define GEN4_XY_SETUP_BLT_32bppByteMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_32bppByteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Background Color */
+
+
+#define GEN5_XY_SETUP_BLT_BackgroundColor_bits 32
+#define GEN45_XY_SETUP_BLT_BackgroundColor_bits 32
+#define GEN4_XY_SETUP_BLT_BackgroundColor_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_BackgroundColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_BackgroundColor_start 160
+#define GEN45_XY_SETUP_BLT_BackgroundColor_start 160
+#define GEN4_XY_SETUP_BLT_BackgroundColor_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_BackgroundColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::ClipRect X1 Coordinate */
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectX1Coordinate_bits 16
+#define GEN45_XY_SETUP_BLT_ClipRectX1Coordinate_bits 16
+#define GEN4_XY_SETUP_BLT_ClipRectX1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectX1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectX1Coordinate_start 64
+#define GEN45_XY_SETUP_BLT_ClipRectX1Coordinate_start 64
+#define GEN4_XY_SETUP_BLT_ClipRectX1Coordinate_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectX1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::ClipRect X2 Coordinate */
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectX2Coordinate_bits 16
+#define GEN45_XY_SETUP_BLT_ClipRectX2Coordinate_bits 16
+#define GEN4_XY_SETUP_BLT_ClipRectX2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectX2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectX2Coordinate_start 96
+#define GEN45_XY_SETUP_BLT_ClipRectX2Coordinate_start 96
+#define GEN4_XY_SETUP_BLT_ClipRectX2Coordinate_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectX2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::ClipRect Y1 Coordinate */
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectY1Coordinate_bits 16
+#define GEN45_XY_SETUP_BLT_ClipRectY1Coordinate_bits 16
+#define GEN4_XY_SETUP_BLT_ClipRectY1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectY1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectY1Coordinate_start 80
+#define GEN45_XY_SETUP_BLT_ClipRectY1Coordinate_start 80
+#define GEN4_XY_SETUP_BLT_ClipRectY1Coordinate_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectY1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::ClipRect Y2 Coordinate */
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectY2Coordinate_bits 16
+#define GEN45_XY_SETUP_BLT_ClipRectY2Coordinate_bits 16
+#define GEN4_XY_SETUP_BLT_ClipRectY2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectY2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ClipRectY2Coordinate_start 112
+#define GEN45_XY_SETUP_BLT_ClipRectY2Coordinate_start 112
+#define GEN4_XY_SETUP_BLT_ClipRectY2Coordinate_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClipRectY2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 112;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 112;
+ } else {
+ return 112;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Clipping Enabled */
+
+
+#define GEN5_XY_SETUP_BLT_ClippingEnabled_bits 1
+#define GEN45_XY_SETUP_BLT_ClippingEnabled_bits 1
+#define GEN4_XY_SETUP_BLT_ClippingEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClippingEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ClippingEnabled_start 62
+#define GEN45_XY_SETUP_BLT_ClippingEnabled_start 62
+#define GEN4_XY_SETUP_BLT_ClippingEnabled_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ClippingEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 62;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 62;
+ } else {
+ return 62;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Color Depth */
+
+
+#define GEN5_XY_SETUP_BLT_ColorDepth_bits 2
+#define GEN45_XY_SETUP_BLT_ColorDepth_bits 2
+#define GEN4_XY_SETUP_BLT_ColorDepth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ColorDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ColorDepth_start 56
+#define GEN45_XY_SETUP_BLT_ColorDepth_start 56
+#define GEN4_XY_SETUP_BLT_ColorDepth_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ColorDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 56;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 56;
+ } else {
+ return 56;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Command Type */
+
+
+#define GEN5_XY_SETUP_BLT_CommandType_bits 3
+#define GEN45_XY_SETUP_BLT_CommandType_bits 3
+#define GEN4_XY_SETUP_BLT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_CommandType_start 29
+#define GEN45_XY_SETUP_BLT_CommandType_start 29
+#define GEN4_XY_SETUP_BLT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::DWord Length */
+
+
+#define GEN5_XY_SETUP_BLT_DWordLength_bits 8
+#define GEN45_XY_SETUP_BLT_DWordLength_bits 8
+#define GEN4_XY_SETUP_BLT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_DWordLength_start 0
+#define GEN45_XY_SETUP_BLT_DWordLength_start 0
+#define GEN4_XY_SETUP_BLT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Destination Base Address */
+
+
+#define GEN5_XY_SETUP_BLT_DestinationBaseAddress_bits 32
+#define GEN45_XY_SETUP_BLT_DestinationBaseAddress_bits 32
+#define GEN4_XY_SETUP_BLT_DestinationBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DestinationBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_DestinationBaseAddress_start 128
+#define GEN45_XY_SETUP_BLT_DestinationBaseAddress_start 128
+#define GEN4_XY_SETUP_BLT_DestinationBaseAddress_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DestinationBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Destination Pitch */
+
+
+#define GEN5_XY_SETUP_BLT_DestinationPitch_bits 16
+#define GEN45_XY_SETUP_BLT_DestinationPitch_bits 16
+#define GEN4_XY_SETUP_BLT_DestinationPitch_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DestinationPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_DestinationPitch_start 32
+#define GEN45_XY_SETUP_BLT_DestinationPitch_start 32
+#define GEN4_XY_SETUP_BLT_DestinationPitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_DestinationPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Foreground Color */
+
+
+#define GEN5_XY_SETUP_BLT_ForegroundColor_bits 32
+#define GEN45_XY_SETUP_BLT_ForegroundColor_bits 32
+#define GEN4_XY_SETUP_BLT_ForegroundColor_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ForegroundColor_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_ForegroundColor_start 192
+#define GEN45_XY_SETUP_BLT_ForegroundColor_start 192
+#define GEN4_XY_SETUP_BLT_ForegroundColor_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_ForegroundColor_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Mono Source Transparency Mode */
+
+
+#define GEN5_XY_SETUP_BLT_MonoSourceTransparencyMode_bits 1
+#define GEN45_XY_SETUP_BLT_MonoSourceTransparencyMode_bits 1
+#define GEN4_XY_SETUP_BLT_MonoSourceTransparencyMode_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_MonoSourceTransparencyMode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_MonoSourceTransparencyMode_start 60
+#define GEN45_XY_SETUP_BLT_MonoSourceTransparencyMode_start 61
+#define GEN4_XY_SETUP_BLT_MonoSourceTransparencyMode_start 61
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_MonoSourceTransparencyMode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 60;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 61;
+ } else {
+ return 61;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Pattern Base Address */
+
+
+#define GEN5_XY_SETUP_BLT_PatternBaseAddress_bits 32
+#define GEN45_XY_SETUP_BLT_PatternBaseAddress_bits 32
+#define GEN4_XY_SETUP_BLT_PatternBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_PatternBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_PatternBaseAddress_start 224
+#define GEN45_XY_SETUP_BLT_PatternBaseAddress_start 224
+#define GEN4_XY_SETUP_BLT_PatternBaseAddress_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_PatternBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Raster Operation */
+
+
+#define GEN5_XY_SETUP_BLT_RasterOperation_bits 8
+#define GEN45_XY_SETUP_BLT_RasterOperation_bits 8
+#define GEN4_XY_SETUP_BLT_RasterOperation_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_RasterOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_RasterOperation_start 48
+#define GEN45_XY_SETUP_BLT_RasterOperation_start 48
+#define GEN4_XY_SETUP_BLT_RasterOperation_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_RasterOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SETUP_BLT::Tiling Enable */
+
+
+#define GEN5_XY_SETUP_BLT_TilingEnable_bits 1
+#define GEN45_XY_SETUP_BLT_TilingEnable_bits 1
+#define GEN4_XY_SETUP_BLT_TilingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_TilingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SETUP_BLT_TilingEnable_start 11
+#define GEN45_XY_SETUP_BLT_TilingEnable_start 11
+#define GEN4_XY_SETUP_BLT_TilingEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SETUP_BLT_TilingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT */
+
+
+#define GEN5_XY_SRC_COPY_BLT_length 8
+#define GEN45_XY_SRC_COPY_BLT_length 8
+#define GEN4_XY_SRC_COPY_BLT_length 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::2D Command Opcode */
+
+
+#define GEN5_XY_SRC_COPY_BLT_2DCommandOpcode_bits 7
+#define GEN45_XY_SRC_COPY_BLT_2DCommandOpcode_bits 7
+#define GEN4_XY_SRC_COPY_BLT_2DCommandOpcode_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_2DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_2DCommandOpcode_start 22
+#define GEN45_XY_SRC_COPY_BLT_2DCommandOpcode_start 22
+#define GEN4_XY_SRC_COPY_BLT_2DCommandOpcode_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_2DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::32bpp Byte Mask */
+
+
+#define GEN5_XY_SRC_COPY_BLT_32bppByteMask_bits 2
+#define GEN45_XY_SRC_COPY_BLT_32bppByteMask_bits 2
+#define GEN4_XY_SRC_COPY_BLT_32bppByteMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_32bppByteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_32bppByteMask_start 20
+#define GEN45_XY_SRC_COPY_BLT_32bppByteMask_start 20
+#define GEN4_XY_SRC_COPY_BLT_32bppByteMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_32bppByteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Clipping Enabled */
+
+
+#define GEN5_XY_SRC_COPY_BLT_ClippingEnabled_bits 1
+#define GEN45_XY_SRC_COPY_BLT_ClippingEnabled_bits 1
+#define GEN4_XY_SRC_COPY_BLT_ClippingEnabled_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_ClippingEnabled_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_ClippingEnabled_start 62
+#define GEN45_XY_SRC_COPY_BLT_ClippingEnabled_start 62
+#define GEN4_XY_SRC_COPY_BLT_ClippingEnabled_start 62
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_ClippingEnabled_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 62;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 62;
+ } else {
+ return 62;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Color Depth */
+
+
+#define GEN5_XY_SRC_COPY_BLT_ColorDepth_bits 3
+#define GEN45_XY_SRC_COPY_BLT_ColorDepth_bits 2
+#define GEN4_XY_SRC_COPY_BLT_ColorDepth_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_ColorDepth_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_ColorDepth_start 56
+#define GEN45_XY_SRC_COPY_BLT_ColorDepth_start 56
+#define GEN4_XY_SRC_COPY_BLT_ColorDepth_start 56
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_ColorDepth_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 56;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 56;
+ } else {
+ return 56;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Command Type */
+
+
+#define GEN5_XY_SRC_COPY_BLT_CommandType_bits 3
+#define GEN45_XY_SRC_COPY_BLT_CommandType_bits 3
+#define GEN4_XY_SRC_COPY_BLT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_CommandType_start 29
+#define GEN45_XY_SRC_COPY_BLT_CommandType_start 29
+#define GEN4_XY_SRC_COPY_BLT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::DWord Length */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DWordLength_bits 8
+#define GEN45_XY_SRC_COPY_BLT_DWordLength_bits 8
+#define GEN4_XY_SRC_COPY_BLT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DWordLength_start 0
+#define GEN45_XY_SRC_COPY_BLT_DWordLength_start 0
+#define GEN4_XY_SRC_COPY_BLT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination Base Address */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationBaseAddress_bits 32
+#define GEN45_XY_SRC_COPY_BLT_DestinationBaseAddress_bits 32
+#define GEN4_XY_SRC_COPY_BLT_DestinationBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationBaseAddress_start 128
+#define GEN45_XY_SRC_COPY_BLT_DestinationBaseAddress_start 128
+#define GEN4_XY_SRC_COPY_BLT_DestinationBaseAddress_start 128
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 128;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 128;
+ } else {
+ return 128;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination Pitch */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationPitch_bits 16
+#define GEN45_XY_SRC_COPY_BLT_DestinationPitch_bits 16
+#define GEN4_XY_SRC_COPY_BLT_DestinationPitch_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationPitch_start 32
+#define GEN45_XY_SRC_COPY_BLT_DestinationPitch_start 32
+#define GEN4_XY_SRC_COPY_BLT_DestinationPitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination Tiling Enable */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationTilingEnable_bits 1
+#define GEN45_XY_SRC_COPY_BLT_DestinationTilingEnable_bits 1
+#define GEN4_XY_SRC_COPY_BLT_DestinationTilingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationTilingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationTilingEnable_start 11
+#define GEN45_XY_SRC_COPY_BLT_DestinationTilingEnable_start 11
+#define GEN4_XY_SRC_COPY_BLT_DestinationTilingEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationTilingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination X1 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationX1Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_DestinationX1Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_DestinationX1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationX1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationX1Coordinate_start 64
+#define GEN45_XY_SRC_COPY_BLT_DestinationX1Coordinate_start 64
+#define GEN4_XY_SRC_COPY_BLT_DestinationX1Coordinate_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationX1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination X2 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationX2Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_DestinationX2Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_DestinationX2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationX2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationX2Coordinate_start 96
+#define GEN45_XY_SRC_COPY_BLT_DestinationX2Coordinate_start 96
+#define GEN4_XY_SRC_COPY_BLT_DestinationX2Coordinate_start 96
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationX2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 96;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 96;
+ } else {
+ return 96;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination Y1 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationY1Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_DestinationY1Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_DestinationY1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationY1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationY1Coordinate_start 80
+#define GEN45_XY_SRC_COPY_BLT_DestinationY1Coordinate_start 80
+#define GEN4_XY_SRC_COPY_BLT_DestinationY1Coordinate_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationY1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Destination Y2 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationY2Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_DestinationY2Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_DestinationY2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationY2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_DestinationY2Coordinate_start 112
+#define GEN45_XY_SRC_COPY_BLT_DestinationY2Coordinate_start 112
+#define GEN4_XY_SRC_COPY_BLT_DestinationY2Coordinate_start 112
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_DestinationY2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 112;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 112;
+ } else {
+ return 112;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Raster Operation */
+
+
+#define GEN5_XY_SRC_COPY_BLT_RasterOperation_bits 8
+#define GEN45_XY_SRC_COPY_BLT_RasterOperation_bits 8
+#define GEN4_XY_SRC_COPY_BLT_RasterOperation_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_RasterOperation_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_RasterOperation_start 48
+#define GEN45_XY_SRC_COPY_BLT_RasterOperation_start 48
+#define GEN4_XY_SRC_COPY_BLT_RasterOperation_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_RasterOperation_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Source Base Address */
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceBaseAddress_bits 32
+#define GEN45_XY_SRC_COPY_BLT_SourceBaseAddress_bits 32
+#define GEN4_XY_SRC_COPY_BLT_SourceBaseAddress_bits 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceBaseAddress_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceBaseAddress_start 224
+#define GEN45_XY_SRC_COPY_BLT_SourceBaseAddress_start 224
+#define GEN4_XY_SRC_COPY_BLT_SourceBaseAddress_start 224
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceBaseAddress_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 224;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 224;
+ } else {
+ return 224;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Source Pitch */
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourcePitch_bits 16
+#define GEN45_XY_SRC_COPY_BLT_SourcePitch_bits 16
+#define GEN4_XY_SRC_COPY_BLT_SourcePitch_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourcePitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourcePitch_start 192
+#define GEN45_XY_SRC_COPY_BLT_SourcePitch_start 192
+#define GEN4_XY_SRC_COPY_BLT_SourcePitch_start 192
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourcePitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 192;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 192;
+ } else {
+ return 192;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Source Tiling Enable */
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceTilingEnable_bits 1
+#define GEN45_XY_SRC_COPY_BLT_SourceTilingEnable_bits 1
+#define GEN4_XY_SRC_COPY_BLT_SourceTilingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceTilingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceTilingEnable_start 15
+#define GEN45_XY_SRC_COPY_BLT_SourceTilingEnable_start 15
+#define GEN4_XY_SRC_COPY_BLT_SourceTilingEnable_start 15
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceTilingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 15;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 15;
+ } else {
+ return 15;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Source X1 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceX1Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_SourceX1Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_SourceX1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceX1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceX1Coordinate_start 160
+#define GEN45_XY_SRC_COPY_BLT_SourceX1Coordinate_start 160
+#define GEN4_XY_SRC_COPY_BLT_SourceX1Coordinate_start 160
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceX1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 160;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 160;
+ } else {
+ return 160;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_SRC_COPY_BLT::Source Y1 Coordinate */
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceY1Coordinate_bits 16
+#define GEN45_XY_SRC_COPY_BLT_SourceY1Coordinate_bits 16
+#define GEN4_XY_SRC_COPY_BLT_SourceY1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceY1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_SRC_COPY_BLT_SourceY1Coordinate_start 176
+#define GEN45_XY_SRC_COPY_BLT_SourceY1Coordinate_start 176
+#define GEN4_XY_SRC_COPY_BLT_SourceY1Coordinate_start 176
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_SRC_COPY_BLT_SourceY1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 176;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 176;
+ } else {
+ return 176;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_length 3
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_length 3
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_length 3
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_length(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::2D Command Opcode */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_bits 7
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_bits 7
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_bits 7
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 7;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 7;
+ } else {
+ return 7;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_start 22
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_start 22
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_start 22
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_2DCommandOpcode_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 22;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 22;
+ } else {
+ return 22;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::32bpp Byte Mask */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_bits 2
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_bits 2
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_bits 2
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_32bppByteMask_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 2;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 2;
+ } else {
+ return 2;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_start 20
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_start 20
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_32bppByteMask_start 20
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_32bppByteMask_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 20;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 20;
+ } else {
+ return 20;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Command Type */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_CommandType_bits 3
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_CommandType_bits 3
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_CommandType_bits 3
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_CommandType_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 3;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 3;
+ } else {
+ return 3;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_CommandType_start 29
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_CommandType_start 29
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_CommandType_start 29
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_CommandType_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 29;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 29;
+ } else {
+ return 29;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::DWord Length */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DWordLength_bits 8
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DWordLength_bits 8
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DWordLength_bits 8
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DWordLength_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 8;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 8;
+ } else {
+ return 8;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DWordLength_start 0
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DWordLength_start 0
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DWordLength_start 0
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DWordLength_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 0;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 0;
+ } else {
+ return 0;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Destination Pitch */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_bits 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_bits 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationPitch_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_start 32
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_start 32
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationPitch_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationPitch_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Destination X1 Coordinate */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_bits 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_bits 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_start 32
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_start 32
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_start 32
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationX1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 32;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 32;
+ } else {
+ return 32;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Destination X2 Coordinate */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_bits 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_bits 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_start 64
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_start 64
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_start 64
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationX2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 64;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 64;
+ } else {
+ return 64;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Destination Y1 Coordinate */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_bits 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_bits 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_start 48
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_start 48
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_start 48
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationY1Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 48;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 48;
+ } else {
+ return 48;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Destination Y2 Coordinate */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_bits 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_bits 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_bits 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_start 80
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_start 80
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_start 80
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_DestinationY2Coordinate_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 80;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 80;
+ } else {
+ return 80;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Packing */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_Packing_bits 1
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_Packing_bits 1
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_Packing_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_Packing_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_Packing_start 16
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_Packing_start 16
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_Packing_start 16
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_Packing_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 16;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 16;
+ } else {
+ return 16;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+/* XY_TEXT_IMMEDIATE_BLT::Tiling Enable */
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_TilingEnable_bits 1
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_TilingEnable_bits 1
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_TilingEnable_bits 1
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_TilingEnable_bits(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 1;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 1;
+ } else {
+ return 1;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#define GEN5_XY_TEXT_IMMEDIATE_BLT_TilingEnable_start 11
+#define GEN45_XY_TEXT_IMMEDIATE_BLT_TilingEnable_start 11
+#define GEN4_XY_TEXT_IMMEDIATE_BLT_TilingEnable_start 11
+
+static inline uint32_t ATTRIBUTE_PURE
+XY_TEXT_IMMEDIATE_BLT_TilingEnable_start(const struct gen_device_info *devinfo)
+{
+ switch (devinfo->gen) {
+ case 10: return 0;
+ case 9: return 0;
+ case 8: return 0;
+ case 7:
+ if (devinfo->is_haswell) {
+ return 0;
+ } else {
+ return 0;
+ }
+ case 6: return 0;
+ case 5: return 11;
+ case 4:
+ if (devinfo->is_g4x) {
+ return 11;
+ } else {
+ return 11;
+ }
+ default:
+ unreachable("Invalid hardware generation");
+ }
+}
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GENX_BITS_H */
\ No newline at end of file
diff --git a/prebuilt-intermediates/glsl/ir_expression_operation.h b/prebuilt-intermediates/glsl/ir_expression_operation.h
new file mode 100644
index 0000000..304a87b
--- /dev/null
+++ b/prebuilt-intermediates/glsl/ir_expression_operation.h
@@ -0,0 +1,172 @@
+/*
+ * Copyright (C) 2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+enum ir_expression_operation {
+ ir_unop_bit_not,
+ ir_unop_logic_not,
+ ir_unop_neg,
+ ir_unop_abs,
+ ir_unop_sign,
+ ir_unop_rcp,
+ ir_unop_rsq,
+ ir_unop_sqrt,
+ ir_unop_exp,
+ ir_unop_log,
+ ir_unop_exp2,
+ ir_unop_log2,
+ ir_unop_f2i,
+ ir_unop_f2u,
+ ir_unop_i2f,
+ ir_unop_f2b,
+ ir_unop_b2f,
+ ir_unop_i2b,
+ ir_unop_b2i,
+ ir_unop_u2f,
+ ir_unop_i2u,
+ ir_unop_u2i,
+ ir_unop_d2f,
+ ir_unop_f2d,
+ ir_unop_d2i,
+ ir_unop_i2d,
+ ir_unop_d2u,
+ ir_unop_u2d,
+ ir_unop_d2b,
+ ir_unop_bitcast_i2f,
+ ir_unop_bitcast_f2i,
+ ir_unop_bitcast_u2f,
+ ir_unop_bitcast_f2u,
+ ir_unop_bitcast_u642d,
+ ir_unop_bitcast_i642d,
+ ir_unop_bitcast_d2u64,
+ ir_unop_bitcast_d2i64,
+ ir_unop_i642i,
+ ir_unop_u642i,
+ ir_unop_i642u,
+ ir_unop_u642u,
+ ir_unop_i642b,
+ ir_unop_i642f,
+ ir_unop_u642f,
+ ir_unop_i642d,
+ ir_unop_u642d,
+ ir_unop_i2i64,
+ ir_unop_u2i64,
+ ir_unop_b2i64,
+ ir_unop_f2i64,
+ ir_unop_d2i64,
+ ir_unop_i2u64,
+ ir_unop_u2u64,
+ ir_unop_f2u64,
+ ir_unop_d2u64,
+ ir_unop_u642i64,
+ ir_unop_i642u64,
+ ir_unop_trunc,
+ ir_unop_ceil,
+ ir_unop_floor,
+ ir_unop_fract,
+ ir_unop_round_even,
+ ir_unop_sin,
+ ir_unop_cos,
+ ir_unop_dFdx,
+ ir_unop_dFdx_coarse,
+ ir_unop_dFdx_fine,
+ ir_unop_dFdy,
+ ir_unop_dFdy_coarse,
+ ir_unop_dFdy_fine,
+ ir_unop_pack_snorm_2x16,
+ ir_unop_pack_snorm_4x8,
+ ir_unop_pack_unorm_2x16,
+ ir_unop_pack_unorm_4x8,
+ ir_unop_pack_half_2x16,
+ ir_unop_unpack_snorm_2x16,
+ ir_unop_unpack_snorm_4x8,
+ ir_unop_unpack_unorm_2x16,
+ ir_unop_unpack_unorm_4x8,
+ ir_unop_unpack_half_2x16,
+ ir_unop_bitfield_reverse,
+ ir_unop_bit_count,
+ ir_unop_find_msb,
+ ir_unop_find_lsb,
+ ir_unop_saturate,
+ ir_unop_pack_double_2x32,
+ ir_unop_unpack_double_2x32,
+ ir_unop_pack_sampler_2x32,
+ ir_unop_pack_image_2x32,
+ ir_unop_unpack_sampler_2x32,
+ ir_unop_unpack_image_2x32,
+ ir_unop_frexp_sig,
+ ir_unop_frexp_exp,
+ ir_unop_noise,
+ ir_unop_subroutine_to_int,
+ ir_unop_interpolate_at_centroid,
+ ir_unop_get_buffer_size,
+ ir_unop_ssbo_unsized_array_length,
+ ir_unop_pack_int_2x32,
+ ir_unop_pack_uint_2x32,
+ ir_unop_unpack_int_2x32,
+ ir_unop_unpack_uint_2x32,
+ ir_binop_add,
+ ir_binop_sub,
+ ir_binop_mul,
+ ir_binop_imul_high,
+ ir_binop_div,
+ ir_binop_carry,
+ ir_binop_borrow,
+ ir_binop_mod,
+ ir_binop_less,
+ ir_binop_gequal,
+ ir_binop_equal,
+ ir_binop_nequal,
+ ir_binop_all_equal,
+ ir_binop_any_nequal,
+ ir_binop_lshift,
+ ir_binop_rshift,
+ ir_binop_bit_and,
+ ir_binop_bit_xor,
+ ir_binop_bit_or,
+ ir_binop_logic_and,
+ ir_binop_logic_xor,
+ ir_binop_logic_or,
+ ir_binop_dot,
+ ir_binop_min,
+ ir_binop_max,
+ ir_binop_pow,
+ ir_binop_ubo_load,
+ ir_binop_ldexp,
+ ir_binop_vector_extract,
+ ir_binop_interpolate_at_offset,
+ ir_binop_interpolate_at_sample,
+ ir_triop_fma,
+ ir_triop_lrp,
+ ir_triop_csel,
+ ir_triop_bitfield_extract,
+ ir_triop_vector_insert,
+ ir_quadop_bitfield_insert,
+ ir_quadop_vector,
+
+ /* Sentinels marking the last of each kind of operation. */
+ ir_last_unop = ir_unop_unpack_uint_2x32,
+ ir_last_binop = ir_binop_interpolate_at_sample,
+ ir_last_triop = ir_triop_vector_insert,
+ ir_last_quadop = ir_quadop_vector,
+ ir_last_opcode = ir_quadop_vector
+};
diff --git a/prebuilt-intermediates/glsl/ir_expression_operation_constant.h b/prebuilt-intermediates/glsl/ir_expression_operation_constant.h
new file mode 100644
index 0000000..19c4f86
--- /dev/null
+++ b/prebuilt-intermediates/glsl/ir_expression_operation_constant.h
@@ -0,0 +1,1871 @@
+ switch (this->operation) {
+ case ir_unop_bit_not:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = ~ op[0]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = ~ op[0]->value.i[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = ~ op[0]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = ~ op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_logic_not:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.b[c] = !op[0]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_neg:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = -((int) op[0]->value.u[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = -op[0]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = -op[0]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = -op[0]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = -op[0]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = -op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_abs:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c] < 0 ? -op[0]->value.i[c] : op[0]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = fabsf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = fabs(op[0]->value.d[c]);
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c] < 0 ? -op[0]->value.i64[c] : op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_sign:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.i[c] = (op[0]->value.i[c] > 0) - (op[0]->value.i[c] < 0);
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = float((op[0]->value.f[c] > 0.0F) - (op[0]->value.f[c] < 0.0F));
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = double((op[0]->value.d[c] > 0.0) - (op[0]->value.d[c] < 0.0));
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = (op[0]->value.i64[c] > 0) - (op[0]->value.i64[c] < 0);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_rcp:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 1.0F / op[0]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = 1.0 / op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_rsq:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 1.0F / sqrtf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = 1.0 / sqrt(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_sqrt:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = sqrtf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = sqrt(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_exp:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = expf(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_log:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = logf(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_exp2:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = exp2f(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_log2:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = log2f(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.i[c] = (int) op[0]->value.f[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[c] = (unsigned) op[0]->value.f[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.f[c] = (float) op[0]->value.i[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2b:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.b[c] = op[0]->value.f[c] != 0.0F ? true : false;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_b2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.f[c] = op[0]->value.b[c] ? 1.0F : 0.0F;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2b:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.b[c] = op[0]->value.u[c] ? true : false;
+ break;
+ case GLSL_TYPE_INT:
+ data.b[c] = op[0]->value.i[c] ? true : false;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_b2i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.i[c] = op[0]->value.b[c] ? 1 : 0;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.f[c] = (float) op[0]->value.u[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.u[c] = op[0]->value.i[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u2i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i[c] = op[0]->value.u[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.f[c] = op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.d[c] = op[0]->value.f[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.i[c] = op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.d[c] = op[0]->value.i[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.u[c] = op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u2d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.d[c] = op[0]->value.u[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2b:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.b[c] = op[0]->value.d[c] != 0.0;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_i2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.f[c] = bitcast_u2f(op[0]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_f2i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.i[c] = bitcast_f2u(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_u2f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.f[c] = bitcast_u2f(op[0]->value.u[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_f2u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[c] = bitcast_f2u(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_u642d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.d[c] = bitcast_u642d(op[0]->value.u64[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_i642d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.d[c] = bitcast_i642d(op[0]->value.i64[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_d2u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.u64[c] = bitcast_d2u64(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bitcast_d2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.i64[c] = bitcast_d2i64(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.i[c] = op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u642i:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.i[c] = op[0]->value.u64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.u[c] = op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u642u:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.u[c] = op[0]->value.u64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642b:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.b[c] = op[0]->value.i64[c] != 0;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.f[c] = op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u642f:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.f[c] = op[0]->value.u64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.d[c] = op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u642d:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.d[c] = op[0]->value.u64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.i64[c] = op[0]->value.i[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i64[c] = op[0]->value.u[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_b2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.i64[c] = op[0]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.i64[c] = op[0]->value.f[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.i64[c] = op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i2u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT:
+ data.u64[c] = op[0]->value.i[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u2u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u64[c] = op[0]->value.u[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_f2u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u64[c] = op[0]->value.f[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_d2u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_DOUBLE:
+ data.u64[c] = op[0]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_u642i64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT64:
+ data.i64[c] = op[0]->value.u64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_i642u64:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_INT64:
+ data.u64[c] = op[0]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_trunc:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = truncf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = trunc(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_ceil:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = ceilf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = ceil(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_floor:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = floorf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = floor(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_fract:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c] - floorf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c] - floor(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_round_even:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = _mesa_roundevenf(op[0]->value.f[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = _mesa_roundeven(op[0]->value.d[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_sin:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = sinf(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_cos:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = cosf(op[0]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdx:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdx_coarse:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdx_fine:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdy:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdy_coarse:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_dFdy_fine:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = 0.0f;
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_pack_snorm_2x16:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[0] = pack_2x16(pack_snorm_1x16, op[0]->value.f[0], op[0]->value.f[1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_unop_pack_snorm_4x8:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[0] = pack_4x8(pack_snorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_unop_pack_unorm_2x16:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[0] = pack_2x16(pack_unorm_1x16, op[0]->value.f[0], op[0]->value.f[1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_unop_pack_unorm_4x8:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[0] = pack_4x8(pack_unorm_1x8, op[0]->value.f[0], op[0]->value.f[1], op[0]->value.f[2], op[0]->value.f[3]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_unop_pack_half_2x16:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.u[0] = pack_2x16(pack_half_1x16, op[0]->value.f[0], op[0]->value.f[1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_unop_unpack_snorm_2x16:
+ unpack_2x16(unpack_snorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]);
+ break;
+
+ case ir_unop_unpack_snorm_4x8:
+ unpack_4x8(unpack_snorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3]);
+ break;
+
+ case ir_unop_unpack_unorm_2x16:
+ unpack_2x16(unpack_unorm_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]);
+ break;
+
+ case ir_unop_unpack_unorm_4x8:
+ unpack_4x8(unpack_unorm_1x8, op[0]->value.u[0], &data.f[0], &data.f[1], &data.f[2], &data.f[3]);
+ break;
+
+ case ir_unop_unpack_half_2x16:
+ unpack_2x16(unpack_half_1x16, op[0]->value.u[0], &data.f[0], &data.f[1]);
+ break;
+
+ case ir_unop_bitfield_reverse:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = bitfield_reverse(op[0]->value.u[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = bitfield_reverse(op[0]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_bit_count:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i[c] = _mesa_bitcount(op[0]->value.u[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = _mesa_bitcount(op[0]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_find_msb:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i[c] = find_msb_uint(op[0]->value.u[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = find_msb_int(op[0]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_find_lsb:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i[c] = find_msb_uint(op[0]->value.u[c] & -op[0]->value.u[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = find_msb_uint(op[0]->value.i[c] & -op[0]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_saturate:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = CLAMP(op[0]->value.f[c], 0.0f, 1.0f);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_unop_pack_double_2x32:
+ memcpy(&data.d[0], &op[0]->value.u[0], sizeof(double));
+ break;
+
+ case ir_unop_unpack_double_2x32:
+ memcpy(&data.u[0], &op[0]->value.d[0], sizeof(double));
+ break;
+
+ case ir_unop_pack_sampler_2x32:
+ memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t));
+ break;
+
+ case ir_unop_pack_image_2x32:
+ memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t));
+ break;
+
+ case ir_unop_unpack_sampler_2x32:
+ memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t));
+ break;
+
+ case ir_unop_unpack_image_2x32:
+ memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t));
+ break;
+
+ case ir_unop_pack_int_2x32:
+ memcpy(&data.i64[0], &op[0]->value.i[0], sizeof(int64_t));
+ break;
+
+ case ir_unop_pack_uint_2x32:
+ memcpy(&data.u64[0], &op[0]->value.u[0], sizeof(uint64_t));
+ break;
+
+ case ir_unop_unpack_int_2x32:
+ memcpy(&data.i[0], &op[0]->value.i64[0], sizeof(int64_t));
+ break;
+
+ case ir_unop_unpack_uint_2x32:
+ memcpy(&data.u[0], &op[0]->value.u64[0], sizeof(uint64_t));
+ break;
+
+ case ir_binop_add:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] + op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] + op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c0] + op[1]->value.f[c1];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c0] + op[1]->value.d[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] + op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] + op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_sub:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] - op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] - op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] - op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] - op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_mul:
+ /* Check for equal types, or unequal types involving scalars */
+ if ((op[0]->type == op[1]->type && !op[0]->type->is_matrix())
+ || op0_scalar || op1_scalar) {
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] * op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] * op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c0] * op[1]->value.f[c1];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c0] * op[1]->value.d[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] * op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] * op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ } else {
+ assert(op[0]->type->is_matrix() || op[1]->type->is_matrix());
+
+ /* Multiply an N-by-M matrix with an M-by-P matrix. Since either
+ * matrix can be a GLSL vector, either N or P can be 1.
+ *
+ * For vec*mat, the vector is treated as a row vector. This
+ * means the vector is a 1-row x M-column matrix.
+ *
+ * For mat*vec, the vector is treated as a column vector. Since
+ * matrix_columns is 1 for vectors, this just works.
+ */
+ const unsigned n = op[0]->type->is_vector()
+ ? 1 : op[0]->type->vector_elements;
+ const unsigned m = op[1]->type->vector_elements;
+ const unsigned p = op[1]->type->matrix_columns;
+ for (unsigned j = 0; j < p; j++) {
+ for (unsigned i = 0; i < n; i++) {
+ for (unsigned k = 0; k < m; k++) {
+ if (op[0]->type->is_double())
+ data.d[i+n*j] += op[0]->value.d[i+n*k]*op[1]->value.d[k+m*j];
+ else
+ data.f[i+n*j] += op[0]->value.f[i+n*k]*op[1]->value.f[k+m*j];
+ }
+ }
+ }
+ }
+ break;
+
+ case ir_binop_div:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[1]->value.u[c1] == 0 ? 0 : op[0]->value.u[c0] / op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[1]->value.i[c1] == 0 ? 0 : op[0]->value.i[c0] / op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c0] / op[1]->value.f[c1];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c0] / op[1]->value.d[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[1]->value.u64[c1] == 0 ? 0 : op[0]->value.u64[c0] / op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[1]->value.i64[c1] == 0 ? 0 : op[0]->value.i64[c0] / op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_mod:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[1]->value.u[c1] == 0 ? 0 : op[0]->value.u[c0] % op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[1]->value.i[c1] == 0 ? 0 : op[0]->value.i[c0] % op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c0] - op[1]->value.f[c1] * floorf(op[0]->value.f[c0] / op[1]->value.f[c1]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c0] - op[1]->value.d[c1] * floor(op[0]->value.d[c0] / op[1]->value.d[c1]);
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[1]->value.u64[c1] == 0 ? 0 : op[0]->value.u64[c0] % op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[1]->value.i64[c1] == 0 ? 0 : op[0]->value.i64[c0] % op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_less:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.b[c] = op[0]->value.u[c] < op[1]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.b[c] = op[0]->value.i[c] < op[1]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.b[c] = op[0]->value.f[c] < op[1]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.b[c] = op[0]->value.d[c] < op[1]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.b[c] = op[0]->value.u64[c] < op[1]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.b[c] = op[0]->value.i64[c] < op[1]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_gequal:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.b[c] = op[0]->value.u[c] >= op[1]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.b[c] = op[0]->value.i[c] >= op[1]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.b[c] = op[0]->value.f[c] >= op[1]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.b[c] = op[0]->value.d[c] >= op[1]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.b[c] = op[0]->value.u64[c] >= op[1]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.b[c] = op[0]->value.i64[c] >= op[1]->value.i64[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_equal:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.b[c] = op[0]->value.u[c] == op[1]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.b[c] = op[0]->value.i[c] == op[1]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.b[c] = op[0]->value.f[c] == op[1]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.b[c] = op[0]->value.d[c] == op[1]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.b[c] = op[0]->value.u64[c] == op[1]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.b[c] = op[0]->value.i64[c] == op[1]->value.i64[c];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] == op[1]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_nequal:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.b[c] = op[0]->value.u[c] != op[1]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.b[c] = op[0]->value.i[c] != op[1]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.b[c] = op[0]->value.f[c] != op[1]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.b[c] = op[0]->value.d[c] != op[1]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.b[c] = op[0]->value.u64[c] != op[1]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.b[c] = op[0]->value.i64[c] != op[1]->value.i64[c];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] != op[1]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_all_equal:
+ data.b[0] = op[0]->has_value(op[1]);
+ break;
+
+ case ir_binop_any_nequal:
+ data.b[0] = !op[0]->has_value(op[1]);
+ break;
+
+ case ir_binop_lshift:
+ assert(op[0]->type->base_type == GLSL_TYPE_UINT ||
+ op[0]->type->base_type == GLSL_TYPE_INT ||
+ op[0]->type->base_type == GLSL_TYPE_UINT64 ||
+ op[0]->type->base_type == GLSL_TYPE_INT64);
+ assert(op[1]->type->base_type == GLSL_TYPE_UINT ||
+ op[1]->type->base_type == GLSL_TYPE_INT ||
+ op[1]->type->base_type == GLSL_TYPE_UINT64 ||
+ op[1]->type->base_type == GLSL_TYPE_INT64);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] << op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] << op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] << op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] << op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_rshift:
+ assert(op[0]->type->base_type == GLSL_TYPE_UINT ||
+ op[0]->type->base_type == GLSL_TYPE_INT ||
+ op[0]->type->base_type == GLSL_TYPE_UINT64 ||
+ op[0]->type->base_type == GLSL_TYPE_INT64);
+ assert(op[1]->type->base_type == GLSL_TYPE_UINT ||
+ op[1]->type->base_type == GLSL_TYPE_INT ||
+ op[1]->type->base_type == GLSL_TYPE_UINT64 ||
+ op[1]->type->base_type == GLSL_TYPE_INT64);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] >> op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] >> op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] >> op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] >> op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_bit_and:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] & op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] & op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] & op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] & op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_bit_xor:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] ^ op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] ^ op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] ^ op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] ^ op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_bit_or:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.u[c0] | op[1]->value.u[c1];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.i[c0] | op[1]->value.i[c1];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.u64[c0] | op[1]->value.u64[c1];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.i64[c0] | op[1]->value.i64[c1];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_logic_and:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] && op[1]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_logic_xor:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] != op[1]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_logic_or:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] || op[1]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_dot:
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[0] = dot_f(op[0], op[1]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[0] = dot_d(op[0], op[1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+
+ case ir_binop_min:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = MIN2(op[0]->value.u[c0], op[1]->value.u[c1]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = MIN2(op[0]->value.i[c0], op[1]->value.i[c1]);
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = MIN2(op[0]->value.f[c0], op[1]->value.f[c1]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = MIN2(op[0]->value.d[c0], op[1]->value.d[c1]);
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = MIN2(op[0]->value.u64[c0], op[1]->value.u64[c1]);
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = MIN2(op[0]->value.i64[c0], op[1]->value.i64[c1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_max:
+ assert(op[0]->type == op[1]->type || op0_scalar || op1_scalar);
+ for (unsigned c = 0, c0 = 0, c1 = 0;
+ c < components;
+ c0 += c0_inc, c1 += c1_inc, c++) {
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = MAX2(op[0]->value.u[c0], op[1]->value.u[c1]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = MAX2(op[0]->value.i[c0], op[1]->value.i[c1]);
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = MAX2(op[0]->value.f[c0], op[1]->value.f[c1]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = MAX2(op[0]->value.d[c0], op[1]->value.d[c1]);
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = MAX2(op[0]->value.u64[c0], op[1]->value.u64[c1]);
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = MAX2(op[0]->value.i64[c0], op[1]->value.i64[c1]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_pow:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = powf(op[0]->value.f[c], op[1]->value.f[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_ldexp:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = ldexpf_flush_subnormal(op[0]->value.f[c], op[1]->value.i[c]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = ldexp_flush_subnormal(op[0]->value.d[c], op[1]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_binop_vector_extract: {
+ const int c = CLAMP(op[1]->value.i[0], 0,
+ (int) op[0]->type->vector_elements - 1);
+
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[0] = op[0]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[0] = op[0]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[0] = op[0]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[0] = op[0]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[0] = op[0]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[0] = op[0]->value.i64[c];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[0] = op[0]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+ }
+
+ case ir_triop_fma:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c] * op[1]->value.f[c] + op[2]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c] * op[1]->value.d[c] + op[2]->value.d[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_triop_lrp: {
+ assert(op[0]->type->is_float() || op[0]->type->is_double());
+ assert(op[1]->type->is_float() || op[1]->type->is_double());
+ assert(op[2]->type->is_float() || op[2]->type->is_double());
+
+ unsigned c2_inc = op[2]->type->is_scalar() ? 0 : 1;
+ for (unsigned c = 0, c2 = 0; c < components; c2 += c2_inc, c++) {
+ switch (this->type->base_type) {
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.f[c] * (1.0f - op[2]->value.f[c2]) + (op[1]->value.f[c] * op[2]->value.f[c2]);
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.d[c] * (1.0 - op[2]->value.d[c2]) + (op[1]->value.d[c] * op[2]->value.d[c2]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+ }
+
+ case ir_triop_csel:
+ for (unsigned c = 0; c < components; c++) {
+ switch (this->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[0]->value.b[c] ? op[1]->value.u[c] : op[2]->value.u[c];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[0]->value.b[c] ? op[1]->value.i[c] : op[2]->value.i[c];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[0]->value.b[c] ? op[1]->value.f[c] : op[2]->value.f[c];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[0]->value.b[c] ? op[1]->value.d[c] : op[2]->value.d[c];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[0]->value.b[c] ? op[1]->value.u64[c] : op[2]->value.u64[c];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[0]->value.b[c] ? op[1]->value.i64[c] : op[2]->value.i64[c];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[0]->value.b[c] ? op[1]->value.b[c] : op[2]->value.b[c];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_triop_bitfield_extract:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.i[c] = bitfield_extract_uint(op[0]->value.u[c], op[1]->value.i[c], op[2]->value.i[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = bitfield_extract_int(op[0]->value.i[c], op[1]->value.i[c], op[2]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_triop_vector_insert: {
+ const unsigned idx = op[2]->value.u[0];
+
+ memcpy(&data, &op[0]->value, sizeof(data));
+
+ switch (this->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[idx] = op[1]->value.u[0];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[idx] = op[1]->value.i[0];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[idx] = op[1]->value.f[0];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[idx] = op[1]->value.d[0];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[idx] = op[1]->value.u64[0];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[idx] = op[1]->value.i64[0];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[idx] = op[1]->value.b[0];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ break;
+ }
+
+ case ir_quadop_bitfield_insert:
+ for (unsigned c = 0; c < op[0]->type->components(); c++) {
+ switch (op[0]->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = bitfield_insert(op[0]->value.u[c], op[1]->value.u[c], op[2]->value.i[c], op[3]->value.i[c]);
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = bitfield_insert(op[0]->value.i[c], op[1]->value.i[c], op[2]->value.i[c], op[3]->value.i[c]);
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ case ir_quadop_vector:
+ for (unsigned c = 0; c < this->type->vector_elements; c++) {
+ switch (this->type->base_type) {
+ case GLSL_TYPE_UINT:
+ data.u[c] = op[c]->value.u[0];
+ break;
+ case GLSL_TYPE_INT:
+ data.i[c] = op[c]->value.i[0];
+ break;
+ case GLSL_TYPE_FLOAT:
+ data.f[c] = op[c]->value.f[0];
+ break;
+ case GLSL_TYPE_DOUBLE:
+ data.d[c] = op[c]->value.d[0];
+ break;
+ case GLSL_TYPE_UINT64:
+ data.u64[c] = op[c]->value.u64[0];
+ break;
+ case GLSL_TYPE_INT64:
+ data.i64[c] = op[c]->value.i64[0];
+ break;
+ case GLSL_TYPE_BOOL:
+ data.b[c] = op[c]->value.b[0];
+ break;
+ default:
+ unreachable("invalid type");
+ }
+ }
+ break;
+
+ default:
+ /* FINISHME: Should handle all expression types. */
+ return NULL;
+ }
+
diff --git a/prebuilt-intermediates/glsl/ir_expression_operation_strings.h b/prebuilt-intermediates/glsl/ir_expression_operation_strings.h
new file mode 100644
index 0000000..65a00e6
--- /dev/null
+++ b/prebuilt-intermediates/glsl/ir_expression_operation_strings.h
@@ -0,0 +1,308 @@
+/*
+ * Copyright (C) 2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+const char *const ir_expression_operation_strings[] = {
+ "~",
+ "!",
+ "neg",
+ "abs",
+ "sign",
+ "rcp",
+ "rsq",
+ "sqrt",
+ "exp",
+ "log",
+ "exp2",
+ "log2",
+ "f2i",
+ "f2u",
+ "i2f",
+ "f2b",
+ "b2f",
+ "i2b",
+ "b2i",
+ "u2f",
+ "i2u",
+ "u2i",
+ "d2f",
+ "f2d",
+ "d2i",
+ "i2d",
+ "d2u",
+ "u2d",
+ "d2b",
+ "bitcast_i2f",
+ "bitcast_f2i",
+ "bitcast_u2f",
+ "bitcast_f2u",
+ "bitcast_u642d",
+ "bitcast_i642d",
+ "bitcast_d2u64",
+ "bitcast_d2i64",
+ "i642i",
+ "u642i",
+ "i642u",
+ "u642u",
+ "i642b",
+ "i642f",
+ "u642f",
+ "i642d",
+ "u642d",
+ "i2i64",
+ "u2i64",
+ "b2i64",
+ "f2i64",
+ "d2i64",
+ "i2u64",
+ "u2u64",
+ "f2u64",
+ "d2u64",
+ "u642i64",
+ "i642u64",
+ "trunc",
+ "ceil",
+ "floor",
+ "fract",
+ "round_even",
+ "sin",
+ "cos",
+ "dFdx",
+ "dFdxCoarse",
+ "dFdxFine",
+ "dFdy",
+ "dFdyCoarse",
+ "dFdyFine",
+ "packSnorm2x16",
+ "packSnorm4x8",
+ "packUnorm2x16",
+ "packUnorm4x8",
+ "packHalf2x16",
+ "unpackSnorm2x16",
+ "unpackSnorm4x8",
+ "unpackUnorm2x16",
+ "unpackUnorm4x8",
+ "unpackHalf2x16",
+ "bitfield_reverse",
+ "bit_count",
+ "find_msb",
+ "find_lsb",
+ "sat",
+ "packDouble2x32",
+ "unpackDouble2x32",
+ "packSampler2x32",
+ "packImage2x32",
+ "unpackSampler2x32",
+ "unpackImage2x32",
+ "frexp_sig",
+ "frexp_exp",
+ "noise",
+ "subroutine_to_int",
+ "interpolate_at_centroid",
+ "get_buffer_size",
+ "ssbo_unsized_array_length",
+ "packInt2x32",
+ "packUint2x32",
+ "unpackInt2x32",
+ "unpackUint2x32",
+ "+",
+ "-",
+ "*",
+ "imul_high",
+ "/",
+ "carry",
+ "borrow",
+ "%",
+ "<",
+ ">=",
+ "==",
+ "!=",
+ "all_equal",
+ "any_nequal",
+ "<<",
+ ">>",
+ "&",
+ "^",
+ "|",
+ "&&",
+ "^^",
+ "||",
+ "dot",
+ "min",
+ "max",
+ "pow",
+ "ubo_load",
+ "ldexp",
+ "vector_extract",
+ "interpolate_at_offset",
+ "interpolate_at_sample",
+ "fma",
+ "lrp",
+ "csel",
+ "bitfield_extract",
+ "vector_insert",
+ "bitfield_insert",
+ "vector",
+};
+
+const char *const ir_expression_operation_enum_strings[] = {
+ "bit_not",
+ "logic_not",
+ "neg",
+ "abs",
+ "sign",
+ "rcp",
+ "rsq",
+ "sqrt",
+ "exp",
+ "log",
+ "exp2",
+ "log2",
+ "f2i",
+ "f2u",
+ "i2f",
+ "f2b",
+ "b2f",
+ "i2b",
+ "b2i",
+ "u2f",
+ "i2u",
+ "u2i",
+ "d2f",
+ "f2d",
+ "d2i",
+ "i2d",
+ "d2u",
+ "u2d",
+ "d2b",
+ "bitcast_i2f",
+ "bitcast_f2i",
+ "bitcast_u2f",
+ "bitcast_f2u",
+ "bitcast_u642d",
+ "bitcast_i642d",
+ "bitcast_d2u64",
+ "bitcast_d2i64",
+ "i642i",
+ "u642i",
+ "i642u",
+ "u642u",
+ "i642b",
+ "i642f",
+ "u642f",
+ "i642d",
+ "u642d",
+ "i2i64",
+ "u2i64",
+ "b2i64",
+ "f2i64",
+ "d2i64",
+ "i2u64",
+ "u2u64",
+ "f2u64",
+ "d2u64",
+ "u642i64",
+ "i642u64",
+ "trunc",
+ "ceil",
+ "floor",
+ "fract",
+ "round_even",
+ "sin",
+ "cos",
+ "dFdx",
+ "dFdx_coarse",
+ "dFdx_fine",
+ "dFdy",
+ "dFdy_coarse",
+ "dFdy_fine",
+ "pack_snorm_2x16",
+ "pack_snorm_4x8",
+ "pack_unorm_2x16",
+ "pack_unorm_4x8",
+ "pack_half_2x16",
+ "unpack_snorm_2x16",
+ "unpack_snorm_4x8",
+ "unpack_unorm_2x16",
+ "unpack_unorm_4x8",
+ "unpack_half_2x16",
+ "bitfield_reverse",
+ "bit_count",
+ "find_msb",
+ "find_lsb",
+ "saturate",
+ "pack_double_2x32",
+ "unpack_double_2x32",
+ "pack_sampler_2x32",
+ "pack_image_2x32",
+ "unpack_sampler_2x32",
+ "unpack_image_2x32",
+ "frexp_sig",
+ "frexp_exp",
+ "noise",
+ "subroutine_to_int",
+ "interpolate_at_centroid",
+ "get_buffer_size",
+ "ssbo_unsized_array_length",
+ "pack_int_2x32",
+ "pack_uint_2x32",
+ "unpack_int_2x32",
+ "unpack_uint_2x32",
+ "add",
+ "sub",
+ "mul",
+ "imul_high",
+ "div",
+ "carry",
+ "borrow",
+ "mod",
+ "less",
+ "gequal",
+ "equal",
+ "nequal",
+ "all_equal",
+ "any_nequal",
+ "lshift",
+ "rshift",
+ "bit_and",
+ "bit_xor",
+ "bit_or",
+ "logic_and",
+ "logic_xor",
+ "logic_or",
+ "dot",
+ "min",
+ "max",
+ "pow",
+ "ubo_load",
+ "ldexp",
+ "vector_extract",
+ "interpolate_at_offset",
+ "interpolate_at_sample",
+ "fma",
+ "lrp",
+ "csel",
+ "bitfield_extract",
+ "vector_insert",
+ "bitfield_insert",
+ "vector",
+};
diff --git a/prebuilt-intermediates/ir3/ir3_nir_trig.c b/prebuilt-intermediates/ir3/ir3_nir_trig.c
new file mode 100644
index 0000000..5ab52e1
--- /dev/null
+++ b/prebuilt-intermediates/ir3/ir3_nir_trig.c
@@ -0,0 +1,277 @@
+#include "ir3_nir.h"
+
+#include "nir.h"
+#include "nir_search.h"
+#include "nir_search_helpers.h"
+
+#ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+#define NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+
+struct transform {
+ const nir_search_expression *search;
+ const nir_search_value *replace;
+ unsigned condition_offset;
+};
+
+#endif
+
+
+static const nir_search_variable search1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fcos,
+ { &search1_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace1_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x401921fb3fa6defc /* 6.283185 */ },
+};
+
+static const nir_search_constant replace1_0_0_1_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fc45f30e7ff583a /* 0.159155 */ },
+};
+
+static const nir_search_variable replace1_0_0_1_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace1_0_0_1_0_0_0.value, &replace1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fe0000000000000 /* 0.5 */ },
+};
+static const nir_search_expression replace1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace1_0_0_1_0_0.value, &replace1_0_0_1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffract,
+ { &replace1_0_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace1_0_0_0.value, &replace1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x400921fb82c2bd7f /* 3.141593 */ },
+};
+static const nir_search_expression replace1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace1_0_0.value, &replace1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fcos,
+ { &replace1_0.value },
+ NULL,
+};
+
+static const struct transform ir3_nir_apply_trig_workarounds_fcos_xforms[] = {
+ { &search1, &replace1.value, 0 },
+};
+
+static const nir_search_variable search0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsin,
+ { &search0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace0_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x401921fb3fa6defc /* 6.283185 */ },
+};
+
+static const nir_search_constant replace0_0_0_1_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fc45f30e7ff583a /* 0.159155 */ },
+};
+
+static const nir_search_variable replace0_0_0_1_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace0_0_0_1_0_0_0.value, &replace0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fe0000000000000 /* 0.5 */ },
+};
+static const nir_search_expression replace0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace0_0_0_1_0_0.value, &replace0_0_0_1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffract,
+ { &replace0_0_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace0_0_0_0.value, &replace0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x400921fb82c2bd7f /* 3.141593 */ },
+};
+static const nir_search_expression replace0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace0_0_0.value, &replace0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsin,
+ { &replace0_0.value },
+ NULL,
+};
+
+static const struct transform ir3_nir_apply_trig_workarounds_fsin_xforms[] = {
+ { &search0, &replace0.value, 0 },
+};
+
+static bool
+ir3_nir_apply_trig_workarounds_block(nir_block *block, const bool *condition_flags,
+ void *mem_ctx)
+{
+ bool progress = false;
+
+ nir_foreach_instr_reverse_safe(instr, block) {
+ if (instr->type != nir_instr_type_alu)
+ continue;
+
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+ if (!alu->dest.dest.is_ssa)
+ continue;
+
+ switch (alu->op) {
+ case nir_op_fcos:
+ for (unsigned i = 0; i < ARRAY_SIZE(ir3_nir_apply_trig_workarounds_fcos_xforms); i++) {
+ const struct transform *xform = &ir3_nir_apply_trig_workarounds_fcos_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fsin:
+ for (unsigned i = 0; i < ARRAY_SIZE(ir3_nir_apply_trig_workarounds_fsin_xforms); i++) {
+ const struct transform *xform = &ir3_nir_apply_trig_workarounds_fsin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return progress;
+}
+
+static bool
+ir3_nir_apply_trig_workarounds_impl(nir_function_impl *impl, const bool *condition_flags)
+{
+ void *mem_ctx = ralloc_parent(impl);
+ bool progress = false;
+
+ nir_foreach_block_reverse(block, impl) {
+ progress |= ir3_nir_apply_trig_workarounds_block(block, condition_flags, mem_ctx);
+ }
+
+ if (progress)
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+
+ return progress;
+}
+
+
+bool
+ir3_nir_apply_trig_workarounds(nir_shader *shader)
+{
+ bool progress = false;
+ bool condition_flags[1];
+ const nir_shader_compiler_options *options = shader->options;
+ (void) options;
+
+ condition_flags[0] = true;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl)
+ progress |= ir3_nir_apply_trig_workarounds_impl(function->impl, condition_flags);
+ }
+
+ return progress;
+}
+
diff --git a/prebuilt-intermediates/isl/isl_format_layout.c b/prebuilt-intermediates/isl/isl_format_layout.c
new file mode 100644
index 0000000..16fb23b
--- /dev/null
+++ b/prebuilt-intermediates/isl/isl_format_layout.c
@@ -0,0 +1,5667 @@
+/* This file is autogenerated by gen_format_layout.py. DO NOT EDIT! */
+
+/*
+ * Copyright 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "isl/isl.h"
+
+const struct isl_format_layout
+isl_format_layouts[] = {
+ [ISL_FORMAT_R32G32B32A32_FLOAT] = {
+ .format = ISL_FORMAT_R32G32B32A32_FLOAT,
+ .name = "ISL_FORMAT_R32G32B32A32_FLOAT",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_SFLOAT, 32 },
+ .b = { ISL_SFLOAT, 32 },
+ .a = { ISL_SFLOAT, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_SINT] = {
+ .format = ISL_FORMAT_R32G32B32A32_SINT,
+ .name = "ISL_FORMAT_R32G32B32A32_SINT",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 32 },
+ .g = { ISL_SINT, 32 },
+ .b = { ISL_SINT, 32 },
+ .a = { ISL_SINT, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_UINT] = {
+ .format = ISL_FORMAT_R32G32B32A32_UINT,
+ .name = "ISL_FORMAT_R32G32B32A32_UINT",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 32 },
+ .g = { ISL_UINT, 32 },
+ .b = { ISL_UINT, 32 },
+ .a = { ISL_UINT, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_UNORM] = {
+ .format = ISL_FORMAT_R32G32B32A32_UNORM,
+ .name = "ISL_FORMAT_R32G32B32A32_UNORM",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 32 },
+ .g = { ISL_UNORM, 32 },
+ .b = { ISL_UNORM, 32 },
+ .a = { ISL_UNORM, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_SNORM] = {
+ .format = ISL_FORMAT_R32G32B32A32_SNORM,
+ .name = "ISL_FORMAT_R32G32B32A32_SNORM",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 32 },
+ .g = { ISL_SNORM, 32 },
+ .b = { ISL_SNORM, 32 },
+ .a = { ISL_SNORM, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64_FLOAT] = {
+ .format = ISL_FORMAT_R64G64_FLOAT,
+ .name = "ISL_FORMAT_R64G64_FLOAT",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 64 },
+ .g = { ISL_SFLOAT, 64 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32X32_FLOAT] = {
+ .format = ISL_FORMAT_R32G32B32X32_FLOAT,
+ .name = "ISL_FORMAT_R32G32B32X32_FLOAT",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_SFLOAT, 32 },
+ .b = { ISL_SFLOAT, 32 },
+ .a = { ISL_VOID, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_SSCALED] = {
+ .format = ISL_FORMAT_R32G32B32A32_SSCALED,
+ .name = "ISL_FORMAT_R32G32B32A32_SSCALED",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 32 },
+ .g = { ISL_SSCALED, 32 },
+ .b = { ISL_SSCALED, 32 },
+ .a = { ISL_SSCALED, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_USCALED] = {
+ .format = ISL_FORMAT_R32G32B32A32_USCALED,
+ .name = "ISL_FORMAT_R32G32B32A32_USCALED",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 32 },
+ .g = { ISL_USCALED, 32 },
+ .b = { ISL_USCALED, 32 },
+ .a = { ISL_USCALED, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32A32_SFIXED] = {
+ .format = ISL_FORMAT_R32G32B32A32_SFIXED,
+ .name = "ISL_FORMAT_R32G32B32A32_SFIXED",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFIXED, 32 },
+ .g = { ISL_SFIXED, 32 },
+ .b = { ISL_SFIXED, 32 },
+ .a = { ISL_SFIXED, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64_PASSTHRU] = {
+ .format = ISL_FORMAT_R64G64_PASSTHRU,
+ .name = "ISL_FORMAT_R64G64_PASSTHRU",
+ .bpb = 128,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_RAW, 64 },
+ .g = { ISL_RAW, 64 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_FLOAT] = {
+ .format = ISL_FORMAT_R32G32B32_FLOAT,
+ .name = "ISL_FORMAT_R32G32B32_FLOAT",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_SFLOAT, 32 },
+ .b = { ISL_SFLOAT, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_SINT] = {
+ .format = ISL_FORMAT_R32G32B32_SINT,
+ .name = "ISL_FORMAT_R32G32B32_SINT",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 32 },
+ .g = { ISL_SINT, 32 },
+ .b = { ISL_SINT, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_UINT] = {
+ .format = ISL_FORMAT_R32G32B32_UINT,
+ .name = "ISL_FORMAT_R32G32B32_UINT",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 32 },
+ .g = { ISL_UINT, 32 },
+ .b = { ISL_UINT, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_UNORM] = {
+ .format = ISL_FORMAT_R32G32B32_UNORM,
+ .name = "ISL_FORMAT_R32G32B32_UNORM",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 32 },
+ .g = { ISL_UNORM, 32 },
+ .b = { ISL_UNORM, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_SNORM] = {
+ .format = ISL_FORMAT_R32G32B32_SNORM,
+ .name = "ISL_FORMAT_R32G32B32_SNORM",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 32 },
+ .g = { ISL_SNORM, 32 },
+ .b = { ISL_SNORM, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_SSCALED] = {
+ .format = ISL_FORMAT_R32G32B32_SSCALED,
+ .name = "ISL_FORMAT_R32G32B32_SSCALED",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 32 },
+ .g = { ISL_SSCALED, 32 },
+ .b = { ISL_SSCALED, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_USCALED] = {
+ .format = ISL_FORMAT_R32G32B32_USCALED,
+ .name = "ISL_FORMAT_R32G32B32_USCALED",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 32 },
+ .g = { ISL_USCALED, 32 },
+ .b = { ISL_USCALED, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32B32_SFIXED] = {
+ .format = ISL_FORMAT_R32G32B32_SFIXED,
+ .name = "ISL_FORMAT_R32G32B32_SFIXED",
+ .bpb = 96,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFIXED, 32 },
+ .g = { ISL_SFIXED, 32 },
+ .b = { ISL_SFIXED, 32 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_UNORM] = {
+ .format = ISL_FORMAT_R16G16B16A16_UNORM,
+ .name = "ISL_FORMAT_R16G16B16A16_UNORM",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 16 },
+ .g = { ISL_UNORM, 16 },
+ .b = { ISL_UNORM, 16 },
+ .a = { ISL_UNORM, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_SNORM] = {
+ .format = ISL_FORMAT_R16G16B16A16_SNORM,
+ .name = "ISL_FORMAT_R16G16B16A16_SNORM",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 16 },
+ .g = { ISL_SNORM, 16 },
+ .b = { ISL_SNORM, 16 },
+ .a = { ISL_SNORM, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_SINT] = {
+ .format = ISL_FORMAT_R16G16B16A16_SINT,
+ .name = "ISL_FORMAT_R16G16B16A16_SINT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 16 },
+ .g = { ISL_SINT, 16 },
+ .b = { ISL_SINT, 16 },
+ .a = { ISL_SINT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_UINT] = {
+ .format = ISL_FORMAT_R16G16B16A16_UINT,
+ .name = "ISL_FORMAT_R16G16B16A16_UINT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 16 },
+ .g = { ISL_UINT, 16 },
+ .b = { ISL_UINT, 16 },
+ .a = { ISL_UINT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_FLOAT] = {
+ .format = ISL_FORMAT_R16G16B16A16_FLOAT,
+ .name = "ISL_FORMAT_R16G16B16A16_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_FLOAT] = {
+ .format = ISL_FORMAT_R32G32_FLOAT,
+ .name = "ISL_FORMAT_R32G32_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_SFLOAT, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_SINT] = {
+ .format = ISL_FORMAT_R32G32_SINT,
+ .name = "ISL_FORMAT_R32G32_SINT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 32 },
+ .g = { ISL_SINT, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_UINT] = {
+ .format = ISL_FORMAT_R32G32_UINT,
+ .name = "ISL_FORMAT_R32G32_UINT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 32 },
+ .g = { ISL_UINT, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS] = {
+ .format = ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS,
+ .name = "ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_VOID, 8 },
+ .b = { ISL_VOID, 24 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_X32_TYPELESS_G8X24_UINT] = {
+ .format = ISL_FORMAT_X32_TYPELESS_G8X24_UINT,
+ .name = "ISL_FORMAT_X32_TYPELESS_G8X24_UINT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_VOID, 32 },
+ .g = { ISL_UINT, 8 },
+ .b = { ISL_VOID, 24 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L32A32_FLOAT] = {
+ .format = ISL_FORMAT_L32A32_FLOAT,
+ .name = "ISL_FORMAT_L32A32_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SFLOAT, 32 },
+ .l = { ISL_SFLOAT, 32 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_UNORM] = {
+ .format = ISL_FORMAT_R32G32_UNORM,
+ .name = "ISL_FORMAT_R32G32_UNORM",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 32 },
+ .g = { ISL_UNORM, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_SNORM] = {
+ .format = ISL_FORMAT_R32G32_SNORM,
+ .name = "ISL_FORMAT_R32G32_SNORM",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 32 },
+ .g = { ISL_SNORM, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64_FLOAT] = {
+ .format = ISL_FORMAT_R64_FLOAT,
+ .name = "ISL_FORMAT_R64_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 64 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16X16_UNORM] = {
+ .format = ISL_FORMAT_R16G16B16X16_UNORM,
+ .name = "ISL_FORMAT_R16G16B16X16_UNORM",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 16 },
+ .g = { ISL_UNORM, 16 },
+ .b = { ISL_UNORM, 16 },
+ .a = { ISL_VOID, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16X16_FLOAT] = {
+ .format = ISL_FORMAT_R16G16B16X16_FLOAT,
+ .name = "ISL_FORMAT_R16G16B16X16_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_VOID, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A32X32_FLOAT] = {
+ .format = ISL_FORMAT_A32X32_FLOAT,
+ .name = "ISL_FORMAT_A32X32_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SFLOAT, 32 },
+ .l = { ISL_VOID, 32 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L32X32_FLOAT] = {
+ .format = ISL_FORMAT_L32X32_FLOAT,
+ .name = "ISL_FORMAT_L32X32_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_VOID, 32 },
+ .l = { ISL_SFLOAT, 32 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I32X32_FLOAT] = {
+ .format = ISL_FORMAT_I32X32_FLOAT,
+ .name = "ISL_FORMAT_I32X32_FLOAT",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_VOID, 32 },
+ .l = {},
+ .i = { ISL_SFLOAT, 32 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_SSCALED] = {
+ .format = ISL_FORMAT_R16G16B16A16_SSCALED,
+ .name = "ISL_FORMAT_R16G16B16A16_SSCALED",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 16 },
+ .g = { ISL_SSCALED, 16 },
+ .b = { ISL_SSCALED, 16 },
+ .a = { ISL_SSCALED, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16A16_USCALED] = {
+ .format = ISL_FORMAT_R16G16B16A16_USCALED,
+ .name = "ISL_FORMAT_R16G16B16A16_USCALED",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 16 },
+ .g = { ISL_USCALED, 16 },
+ .b = { ISL_USCALED, 16 },
+ .a = { ISL_USCALED, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_SSCALED] = {
+ .format = ISL_FORMAT_R32G32_SSCALED,
+ .name = "ISL_FORMAT_R32G32_SSCALED",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 32 },
+ .g = { ISL_SSCALED, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_USCALED] = {
+ .format = ISL_FORMAT_R32G32_USCALED,
+ .name = "ISL_FORMAT_R32G32_USCALED",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 32 },
+ .g = { ISL_USCALED, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_FLOAT_LD] = {
+ .format = ISL_FORMAT_R32G32_FLOAT_LD,
+ .name = "ISL_FORMAT_R32G32_FLOAT_LD",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = { ISL_SFLOAT, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32G32_SFIXED] = {
+ .format = ISL_FORMAT_R32G32_SFIXED,
+ .name = "ISL_FORMAT_R32G32_SFIXED",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFIXED, 32 },
+ .g = { ISL_SFIXED, 32 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64_PASSTHRU] = {
+ .format = ISL_FORMAT_R64_PASSTHRU,
+ .name = "ISL_FORMAT_R64_PASSTHRU",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_RAW, 64 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B8G8R8A8_UNORM] = {
+ .format = ISL_FORMAT_B8G8R8A8_UNORM,
+ .name = "ISL_FORMAT_B8G8R8A8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B8G8R8A8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B8G8R8A8_UNORM_SRGB,
+ .name = "ISL_FORMAT_B8G8R8A8_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_UNORM] = {
+ .format = ISL_FORMAT_R10G10B10A2_UNORM,
+ .name = "ISL_FORMAT_R10G10B10A2_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 10 },
+ .g = { ISL_UNORM, 10 },
+ .b = { ISL_UNORM, 10 },
+ .a = { ISL_UNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_UNORM_SRGB] = {
+ .format = ISL_FORMAT_R10G10B10A2_UNORM_SRGB,
+ .name = "ISL_FORMAT_R10G10B10A2_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 10 },
+ .g = { ISL_UNORM, 10 },
+ .b = { ISL_UNORM, 10 },
+ .a = { ISL_UNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_UINT] = {
+ .format = ISL_FORMAT_R10G10B10A2_UINT,
+ .name = "ISL_FORMAT_R10G10B10A2_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 10 },
+ .g = { ISL_UINT, 10 },
+ .b = { ISL_UINT, 10 },
+ .a = { ISL_UINT, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10_SNORM_A2_UNORM] = {
+ .format = ISL_FORMAT_R10G10B10_SNORM_A2_UNORM,
+ .name = "ISL_FORMAT_R10G10B10_SNORM_A2_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 10 },
+ .g = { ISL_SNORM, 10 },
+ .b = { ISL_SNORM, 10 },
+ .a = { ISL_UNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_UNORM] = {
+ .format = ISL_FORMAT_R8G8B8A8_UNORM,
+ .name = "ISL_FORMAT_R8G8B8A8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_R8G8B8A8_UNORM_SRGB,
+ .name = "ISL_FORMAT_R8G8B8A8_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_SNORM] = {
+ .format = ISL_FORMAT_R8G8B8A8_SNORM,
+ .name = "ISL_FORMAT_R8G8B8A8_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = { ISL_SNORM, 8 },
+ .a = { ISL_SNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_SINT] = {
+ .format = ISL_FORMAT_R8G8B8A8_SINT,
+ .name = "ISL_FORMAT_R8G8B8A8_SINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 8 },
+ .g = { ISL_SINT, 8 },
+ .b = { ISL_SINT, 8 },
+ .a = { ISL_SINT, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_UINT] = {
+ .format = ISL_FORMAT_R8G8B8A8_UINT,
+ .name = "ISL_FORMAT_R8G8B8A8_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 8 },
+ .g = { ISL_UINT, 8 },
+ .b = { ISL_UINT, 8 },
+ .a = { ISL_UINT, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_UNORM] = {
+ .format = ISL_FORMAT_R16G16_UNORM,
+ .name = "ISL_FORMAT_R16G16_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 16 },
+ .g = { ISL_UNORM, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_SNORM] = {
+ .format = ISL_FORMAT_R16G16_SNORM,
+ .name = "ISL_FORMAT_R16G16_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 16 },
+ .g = { ISL_SNORM, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_SINT] = {
+ .format = ISL_FORMAT_R16G16_SINT,
+ .name = "ISL_FORMAT_R16G16_SINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 16 },
+ .g = { ISL_SINT, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_UINT] = {
+ .format = ISL_FORMAT_R16G16_UINT,
+ .name = "ISL_FORMAT_R16G16_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 16 },
+ .g = { ISL_UINT, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_FLOAT] = {
+ .format = ISL_FORMAT_R16G16_FLOAT,
+ .name = "ISL_FORMAT_R16G16_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_UNORM] = {
+ .format = ISL_FORMAT_B10G10R10A2_UNORM,
+ .name = "ISL_FORMAT_B10G10R10A2_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 10 },
+ .g = { ISL_UNORM, 10 },
+ .b = { ISL_UNORM, 10 },
+ .a = { ISL_UNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B10G10R10A2_UNORM_SRGB,
+ .name = "ISL_FORMAT_B10G10R10A2_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 10 },
+ .g = { ISL_UNORM, 10 },
+ .b = { ISL_UNORM, 10 },
+ .a = { ISL_UNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R11G11B10_FLOAT] = {
+ .format = ISL_FORMAT_R11G11B10_FLOAT,
+ .name = "ISL_FORMAT_R11G11B10_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UFLOAT, 11 },
+ .g = { ISL_UFLOAT, 11 },
+ .b = { ISL_UFLOAT, 10 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_SINT] = {
+ .format = ISL_FORMAT_R32_SINT,
+ .name = "ISL_FORMAT_R32_SINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_UINT] = {
+ .format = ISL_FORMAT_R32_UINT,
+ .name = "ISL_FORMAT_R32_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_FLOAT] = {
+ .format = ISL_FORMAT_R32_FLOAT,
+ .name = "ISL_FORMAT_R32_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R24_UNORM_X8_TYPELESS] = {
+ .format = ISL_FORMAT_R24_UNORM_X8_TYPELESS,
+ .name = "ISL_FORMAT_R24_UNORM_X8_TYPELESS",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 24 },
+ .g = { ISL_VOID, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_X24_TYPELESS_G8_UINT] = {
+ .format = ISL_FORMAT_X24_TYPELESS_G8_UINT,
+ .name = "ISL_FORMAT_X24_TYPELESS_G8_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_VOID, 24 },
+ .g = { ISL_UINT, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L32_UNORM] = {
+ .format = ISL_FORMAT_L32_UNORM,
+ .name = "ISL_FORMAT_L32_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_UNORM, 32 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A32_UNORM] = {
+ .format = ISL_FORMAT_A32_UNORM,
+ .name = "ISL_FORMAT_A32_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L16A16_UNORM] = {
+ .format = ISL_FORMAT_L16A16_UNORM,
+ .name = "ISL_FORMAT_L16A16_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 16 },
+ .l = { ISL_UNORM, 16 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I24X8_UNORM] = {
+ .format = ISL_FORMAT_I24X8_UNORM,
+ .name = "ISL_FORMAT_I24X8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = { ISL_UNORM, 24 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L24X8_UNORM] = {
+ .format = ISL_FORMAT_L24X8_UNORM,
+ .name = "ISL_FORMAT_L24X8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_VOID, 8 },
+ .l = { ISL_UNORM, 24 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A24X8_UNORM] = {
+ .format = ISL_FORMAT_A24X8_UNORM,
+ .name = "ISL_FORMAT_A24X8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 24 },
+ .l = { ISL_VOID, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I32_FLOAT] = {
+ .format = ISL_FORMAT_I32_FLOAT,
+ .name = "ISL_FORMAT_I32_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_SFLOAT, 32 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L32_FLOAT] = {
+ .format = ISL_FORMAT_L32_FLOAT,
+ .name = "ISL_FORMAT_L32_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_SFLOAT, 32 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A32_FLOAT] = {
+ .format = ISL_FORMAT_A32_FLOAT,
+ .name = "ISL_FORMAT_A32_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SFLOAT, 32 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_X8B8_UNORM_G8R8_SNORM] = {
+ .format = ISL_FORMAT_X8B8_UNORM_G8R8_SNORM,
+ .name = "ISL_FORMAT_X8B8_UNORM_G8R8_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A8X8_UNORM_G8R8_SNORM] = {
+ .format = ISL_FORMAT_A8X8_UNORM_G8R8_SNORM,
+ .name = "ISL_FORMAT_A8X8_UNORM_G8R8_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = { ISL_VOID, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B8X8_UNORM_G8R8_SNORM] = {
+ .format = ISL_FORMAT_B8X8_UNORM_G8R8_SNORM,
+ .name = "ISL_FORMAT_B8X8_UNORM_G8R8_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B8G8R8X8_UNORM] = {
+ .format = ISL_FORMAT_B8G8R8X8_UNORM,
+ .name = "ISL_FORMAT_B8G8R8X8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B8G8R8X8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B8G8R8X8_UNORM_SRGB,
+ .name = "ISL_FORMAT_B8G8R8X8_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8X8_UNORM] = {
+ .format = ISL_FORMAT_R8G8B8X8_UNORM,
+ .name = "ISL_FORMAT_R8G8B8X8_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8X8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_R8G8B8X8_UNORM_SRGB,
+ .name = "ISL_FORMAT_R8G8B8X8_UNORM_SRGB",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_VOID, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R9G9B9E5_SHAREDEXP] = {
+ .format = ISL_FORMAT_R9G9B9E5_SHAREDEXP,
+ .name = "ISL_FORMAT_R9G9B9E5_SHAREDEXP",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UFLOAT, 9 },
+ .g = { ISL_UFLOAT, 9 },
+ .b = { ISL_UFLOAT, 9 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10X2_UNORM] = {
+ .format = ISL_FORMAT_B10G10R10X2_UNORM,
+ .name = "ISL_FORMAT_B10G10R10X2_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 10 },
+ .g = { ISL_UNORM, 10 },
+ .b = { ISL_UNORM, 10 },
+ .a = { ISL_VOID, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L16A16_FLOAT] = {
+ .format = ISL_FORMAT_L16A16_FLOAT,
+ .name = "ISL_FORMAT_L16A16_FLOAT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SFLOAT, 16 },
+ .l = { ISL_SFLOAT, 16 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_UNORM] = {
+ .format = ISL_FORMAT_R32_UNORM,
+ .name = "ISL_FORMAT_R32_UNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_SNORM] = {
+ .format = ISL_FORMAT_R32_SNORM,
+ .name = "ISL_FORMAT_R32_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10X2_USCALED] = {
+ .format = ISL_FORMAT_R10G10B10X2_USCALED,
+ .name = "ISL_FORMAT_R10G10B10X2_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 10 },
+ .g = { ISL_USCALED, 10 },
+ .b = { ISL_USCALED, 10 },
+ .a = { ISL_VOID, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_SSCALED] = {
+ .format = ISL_FORMAT_R8G8B8A8_SSCALED,
+ .name = "ISL_FORMAT_R8G8B8A8_SSCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 8 },
+ .g = { ISL_SSCALED, 8 },
+ .b = { ISL_SSCALED, 8 },
+ .a = { ISL_SSCALED, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8A8_USCALED] = {
+ .format = ISL_FORMAT_R8G8B8A8_USCALED,
+ .name = "ISL_FORMAT_R8G8B8A8_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 8 },
+ .g = { ISL_USCALED, 8 },
+ .b = { ISL_USCALED, 8 },
+ .a = { ISL_USCALED, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_SSCALED] = {
+ .format = ISL_FORMAT_R16G16_SSCALED,
+ .name = "ISL_FORMAT_R16G16_SSCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 16 },
+ .g = { ISL_SSCALED, 6 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16_USCALED] = {
+ .format = ISL_FORMAT_R16G16_USCALED,
+ .name = "ISL_FORMAT_R16G16_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 16 },
+ .g = { ISL_USCALED, 16 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_SSCALED] = {
+ .format = ISL_FORMAT_R32_SSCALED,
+ .name = "ISL_FORMAT_R32_SSCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_USCALED] = {
+ .format = ISL_FORMAT_R32_USCALED,
+ .name = "ISL_FORMAT_R32_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 32 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G6R5_UNORM] = {
+ .format = ISL_FORMAT_B5G6R5_UNORM,
+ .name = "ISL_FORMAT_B5G6R5_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 6 },
+ .b = { ISL_UNORM, 5 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G6R5_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B5G6R5_UNORM_SRGB,
+ .name = "ISL_FORMAT_B5G6R5_UNORM_SRGB",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 6 },
+ .b = { ISL_UNORM, 5 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G5R5A1_UNORM] = {
+ .format = ISL_FORMAT_B5G5R5A1_UNORM,
+ .name = "ISL_FORMAT_B5G5R5A1_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 5 },
+ .b = { ISL_UNORM, 5 },
+ .a = { ISL_UNORM, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G5R5A1_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B5G5R5A1_UNORM_SRGB,
+ .name = "ISL_FORMAT_B5G5R5A1_UNORM_SRGB",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 5 },
+ .b = { ISL_UNORM, 5 },
+ .a = { ISL_UNORM, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B4G4R4A4_UNORM] = {
+ .format = ISL_FORMAT_B4G4R4A4_UNORM,
+ .name = "ISL_FORMAT_B4G4R4A4_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B4G4R4A4_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B4G4R4A4_UNORM_SRGB,
+ .name = "ISL_FORMAT_B4G4R4A4_UNORM_SRGB",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_UNORM] = {
+ .format = ISL_FORMAT_R8G8_UNORM,
+ .name = "ISL_FORMAT_R8G8_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_SNORM] = {
+ .format = ISL_FORMAT_R8G8_SNORM,
+ .name = "ISL_FORMAT_R8G8_SNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_SINT] = {
+ .format = ISL_FORMAT_R8G8_SINT,
+ .name = "ISL_FORMAT_R8G8_SINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 8 },
+ .g = { ISL_SINT, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_UINT] = {
+ .format = ISL_FORMAT_R8G8_UINT,
+ .name = "ISL_FORMAT_R8G8_UINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 8 },
+ .g = { ISL_UINT, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_UNORM] = {
+ .format = ISL_FORMAT_R16_UNORM,
+ .name = "ISL_FORMAT_R16_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_SNORM] = {
+ .format = ISL_FORMAT_R16_SNORM,
+ .name = "ISL_FORMAT_R16_SNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_SINT] = {
+ .format = ISL_FORMAT_R16_SINT,
+ .name = "ISL_FORMAT_R16_SINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_UINT] = {
+ .format = ISL_FORMAT_R16_UINT,
+ .name = "ISL_FORMAT_R16_UINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_FLOAT] = {
+ .format = ISL_FORMAT_R16_FLOAT,
+ .name = "ISL_FORMAT_R16_FLOAT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A8P8_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_A8P8_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_A8P8_UNORM_PALETTE0",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A8P8_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_A8P8_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_A8P8_UNORM_PALETTE1",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I16_UNORM] = {
+ .format = ISL_FORMAT_I16_UNORM,
+ .name = "ISL_FORMAT_I16_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_UNORM, 16 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L16_UNORM] = {
+ .format = ISL_FORMAT_L16_UNORM,
+ .name = "ISL_FORMAT_L16_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_UNORM, 16 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A16_UNORM] = {
+ .format = ISL_FORMAT_A16_UNORM,
+ .name = "ISL_FORMAT_A16_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8A8_UNORM] = {
+ .format = ISL_FORMAT_L8A8_UNORM,
+ .name = "ISL_FORMAT_L8A8_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = { ISL_UNORM, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I16_FLOAT] = {
+ .format = ISL_FORMAT_I16_FLOAT,
+ .name = "ISL_FORMAT_I16_FLOAT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_SFLOAT, 16 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L16_FLOAT] = {
+ .format = ISL_FORMAT_L16_FLOAT,
+ .name = "ISL_FORMAT_L16_FLOAT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_SFLOAT, 16 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A16_FLOAT] = {
+ .format = ISL_FORMAT_A16_FLOAT,
+ .name = "ISL_FORMAT_A16_FLOAT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8A8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_L8A8_UNORM_SRGB,
+ .name = "ISL_FORMAT_L8A8_UNORM_SRGB",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = { ISL_UNORM, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R5G5_SNORM_B6_UNORM] = {
+ .format = ISL_FORMAT_R5G5_SNORM_B6_UNORM,
+ .name = "ISL_FORMAT_R5G5_SNORM_B6_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 5 },
+ .g = { ISL_SNORM, 5 },
+ .b = { ISL_UNORM, 6 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G5R5X1_UNORM] = {
+ .format = ISL_FORMAT_B5G5R5X1_UNORM,
+ .name = "ISL_FORMAT_B5G5R5X1_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 5 },
+ .b = { ISL_UNORM, 5 },
+ .a = { ISL_VOID, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B5G5R5X1_UNORM_SRGB] = {
+ .format = ISL_FORMAT_B5G5R5X1_UNORM_SRGB,
+ .name = "ISL_FORMAT_B5G5R5X1_UNORM_SRGB",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 5 },
+ .b = { ISL_UNORM, 5 },
+ .a = { ISL_VOID, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_SSCALED] = {
+ .format = ISL_FORMAT_R8G8_SSCALED,
+ .name = "ISL_FORMAT_R8G8_SSCALED",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 8 },
+ .g = { ISL_SSCALED, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8_USCALED] = {
+ .format = ISL_FORMAT_R8G8_USCALED,
+ .name = "ISL_FORMAT_R8G8_USCALED",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 8 },
+ .g = { ISL_USCALED, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_SSCALED] = {
+ .format = ISL_FORMAT_R16_SSCALED,
+ .name = "ISL_FORMAT_R16_SSCALED",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16_USCALED] = {
+ .format = ISL_FORMAT_R16_USCALED,
+ .name = "ISL_FORMAT_R16_USCALED",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P8A8_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_P8A8_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_P8A8_UNORM_PALETTE0",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P8A8_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_P8A8_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_P8A8_UNORM_PALETTE1",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A1B5G5R5_UNORM] = {
+ .format = ISL_FORMAT_A1B5G5R5_UNORM,
+ .name = "ISL_FORMAT_A1B5G5R5_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 5 },
+ .g = { ISL_UNORM, 5 },
+ .b = { ISL_UNORM, 5 },
+ .a = { ISL_UNORM, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A4B4G4R4_UNORM] = {
+ .format = ISL_FORMAT_A4B4G4R4_UNORM,
+ .name = "ISL_FORMAT_A4B4G4R4_UNORM",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8A8_UINT] = {
+ .format = ISL_FORMAT_L8A8_UINT,
+ .name = "ISL_FORMAT_L8A8_UINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UINT, 8 },
+ .l = { ISL_UINT, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8A8_SINT] = {
+ .format = ISL_FORMAT_L8A8_SINT,
+ .name = "ISL_FORMAT_L8A8_SINT",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_SINT, 8 },
+ .l = { ISL_SINT, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_UNORM] = {
+ .format = ISL_FORMAT_R8_UNORM,
+ .name = "ISL_FORMAT_R8_UNORM",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_SNORM] = {
+ .format = ISL_FORMAT_R8_SNORM,
+ .name = "ISL_FORMAT_R8_SNORM",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_SINT] = {
+ .format = ISL_FORMAT_R8_SINT,
+ .name = "ISL_FORMAT_R8_SINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_UINT] = {
+ .format = ISL_FORMAT_R8_UINT,
+ .name = "ISL_FORMAT_R8_UINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A8_UNORM] = {
+ .format = ISL_FORMAT_A8_UNORM,
+ .name = "ISL_FORMAT_A8_UNORM",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I8_UNORM] = {
+ .format = ISL_FORMAT_I8_UNORM,
+ .name = "ISL_FORMAT_I8_UNORM",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_UNORM, 8 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8_UNORM] = {
+ .format = ISL_FORMAT_L8_UNORM,
+ .name = "ISL_FORMAT_L8_UNORM",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_UNORM, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P4A4_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_P4A4_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_P4A4_UNORM_PALETTE0",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 4 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A4P4_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_A4P4_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_A4P4_UNORM_PALETTE0",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 4 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_SSCALED] = {
+ .format = ISL_FORMAT_R8_SSCALED,
+ .name = "ISL_FORMAT_R8_SSCALED",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8_USCALED] = {
+ .format = ISL_FORMAT_R8_USCALED,
+ .name = "ISL_FORMAT_R8_USCALED",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P8_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_P8_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_P8_UNORM_PALETTE0",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_L8_UNORM_SRGB,
+ .name = "ISL_FORMAT_L8_UNORM_SRGB",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_UNORM, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P8_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_P8_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_P8_UNORM_PALETTE1",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 8 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P4A4_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_P4A4_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_P4A4_UNORM_PALETTE1",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 4 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_A4P4_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_A4P4_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_A4P4_UNORM_PALETTE1",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 4 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_Y8_UNORM] = {
+ .format = ISL_FORMAT_Y8_UNORM,
+ .name = "ISL_FORMAT_Y8_UNORM",
+ .bpb = 0,
+ .bw = 0,
+ .bh = 0,
+ .bd = 0,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8_UINT] = {
+ .format = ISL_FORMAT_L8_UINT,
+ .name = "ISL_FORMAT_L8_UINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_UINT, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_L8_SINT] = {
+ .format = ISL_FORMAT_L8_SINT,
+ .name = "ISL_FORMAT_L8_SINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = { ISL_SINT, 8 },
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I8_UINT] = {
+ .format = ISL_FORMAT_I8_UINT,
+ .name = "ISL_FORMAT_I8_UINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_UINT, 8 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_I8_SINT] = {
+ .format = ISL_FORMAT_I8_SINT,
+ .name = "ISL_FORMAT_I8_SINT",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = { ISL_SINT, 8 },
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_DXT1_RGB_SRGB] = {
+ .format = ISL_FORMAT_DXT1_RGB_SRGB,
+ .name = "ISL_FORMAT_DXT1_RGB_SRGB",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_DXT1,
+ },
+
+ [ISL_FORMAT_R1_UNORM] = {
+ .format = ISL_FORMAT_R1_UNORM,
+ .name = "ISL_FORMAT_R1_UNORM",
+ .bpb = 1,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 1 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_YCRCB_NORMAL] = {
+ .format = ISL_FORMAT_YCRCB_NORMAL,
+ .name = "ISL_FORMAT_YCRCB_NORMAL",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_YCRCB_SWAPUVY] = {
+ .format = ISL_FORMAT_YCRCB_SWAPUVY,
+ .name = "ISL_FORMAT_YCRCB_SWAPUVY",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P2_UNORM_PALETTE0] = {
+ .format = ISL_FORMAT_P2_UNORM_PALETTE0,
+ .name = "ISL_FORMAT_P2_UNORM_PALETTE0",
+ .bpb = 2,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 2 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_P2_UNORM_PALETTE1] = {
+ .format = ISL_FORMAT_P2_UNORM_PALETTE1,
+ .name = "ISL_FORMAT_P2_UNORM_PALETTE1",
+ .bpb = 2,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = { ISL_UNORM, 2 },
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_BC1_UNORM] = {
+ .format = ISL_FORMAT_BC1_UNORM,
+ .name = "ISL_FORMAT_BC1_UNORM",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_DXT1,
+ },
+
+ [ISL_FORMAT_BC2_UNORM] = {
+ .format = ISL_FORMAT_BC2_UNORM,
+ .name = "ISL_FORMAT_BC2_UNORM",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_DXT3,
+ },
+
+ [ISL_FORMAT_BC3_UNORM] = {
+ .format = ISL_FORMAT_BC3_UNORM,
+ .name = "ISL_FORMAT_BC3_UNORM",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_DXT5,
+ },
+
+ [ISL_FORMAT_BC4_UNORM] = {
+ .format = ISL_FORMAT_BC4_UNORM,
+ .name = "ISL_FORMAT_BC4_UNORM",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_RGTC1,
+ },
+
+ [ISL_FORMAT_BC5_UNORM] = {
+ .format = ISL_FORMAT_BC5_UNORM,
+ .name = "ISL_FORMAT_BC5_UNORM",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_RGTC2,
+ },
+
+ [ISL_FORMAT_BC1_UNORM_SRGB] = {
+ .format = ISL_FORMAT_BC1_UNORM_SRGB,
+ .name = "ISL_FORMAT_BC1_UNORM_SRGB",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_DXT1,
+ },
+
+ [ISL_FORMAT_BC2_UNORM_SRGB] = {
+ .format = ISL_FORMAT_BC2_UNORM_SRGB,
+ .name = "ISL_FORMAT_BC2_UNORM_SRGB",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_DXT3,
+ },
+
+ [ISL_FORMAT_BC3_UNORM_SRGB] = {
+ .format = ISL_FORMAT_BC3_UNORM_SRGB,
+ .name = "ISL_FORMAT_BC3_UNORM_SRGB",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = { ISL_UNORM, 4 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_DXT5,
+ },
+
+ [ISL_FORMAT_MONO8] = {
+ .format = ISL_FORMAT_MONO8,
+ .name = "ISL_FORMAT_MONO8",
+ .bpb = 1,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_YCRCB_SWAPUV] = {
+ .format = ISL_FORMAT_YCRCB_SWAPUV,
+ .name = "ISL_FORMAT_YCRCB_SWAPUV",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_YCRCB_SWAPY] = {
+ .format = ISL_FORMAT_YCRCB_SWAPY,
+ .name = "ISL_FORMAT_YCRCB_SWAPY",
+ .bpb = 16,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_DXT1_RGB] = {
+ .format = ISL_FORMAT_DXT1_RGB,
+ .name = "ISL_FORMAT_DXT1_RGB",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_DXT1,
+ },
+
+ [ISL_FORMAT_FXT1] = {
+ .format = ISL_FORMAT_FXT1,
+ .name = "ISL_FORMAT_FXT1",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 4 },
+ .g = { ISL_UNORM, 4 },
+ .b = { ISL_UNORM, 4 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_FXT1,
+ },
+
+ [ISL_FORMAT_R8G8B8_UNORM] = {
+ .format = ISL_FORMAT_R8G8B8_UNORM,
+ .name = "ISL_FORMAT_R8G8B8_UNORM",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8_SNORM] = {
+ .format = ISL_FORMAT_R8G8B8_SNORM,
+ .name = "ISL_FORMAT_R8G8B8_SNORM",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = { ISL_SNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8_SSCALED] = {
+ .format = ISL_FORMAT_R8G8B8_SSCALED,
+ .name = "ISL_FORMAT_R8G8B8_SSCALED",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 8 },
+ .g = { ISL_SSCALED, 8 },
+ .b = { ISL_SSCALED, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8_USCALED] = {
+ .format = ISL_FORMAT_R8G8B8_USCALED,
+ .name = "ISL_FORMAT_R8G8B8_USCALED",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 8 },
+ .g = { ISL_USCALED, 8 },
+ .b = { ISL_USCALED, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64B64A64_FLOAT] = {
+ .format = ISL_FORMAT_R64G64B64A64_FLOAT,
+ .name = "ISL_FORMAT_R64G64B64A64_FLOAT",
+ .bpb = 256,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 64 },
+ .g = { ISL_SFLOAT, 64 },
+ .b = { ISL_SFLOAT, 64 },
+ .a = { ISL_SFLOAT, 64 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64B64_FLOAT] = {
+ .format = ISL_FORMAT_R64G64B64_FLOAT,
+ .name = "ISL_FORMAT_R64G64B64_FLOAT",
+ .bpb = 196,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 64 },
+ .g = { ISL_SFLOAT, 64 },
+ .b = { ISL_SFLOAT, 64 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_BC4_SNORM] = {
+ .format = ISL_FORMAT_BC4_SNORM,
+ .name = "ISL_FORMAT_BC4_SNORM",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_RGTC1,
+ },
+
+ [ISL_FORMAT_BC5_SNORM] = {
+ .format = ISL_FORMAT_BC5_SNORM,
+ .name = "ISL_FORMAT_BC5_SNORM",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 8 },
+ .g = { ISL_SNORM, 8 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_RGTC2,
+ },
+
+ [ISL_FORMAT_R16G16B16_FLOAT] = {
+ .format = ISL_FORMAT_R16G16B16_FLOAT,
+ .name = "ISL_FORMAT_R16G16B16_FLOAT",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16_UNORM] = {
+ .format = ISL_FORMAT_R16G16B16_UNORM,
+ .name = "ISL_FORMAT_R16G16B16_UNORM",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 16 },
+ .g = { ISL_UNORM, 16 },
+ .b = { ISL_UNORM, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16_SNORM] = {
+ .format = ISL_FORMAT_R16G16B16_SNORM,
+ .name = "ISL_FORMAT_R16G16B16_SNORM",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 16 },
+ .g = { ISL_SNORM, 16 },
+ .b = { ISL_SNORM, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16_SSCALED] = {
+ .format = ISL_FORMAT_R16G16B16_SSCALED,
+ .name = "ISL_FORMAT_R16G16B16_SSCALED",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 16 },
+ .g = { ISL_SSCALED, 16 },
+ .b = { ISL_SSCALED, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16_USCALED] = {
+ .format = ISL_FORMAT_R16G16B16_USCALED,
+ .name = "ISL_FORMAT_R16G16B16_USCALED",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 16 },
+ .g = { ISL_USCALED, 16 },
+ .b = { ISL_USCALED, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_BC6H_SF16] = {
+ .format = ISL_FORMAT_BC6H_SF16,
+ .name = "ISL_FORMAT_BC6H_SF16",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_BPTC,
+ },
+
+ [ISL_FORMAT_BC7_UNORM] = {
+ .format = ISL_FORMAT_BC7_UNORM,
+ .name = "ISL_FORMAT_BC7_UNORM",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_BPTC,
+ },
+
+ [ISL_FORMAT_BC7_UNORM_SRGB] = {
+ .format = ISL_FORMAT_BC7_UNORM_SRGB,
+ .name = "ISL_FORMAT_BC7_UNORM_SRGB",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_BPTC,
+ },
+
+ [ISL_FORMAT_BC6H_UF16] = {
+ .format = ISL_FORMAT_BC6H_UF16,
+ .name = "ISL_FORMAT_BC6H_UF16",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UFLOAT, 16 },
+ .g = { ISL_UFLOAT, 16 },
+ .b = { ISL_UFLOAT, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_BPTC,
+ },
+
+ [ISL_FORMAT_PLANAR_420_8] = {
+ .format = ISL_FORMAT_PLANAR_420_8,
+ .name = "ISL_FORMAT_PLANAR_420_8",
+ .bpb = 0,
+ .bw = 0,
+ .bh = 0,
+ .bd = 0,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_YUV,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8_UNORM_SRGB] = {
+ .format = ISL_FORMAT_R8G8B8_UNORM_SRGB,
+ .name = "ISL_FORMAT_R8G8B8_UNORM_SRGB",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_ETC1_RGB8] = {
+ .format = ISL_FORMAT_ETC1_RGB8,
+ .name = "ISL_FORMAT_ETC1_RGB8",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC1,
+ },
+
+ [ISL_FORMAT_ETC2_RGB8] = {
+ .format = ISL_FORMAT_ETC2_RGB8,
+ .name = "ISL_FORMAT_ETC2_RGB8",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_EAC_R11] = {
+ .format = ISL_FORMAT_EAC_R11,
+ .name = "ISL_FORMAT_EAC_R11",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 11 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_EAC_RG11] = {
+ .format = ISL_FORMAT_EAC_RG11,
+ .name = "ISL_FORMAT_EAC_RG11",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 11 },
+ .g = { ISL_UNORM, 11 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_EAC_SIGNED_R11] = {
+ .format = ISL_FORMAT_EAC_SIGNED_R11,
+ .name = "ISL_FORMAT_EAC_SIGNED_R11",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 11 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_EAC_SIGNED_RG11] = {
+ .format = ISL_FORMAT_EAC_SIGNED_RG11,
+ .name = "ISL_FORMAT_EAC_SIGNED_RG11",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 11 },
+ .g = { ISL_SNORM, 11 },
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_ETC2_SRGB8] = {
+ .format = ISL_FORMAT_ETC2_SRGB8,
+ .name = "ISL_FORMAT_ETC2_SRGB8",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_R16G16B16_UINT] = {
+ .format = ISL_FORMAT_R16G16B16_UINT,
+ .name = "ISL_FORMAT_R16G16B16_UINT",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 16 },
+ .g = { ISL_UINT, 16 },
+ .b = { ISL_UINT, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R16G16B16_SINT] = {
+ .format = ISL_FORMAT_R16G16B16_SINT,
+ .name = "ISL_FORMAT_R16G16B16_SINT",
+ .bpb = 48,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 16 },
+ .g = { ISL_SINT, 16 },
+ .b = { ISL_SINT, 16 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R32_SFIXED] = {
+ .format = ISL_FORMAT_R32_SFIXED,
+ .name = "ISL_FORMAT_R32_SFIXED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFIXED, 16 },
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_SNORM] = {
+ .format = ISL_FORMAT_R10G10B10A2_SNORM,
+ .name = "ISL_FORMAT_R10G10B10A2_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 10 },
+ .g = { ISL_SNORM, 10 },
+ .b = { ISL_SNORM, 10 },
+ .a = { ISL_SNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_USCALED] = {
+ .format = ISL_FORMAT_R10G10B10A2_USCALED,
+ .name = "ISL_FORMAT_R10G10B10A2_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 10 },
+ .g = { ISL_USCALED, 10 },
+ .b = { ISL_USCALED, 10 },
+ .a = { ISL_USCALED, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_SSCALED] = {
+ .format = ISL_FORMAT_R10G10B10A2_SSCALED,
+ .name = "ISL_FORMAT_R10G10B10A2_SSCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 10 },
+ .g = { ISL_SSCALED, 10 },
+ .b = { ISL_SSCALED, 10 },
+ .a = { ISL_SSCALED, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R10G10B10A2_SINT] = {
+ .format = ISL_FORMAT_R10G10B10A2_SINT,
+ .name = "ISL_FORMAT_R10G10B10A2_SINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 10 },
+ .g = { ISL_SINT, 10 },
+ .b = { ISL_SINT, 10 },
+ .a = { ISL_SINT, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_SNORM] = {
+ .format = ISL_FORMAT_B10G10R10A2_SNORM,
+ .name = "ISL_FORMAT_B10G10R10A2_SNORM",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SNORM, 10 },
+ .g = { ISL_SNORM, 10 },
+ .b = { ISL_SNORM, 10 },
+ .a = { ISL_SNORM, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_USCALED] = {
+ .format = ISL_FORMAT_B10G10R10A2_USCALED,
+ .name = "ISL_FORMAT_B10G10R10A2_USCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_USCALED, 10 },
+ .g = { ISL_USCALED, 10 },
+ .b = { ISL_USCALED, 10 },
+ .a = { ISL_USCALED, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_SSCALED] = {
+ .format = ISL_FORMAT_B10G10R10A2_SSCALED,
+ .name = "ISL_FORMAT_B10G10R10A2_SSCALED",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SSCALED, 10 },
+ .g = { ISL_SSCALED, 10 },
+ .b = { ISL_SSCALED, 10 },
+ .a = { ISL_SSCALED, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_UINT] = {
+ .format = ISL_FORMAT_B10G10R10A2_UINT,
+ .name = "ISL_FORMAT_B10G10R10A2_UINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 10 },
+ .g = { ISL_UINT, 10 },
+ .b = { ISL_UINT, 10 },
+ .a = { ISL_UINT, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_B10G10R10A2_SINT] = {
+ .format = ISL_FORMAT_B10G10R10A2_SINT,
+ .name = "ISL_FORMAT_B10G10R10A2_SINT",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 10 },
+ .g = { ISL_SINT, 10 },
+ .b = { ISL_SINT, 10 },
+ .a = { ISL_SINT, 2 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64B64A64_PASSTHRU] = {
+ .format = ISL_FORMAT_R64G64B64A64_PASSTHRU,
+ .name = "ISL_FORMAT_R64G64B64A64_PASSTHRU",
+ .bpb = 256,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_RAW, 64 },
+ .g = { ISL_RAW, 64 },
+ .b = { ISL_RAW, 64 },
+ .a = { ISL_RAW, 64 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R64G64B64_PASSTHRU] = {
+ .format = ISL_FORMAT_R64G64B64_PASSTHRU,
+ .name = "ISL_FORMAT_R64G64B64_PASSTHRU",
+ .bpb = 192,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_RAW, 64 },
+ .g = { ISL_RAW, 64 },
+ .b = { ISL_RAW, 64 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_ETC2_RGB8_PTA] = {
+ .format = ISL_FORMAT_ETC2_RGB8_PTA,
+ .name = "ISL_FORMAT_ETC2_RGB8_PTA",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_ETC2_SRGB8_PTA] = {
+ .format = ISL_FORMAT_ETC2_SRGB8_PTA,
+ .name = "ISL_FORMAT_ETC2_SRGB8_PTA",
+ .bpb = 64,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 1 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_ETC2_EAC_RGBA8] = {
+ .format = ISL_FORMAT_ETC2_EAC_RGBA8,
+ .name = "ISL_FORMAT_ETC2_EAC_RGBA8",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_ETC2_EAC_SRGB8_A8] = {
+ .format = ISL_FORMAT_ETC2_EAC_SRGB8_A8,
+ .name = "ISL_FORMAT_ETC2_EAC_SRGB8_A8",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ETC2,
+ },
+
+ [ISL_FORMAT_R8G8B8_UINT] = {
+ .format = ISL_FORMAT_R8G8B8_UINT,
+ .name = "ISL_FORMAT_R8G8B8_UINT",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UINT, 8 },
+ .g = { ISL_UINT, 8 },
+ .b = { ISL_UINT, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_R8G8B8_SINT] = {
+ .format = ISL_FORMAT_R8G8B8_SINT,
+ .name = "ISL_FORMAT_R8G8B8_SINT",
+ .bpb = 24,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SINT, 8 },
+ .g = { ISL_SINT, 8 },
+ .b = { ISL_SINT, 8 },
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_RAW] = {
+ .format = ISL_FORMAT_RAW,
+ .name = "ISL_FORMAT_RAW",
+ .bpb = 0,
+ .bw = 0,
+ .bh = 0,
+ .bd = 0,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_NONE,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 12,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_UNORM, 8 },
+ .g = { ISL_UNORM, 8 },
+ .b = { ISL_UNORM, 8 },
+ .a = { ISL_UNORM, 8 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_SRGB,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16] = {
+ .format = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16,
+ .name = "ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 12,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_4X4_FLT16",
+ .bpb = 128,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_5X4_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_5X4_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_5X4_FLT16",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_5X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_5X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_5X5_FLT16",
+ .bpb = 128,
+ .bw = 5,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_6X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_6X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_6X5_FLT16",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_6X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_6X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_6X6_FLT16",
+ .bpb = 128,
+ .bw = 6,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_8X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_8X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_8X5_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_8X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_8X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_8X6_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_8X8_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_8X8_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_8X8_FLT16",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_10X5_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_10X5_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_10X5_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 5,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_10X6_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_10X6_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_10X6_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 6,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_10X8_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_10X8_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_10X8_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 8,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_10X10_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_10X10_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_10X10_FLT16",
+ .bpb = 128,
+ .bw = 10,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_12X10_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_12X10_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_12X10_FLT16",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 10,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_ASTC_HDR_2D_12X12_FLT16] = {
+ .format = ISL_FORMAT_ASTC_HDR_2D_12X12_FLT16,
+ .name = "ISL_FORMAT_ASTC_HDR_2D_12X12_FLT16",
+ .bpb = 128,
+ .bw = 12,
+ .bh = 12,
+ .bd = 1,
+ .channels = {
+ .r = { ISL_SFLOAT, 16 },
+ .g = { ISL_SFLOAT, 16 },
+ .b = { ISL_SFLOAT, 16 },
+ .a = { ISL_SFLOAT, 16 },
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_LINEAR,
+ .txc = ISL_TXC_ASTC,
+ },
+
+ [ISL_FORMAT_HIZ] = {
+ .format = ISL_FORMAT_HIZ,
+ .name = "ISL_FORMAT_HIZ",
+ .bpb = 128,
+ .bw = 8,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_HIZ,
+ },
+
+ [ISL_FORMAT_MCS_2X] = {
+ .format = ISL_FORMAT_MCS_2X,
+ .name = "ISL_FORMAT_MCS_2X",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_MCS,
+ },
+
+ [ISL_FORMAT_MCS_4X] = {
+ .format = ISL_FORMAT_MCS_4X,
+ .name = "ISL_FORMAT_MCS_4X",
+ .bpb = 8,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_MCS,
+ },
+
+ [ISL_FORMAT_MCS_8X] = {
+ .format = ISL_FORMAT_MCS_8X,
+ .name = "ISL_FORMAT_MCS_8X",
+ .bpb = 32,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_MCS,
+ },
+
+ [ISL_FORMAT_MCS_16X] = {
+ .format = ISL_FORMAT_MCS_16X,
+ .name = "ISL_FORMAT_MCS_16X",
+ .bpb = 64,
+ .bw = 1,
+ .bh = 1,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_MCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_32BPP_X] = {
+ .format = ISL_FORMAT_GEN7_CCS_32BPP_X,
+ .name = "ISL_FORMAT_GEN7_CCS_32BPP_X",
+ .bpb = 1,
+ .bw = 16,
+ .bh = 2,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_64BPP_X] = {
+ .format = ISL_FORMAT_GEN7_CCS_64BPP_X,
+ .name = "ISL_FORMAT_GEN7_CCS_64BPP_X",
+ .bpb = 1,
+ .bw = 8,
+ .bh = 2,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_128BPP_X] = {
+ .format = ISL_FORMAT_GEN7_CCS_128BPP_X,
+ .name = "ISL_FORMAT_GEN7_CCS_128BPP_X",
+ .bpb = 1,
+ .bw = 4,
+ .bh = 2,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_32BPP_Y] = {
+ .format = ISL_FORMAT_GEN7_CCS_32BPP_Y,
+ .name = "ISL_FORMAT_GEN7_CCS_32BPP_Y",
+ .bpb = 1,
+ .bw = 8,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_64BPP_Y] = {
+ .format = ISL_FORMAT_GEN7_CCS_64BPP_Y,
+ .name = "ISL_FORMAT_GEN7_CCS_64BPP_Y",
+ .bpb = 1,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN7_CCS_128BPP_Y] = {
+ .format = ISL_FORMAT_GEN7_CCS_128BPP_Y,
+ .name = "ISL_FORMAT_GEN7_CCS_128BPP_Y",
+ .bpb = 1,
+ .bw = 2,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN9_CCS_32BPP] = {
+ .format = ISL_FORMAT_GEN9_CCS_32BPP,
+ .name = "ISL_FORMAT_GEN9_CCS_32BPP",
+ .bpb = 2,
+ .bw = 8,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN9_CCS_64BPP] = {
+ .format = ISL_FORMAT_GEN9_CCS_64BPP,
+ .name = "ISL_FORMAT_GEN9_CCS_64BPP",
+ .bpb = 2,
+ .bw = 4,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+ [ISL_FORMAT_GEN9_CCS_128BPP] = {
+ .format = ISL_FORMAT_GEN9_CCS_128BPP,
+ .name = "ISL_FORMAT_GEN9_CCS_128BPP",
+ .bpb = 2,
+ .bw = 2,
+ .bh = 4,
+ .bd = 1,
+ .channels = {
+ .r = {},
+ .g = {},
+ .b = {},
+ .a = {},
+ .l = {},
+ .i = {},
+ .p = {},
+ },
+ .colorspace = ISL_COLORSPACE_NONE,
+ .txc = ISL_TXC_CCS,
+ },
+
+};
+
+enum isl_format
+isl_format_srgb_to_linear(enum isl_format format)
+{
+ switch (format) {
+ case ISL_FORMAT_B8G8R8A8_UNORM_SRGB:
+ return ISL_FORMAT_B8G8R8A8_UNORM;
+ case ISL_FORMAT_R10G10B10A2_UNORM_SRGB:
+ return ISL_FORMAT_R10G10B10A2_UNORM;
+ case ISL_FORMAT_R8G8B8A8_UNORM_SRGB:
+ return ISL_FORMAT_R8G8B8A8_UNORM;
+ case ISL_FORMAT_B10G10R10A2_UNORM_SRGB:
+ return ISL_FORMAT_B10G10R10A2_UNORM;
+ case ISL_FORMAT_B8G8R8X8_UNORM_SRGB:
+ return ISL_FORMAT_B8G8R8X8_UNORM;
+ case ISL_FORMAT_R8G8B8X8_UNORM_SRGB:
+ return ISL_FORMAT_R8G8B8X8_UNORM;
+ case ISL_FORMAT_B5G6R5_UNORM_SRGB:
+ return ISL_FORMAT_B5G6R5_UNORM;
+ case ISL_FORMAT_B5G5R5A1_UNORM_SRGB:
+ return ISL_FORMAT_B5G5R5A1_UNORM;
+ case ISL_FORMAT_B4G4R4A4_UNORM_SRGB:
+ return ISL_FORMAT_B4G4R4A4_UNORM;
+ case ISL_FORMAT_L8A8_UNORM_SRGB:
+ return ISL_FORMAT_L8A8_UNORM;
+ case ISL_FORMAT_B5G5R5X1_UNORM_SRGB:
+ return ISL_FORMAT_B5G5R5X1_UNORM;
+ case ISL_FORMAT_DXT1_RGB_SRGB:
+ return ISL_FORMAT_DXT1_RGB;
+ case ISL_FORMAT_BC1_UNORM_SRGB:
+ return ISL_FORMAT_BC1_UNORM;
+ case ISL_FORMAT_BC2_UNORM_SRGB:
+ return ISL_FORMAT_BC2_UNORM;
+ case ISL_FORMAT_BC3_UNORM_SRGB:
+ return ISL_FORMAT_BC3_UNORM;
+ case ISL_FORMAT_BC7_UNORM_SRGB:
+ return ISL_FORMAT_BC7_UNORM;
+ case ISL_FORMAT_R8G8B8_UNORM_SRGB:
+ return ISL_FORMAT_R8G8B8_UNORM;
+ case ISL_FORMAT_ETC2_SRGB8:
+ return ISL_FORMAT_ETC2_RGB8;
+ case ISL_FORMAT_ETC2_SRGB8_PTA:
+ return ISL_FORMAT_ETC2_RGB8_PTA;
+ case ISL_FORMAT_ETC2_EAC_SRGB8_A8:
+ return ISL_FORMAT_ETC2_EAC_SRGB8_A8;
+ case ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB;
+ case ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB:
+ return ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB;
+ default:
+ return format;
+ }
+}
diff --git a/prebuilt-intermediates/main/api_exec.c b/prebuilt-intermediates/main/api_exec.c
new file mode 100644
index 0000000..7e39154
--- /dev/null
+++ b/prebuilt-intermediates/main/api_exec.c
@@ -0,0 +1,1677 @@
+/* DO NOT EDIT - This file generated automatically by gl_genexec.py script */
+
+/*
+ * Copyright (C) 2012 Intel Corporation
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * Intel Corporation,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/**
+ * \file api_exec.c
+ * Initialize dispatch table.
+ */
+
+
+#include "main/accum.h"
+#include "main/api_loopback.h"
+#include "main/api_exec.h"
+#include "main/arbprogram.h"
+#include "main/atifragshader.h"
+#include "main/attrib.h"
+#include "main/blend.h"
+#include "main/blit.h"
+#include "main/bufferobj.h"
+#include "main/arrayobj.h"
+#include "main/bbox.h"
+#include "main/buffers.h"
+#include "main/clear.h"
+#include "main/clip.h"
+#include "main/colortab.h"
+#include "main/compute.h"
+#include "main/condrender.h"
+#include "main/context.h"
+#include "main/convolve.h"
+#include "main/copyimage.h"
+#include "main/depth.h"
+#include "main/debug_output.h"
+#include "main/dlist.h"
+#include "main/drawpix.h"
+#include "main/drawtex.h"
+#include "main/rastpos.h"
+#include "main/enable.h"
+#include "main/errors.h"
+#include "main/es1_conversion.h"
+#include "main/eval.h"
+#include "main/externalobjects.h"
+#include "main/get.h"
+#include "main/glspirv.h"
+#include "main/feedback.h"
+#include "main/fog.h"
+#include "main/fbobject.h"
+#include "main/framebuffer.h"
+#include "main/genmipmap.h"
+#include "main/hint.h"
+#include "main/histogram.h"
+#include "main/imports.h"
+#include "main/light.h"
+#include "main/lines.h"
+#include "main/matrix.h"
+#include "main/multisample.h"
+#include "main/objectlabel.h"
+#include "main/objectpurge.h"
+#include "main/performance_monitor.h"
+#include "main/performance_query.h"
+#include "main/pipelineobj.h"
+#include "main/pixel.h"
+#include "main/pixelstore.h"
+#include "main/points.h"
+#include "main/polygon.h"
+#include "main/program_resource.h"
+#include "main/querymatrix.h"
+#include "main/queryobj.h"
+#include "main/readpix.h"
+#include "main/samplerobj.h"
+#include "main/scissor.h"
+#include "main/stencil.h"
+#include "main/texenv.h"
+#include "main/texgetimage.h"
+#include "main/teximage.h"
+#include "main/texgen.h"
+#include "main/texobj.h"
+#include "main/texparam.h"
+#include "main/texstate.h"
+#include "main/texstorage.h"
+#include "main/barrier.h"
+#include "main/texturebindless.h"
+#include "main/textureview.h"
+#include "main/transformfeedback.h"
+#include "main/mtypes.h"
+#include "main/varray.h"
+#include "main/viewport.h"
+#include "main/shaderapi.h"
+#include "main/shaderimage.h"
+#include "main/uniforms.h"
+#include "main/syncobj.h"
+#include "main/formatquery.h"
+#include "main/dispatch.h"
+#include "main/vdpau.h"
+#include "vbo/vbo.h"
+
+
+/**
+ * Initialize a context's exec table with pointers to Mesa's supported
+ * GL functions.
+ *
+ * This function depends on ctx->Version.
+ *
+ * \param ctx GL context to which \c exec belongs.
+ */
+void
+_mesa_initialize_exec_table(struct gl_context *ctx)
+{
+ struct _glapi_table *exec;
+
+ exec = ctx->Exec;
+ assert(exec != NULL);
+
+ assert(ctx->Version > 0);
+
+ vbo_initialize_exec_dispatch(ctx, exec);
+
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 30))) {
+ SET_BeginTransformFeedback(exec, _mesa_BeginTransformFeedback);
+ SET_BindBufferRange(exec, _mesa_BindBufferRange);
+ SET_BindFragDataLocation(exec, _mesa_BindFragDataLocation);
+ SET_BindFragDataLocationIndexed(exec, _mesa_BindFragDataLocationIndexed);
+ SET_BindSampler(exec, _mesa_BindSampler);
+ SET_BindTransformFeedback(exec, _mesa_BindTransformFeedback);
+ SET_BlendEquationSeparateiARB(exec, _mesa_BlendEquationSeparateiARB);
+ SET_BlendEquationiARB(exec, _mesa_BlendEquationiARB);
+ SET_BlendFuncSeparateiARB(exec, _mesa_BlendFuncSeparateiARB);
+ SET_BlendFunciARB(exec, _mesa_BlendFunciARB);
+ SET_BlitFramebuffer(exec, _mesa_BlitFramebuffer);
+ SET_ClearBufferfi(exec, _mesa_ClearBufferfi);
+ SET_ClearBufferfv(exec, _mesa_ClearBufferfv);
+ SET_ClearBufferiv(exec, _mesa_ClearBufferiv);
+ SET_ClearBufferuiv(exec, _mesa_ClearBufferuiv);
+ SET_ClientWaitSync(exec, _mesa_ClientWaitSync);
+ SET_CopyBufferSubData(exec, _mesa_CopyBufferSubData);
+ SET_CopyImageSubData(exec, _mesa_CopyImageSubData);
+ SET_DeleteSamplers(exec, _mesa_DeleteSamplers);
+ SET_DeleteSync(exec, _mesa_DeleteSync);
+ SET_EndTransformFeedback(exec, _mesa_EndTransformFeedback);
+ SET_FenceSync(exec, _mesa_FenceSync);
+ SET_FramebufferTextureLayer(exec, _mesa_FramebufferTextureLayer);
+ SET_GenSamplers(exec, _mesa_GenSamplers);
+ SET_InvalidateFramebuffer(exec, _mesa_InvalidateFramebuffer);
+ SET_InvalidateSubFramebuffer(exec, _mesa_InvalidateSubFramebuffer);
+ SET_MinSampleShading(exec, _mesa_MinSampleShading);
+ SET_PauseTransformFeedback(exec, _mesa_PauseTransformFeedback);
+ SET_ResumeTransformFeedback(exec, _mesa_ResumeTransformFeedback);
+ SET_TexStorage2D(exec, _mesa_TexStorage2D);
+ SET_TexStorage3D(exec, _mesa_TexStorage3D);
+ SET_TransformFeedbackVaryings(exec, _mesa_TransformFeedbackVaryings);
+ SET_UniformBlockBinding(exec, _mesa_UniformBlockBinding);
+ SET_VertexAttribDivisor(exec, _mesa_VertexAttribDivisor);
+ SET_VertexAttribIPointer(exec, _mesa_VertexAttribIPointer);
+ SET_WaitSync(exec, _mesa_WaitSync);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 31))) {
+ SET_BindImageTexture(exec, _mesa_BindImageTexture);
+ SET_BindVertexBuffer(exec, _mesa_BindVertexBuffer);
+ SET_BufferStorage(exec, _mesa_BufferStorage);
+ SET_DispatchCompute(exec, _mesa_DispatchCompute);
+ SET_DispatchComputeIndirect(exec, _mesa_DispatchComputeIndirect);
+ SET_MemoryBarrierByRegion(exec, _mesa_MemoryBarrierByRegion);
+ SET_PatchParameteri(exec, _mesa_PatchParameteri);
+ SET_SampleMaski(exec, _mesa_SampleMaski);
+ SET_VertexAttribBinding(exec, _mesa_VertexAttribBinding);
+ SET_VertexBindingDivisor(exec, _mesa_VertexBindingDivisor);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 32))) {
+ SET_BufferStorageMemEXT(exec, _mesa_BufferStorageMemEXT);
+ SET_NamedBufferStorageMemEXT(exec, _mesa_NamedBufferStorageMemEXT);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES || ctx->API == API_OPENGLES2)) {
+ SET_ActiveTexture(exec, _mesa_ActiveTexture);
+ SET_BindBuffer(exec, _mesa_BindBuffer);
+ SET_BindTexture(exec, _mesa_BindTexture);
+ SET_BlendEquationSeparate(exec, _mesa_BlendEquationSeparate);
+ SET_BlendFunc(exec, _mesa_BlendFunc);
+ SET_BlendFuncSeparate(exec, _mesa_BlendFuncSeparate);
+ SET_BufferData(exec, _mesa_BufferData);
+ SET_BufferSubData(exec, _mesa_BufferSubData);
+ SET_CheckFramebufferStatus(exec, _mesa_CheckFramebufferStatus);
+ SET_Clear(exec, _mesa_Clear);
+ SET_CompressedTexImage2D(exec, _mesa_CompressedTexImage2D);
+ SET_CompressedTexSubImage2D(exec, _mesa_CompressedTexSubImage2D);
+ SET_CopyTexImage2D(exec, _mesa_CopyTexImage2D);
+ SET_CopyTexSubImage2D(exec, _mesa_CopyTexSubImage2D);
+ SET_CullFace(exec, _mesa_CullFace);
+ SET_DeleteBuffers(exec, _mesa_DeleteBuffers);
+ SET_DeleteTextures(exec, _mesa_DeleteTextures);
+ SET_DepthFunc(exec, _mesa_DepthFunc);
+ SET_FlushMappedBufferRange(exec, _mesa_FlushMappedBufferRange);
+ SET_FramebufferRenderbuffer(exec, _mesa_FramebufferRenderbuffer);
+ SET_FramebufferTexture2D(exec, _mesa_FramebufferTexture2D);
+ SET_FrontFace(exec, _mesa_FrontFace);
+ SET_GenBuffers(exec, _mesa_GenBuffers);
+ SET_GenRenderbuffers(exec, _mesa_GenRenderbuffers);
+ SET_GenTextures(exec, _mesa_GenTextures);
+ SET_GenerateMipmap(exec, _mesa_GenerateMipmap);
+ SET_LineWidth(exec, _mesa_LineWidth);
+ SET_MapBuffer(exec, _mesa_MapBuffer);
+ SET_MapBufferRange(exec, _mesa_MapBufferRange);
+ SET_PixelStorei(exec, _mesa_PixelStorei);
+ SET_ReadPixels(exec, _mesa_ReadPixels);
+ SET_Scissor(exec, _mesa_Scissor);
+ SET_StencilFunc(exec, _mesa_StencilFunc);
+ SET_StencilOp(exec, _mesa_StencilOp);
+ SET_TexImage2D(exec, _mesa_TexImage2D);
+ SET_TexSubImage2D(exec, _mesa_TexSubImage2D);
+ SET_UnmapBuffer(exec, _mesa_UnmapBuffer);
+ SET_Viewport(exec, _mesa_Viewport);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES)) {
+ SET_LogicOp(exec, _mesa_LogicOp);
+ SET_PointSize(exec, _mesa_PointSize);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES2)) {
+ SET_ActiveShaderProgram(exec, _mesa_ActiveShaderProgram);
+ SET_AttachShader(exec, _mesa_AttachShader);
+ SET_BindAttribLocation(exec, _mesa_BindAttribLocation);
+ SET_BindProgramPipeline(exec, _mesa_BindProgramPipeline);
+ SET_BindVertexArray(exec, _mesa_BindVertexArray);
+ SET_CompressedTexImage3D(exec, _mesa_CompressedTexImage3D);
+ SET_CompressedTexSubImage3D(exec, _mesa_CompressedTexSubImage3D);
+ SET_CopyTexSubImage3D(exec, _mesa_CopyTexSubImage3D);
+ SET_CreateShader(exec, _mesa_CreateShader);
+ SET_DeleteVertexArrays(exec, _mesa_DeleteVertexArrays);
+ SET_DetachShader(exec, _mesa_DetachShader);
+ SET_DisableVertexAttribArray(exec, _mesa_DisableVertexAttribArray);
+ SET_DrawBuffers(exec, _mesa_DrawBuffers);
+ SET_EnableVertexAttribArray(exec, _mesa_EnableVertexAttribArray);
+ SET_FramebufferTexture3D(exec, _mesa_FramebufferTexture3D);
+ SET_GenProgramPipelines(exec, _mesa_GenProgramPipelines);
+ SET_GenVertexArrays(exec, _mesa_GenVertexArrays);
+ SET_GetUniformLocation(exec, _mesa_GetUniformLocation);
+ SET_LinkProgram(exec, _mesa_LinkProgram);
+ SET_ProgramParameteri(exec, _mesa_ProgramParameteri);
+ SET_ReadBuffer(exec, _mesa_ReadBuffer);
+ SET_ReadnPixelsARB(exec, _mesa_ReadnPixelsARB);
+ SET_ShaderSource(exec, _mesa_ShaderSource);
+ SET_StencilFuncSeparate(exec, _mesa_StencilFuncSeparate);
+ SET_StencilMaskSeparate(exec, _mesa_StencilMaskSeparate);
+ SET_StencilOpSeparate(exec, _mesa_StencilOpSeparate);
+ SET_TexImage3D(exec, _mesa_TexImage3D);
+ SET_TexSubImage3D(exec, _mesa_TexSubImage3D);
+ SET_UseProgram(exec, _mesa_UseProgram);
+ SET_UseProgramStages(exec, _mesa_UseProgramStages);
+ SET_VertexAttribPointer(exec, _mesa_VertexAttribPointer);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx))) {
+ SET_AttachObjectARB(exec, _mesa_AttachObjectARB);
+ SET_BeginConditionalRender(exec, _mesa_BeginConditionalRender);
+ SET_BindBufferOffsetEXT(exec, _mesa_BindBufferOffsetEXT);
+ SET_BindImageTextures(exec, _mesa_BindImageTextures);
+ SET_BindSamplers(exec, _mesa_BindSamplers);
+ SET_BindTextures(exec, _mesa_BindTextures);
+ SET_BindVertexBuffers(exec, _mesa_BindVertexBuffers);
+ SET_ClearBufferData(exec, _mesa_ClearBufferData);
+ SET_ClearBufferSubData(exec, _mesa_ClearBufferSubData);
+ SET_ClipControl(exec, _mesa_ClipControl);
+ SET_CompressedTexImage1D(exec, _mesa_CompressedTexImage1D);
+ SET_CompressedTexSubImage1D(exec, _mesa_CompressedTexSubImage1D);
+ SET_CopyTexImage1D(exec, _mesa_CopyTexImage1D);
+ SET_CopyTexSubImage1D(exec, _mesa_CopyTexSubImage1D);
+ SET_CreateShaderObjectARB(exec, _mesa_CreateShaderObjectARB);
+ SET_DetachObjectARB(exec, _mesa_DetachObjectARB);
+ SET_DispatchComputeGroupSizeARB(exec, _mesa_DispatchComputeGroupSizeARB);
+ SET_DrawBuffer(exec, _mesa_DrawBuffer);
+ SET_EndConditionalRender(exec, _mesa_EndConditionalRender);
+ SET_FramebufferTexture1D(exec, _mesa_FramebufferTexture1D);
+ SET_GetImageHandleARB(exec, _mesa_GetImageHandleARB);
+ SET_GetTextureHandleARB(exec, _mesa_GetTextureHandleARB);
+ SET_GetTextureSamplerHandleARB(exec, _mesa_GetTextureSamplerHandleARB);
+ SET_InvalidateBufferData(exec, _mesa_InvalidateBufferData);
+ SET_InvalidateBufferSubData(exec, _mesa_InvalidateBufferSubData);
+ SET_InvalidateTexImage(exec, _mesa_InvalidateTexImage);
+ SET_InvalidateTexSubImage(exec, _mesa_InvalidateTexSubImage);
+ SET_IsImageHandleResidentARB(exec, _mesa_IsImageHandleResidentARB);
+ SET_IsTextureHandleResidentARB(exec, _mesa_IsTextureHandleResidentARB);
+ SET_MakeImageHandleNonResidentARB(exec, _mesa_MakeImageHandleNonResidentARB);
+ SET_MakeImageHandleResidentARB(exec, _mesa_MakeImageHandleResidentARB);
+ SET_MakeTextureHandleNonResidentARB(exec, _mesa_MakeTextureHandleNonResidentARB);
+ SET_MakeTextureHandleResidentARB(exec, _mesa_MakeTextureHandleResidentARB);
+ SET_PixelStoref(exec, _mesa_PixelStoref);
+ SET_PolygonMode(exec, _mesa_PolygonMode);
+ SET_PrimitiveRestartIndex(exec, _mesa_PrimitiveRestartIndex);
+ SET_ShaderStorageBlockBinding(exec, _mesa_ShaderStorageBlockBinding);
+ SET_TexImage1D(exec, _mesa_TexImage1D);
+ SET_TexStorage1D(exec, _mesa_TexStorage1D);
+ SET_TexSubImage1D(exec, _mesa_TexSubImage1D);
+ SET_TextureView(exec, _mesa_TextureView);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGLES)) {
+ SET_PointSizePointerOES(exec, _mesa_PointSizePointerOES);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES)) {
+ SET_ColorPointer(exec, _mesa_ColorPointer);
+ SET_NormalPointer(exec, _mesa_NormalPointer);
+ SET_TexCoordPointer(exec, _mesa_TexCoordPointer);
+ SET_VertexPointer(exec, _mesa_VertexPointer);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_COMPAT)) {
+ SET_EdgeFlagPointer(exec, _mesa_EdgeFlagPointer);
+ SET_FogCoordPointer(exec, _mesa_FogCoordPointer);
+ SET_IndexPointer(exec, _mesa_IndexPointer);
+ SET_SecondaryColorPointer(exec, _mesa_SecondaryColorPointer);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_CORE || (ctx->API == API_OPENGLES2 && ctx->Version >= 31))) {
+ SET_FramebufferTexture(exec, _mesa_FramebufferTexture);
+ SET_ScissorArrayv(exec, _mesa_ScissorArrayv);
+ SET_ScissorIndexed(exec, _mesa_ScissorIndexed);
+ SET_ScissorIndexedv(exec, _mesa_ScissorIndexedv);
+ SET_ViewportArrayv(exec, _mesa_ViewportArrayv);
+ SET_ViewportIndexedf(exec, _mesa_ViewportIndexedf);
+ SET_ViewportIndexedfv(exec, _mesa_ViewportIndexedfv);
+ }
+ if (!_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_CORE)) {
+ SET_BindTextureUnit(exec, _mesa_BindTextureUnit);
+ SET_BlitNamedFramebuffer(exec, _mesa_BlitNamedFramebuffer);
+ SET_ClearNamedBufferData(exec, _mesa_ClearNamedBufferData);
+ SET_ClearNamedBufferSubData(exec, _mesa_ClearNamedBufferSubData);
+ SET_CompressedTextureSubImage1D(exec, _mesa_CompressedTextureSubImage1D);
+ SET_CompressedTextureSubImage2D(exec, _mesa_CompressedTextureSubImage2D);
+ SET_CompressedTextureSubImage3D(exec, _mesa_CompressedTextureSubImage3D);
+ SET_CopyNamedBufferSubData(exec, _mesa_CopyNamedBufferSubData);
+ SET_CopyTextureSubImage1D(exec, _mesa_CopyTextureSubImage1D);
+ SET_CopyTextureSubImage2D(exec, _mesa_CopyTextureSubImage2D);
+ SET_CopyTextureSubImage3D(exec, _mesa_CopyTextureSubImage3D);
+ SET_CreateBuffers(exec, _mesa_CreateBuffers);
+ SET_CreateProgramPipelines(exec, _mesa_CreateProgramPipelines);
+ SET_CreateRenderbuffers(exec, _mesa_CreateRenderbuffers);
+ SET_CreateSamplers(exec, _mesa_CreateSamplers);
+ SET_CreateTextures(exec, _mesa_CreateTextures);
+ SET_CreateVertexArrays(exec, _mesa_CreateVertexArrays);
+ SET_DepthRangeArrayv(exec, _mesa_DepthRangeArrayv);
+ SET_DepthRangeIndexed(exec, _mesa_DepthRangeIndexed);
+ SET_DisableVertexArrayAttrib(exec, _mesa_DisableVertexArrayAttrib);
+ SET_EnableVertexArrayAttrib(exec, _mesa_EnableVertexArrayAttrib);
+ SET_FlushMappedNamedBufferRange(exec, _mesa_FlushMappedNamedBufferRange);
+ SET_GenerateTextureMipmap(exec, _mesa_GenerateTextureMipmap);
+ SET_MapNamedBuffer(exec, _mesa_MapNamedBuffer);
+ SET_MapNamedBufferRange(exec, _mesa_MapNamedBufferRange);
+ SET_NamedBufferData(exec, _mesa_NamedBufferData);
+ SET_NamedBufferStorage(exec, _mesa_NamedBufferStorage);
+ SET_NamedBufferSubData(exec, _mesa_NamedBufferSubData);
+ SET_NamedFramebufferDrawBuffer(exec, _mesa_NamedFramebufferDrawBuffer);
+ SET_NamedFramebufferDrawBuffers(exec, _mesa_NamedFramebufferDrawBuffers);
+ SET_NamedFramebufferReadBuffer(exec, _mesa_NamedFramebufferReadBuffer);
+ SET_NamedFramebufferRenderbuffer(exec, _mesa_NamedFramebufferRenderbuffer);
+ SET_NamedFramebufferTexture(exec, _mesa_NamedFramebufferTexture);
+ SET_NamedFramebufferTextureLayer(exec, _mesa_NamedFramebufferTextureLayer);
+ SET_TextureStorage1D(exec, _mesa_TextureStorage1D);
+ SET_TextureStorage2D(exec, _mesa_TextureStorage2D);
+ SET_TextureStorage3D(exec, _mesa_TextureStorage3D);
+ SET_TextureSubImage1D(exec, _mesa_TextureSubImage1D);
+ SET_TextureSubImage2D(exec, _mesa_TextureSubImage2D);
+ SET_TextureSubImage3D(exec, _mesa_TextureSubImage3D);
+ SET_UnmapNamedBuffer(exec, _mesa_UnmapNamedBuffer);
+ SET_VertexArrayAttribBinding(exec, _mesa_VertexArrayAttribBinding);
+ SET_VertexArrayBindingDivisor(exec, _mesa_VertexArrayBindingDivisor);
+ SET_VertexArrayElementBuffer(exec, _mesa_VertexArrayElementBuffer);
+ SET_VertexArrayVertexBuffer(exec, _mesa_VertexArrayVertexBuffer);
+ SET_VertexArrayVertexBuffers(exec, _mesa_VertexArrayVertexBuffers);
+ SET_VertexAttribLPointer(exec, _mesa_VertexAttribLPointer);
+ }
+ if ((ctx->API == API_OPENGLES2 && ctx->Version >= 31)) {
+ SET_DepthRangeArrayfvOES(exec, _mesa_DepthRangeArrayfvOES);
+ SET_DepthRangeIndexedfOES(exec, _mesa_DepthRangeIndexedfOES);
+ SET_PrimitiveBoundingBox(exec, _mesa_PrimitiveBoundingBox);
+ }
+ if (_mesa_is_desktop_gl(ctx)) {
+ SET_BeginPerfMonitorAMD(exec, _mesa_BeginPerfMonitorAMD);
+ SET_BeginQueryIndexed(exec, _mesa_BeginQueryIndexed);
+ SET_BindBuffersBase(exec, _mesa_BindBuffersBase);
+ SET_BindBuffersRange(exec, _mesa_BindBuffersRange);
+ SET_BufferPageCommitmentARB(exec, _mesa_BufferPageCommitmentARB);
+ SET_ClampColor(exec, _mesa_ClampColor);
+ SET_ClearColorIiEXT(exec, _mesa_ClearColorIiEXT);
+ SET_ClearColorIuiEXT(exec, _mesa_ClearColorIuiEXT);
+ SET_ClearDepth(exec, _mesa_ClearDepth);
+ SET_ClearTexImage(exec, _mesa_ClearTexImage);
+ SET_ClearTexSubImage(exec, _mesa_ClearTexSubImage);
+ SET_CreateProgramObjectARB(exec, _mesa_CreateProgramObjectARB);
+ SET_DeleteObjectARB(exec, _mesa_DeleteObjectARB);
+ SET_DeletePerfMonitorsAMD(exec, _mesa_DeletePerfMonitorsAMD);
+ SET_DepthBoundsEXT(exec, _mesa_DepthBoundsEXT);
+ SET_DepthRange(exec, _mesa_DepthRange);
+ SET_EndPerfMonitorAMD(exec, _mesa_EndPerfMonitorAMD);
+ SET_EndQueryIndexed(exec, _mesa_EndQueryIndexed);
+ SET_GenPerfMonitorsAMD(exec, _mesa_GenPerfMonitorsAMD);
+ SET_GetActiveAtomicCounterBufferiv(exec, _mesa_GetActiveAtomicCounterBufferiv);
+ SET_GetActiveUniformName(exec, _mesa_GetActiveUniformName);
+ SET_GetAttachedObjectsARB(exec, _mesa_GetAttachedObjectsARB);
+ SET_GetBufferSubData(exec, _mesa_GetBufferSubData);
+ SET_GetCompressedTexImage(exec, _mesa_GetCompressedTexImage);
+ SET_GetCompressedTextureSubImage(exec, _mesa_GetCompressedTextureSubImage);
+ SET_GetDoublei_v(exec, _mesa_GetDoublei_v);
+ SET_GetDoublev(exec, _mesa_GetDoublev);
+ SET_GetHandleARB(exec, _mesa_GetHandleARB);
+ SET_GetInfoLogARB(exec, _mesa_GetInfoLogARB);
+ SET_GetObjectParameterfvARB(exec, _mesa_GetObjectParameterfvARB);
+ SET_GetObjectParameterivAPPLE(exec, _mesa_GetObjectParameterivAPPLE);
+ SET_GetObjectParameterivARB(exec, _mesa_GetObjectParameterivARB);
+ SET_GetPerfMonitorCounterDataAMD(exec, _mesa_GetPerfMonitorCounterDataAMD);
+ SET_GetPerfMonitorCounterInfoAMD(exec, _mesa_GetPerfMonitorCounterInfoAMD);
+ SET_GetPerfMonitorCounterStringAMD(exec, _mesa_GetPerfMonitorCounterStringAMD);
+ SET_GetPerfMonitorCountersAMD(exec, _mesa_GetPerfMonitorCountersAMD);
+ SET_GetPerfMonitorGroupStringAMD(exec, _mesa_GetPerfMonitorGroupStringAMD);
+ SET_GetPerfMonitorGroupsAMD(exec, _mesa_GetPerfMonitorGroupsAMD);
+ SET_GetQueryIndexediv(exec, _mesa_GetQueryIndexediv);
+ SET_GetTexImage(exec, _mesa_GetTexImage);
+ SET_GetTextureSubImage(exec, _mesa_GetTextureSubImage);
+ SET_GetVertexAttribdv(exec, _mesa_GetVertexAttribdv);
+ SET_GetnCompressedTexImageARB(exec, _mesa_GetnCompressedTexImageARB);
+ SET_GetnPolygonStippleARB(exec, _mesa_GetnPolygonStippleARB);
+ SET_GetnTexImageARB(exec, _mesa_GetnTexImageARB);
+ SET_GetnUniformdvARB(exec, _mesa_GetnUniformdvARB);
+ SET_MultiModeDrawArraysIBM(exec, _mesa_MultiModeDrawArraysIBM);
+ SET_MultiModeDrawElementsIBM(exec, _mesa_MultiModeDrawElementsIBM);
+ SET_NamedBufferPageCommitmentARB(exec, _mesa_NamedBufferPageCommitmentARB);
+ SET_ObjectPurgeableAPPLE(exec, _mesa_ObjectPurgeableAPPLE);
+ SET_ObjectUnpurgeableAPPLE(exec, _mesa_ObjectUnpurgeableAPPLE);
+ SET_PatchParameterfv(exec, _mesa_PatchParameterfv);
+ SET_PointParameteri(exec, _mesa_PointParameteri);
+ SET_PointParameteriv(exec, _mesa_PointParameteriv);
+ SET_ProgramUniform1d(exec, _mesa_ProgramUniform1d);
+ SET_ProgramUniform1dv(exec, _mesa_ProgramUniform1dv);
+ SET_ProgramUniform2d(exec, _mesa_ProgramUniform2d);
+ SET_ProgramUniform2dv(exec, _mesa_ProgramUniform2dv);
+ SET_ProgramUniform3d(exec, _mesa_ProgramUniform3d);
+ SET_ProgramUniform3dv(exec, _mesa_ProgramUniform3dv);
+ SET_ProgramUniform4d(exec, _mesa_ProgramUniform4d);
+ SET_ProgramUniform4dv(exec, _mesa_ProgramUniform4dv);
+ SET_ProgramUniformHandleui64ARB(exec, _mesa_ProgramUniformHandleui64ARB);
+ SET_ProgramUniformHandleui64vARB(exec, _mesa_ProgramUniformHandleui64vARB);
+ SET_ProgramUniformMatrix2dv(exec, _mesa_ProgramUniformMatrix2dv);
+ SET_ProgramUniformMatrix2x3dv(exec, _mesa_ProgramUniformMatrix2x3dv);
+ SET_ProgramUniformMatrix2x4dv(exec, _mesa_ProgramUniformMatrix2x4dv);
+ SET_ProgramUniformMatrix3dv(exec, _mesa_ProgramUniformMatrix3dv);
+ SET_ProgramUniformMatrix3x2dv(exec, _mesa_ProgramUniformMatrix3x2dv);
+ SET_ProgramUniformMatrix3x4dv(exec, _mesa_ProgramUniformMatrix3x4dv);
+ SET_ProgramUniformMatrix4dv(exec, _mesa_ProgramUniformMatrix4dv);
+ SET_ProgramUniformMatrix4x2dv(exec, _mesa_ProgramUniformMatrix4x2dv);
+ SET_ProgramUniformMatrix4x3dv(exec, _mesa_ProgramUniformMatrix4x3dv);
+ SET_ProvokingVertex(exec, _mesa_ProvokingVertex);
+ SET_SelectPerfMonitorCountersAMD(exec, _mesa_SelectPerfMonitorCountersAMD);
+ SET_SpecializeShaderARB(exec, _mesa_SpecializeShaderARB);
+ SET_StringMarkerGREMEDY(exec, _mesa_StringMarkerGREMEDY);
+ SET_TexImage2DMultisample(exec, _mesa_TexImage2DMultisample);
+ SET_TexImage3DMultisample(exec, _mesa_TexImage3DMultisample);
+ SET_TexStorageMem1DEXT(exec, _mesa_TexStorageMem1DEXT);
+ SET_TextureBarrierNV(exec, _mesa_TextureBarrierNV);
+ SET_TextureStorage1DEXT(exec, _mesa_TextureStorage1DEXT);
+ SET_TextureStorage2DEXT(exec, _mesa_TextureStorage2DEXT);
+ SET_TextureStorage3DEXT(exec, _mesa_TextureStorage3DEXT);
+ SET_TextureStorageMem1DEXT(exec, _mesa_TextureStorageMem1DEXT);
+ SET_UniformHandleui64ARB(exec, _mesa_UniformHandleui64ARB);
+ SET_UniformHandleui64vARB(exec, _mesa_UniformHandleui64vARB);
+ SET_VDPAUFiniNV(exec, _mesa_VDPAUFiniNV);
+ SET_VDPAUGetSurfaceivNV(exec, _mesa_VDPAUGetSurfaceivNV);
+ SET_VDPAUInitNV(exec, _mesa_VDPAUInitNV);
+ SET_VDPAUIsSurfaceNV(exec, _mesa_VDPAUIsSurfaceNV);
+ SET_VDPAUMapSurfacesNV(exec, _mesa_VDPAUMapSurfacesNV);
+ SET_VDPAURegisterOutputSurfaceNV(exec, _mesa_VDPAURegisterOutputSurfaceNV);
+ SET_VDPAURegisterVideoSurfaceNV(exec, _mesa_VDPAURegisterVideoSurfaceNV);
+ SET_VDPAUSurfaceAccessNV(exec, _mesa_VDPAUSurfaceAccessNV);
+ SET_VDPAUUnmapSurfacesNV(exec, _mesa_VDPAUUnmapSurfacesNV);
+ SET_VDPAUUnregisterSurfaceNV(exec, _mesa_VDPAUUnregisterSurfaceNV);
+ SET_VertexAttrib1d(exec, _mesa_VertexAttrib1d);
+ SET_VertexAttrib1dv(exec, _mesa_VertexAttrib1dv);
+ SET_VertexAttrib1s(exec, _mesa_VertexAttrib1s);
+ SET_VertexAttrib1sv(exec, _mesa_VertexAttrib1sv);
+ SET_VertexAttrib2d(exec, _mesa_VertexAttrib2d);
+ SET_VertexAttrib2dv(exec, _mesa_VertexAttrib2dv);
+ SET_VertexAttrib2s(exec, _mesa_VertexAttrib2s);
+ SET_VertexAttrib2sv(exec, _mesa_VertexAttrib2sv);
+ SET_VertexAttrib3d(exec, _mesa_VertexAttrib3d);
+ SET_VertexAttrib3dv(exec, _mesa_VertexAttrib3dv);
+ SET_VertexAttrib3s(exec, _mesa_VertexAttrib3s);
+ SET_VertexAttrib3sv(exec, _mesa_VertexAttrib3sv);
+ SET_VertexAttrib4Nbv(exec, _mesa_VertexAttrib4Nbv);
+ SET_VertexAttrib4Niv(exec, _mesa_VertexAttrib4Niv);
+ SET_VertexAttrib4Nsv(exec, _mesa_VertexAttrib4Nsv);
+ SET_VertexAttrib4Nub(exec, _mesa_VertexAttrib4Nub);
+ SET_VertexAttrib4Nubv(exec, _mesa_VertexAttrib4Nubv);
+ SET_VertexAttrib4Nuiv(exec, _mesa_VertexAttrib4Nuiv);
+ SET_VertexAttrib4Nusv(exec, _mesa_VertexAttrib4Nusv);
+ SET_VertexAttrib4bv(exec, _mesa_VertexAttrib4bv);
+ SET_VertexAttrib4d(exec, _mesa_VertexAttrib4d);
+ SET_VertexAttrib4dv(exec, _mesa_VertexAttrib4dv);
+ SET_VertexAttrib4iv(exec, _mesa_VertexAttrib4iv);
+ SET_VertexAttrib4s(exec, _mesa_VertexAttrib4s);
+ SET_VertexAttrib4sv(exec, _mesa_VertexAttrib4sv);
+ SET_VertexAttrib4ubv(exec, _mesa_VertexAttrib4ubv);
+ SET_VertexAttrib4uiv(exec, _mesa_VertexAttrib4uiv);
+ SET_VertexAttrib4usv(exec, _mesa_VertexAttrib4usv);
+ SET_VertexAttribI1iv(exec, _mesa_VertexAttribI1iv);
+ SET_VertexAttribI1uiv(exec, _mesa_VertexAttribI1uiv);
+ SET_VertexAttribI4bv(exec, _mesa_VertexAttribI4bv);
+ SET_VertexAttribI4sv(exec, _mesa_VertexAttribI4sv);
+ SET_VertexAttribI4ubv(exec, _mesa_VertexAttribI4ubv);
+ SET_VertexAttribI4usv(exec, _mesa_VertexAttribI4usv);
+ SET_VertexAttribLFormat(exec, _mesa_VertexAttribLFormat);
+ }
+ if (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 30)) {
+ SET_BindBufferBase(exec, _mesa_BindBufferBase);
+ SET_ColorMaski(exec, _mesa_ColorMaski);
+ SET_DeleteTransformFeedbacks(exec, _mesa_DeleteTransformFeedbacks);
+ SET_Disablei(exec, _mesa_Disablei);
+ SET_Enablei(exec, _mesa_Enablei);
+ SET_GenTransformFeedbacks(exec, _mesa_GenTransformFeedbacks);
+ SET_GetActiveUniformBlockName(exec, _mesa_GetActiveUniformBlockName);
+ SET_GetActiveUniformBlockiv(exec, _mesa_GetActiveUniformBlockiv);
+ SET_GetActiveUniformsiv(exec, _mesa_GetActiveUniformsiv);
+ SET_GetBufferParameteri64v(exec, _mesa_GetBufferParameteri64v);
+ SET_GetFragDataIndex(exec, _mesa_GetFragDataIndex);
+ SET_GetFragDataLocation(exec, _mesa_GetFragDataLocation);
+ SET_GetInteger64i_v(exec, _mesa_GetInteger64i_v);
+ SET_GetInteger64v(exec, _mesa_GetInteger64v);
+ SET_GetIntegeri_v(exec, _mesa_GetIntegeri_v);
+ SET_GetInternalformati64v(exec, _mesa_GetInternalformati64v);
+ SET_GetInternalformativ(exec, _mesa_GetInternalformativ);
+ SET_GetSamplerParameterIiv(exec, _mesa_GetSamplerParameterIiv);
+ SET_GetSamplerParameterIuiv(exec, _mesa_GetSamplerParameterIuiv);
+ SET_GetSamplerParameterfv(exec, _mesa_GetSamplerParameterfv);
+ SET_GetSamplerParameteriv(exec, _mesa_GetSamplerParameteriv);
+ SET_GetStringi(exec, _mesa_GetStringi);
+ SET_GetSynciv(exec, _mesa_GetSynciv);
+ SET_GetTexParameterIiv(exec, _mesa_GetTexParameterIiv);
+ SET_GetTexParameterIuiv(exec, _mesa_GetTexParameterIuiv);
+ SET_GetTransformFeedbackVarying(exec, _mesa_GetTransformFeedbackVarying);
+ SET_GetUniformBlockIndex(exec, _mesa_GetUniformBlockIndex);
+ SET_GetUniformIndices(exec, _mesa_GetUniformIndices);
+ SET_GetUniformuiv(exec, _mesa_GetUniformuiv);
+ SET_GetVertexAttribIiv(exec, _mesa_GetVertexAttribIiv);
+ SET_GetVertexAttribIuiv(exec, _mesa_GetVertexAttribIuiv);
+ SET_IsEnabledi(exec, _mesa_IsEnabledi);
+ SET_IsSampler(exec, _mesa_IsSampler);
+ SET_IsSync(exec, _mesa_IsSync);
+ SET_IsTransformFeedback(exec, _mesa_IsTransformFeedback);
+ SET_ProgramUniform1ui(exec, _mesa_ProgramUniform1ui);
+ SET_ProgramUniform1uiv(exec, _mesa_ProgramUniform1uiv);
+ SET_ProgramUniform2ui(exec, _mesa_ProgramUniform2ui);
+ SET_ProgramUniform2uiv(exec, _mesa_ProgramUniform2uiv);
+ SET_ProgramUniform3ui(exec, _mesa_ProgramUniform3ui);
+ SET_ProgramUniform3uiv(exec, _mesa_ProgramUniform3uiv);
+ SET_ProgramUniform4ui(exec, _mesa_ProgramUniform4ui);
+ SET_ProgramUniform4uiv(exec, _mesa_ProgramUniform4uiv);
+ SET_RenderbufferStorageMultisample(exec, _mesa_RenderbufferStorageMultisample);
+ SET_SamplerParameterIiv(exec, _mesa_SamplerParameterIiv);
+ SET_SamplerParameterIuiv(exec, _mesa_SamplerParameterIuiv);
+ SET_SamplerParameterf(exec, _mesa_SamplerParameterf);
+ SET_SamplerParameterfv(exec, _mesa_SamplerParameterfv);
+ SET_SamplerParameteri(exec, _mesa_SamplerParameteri);
+ SET_SamplerParameteriv(exec, _mesa_SamplerParameteriv);
+ SET_TexParameterIiv(exec, _mesa_TexParameterIiv);
+ SET_TexParameterIuiv(exec, _mesa_TexParameterIuiv);
+ SET_Uniform1ui(exec, _mesa_Uniform1ui);
+ SET_Uniform1uiv(exec, _mesa_Uniform1uiv);
+ SET_Uniform2ui(exec, _mesa_Uniform2ui);
+ SET_Uniform2uiv(exec, _mesa_Uniform2uiv);
+ SET_Uniform3ui(exec, _mesa_Uniform3ui);
+ SET_Uniform3uiv(exec, _mesa_Uniform3uiv);
+ SET_Uniform4ui(exec, _mesa_Uniform4ui);
+ SET_Uniform4uiv(exec, _mesa_Uniform4uiv);
+ SET_UniformMatrix2x3fv(exec, _mesa_UniformMatrix2x3fv);
+ SET_UniformMatrix2x4fv(exec, _mesa_UniformMatrix2x4fv);
+ SET_UniformMatrix3x2fv(exec, _mesa_UniformMatrix3x2fv);
+ SET_UniformMatrix3x4fv(exec, _mesa_UniformMatrix3x4fv);
+ SET_UniformMatrix4x2fv(exec, _mesa_UniformMatrix4x2fv);
+ SET_UniformMatrix4x3fv(exec, _mesa_UniformMatrix4x3fv);
+ SET_WindowRectanglesEXT(exec, _mesa_WindowRectanglesEXT);
+ }
+ if (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 31)) {
+ SET_GetBooleani_v(exec, _mesa_GetBooleani_v);
+ SET_GetFloati_v(exec, _mesa_GetFloati_v);
+ SET_GetFramebufferParameteriv(exec, _mesa_GetFramebufferParameteriv);
+ SET_GetMultisamplefv(exec, _mesa_GetMultisamplefv);
+ SET_GetProgramInterfaceiv(exec, _mesa_GetProgramInterfaceiv);
+ SET_GetProgramResourceIndex(exec, _mesa_GetProgramResourceIndex);
+ SET_GetProgramResourceLocation(exec, _mesa_GetProgramResourceLocation);
+ SET_GetProgramResourceLocationIndex(exec, _mesa_GetProgramResourceLocationIndex);
+ SET_GetProgramResourceName(exec, _mesa_GetProgramResourceName);
+ SET_GetProgramResourceiv(exec, _mesa_GetProgramResourceiv);
+ SET_GetTexLevelParameterfv(exec, _mesa_GetTexLevelParameterfv);
+ SET_GetTexLevelParameteriv(exec, _mesa_GetTexLevelParameteriv);
+ SET_MemoryBarrier(exec, _mesa_MemoryBarrier);
+ SET_TexStorage2DMultisample(exec, _mesa_TexStorage2DMultisample);
+ SET_TexStorage3DMultisample(exec, _mesa_TexStorage3DMultisample);
+ SET_VertexAttribFormat(exec, _mesa_VertexAttribFormat);
+ SET_VertexAttribIFormat(exec, _mesa_VertexAttribIFormat);
+ }
+ if (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 32)) {
+ SET_CreateMemoryObjectsEXT(exec, _mesa_CreateMemoryObjectsEXT);
+ SET_DeleteMemoryObjectsEXT(exec, _mesa_DeleteMemoryObjectsEXT);
+ SET_DeleteSemaphoresEXT(exec, _mesa_DeleteSemaphoresEXT);
+ SET_GenSemaphoresEXT(exec, _mesa_GenSemaphoresEXT);
+ SET_GetMemoryObjectParameterivEXT(exec, _mesa_GetMemoryObjectParameterivEXT);
+ SET_GetSemaphoreParameterui64vEXT(exec, _mesa_GetSemaphoreParameterui64vEXT);
+ SET_GetUnsignedBytei_vEXT(exec, _mesa_GetUnsignedBytei_vEXT);
+ SET_GetUnsignedBytevEXT(exec, _mesa_GetUnsignedBytevEXT);
+ SET_ImportMemoryFdEXT(exec, _mesa_ImportMemoryFdEXT);
+ SET_ImportSemaphoreFdEXT(exec, _mesa_ImportSemaphoreFdEXT);
+ SET_IsMemoryObjectEXT(exec, _mesa_IsMemoryObjectEXT);
+ SET_IsSemaphoreEXT(exec, _mesa_IsSemaphoreEXT);
+ SET_MemoryObjectParameterivEXT(exec, _mesa_MemoryObjectParameterivEXT);
+ SET_SemaphoreParameterui64vEXT(exec, _mesa_SemaphoreParameterui64vEXT);
+ SET_SignalSemaphoreEXT(exec, _mesa_SignalSemaphoreEXT);
+ SET_TexStorageMem2DEXT(exec, _mesa_TexStorageMem2DEXT);
+ SET_TexStorageMem2DMultisampleEXT(exec, _mesa_TexStorageMem2DMultisampleEXT);
+ SET_TexStorageMem3DEXT(exec, _mesa_TexStorageMem3DEXT);
+ SET_TexStorageMem3DMultisampleEXT(exec, _mesa_TexStorageMem3DMultisampleEXT);
+ SET_TextureStorageMem2DEXT(exec, _mesa_TextureStorageMem2DEXT);
+ SET_TextureStorageMem2DMultisampleEXT(exec, _mesa_TextureStorageMem2DMultisampleEXT);
+ SET_TextureStorageMem3DEXT(exec, _mesa_TextureStorageMem3DEXT);
+ SET_TextureStorageMem3DMultisampleEXT(exec, _mesa_TextureStorageMem3DMultisampleEXT);
+ SET_WaitSemaphoreEXT(exec, _mesa_WaitSemaphoreEXT);
+ }
+ if (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES) {
+ SET_PointParameterf(exec, _mesa_PointParameterf);
+ SET_PointParameterfv(exec, _mesa_PointParameterfv);
+ }
+ if (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES || ctx->API == API_OPENGLES2) {
+ SET_BindFramebuffer(exec, _mesa_BindFramebuffer);
+ SET_BindRenderbuffer(exec, _mesa_BindRenderbuffer);
+ SET_BlendEquation(exec, _mesa_BlendEquation);
+ SET_ClearColor(exec, _mesa_ClearColor);
+ SET_ClearDepthf(exec, _mesa_ClearDepthf);
+ SET_ClearStencil(exec, _mesa_ClearStencil);
+ SET_ColorMask(exec, _mesa_ColorMask);
+ SET_DebugMessageCallback(exec, _mesa_DebugMessageCallback);
+ SET_DebugMessageControl(exec, _mesa_DebugMessageControl);
+ SET_DebugMessageInsert(exec, _mesa_DebugMessageInsert);
+ SET_DeleteFramebuffers(exec, _mesa_DeleteFramebuffers);
+ SET_DeleteRenderbuffers(exec, _mesa_DeleteRenderbuffers);
+ SET_DepthMask(exec, _mesa_DepthMask);
+ SET_DepthRangef(exec, _mesa_DepthRangef);
+ SET_Disable(exec, _mesa_Disable);
+ SET_EGLImageTargetRenderbufferStorageOES(exec, _mesa_EGLImageTargetRenderbufferStorageOES);
+ SET_EGLImageTargetTexture2DOES(exec, _mesa_EGLImageTargetTexture2DOES);
+ SET_Enable(exec, _mesa_Enable);
+ SET_Finish(exec, _mesa_Finish);
+ SET_Flush(exec, _mesa_Flush);
+ SET_GenFramebuffers(exec, _mesa_GenFramebuffers);
+ SET_GetBooleanv(exec, _mesa_GetBooleanv);
+ SET_GetBufferParameteriv(exec, _mesa_GetBufferParameteriv);
+ SET_GetBufferPointerv(exec, _mesa_GetBufferPointerv);
+ SET_GetDebugMessageLog(exec, _mesa_GetDebugMessageLog);
+ SET_GetError(exec, _mesa_GetError);
+ SET_GetFloatv(exec, _mesa_GetFloatv);
+ SET_GetFramebufferAttachmentParameteriv(exec, _mesa_GetFramebufferAttachmentParameteriv);
+ SET_GetIntegerv(exec, _mesa_GetIntegerv);
+ SET_GetObjectLabel(exec, _mesa_GetObjectLabel);
+ SET_GetObjectPtrLabel(exec, _mesa_GetObjectPtrLabel);
+ SET_GetPointerv(exec, _mesa_GetPointerv);
+ SET_GetRenderbufferParameteriv(exec, _mesa_GetRenderbufferParameteriv);
+ SET_GetString(exec, _mesa_GetString);
+ SET_GetTexParameterfv(exec, _mesa_GetTexParameterfv);
+ SET_GetTexParameteriv(exec, _mesa_GetTexParameteriv);
+ SET_Hint(exec, _mesa_Hint);
+ SET_IsBuffer(exec, _mesa_IsBuffer);
+ SET_IsEnabled(exec, _mesa_IsEnabled);
+ SET_IsFramebuffer(exec, _mesa_IsFramebuffer);
+ SET_IsRenderbuffer(exec, _mesa_IsRenderbuffer);
+ SET_IsTexture(exec, _mesa_IsTexture);
+ SET_ObjectLabel(exec, _mesa_ObjectLabel);
+ SET_ObjectPtrLabel(exec, _mesa_ObjectPtrLabel);
+ SET_PolygonOffset(exec, _mesa_PolygonOffset);
+ SET_PolygonOffsetClampEXT(exec, _mesa_PolygonOffsetClampEXT);
+ SET_PopDebugGroup(exec, _mesa_PopDebugGroup);
+ SET_PushDebugGroup(exec, _mesa_PushDebugGroup);
+ SET_RenderbufferStorage(exec, _mesa_RenderbufferStorage);
+ SET_SampleCoverage(exec, _mesa_SampleCoverage);
+ SET_StencilMask(exec, _mesa_StencilMask);
+ SET_TexParameterf(exec, _mesa_TexParameterf);
+ SET_TexParameterfv(exec, _mesa_TexParameterfv);
+ SET_TexParameteri(exec, _mesa_TexParameteri);
+ SET_TexParameteriv(exec, _mesa_TexParameteriv);
+ }
+ if (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES2) {
+ SET_BeginPerfQueryINTEL(exec, _mesa_BeginPerfQueryINTEL);
+ SET_BeginQuery(exec, _mesa_BeginQuery);
+ SET_BlendBarrier(exec, _mesa_BlendBarrier);
+ SET_BlendColor(exec, _mesa_BlendColor);
+ SET_CompileShader(exec, _mesa_CompileShader);
+ SET_CreatePerfQueryINTEL(exec, _mesa_CreatePerfQueryINTEL);
+ SET_CreateProgram(exec, _mesa_CreateProgram);
+ SET_CreateShaderProgramv(exec, _mesa_CreateShaderProgramv);
+ SET_DeletePerfQueryINTEL(exec, _mesa_DeletePerfQueryINTEL);
+ SET_DeleteProgram(exec, _mesa_DeleteProgram);
+ SET_DeleteProgramPipelines(exec, _mesa_DeleteProgramPipelines);
+ SET_DeleteQueries(exec, _mesa_DeleteQueries);
+ SET_DeleteShader(exec, _mesa_DeleteShader);
+ SET_EndPerfQueryINTEL(exec, _mesa_EndPerfQueryINTEL);
+ SET_EndQuery(exec, _mesa_EndQuery);
+ SET_GenQueries(exec, _mesa_GenQueries);
+ SET_GetActiveAttrib(exec, _mesa_GetActiveAttrib);
+ SET_GetActiveUniform(exec, _mesa_GetActiveUniform);
+ SET_GetAttachedShaders(exec, _mesa_GetAttachedShaders);
+ SET_GetAttribLocation(exec, _mesa_GetAttribLocation);
+ SET_GetFirstPerfQueryIdINTEL(exec, _mesa_GetFirstPerfQueryIdINTEL);
+ SET_GetGraphicsResetStatusARB(exec, _mesa_GetGraphicsResetStatusARB);
+ SET_GetNextPerfQueryIdINTEL(exec, _mesa_GetNextPerfQueryIdINTEL);
+ SET_GetPerfCounterInfoINTEL(exec, _mesa_GetPerfCounterInfoINTEL);
+ SET_GetPerfQueryDataINTEL(exec, _mesa_GetPerfQueryDataINTEL);
+ SET_GetPerfQueryIdByNameINTEL(exec, _mesa_GetPerfQueryIdByNameINTEL);
+ SET_GetPerfQueryInfoINTEL(exec, _mesa_GetPerfQueryInfoINTEL);
+ SET_GetProgramBinary(exec, _mesa_GetProgramBinary);
+ SET_GetProgramInfoLog(exec, _mesa_GetProgramInfoLog);
+ SET_GetProgramPipelineInfoLog(exec, _mesa_GetProgramPipelineInfoLog);
+ SET_GetProgramPipelineiv(exec, _mesa_GetProgramPipelineiv);
+ SET_GetProgramiv(exec, _mesa_GetProgramiv);
+ SET_GetQueryObjecti64v(exec, _mesa_GetQueryObjecti64v);
+ SET_GetQueryObjectiv(exec, _mesa_GetQueryObjectiv);
+ SET_GetQueryObjectui64v(exec, _mesa_GetQueryObjectui64v);
+ SET_GetQueryObjectuiv(exec, _mesa_GetQueryObjectuiv);
+ SET_GetQueryiv(exec, _mesa_GetQueryiv);
+ SET_GetShaderInfoLog(exec, _mesa_GetShaderInfoLog);
+ SET_GetShaderPrecisionFormat(exec, _mesa_GetShaderPrecisionFormat);
+ SET_GetShaderSource(exec, _mesa_GetShaderSource);
+ SET_GetShaderiv(exec, _mesa_GetShaderiv);
+ SET_GetUniformfv(exec, _mesa_GetUniformfv);
+ SET_GetUniformiv(exec, _mesa_GetUniformiv);
+ SET_GetVertexAttribPointerv(exec, _mesa_GetVertexAttribPointerv);
+ SET_GetVertexAttribfv(exec, _mesa_GetVertexAttribfv);
+ SET_GetVertexAttribiv(exec, _mesa_GetVertexAttribiv);
+ SET_GetnUniformfvARB(exec, _mesa_GetnUniformfvARB);
+ SET_GetnUniformivARB(exec, _mesa_GetnUniformivARB);
+ SET_GetnUniformuivARB(exec, _mesa_GetnUniformuivARB);
+ SET_IsProgram(exec, _mesa_IsProgram);
+ SET_IsProgramPipeline(exec, _mesa_IsProgramPipeline);
+ SET_IsQuery(exec, _mesa_IsQuery);
+ SET_IsShader(exec, _mesa_IsShader);
+ SET_IsVertexArray(exec, _mesa_IsVertexArray);
+ SET_ProgramBinary(exec, _mesa_ProgramBinary);
+ SET_ProgramUniform1f(exec, _mesa_ProgramUniform1f);
+ SET_ProgramUniform1fv(exec, _mesa_ProgramUniform1fv);
+ SET_ProgramUniform1i(exec, _mesa_ProgramUniform1i);
+ SET_ProgramUniform1iv(exec, _mesa_ProgramUniform1iv);
+ SET_ProgramUniform2f(exec, _mesa_ProgramUniform2f);
+ SET_ProgramUniform2fv(exec, _mesa_ProgramUniform2fv);
+ SET_ProgramUniform2i(exec, _mesa_ProgramUniform2i);
+ SET_ProgramUniform2iv(exec, _mesa_ProgramUniform2iv);
+ SET_ProgramUniform3f(exec, _mesa_ProgramUniform3f);
+ SET_ProgramUniform3fv(exec, _mesa_ProgramUniform3fv);
+ SET_ProgramUniform3i(exec, _mesa_ProgramUniform3i);
+ SET_ProgramUniform3iv(exec, _mesa_ProgramUniform3iv);
+ SET_ProgramUniform4f(exec, _mesa_ProgramUniform4f);
+ SET_ProgramUniform4fv(exec, _mesa_ProgramUniform4fv);
+ SET_ProgramUniform4i(exec, _mesa_ProgramUniform4i);
+ SET_ProgramUniform4iv(exec, _mesa_ProgramUniform4iv);
+ SET_ProgramUniformMatrix2fv(exec, _mesa_ProgramUniformMatrix2fv);
+ SET_ProgramUniformMatrix2x3fv(exec, _mesa_ProgramUniformMatrix2x3fv);
+ SET_ProgramUniformMatrix2x4fv(exec, _mesa_ProgramUniformMatrix2x4fv);
+ SET_ProgramUniformMatrix3fv(exec, _mesa_ProgramUniformMatrix3fv);
+ SET_ProgramUniformMatrix3x2fv(exec, _mesa_ProgramUniformMatrix3x2fv);
+ SET_ProgramUniformMatrix3x4fv(exec, _mesa_ProgramUniformMatrix3x4fv);
+ SET_ProgramUniformMatrix4fv(exec, _mesa_ProgramUniformMatrix4fv);
+ SET_ProgramUniformMatrix4x2fv(exec, _mesa_ProgramUniformMatrix4x2fv);
+ SET_ProgramUniformMatrix4x3fv(exec, _mesa_ProgramUniformMatrix4x3fv);
+ SET_QueryCounter(exec, _mesa_QueryCounter);
+ SET_ReleaseShaderCompiler(exec, _mesa_ReleaseShaderCompiler);
+ SET_ShaderBinary(exec, _mesa_ShaderBinary);
+ SET_Uniform1f(exec, _mesa_Uniform1f);
+ SET_Uniform1fv(exec, _mesa_Uniform1fv);
+ SET_Uniform1i(exec, _mesa_Uniform1i);
+ SET_Uniform1iv(exec, _mesa_Uniform1iv);
+ SET_Uniform2f(exec, _mesa_Uniform2f);
+ SET_Uniform2fv(exec, _mesa_Uniform2fv);
+ SET_Uniform2i(exec, _mesa_Uniform2i);
+ SET_Uniform2iv(exec, _mesa_Uniform2iv);
+ SET_Uniform3f(exec, _mesa_Uniform3f);
+ SET_Uniform3fv(exec, _mesa_Uniform3fv);
+ SET_Uniform3i(exec, _mesa_Uniform3i);
+ SET_Uniform3iv(exec, _mesa_Uniform3iv);
+ SET_Uniform4f(exec, _mesa_Uniform4f);
+ SET_Uniform4fv(exec, _mesa_Uniform4fv);
+ SET_Uniform4i(exec, _mesa_Uniform4i);
+ SET_Uniform4iv(exec, _mesa_Uniform4iv);
+ SET_UniformMatrix2fv(exec, _mesa_UniformMatrix2fv);
+ SET_UniformMatrix3fv(exec, _mesa_UniformMatrix3fv);
+ SET_UniformMatrix4fv(exec, _mesa_UniformMatrix4fv);
+ SET_ValidateProgram(exec, _mesa_ValidateProgram);
+ SET_ValidateProgramPipeline(exec, _mesa_ValidateProgramPipeline);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 30))) {
+ SET_BeginTransformFeedback(exec, _mesa_BeginTransformFeedback_no_error);
+ SET_BindBufferRange(exec, _mesa_BindBufferRange_no_error);
+ SET_BindFragDataLocation(exec, _mesa_BindFragDataLocation_no_error);
+ SET_BindFragDataLocationIndexed(exec, _mesa_BindFragDataLocationIndexed_no_error);
+ SET_BindSampler(exec, _mesa_BindSampler_no_error);
+ SET_BindTransformFeedback(exec, _mesa_BindTransformFeedback_no_error);
+ SET_BlendEquationSeparateiARB(exec, _mesa_BlendEquationSeparateiARB_no_error);
+ SET_BlendEquationiARB(exec, _mesa_BlendEquationiARB_no_error);
+ SET_BlendFuncSeparateiARB(exec, _mesa_BlendFuncSeparateiARB_no_error);
+ SET_BlendFunciARB(exec, _mesa_BlendFunciARB_no_error);
+ SET_BlitFramebuffer(exec, _mesa_BlitFramebuffer_no_error);
+ SET_ClearBufferfi(exec, _mesa_ClearBufferfi_no_error);
+ SET_ClearBufferfv(exec, _mesa_ClearBufferfv_no_error);
+ SET_ClearBufferiv(exec, _mesa_ClearBufferiv_no_error);
+ SET_ClearBufferuiv(exec, _mesa_ClearBufferuiv_no_error);
+ SET_ClientWaitSync(exec, _mesa_ClientWaitSync_no_error);
+ SET_CopyBufferSubData(exec, _mesa_CopyBufferSubData_no_error);
+ SET_CopyImageSubData(exec, _mesa_CopyImageSubData_no_error);
+ SET_DeleteSamplers(exec, _mesa_DeleteSamplers_no_error);
+ SET_DeleteSync(exec, _mesa_DeleteSync_no_error);
+ SET_EndTransformFeedback(exec, _mesa_EndTransformFeedback_no_error);
+ SET_FenceSync(exec, _mesa_FenceSync_no_error);
+ SET_FramebufferTextureLayer(exec, _mesa_FramebufferTextureLayer_no_error);
+ SET_GenSamplers(exec, _mesa_GenSamplers_no_error);
+ SET_InvalidateFramebuffer(exec, _mesa_InvalidateFramebuffer_no_error);
+ SET_InvalidateSubFramebuffer(exec, _mesa_InvalidateSubFramebuffer_no_error);
+ SET_MinSampleShading(exec, _mesa_MinSampleShading_no_error);
+ SET_PauseTransformFeedback(exec, _mesa_PauseTransformFeedback_no_error);
+ SET_ResumeTransformFeedback(exec, _mesa_ResumeTransformFeedback_no_error);
+ SET_TexStorage2D(exec, _mesa_TexStorage2D_no_error);
+ SET_TexStorage3D(exec, _mesa_TexStorage3D_no_error);
+ SET_TransformFeedbackVaryings(exec, _mesa_TransformFeedbackVaryings_no_error);
+ SET_UniformBlockBinding(exec, _mesa_UniformBlockBinding_no_error);
+ SET_VertexAttribDivisor(exec, _mesa_VertexAttribDivisor_no_error);
+ SET_VertexAttribIPointer(exec, _mesa_VertexAttribIPointer_no_error);
+ SET_WaitSync(exec, _mesa_WaitSync_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 31))) {
+ SET_BindImageTexture(exec, _mesa_BindImageTexture_no_error);
+ SET_BindVertexBuffer(exec, _mesa_BindVertexBuffer_no_error);
+ SET_BufferStorage(exec, _mesa_BufferStorage_no_error);
+ SET_DispatchCompute(exec, _mesa_DispatchCompute_no_error);
+ SET_DispatchComputeIndirect(exec, _mesa_DispatchComputeIndirect_no_error);
+ SET_MemoryBarrierByRegion(exec, _mesa_MemoryBarrierByRegion_no_error);
+ SET_PatchParameteri(exec, _mesa_PatchParameteri_no_error);
+ SET_SampleMaski(exec, _mesa_SampleMaski_no_error);
+ SET_VertexAttribBinding(exec, _mesa_VertexAttribBinding_no_error);
+ SET_VertexBindingDivisor(exec, _mesa_VertexBindingDivisor_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || (ctx->API == API_OPENGLES2 && ctx->Version >= 32))) {
+ SET_BufferStorageMemEXT(exec, _mesa_BufferStorageMemEXT_no_error);
+ SET_NamedBufferStorageMemEXT(exec, _mesa_NamedBufferStorageMemEXT_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES || ctx->API == API_OPENGLES2)) {
+ SET_ActiveTexture(exec, _mesa_ActiveTexture_no_error);
+ SET_BindBuffer(exec, _mesa_BindBuffer_no_error);
+ SET_BindTexture(exec, _mesa_BindTexture_no_error);
+ SET_BlendEquationSeparate(exec, _mesa_BlendEquationSeparate_no_error);
+ SET_BlendFunc(exec, _mesa_BlendFunc_no_error);
+ SET_BlendFuncSeparate(exec, _mesa_BlendFuncSeparate_no_error);
+ SET_BufferData(exec, _mesa_BufferData_no_error);
+ SET_BufferSubData(exec, _mesa_BufferSubData_no_error);
+ SET_CheckFramebufferStatus(exec, _mesa_CheckFramebufferStatus_no_error);
+ SET_Clear(exec, _mesa_Clear_no_error);
+ SET_CompressedTexImage2D(exec, _mesa_CompressedTexImage2D_no_error);
+ SET_CompressedTexSubImage2D(exec, _mesa_CompressedTexSubImage2D_no_error);
+ SET_CopyTexImage2D(exec, _mesa_CopyTexImage2D_no_error);
+ SET_CopyTexSubImage2D(exec, _mesa_CopyTexSubImage2D_no_error);
+ SET_CullFace(exec, _mesa_CullFace_no_error);
+ SET_DeleteBuffers(exec, _mesa_DeleteBuffers_no_error);
+ SET_DeleteTextures(exec, _mesa_DeleteTextures_no_error);
+ SET_DepthFunc(exec, _mesa_DepthFunc_no_error);
+ SET_FlushMappedBufferRange(exec, _mesa_FlushMappedBufferRange_no_error);
+ SET_FramebufferRenderbuffer(exec, _mesa_FramebufferRenderbuffer_no_error);
+ SET_FramebufferTexture2D(exec, _mesa_FramebufferTexture2D_no_error);
+ SET_FrontFace(exec, _mesa_FrontFace_no_error);
+ SET_GenBuffers(exec, _mesa_GenBuffers_no_error);
+ SET_GenRenderbuffers(exec, _mesa_GenRenderbuffers_no_error);
+ SET_GenTextures(exec, _mesa_GenTextures_no_error);
+ SET_GenerateMipmap(exec, _mesa_GenerateMipmap_no_error);
+ SET_LineWidth(exec, _mesa_LineWidth_no_error);
+ SET_MapBuffer(exec, _mesa_MapBuffer_no_error);
+ SET_MapBufferRange(exec, _mesa_MapBufferRange_no_error);
+ SET_PixelStorei(exec, _mesa_PixelStorei_no_error);
+ SET_ReadPixels(exec, _mesa_ReadPixels_no_error);
+ SET_Scissor(exec, _mesa_Scissor_no_error);
+ SET_StencilFunc(exec, _mesa_StencilFunc_no_error);
+ SET_StencilOp(exec, _mesa_StencilOp_no_error);
+ SET_TexImage2D(exec, _mesa_TexImage2D_no_error);
+ SET_TexSubImage2D(exec, _mesa_TexSubImage2D_no_error);
+ SET_UnmapBuffer(exec, _mesa_UnmapBuffer_no_error);
+ SET_Viewport(exec, _mesa_Viewport_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES)) {
+ SET_LogicOp(exec, _mesa_LogicOp_no_error);
+ SET_PointSize(exec, _mesa_PointSize_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx) || ctx->API == API_OPENGLES2)) {
+ SET_ActiveShaderProgram(exec, _mesa_ActiveShaderProgram_no_error);
+ SET_AttachShader(exec, _mesa_AttachShader_no_error);
+ SET_BindAttribLocation(exec, _mesa_BindAttribLocation_no_error);
+ SET_BindProgramPipeline(exec, _mesa_BindProgramPipeline_no_error);
+ SET_BindVertexArray(exec, _mesa_BindVertexArray_no_error);
+ SET_CompressedTexImage3D(exec, _mesa_CompressedTexImage3D_no_error);
+ SET_CompressedTexSubImage3D(exec, _mesa_CompressedTexSubImage3D_no_error);
+ SET_CopyTexSubImage3D(exec, _mesa_CopyTexSubImage3D_no_error);
+ SET_CreateShader(exec, _mesa_CreateShader_no_error);
+ SET_DeleteVertexArrays(exec, _mesa_DeleteVertexArrays_no_error);
+ SET_DetachShader(exec, _mesa_DetachShader_no_error);
+ SET_DisableVertexAttribArray(exec, _mesa_DisableVertexAttribArray_no_error);
+ SET_DrawBuffers(exec, _mesa_DrawBuffers_no_error);
+ SET_EnableVertexAttribArray(exec, _mesa_EnableVertexAttribArray_no_error);
+ SET_FramebufferTexture3D(exec, _mesa_FramebufferTexture3D_no_error);
+ SET_GenProgramPipelines(exec, _mesa_GenProgramPipelines_no_error);
+ SET_GenVertexArrays(exec, _mesa_GenVertexArrays_no_error);
+ SET_GetUniformLocation(exec, _mesa_GetUniformLocation_no_error);
+ SET_LinkProgram(exec, _mesa_LinkProgram_no_error);
+ SET_ProgramParameteri(exec, _mesa_ProgramParameteri_no_error);
+ SET_ReadBuffer(exec, _mesa_ReadBuffer_no_error);
+ SET_ReadnPixelsARB(exec, _mesa_ReadnPixelsARB_no_error);
+ SET_ShaderSource(exec, _mesa_ShaderSource_no_error);
+ SET_StencilFuncSeparate(exec, _mesa_StencilFuncSeparate_no_error);
+ SET_StencilMaskSeparate(exec, _mesa_StencilMaskSeparate_no_error);
+ SET_StencilOpSeparate(exec, _mesa_StencilOpSeparate_no_error);
+ SET_TexImage3D(exec, _mesa_TexImage3D_no_error);
+ SET_TexSubImage3D(exec, _mesa_TexSubImage3D_no_error);
+ SET_UseProgram(exec, _mesa_UseProgram_no_error);
+ SET_UseProgramStages(exec, _mesa_UseProgramStages_no_error);
+ SET_VertexAttribPointer(exec, _mesa_VertexAttribPointer_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (_mesa_is_desktop_gl(ctx))) {
+ SET_AttachObjectARB(exec, _mesa_AttachObjectARB_no_error);
+ SET_BeginConditionalRender(exec, _mesa_BeginConditionalRender_no_error);
+ SET_BindBufferOffsetEXT(exec, _mesa_BindBufferOffsetEXT_no_error);
+ SET_BindImageTextures(exec, _mesa_BindImageTextures_no_error);
+ SET_BindSamplers(exec, _mesa_BindSamplers_no_error);
+ SET_BindTextures(exec, _mesa_BindTextures_no_error);
+ SET_BindVertexBuffers(exec, _mesa_BindVertexBuffers_no_error);
+ SET_ClearBufferData(exec, _mesa_ClearBufferData_no_error);
+ SET_ClearBufferSubData(exec, _mesa_ClearBufferSubData_no_error);
+ SET_ClipControl(exec, _mesa_ClipControl_no_error);
+ SET_CompressedTexImage1D(exec, _mesa_CompressedTexImage1D_no_error);
+ SET_CompressedTexSubImage1D(exec, _mesa_CompressedTexSubImage1D_no_error);
+ SET_CopyTexImage1D(exec, _mesa_CopyTexImage1D_no_error);
+ SET_CopyTexSubImage1D(exec, _mesa_CopyTexSubImage1D_no_error);
+ SET_CreateShaderObjectARB(exec, _mesa_CreateShaderObjectARB_no_error);
+ SET_DetachObjectARB(exec, _mesa_DetachObjectARB_no_error);
+ SET_DispatchComputeGroupSizeARB(exec, _mesa_DispatchComputeGroupSizeARB_no_error);
+ SET_DrawBuffer(exec, _mesa_DrawBuffer_no_error);
+ SET_EndConditionalRender(exec, _mesa_EndConditionalRender_no_error);
+ SET_FramebufferTexture1D(exec, _mesa_FramebufferTexture1D_no_error);
+ SET_GetImageHandleARB(exec, _mesa_GetImageHandleARB_no_error);
+ SET_GetTextureHandleARB(exec, _mesa_GetTextureHandleARB_no_error);
+ SET_GetTextureSamplerHandleARB(exec, _mesa_GetTextureSamplerHandleARB_no_error);
+ SET_InvalidateBufferData(exec, _mesa_InvalidateBufferData_no_error);
+ SET_InvalidateBufferSubData(exec, _mesa_InvalidateBufferSubData_no_error);
+ SET_InvalidateTexImage(exec, _mesa_InvalidateTexImage_no_error);
+ SET_InvalidateTexSubImage(exec, _mesa_InvalidateTexSubImage_no_error);
+ SET_IsImageHandleResidentARB(exec, _mesa_IsImageHandleResidentARB_no_error);
+ SET_IsTextureHandleResidentARB(exec, _mesa_IsTextureHandleResidentARB_no_error);
+ SET_MakeImageHandleNonResidentARB(exec, _mesa_MakeImageHandleNonResidentARB_no_error);
+ SET_MakeImageHandleResidentARB(exec, _mesa_MakeImageHandleResidentARB_no_error);
+ SET_MakeTextureHandleNonResidentARB(exec, _mesa_MakeTextureHandleNonResidentARB_no_error);
+ SET_MakeTextureHandleResidentARB(exec, _mesa_MakeTextureHandleResidentARB_no_error);
+ SET_PixelStoref(exec, _mesa_PixelStoref_no_error);
+ SET_PolygonMode(exec, _mesa_PolygonMode_no_error);
+ SET_PrimitiveRestartIndex(exec, _mesa_PrimitiveRestartIndex_no_error);
+ SET_ShaderStorageBlockBinding(exec, _mesa_ShaderStorageBlockBinding_no_error);
+ SET_TexImage1D(exec, _mesa_TexImage1D_no_error);
+ SET_TexStorage1D(exec, _mesa_TexStorage1D_no_error);
+ SET_TexSubImage1D(exec, _mesa_TexSubImage1D_no_error);
+ SET_TextureView(exec, _mesa_TextureView_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGLES)) {
+ SET_PointSizePointerOES(exec, _mesa_PointSizePointerOES_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES)) {
+ SET_ColorPointer(exec, _mesa_ColorPointer_no_error);
+ SET_NormalPointer(exec, _mesa_NormalPointer_no_error);
+ SET_TexCoordPointer(exec, _mesa_TexCoordPointer_no_error);
+ SET_VertexPointer(exec, _mesa_VertexPointer_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_COMPAT)) {
+ SET_EdgeFlagPointer(exec, _mesa_EdgeFlagPointer_no_error);
+ SET_FogCoordPointer(exec, _mesa_FogCoordPointer_no_error);
+ SET_IndexPointer(exec, _mesa_IndexPointer_no_error);
+ SET_SecondaryColorPointer(exec, _mesa_SecondaryColorPointer_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_CORE || (ctx->API == API_OPENGLES2 && ctx->Version >= 31))) {
+ SET_FramebufferTexture(exec, _mesa_FramebufferTexture_no_error);
+ SET_ScissorArrayv(exec, _mesa_ScissorArrayv_no_error);
+ SET_ScissorIndexed(exec, _mesa_ScissorIndexed_no_error);
+ SET_ScissorIndexedv(exec, _mesa_ScissorIndexedv_no_error);
+ SET_ViewportArrayv(exec, _mesa_ViewportArrayv_no_error);
+ SET_ViewportIndexedf(exec, _mesa_ViewportIndexedf_no_error);
+ SET_ViewportIndexedfv(exec, _mesa_ViewportIndexedfv_no_error);
+ }
+ if (_mesa_is_no_error_enabled(ctx) && (ctx->API == API_OPENGL_CORE)) {
+ SET_BindTextureUnit(exec, _mesa_BindTextureUnit_no_error);
+ SET_BlitNamedFramebuffer(exec, _mesa_BlitNamedFramebuffer_no_error);
+ SET_ClearNamedBufferData(exec, _mesa_ClearNamedBufferData_no_error);
+ SET_ClearNamedBufferSubData(exec, _mesa_ClearNamedBufferSubData_no_error);
+ SET_CompressedTextureSubImage1D(exec, _mesa_CompressedTextureSubImage1D_no_error);
+ SET_CompressedTextureSubImage2D(exec, _mesa_CompressedTextureSubImage2D_no_error);
+ SET_CompressedTextureSubImage3D(exec, _mesa_CompressedTextureSubImage3D_no_error);
+ SET_CopyNamedBufferSubData(exec, _mesa_CopyNamedBufferSubData_no_error);
+ SET_CopyTextureSubImage1D(exec, _mesa_CopyTextureSubImage1D_no_error);
+ SET_CopyTextureSubImage2D(exec, _mesa_CopyTextureSubImage2D_no_error);
+ SET_CopyTextureSubImage3D(exec, _mesa_CopyTextureSubImage3D_no_error);
+ SET_CreateBuffers(exec, _mesa_CreateBuffers_no_error);
+ SET_CreateProgramPipelines(exec, _mesa_CreateProgramPipelines_no_error);
+ SET_CreateRenderbuffers(exec, _mesa_CreateRenderbuffers_no_error);
+ SET_CreateSamplers(exec, _mesa_CreateSamplers_no_error);
+ SET_CreateTextures(exec, _mesa_CreateTextures_no_error);
+ SET_CreateVertexArrays(exec, _mesa_CreateVertexArrays_no_error);
+ SET_DepthRangeArrayv(exec, _mesa_DepthRangeArrayv_no_error);
+ SET_DepthRangeIndexed(exec, _mesa_DepthRangeIndexed_no_error);
+ SET_DisableVertexArrayAttrib(exec, _mesa_DisableVertexArrayAttrib_no_error);
+ SET_EnableVertexArrayAttrib(exec, _mesa_EnableVertexArrayAttrib_no_error);
+ SET_FlushMappedNamedBufferRange(exec, _mesa_FlushMappedNamedBufferRange_no_error);
+ SET_GenerateTextureMipmap(exec, _mesa_GenerateTextureMipmap_no_error);
+ SET_MapNamedBuffer(exec, _mesa_MapNamedBuffer_no_error);
+ SET_MapNamedBufferRange(exec, _mesa_MapNamedBufferRange_no_error);
+ SET_NamedBufferData(exec, _mesa_NamedBufferData_no_error);
+ SET_NamedBufferStorage(exec, _mesa_NamedBufferStorage_no_error);
+ SET_NamedBufferSubData(exec, _mesa_NamedBufferSubData_no_error);
+ SET_NamedFramebufferDrawBuffer(exec, _mesa_NamedFramebufferDrawBuffer_no_error);
+ SET_NamedFramebufferDrawBuffers(exec, _mesa_NamedFramebufferDrawBuffers_no_error);
+ SET_NamedFramebufferReadBuffer(exec, _mesa_NamedFramebufferReadBuffer_no_error);
+ SET_NamedFramebufferRenderbuffer(exec, _mesa_NamedFramebufferRenderbuffer_no_error);
+ SET_NamedFramebufferTexture(exec, _mesa_NamedFramebufferTexture_no_error);
+ SET_NamedFramebufferTextureLayer(exec, _mesa_NamedFramebufferTextureLayer_no_error);
+ SET_TextureStorage1D(exec, _mesa_TextureStorage1D_no_error);
+ SET_TextureStorage2D(exec, _mesa_TextureStorage2D_no_error);
+ SET_TextureStorage3D(exec, _mesa_TextureStorage3D_no_error);
+ SET_TextureSubImage1D(exec, _mesa_TextureSubImage1D_no_error);
+ SET_TextureSubImage2D(exec, _mesa_TextureSubImage2D_no_error);
+ SET_TextureSubImage3D(exec, _mesa_TextureSubImage3D_no_error);
+ SET_UnmapNamedBuffer(exec, _mesa_UnmapNamedBuffer_no_error);
+ SET_VertexArrayAttribBinding(exec, _mesa_VertexArrayAttribBinding_no_error);
+ SET_VertexArrayBindingDivisor(exec, _mesa_VertexArrayBindingDivisor_no_error);
+ SET_VertexArrayElementBuffer(exec, _mesa_VertexArrayElementBuffer_no_error);
+ SET_VertexArrayVertexBuffer(exec, _mesa_VertexArrayVertexBuffer_no_error);
+ SET_VertexArrayVertexBuffers(exec, _mesa_VertexArrayVertexBuffers_no_error);
+ SET_VertexAttribLPointer(exec, _mesa_VertexAttribLPointer_no_error);
+ }
+ if (ctx->API == API_OPENGLES) {
+ SET_AlphaFuncx(exec, _mesa_AlphaFuncx);
+ SET_ClearColorx(exec, _mesa_ClearColorx);
+ SET_ClearDepthx(exec, _mesa_ClearDepthx);
+ SET_ClipPlanef(exec, _mesa_ClipPlanef);
+ SET_ClipPlanex(exec, _mesa_ClipPlanex);
+ SET_Color4x(exec, _mesa_Color4x);
+ SET_DepthRangex(exec, _mesa_DepthRangex);
+ SET_DrawTexfOES(exec, _mesa_DrawTexfOES);
+ SET_DrawTexfvOES(exec, _mesa_DrawTexfvOES);
+ SET_DrawTexiOES(exec, _mesa_DrawTexiOES);
+ SET_DrawTexivOES(exec, _mesa_DrawTexivOES);
+ SET_DrawTexsOES(exec, _mesa_DrawTexsOES);
+ SET_DrawTexsvOES(exec, _mesa_DrawTexsvOES);
+ SET_DrawTexxOES(exec, _mesa_DrawTexxOES);
+ SET_DrawTexxvOES(exec, _mesa_DrawTexxvOES);
+ SET_Fogx(exec, _mesa_Fogx);
+ SET_Fogxv(exec, _mesa_Fogxv);
+ SET_Frustumf(exec, _mesa_Frustumf);
+ SET_Frustumx(exec, _mesa_Frustumx);
+ SET_GetClipPlanef(exec, _mesa_GetClipPlanef);
+ SET_GetClipPlanex(exec, _mesa_GetClipPlanex);
+ SET_GetFixedv(exec, _mesa_GetFixedv);
+ SET_GetLightxv(exec, _mesa_GetLightxv);
+ SET_GetMaterialxv(exec, _mesa_GetMaterialxv);
+ SET_GetTexEnvxv(exec, _mesa_GetTexEnvxv);
+ SET_GetTexGenxvOES(exec, _mesa_GetTexGenxvOES);
+ SET_GetTexParameterxv(exec, _mesa_GetTexParameterxv);
+ SET_LightModelx(exec, _mesa_LightModelx);
+ SET_LightModelxv(exec, _mesa_LightModelxv);
+ SET_Lightx(exec, _mesa_Lightx);
+ SET_Lightxv(exec, _mesa_Lightxv);
+ SET_LineWidthx(exec, _mesa_LineWidthx);
+ SET_LoadMatrixx(exec, _mesa_LoadMatrixx);
+ SET_Materialx(exec, _mesa_Materialx);
+ SET_Materialxv(exec, _mesa_Materialxv);
+ SET_MultMatrixx(exec, _mesa_MultMatrixx);
+ SET_MultiTexCoord4x(exec, _mesa_MultiTexCoord4x);
+ SET_Normal3x(exec, _mesa_Normal3x);
+ SET_Orthof(exec, _mesa_Orthof);
+ SET_Orthox(exec, _mesa_Orthox);
+ SET_PointParameterx(exec, _mesa_PointParameterx);
+ SET_PointParameterxv(exec, _mesa_PointParameterxv);
+ SET_PointSizex(exec, _mesa_PointSizex);
+ SET_PolygonOffsetx(exec, _mesa_PolygonOffsetx);
+ SET_QueryMatrixxOES(exec, _mesa_QueryMatrixxOES);
+ SET_Rotatex(exec, _mesa_Rotatex);
+ SET_SampleCoveragex(exec, _mesa_SampleCoveragex);
+ SET_Scalex(exec, _mesa_Scalex);
+ SET_TexEnvx(exec, _mesa_TexEnvx);
+ SET_TexEnvxv(exec, _mesa_TexEnvxv);
+ SET_TexGenxOES(exec, _mesa_TexGenxOES);
+ SET_TexGenxvOES(exec, _mesa_TexGenxvOES);
+ SET_TexParameterx(exec, _mesa_TexParameterx);
+ SET_TexParameterxv(exec, _mesa_TexParameterxv);
+ SET_Translatex(exec, _mesa_Translatex);
+ }
+ if (ctx->API == API_OPENGLES || ctx->API == API_OPENGLES2) {
+ SET_DiscardFramebufferEXT(exec, _mesa_DiscardFramebufferEXT);
+ }
+ if (ctx->API == API_OPENGL_COMPAT) {
+ SET_Accum(exec, _mesa_Accum);
+ SET_ActiveStencilFaceEXT(exec, _mesa_ActiveStencilFaceEXT);
+ SET_AlphaFragmentOp1ATI(exec, _mesa_AlphaFragmentOp1ATI);
+ SET_AlphaFragmentOp2ATI(exec, _mesa_AlphaFragmentOp2ATI);
+ SET_AlphaFragmentOp3ATI(exec, _mesa_AlphaFragmentOp3ATI);
+ SET_AreTexturesResident(exec, _mesa_AreTexturesResident);
+ SET_BeginFragmentShaderATI(exec, _mesa_BeginFragmentShaderATI);
+ SET_BindFragmentShaderATI(exec, _mesa_BindFragmentShaderATI);
+ SET_BindFramebufferEXT(exec, _mesa_BindFramebufferEXT);
+ SET_BindProgramARB(exec, _mesa_BindProgramARB);
+ SET_BindRenderbufferEXT(exec, _mesa_BindRenderbufferEXT);
+ SET_Bitmap(exec, _mesa_Bitmap);
+ SET_CallList(exec, _mesa_CallList);
+ SET_CallLists(exec, _mesa_CallLists);
+ SET_ClearAccum(exec, _mesa_ClearAccum);
+ SET_ClearIndex(exec, _mesa_ClearIndex);
+ SET_ClipPlane(exec, _mesa_ClipPlane);
+ SET_Color3b(exec, _mesa_Color3b);
+ SET_Color3bv(exec, _mesa_Color3bv);
+ SET_Color3d(exec, _mesa_Color3d);
+ SET_Color3dv(exec, _mesa_Color3dv);
+ SET_Color3i(exec, _mesa_Color3i);
+ SET_Color3iv(exec, _mesa_Color3iv);
+ SET_Color3s(exec, _mesa_Color3s);
+ SET_Color3sv(exec, _mesa_Color3sv);
+ SET_Color3ub(exec, _mesa_Color3ub);
+ SET_Color3ubv(exec, _mesa_Color3ubv);
+ SET_Color3ui(exec, _mesa_Color3ui);
+ SET_Color3uiv(exec, _mesa_Color3uiv);
+ SET_Color3us(exec, _mesa_Color3us);
+ SET_Color3usv(exec, _mesa_Color3usv);
+ SET_Color4b(exec, _mesa_Color4b);
+ SET_Color4bv(exec, _mesa_Color4bv);
+ SET_Color4d(exec, _mesa_Color4d);
+ SET_Color4dv(exec, _mesa_Color4dv);
+ SET_Color4i(exec, _mesa_Color4i);
+ SET_Color4iv(exec, _mesa_Color4iv);
+ SET_Color4s(exec, _mesa_Color4s);
+ SET_Color4sv(exec, _mesa_Color4sv);
+ SET_Color4ubv(exec, _mesa_Color4ubv);
+ SET_Color4ui(exec, _mesa_Color4ui);
+ SET_Color4uiv(exec, _mesa_Color4uiv);
+ SET_Color4us(exec, _mesa_Color4us);
+ SET_Color4usv(exec, _mesa_Color4usv);
+ SET_ColorFragmentOp1ATI(exec, _mesa_ColorFragmentOp1ATI);
+ SET_ColorFragmentOp2ATI(exec, _mesa_ColorFragmentOp2ATI);
+ SET_ColorFragmentOp3ATI(exec, _mesa_ColorFragmentOp3ATI);
+ SET_ColorMaterial(exec, _mesa_ColorMaterial);
+ SET_ColorPointerEXT(exec, _mesa_ColorPointerEXT);
+ SET_ColorSubTable(exec, _mesa_ColorSubTable);
+ SET_ColorTable(exec, _mesa_ColorTable);
+ SET_ColorTableParameterfv(exec, _mesa_ColorTableParameterfv);
+ SET_ColorTableParameteriv(exec, _mesa_ColorTableParameteriv);
+ SET_ConvolutionFilter1D(exec, _mesa_ConvolutionFilter1D);
+ SET_ConvolutionFilter2D(exec, _mesa_ConvolutionFilter2D);
+ SET_ConvolutionParameterf(exec, _mesa_ConvolutionParameterf);
+ SET_ConvolutionParameterfv(exec, _mesa_ConvolutionParameterfv);
+ SET_ConvolutionParameteri(exec, _mesa_ConvolutionParameteri);
+ SET_ConvolutionParameteriv(exec, _mesa_ConvolutionParameteriv);
+ SET_CopyColorSubTable(exec, _mesa_CopyColorSubTable);
+ SET_CopyColorTable(exec, _mesa_CopyColorTable);
+ SET_CopyConvolutionFilter1D(exec, _mesa_CopyConvolutionFilter1D);
+ SET_CopyConvolutionFilter2D(exec, _mesa_CopyConvolutionFilter2D);
+ SET_CopyPixels(exec, _mesa_CopyPixels);
+ SET_DeleteFragmentShaderATI(exec, _mesa_DeleteFragmentShaderATI);
+ SET_DeleteLists(exec, _mesa_DeleteLists);
+ SET_DeleteProgramsARB(exec, _mesa_DeleteProgramsARB);
+ SET_DrawPixels(exec, _mesa_DrawPixels);
+ SET_EdgeFlagPointerEXT(exec, _mesa_EdgeFlagPointerEXT);
+ SET_EdgeFlagv(exec, _mesa_EdgeFlagv);
+ SET_EndFragmentShaderATI(exec, _mesa_EndFragmentShaderATI);
+ SET_EndList(exec, _mesa_EndList);
+ SET_EvalCoord1d(exec, _mesa_EvalCoord1d);
+ SET_EvalCoord1dv(exec, _mesa_EvalCoord1dv);
+ SET_EvalCoord1fv(exec, _mesa_EvalCoord1fv);
+ SET_EvalCoord2d(exec, _mesa_EvalCoord2d);
+ SET_EvalCoord2dv(exec, _mesa_EvalCoord2dv);
+ SET_EvalCoord2fv(exec, _mesa_EvalCoord2fv);
+ SET_FeedbackBuffer(exec, _mesa_FeedbackBuffer);
+ SET_FogCoordd(exec, _mesa_FogCoordd);
+ SET_FogCoorddv(exec, _mesa_FogCoorddv);
+ SET_Fogi(exec, _mesa_Fogi);
+ SET_Fogiv(exec, _mesa_Fogiv);
+ SET_Frustum(exec, _mesa_Frustum);
+ SET_GenFragmentShadersATI(exec, _mesa_GenFragmentShadersATI);
+ SET_GenLists(exec, _mesa_GenLists);
+ SET_GenProgramsARB(exec, _mesa_GenProgramsARB);
+ SET_GetClipPlane(exec, _mesa_GetClipPlane);
+ SET_GetColorTable(exec, _mesa_GetColorTable);
+ SET_GetColorTableParameterfv(exec, _mesa_GetColorTableParameterfv);
+ SET_GetColorTableParameteriv(exec, _mesa_GetColorTableParameteriv);
+ SET_GetConvolutionFilter(exec, _mesa_GetConvolutionFilter);
+ SET_GetConvolutionParameterfv(exec, _mesa_GetConvolutionParameterfv);
+ SET_GetConvolutionParameteriv(exec, _mesa_GetConvolutionParameteriv);
+ SET_GetHistogram(exec, _mesa_GetHistogram);
+ SET_GetHistogramParameterfv(exec, _mesa_GetHistogramParameterfv);
+ SET_GetHistogramParameteriv(exec, _mesa_GetHistogramParameteriv);
+ SET_GetLightiv(exec, _mesa_GetLightiv);
+ SET_GetMapdv(exec, _mesa_GetMapdv);
+ SET_GetMapfv(exec, _mesa_GetMapfv);
+ SET_GetMapiv(exec, _mesa_GetMapiv);
+ SET_GetMaterialiv(exec, _mesa_GetMaterialiv);
+ SET_GetMinmax(exec, _mesa_GetMinmax);
+ SET_GetMinmaxParameterfv(exec, _mesa_GetMinmaxParameterfv);
+ SET_GetMinmaxParameteriv(exec, _mesa_GetMinmaxParameteriv);
+ SET_GetPixelMapfv(exec, _mesa_GetPixelMapfv);
+ SET_GetPixelMapuiv(exec, _mesa_GetPixelMapuiv);
+ SET_GetPixelMapusv(exec, _mesa_GetPixelMapusv);
+ SET_GetPolygonStipple(exec, _mesa_GetPolygonStipple);
+ SET_GetProgramEnvParameterdvARB(exec, _mesa_GetProgramEnvParameterdvARB);
+ SET_GetProgramEnvParameterfvARB(exec, _mesa_GetProgramEnvParameterfvARB);
+ SET_GetProgramLocalParameterdvARB(exec, _mesa_GetProgramLocalParameterdvARB);
+ SET_GetProgramLocalParameterfvARB(exec, _mesa_GetProgramLocalParameterfvARB);
+ SET_GetProgramStringARB(exec, _mesa_GetProgramStringARB);
+ SET_GetProgramivARB(exec, _mesa_GetProgramivARB);
+ SET_GetSeparableFilter(exec, _mesa_GetSeparableFilter);
+ SET_GetTexGendv(exec, _mesa_GetTexGendv);
+ SET_GetnColorTableARB(exec, _mesa_GetnColorTableARB);
+ SET_GetnConvolutionFilterARB(exec, _mesa_GetnConvolutionFilterARB);
+ SET_GetnHistogramARB(exec, _mesa_GetnHistogramARB);
+ SET_GetnMapdvARB(exec, _mesa_GetnMapdvARB);
+ SET_GetnMapfvARB(exec, _mesa_GetnMapfvARB);
+ SET_GetnMapivARB(exec, _mesa_GetnMapivARB);
+ SET_GetnMinmaxARB(exec, _mesa_GetnMinmaxARB);
+ SET_GetnPixelMapfvARB(exec, _mesa_GetnPixelMapfvARB);
+ SET_GetnPixelMapuivARB(exec, _mesa_GetnPixelMapuivARB);
+ SET_GetnPixelMapusvARB(exec, _mesa_GetnPixelMapusvARB);
+ SET_GetnSeparableFilterARB(exec, _mesa_GetnSeparableFilterARB);
+ SET_Histogram(exec, _mesa_Histogram);
+ SET_IndexMask(exec, _mesa_IndexMask);
+ SET_IndexPointerEXT(exec, _mesa_IndexPointerEXT);
+ SET_Indexd(exec, _mesa_Indexd);
+ SET_Indexdv(exec, _mesa_Indexdv);
+ SET_Indexi(exec, _mesa_Indexi);
+ SET_Indexiv(exec, _mesa_Indexiv);
+ SET_Indexs(exec, _mesa_Indexs);
+ SET_Indexsv(exec, _mesa_Indexsv);
+ SET_Indexub(exec, _mesa_Indexub);
+ SET_Indexubv(exec, _mesa_Indexubv);
+ SET_InitNames(exec, _mesa_InitNames);
+ SET_InterleavedArrays(exec, _mesa_InterleavedArrays);
+ SET_IsList(exec, _mesa_IsList);
+ SET_IsProgramARB(exec, _mesa_IsProgramARB);
+ SET_LightModeli(exec, _mesa_LightModeli);
+ SET_LightModeliv(exec, _mesa_LightModeliv);
+ SET_Lighti(exec, _mesa_Lighti);
+ SET_Lightiv(exec, _mesa_Lightiv);
+ SET_LineStipple(exec, _mesa_LineStipple);
+ SET_ListBase(exec, _mesa_ListBase);
+ SET_LoadMatrixd(exec, _mesa_LoadMatrixd);
+ SET_LoadName(exec, _mesa_LoadName);
+ SET_LoadTransposeMatrixd(exec, _mesa_LoadTransposeMatrixd);
+ SET_LoadTransposeMatrixf(exec, _mesa_LoadTransposeMatrixf);
+ SET_LockArraysEXT(exec, _mesa_LockArraysEXT);
+ SET_Map1d(exec, _mesa_Map1d);
+ SET_Map1f(exec, _mesa_Map1f);
+ SET_Map2d(exec, _mesa_Map2d);
+ SET_Map2f(exec, _mesa_Map2f);
+ SET_MapGrid1d(exec, _mesa_MapGrid1d);
+ SET_MapGrid1f(exec, _mesa_MapGrid1f);
+ SET_MapGrid2d(exec, _mesa_MapGrid2d);
+ SET_MapGrid2f(exec, _mesa_MapGrid2f);
+ SET_Materiali(exec, _mesa_Materiali);
+ SET_Materialiv(exec, _mesa_Materialiv);
+ SET_Minmax(exec, _mesa_Minmax);
+ SET_MultMatrixd(exec, _mesa_MultMatrixd);
+ SET_MultTransposeMatrixd(exec, _mesa_MultTransposeMatrixd);
+ SET_MultTransposeMatrixf(exec, _mesa_MultTransposeMatrixf);
+ SET_MultiTexCoord1d(exec, _mesa_MultiTexCoord1d);
+ SET_MultiTexCoord1dv(exec, _mesa_MultiTexCoord1dv);
+ SET_MultiTexCoord1i(exec, _mesa_MultiTexCoord1i);
+ SET_MultiTexCoord1iv(exec, _mesa_MultiTexCoord1iv);
+ SET_MultiTexCoord1s(exec, _mesa_MultiTexCoord1s);
+ SET_MultiTexCoord1sv(exec, _mesa_MultiTexCoord1sv);
+ SET_MultiTexCoord2d(exec, _mesa_MultiTexCoord2d);
+ SET_MultiTexCoord2dv(exec, _mesa_MultiTexCoord2dv);
+ SET_MultiTexCoord2i(exec, _mesa_MultiTexCoord2i);
+ SET_MultiTexCoord2iv(exec, _mesa_MultiTexCoord2iv);
+ SET_MultiTexCoord2s(exec, _mesa_MultiTexCoord2s);
+ SET_MultiTexCoord2sv(exec, _mesa_MultiTexCoord2sv);
+ SET_MultiTexCoord3d(exec, _mesa_MultiTexCoord3d);
+ SET_MultiTexCoord3dv(exec, _mesa_MultiTexCoord3dv);
+ SET_MultiTexCoord3i(exec, _mesa_MultiTexCoord3i);
+ SET_MultiTexCoord3iv(exec, _mesa_MultiTexCoord3iv);
+ SET_MultiTexCoord3s(exec, _mesa_MultiTexCoord3s);
+ SET_MultiTexCoord3sv(exec, _mesa_MultiTexCoord3sv);
+ SET_MultiTexCoord4d(exec, _mesa_MultiTexCoord4d);
+ SET_MultiTexCoord4dv(exec, _mesa_MultiTexCoord4dv);
+ SET_MultiTexCoord4i(exec, _mesa_MultiTexCoord4i);
+ SET_MultiTexCoord4iv(exec, _mesa_MultiTexCoord4iv);
+ SET_MultiTexCoord4s(exec, _mesa_MultiTexCoord4s);
+ SET_MultiTexCoord4sv(exec, _mesa_MultiTexCoord4sv);
+ SET_NewList(exec, _mesa_NewList);
+ SET_Normal3b(exec, _mesa_Normal3b);
+ SET_Normal3bv(exec, _mesa_Normal3bv);
+ SET_Normal3d(exec, _mesa_Normal3d);
+ SET_Normal3dv(exec, _mesa_Normal3dv);
+ SET_Normal3i(exec, _mesa_Normal3i);
+ SET_Normal3iv(exec, _mesa_Normal3iv);
+ SET_Normal3s(exec, _mesa_Normal3s);
+ SET_Normal3sv(exec, _mesa_Normal3sv);
+ SET_NormalPointerEXT(exec, _mesa_NormalPointerEXT);
+ SET_Ortho(exec, _mesa_Ortho);
+ SET_PassTexCoordATI(exec, _mesa_PassTexCoordATI);
+ SET_PassThrough(exec, _mesa_PassThrough);
+ SET_PixelMapfv(exec, _mesa_PixelMapfv);
+ SET_PixelMapuiv(exec, _mesa_PixelMapuiv);
+ SET_PixelMapusv(exec, _mesa_PixelMapusv);
+ SET_PixelTransferf(exec, _mesa_PixelTransferf);
+ SET_PixelTransferi(exec, _mesa_PixelTransferi);
+ SET_PixelZoom(exec, _mesa_PixelZoom);
+ SET_PolygonOffsetEXT(exec, _mesa_PolygonOffsetEXT);
+ SET_PolygonStipple(exec, _mesa_PolygonStipple);
+ SET_PopAttrib(exec, _mesa_PopAttrib);
+ SET_PopClientAttrib(exec, _mesa_PopClientAttrib);
+ SET_PopName(exec, _mesa_PopName);
+ SET_PrioritizeTextures(exec, _mesa_PrioritizeTextures);
+ SET_ProgramEnvParameter4dARB(exec, _mesa_ProgramEnvParameter4dARB);
+ SET_ProgramEnvParameter4dvARB(exec, _mesa_ProgramEnvParameter4dvARB);
+ SET_ProgramEnvParameter4fARB(exec, _mesa_ProgramEnvParameter4fARB);
+ SET_ProgramEnvParameter4fvARB(exec, _mesa_ProgramEnvParameter4fvARB);
+ SET_ProgramEnvParameters4fvEXT(exec, _mesa_ProgramEnvParameters4fvEXT);
+ SET_ProgramLocalParameter4dARB(exec, _mesa_ProgramLocalParameter4dARB);
+ SET_ProgramLocalParameter4dvARB(exec, _mesa_ProgramLocalParameter4dvARB);
+ SET_ProgramLocalParameter4fARB(exec, _mesa_ProgramLocalParameter4fARB);
+ SET_ProgramLocalParameter4fvARB(exec, _mesa_ProgramLocalParameter4fvARB);
+ SET_ProgramLocalParameters4fvEXT(exec, _mesa_ProgramLocalParameters4fvEXT);
+ SET_ProgramStringARB(exec, _mesa_ProgramStringARB);
+ SET_PushAttrib(exec, _mesa_PushAttrib);
+ SET_PushClientAttrib(exec, _mesa_PushClientAttrib);
+ SET_PushName(exec, _mesa_PushName);
+ SET_RasterPos2d(exec, _mesa_RasterPos2d);
+ SET_RasterPos2dv(exec, _mesa_RasterPos2dv);
+ SET_RasterPos2f(exec, _mesa_RasterPos2f);
+ SET_RasterPos2fv(exec, _mesa_RasterPos2fv);
+ SET_RasterPos2i(exec, _mesa_RasterPos2i);
+ SET_RasterPos2iv(exec, _mesa_RasterPos2iv);
+ SET_RasterPos2s(exec, _mesa_RasterPos2s);
+ SET_RasterPos2sv(exec, _mesa_RasterPos2sv);
+ SET_RasterPos3d(exec, _mesa_RasterPos3d);
+ SET_RasterPos3dv(exec, _mesa_RasterPos3dv);
+ SET_RasterPos3f(exec, _mesa_RasterPos3f);
+ SET_RasterPos3fv(exec, _mesa_RasterPos3fv);
+ SET_RasterPos3i(exec, _mesa_RasterPos3i);
+ SET_RasterPos3iv(exec, _mesa_RasterPos3iv);
+ SET_RasterPos3s(exec, _mesa_RasterPos3s);
+ SET_RasterPos3sv(exec, _mesa_RasterPos3sv);
+ SET_RasterPos4d(exec, _mesa_RasterPos4d);
+ SET_RasterPos4dv(exec, _mesa_RasterPos4dv);
+ SET_RasterPos4f(exec, _mesa_RasterPos4f);
+ SET_RasterPos4fv(exec, _mesa_RasterPos4fv);
+ SET_RasterPos4i(exec, _mesa_RasterPos4i);
+ SET_RasterPos4iv(exec, _mesa_RasterPos4iv);
+ SET_RasterPos4s(exec, _mesa_RasterPos4s);
+ SET_RasterPos4sv(exec, _mesa_RasterPos4sv);
+ SET_Rectd(exec, _mesa_Rectd);
+ SET_Rectdv(exec, _mesa_Rectdv);
+ SET_Rectfv(exec, _mesa_Rectfv);
+ SET_Recti(exec, _mesa_Recti);
+ SET_Rectiv(exec, _mesa_Rectiv);
+ SET_Rects(exec, _mesa_Rects);
+ SET_Rectsv(exec, _mesa_Rectsv);
+ SET_RenderMode(exec, _mesa_RenderMode);
+ SET_ResetHistogram(exec, _mesa_ResetHistogram);
+ SET_ResetMinmax(exec, _mesa_ResetMinmax);
+ SET_Rotated(exec, _mesa_Rotated);
+ SET_SampleMapATI(exec, _mesa_SampleMapATI);
+ SET_Scaled(exec, _mesa_Scaled);
+ SET_SecondaryColor3b(exec, _mesa_SecondaryColor3b);
+ SET_SecondaryColor3bv(exec, _mesa_SecondaryColor3bv);
+ SET_SecondaryColor3d(exec, _mesa_SecondaryColor3d);
+ SET_SecondaryColor3dv(exec, _mesa_SecondaryColor3dv);
+ SET_SecondaryColor3i(exec, _mesa_SecondaryColor3i);
+ SET_SecondaryColor3iv(exec, _mesa_SecondaryColor3iv);
+ SET_SecondaryColor3s(exec, _mesa_SecondaryColor3s);
+ SET_SecondaryColor3sv(exec, _mesa_SecondaryColor3sv);
+ SET_SecondaryColor3ub(exec, _mesa_SecondaryColor3ub);
+ SET_SecondaryColor3ubv(exec, _mesa_SecondaryColor3ubv);
+ SET_SecondaryColor3ui(exec, _mesa_SecondaryColor3ui);
+ SET_SecondaryColor3uiv(exec, _mesa_SecondaryColor3uiv);
+ SET_SecondaryColor3us(exec, _mesa_SecondaryColor3us);
+ SET_SecondaryColor3usv(exec, _mesa_SecondaryColor3usv);
+ SET_SelectBuffer(exec, _mesa_SelectBuffer);
+ SET_SeparableFilter2D(exec, _mesa_SeparableFilter2D);
+ SET_SetFragmentShaderConstantATI(exec, _mesa_SetFragmentShaderConstantATI);
+ SET_StencilFuncSeparateATI(exec, _mesa_StencilFuncSeparateATI);
+ SET_TexCoord1d(exec, _mesa_TexCoord1d);
+ SET_TexCoord1dv(exec, _mesa_TexCoord1dv);
+ SET_TexCoord1i(exec, _mesa_TexCoord1i);
+ SET_TexCoord1iv(exec, _mesa_TexCoord1iv);
+ SET_TexCoord1s(exec, _mesa_TexCoord1s);
+ SET_TexCoord1sv(exec, _mesa_TexCoord1sv);
+ SET_TexCoord2d(exec, _mesa_TexCoord2d);
+ SET_TexCoord2dv(exec, _mesa_TexCoord2dv);
+ SET_TexCoord2i(exec, _mesa_TexCoord2i);
+ SET_TexCoord2iv(exec, _mesa_TexCoord2iv);
+ SET_TexCoord2s(exec, _mesa_TexCoord2s);
+ SET_TexCoord2sv(exec, _mesa_TexCoord2sv);
+ SET_TexCoord3d(exec, _mesa_TexCoord3d);
+ SET_TexCoord3dv(exec, _mesa_TexCoord3dv);
+ SET_TexCoord3i(exec, _mesa_TexCoord3i);
+ SET_TexCoord3iv(exec, _mesa_TexCoord3iv);
+ SET_TexCoord3s(exec, _mesa_TexCoord3s);
+ SET_TexCoord3sv(exec, _mesa_TexCoord3sv);
+ SET_TexCoord4d(exec, _mesa_TexCoord4d);
+ SET_TexCoord4dv(exec, _mesa_TexCoord4dv);
+ SET_TexCoord4i(exec, _mesa_TexCoord4i);
+ SET_TexCoord4iv(exec, _mesa_TexCoord4iv);
+ SET_TexCoord4s(exec, _mesa_TexCoord4s);
+ SET_TexCoord4sv(exec, _mesa_TexCoord4sv);
+ SET_TexCoordPointerEXT(exec, _mesa_TexCoordPointerEXT);
+ SET_TexGend(exec, _mesa_TexGend);
+ SET_TexGendv(exec, _mesa_TexGendv);
+ SET_Translated(exec, _mesa_Translated);
+ SET_UnlockArraysEXT(exec, _mesa_UnlockArraysEXT);
+ SET_Vertex2d(exec, _mesa_Vertex2d);
+ SET_Vertex2dv(exec, _mesa_Vertex2dv);
+ SET_Vertex2i(exec, _mesa_Vertex2i);
+ SET_Vertex2iv(exec, _mesa_Vertex2iv);
+ SET_Vertex2s(exec, _mesa_Vertex2s);
+ SET_Vertex2sv(exec, _mesa_Vertex2sv);
+ SET_Vertex3d(exec, _mesa_Vertex3d);
+ SET_Vertex3dv(exec, _mesa_Vertex3dv);
+ SET_Vertex3i(exec, _mesa_Vertex3i);
+ SET_Vertex3iv(exec, _mesa_Vertex3iv);
+ SET_Vertex3s(exec, _mesa_Vertex3s);
+ SET_Vertex3sv(exec, _mesa_Vertex3sv);
+ SET_Vertex4d(exec, _mesa_Vertex4d);
+ SET_Vertex4dv(exec, _mesa_Vertex4dv);
+ SET_Vertex4i(exec, _mesa_Vertex4i);
+ SET_Vertex4iv(exec, _mesa_Vertex4iv);
+ SET_Vertex4s(exec, _mesa_Vertex4s);
+ SET_Vertex4sv(exec, _mesa_Vertex4sv);
+ SET_VertexAttrib1dNV(exec, _mesa_VertexAttrib1dNV);
+ SET_VertexAttrib1dvNV(exec, _mesa_VertexAttrib1dvNV);
+ SET_VertexAttrib1sNV(exec, _mesa_VertexAttrib1sNV);
+ SET_VertexAttrib1svNV(exec, _mesa_VertexAttrib1svNV);
+ SET_VertexAttrib2dNV(exec, _mesa_VertexAttrib2dNV);
+ SET_VertexAttrib2dvNV(exec, _mesa_VertexAttrib2dvNV);
+ SET_VertexAttrib2sNV(exec, _mesa_VertexAttrib2sNV);
+ SET_VertexAttrib2svNV(exec, _mesa_VertexAttrib2svNV);
+ SET_VertexAttrib3dNV(exec, _mesa_VertexAttrib3dNV);
+ SET_VertexAttrib3dvNV(exec, _mesa_VertexAttrib3dvNV);
+ SET_VertexAttrib3sNV(exec, _mesa_VertexAttrib3sNV);
+ SET_VertexAttrib3svNV(exec, _mesa_VertexAttrib3svNV);
+ SET_VertexAttrib4dNV(exec, _mesa_VertexAttrib4dNV);
+ SET_VertexAttrib4dvNV(exec, _mesa_VertexAttrib4dvNV);
+ SET_VertexAttrib4sNV(exec, _mesa_VertexAttrib4sNV);
+ SET_VertexAttrib4svNV(exec, _mesa_VertexAttrib4svNV);
+ SET_VertexAttrib4ubNV(exec, _mesa_VertexAttrib4ubNV);
+ SET_VertexAttrib4ubvNV(exec, _mesa_VertexAttrib4ubvNV);
+ SET_VertexAttribs1dvNV(exec, _mesa_VertexAttribs1dvNV);
+ SET_VertexAttribs1fvNV(exec, _mesa_VertexAttribs1fvNV);
+ SET_VertexAttribs1svNV(exec, _mesa_VertexAttribs1svNV);
+ SET_VertexAttribs2dvNV(exec, _mesa_VertexAttribs2dvNV);
+ SET_VertexAttribs2fvNV(exec, _mesa_VertexAttribs2fvNV);
+ SET_VertexAttribs2svNV(exec, _mesa_VertexAttribs2svNV);
+ SET_VertexAttribs3dvNV(exec, _mesa_VertexAttribs3dvNV);
+ SET_VertexAttribs3fvNV(exec, _mesa_VertexAttribs3fvNV);
+ SET_VertexAttribs3svNV(exec, _mesa_VertexAttribs3svNV);
+ SET_VertexAttribs4dvNV(exec, _mesa_VertexAttribs4dvNV);
+ SET_VertexAttribs4fvNV(exec, _mesa_VertexAttribs4fvNV);
+ SET_VertexAttribs4svNV(exec, _mesa_VertexAttribs4svNV);
+ SET_VertexAttribs4ubvNV(exec, _mesa_VertexAttribs4ubvNV);
+ SET_VertexPointerEXT(exec, _mesa_VertexPointerEXT);
+ SET_WindowPos2d(exec, _mesa_WindowPos2d);
+ SET_WindowPos2dv(exec, _mesa_WindowPos2dv);
+ SET_WindowPos2f(exec, _mesa_WindowPos2f);
+ SET_WindowPos2fv(exec, _mesa_WindowPos2fv);
+ SET_WindowPos2i(exec, _mesa_WindowPos2i);
+ SET_WindowPos2iv(exec, _mesa_WindowPos2iv);
+ SET_WindowPos2s(exec, _mesa_WindowPos2s);
+ SET_WindowPos2sv(exec, _mesa_WindowPos2sv);
+ SET_WindowPos3d(exec, _mesa_WindowPos3d);
+ SET_WindowPos3dv(exec, _mesa_WindowPos3dv);
+ SET_WindowPos3f(exec, _mesa_WindowPos3f);
+ SET_WindowPos3fv(exec, _mesa_WindowPos3fv);
+ SET_WindowPos3i(exec, _mesa_WindowPos3i);
+ SET_WindowPos3iv(exec, _mesa_WindowPos3iv);
+ SET_WindowPos3s(exec, _mesa_WindowPos3s);
+ SET_WindowPos3sv(exec, _mesa_WindowPos3sv);
+ SET_WindowPos4dMESA(exec, _mesa_WindowPos4dMESA);
+ SET_WindowPos4dvMESA(exec, _mesa_WindowPos4dvMESA);
+ SET_WindowPos4fMESA(exec, _mesa_WindowPos4fMESA);
+ SET_WindowPos4fvMESA(exec, _mesa_WindowPos4fvMESA);
+ SET_WindowPos4iMESA(exec, _mesa_WindowPos4iMESA);
+ SET_WindowPos4ivMESA(exec, _mesa_WindowPos4ivMESA);
+ SET_WindowPos4sMESA(exec, _mesa_WindowPos4sMESA);
+ SET_WindowPos4svMESA(exec, _mesa_WindowPos4svMESA);
+ }
+ if (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) {
+ SET_AlphaFunc(exec, _mesa_AlphaFunc);
+ SET_ClientActiveTexture(exec, _mesa_ClientActiveTexture);
+ SET_Color4ub(exec, _mesa_Color4ub);
+ SET_DisableClientState(exec, _mesa_DisableClientState);
+ SET_EnableClientState(exec, _mesa_EnableClientState);
+ SET_Fogf(exec, _mesa_Fogf);
+ SET_Fogfv(exec, _mesa_Fogfv);
+ SET_GetLightfv(exec, _mesa_GetLightfv);
+ SET_GetMaterialfv(exec, _mesa_GetMaterialfv);
+ SET_GetTexEnvfv(exec, _mesa_GetTexEnvfv);
+ SET_GetTexEnviv(exec, _mesa_GetTexEnviv);
+ SET_GetTexGenfv(exec, _mesa_GetTexGenfv);
+ SET_GetTexGeniv(exec, _mesa_GetTexGeniv);
+ SET_LightModelf(exec, _mesa_LightModelf);
+ SET_LightModelfv(exec, _mesa_LightModelfv);
+ SET_Lightf(exec, _mesa_Lightf);
+ SET_Lightfv(exec, _mesa_Lightfv);
+ SET_LoadIdentity(exec, _mesa_LoadIdentity);
+ SET_LoadMatrixf(exec, _mesa_LoadMatrixf);
+ SET_Materialf(exec, _mesa_Materialf);
+ SET_MatrixMode(exec, _mesa_MatrixMode);
+ SET_MultMatrixf(exec, _mesa_MultMatrixf);
+ SET_PopMatrix(exec, _mesa_PopMatrix);
+ SET_PushMatrix(exec, _mesa_PushMatrix);
+ SET_Rotatef(exec, _mesa_Rotatef);
+ SET_Scalef(exec, _mesa_Scalef);
+ SET_ShadeModel(exec, _mesa_ShadeModel);
+ SET_TexEnvf(exec, _mesa_TexEnvf);
+ SET_TexEnvfv(exec, _mesa_TexEnvfv);
+ SET_TexEnvi(exec, _mesa_TexEnvi);
+ SET_TexEnviv(exec, _mesa_TexEnviv);
+ SET_TexGenf(exec, _mesa_TexGenf);
+ SET_TexGenfv(exec, _mesa_TexGenfv);
+ SET_TexGeni(exec, _mesa_TexGeni);
+ SET_TexGeniv(exec, _mesa_TexGeniv);
+ SET_Translatef(exec, _mesa_Translatef);
+ }
+ if (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGL_CORE || (ctx->API == API_OPENGLES2 && ctx->Version >= 31)) {
+ SET_FramebufferParameteri(exec, _mesa_FramebufferParameteri);
+ SET_TexBuffer(exec, _mesa_TexBuffer);
+ SET_TexBufferRange(exec, _mesa_TexBufferRange);
+ }
+ if (ctx->API == API_OPENGL_CORE) {
+ SET_CheckNamedFramebufferStatus(exec, _mesa_CheckNamedFramebufferStatus);
+ SET_ClearNamedFramebufferfi(exec, _mesa_ClearNamedFramebufferfi);
+ SET_ClearNamedFramebufferfv(exec, _mesa_ClearNamedFramebufferfv);
+ SET_ClearNamedFramebufferiv(exec, _mesa_ClearNamedFramebufferiv);
+ SET_ClearNamedFramebufferuiv(exec, _mesa_ClearNamedFramebufferuiv);
+ SET_CreateFramebuffers(exec, _mesa_CreateFramebuffers);
+ SET_CreateQueries(exec, _mesa_CreateQueries);
+ SET_CreateTransformFeedbacks(exec, _mesa_CreateTransformFeedbacks);
+ SET_GetActiveSubroutineName(exec, _mesa_GetActiveSubroutineName);
+ SET_GetActiveSubroutineUniformName(exec, _mesa_GetActiveSubroutineUniformName);
+ SET_GetActiveSubroutineUniformiv(exec, _mesa_GetActiveSubroutineUniformiv);
+ SET_GetCompressedTextureImage(exec, _mesa_GetCompressedTextureImage);
+ SET_GetNamedBufferParameteri64v(exec, _mesa_GetNamedBufferParameteri64v);
+ SET_GetNamedBufferParameteriv(exec, _mesa_GetNamedBufferParameteriv);
+ SET_GetNamedBufferPointerv(exec, _mesa_GetNamedBufferPointerv);
+ SET_GetNamedBufferSubData(exec, _mesa_GetNamedBufferSubData);
+ SET_GetNamedFramebufferAttachmentParameteriv(exec, _mesa_GetNamedFramebufferAttachmentParameteriv);
+ SET_GetNamedFramebufferParameteriv(exec, _mesa_GetNamedFramebufferParameteriv);
+ SET_GetNamedRenderbufferParameteriv(exec, _mesa_GetNamedRenderbufferParameteriv);
+ SET_GetProgramStageiv(exec, _mesa_GetProgramStageiv);
+ SET_GetQueryBufferObjecti64v(exec, _mesa_GetQueryBufferObjecti64v);
+ SET_GetQueryBufferObjectiv(exec, _mesa_GetQueryBufferObjectiv);
+ SET_GetQueryBufferObjectui64v(exec, _mesa_GetQueryBufferObjectui64v);
+ SET_GetQueryBufferObjectuiv(exec, _mesa_GetQueryBufferObjectuiv);
+ SET_GetSubroutineIndex(exec, _mesa_GetSubroutineIndex);
+ SET_GetSubroutineUniformLocation(exec, _mesa_GetSubroutineUniformLocation);
+ SET_GetTextureImage(exec, _mesa_GetTextureImage);
+ SET_GetTextureLevelParameterfv(exec, _mesa_GetTextureLevelParameterfv);
+ SET_GetTextureLevelParameteriv(exec, _mesa_GetTextureLevelParameteriv);
+ SET_GetTextureParameterIiv(exec, _mesa_GetTextureParameterIiv);
+ SET_GetTextureParameterIuiv(exec, _mesa_GetTextureParameterIuiv);
+ SET_GetTextureParameterfv(exec, _mesa_GetTextureParameterfv);
+ SET_GetTextureParameteriv(exec, _mesa_GetTextureParameteriv);
+ SET_GetTransformFeedbacki64_v(exec, _mesa_GetTransformFeedbacki64_v);
+ SET_GetTransformFeedbacki_v(exec, _mesa_GetTransformFeedbacki_v);
+ SET_GetTransformFeedbackiv(exec, _mesa_GetTransformFeedbackiv);
+ SET_GetUniformSubroutineuiv(exec, _mesa_GetUniformSubroutineuiv);
+ SET_GetUniformdv(exec, _mesa_GetUniformdv);
+ SET_GetUniformi64vARB(exec, _mesa_GetUniformi64vARB);
+ SET_GetUniformui64vARB(exec, _mesa_GetUniformui64vARB);
+ SET_GetVertexArrayIndexed64iv(exec, _mesa_GetVertexArrayIndexed64iv);
+ SET_GetVertexArrayIndexediv(exec, _mesa_GetVertexArrayIndexediv);
+ SET_GetVertexArrayiv(exec, _mesa_GetVertexArrayiv);
+ SET_GetVertexAttribLdv(exec, _mesa_GetVertexAttribLdv);
+ SET_GetVertexAttribLui64vARB(exec, _mesa_GetVertexAttribLui64vARB);
+ SET_GetnUniformi64vARB(exec, _mesa_GetnUniformi64vARB);
+ SET_GetnUniformui64vARB(exec, _mesa_GetnUniformui64vARB);
+ SET_InvalidateNamedFramebufferData(exec, _mesa_InvalidateNamedFramebufferData);
+ SET_InvalidateNamedFramebufferSubData(exec, _mesa_InvalidateNamedFramebufferSubData);
+ SET_NamedFramebufferParameteri(exec, _mesa_NamedFramebufferParameteri);
+ SET_NamedRenderbufferStorage(exec, _mesa_NamedRenderbufferStorage);
+ SET_NamedRenderbufferStorageMultisample(exec, _mesa_NamedRenderbufferStorageMultisample);
+ SET_ProgramUniform1i64ARB(exec, _mesa_ProgramUniform1i64ARB);
+ SET_ProgramUniform1i64vARB(exec, _mesa_ProgramUniform1i64vARB);
+ SET_ProgramUniform1ui64ARB(exec, _mesa_ProgramUniform1ui64ARB);
+ SET_ProgramUniform1ui64vARB(exec, _mesa_ProgramUniform1ui64vARB);
+ SET_ProgramUniform2i64ARB(exec, _mesa_ProgramUniform2i64ARB);
+ SET_ProgramUniform2i64vARB(exec, _mesa_ProgramUniform2i64vARB);
+ SET_ProgramUniform2ui64ARB(exec, _mesa_ProgramUniform2ui64ARB);
+ SET_ProgramUniform2ui64vARB(exec, _mesa_ProgramUniform2ui64vARB);
+ SET_ProgramUniform3i64ARB(exec, _mesa_ProgramUniform3i64ARB);
+ SET_ProgramUniform3i64vARB(exec, _mesa_ProgramUniform3i64vARB);
+ SET_ProgramUniform3ui64ARB(exec, _mesa_ProgramUniform3ui64ARB);
+ SET_ProgramUniform3ui64vARB(exec, _mesa_ProgramUniform3ui64vARB);
+ SET_ProgramUniform4i64ARB(exec, _mesa_ProgramUniform4i64ARB);
+ SET_ProgramUniform4i64vARB(exec, _mesa_ProgramUniform4i64vARB);
+ SET_ProgramUniform4ui64ARB(exec, _mesa_ProgramUniform4ui64ARB);
+ SET_ProgramUniform4ui64vARB(exec, _mesa_ProgramUniform4ui64vARB);
+ SET_TextureBuffer(exec, _mesa_TextureBuffer);
+ SET_TextureBufferRange(exec, _mesa_TextureBufferRange);
+ SET_TextureParameterIiv(exec, _mesa_TextureParameterIiv);
+ SET_TextureParameterIuiv(exec, _mesa_TextureParameterIuiv);
+ SET_TextureParameterf(exec, _mesa_TextureParameterf);
+ SET_TextureParameterfv(exec, _mesa_TextureParameterfv);
+ SET_TextureParameteri(exec, _mesa_TextureParameteri);
+ SET_TextureParameteriv(exec, _mesa_TextureParameteriv);
+ SET_TextureStorage2DMultisample(exec, _mesa_TextureStorage2DMultisample);
+ SET_TextureStorage3DMultisample(exec, _mesa_TextureStorage3DMultisample);
+ SET_TransformFeedbackBufferBase(exec, _mesa_TransformFeedbackBufferBase);
+ SET_TransformFeedbackBufferRange(exec, _mesa_TransformFeedbackBufferRange);
+ SET_Uniform1d(exec, _mesa_Uniform1d);
+ SET_Uniform1dv(exec, _mesa_Uniform1dv);
+ SET_Uniform1i64ARB(exec, _mesa_Uniform1i64ARB);
+ SET_Uniform1i64vARB(exec, _mesa_Uniform1i64vARB);
+ SET_Uniform1ui64ARB(exec, _mesa_Uniform1ui64ARB);
+ SET_Uniform1ui64vARB(exec, _mesa_Uniform1ui64vARB);
+ SET_Uniform2d(exec, _mesa_Uniform2d);
+ SET_Uniform2dv(exec, _mesa_Uniform2dv);
+ SET_Uniform2i64ARB(exec, _mesa_Uniform2i64ARB);
+ SET_Uniform2i64vARB(exec, _mesa_Uniform2i64vARB);
+ SET_Uniform2ui64ARB(exec, _mesa_Uniform2ui64ARB);
+ SET_Uniform2ui64vARB(exec, _mesa_Uniform2ui64vARB);
+ SET_Uniform3d(exec, _mesa_Uniform3d);
+ SET_Uniform3dv(exec, _mesa_Uniform3dv);
+ SET_Uniform3i64ARB(exec, _mesa_Uniform3i64ARB);
+ SET_Uniform3i64vARB(exec, _mesa_Uniform3i64vARB);
+ SET_Uniform3ui64ARB(exec, _mesa_Uniform3ui64ARB);
+ SET_Uniform3ui64vARB(exec, _mesa_Uniform3ui64vARB);
+ SET_Uniform4d(exec, _mesa_Uniform4d);
+ SET_Uniform4dv(exec, _mesa_Uniform4dv);
+ SET_Uniform4i64ARB(exec, _mesa_Uniform4i64ARB);
+ SET_Uniform4i64vARB(exec, _mesa_Uniform4i64vARB);
+ SET_Uniform4ui64ARB(exec, _mesa_Uniform4ui64ARB);
+ SET_Uniform4ui64vARB(exec, _mesa_Uniform4ui64vARB);
+ SET_UniformMatrix2dv(exec, _mesa_UniformMatrix2dv);
+ SET_UniformMatrix2x3dv(exec, _mesa_UniformMatrix2x3dv);
+ SET_UniformMatrix2x4dv(exec, _mesa_UniformMatrix2x4dv);
+ SET_UniformMatrix3dv(exec, _mesa_UniformMatrix3dv);
+ SET_UniformMatrix3x2dv(exec, _mesa_UniformMatrix3x2dv);
+ SET_UniformMatrix3x4dv(exec, _mesa_UniformMatrix3x4dv);
+ SET_UniformMatrix4dv(exec, _mesa_UniformMatrix4dv);
+ SET_UniformMatrix4x2dv(exec, _mesa_UniformMatrix4x2dv);
+ SET_UniformMatrix4x3dv(exec, _mesa_UniformMatrix4x3dv);
+ SET_UniformSubroutinesuiv(exec, _mesa_UniformSubroutinesuiv);
+ SET_VertexArrayAttribFormat(exec, _mesa_VertexArrayAttribFormat);
+ SET_VertexArrayAttribIFormat(exec, _mesa_VertexArrayAttribIFormat);
+ SET_VertexArrayAttribLFormat(exec, _mesa_VertexArrayAttribLFormat);
+ SET_VertexAttribL1d(exec, _mesa_VertexAttribL1d);
+ SET_VertexAttribL1dv(exec, _mesa_VertexAttribL1dv);
+ SET_VertexAttribL2d(exec, _mesa_VertexAttribL2d);
+ SET_VertexAttribL2dv(exec, _mesa_VertexAttribL2dv);
+ SET_VertexAttribL3d(exec, _mesa_VertexAttribL3d);
+ SET_VertexAttribL3dv(exec, _mesa_VertexAttribL3dv);
+ SET_VertexAttribL4d(exec, _mesa_VertexAttribL4d);
+ SET_VertexAttribL4dv(exec, _mesa_VertexAttribL4dv);
+ }
+
+}
+
diff --git a/prebuilt-intermediates/main/dispatch.h b/prebuilt-intermediates/main/dispatch.h
new file mode 100644
index 0000000..4e2735e
--- /dev/null
+++ b/prebuilt-intermediates/main/dispatch.h
@@ -0,0 +1,18003 @@
+/* DO NOT EDIT - This file generated automatically by gl_table.py (from Mesa) script */
+
+/*
+ * (C) Copyright IBM Corporation 2005
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * IBM,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#if !defined( _DISPATCH_H_ )
+# define _DISPATCH_H_
+
+
+/**
+ * \file main/dispatch.h
+ * Macros for handling GL dispatch tables.
+ *
+ * For each known GL function, there are 3 macros in this file. The first
+ * macro is named CALL_FuncName and is used to call that GL function using
+ * the specified dispatch table. The other 2 macros, called GET_FuncName
+ * can SET_FuncName, are used to get and set the dispatch pointer for the
+ * named function in the specified dispatch table.
+ */
+
+#define CALL_by_offset(disp, cast, offset, parameters) \
+ (*(cast (GET_by_offset(disp, offset)))) parameters
+#define GET_by_offset(disp, offset) \
+ (offset >= 0) ? (((_glapi_proc *)(disp))[offset]) : NULL
+#define SET_by_offset(disp, offset, fn) \
+ do { \
+ if ( (offset) < 0 ) { \
+ /* fprintf( stderr, "[%s:%u] SET_by_offset(%p, %d, %s)!\n", */ \
+ /* __func__, __LINE__, disp, offset, # fn); */ \
+ /* abort(); */ \
+ } \
+ else { \
+ ( (_glapi_proc *) (disp) )[offset] = (_glapi_proc) fn; \
+ } \
+ } while(0)
+
+/* total number of offsets below */
+#define _gloffset_COUNT 1411
+
+#define _gloffset_NewList 0
+#define _gloffset_EndList 1
+#define _gloffset_CallList 2
+#define _gloffset_CallLists 3
+#define _gloffset_DeleteLists 4
+#define _gloffset_GenLists 5
+#define _gloffset_ListBase 6
+#define _gloffset_Begin 7
+#define _gloffset_Bitmap 8
+#define _gloffset_Color3b 9
+#define _gloffset_Color3bv 10
+#define _gloffset_Color3d 11
+#define _gloffset_Color3dv 12
+#define _gloffset_Color3f 13
+#define _gloffset_Color3fv 14
+#define _gloffset_Color3i 15
+#define _gloffset_Color3iv 16
+#define _gloffset_Color3s 17
+#define _gloffset_Color3sv 18
+#define _gloffset_Color3ub 19
+#define _gloffset_Color3ubv 20
+#define _gloffset_Color3ui 21
+#define _gloffset_Color3uiv 22
+#define _gloffset_Color3us 23
+#define _gloffset_Color3usv 24
+#define _gloffset_Color4b 25
+#define _gloffset_Color4bv 26
+#define _gloffset_Color4d 27
+#define _gloffset_Color4dv 28
+#define _gloffset_Color4f 29
+#define _gloffset_Color4fv 30
+#define _gloffset_Color4i 31
+#define _gloffset_Color4iv 32
+#define _gloffset_Color4s 33
+#define _gloffset_Color4sv 34
+#define _gloffset_Color4ub 35
+#define _gloffset_Color4ubv 36
+#define _gloffset_Color4ui 37
+#define _gloffset_Color4uiv 38
+#define _gloffset_Color4us 39
+#define _gloffset_Color4usv 40
+#define _gloffset_EdgeFlag 41
+#define _gloffset_EdgeFlagv 42
+#define _gloffset_End 43
+#define _gloffset_Indexd 44
+#define _gloffset_Indexdv 45
+#define _gloffset_Indexf 46
+#define _gloffset_Indexfv 47
+#define _gloffset_Indexi 48
+#define _gloffset_Indexiv 49
+#define _gloffset_Indexs 50
+#define _gloffset_Indexsv 51
+#define _gloffset_Normal3b 52
+#define _gloffset_Normal3bv 53
+#define _gloffset_Normal3d 54
+#define _gloffset_Normal3dv 55
+#define _gloffset_Normal3f 56
+#define _gloffset_Normal3fv 57
+#define _gloffset_Normal3i 58
+#define _gloffset_Normal3iv 59
+#define _gloffset_Normal3s 60
+#define _gloffset_Normal3sv 61
+#define _gloffset_RasterPos2d 62
+#define _gloffset_RasterPos2dv 63
+#define _gloffset_RasterPos2f 64
+#define _gloffset_RasterPos2fv 65
+#define _gloffset_RasterPos2i 66
+#define _gloffset_RasterPos2iv 67
+#define _gloffset_RasterPos2s 68
+#define _gloffset_RasterPos2sv 69
+#define _gloffset_RasterPos3d 70
+#define _gloffset_RasterPos3dv 71
+#define _gloffset_RasterPos3f 72
+#define _gloffset_RasterPos3fv 73
+#define _gloffset_RasterPos3i 74
+#define _gloffset_RasterPos3iv 75
+#define _gloffset_RasterPos3s 76
+#define _gloffset_RasterPos3sv 77
+#define _gloffset_RasterPos4d 78
+#define _gloffset_RasterPos4dv 79
+#define _gloffset_RasterPos4f 80
+#define _gloffset_RasterPos4fv 81
+#define _gloffset_RasterPos4i 82
+#define _gloffset_RasterPos4iv 83
+#define _gloffset_RasterPos4s 84
+#define _gloffset_RasterPos4sv 85
+#define _gloffset_Rectd 86
+#define _gloffset_Rectdv 87
+#define _gloffset_Rectf 88
+#define _gloffset_Rectfv 89
+#define _gloffset_Recti 90
+#define _gloffset_Rectiv 91
+#define _gloffset_Rects 92
+#define _gloffset_Rectsv 93
+#define _gloffset_TexCoord1d 94
+#define _gloffset_TexCoord1dv 95
+#define _gloffset_TexCoord1f 96
+#define _gloffset_TexCoord1fv 97
+#define _gloffset_TexCoord1i 98
+#define _gloffset_TexCoord1iv 99
+#define _gloffset_TexCoord1s 100
+#define _gloffset_TexCoord1sv 101
+#define _gloffset_TexCoord2d 102
+#define _gloffset_TexCoord2dv 103
+#define _gloffset_TexCoord2f 104
+#define _gloffset_TexCoord2fv 105
+#define _gloffset_TexCoord2i 106
+#define _gloffset_TexCoord2iv 107
+#define _gloffset_TexCoord2s 108
+#define _gloffset_TexCoord2sv 109
+#define _gloffset_TexCoord3d 110
+#define _gloffset_TexCoord3dv 111
+#define _gloffset_TexCoord3f 112
+#define _gloffset_TexCoord3fv 113
+#define _gloffset_TexCoord3i 114
+#define _gloffset_TexCoord3iv 115
+#define _gloffset_TexCoord3s 116
+#define _gloffset_TexCoord3sv 117
+#define _gloffset_TexCoord4d 118
+#define _gloffset_TexCoord4dv 119
+#define _gloffset_TexCoord4f 120
+#define _gloffset_TexCoord4fv 121
+#define _gloffset_TexCoord4i 122
+#define _gloffset_TexCoord4iv 123
+#define _gloffset_TexCoord4s 124
+#define _gloffset_TexCoord4sv 125
+#define _gloffset_Vertex2d 126
+#define _gloffset_Vertex2dv 127
+#define _gloffset_Vertex2f 128
+#define _gloffset_Vertex2fv 129
+#define _gloffset_Vertex2i 130
+#define _gloffset_Vertex2iv 131
+#define _gloffset_Vertex2s 132
+#define _gloffset_Vertex2sv 133
+#define _gloffset_Vertex3d 134
+#define _gloffset_Vertex3dv 135
+#define _gloffset_Vertex3f 136
+#define _gloffset_Vertex3fv 137
+#define _gloffset_Vertex3i 138
+#define _gloffset_Vertex3iv 139
+#define _gloffset_Vertex3s 140
+#define _gloffset_Vertex3sv 141
+#define _gloffset_Vertex4d 142
+#define _gloffset_Vertex4dv 143
+#define _gloffset_Vertex4f 144
+#define _gloffset_Vertex4fv 145
+#define _gloffset_Vertex4i 146
+#define _gloffset_Vertex4iv 147
+#define _gloffset_Vertex4s 148
+#define _gloffset_Vertex4sv 149
+#define _gloffset_ClipPlane 150
+#define _gloffset_ColorMaterial 151
+#define _gloffset_CullFace 152
+#define _gloffset_Fogf 153
+#define _gloffset_Fogfv 154
+#define _gloffset_Fogi 155
+#define _gloffset_Fogiv 156
+#define _gloffset_FrontFace 157
+#define _gloffset_Hint 158
+#define _gloffset_Lightf 159
+#define _gloffset_Lightfv 160
+#define _gloffset_Lighti 161
+#define _gloffset_Lightiv 162
+#define _gloffset_LightModelf 163
+#define _gloffset_LightModelfv 164
+#define _gloffset_LightModeli 165
+#define _gloffset_LightModeliv 166
+#define _gloffset_LineStipple 167
+#define _gloffset_LineWidth 168
+#define _gloffset_Materialf 169
+#define _gloffset_Materialfv 170
+#define _gloffset_Materiali 171
+#define _gloffset_Materialiv 172
+#define _gloffset_PointSize 173
+#define _gloffset_PolygonMode 174
+#define _gloffset_PolygonStipple 175
+#define _gloffset_Scissor 176
+#define _gloffset_ShadeModel 177
+#define _gloffset_TexParameterf 178
+#define _gloffset_TexParameterfv 179
+#define _gloffset_TexParameteri 180
+#define _gloffset_TexParameteriv 181
+#define _gloffset_TexImage1D 182
+#define _gloffset_TexImage2D 183
+#define _gloffset_TexEnvf 184
+#define _gloffset_TexEnvfv 185
+#define _gloffset_TexEnvi 186
+#define _gloffset_TexEnviv 187
+#define _gloffset_TexGend 188
+#define _gloffset_TexGendv 189
+#define _gloffset_TexGenf 190
+#define _gloffset_TexGenfv 191
+#define _gloffset_TexGeni 192
+#define _gloffset_TexGeniv 193
+#define _gloffset_FeedbackBuffer 194
+#define _gloffset_SelectBuffer 195
+#define _gloffset_RenderMode 196
+#define _gloffset_InitNames 197
+#define _gloffset_LoadName 198
+#define _gloffset_PassThrough 199
+#define _gloffset_PopName 200
+#define _gloffset_PushName 201
+#define _gloffset_DrawBuffer 202
+#define _gloffset_Clear 203
+#define _gloffset_ClearAccum 204
+#define _gloffset_ClearIndex 205
+#define _gloffset_ClearColor 206
+#define _gloffset_ClearStencil 207
+#define _gloffset_ClearDepth 208
+#define _gloffset_StencilMask 209
+#define _gloffset_ColorMask 210
+#define _gloffset_DepthMask 211
+#define _gloffset_IndexMask 212
+#define _gloffset_Accum 213
+#define _gloffset_Disable 214
+#define _gloffset_Enable 215
+#define _gloffset_Finish 216
+#define _gloffset_Flush 217
+#define _gloffset_PopAttrib 218
+#define _gloffset_PushAttrib 219
+#define _gloffset_Map1d 220
+#define _gloffset_Map1f 221
+#define _gloffset_Map2d 222
+#define _gloffset_Map2f 223
+#define _gloffset_MapGrid1d 224
+#define _gloffset_MapGrid1f 225
+#define _gloffset_MapGrid2d 226
+#define _gloffset_MapGrid2f 227
+#define _gloffset_EvalCoord1d 228
+#define _gloffset_EvalCoord1dv 229
+#define _gloffset_EvalCoord1f 230
+#define _gloffset_EvalCoord1fv 231
+#define _gloffset_EvalCoord2d 232
+#define _gloffset_EvalCoord2dv 233
+#define _gloffset_EvalCoord2f 234
+#define _gloffset_EvalCoord2fv 235
+#define _gloffset_EvalMesh1 236
+#define _gloffset_EvalPoint1 237
+#define _gloffset_EvalMesh2 238
+#define _gloffset_EvalPoint2 239
+#define _gloffset_AlphaFunc 240
+#define _gloffset_BlendFunc 241
+#define _gloffset_LogicOp 242
+#define _gloffset_StencilFunc 243
+#define _gloffset_StencilOp 244
+#define _gloffset_DepthFunc 245
+#define _gloffset_PixelZoom 246
+#define _gloffset_PixelTransferf 247
+#define _gloffset_PixelTransferi 248
+#define _gloffset_PixelStoref 249
+#define _gloffset_PixelStorei 250
+#define _gloffset_PixelMapfv 251
+#define _gloffset_PixelMapuiv 252
+#define _gloffset_PixelMapusv 253
+#define _gloffset_ReadBuffer 254
+#define _gloffset_CopyPixels 255
+#define _gloffset_ReadPixels 256
+#define _gloffset_DrawPixels 257
+#define _gloffset_GetBooleanv 258
+#define _gloffset_GetClipPlane 259
+#define _gloffset_GetDoublev 260
+#define _gloffset_GetError 261
+#define _gloffset_GetFloatv 262
+#define _gloffset_GetIntegerv 263
+#define _gloffset_GetLightfv 264
+#define _gloffset_GetLightiv 265
+#define _gloffset_GetMapdv 266
+#define _gloffset_GetMapfv 267
+#define _gloffset_GetMapiv 268
+#define _gloffset_GetMaterialfv 269
+#define _gloffset_GetMaterialiv 270
+#define _gloffset_GetPixelMapfv 271
+#define _gloffset_GetPixelMapuiv 272
+#define _gloffset_GetPixelMapusv 273
+#define _gloffset_GetPolygonStipple 274
+#define _gloffset_GetString 275
+#define _gloffset_GetTexEnvfv 276
+#define _gloffset_GetTexEnviv 277
+#define _gloffset_GetTexGendv 278
+#define _gloffset_GetTexGenfv 279
+#define _gloffset_GetTexGeniv 280
+#define _gloffset_GetTexImage 281
+#define _gloffset_GetTexParameterfv 282
+#define _gloffset_GetTexParameteriv 283
+#define _gloffset_GetTexLevelParameterfv 284
+#define _gloffset_GetTexLevelParameteriv 285
+#define _gloffset_IsEnabled 286
+#define _gloffset_IsList 287
+#define _gloffset_DepthRange 288
+#define _gloffset_Frustum 289
+#define _gloffset_LoadIdentity 290
+#define _gloffset_LoadMatrixf 291
+#define _gloffset_LoadMatrixd 292
+#define _gloffset_MatrixMode 293
+#define _gloffset_MultMatrixf 294
+#define _gloffset_MultMatrixd 295
+#define _gloffset_Ortho 296
+#define _gloffset_PopMatrix 297
+#define _gloffset_PushMatrix 298
+#define _gloffset_Rotated 299
+#define _gloffset_Rotatef 300
+#define _gloffset_Scaled 301
+#define _gloffset_Scalef 302
+#define _gloffset_Translated 303
+#define _gloffset_Translatef 304
+#define _gloffset_Viewport 305
+#define _gloffset_ArrayElement 306
+#define _gloffset_BindTexture 307
+#define _gloffset_ColorPointer 308
+#define _gloffset_DisableClientState 309
+#define _gloffset_DrawArrays 310
+#define _gloffset_DrawElements 311
+#define _gloffset_EdgeFlagPointer 312
+#define _gloffset_EnableClientState 313
+#define _gloffset_IndexPointer 314
+#define _gloffset_Indexub 315
+#define _gloffset_Indexubv 316
+#define _gloffset_InterleavedArrays 317
+#define _gloffset_NormalPointer 318
+#define _gloffset_PolygonOffset 319
+#define _gloffset_TexCoordPointer 320
+#define _gloffset_VertexPointer 321
+#define _gloffset_AreTexturesResident 322
+#define _gloffset_CopyTexImage1D 323
+#define _gloffset_CopyTexImage2D 324
+#define _gloffset_CopyTexSubImage1D 325
+#define _gloffset_CopyTexSubImage2D 326
+#define _gloffset_DeleteTextures 327
+#define _gloffset_GenTextures 328
+#define _gloffset_GetPointerv 329
+#define _gloffset_IsTexture 330
+#define _gloffset_PrioritizeTextures 331
+#define _gloffset_TexSubImage1D 332
+#define _gloffset_TexSubImage2D 333
+#define _gloffset_PopClientAttrib 334
+#define _gloffset_PushClientAttrib 335
+#define _gloffset_BlendColor 336
+#define _gloffset_BlendEquation 337
+#define _gloffset_DrawRangeElements 338
+#define _gloffset_ColorTable 339
+#define _gloffset_ColorTableParameterfv 340
+#define _gloffset_ColorTableParameteriv 341
+#define _gloffset_CopyColorTable 342
+#define _gloffset_GetColorTable 343
+#define _gloffset_GetColorTableParameterfv 344
+#define _gloffset_GetColorTableParameteriv 345
+#define _gloffset_ColorSubTable 346
+#define _gloffset_CopyColorSubTable 347
+#define _gloffset_ConvolutionFilter1D 348
+#define _gloffset_ConvolutionFilter2D 349
+#define _gloffset_ConvolutionParameterf 350
+#define _gloffset_ConvolutionParameterfv 351
+#define _gloffset_ConvolutionParameteri 352
+#define _gloffset_ConvolutionParameteriv 353
+#define _gloffset_CopyConvolutionFilter1D 354
+#define _gloffset_CopyConvolutionFilter2D 355
+#define _gloffset_GetConvolutionFilter 356
+#define _gloffset_GetConvolutionParameterfv 357
+#define _gloffset_GetConvolutionParameteriv 358
+#define _gloffset_GetSeparableFilter 359
+#define _gloffset_SeparableFilter2D 360
+#define _gloffset_GetHistogram 361
+#define _gloffset_GetHistogramParameterfv 362
+#define _gloffset_GetHistogramParameteriv 363
+#define _gloffset_GetMinmax 364
+#define _gloffset_GetMinmaxParameterfv 365
+#define _gloffset_GetMinmaxParameteriv 366
+#define _gloffset_Histogram 367
+#define _gloffset_Minmax 368
+#define _gloffset_ResetHistogram 369
+#define _gloffset_ResetMinmax 370
+#define _gloffset_TexImage3D 371
+#define _gloffset_TexSubImage3D 372
+#define _gloffset_CopyTexSubImage3D 373
+#define _gloffset_ActiveTexture 374
+#define _gloffset_ClientActiveTexture 375
+#define _gloffset_MultiTexCoord1d 376
+#define _gloffset_MultiTexCoord1dv 377
+#define _gloffset_MultiTexCoord1fARB 378
+#define _gloffset_MultiTexCoord1fvARB 379
+#define _gloffset_MultiTexCoord1i 380
+#define _gloffset_MultiTexCoord1iv 381
+#define _gloffset_MultiTexCoord1s 382
+#define _gloffset_MultiTexCoord1sv 383
+#define _gloffset_MultiTexCoord2d 384
+#define _gloffset_MultiTexCoord2dv 385
+#define _gloffset_MultiTexCoord2fARB 386
+#define _gloffset_MultiTexCoord2fvARB 387
+#define _gloffset_MultiTexCoord2i 388
+#define _gloffset_MultiTexCoord2iv 389
+#define _gloffset_MultiTexCoord2s 390
+#define _gloffset_MultiTexCoord2sv 391
+#define _gloffset_MultiTexCoord3d 392
+#define _gloffset_MultiTexCoord3dv 393
+#define _gloffset_MultiTexCoord3fARB 394
+#define _gloffset_MultiTexCoord3fvARB 395
+#define _gloffset_MultiTexCoord3i 396
+#define _gloffset_MultiTexCoord3iv 397
+#define _gloffset_MultiTexCoord3s 398
+#define _gloffset_MultiTexCoord3sv 399
+#define _gloffset_MultiTexCoord4d 400
+#define _gloffset_MultiTexCoord4dv 401
+#define _gloffset_MultiTexCoord4fARB 402
+#define _gloffset_MultiTexCoord4fvARB 403
+#define _gloffset_MultiTexCoord4i 404
+#define _gloffset_MultiTexCoord4iv 405
+#define _gloffset_MultiTexCoord4s 406
+#define _gloffset_MultiTexCoord4sv 407
+#define driDispatchRemapTable_size 1003
+extern int driDispatchRemapTable[ driDispatchRemapTable_size ];
+
+#define CompressedTexImage1D_remap_index 0
+#define CompressedTexImage2D_remap_index 1
+#define CompressedTexImage3D_remap_index 2
+#define CompressedTexSubImage1D_remap_index 3
+#define CompressedTexSubImage2D_remap_index 4
+#define CompressedTexSubImage3D_remap_index 5
+#define GetCompressedTexImage_remap_index 6
+#define LoadTransposeMatrixd_remap_index 7
+#define LoadTransposeMatrixf_remap_index 8
+#define MultTransposeMatrixd_remap_index 9
+#define MultTransposeMatrixf_remap_index 10
+#define SampleCoverage_remap_index 11
+#define BlendFuncSeparate_remap_index 12
+#define FogCoordPointer_remap_index 13
+#define FogCoordd_remap_index 14
+#define FogCoorddv_remap_index 15
+#define MultiDrawArrays_remap_index 16
+#define PointParameterf_remap_index 17
+#define PointParameterfv_remap_index 18
+#define PointParameteri_remap_index 19
+#define PointParameteriv_remap_index 20
+#define SecondaryColor3b_remap_index 21
+#define SecondaryColor3bv_remap_index 22
+#define SecondaryColor3d_remap_index 23
+#define SecondaryColor3dv_remap_index 24
+#define SecondaryColor3i_remap_index 25
+#define SecondaryColor3iv_remap_index 26
+#define SecondaryColor3s_remap_index 27
+#define SecondaryColor3sv_remap_index 28
+#define SecondaryColor3ub_remap_index 29
+#define SecondaryColor3ubv_remap_index 30
+#define SecondaryColor3ui_remap_index 31
+#define SecondaryColor3uiv_remap_index 32
+#define SecondaryColor3us_remap_index 33
+#define SecondaryColor3usv_remap_index 34
+#define SecondaryColorPointer_remap_index 35
+#define WindowPos2d_remap_index 36
+#define WindowPos2dv_remap_index 37
+#define WindowPos2f_remap_index 38
+#define WindowPos2fv_remap_index 39
+#define WindowPos2i_remap_index 40
+#define WindowPos2iv_remap_index 41
+#define WindowPos2s_remap_index 42
+#define WindowPos2sv_remap_index 43
+#define WindowPos3d_remap_index 44
+#define WindowPos3dv_remap_index 45
+#define WindowPos3f_remap_index 46
+#define WindowPos3fv_remap_index 47
+#define WindowPos3i_remap_index 48
+#define WindowPos3iv_remap_index 49
+#define WindowPos3s_remap_index 50
+#define WindowPos3sv_remap_index 51
+#define BeginQuery_remap_index 52
+#define BindBuffer_remap_index 53
+#define BufferData_remap_index 54
+#define BufferSubData_remap_index 55
+#define DeleteBuffers_remap_index 56
+#define DeleteQueries_remap_index 57
+#define EndQuery_remap_index 58
+#define GenBuffers_remap_index 59
+#define GenQueries_remap_index 60
+#define GetBufferParameteriv_remap_index 61
+#define GetBufferPointerv_remap_index 62
+#define GetBufferSubData_remap_index 63
+#define GetQueryObjectiv_remap_index 64
+#define GetQueryObjectuiv_remap_index 65
+#define GetQueryiv_remap_index 66
+#define IsBuffer_remap_index 67
+#define IsQuery_remap_index 68
+#define MapBuffer_remap_index 69
+#define UnmapBuffer_remap_index 70
+#define AttachShader_remap_index 71
+#define BindAttribLocation_remap_index 72
+#define BlendEquationSeparate_remap_index 73
+#define CompileShader_remap_index 74
+#define CreateProgram_remap_index 75
+#define CreateShader_remap_index 76
+#define DeleteProgram_remap_index 77
+#define DeleteShader_remap_index 78
+#define DetachShader_remap_index 79
+#define DisableVertexAttribArray_remap_index 80
+#define DrawBuffers_remap_index 81
+#define EnableVertexAttribArray_remap_index 82
+#define GetActiveAttrib_remap_index 83
+#define GetActiveUniform_remap_index 84
+#define GetAttachedShaders_remap_index 85
+#define GetAttribLocation_remap_index 86
+#define GetProgramInfoLog_remap_index 87
+#define GetProgramiv_remap_index 88
+#define GetShaderInfoLog_remap_index 89
+#define GetShaderSource_remap_index 90
+#define GetShaderiv_remap_index 91
+#define GetUniformLocation_remap_index 92
+#define GetUniformfv_remap_index 93
+#define GetUniformiv_remap_index 94
+#define GetVertexAttribPointerv_remap_index 95
+#define GetVertexAttribdv_remap_index 96
+#define GetVertexAttribfv_remap_index 97
+#define GetVertexAttribiv_remap_index 98
+#define IsProgram_remap_index 99
+#define IsShader_remap_index 100
+#define LinkProgram_remap_index 101
+#define ShaderSource_remap_index 102
+#define StencilFuncSeparate_remap_index 103
+#define StencilMaskSeparate_remap_index 104
+#define StencilOpSeparate_remap_index 105
+#define Uniform1f_remap_index 106
+#define Uniform1fv_remap_index 107
+#define Uniform1i_remap_index 108
+#define Uniform1iv_remap_index 109
+#define Uniform2f_remap_index 110
+#define Uniform2fv_remap_index 111
+#define Uniform2i_remap_index 112
+#define Uniform2iv_remap_index 113
+#define Uniform3f_remap_index 114
+#define Uniform3fv_remap_index 115
+#define Uniform3i_remap_index 116
+#define Uniform3iv_remap_index 117
+#define Uniform4f_remap_index 118
+#define Uniform4fv_remap_index 119
+#define Uniform4i_remap_index 120
+#define Uniform4iv_remap_index 121
+#define UniformMatrix2fv_remap_index 122
+#define UniformMatrix3fv_remap_index 123
+#define UniformMatrix4fv_remap_index 124
+#define UseProgram_remap_index 125
+#define ValidateProgram_remap_index 126
+#define VertexAttrib1d_remap_index 127
+#define VertexAttrib1dv_remap_index 128
+#define VertexAttrib1s_remap_index 129
+#define VertexAttrib1sv_remap_index 130
+#define VertexAttrib2d_remap_index 131
+#define VertexAttrib2dv_remap_index 132
+#define VertexAttrib2s_remap_index 133
+#define VertexAttrib2sv_remap_index 134
+#define VertexAttrib3d_remap_index 135
+#define VertexAttrib3dv_remap_index 136
+#define VertexAttrib3s_remap_index 137
+#define VertexAttrib3sv_remap_index 138
+#define VertexAttrib4Nbv_remap_index 139
+#define VertexAttrib4Niv_remap_index 140
+#define VertexAttrib4Nsv_remap_index 141
+#define VertexAttrib4Nub_remap_index 142
+#define VertexAttrib4Nubv_remap_index 143
+#define VertexAttrib4Nuiv_remap_index 144
+#define VertexAttrib4Nusv_remap_index 145
+#define VertexAttrib4bv_remap_index 146
+#define VertexAttrib4d_remap_index 147
+#define VertexAttrib4dv_remap_index 148
+#define VertexAttrib4iv_remap_index 149
+#define VertexAttrib4s_remap_index 150
+#define VertexAttrib4sv_remap_index 151
+#define VertexAttrib4ubv_remap_index 152
+#define VertexAttrib4uiv_remap_index 153
+#define VertexAttrib4usv_remap_index 154
+#define VertexAttribPointer_remap_index 155
+#define UniformMatrix2x3fv_remap_index 156
+#define UniformMatrix2x4fv_remap_index 157
+#define UniformMatrix3x2fv_remap_index 158
+#define UniformMatrix3x4fv_remap_index 159
+#define UniformMatrix4x2fv_remap_index 160
+#define UniformMatrix4x3fv_remap_index 161
+#define BeginConditionalRender_remap_index 162
+#define BeginTransformFeedback_remap_index 163
+#define BindBufferBase_remap_index 164
+#define BindBufferRange_remap_index 165
+#define BindFragDataLocation_remap_index 166
+#define ClampColor_remap_index 167
+#define ClearBufferfi_remap_index 168
+#define ClearBufferfv_remap_index 169
+#define ClearBufferiv_remap_index 170
+#define ClearBufferuiv_remap_index 171
+#define ColorMaski_remap_index 172
+#define Disablei_remap_index 173
+#define Enablei_remap_index 174
+#define EndConditionalRender_remap_index 175
+#define EndTransformFeedback_remap_index 176
+#define GetBooleani_v_remap_index 177
+#define GetFragDataLocation_remap_index 178
+#define GetIntegeri_v_remap_index 179
+#define GetStringi_remap_index 180
+#define GetTexParameterIiv_remap_index 181
+#define GetTexParameterIuiv_remap_index 182
+#define GetTransformFeedbackVarying_remap_index 183
+#define GetUniformuiv_remap_index 184
+#define GetVertexAttribIiv_remap_index 185
+#define GetVertexAttribIuiv_remap_index 186
+#define IsEnabledi_remap_index 187
+#define TexParameterIiv_remap_index 188
+#define TexParameterIuiv_remap_index 189
+#define TransformFeedbackVaryings_remap_index 190
+#define Uniform1ui_remap_index 191
+#define Uniform1uiv_remap_index 192
+#define Uniform2ui_remap_index 193
+#define Uniform2uiv_remap_index 194
+#define Uniform3ui_remap_index 195
+#define Uniform3uiv_remap_index 196
+#define Uniform4ui_remap_index 197
+#define Uniform4uiv_remap_index 198
+#define VertexAttribI1iv_remap_index 199
+#define VertexAttribI1uiv_remap_index 200
+#define VertexAttribI4bv_remap_index 201
+#define VertexAttribI4sv_remap_index 202
+#define VertexAttribI4ubv_remap_index 203
+#define VertexAttribI4usv_remap_index 204
+#define VertexAttribIPointer_remap_index 205
+#define PrimitiveRestartIndex_remap_index 206
+#define TexBuffer_remap_index 207
+#define FramebufferTexture_remap_index 208
+#define GetBufferParameteri64v_remap_index 209
+#define GetInteger64i_v_remap_index 210
+#define VertexAttribDivisor_remap_index 211
+#define MinSampleShading_remap_index 212
+#define MemoryBarrierByRegion_remap_index 213
+#define BindProgramARB_remap_index 214
+#define DeleteProgramsARB_remap_index 215
+#define GenProgramsARB_remap_index 216
+#define GetProgramEnvParameterdvARB_remap_index 217
+#define GetProgramEnvParameterfvARB_remap_index 218
+#define GetProgramLocalParameterdvARB_remap_index 219
+#define GetProgramLocalParameterfvARB_remap_index 220
+#define GetProgramStringARB_remap_index 221
+#define GetProgramivARB_remap_index 222
+#define IsProgramARB_remap_index 223
+#define ProgramEnvParameter4dARB_remap_index 224
+#define ProgramEnvParameter4dvARB_remap_index 225
+#define ProgramEnvParameter4fARB_remap_index 226
+#define ProgramEnvParameter4fvARB_remap_index 227
+#define ProgramLocalParameter4dARB_remap_index 228
+#define ProgramLocalParameter4dvARB_remap_index 229
+#define ProgramLocalParameter4fARB_remap_index 230
+#define ProgramLocalParameter4fvARB_remap_index 231
+#define ProgramStringARB_remap_index 232
+#define VertexAttrib1fARB_remap_index 233
+#define VertexAttrib1fvARB_remap_index 234
+#define VertexAttrib2fARB_remap_index 235
+#define VertexAttrib2fvARB_remap_index 236
+#define VertexAttrib3fARB_remap_index 237
+#define VertexAttrib3fvARB_remap_index 238
+#define VertexAttrib4fARB_remap_index 239
+#define VertexAttrib4fvARB_remap_index 240
+#define AttachObjectARB_remap_index 241
+#define CreateProgramObjectARB_remap_index 242
+#define CreateShaderObjectARB_remap_index 243
+#define DeleteObjectARB_remap_index 244
+#define DetachObjectARB_remap_index 245
+#define GetAttachedObjectsARB_remap_index 246
+#define GetHandleARB_remap_index 247
+#define GetInfoLogARB_remap_index 248
+#define GetObjectParameterfvARB_remap_index 249
+#define GetObjectParameterivARB_remap_index 250
+#define DrawArraysInstancedARB_remap_index 251
+#define DrawElementsInstancedARB_remap_index 252
+#define BindFramebuffer_remap_index 253
+#define BindRenderbuffer_remap_index 254
+#define BlitFramebuffer_remap_index 255
+#define CheckFramebufferStatus_remap_index 256
+#define DeleteFramebuffers_remap_index 257
+#define DeleteRenderbuffers_remap_index 258
+#define FramebufferRenderbuffer_remap_index 259
+#define FramebufferTexture1D_remap_index 260
+#define FramebufferTexture2D_remap_index 261
+#define FramebufferTexture3D_remap_index 262
+#define FramebufferTextureLayer_remap_index 263
+#define GenFramebuffers_remap_index 264
+#define GenRenderbuffers_remap_index 265
+#define GenerateMipmap_remap_index 266
+#define GetFramebufferAttachmentParameteriv_remap_index 267
+#define GetRenderbufferParameteriv_remap_index 268
+#define IsFramebuffer_remap_index 269
+#define IsRenderbuffer_remap_index 270
+#define RenderbufferStorage_remap_index 271
+#define RenderbufferStorageMultisample_remap_index 272
+#define FlushMappedBufferRange_remap_index 273
+#define MapBufferRange_remap_index 274
+#define BindVertexArray_remap_index 275
+#define DeleteVertexArrays_remap_index 276
+#define GenVertexArrays_remap_index 277
+#define IsVertexArray_remap_index 278
+#define GetActiveUniformBlockName_remap_index 279
+#define GetActiveUniformBlockiv_remap_index 280
+#define GetActiveUniformName_remap_index 281
+#define GetActiveUniformsiv_remap_index 282
+#define GetUniformBlockIndex_remap_index 283
+#define GetUniformIndices_remap_index 284
+#define UniformBlockBinding_remap_index 285
+#define CopyBufferSubData_remap_index 286
+#define ClientWaitSync_remap_index 287
+#define DeleteSync_remap_index 288
+#define FenceSync_remap_index 289
+#define GetInteger64v_remap_index 290
+#define GetSynciv_remap_index 291
+#define IsSync_remap_index 292
+#define WaitSync_remap_index 293
+#define DrawElementsBaseVertex_remap_index 294
+#define DrawElementsInstancedBaseVertex_remap_index 295
+#define DrawRangeElementsBaseVertex_remap_index 296
+#define MultiDrawElementsBaseVertex_remap_index 297
+#define ProvokingVertex_remap_index 298
+#define GetMultisamplefv_remap_index 299
+#define SampleMaski_remap_index 300
+#define TexImage2DMultisample_remap_index 301
+#define TexImage3DMultisample_remap_index 302
+#define BlendEquationSeparateiARB_remap_index 303
+#define BlendEquationiARB_remap_index 304
+#define BlendFuncSeparateiARB_remap_index 305
+#define BlendFunciARB_remap_index 306
+#define BindFragDataLocationIndexed_remap_index 307
+#define GetFragDataIndex_remap_index 308
+#define BindSampler_remap_index 309
+#define DeleteSamplers_remap_index 310
+#define GenSamplers_remap_index 311
+#define GetSamplerParameterIiv_remap_index 312
+#define GetSamplerParameterIuiv_remap_index 313
+#define GetSamplerParameterfv_remap_index 314
+#define GetSamplerParameteriv_remap_index 315
+#define IsSampler_remap_index 316
+#define SamplerParameterIiv_remap_index 317
+#define SamplerParameterIuiv_remap_index 318
+#define SamplerParameterf_remap_index 319
+#define SamplerParameterfv_remap_index 320
+#define SamplerParameteri_remap_index 321
+#define SamplerParameteriv_remap_index 322
+#define GetQueryObjecti64v_remap_index 323
+#define GetQueryObjectui64v_remap_index 324
+#define QueryCounter_remap_index 325
+#define ColorP3ui_remap_index 326
+#define ColorP3uiv_remap_index 327
+#define ColorP4ui_remap_index 328
+#define ColorP4uiv_remap_index 329
+#define MultiTexCoordP1ui_remap_index 330
+#define MultiTexCoordP1uiv_remap_index 331
+#define MultiTexCoordP2ui_remap_index 332
+#define MultiTexCoordP2uiv_remap_index 333
+#define MultiTexCoordP3ui_remap_index 334
+#define MultiTexCoordP3uiv_remap_index 335
+#define MultiTexCoordP4ui_remap_index 336
+#define MultiTexCoordP4uiv_remap_index 337
+#define NormalP3ui_remap_index 338
+#define NormalP3uiv_remap_index 339
+#define SecondaryColorP3ui_remap_index 340
+#define SecondaryColorP3uiv_remap_index 341
+#define TexCoordP1ui_remap_index 342
+#define TexCoordP1uiv_remap_index 343
+#define TexCoordP2ui_remap_index 344
+#define TexCoordP2uiv_remap_index 345
+#define TexCoordP3ui_remap_index 346
+#define TexCoordP3uiv_remap_index 347
+#define TexCoordP4ui_remap_index 348
+#define TexCoordP4uiv_remap_index 349
+#define VertexAttribP1ui_remap_index 350
+#define VertexAttribP1uiv_remap_index 351
+#define VertexAttribP2ui_remap_index 352
+#define VertexAttribP2uiv_remap_index 353
+#define VertexAttribP3ui_remap_index 354
+#define VertexAttribP3uiv_remap_index 355
+#define VertexAttribP4ui_remap_index 356
+#define VertexAttribP4uiv_remap_index 357
+#define VertexP2ui_remap_index 358
+#define VertexP2uiv_remap_index 359
+#define VertexP3ui_remap_index 360
+#define VertexP3uiv_remap_index 361
+#define VertexP4ui_remap_index 362
+#define VertexP4uiv_remap_index 363
+#define DrawArraysIndirect_remap_index 364
+#define DrawElementsIndirect_remap_index 365
+#define GetUniformdv_remap_index 366
+#define Uniform1d_remap_index 367
+#define Uniform1dv_remap_index 368
+#define Uniform2d_remap_index 369
+#define Uniform2dv_remap_index 370
+#define Uniform3d_remap_index 371
+#define Uniform3dv_remap_index 372
+#define Uniform4d_remap_index 373
+#define Uniform4dv_remap_index 374
+#define UniformMatrix2dv_remap_index 375
+#define UniformMatrix2x3dv_remap_index 376
+#define UniformMatrix2x4dv_remap_index 377
+#define UniformMatrix3dv_remap_index 378
+#define UniformMatrix3x2dv_remap_index 379
+#define UniformMatrix3x4dv_remap_index 380
+#define UniformMatrix4dv_remap_index 381
+#define UniformMatrix4x2dv_remap_index 382
+#define UniformMatrix4x3dv_remap_index 383
+#define GetActiveSubroutineName_remap_index 384
+#define GetActiveSubroutineUniformName_remap_index 385
+#define GetActiveSubroutineUniformiv_remap_index 386
+#define GetProgramStageiv_remap_index 387
+#define GetSubroutineIndex_remap_index 388
+#define GetSubroutineUniformLocation_remap_index 389
+#define GetUniformSubroutineuiv_remap_index 390
+#define UniformSubroutinesuiv_remap_index 391
+#define PatchParameterfv_remap_index 392
+#define PatchParameteri_remap_index 393
+#define BindTransformFeedback_remap_index 394
+#define DeleteTransformFeedbacks_remap_index 395
+#define DrawTransformFeedback_remap_index 396
+#define GenTransformFeedbacks_remap_index 397
+#define IsTransformFeedback_remap_index 398
+#define PauseTransformFeedback_remap_index 399
+#define ResumeTransformFeedback_remap_index 400
+#define BeginQueryIndexed_remap_index 401
+#define DrawTransformFeedbackStream_remap_index 402
+#define EndQueryIndexed_remap_index 403
+#define GetQueryIndexediv_remap_index 404
+#define ClearDepthf_remap_index 405
+#define DepthRangef_remap_index 406
+#define GetShaderPrecisionFormat_remap_index 407
+#define ReleaseShaderCompiler_remap_index 408
+#define ShaderBinary_remap_index 409
+#define GetProgramBinary_remap_index 410
+#define ProgramBinary_remap_index 411
+#define ProgramParameteri_remap_index 412
+#define GetVertexAttribLdv_remap_index 413
+#define VertexAttribL1d_remap_index 414
+#define VertexAttribL1dv_remap_index 415
+#define VertexAttribL2d_remap_index 416
+#define VertexAttribL2dv_remap_index 417
+#define VertexAttribL3d_remap_index 418
+#define VertexAttribL3dv_remap_index 419
+#define VertexAttribL4d_remap_index 420
+#define VertexAttribL4dv_remap_index 421
+#define VertexAttribLPointer_remap_index 422
+#define DepthRangeArrayv_remap_index 423
+#define DepthRangeIndexed_remap_index 424
+#define GetDoublei_v_remap_index 425
+#define GetFloati_v_remap_index 426
+#define ScissorArrayv_remap_index 427
+#define ScissorIndexed_remap_index 428
+#define ScissorIndexedv_remap_index 429
+#define ViewportArrayv_remap_index 430
+#define ViewportIndexedf_remap_index 431
+#define ViewportIndexedfv_remap_index 432
+#define GetGraphicsResetStatusARB_remap_index 433
+#define GetnColorTableARB_remap_index 434
+#define GetnCompressedTexImageARB_remap_index 435
+#define GetnConvolutionFilterARB_remap_index 436
+#define GetnHistogramARB_remap_index 437
+#define GetnMapdvARB_remap_index 438
+#define GetnMapfvARB_remap_index 439
+#define GetnMapivARB_remap_index 440
+#define GetnMinmaxARB_remap_index 441
+#define GetnPixelMapfvARB_remap_index 442
+#define GetnPixelMapuivARB_remap_index 443
+#define GetnPixelMapusvARB_remap_index 444
+#define GetnPolygonStippleARB_remap_index 445
+#define GetnSeparableFilterARB_remap_index 446
+#define GetnTexImageARB_remap_index 447
+#define GetnUniformdvARB_remap_index 448
+#define GetnUniformfvARB_remap_index 449
+#define GetnUniformivARB_remap_index 450
+#define GetnUniformuivARB_remap_index 451
+#define ReadnPixelsARB_remap_index 452
+#define DrawArraysInstancedBaseInstance_remap_index 453
+#define DrawElementsInstancedBaseInstance_remap_index 454
+#define DrawElementsInstancedBaseVertexBaseInstance_remap_index 455
+#define DrawTransformFeedbackInstanced_remap_index 456
+#define DrawTransformFeedbackStreamInstanced_remap_index 457
+#define GetInternalformativ_remap_index 458
+#define GetActiveAtomicCounterBufferiv_remap_index 459
+#define BindImageTexture_remap_index 460
+#define MemoryBarrier_remap_index 461
+#define TexStorage1D_remap_index 462
+#define TexStorage2D_remap_index 463
+#define TexStorage3D_remap_index 464
+#define TextureStorage1DEXT_remap_index 465
+#define TextureStorage2DEXT_remap_index 466
+#define TextureStorage3DEXT_remap_index 467
+#define ClearBufferData_remap_index 468
+#define ClearBufferSubData_remap_index 469
+#define DispatchCompute_remap_index 470
+#define DispatchComputeIndirect_remap_index 471
+#define CopyImageSubData_remap_index 472
+#define TextureView_remap_index 473
+#define BindVertexBuffer_remap_index 474
+#define VertexAttribBinding_remap_index 475
+#define VertexAttribFormat_remap_index 476
+#define VertexAttribIFormat_remap_index 477
+#define VertexAttribLFormat_remap_index 478
+#define VertexBindingDivisor_remap_index 479
+#define FramebufferParameteri_remap_index 480
+#define GetFramebufferParameteriv_remap_index 481
+#define GetInternalformati64v_remap_index 482
+#define MultiDrawArraysIndirect_remap_index 483
+#define MultiDrawElementsIndirect_remap_index 484
+#define GetProgramInterfaceiv_remap_index 485
+#define GetProgramResourceIndex_remap_index 486
+#define GetProgramResourceLocation_remap_index 487
+#define GetProgramResourceLocationIndex_remap_index 488
+#define GetProgramResourceName_remap_index 489
+#define GetProgramResourceiv_remap_index 490
+#define ShaderStorageBlockBinding_remap_index 491
+#define TexBufferRange_remap_index 492
+#define TexStorage2DMultisample_remap_index 493
+#define TexStorage3DMultisample_remap_index 494
+#define BufferStorage_remap_index 495
+#define ClearTexImage_remap_index 496
+#define ClearTexSubImage_remap_index 497
+#define BindBuffersBase_remap_index 498
+#define BindBuffersRange_remap_index 499
+#define BindImageTextures_remap_index 500
+#define BindSamplers_remap_index 501
+#define BindTextures_remap_index 502
+#define BindVertexBuffers_remap_index 503
+#define GetImageHandleARB_remap_index 504
+#define GetTextureHandleARB_remap_index 505
+#define GetTextureSamplerHandleARB_remap_index 506
+#define GetVertexAttribLui64vARB_remap_index 507
+#define IsImageHandleResidentARB_remap_index 508
+#define IsTextureHandleResidentARB_remap_index 509
+#define MakeImageHandleNonResidentARB_remap_index 510
+#define MakeImageHandleResidentARB_remap_index 511
+#define MakeTextureHandleNonResidentARB_remap_index 512
+#define MakeTextureHandleResidentARB_remap_index 513
+#define ProgramUniformHandleui64ARB_remap_index 514
+#define ProgramUniformHandleui64vARB_remap_index 515
+#define UniformHandleui64ARB_remap_index 516
+#define UniformHandleui64vARB_remap_index 517
+#define VertexAttribL1ui64ARB_remap_index 518
+#define VertexAttribL1ui64vARB_remap_index 519
+#define DispatchComputeGroupSizeARB_remap_index 520
+#define MultiDrawArraysIndirectCountARB_remap_index 521
+#define MultiDrawElementsIndirectCountARB_remap_index 522
+#define ClipControl_remap_index 523
+#define BindTextureUnit_remap_index 524
+#define BlitNamedFramebuffer_remap_index 525
+#define CheckNamedFramebufferStatus_remap_index 526
+#define ClearNamedBufferData_remap_index 527
+#define ClearNamedBufferSubData_remap_index 528
+#define ClearNamedFramebufferfi_remap_index 529
+#define ClearNamedFramebufferfv_remap_index 530
+#define ClearNamedFramebufferiv_remap_index 531
+#define ClearNamedFramebufferuiv_remap_index 532
+#define CompressedTextureSubImage1D_remap_index 533
+#define CompressedTextureSubImage2D_remap_index 534
+#define CompressedTextureSubImage3D_remap_index 535
+#define CopyNamedBufferSubData_remap_index 536
+#define CopyTextureSubImage1D_remap_index 537
+#define CopyTextureSubImage2D_remap_index 538
+#define CopyTextureSubImage3D_remap_index 539
+#define CreateBuffers_remap_index 540
+#define CreateFramebuffers_remap_index 541
+#define CreateProgramPipelines_remap_index 542
+#define CreateQueries_remap_index 543
+#define CreateRenderbuffers_remap_index 544
+#define CreateSamplers_remap_index 545
+#define CreateTextures_remap_index 546
+#define CreateTransformFeedbacks_remap_index 547
+#define CreateVertexArrays_remap_index 548
+#define DisableVertexArrayAttrib_remap_index 549
+#define EnableVertexArrayAttrib_remap_index 550
+#define FlushMappedNamedBufferRange_remap_index 551
+#define GenerateTextureMipmap_remap_index 552
+#define GetCompressedTextureImage_remap_index 553
+#define GetNamedBufferParameteri64v_remap_index 554
+#define GetNamedBufferParameteriv_remap_index 555
+#define GetNamedBufferPointerv_remap_index 556
+#define GetNamedBufferSubData_remap_index 557
+#define GetNamedFramebufferAttachmentParameteriv_remap_index 558
+#define GetNamedFramebufferParameteriv_remap_index 559
+#define GetNamedRenderbufferParameteriv_remap_index 560
+#define GetQueryBufferObjecti64v_remap_index 561
+#define GetQueryBufferObjectiv_remap_index 562
+#define GetQueryBufferObjectui64v_remap_index 563
+#define GetQueryBufferObjectuiv_remap_index 564
+#define GetTextureImage_remap_index 565
+#define GetTextureLevelParameterfv_remap_index 566
+#define GetTextureLevelParameteriv_remap_index 567
+#define GetTextureParameterIiv_remap_index 568
+#define GetTextureParameterIuiv_remap_index 569
+#define GetTextureParameterfv_remap_index 570
+#define GetTextureParameteriv_remap_index 571
+#define GetTransformFeedbacki64_v_remap_index 572
+#define GetTransformFeedbacki_v_remap_index 573
+#define GetTransformFeedbackiv_remap_index 574
+#define GetVertexArrayIndexed64iv_remap_index 575
+#define GetVertexArrayIndexediv_remap_index 576
+#define GetVertexArrayiv_remap_index 577
+#define InvalidateNamedFramebufferData_remap_index 578
+#define InvalidateNamedFramebufferSubData_remap_index 579
+#define MapNamedBuffer_remap_index 580
+#define MapNamedBufferRange_remap_index 581
+#define NamedBufferData_remap_index 582
+#define NamedBufferStorage_remap_index 583
+#define NamedBufferSubData_remap_index 584
+#define NamedFramebufferDrawBuffer_remap_index 585
+#define NamedFramebufferDrawBuffers_remap_index 586
+#define NamedFramebufferParameteri_remap_index 587
+#define NamedFramebufferReadBuffer_remap_index 588
+#define NamedFramebufferRenderbuffer_remap_index 589
+#define NamedFramebufferTexture_remap_index 590
+#define NamedFramebufferTextureLayer_remap_index 591
+#define NamedRenderbufferStorage_remap_index 592
+#define NamedRenderbufferStorageMultisample_remap_index 593
+#define TextureBuffer_remap_index 594
+#define TextureBufferRange_remap_index 595
+#define TextureParameterIiv_remap_index 596
+#define TextureParameterIuiv_remap_index 597
+#define TextureParameterf_remap_index 598
+#define TextureParameterfv_remap_index 599
+#define TextureParameteri_remap_index 600
+#define TextureParameteriv_remap_index 601
+#define TextureStorage1D_remap_index 602
+#define TextureStorage2D_remap_index 603
+#define TextureStorage2DMultisample_remap_index 604
+#define TextureStorage3D_remap_index 605
+#define TextureStorage3DMultisample_remap_index 606
+#define TextureSubImage1D_remap_index 607
+#define TextureSubImage2D_remap_index 608
+#define TextureSubImage3D_remap_index 609
+#define TransformFeedbackBufferBase_remap_index 610
+#define TransformFeedbackBufferRange_remap_index 611
+#define UnmapNamedBuffer_remap_index 612
+#define VertexArrayAttribBinding_remap_index 613
+#define VertexArrayAttribFormat_remap_index 614
+#define VertexArrayAttribIFormat_remap_index 615
+#define VertexArrayAttribLFormat_remap_index 616
+#define VertexArrayBindingDivisor_remap_index 617
+#define VertexArrayElementBuffer_remap_index 618
+#define VertexArrayVertexBuffer_remap_index 619
+#define VertexArrayVertexBuffers_remap_index 620
+#define GetCompressedTextureSubImage_remap_index 621
+#define GetTextureSubImage_remap_index 622
+#define BufferPageCommitmentARB_remap_index 623
+#define NamedBufferPageCommitmentARB_remap_index 624
+#define GetUniformi64vARB_remap_index 625
+#define GetUniformui64vARB_remap_index 626
+#define GetnUniformi64vARB_remap_index 627
+#define GetnUniformui64vARB_remap_index 628
+#define ProgramUniform1i64ARB_remap_index 629
+#define ProgramUniform1i64vARB_remap_index 630
+#define ProgramUniform1ui64ARB_remap_index 631
+#define ProgramUniform1ui64vARB_remap_index 632
+#define ProgramUniform2i64ARB_remap_index 633
+#define ProgramUniform2i64vARB_remap_index 634
+#define ProgramUniform2ui64ARB_remap_index 635
+#define ProgramUniform2ui64vARB_remap_index 636
+#define ProgramUniform3i64ARB_remap_index 637
+#define ProgramUniform3i64vARB_remap_index 638
+#define ProgramUniform3ui64ARB_remap_index 639
+#define ProgramUniform3ui64vARB_remap_index 640
+#define ProgramUniform4i64ARB_remap_index 641
+#define ProgramUniform4i64vARB_remap_index 642
+#define ProgramUniform4ui64ARB_remap_index 643
+#define ProgramUniform4ui64vARB_remap_index 644
+#define Uniform1i64ARB_remap_index 645
+#define Uniform1i64vARB_remap_index 646
+#define Uniform1ui64ARB_remap_index 647
+#define Uniform1ui64vARB_remap_index 648
+#define Uniform2i64ARB_remap_index 649
+#define Uniform2i64vARB_remap_index 650
+#define Uniform2ui64ARB_remap_index 651
+#define Uniform2ui64vARB_remap_index 652
+#define Uniform3i64ARB_remap_index 653
+#define Uniform3i64vARB_remap_index 654
+#define Uniform3ui64ARB_remap_index 655
+#define Uniform3ui64vARB_remap_index 656
+#define Uniform4i64ARB_remap_index 657
+#define Uniform4i64vARB_remap_index 658
+#define Uniform4ui64ARB_remap_index 659
+#define Uniform4ui64vARB_remap_index 660
+#define SpecializeShaderARB_remap_index 661
+#define InvalidateBufferData_remap_index 662
+#define InvalidateBufferSubData_remap_index 663
+#define InvalidateFramebuffer_remap_index 664
+#define InvalidateSubFramebuffer_remap_index 665
+#define InvalidateTexImage_remap_index 666
+#define InvalidateTexSubImage_remap_index 667
+#define PolygonOffsetEXT_remap_index 668
+#define DrawTexfOES_remap_index 669
+#define DrawTexfvOES_remap_index 670
+#define DrawTexiOES_remap_index 671
+#define DrawTexivOES_remap_index 672
+#define DrawTexsOES_remap_index 673
+#define DrawTexsvOES_remap_index 674
+#define DrawTexxOES_remap_index 675
+#define DrawTexxvOES_remap_index 676
+#define PointSizePointerOES_remap_index 677
+#define QueryMatrixxOES_remap_index 678
+#define SampleMaskSGIS_remap_index 679
+#define SamplePatternSGIS_remap_index 680
+#define ColorPointerEXT_remap_index 681
+#define EdgeFlagPointerEXT_remap_index 682
+#define IndexPointerEXT_remap_index 683
+#define NormalPointerEXT_remap_index 684
+#define TexCoordPointerEXT_remap_index 685
+#define VertexPointerEXT_remap_index 686
+#define DiscardFramebufferEXT_remap_index 687
+#define ActiveShaderProgram_remap_index 688
+#define BindProgramPipeline_remap_index 689
+#define CreateShaderProgramv_remap_index 690
+#define DeleteProgramPipelines_remap_index 691
+#define GenProgramPipelines_remap_index 692
+#define GetProgramPipelineInfoLog_remap_index 693
+#define GetProgramPipelineiv_remap_index 694
+#define IsProgramPipeline_remap_index 695
+#define LockArraysEXT_remap_index 696
+#define ProgramUniform1d_remap_index 697
+#define ProgramUniform1dv_remap_index 698
+#define ProgramUniform1f_remap_index 699
+#define ProgramUniform1fv_remap_index 700
+#define ProgramUniform1i_remap_index 701
+#define ProgramUniform1iv_remap_index 702
+#define ProgramUniform1ui_remap_index 703
+#define ProgramUniform1uiv_remap_index 704
+#define ProgramUniform2d_remap_index 705
+#define ProgramUniform2dv_remap_index 706
+#define ProgramUniform2f_remap_index 707
+#define ProgramUniform2fv_remap_index 708
+#define ProgramUniform2i_remap_index 709
+#define ProgramUniform2iv_remap_index 710
+#define ProgramUniform2ui_remap_index 711
+#define ProgramUniform2uiv_remap_index 712
+#define ProgramUniform3d_remap_index 713
+#define ProgramUniform3dv_remap_index 714
+#define ProgramUniform3f_remap_index 715
+#define ProgramUniform3fv_remap_index 716
+#define ProgramUniform3i_remap_index 717
+#define ProgramUniform3iv_remap_index 718
+#define ProgramUniform3ui_remap_index 719
+#define ProgramUniform3uiv_remap_index 720
+#define ProgramUniform4d_remap_index 721
+#define ProgramUniform4dv_remap_index 722
+#define ProgramUniform4f_remap_index 723
+#define ProgramUniform4fv_remap_index 724
+#define ProgramUniform4i_remap_index 725
+#define ProgramUniform4iv_remap_index 726
+#define ProgramUniform4ui_remap_index 727
+#define ProgramUniform4uiv_remap_index 728
+#define ProgramUniformMatrix2dv_remap_index 729
+#define ProgramUniformMatrix2fv_remap_index 730
+#define ProgramUniformMatrix2x3dv_remap_index 731
+#define ProgramUniformMatrix2x3fv_remap_index 732
+#define ProgramUniformMatrix2x4dv_remap_index 733
+#define ProgramUniformMatrix2x4fv_remap_index 734
+#define ProgramUniformMatrix3dv_remap_index 735
+#define ProgramUniformMatrix3fv_remap_index 736
+#define ProgramUniformMatrix3x2dv_remap_index 737
+#define ProgramUniformMatrix3x2fv_remap_index 738
+#define ProgramUniformMatrix3x4dv_remap_index 739
+#define ProgramUniformMatrix3x4fv_remap_index 740
+#define ProgramUniformMatrix4dv_remap_index 741
+#define ProgramUniformMatrix4fv_remap_index 742
+#define ProgramUniformMatrix4x2dv_remap_index 743
+#define ProgramUniformMatrix4x2fv_remap_index 744
+#define ProgramUniformMatrix4x3dv_remap_index 745
+#define ProgramUniformMatrix4x3fv_remap_index 746
+#define UnlockArraysEXT_remap_index 747
+#define UseProgramStages_remap_index 748
+#define ValidateProgramPipeline_remap_index 749
+#define DebugMessageCallback_remap_index 750
+#define DebugMessageControl_remap_index 751
+#define DebugMessageInsert_remap_index 752
+#define GetDebugMessageLog_remap_index 753
+#define GetObjectLabel_remap_index 754
+#define GetObjectPtrLabel_remap_index 755
+#define ObjectLabel_remap_index 756
+#define ObjectPtrLabel_remap_index 757
+#define PopDebugGroup_remap_index 758
+#define PushDebugGroup_remap_index 759
+#define SecondaryColor3fEXT_remap_index 760
+#define SecondaryColor3fvEXT_remap_index 761
+#define MultiDrawElementsEXT_remap_index 762
+#define FogCoordfEXT_remap_index 763
+#define FogCoordfvEXT_remap_index 764
+#define ResizeBuffersMESA_remap_index 765
+#define WindowPos4dMESA_remap_index 766
+#define WindowPos4dvMESA_remap_index 767
+#define WindowPos4fMESA_remap_index 768
+#define WindowPos4fvMESA_remap_index 769
+#define WindowPos4iMESA_remap_index 770
+#define WindowPos4ivMESA_remap_index 771
+#define WindowPos4sMESA_remap_index 772
+#define WindowPos4svMESA_remap_index 773
+#define MultiModeDrawArraysIBM_remap_index 774
+#define MultiModeDrawElementsIBM_remap_index 775
+#define AreProgramsResidentNV_remap_index 776
+#define ExecuteProgramNV_remap_index 777
+#define GetProgramParameterdvNV_remap_index 778
+#define GetProgramParameterfvNV_remap_index 779
+#define GetProgramStringNV_remap_index 780
+#define GetProgramivNV_remap_index 781
+#define GetTrackMatrixivNV_remap_index 782
+#define GetVertexAttribdvNV_remap_index 783
+#define GetVertexAttribfvNV_remap_index 784
+#define GetVertexAttribivNV_remap_index 785
+#define LoadProgramNV_remap_index 786
+#define ProgramParameters4dvNV_remap_index 787
+#define ProgramParameters4fvNV_remap_index 788
+#define RequestResidentProgramsNV_remap_index 789
+#define TrackMatrixNV_remap_index 790
+#define VertexAttrib1dNV_remap_index 791
+#define VertexAttrib1dvNV_remap_index 792
+#define VertexAttrib1fNV_remap_index 793
+#define VertexAttrib1fvNV_remap_index 794
+#define VertexAttrib1sNV_remap_index 795
+#define VertexAttrib1svNV_remap_index 796
+#define VertexAttrib2dNV_remap_index 797
+#define VertexAttrib2dvNV_remap_index 798
+#define VertexAttrib2fNV_remap_index 799
+#define VertexAttrib2fvNV_remap_index 800
+#define VertexAttrib2sNV_remap_index 801
+#define VertexAttrib2svNV_remap_index 802
+#define VertexAttrib3dNV_remap_index 803
+#define VertexAttrib3dvNV_remap_index 804
+#define VertexAttrib3fNV_remap_index 805
+#define VertexAttrib3fvNV_remap_index 806
+#define VertexAttrib3sNV_remap_index 807
+#define VertexAttrib3svNV_remap_index 808
+#define VertexAttrib4dNV_remap_index 809
+#define VertexAttrib4dvNV_remap_index 810
+#define VertexAttrib4fNV_remap_index 811
+#define VertexAttrib4fvNV_remap_index 812
+#define VertexAttrib4sNV_remap_index 813
+#define VertexAttrib4svNV_remap_index 814
+#define VertexAttrib4ubNV_remap_index 815
+#define VertexAttrib4ubvNV_remap_index 816
+#define VertexAttribPointerNV_remap_index 817
+#define VertexAttribs1dvNV_remap_index 818
+#define VertexAttribs1fvNV_remap_index 819
+#define VertexAttribs1svNV_remap_index 820
+#define VertexAttribs2dvNV_remap_index 821
+#define VertexAttribs2fvNV_remap_index 822
+#define VertexAttribs2svNV_remap_index 823
+#define VertexAttribs3dvNV_remap_index 824
+#define VertexAttribs3fvNV_remap_index 825
+#define VertexAttribs3svNV_remap_index 826
+#define VertexAttribs4dvNV_remap_index 827
+#define VertexAttribs4fvNV_remap_index 828
+#define VertexAttribs4svNV_remap_index 829
+#define VertexAttribs4ubvNV_remap_index 830
+#define GetTexBumpParameterfvATI_remap_index 831
+#define GetTexBumpParameterivATI_remap_index 832
+#define TexBumpParameterfvATI_remap_index 833
+#define TexBumpParameterivATI_remap_index 834
+#define AlphaFragmentOp1ATI_remap_index 835
+#define AlphaFragmentOp2ATI_remap_index 836
+#define AlphaFragmentOp3ATI_remap_index 837
+#define BeginFragmentShaderATI_remap_index 838
+#define BindFragmentShaderATI_remap_index 839
+#define ColorFragmentOp1ATI_remap_index 840
+#define ColorFragmentOp2ATI_remap_index 841
+#define ColorFragmentOp3ATI_remap_index 842
+#define DeleteFragmentShaderATI_remap_index 843
+#define EndFragmentShaderATI_remap_index 844
+#define GenFragmentShadersATI_remap_index 845
+#define PassTexCoordATI_remap_index 846
+#define SampleMapATI_remap_index 847
+#define SetFragmentShaderConstantATI_remap_index 848
+#define DepthRangeArrayfvOES_remap_index 849
+#define DepthRangeIndexedfOES_remap_index 850
+#define ActiveStencilFaceEXT_remap_index 851
+#define GetProgramNamedParameterdvNV_remap_index 852
+#define GetProgramNamedParameterfvNV_remap_index 853
+#define ProgramNamedParameter4dNV_remap_index 854
+#define ProgramNamedParameter4dvNV_remap_index 855
+#define ProgramNamedParameter4fNV_remap_index 856
+#define ProgramNamedParameter4fvNV_remap_index 857
+#define PrimitiveRestartNV_remap_index 858
+#define GetTexGenxvOES_remap_index 859
+#define TexGenxOES_remap_index 860
+#define TexGenxvOES_remap_index 861
+#define DepthBoundsEXT_remap_index 862
+#define BindFramebufferEXT_remap_index 863
+#define BindRenderbufferEXT_remap_index 864
+#define StringMarkerGREMEDY_remap_index 865
+#define BufferParameteriAPPLE_remap_index 866
+#define FlushMappedBufferRangeAPPLE_remap_index 867
+#define VertexAttribI1iEXT_remap_index 868
+#define VertexAttribI1uiEXT_remap_index 869
+#define VertexAttribI2iEXT_remap_index 870
+#define VertexAttribI2ivEXT_remap_index 871
+#define VertexAttribI2uiEXT_remap_index 872
+#define VertexAttribI2uivEXT_remap_index 873
+#define VertexAttribI3iEXT_remap_index 874
+#define VertexAttribI3ivEXT_remap_index 875
+#define VertexAttribI3uiEXT_remap_index 876
+#define VertexAttribI3uivEXT_remap_index 877
+#define VertexAttribI4iEXT_remap_index 878
+#define VertexAttribI4ivEXT_remap_index 879
+#define VertexAttribI4uiEXT_remap_index 880
+#define VertexAttribI4uivEXT_remap_index 881
+#define ClearColorIiEXT_remap_index 882
+#define ClearColorIuiEXT_remap_index 883
+#define BindBufferOffsetEXT_remap_index 884
+#define BeginPerfMonitorAMD_remap_index 885
+#define DeletePerfMonitorsAMD_remap_index 886
+#define EndPerfMonitorAMD_remap_index 887
+#define GenPerfMonitorsAMD_remap_index 888
+#define GetPerfMonitorCounterDataAMD_remap_index 889
+#define GetPerfMonitorCounterInfoAMD_remap_index 890
+#define GetPerfMonitorCounterStringAMD_remap_index 891
+#define GetPerfMonitorCountersAMD_remap_index 892
+#define GetPerfMonitorGroupStringAMD_remap_index 893
+#define GetPerfMonitorGroupsAMD_remap_index 894
+#define SelectPerfMonitorCountersAMD_remap_index 895
+#define GetObjectParameterivAPPLE_remap_index 896
+#define ObjectPurgeableAPPLE_remap_index 897
+#define ObjectUnpurgeableAPPLE_remap_index 898
+#define ActiveProgramEXT_remap_index 899
+#define CreateShaderProgramEXT_remap_index 900
+#define UseShaderProgramEXT_remap_index 901
+#define TextureBarrierNV_remap_index 902
+#define VDPAUFiniNV_remap_index 903
+#define VDPAUGetSurfaceivNV_remap_index 904
+#define VDPAUInitNV_remap_index 905
+#define VDPAUIsSurfaceNV_remap_index 906
+#define VDPAUMapSurfacesNV_remap_index 907
+#define VDPAURegisterOutputSurfaceNV_remap_index 908
+#define VDPAURegisterVideoSurfaceNV_remap_index 909
+#define VDPAUSurfaceAccessNV_remap_index 910
+#define VDPAUUnmapSurfacesNV_remap_index 911
+#define VDPAUUnregisterSurfaceNV_remap_index 912
+#define BeginPerfQueryINTEL_remap_index 913
+#define CreatePerfQueryINTEL_remap_index 914
+#define DeletePerfQueryINTEL_remap_index 915
+#define EndPerfQueryINTEL_remap_index 916
+#define GetFirstPerfQueryIdINTEL_remap_index 917
+#define GetNextPerfQueryIdINTEL_remap_index 918
+#define GetPerfCounterInfoINTEL_remap_index 919
+#define GetPerfQueryDataINTEL_remap_index 920
+#define GetPerfQueryIdByNameINTEL_remap_index 921
+#define GetPerfQueryInfoINTEL_remap_index 922
+#define PolygonOffsetClampEXT_remap_index 923
+#define WindowRectanglesEXT_remap_index 924
+#define BufferStorageMemEXT_remap_index 925
+#define CreateMemoryObjectsEXT_remap_index 926
+#define DeleteMemoryObjectsEXT_remap_index 927
+#define DeleteSemaphoresEXT_remap_index 928
+#define GenSemaphoresEXT_remap_index 929
+#define GetMemoryObjectParameterivEXT_remap_index 930
+#define GetSemaphoreParameterui64vEXT_remap_index 931
+#define GetUnsignedBytei_vEXT_remap_index 932
+#define GetUnsignedBytevEXT_remap_index 933
+#define IsMemoryObjectEXT_remap_index 934
+#define IsSemaphoreEXT_remap_index 935
+#define MemoryObjectParameterivEXT_remap_index 936
+#define NamedBufferStorageMemEXT_remap_index 937
+#define SemaphoreParameterui64vEXT_remap_index 938
+#define SignalSemaphoreEXT_remap_index 939
+#define TexStorageMem1DEXT_remap_index 940
+#define TexStorageMem2DEXT_remap_index 941
+#define TexStorageMem2DMultisampleEXT_remap_index 942
+#define TexStorageMem3DEXT_remap_index 943
+#define TexStorageMem3DMultisampleEXT_remap_index 944
+#define TextureStorageMem1DEXT_remap_index 945
+#define TextureStorageMem2DEXT_remap_index 946
+#define TextureStorageMem2DMultisampleEXT_remap_index 947
+#define TextureStorageMem3DEXT_remap_index 948
+#define TextureStorageMem3DMultisampleEXT_remap_index 949
+#define WaitSemaphoreEXT_remap_index 950
+#define ImportMemoryFdEXT_remap_index 951
+#define ImportSemaphoreFdEXT_remap_index 952
+#define StencilFuncSeparateATI_remap_index 953
+#define ProgramEnvParameters4fvEXT_remap_index 954
+#define ProgramLocalParameters4fvEXT_remap_index 955
+#define EGLImageTargetRenderbufferStorageOES_remap_index 956
+#define EGLImageTargetTexture2DOES_remap_index 957
+#define AlphaFuncx_remap_index 958
+#define ClearColorx_remap_index 959
+#define ClearDepthx_remap_index 960
+#define Color4x_remap_index 961
+#define DepthRangex_remap_index 962
+#define Fogx_remap_index 963
+#define Fogxv_remap_index 964
+#define Frustumf_remap_index 965
+#define Frustumx_remap_index 966
+#define LightModelx_remap_index 967
+#define LightModelxv_remap_index 968
+#define Lightx_remap_index 969
+#define Lightxv_remap_index 970
+#define LineWidthx_remap_index 971
+#define LoadMatrixx_remap_index 972
+#define Materialx_remap_index 973
+#define Materialxv_remap_index 974
+#define MultMatrixx_remap_index 975
+#define MultiTexCoord4x_remap_index 976
+#define Normal3x_remap_index 977
+#define Orthof_remap_index 978
+#define Orthox_remap_index 979
+#define PointSizex_remap_index 980
+#define PolygonOffsetx_remap_index 981
+#define Rotatex_remap_index 982
+#define SampleCoveragex_remap_index 983
+#define Scalex_remap_index 984
+#define TexEnvx_remap_index 985
+#define TexEnvxv_remap_index 986
+#define TexParameterx_remap_index 987
+#define Translatex_remap_index 988
+#define ClipPlanef_remap_index 989
+#define ClipPlanex_remap_index 990
+#define GetClipPlanef_remap_index 991
+#define GetClipPlanex_remap_index 992
+#define GetFixedv_remap_index 993
+#define GetLightxv_remap_index 994
+#define GetMaterialxv_remap_index 995
+#define GetTexEnvxv_remap_index 996
+#define GetTexParameterxv_remap_index 997
+#define PointParameterx_remap_index 998
+#define PointParameterxv_remap_index 999
+#define TexParameterxv_remap_index 1000
+#define BlendBarrier_remap_index 1001
+#define PrimitiveBoundingBox_remap_index 1002
+
+#define _gloffset_CompressedTexImage1D driDispatchRemapTable[CompressedTexImage1D_remap_index]
+#define _gloffset_CompressedTexImage2D driDispatchRemapTable[CompressedTexImage2D_remap_index]
+#define _gloffset_CompressedTexImage3D driDispatchRemapTable[CompressedTexImage3D_remap_index]
+#define _gloffset_CompressedTexSubImage1D driDispatchRemapTable[CompressedTexSubImage1D_remap_index]
+#define _gloffset_CompressedTexSubImage2D driDispatchRemapTable[CompressedTexSubImage2D_remap_index]
+#define _gloffset_CompressedTexSubImage3D driDispatchRemapTable[CompressedTexSubImage3D_remap_index]
+#define _gloffset_GetCompressedTexImage driDispatchRemapTable[GetCompressedTexImage_remap_index]
+#define _gloffset_LoadTransposeMatrixd driDispatchRemapTable[LoadTransposeMatrixd_remap_index]
+#define _gloffset_LoadTransposeMatrixf driDispatchRemapTable[LoadTransposeMatrixf_remap_index]
+#define _gloffset_MultTransposeMatrixd driDispatchRemapTable[MultTransposeMatrixd_remap_index]
+#define _gloffset_MultTransposeMatrixf driDispatchRemapTable[MultTransposeMatrixf_remap_index]
+#define _gloffset_SampleCoverage driDispatchRemapTable[SampleCoverage_remap_index]
+#define _gloffset_BlendFuncSeparate driDispatchRemapTable[BlendFuncSeparate_remap_index]
+#define _gloffset_FogCoordPointer driDispatchRemapTable[FogCoordPointer_remap_index]
+#define _gloffset_FogCoordd driDispatchRemapTable[FogCoordd_remap_index]
+#define _gloffset_FogCoorddv driDispatchRemapTable[FogCoorddv_remap_index]
+#define _gloffset_MultiDrawArrays driDispatchRemapTable[MultiDrawArrays_remap_index]
+#define _gloffset_PointParameterf driDispatchRemapTable[PointParameterf_remap_index]
+#define _gloffset_PointParameterfv driDispatchRemapTable[PointParameterfv_remap_index]
+#define _gloffset_PointParameteri driDispatchRemapTable[PointParameteri_remap_index]
+#define _gloffset_PointParameteriv driDispatchRemapTable[PointParameteriv_remap_index]
+#define _gloffset_SecondaryColor3b driDispatchRemapTable[SecondaryColor3b_remap_index]
+#define _gloffset_SecondaryColor3bv driDispatchRemapTable[SecondaryColor3bv_remap_index]
+#define _gloffset_SecondaryColor3d driDispatchRemapTable[SecondaryColor3d_remap_index]
+#define _gloffset_SecondaryColor3dv driDispatchRemapTable[SecondaryColor3dv_remap_index]
+#define _gloffset_SecondaryColor3i driDispatchRemapTable[SecondaryColor3i_remap_index]
+#define _gloffset_SecondaryColor3iv driDispatchRemapTable[SecondaryColor3iv_remap_index]
+#define _gloffset_SecondaryColor3s driDispatchRemapTable[SecondaryColor3s_remap_index]
+#define _gloffset_SecondaryColor3sv driDispatchRemapTable[SecondaryColor3sv_remap_index]
+#define _gloffset_SecondaryColor3ub driDispatchRemapTable[SecondaryColor3ub_remap_index]
+#define _gloffset_SecondaryColor3ubv driDispatchRemapTable[SecondaryColor3ubv_remap_index]
+#define _gloffset_SecondaryColor3ui driDispatchRemapTable[SecondaryColor3ui_remap_index]
+#define _gloffset_SecondaryColor3uiv driDispatchRemapTable[SecondaryColor3uiv_remap_index]
+#define _gloffset_SecondaryColor3us driDispatchRemapTable[SecondaryColor3us_remap_index]
+#define _gloffset_SecondaryColor3usv driDispatchRemapTable[SecondaryColor3usv_remap_index]
+#define _gloffset_SecondaryColorPointer driDispatchRemapTable[SecondaryColorPointer_remap_index]
+#define _gloffset_WindowPos2d driDispatchRemapTable[WindowPos2d_remap_index]
+#define _gloffset_WindowPos2dv driDispatchRemapTable[WindowPos2dv_remap_index]
+#define _gloffset_WindowPos2f driDispatchRemapTable[WindowPos2f_remap_index]
+#define _gloffset_WindowPos2fv driDispatchRemapTable[WindowPos2fv_remap_index]
+#define _gloffset_WindowPos2i driDispatchRemapTable[WindowPos2i_remap_index]
+#define _gloffset_WindowPos2iv driDispatchRemapTable[WindowPos2iv_remap_index]
+#define _gloffset_WindowPos2s driDispatchRemapTable[WindowPos2s_remap_index]
+#define _gloffset_WindowPos2sv driDispatchRemapTable[WindowPos2sv_remap_index]
+#define _gloffset_WindowPos3d driDispatchRemapTable[WindowPos3d_remap_index]
+#define _gloffset_WindowPos3dv driDispatchRemapTable[WindowPos3dv_remap_index]
+#define _gloffset_WindowPos3f driDispatchRemapTable[WindowPos3f_remap_index]
+#define _gloffset_WindowPos3fv driDispatchRemapTable[WindowPos3fv_remap_index]
+#define _gloffset_WindowPos3i driDispatchRemapTable[WindowPos3i_remap_index]
+#define _gloffset_WindowPos3iv driDispatchRemapTable[WindowPos3iv_remap_index]
+#define _gloffset_WindowPos3s driDispatchRemapTable[WindowPos3s_remap_index]
+#define _gloffset_WindowPos3sv driDispatchRemapTable[WindowPos3sv_remap_index]
+#define _gloffset_BeginQuery driDispatchRemapTable[BeginQuery_remap_index]
+#define _gloffset_BindBuffer driDispatchRemapTable[BindBuffer_remap_index]
+#define _gloffset_BufferData driDispatchRemapTable[BufferData_remap_index]
+#define _gloffset_BufferSubData driDispatchRemapTable[BufferSubData_remap_index]
+#define _gloffset_DeleteBuffers driDispatchRemapTable[DeleteBuffers_remap_index]
+#define _gloffset_DeleteQueries driDispatchRemapTable[DeleteQueries_remap_index]
+#define _gloffset_EndQuery driDispatchRemapTable[EndQuery_remap_index]
+#define _gloffset_GenBuffers driDispatchRemapTable[GenBuffers_remap_index]
+#define _gloffset_GenQueries driDispatchRemapTable[GenQueries_remap_index]
+#define _gloffset_GetBufferParameteriv driDispatchRemapTable[GetBufferParameteriv_remap_index]
+#define _gloffset_GetBufferPointerv driDispatchRemapTable[GetBufferPointerv_remap_index]
+#define _gloffset_GetBufferSubData driDispatchRemapTable[GetBufferSubData_remap_index]
+#define _gloffset_GetQueryObjectiv driDispatchRemapTable[GetQueryObjectiv_remap_index]
+#define _gloffset_GetQueryObjectuiv driDispatchRemapTable[GetQueryObjectuiv_remap_index]
+#define _gloffset_GetQueryiv driDispatchRemapTable[GetQueryiv_remap_index]
+#define _gloffset_IsBuffer driDispatchRemapTable[IsBuffer_remap_index]
+#define _gloffset_IsQuery driDispatchRemapTable[IsQuery_remap_index]
+#define _gloffset_MapBuffer driDispatchRemapTable[MapBuffer_remap_index]
+#define _gloffset_UnmapBuffer driDispatchRemapTable[UnmapBuffer_remap_index]
+#define _gloffset_AttachShader driDispatchRemapTable[AttachShader_remap_index]
+#define _gloffset_BindAttribLocation driDispatchRemapTable[BindAttribLocation_remap_index]
+#define _gloffset_BlendEquationSeparate driDispatchRemapTable[BlendEquationSeparate_remap_index]
+#define _gloffset_CompileShader driDispatchRemapTable[CompileShader_remap_index]
+#define _gloffset_CreateProgram driDispatchRemapTable[CreateProgram_remap_index]
+#define _gloffset_CreateShader driDispatchRemapTable[CreateShader_remap_index]
+#define _gloffset_DeleteProgram driDispatchRemapTable[DeleteProgram_remap_index]
+#define _gloffset_DeleteShader driDispatchRemapTable[DeleteShader_remap_index]
+#define _gloffset_DetachShader driDispatchRemapTable[DetachShader_remap_index]
+#define _gloffset_DisableVertexAttribArray driDispatchRemapTable[DisableVertexAttribArray_remap_index]
+#define _gloffset_DrawBuffers driDispatchRemapTable[DrawBuffers_remap_index]
+#define _gloffset_EnableVertexAttribArray driDispatchRemapTable[EnableVertexAttribArray_remap_index]
+#define _gloffset_GetActiveAttrib driDispatchRemapTable[GetActiveAttrib_remap_index]
+#define _gloffset_GetActiveUniform driDispatchRemapTable[GetActiveUniform_remap_index]
+#define _gloffset_GetAttachedShaders driDispatchRemapTable[GetAttachedShaders_remap_index]
+#define _gloffset_GetAttribLocation driDispatchRemapTable[GetAttribLocation_remap_index]
+#define _gloffset_GetProgramInfoLog driDispatchRemapTable[GetProgramInfoLog_remap_index]
+#define _gloffset_GetProgramiv driDispatchRemapTable[GetProgramiv_remap_index]
+#define _gloffset_GetShaderInfoLog driDispatchRemapTable[GetShaderInfoLog_remap_index]
+#define _gloffset_GetShaderSource driDispatchRemapTable[GetShaderSource_remap_index]
+#define _gloffset_GetShaderiv driDispatchRemapTable[GetShaderiv_remap_index]
+#define _gloffset_GetUniformLocation driDispatchRemapTable[GetUniformLocation_remap_index]
+#define _gloffset_GetUniformfv driDispatchRemapTable[GetUniformfv_remap_index]
+#define _gloffset_GetUniformiv driDispatchRemapTable[GetUniformiv_remap_index]
+#define _gloffset_GetVertexAttribPointerv driDispatchRemapTable[GetVertexAttribPointerv_remap_index]
+#define _gloffset_GetVertexAttribdv driDispatchRemapTable[GetVertexAttribdv_remap_index]
+#define _gloffset_GetVertexAttribfv driDispatchRemapTable[GetVertexAttribfv_remap_index]
+#define _gloffset_GetVertexAttribiv driDispatchRemapTable[GetVertexAttribiv_remap_index]
+#define _gloffset_IsProgram driDispatchRemapTable[IsProgram_remap_index]
+#define _gloffset_IsShader driDispatchRemapTable[IsShader_remap_index]
+#define _gloffset_LinkProgram driDispatchRemapTable[LinkProgram_remap_index]
+#define _gloffset_ShaderSource driDispatchRemapTable[ShaderSource_remap_index]
+#define _gloffset_StencilFuncSeparate driDispatchRemapTable[StencilFuncSeparate_remap_index]
+#define _gloffset_StencilMaskSeparate driDispatchRemapTable[StencilMaskSeparate_remap_index]
+#define _gloffset_StencilOpSeparate driDispatchRemapTable[StencilOpSeparate_remap_index]
+#define _gloffset_Uniform1f driDispatchRemapTable[Uniform1f_remap_index]
+#define _gloffset_Uniform1fv driDispatchRemapTable[Uniform1fv_remap_index]
+#define _gloffset_Uniform1i driDispatchRemapTable[Uniform1i_remap_index]
+#define _gloffset_Uniform1iv driDispatchRemapTable[Uniform1iv_remap_index]
+#define _gloffset_Uniform2f driDispatchRemapTable[Uniform2f_remap_index]
+#define _gloffset_Uniform2fv driDispatchRemapTable[Uniform2fv_remap_index]
+#define _gloffset_Uniform2i driDispatchRemapTable[Uniform2i_remap_index]
+#define _gloffset_Uniform2iv driDispatchRemapTable[Uniform2iv_remap_index]
+#define _gloffset_Uniform3f driDispatchRemapTable[Uniform3f_remap_index]
+#define _gloffset_Uniform3fv driDispatchRemapTable[Uniform3fv_remap_index]
+#define _gloffset_Uniform3i driDispatchRemapTable[Uniform3i_remap_index]
+#define _gloffset_Uniform3iv driDispatchRemapTable[Uniform3iv_remap_index]
+#define _gloffset_Uniform4f driDispatchRemapTable[Uniform4f_remap_index]
+#define _gloffset_Uniform4fv driDispatchRemapTable[Uniform4fv_remap_index]
+#define _gloffset_Uniform4i driDispatchRemapTable[Uniform4i_remap_index]
+#define _gloffset_Uniform4iv driDispatchRemapTable[Uniform4iv_remap_index]
+#define _gloffset_UniformMatrix2fv driDispatchRemapTable[UniformMatrix2fv_remap_index]
+#define _gloffset_UniformMatrix3fv driDispatchRemapTable[UniformMatrix3fv_remap_index]
+#define _gloffset_UniformMatrix4fv driDispatchRemapTable[UniformMatrix4fv_remap_index]
+#define _gloffset_UseProgram driDispatchRemapTable[UseProgram_remap_index]
+#define _gloffset_ValidateProgram driDispatchRemapTable[ValidateProgram_remap_index]
+#define _gloffset_VertexAttrib1d driDispatchRemapTable[VertexAttrib1d_remap_index]
+#define _gloffset_VertexAttrib1dv driDispatchRemapTable[VertexAttrib1dv_remap_index]
+#define _gloffset_VertexAttrib1s driDispatchRemapTable[VertexAttrib1s_remap_index]
+#define _gloffset_VertexAttrib1sv driDispatchRemapTable[VertexAttrib1sv_remap_index]
+#define _gloffset_VertexAttrib2d driDispatchRemapTable[VertexAttrib2d_remap_index]
+#define _gloffset_VertexAttrib2dv driDispatchRemapTable[VertexAttrib2dv_remap_index]
+#define _gloffset_VertexAttrib2s driDispatchRemapTable[VertexAttrib2s_remap_index]
+#define _gloffset_VertexAttrib2sv driDispatchRemapTable[VertexAttrib2sv_remap_index]
+#define _gloffset_VertexAttrib3d driDispatchRemapTable[VertexAttrib3d_remap_index]
+#define _gloffset_VertexAttrib3dv driDispatchRemapTable[VertexAttrib3dv_remap_index]
+#define _gloffset_VertexAttrib3s driDispatchRemapTable[VertexAttrib3s_remap_index]
+#define _gloffset_VertexAttrib3sv driDispatchRemapTable[VertexAttrib3sv_remap_index]
+#define _gloffset_VertexAttrib4Nbv driDispatchRemapTable[VertexAttrib4Nbv_remap_index]
+#define _gloffset_VertexAttrib4Niv driDispatchRemapTable[VertexAttrib4Niv_remap_index]
+#define _gloffset_VertexAttrib4Nsv driDispatchRemapTable[VertexAttrib4Nsv_remap_index]
+#define _gloffset_VertexAttrib4Nub driDispatchRemapTable[VertexAttrib4Nub_remap_index]
+#define _gloffset_VertexAttrib4Nubv driDispatchRemapTable[VertexAttrib4Nubv_remap_index]
+#define _gloffset_VertexAttrib4Nuiv driDispatchRemapTable[VertexAttrib4Nuiv_remap_index]
+#define _gloffset_VertexAttrib4Nusv driDispatchRemapTable[VertexAttrib4Nusv_remap_index]
+#define _gloffset_VertexAttrib4bv driDispatchRemapTable[VertexAttrib4bv_remap_index]
+#define _gloffset_VertexAttrib4d driDispatchRemapTable[VertexAttrib4d_remap_index]
+#define _gloffset_VertexAttrib4dv driDispatchRemapTable[VertexAttrib4dv_remap_index]
+#define _gloffset_VertexAttrib4iv driDispatchRemapTable[VertexAttrib4iv_remap_index]
+#define _gloffset_VertexAttrib4s driDispatchRemapTable[VertexAttrib4s_remap_index]
+#define _gloffset_VertexAttrib4sv driDispatchRemapTable[VertexAttrib4sv_remap_index]
+#define _gloffset_VertexAttrib4ubv driDispatchRemapTable[VertexAttrib4ubv_remap_index]
+#define _gloffset_VertexAttrib4uiv driDispatchRemapTable[VertexAttrib4uiv_remap_index]
+#define _gloffset_VertexAttrib4usv driDispatchRemapTable[VertexAttrib4usv_remap_index]
+#define _gloffset_VertexAttribPointer driDispatchRemapTable[VertexAttribPointer_remap_index]
+#define _gloffset_UniformMatrix2x3fv driDispatchRemapTable[UniformMatrix2x3fv_remap_index]
+#define _gloffset_UniformMatrix2x4fv driDispatchRemapTable[UniformMatrix2x4fv_remap_index]
+#define _gloffset_UniformMatrix3x2fv driDispatchRemapTable[UniformMatrix3x2fv_remap_index]
+#define _gloffset_UniformMatrix3x4fv driDispatchRemapTable[UniformMatrix3x4fv_remap_index]
+#define _gloffset_UniformMatrix4x2fv driDispatchRemapTable[UniformMatrix4x2fv_remap_index]
+#define _gloffset_UniformMatrix4x3fv driDispatchRemapTable[UniformMatrix4x3fv_remap_index]
+#define _gloffset_BeginConditionalRender driDispatchRemapTable[BeginConditionalRender_remap_index]
+#define _gloffset_BeginTransformFeedback driDispatchRemapTable[BeginTransformFeedback_remap_index]
+#define _gloffset_BindBufferBase driDispatchRemapTable[BindBufferBase_remap_index]
+#define _gloffset_BindBufferRange driDispatchRemapTable[BindBufferRange_remap_index]
+#define _gloffset_BindFragDataLocation driDispatchRemapTable[BindFragDataLocation_remap_index]
+#define _gloffset_ClampColor driDispatchRemapTable[ClampColor_remap_index]
+#define _gloffset_ClearBufferfi driDispatchRemapTable[ClearBufferfi_remap_index]
+#define _gloffset_ClearBufferfv driDispatchRemapTable[ClearBufferfv_remap_index]
+#define _gloffset_ClearBufferiv driDispatchRemapTable[ClearBufferiv_remap_index]
+#define _gloffset_ClearBufferuiv driDispatchRemapTable[ClearBufferuiv_remap_index]
+#define _gloffset_ColorMaski driDispatchRemapTable[ColorMaski_remap_index]
+#define _gloffset_Disablei driDispatchRemapTable[Disablei_remap_index]
+#define _gloffset_Enablei driDispatchRemapTable[Enablei_remap_index]
+#define _gloffset_EndConditionalRender driDispatchRemapTable[EndConditionalRender_remap_index]
+#define _gloffset_EndTransformFeedback driDispatchRemapTable[EndTransformFeedback_remap_index]
+#define _gloffset_GetBooleani_v driDispatchRemapTable[GetBooleani_v_remap_index]
+#define _gloffset_GetFragDataLocation driDispatchRemapTable[GetFragDataLocation_remap_index]
+#define _gloffset_GetIntegeri_v driDispatchRemapTable[GetIntegeri_v_remap_index]
+#define _gloffset_GetStringi driDispatchRemapTable[GetStringi_remap_index]
+#define _gloffset_GetTexParameterIiv driDispatchRemapTable[GetTexParameterIiv_remap_index]
+#define _gloffset_GetTexParameterIuiv driDispatchRemapTable[GetTexParameterIuiv_remap_index]
+#define _gloffset_GetTransformFeedbackVarying driDispatchRemapTable[GetTransformFeedbackVarying_remap_index]
+#define _gloffset_GetUniformuiv driDispatchRemapTable[GetUniformuiv_remap_index]
+#define _gloffset_GetVertexAttribIiv driDispatchRemapTable[GetVertexAttribIiv_remap_index]
+#define _gloffset_GetVertexAttribIuiv driDispatchRemapTable[GetVertexAttribIuiv_remap_index]
+#define _gloffset_IsEnabledi driDispatchRemapTable[IsEnabledi_remap_index]
+#define _gloffset_TexParameterIiv driDispatchRemapTable[TexParameterIiv_remap_index]
+#define _gloffset_TexParameterIuiv driDispatchRemapTable[TexParameterIuiv_remap_index]
+#define _gloffset_TransformFeedbackVaryings driDispatchRemapTable[TransformFeedbackVaryings_remap_index]
+#define _gloffset_Uniform1ui driDispatchRemapTable[Uniform1ui_remap_index]
+#define _gloffset_Uniform1uiv driDispatchRemapTable[Uniform1uiv_remap_index]
+#define _gloffset_Uniform2ui driDispatchRemapTable[Uniform2ui_remap_index]
+#define _gloffset_Uniform2uiv driDispatchRemapTable[Uniform2uiv_remap_index]
+#define _gloffset_Uniform3ui driDispatchRemapTable[Uniform3ui_remap_index]
+#define _gloffset_Uniform3uiv driDispatchRemapTable[Uniform3uiv_remap_index]
+#define _gloffset_Uniform4ui driDispatchRemapTable[Uniform4ui_remap_index]
+#define _gloffset_Uniform4uiv driDispatchRemapTable[Uniform4uiv_remap_index]
+#define _gloffset_VertexAttribI1iv driDispatchRemapTable[VertexAttribI1iv_remap_index]
+#define _gloffset_VertexAttribI1uiv driDispatchRemapTable[VertexAttribI1uiv_remap_index]
+#define _gloffset_VertexAttribI4bv driDispatchRemapTable[VertexAttribI4bv_remap_index]
+#define _gloffset_VertexAttribI4sv driDispatchRemapTable[VertexAttribI4sv_remap_index]
+#define _gloffset_VertexAttribI4ubv driDispatchRemapTable[VertexAttribI4ubv_remap_index]
+#define _gloffset_VertexAttribI4usv driDispatchRemapTable[VertexAttribI4usv_remap_index]
+#define _gloffset_VertexAttribIPointer driDispatchRemapTable[VertexAttribIPointer_remap_index]
+#define _gloffset_PrimitiveRestartIndex driDispatchRemapTable[PrimitiveRestartIndex_remap_index]
+#define _gloffset_TexBuffer driDispatchRemapTable[TexBuffer_remap_index]
+#define _gloffset_FramebufferTexture driDispatchRemapTable[FramebufferTexture_remap_index]
+#define _gloffset_GetBufferParameteri64v driDispatchRemapTable[GetBufferParameteri64v_remap_index]
+#define _gloffset_GetInteger64i_v driDispatchRemapTable[GetInteger64i_v_remap_index]
+#define _gloffset_VertexAttribDivisor driDispatchRemapTable[VertexAttribDivisor_remap_index]
+#define _gloffset_MinSampleShading driDispatchRemapTable[MinSampleShading_remap_index]
+#define _gloffset_MemoryBarrierByRegion driDispatchRemapTable[MemoryBarrierByRegion_remap_index]
+#define _gloffset_BindProgramARB driDispatchRemapTable[BindProgramARB_remap_index]
+#define _gloffset_DeleteProgramsARB driDispatchRemapTable[DeleteProgramsARB_remap_index]
+#define _gloffset_GenProgramsARB driDispatchRemapTable[GenProgramsARB_remap_index]
+#define _gloffset_GetProgramEnvParameterdvARB driDispatchRemapTable[GetProgramEnvParameterdvARB_remap_index]
+#define _gloffset_GetProgramEnvParameterfvARB driDispatchRemapTable[GetProgramEnvParameterfvARB_remap_index]
+#define _gloffset_GetProgramLocalParameterdvARB driDispatchRemapTable[GetProgramLocalParameterdvARB_remap_index]
+#define _gloffset_GetProgramLocalParameterfvARB driDispatchRemapTable[GetProgramLocalParameterfvARB_remap_index]
+#define _gloffset_GetProgramStringARB driDispatchRemapTable[GetProgramStringARB_remap_index]
+#define _gloffset_GetProgramivARB driDispatchRemapTable[GetProgramivARB_remap_index]
+#define _gloffset_IsProgramARB driDispatchRemapTable[IsProgramARB_remap_index]
+#define _gloffset_ProgramEnvParameter4dARB driDispatchRemapTable[ProgramEnvParameter4dARB_remap_index]
+#define _gloffset_ProgramEnvParameter4dvARB driDispatchRemapTable[ProgramEnvParameter4dvARB_remap_index]
+#define _gloffset_ProgramEnvParameter4fARB driDispatchRemapTable[ProgramEnvParameter4fARB_remap_index]
+#define _gloffset_ProgramEnvParameter4fvARB driDispatchRemapTable[ProgramEnvParameter4fvARB_remap_index]
+#define _gloffset_ProgramLocalParameter4dARB driDispatchRemapTable[ProgramLocalParameter4dARB_remap_index]
+#define _gloffset_ProgramLocalParameter4dvARB driDispatchRemapTable[ProgramLocalParameter4dvARB_remap_index]
+#define _gloffset_ProgramLocalParameter4fARB driDispatchRemapTable[ProgramLocalParameter4fARB_remap_index]
+#define _gloffset_ProgramLocalParameter4fvARB driDispatchRemapTable[ProgramLocalParameter4fvARB_remap_index]
+#define _gloffset_ProgramStringARB driDispatchRemapTable[ProgramStringARB_remap_index]
+#define _gloffset_VertexAttrib1fARB driDispatchRemapTable[VertexAttrib1fARB_remap_index]
+#define _gloffset_VertexAttrib1fvARB driDispatchRemapTable[VertexAttrib1fvARB_remap_index]
+#define _gloffset_VertexAttrib2fARB driDispatchRemapTable[VertexAttrib2fARB_remap_index]
+#define _gloffset_VertexAttrib2fvARB driDispatchRemapTable[VertexAttrib2fvARB_remap_index]
+#define _gloffset_VertexAttrib3fARB driDispatchRemapTable[VertexAttrib3fARB_remap_index]
+#define _gloffset_VertexAttrib3fvARB driDispatchRemapTable[VertexAttrib3fvARB_remap_index]
+#define _gloffset_VertexAttrib4fARB driDispatchRemapTable[VertexAttrib4fARB_remap_index]
+#define _gloffset_VertexAttrib4fvARB driDispatchRemapTable[VertexAttrib4fvARB_remap_index]
+#define _gloffset_AttachObjectARB driDispatchRemapTable[AttachObjectARB_remap_index]
+#define _gloffset_CreateProgramObjectARB driDispatchRemapTable[CreateProgramObjectARB_remap_index]
+#define _gloffset_CreateShaderObjectARB driDispatchRemapTable[CreateShaderObjectARB_remap_index]
+#define _gloffset_DeleteObjectARB driDispatchRemapTable[DeleteObjectARB_remap_index]
+#define _gloffset_DetachObjectARB driDispatchRemapTable[DetachObjectARB_remap_index]
+#define _gloffset_GetAttachedObjectsARB driDispatchRemapTable[GetAttachedObjectsARB_remap_index]
+#define _gloffset_GetHandleARB driDispatchRemapTable[GetHandleARB_remap_index]
+#define _gloffset_GetInfoLogARB driDispatchRemapTable[GetInfoLogARB_remap_index]
+#define _gloffset_GetObjectParameterfvARB driDispatchRemapTable[GetObjectParameterfvARB_remap_index]
+#define _gloffset_GetObjectParameterivARB driDispatchRemapTable[GetObjectParameterivARB_remap_index]
+#define _gloffset_DrawArraysInstancedARB driDispatchRemapTable[DrawArraysInstancedARB_remap_index]
+#define _gloffset_DrawElementsInstancedARB driDispatchRemapTable[DrawElementsInstancedARB_remap_index]
+#define _gloffset_BindFramebuffer driDispatchRemapTable[BindFramebuffer_remap_index]
+#define _gloffset_BindRenderbuffer driDispatchRemapTable[BindRenderbuffer_remap_index]
+#define _gloffset_BlitFramebuffer driDispatchRemapTable[BlitFramebuffer_remap_index]
+#define _gloffset_CheckFramebufferStatus driDispatchRemapTable[CheckFramebufferStatus_remap_index]
+#define _gloffset_DeleteFramebuffers driDispatchRemapTable[DeleteFramebuffers_remap_index]
+#define _gloffset_DeleteRenderbuffers driDispatchRemapTable[DeleteRenderbuffers_remap_index]
+#define _gloffset_FramebufferRenderbuffer driDispatchRemapTable[FramebufferRenderbuffer_remap_index]
+#define _gloffset_FramebufferTexture1D driDispatchRemapTable[FramebufferTexture1D_remap_index]
+#define _gloffset_FramebufferTexture2D driDispatchRemapTable[FramebufferTexture2D_remap_index]
+#define _gloffset_FramebufferTexture3D driDispatchRemapTable[FramebufferTexture3D_remap_index]
+#define _gloffset_FramebufferTextureLayer driDispatchRemapTable[FramebufferTextureLayer_remap_index]
+#define _gloffset_GenFramebuffers driDispatchRemapTable[GenFramebuffers_remap_index]
+#define _gloffset_GenRenderbuffers driDispatchRemapTable[GenRenderbuffers_remap_index]
+#define _gloffset_GenerateMipmap driDispatchRemapTable[GenerateMipmap_remap_index]
+#define _gloffset_GetFramebufferAttachmentParameteriv driDispatchRemapTable[GetFramebufferAttachmentParameteriv_remap_index]
+#define _gloffset_GetRenderbufferParameteriv driDispatchRemapTable[GetRenderbufferParameteriv_remap_index]
+#define _gloffset_IsFramebuffer driDispatchRemapTable[IsFramebuffer_remap_index]
+#define _gloffset_IsRenderbuffer driDispatchRemapTable[IsRenderbuffer_remap_index]
+#define _gloffset_RenderbufferStorage driDispatchRemapTable[RenderbufferStorage_remap_index]
+#define _gloffset_RenderbufferStorageMultisample driDispatchRemapTable[RenderbufferStorageMultisample_remap_index]
+#define _gloffset_FlushMappedBufferRange driDispatchRemapTable[FlushMappedBufferRange_remap_index]
+#define _gloffset_MapBufferRange driDispatchRemapTable[MapBufferRange_remap_index]
+#define _gloffset_BindVertexArray driDispatchRemapTable[BindVertexArray_remap_index]
+#define _gloffset_DeleteVertexArrays driDispatchRemapTable[DeleteVertexArrays_remap_index]
+#define _gloffset_GenVertexArrays driDispatchRemapTable[GenVertexArrays_remap_index]
+#define _gloffset_IsVertexArray driDispatchRemapTable[IsVertexArray_remap_index]
+#define _gloffset_GetActiveUniformBlockName driDispatchRemapTable[GetActiveUniformBlockName_remap_index]
+#define _gloffset_GetActiveUniformBlockiv driDispatchRemapTable[GetActiveUniformBlockiv_remap_index]
+#define _gloffset_GetActiveUniformName driDispatchRemapTable[GetActiveUniformName_remap_index]
+#define _gloffset_GetActiveUniformsiv driDispatchRemapTable[GetActiveUniformsiv_remap_index]
+#define _gloffset_GetUniformBlockIndex driDispatchRemapTable[GetUniformBlockIndex_remap_index]
+#define _gloffset_GetUniformIndices driDispatchRemapTable[GetUniformIndices_remap_index]
+#define _gloffset_UniformBlockBinding driDispatchRemapTable[UniformBlockBinding_remap_index]
+#define _gloffset_CopyBufferSubData driDispatchRemapTable[CopyBufferSubData_remap_index]
+#define _gloffset_ClientWaitSync driDispatchRemapTable[ClientWaitSync_remap_index]
+#define _gloffset_DeleteSync driDispatchRemapTable[DeleteSync_remap_index]
+#define _gloffset_FenceSync driDispatchRemapTable[FenceSync_remap_index]
+#define _gloffset_GetInteger64v driDispatchRemapTable[GetInteger64v_remap_index]
+#define _gloffset_GetSynciv driDispatchRemapTable[GetSynciv_remap_index]
+#define _gloffset_IsSync driDispatchRemapTable[IsSync_remap_index]
+#define _gloffset_WaitSync driDispatchRemapTable[WaitSync_remap_index]
+#define _gloffset_DrawElementsBaseVertex driDispatchRemapTable[DrawElementsBaseVertex_remap_index]
+#define _gloffset_DrawElementsInstancedBaseVertex driDispatchRemapTable[DrawElementsInstancedBaseVertex_remap_index]
+#define _gloffset_DrawRangeElementsBaseVertex driDispatchRemapTable[DrawRangeElementsBaseVertex_remap_index]
+#define _gloffset_MultiDrawElementsBaseVertex driDispatchRemapTable[MultiDrawElementsBaseVertex_remap_index]
+#define _gloffset_ProvokingVertex driDispatchRemapTable[ProvokingVertex_remap_index]
+#define _gloffset_GetMultisamplefv driDispatchRemapTable[GetMultisamplefv_remap_index]
+#define _gloffset_SampleMaski driDispatchRemapTable[SampleMaski_remap_index]
+#define _gloffset_TexImage2DMultisample driDispatchRemapTable[TexImage2DMultisample_remap_index]
+#define _gloffset_TexImage3DMultisample driDispatchRemapTable[TexImage3DMultisample_remap_index]
+#define _gloffset_BlendEquationSeparateiARB driDispatchRemapTable[BlendEquationSeparateiARB_remap_index]
+#define _gloffset_BlendEquationiARB driDispatchRemapTable[BlendEquationiARB_remap_index]
+#define _gloffset_BlendFuncSeparateiARB driDispatchRemapTable[BlendFuncSeparateiARB_remap_index]
+#define _gloffset_BlendFunciARB driDispatchRemapTable[BlendFunciARB_remap_index]
+#define _gloffset_BindFragDataLocationIndexed driDispatchRemapTable[BindFragDataLocationIndexed_remap_index]
+#define _gloffset_GetFragDataIndex driDispatchRemapTable[GetFragDataIndex_remap_index]
+#define _gloffset_BindSampler driDispatchRemapTable[BindSampler_remap_index]
+#define _gloffset_DeleteSamplers driDispatchRemapTable[DeleteSamplers_remap_index]
+#define _gloffset_GenSamplers driDispatchRemapTable[GenSamplers_remap_index]
+#define _gloffset_GetSamplerParameterIiv driDispatchRemapTable[GetSamplerParameterIiv_remap_index]
+#define _gloffset_GetSamplerParameterIuiv driDispatchRemapTable[GetSamplerParameterIuiv_remap_index]
+#define _gloffset_GetSamplerParameterfv driDispatchRemapTable[GetSamplerParameterfv_remap_index]
+#define _gloffset_GetSamplerParameteriv driDispatchRemapTable[GetSamplerParameteriv_remap_index]
+#define _gloffset_IsSampler driDispatchRemapTable[IsSampler_remap_index]
+#define _gloffset_SamplerParameterIiv driDispatchRemapTable[SamplerParameterIiv_remap_index]
+#define _gloffset_SamplerParameterIuiv driDispatchRemapTable[SamplerParameterIuiv_remap_index]
+#define _gloffset_SamplerParameterf driDispatchRemapTable[SamplerParameterf_remap_index]
+#define _gloffset_SamplerParameterfv driDispatchRemapTable[SamplerParameterfv_remap_index]
+#define _gloffset_SamplerParameteri driDispatchRemapTable[SamplerParameteri_remap_index]
+#define _gloffset_SamplerParameteriv driDispatchRemapTable[SamplerParameteriv_remap_index]
+#define _gloffset_GetQueryObjecti64v driDispatchRemapTable[GetQueryObjecti64v_remap_index]
+#define _gloffset_GetQueryObjectui64v driDispatchRemapTable[GetQueryObjectui64v_remap_index]
+#define _gloffset_QueryCounter driDispatchRemapTable[QueryCounter_remap_index]
+#define _gloffset_ColorP3ui driDispatchRemapTable[ColorP3ui_remap_index]
+#define _gloffset_ColorP3uiv driDispatchRemapTable[ColorP3uiv_remap_index]
+#define _gloffset_ColorP4ui driDispatchRemapTable[ColorP4ui_remap_index]
+#define _gloffset_ColorP4uiv driDispatchRemapTable[ColorP4uiv_remap_index]
+#define _gloffset_MultiTexCoordP1ui driDispatchRemapTable[MultiTexCoordP1ui_remap_index]
+#define _gloffset_MultiTexCoordP1uiv driDispatchRemapTable[MultiTexCoordP1uiv_remap_index]
+#define _gloffset_MultiTexCoordP2ui driDispatchRemapTable[MultiTexCoordP2ui_remap_index]
+#define _gloffset_MultiTexCoordP2uiv driDispatchRemapTable[MultiTexCoordP2uiv_remap_index]
+#define _gloffset_MultiTexCoordP3ui driDispatchRemapTable[MultiTexCoordP3ui_remap_index]
+#define _gloffset_MultiTexCoordP3uiv driDispatchRemapTable[MultiTexCoordP3uiv_remap_index]
+#define _gloffset_MultiTexCoordP4ui driDispatchRemapTable[MultiTexCoordP4ui_remap_index]
+#define _gloffset_MultiTexCoordP4uiv driDispatchRemapTable[MultiTexCoordP4uiv_remap_index]
+#define _gloffset_NormalP3ui driDispatchRemapTable[NormalP3ui_remap_index]
+#define _gloffset_NormalP3uiv driDispatchRemapTable[NormalP3uiv_remap_index]
+#define _gloffset_SecondaryColorP3ui driDispatchRemapTable[SecondaryColorP3ui_remap_index]
+#define _gloffset_SecondaryColorP3uiv driDispatchRemapTable[SecondaryColorP3uiv_remap_index]
+#define _gloffset_TexCoordP1ui driDispatchRemapTable[TexCoordP1ui_remap_index]
+#define _gloffset_TexCoordP1uiv driDispatchRemapTable[TexCoordP1uiv_remap_index]
+#define _gloffset_TexCoordP2ui driDispatchRemapTable[TexCoordP2ui_remap_index]
+#define _gloffset_TexCoordP2uiv driDispatchRemapTable[TexCoordP2uiv_remap_index]
+#define _gloffset_TexCoordP3ui driDispatchRemapTable[TexCoordP3ui_remap_index]
+#define _gloffset_TexCoordP3uiv driDispatchRemapTable[TexCoordP3uiv_remap_index]
+#define _gloffset_TexCoordP4ui driDispatchRemapTable[TexCoordP4ui_remap_index]
+#define _gloffset_TexCoordP4uiv driDispatchRemapTable[TexCoordP4uiv_remap_index]
+#define _gloffset_VertexAttribP1ui driDispatchRemapTable[VertexAttribP1ui_remap_index]
+#define _gloffset_VertexAttribP1uiv driDispatchRemapTable[VertexAttribP1uiv_remap_index]
+#define _gloffset_VertexAttribP2ui driDispatchRemapTable[VertexAttribP2ui_remap_index]
+#define _gloffset_VertexAttribP2uiv driDispatchRemapTable[VertexAttribP2uiv_remap_index]
+#define _gloffset_VertexAttribP3ui driDispatchRemapTable[VertexAttribP3ui_remap_index]
+#define _gloffset_VertexAttribP3uiv driDispatchRemapTable[VertexAttribP3uiv_remap_index]
+#define _gloffset_VertexAttribP4ui driDispatchRemapTable[VertexAttribP4ui_remap_index]
+#define _gloffset_VertexAttribP4uiv driDispatchRemapTable[VertexAttribP4uiv_remap_index]
+#define _gloffset_VertexP2ui driDispatchRemapTable[VertexP2ui_remap_index]
+#define _gloffset_VertexP2uiv driDispatchRemapTable[VertexP2uiv_remap_index]
+#define _gloffset_VertexP3ui driDispatchRemapTable[VertexP3ui_remap_index]
+#define _gloffset_VertexP3uiv driDispatchRemapTable[VertexP3uiv_remap_index]
+#define _gloffset_VertexP4ui driDispatchRemapTable[VertexP4ui_remap_index]
+#define _gloffset_VertexP4uiv driDispatchRemapTable[VertexP4uiv_remap_index]
+#define _gloffset_DrawArraysIndirect driDispatchRemapTable[DrawArraysIndirect_remap_index]
+#define _gloffset_DrawElementsIndirect driDispatchRemapTable[DrawElementsIndirect_remap_index]
+#define _gloffset_GetUniformdv driDispatchRemapTable[GetUniformdv_remap_index]
+#define _gloffset_Uniform1d driDispatchRemapTable[Uniform1d_remap_index]
+#define _gloffset_Uniform1dv driDispatchRemapTable[Uniform1dv_remap_index]
+#define _gloffset_Uniform2d driDispatchRemapTable[Uniform2d_remap_index]
+#define _gloffset_Uniform2dv driDispatchRemapTable[Uniform2dv_remap_index]
+#define _gloffset_Uniform3d driDispatchRemapTable[Uniform3d_remap_index]
+#define _gloffset_Uniform3dv driDispatchRemapTable[Uniform3dv_remap_index]
+#define _gloffset_Uniform4d driDispatchRemapTable[Uniform4d_remap_index]
+#define _gloffset_Uniform4dv driDispatchRemapTable[Uniform4dv_remap_index]
+#define _gloffset_UniformMatrix2dv driDispatchRemapTable[UniformMatrix2dv_remap_index]
+#define _gloffset_UniformMatrix2x3dv driDispatchRemapTable[UniformMatrix2x3dv_remap_index]
+#define _gloffset_UniformMatrix2x4dv driDispatchRemapTable[UniformMatrix2x4dv_remap_index]
+#define _gloffset_UniformMatrix3dv driDispatchRemapTable[UniformMatrix3dv_remap_index]
+#define _gloffset_UniformMatrix3x2dv driDispatchRemapTable[UniformMatrix3x2dv_remap_index]
+#define _gloffset_UniformMatrix3x4dv driDispatchRemapTable[UniformMatrix3x4dv_remap_index]
+#define _gloffset_UniformMatrix4dv driDispatchRemapTable[UniformMatrix4dv_remap_index]
+#define _gloffset_UniformMatrix4x2dv driDispatchRemapTable[UniformMatrix4x2dv_remap_index]
+#define _gloffset_UniformMatrix4x3dv driDispatchRemapTable[UniformMatrix4x3dv_remap_index]
+#define _gloffset_GetActiveSubroutineName driDispatchRemapTable[GetActiveSubroutineName_remap_index]
+#define _gloffset_GetActiveSubroutineUniformName driDispatchRemapTable[GetActiveSubroutineUniformName_remap_index]
+#define _gloffset_GetActiveSubroutineUniformiv driDispatchRemapTable[GetActiveSubroutineUniformiv_remap_index]
+#define _gloffset_GetProgramStageiv driDispatchRemapTable[GetProgramStageiv_remap_index]
+#define _gloffset_GetSubroutineIndex driDispatchRemapTable[GetSubroutineIndex_remap_index]
+#define _gloffset_GetSubroutineUniformLocation driDispatchRemapTable[GetSubroutineUniformLocation_remap_index]
+#define _gloffset_GetUniformSubroutineuiv driDispatchRemapTable[GetUniformSubroutineuiv_remap_index]
+#define _gloffset_UniformSubroutinesuiv driDispatchRemapTable[UniformSubroutinesuiv_remap_index]
+#define _gloffset_PatchParameterfv driDispatchRemapTable[PatchParameterfv_remap_index]
+#define _gloffset_PatchParameteri driDispatchRemapTable[PatchParameteri_remap_index]
+#define _gloffset_BindTransformFeedback driDispatchRemapTable[BindTransformFeedback_remap_index]
+#define _gloffset_DeleteTransformFeedbacks driDispatchRemapTable[DeleteTransformFeedbacks_remap_index]
+#define _gloffset_DrawTransformFeedback driDispatchRemapTable[DrawTransformFeedback_remap_index]
+#define _gloffset_GenTransformFeedbacks driDispatchRemapTable[GenTransformFeedbacks_remap_index]
+#define _gloffset_IsTransformFeedback driDispatchRemapTable[IsTransformFeedback_remap_index]
+#define _gloffset_PauseTransformFeedback driDispatchRemapTable[PauseTransformFeedback_remap_index]
+#define _gloffset_ResumeTransformFeedback driDispatchRemapTable[ResumeTransformFeedback_remap_index]
+#define _gloffset_BeginQueryIndexed driDispatchRemapTable[BeginQueryIndexed_remap_index]
+#define _gloffset_DrawTransformFeedbackStream driDispatchRemapTable[DrawTransformFeedbackStream_remap_index]
+#define _gloffset_EndQueryIndexed driDispatchRemapTable[EndQueryIndexed_remap_index]
+#define _gloffset_GetQueryIndexediv driDispatchRemapTable[GetQueryIndexediv_remap_index]
+#define _gloffset_ClearDepthf driDispatchRemapTable[ClearDepthf_remap_index]
+#define _gloffset_DepthRangef driDispatchRemapTable[DepthRangef_remap_index]
+#define _gloffset_GetShaderPrecisionFormat driDispatchRemapTable[GetShaderPrecisionFormat_remap_index]
+#define _gloffset_ReleaseShaderCompiler driDispatchRemapTable[ReleaseShaderCompiler_remap_index]
+#define _gloffset_ShaderBinary driDispatchRemapTable[ShaderBinary_remap_index]
+#define _gloffset_GetProgramBinary driDispatchRemapTable[GetProgramBinary_remap_index]
+#define _gloffset_ProgramBinary driDispatchRemapTable[ProgramBinary_remap_index]
+#define _gloffset_ProgramParameteri driDispatchRemapTable[ProgramParameteri_remap_index]
+#define _gloffset_GetVertexAttribLdv driDispatchRemapTable[GetVertexAttribLdv_remap_index]
+#define _gloffset_VertexAttribL1d driDispatchRemapTable[VertexAttribL1d_remap_index]
+#define _gloffset_VertexAttribL1dv driDispatchRemapTable[VertexAttribL1dv_remap_index]
+#define _gloffset_VertexAttribL2d driDispatchRemapTable[VertexAttribL2d_remap_index]
+#define _gloffset_VertexAttribL2dv driDispatchRemapTable[VertexAttribL2dv_remap_index]
+#define _gloffset_VertexAttribL3d driDispatchRemapTable[VertexAttribL3d_remap_index]
+#define _gloffset_VertexAttribL3dv driDispatchRemapTable[VertexAttribL3dv_remap_index]
+#define _gloffset_VertexAttribL4d driDispatchRemapTable[VertexAttribL4d_remap_index]
+#define _gloffset_VertexAttribL4dv driDispatchRemapTable[VertexAttribL4dv_remap_index]
+#define _gloffset_VertexAttribLPointer driDispatchRemapTable[VertexAttribLPointer_remap_index]
+#define _gloffset_DepthRangeArrayv driDispatchRemapTable[DepthRangeArrayv_remap_index]
+#define _gloffset_DepthRangeIndexed driDispatchRemapTable[DepthRangeIndexed_remap_index]
+#define _gloffset_GetDoublei_v driDispatchRemapTable[GetDoublei_v_remap_index]
+#define _gloffset_GetFloati_v driDispatchRemapTable[GetFloati_v_remap_index]
+#define _gloffset_ScissorArrayv driDispatchRemapTable[ScissorArrayv_remap_index]
+#define _gloffset_ScissorIndexed driDispatchRemapTable[ScissorIndexed_remap_index]
+#define _gloffset_ScissorIndexedv driDispatchRemapTable[ScissorIndexedv_remap_index]
+#define _gloffset_ViewportArrayv driDispatchRemapTable[ViewportArrayv_remap_index]
+#define _gloffset_ViewportIndexedf driDispatchRemapTable[ViewportIndexedf_remap_index]
+#define _gloffset_ViewportIndexedfv driDispatchRemapTable[ViewportIndexedfv_remap_index]
+#define _gloffset_GetGraphicsResetStatusARB driDispatchRemapTable[GetGraphicsResetStatusARB_remap_index]
+#define _gloffset_GetnColorTableARB driDispatchRemapTable[GetnColorTableARB_remap_index]
+#define _gloffset_GetnCompressedTexImageARB driDispatchRemapTable[GetnCompressedTexImageARB_remap_index]
+#define _gloffset_GetnConvolutionFilterARB driDispatchRemapTable[GetnConvolutionFilterARB_remap_index]
+#define _gloffset_GetnHistogramARB driDispatchRemapTable[GetnHistogramARB_remap_index]
+#define _gloffset_GetnMapdvARB driDispatchRemapTable[GetnMapdvARB_remap_index]
+#define _gloffset_GetnMapfvARB driDispatchRemapTable[GetnMapfvARB_remap_index]
+#define _gloffset_GetnMapivARB driDispatchRemapTable[GetnMapivARB_remap_index]
+#define _gloffset_GetnMinmaxARB driDispatchRemapTable[GetnMinmaxARB_remap_index]
+#define _gloffset_GetnPixelMapfvARB driDispatchRemapTable[GetnPixelMapfvARB_remap_index]
+#define _gloffset_GetnPixelMapuivARB driDispatchRemapTable[GetnPixelMapuivARB_remap_index]
+#define _gloffset_GetnPixelMapusvARB driDispatchRemapTable[GetnPixelMapusvARB_remap_index]
+#define _gloffset_GetnPolygonStippleARB driDispatchRemapTable[GetnPolygonStippleARB_remap_index]
+#define _gloffset_GetnSeparableFilterARB driDispatchRemapTable[GetnSeparableFilterARB_remap_index]
+#define _gloffset_GetnTexImageARB driDispatchRemapTable[GetnTexImageARB_remap_index]
+#define _gloffset_GetnUniformdvARB driDispatchRemapTable[GetnUniformdvARB_remap_index]
+#define _gloffset_GetnUniformfvARB driDispatchRemapTable[GetnUniformfvARB_remap_index]
+#define _gloffset_GetnUniformivARB driDispatchRemapTable[GetnUniformivARB_remap_index]
+#define _gloffset_GetnUniformuivARB driDispatchRemapTable[GetnUniformuivARB_remap_index]
+#define _gloffset_ReadnPixelsARB driDispatchRemapTable[ReadnPixelsARB_remap_index]
+#define _gloffset_DrawArraysInstancedBaseInstance driDispatchRemapTable[DrawArraysInstancedBaseInstance_remap_index]
+#define _gloffset_DrawElementsInstancedBaseInstance driDispatchRemapTable[DrawElementsInstancedBaseInstance_remap_index]
+#define _gloffset_DrawElementsInstancedBaseVertexBaseInstance driDispatchRemapTable[DrawElementsInstancedBaseVertexBaseInstance_remap_index]
+#define _gloffset_DrawTransformFeedbackInstanced driDispatchRemapTable[DrawTransformFeedbackInstanced_remap_index]
+#define _gloffset_DrawTransformFeedbackStreamInstanced driDispatchRemapTable[DrawTransformFeedbackStreamInstanced_remap_index]
+#define _gloffset_GetInternalformativ driDispatchRemapTable[GetInternalformativ_remap_index]
+#define _gloffset_GetActiveAtomicCounterBufferiv driDispatchRemapTable[GetActiveAtomicCounterBufferiv_remap_index]
+#define _gloffset_BindImageTexture driDispatchRemapTable[BindImageTexture_remap_index]
+#define _gloffset_MemoryBarrier driDispatchRemapTable[MemoryBarrier_remap_index]
+#define _gloffset_TexStorage1D driDispatchRemapTable[TexStorage1D_remap_index]
+#define _gloffset_TexStorage2D driDispatchRemapTable[TexStorage2D_remap_index]
+#define _gloffset_TexStorage3D driDispatchRemapTable[TexStorage3D_remap_index]
+#define _gloffset_TextureStorage1DEXT driDispatchRemapTable[TextureStorage1DEXT_remap_index]
+#define _gloffset_TextureStorage2DEXT driDispatchRemapTable[TextureStorage2DEXT_remap_index]
+#define _gloffset_TextureStorage3DEXT driDispatchRemapTable[TextureStorage3DEXT_remap_index]
+#define _gloffset_ClearBufferData driDispatchRemapTable[ClearBufferData_remap_index]
+#define _gloffset_ClearBufferSubData driDispatchRemapTable[ClearBufferSubData_remap_index]
+#define _gloffset_DispatchCompute driDispatchRemapTable[DispatchCompute_remap_index]
+#define _gloffset_DispatchComputeIndirect driDispatchRemapTable[DispatchComputeIndirect_remap_index]
+#define _gloffset_CopyImageSubData driDispatchRemapTable[CopyImageSubData_remap_index]
+#define _gloffset_TextureView driDispatchRemapTable[TextureView_remap_index]
+#define _gloffset_BindVertexBuffer driDispatchRemapTable[BindVertexBuffer_remap_index]
+#define _gloffset_VertexAttribBinding driDispatchRemapTable[VertexAttribBinding_remap_index]
+#define _gloffset_VertexAttribFormat driDispatchRemapTable[VertexAttribFormat_remap_index]
+#define _gloffset_VertexAttribIFormat driDispatchRemapTable[VertexAttribIFormat_remap_index]
+#define _gloffset_VertexAttribLFormat driDispatchRemapTable[VertexAttribLFormat_remap_index]
+#define _gloffset_VertexBindingDivisor driDispatchRemapTable[VertexBindingDivisor_remap_index]
+#define _gloffset_FramebufferParameteri driDispatchRemapTable[FramebufferParameteri_remap_index]
+#define _gloffset_GetFramebufferParameteriv driDispatchRemapTable[GetFramebufferParameteriv_remap_index]
+#define _gloffset_GetInternalformati64v driDispatchRemapTable[GetInternalformati64v_remap_index]
+#define _gloffset_MultiDrawArraysIndirect driDispatchRemapTable[MultiDrawArraysIndirect_remap_index]
+#define _gloffset_MultiDrawElementsIndirect driDispatchRemapTable[MultiDrawElementsIndirect_remap_index]
+#define _gloffset_GetProgramInterfaceiv driDispatchRemapTable[GetProgramInterfaceiv_remap_index]
+#define _gloffset_GetProgramResourceIndex driDispatchRemapTable[GetProgramResourceIndex_remap_index]
+#define _gloffset_GetProgramResourceLocation driDispatchRemapTable[GetProgramResourceLocation_remap_index]
+#define _gloffset_GetProgramResourceLocationIndex driDispatchRemapTable[GetProgramResourceLocationIndex_remap_index]
+#define _gloffset_GetProgramResourceName driDispatchRemapTable[GetProgramResourceName_remap_index]
+#define _gloffset_GetProgramResourceiv driDispatchRemapTable[GetProgramResourceiv_remap_index]
+#define _gloffset_ShaderStorageBlockBinding driDispatchRemapTable[ShaderStorageBlockBinding_remap_index]
+#define _gloffset_TexBufferRange driDispatchRemapTable[TexBufferRange_remap_index]
+#define _gloffset_TexStorage2DMultisample driDispatchRemapTable[TexStorage2DMultisample_remap_index]
+#define _gloffset_TexStorage3DMultisample driDispatchRemapTable[TexStorage3DMultisample_remap_index]
+#define _gloffset_BufferStorage driDispatchRemapTable[BufferStorage_remap_index]
+#define _gloffset_ClearTexImage driDispatchRemapTable[ClearTexImage_remap_index]
+#define _gloffset_ClearTexSubImage driDispatchRemapTable[ClearTexSubImage_remap_index]
+#define _gloffset_BindBuffersBase driDispatchRemapTable[BindBuffersBase_remap_index]
+#define _gloffset_BindBuffersRange driDispatchRemapTable[BindBuffersRange_remap_index]
+#define _gloffset_BindImageTextures driDispatchRemapTable[BindImageTextures_remap_index]
+#define _gloffset_BindSamplers driDispatchRemapTable[BindSamplers_remap_index]
+#define _gloffset_BindTextures driDispatchRemapTable[BindTextures_remap_index]
+#define _gloffset_BindVertexBuffers driDispatchRemapTable[BindVertexBuffers_remap_index]
+#define _gloffset_GetImageHandleARB driDispatchRemapTable[GetImageHandleARB_remap_index]
+#define _gloffset_GetTextureHandleARB driDispatchRemapTable[GetTextureHandleARB_remap_index]
+#define _gloffset_GetTextureSamplerHandleARB driDispatchRemapTable[GetTextureSamplerHandleARB_remap_index]
+#define _gloffset_GetVertexAttribLui64vARB driDispatchRemapTable[GetVertexAttribLui64vARB_remap_index]
+#define _gloffset_IsImageHandleResidentARB driDispatchRemapTable[IsImageHandleResidentARB_remap_index]
+#define _gloffset_IsTextureHandleResidentARB driDispatchRemapTable[IsTextureHandleResidentARB_remap_index]
+#define _gloffset_MakeImageHandleNonResidentARB driDispatchRemapTable[MakeImageHandleNonResidentARB_remap_index]
+#define _gloffset_MakeImageHandleResidentARB driDispatchRemapTable[MakeImageHandleResidentARB_remap_index]
+#define _gloffset_MakeTextureHandleNonResidentARB driDispatchRemapTable[MakeTextureHandleNonResidentARB_remap_index]
+#define _gloffset_MakeTextureHandleResidentARB driDispatchRemapTable[MakeTextureHandleResidentARB_remap_index]
+#define _gloffset_ProgramUniformHandleui64ARB driDispatchRemapTable[ProgramUniformHandleui64ARB_remap_index]
+#define _gloffset_ProgramUniformHandleui64vARB driDispatchRemapTable[ProgramUniformHandleui64vARB_remap_index]
+#define _gloffset_UniformHandleui64ARB driDispatchRemapTable[UniformHandleui64ARB_remap_index]
+#define _gloffset_UniformHandleui64vARB driDispatchRemapTable[UniformHandleui64vARB_remap_index]
+#define _gloffset_VertexAttribL1ui64ARB driDispatchRemapTable[VertexAttribL1ui64ARB_remap_index]
+#define _gloffset_VertexAttribL1ui64vARB driDispatchRemapTable[VertexAttribL1ui64vARB_remap_index]
+#define _gloffset_DispatchComputeGroupSizeARB driDispatchRemapTable[DispatchComputeGroupSizeARB_remap_index]
+#define _gloffset_MultiDrawArraysIndirectCountARB driDispatchRemapTable[MultiDrawArraysIndirectCountARB_remap_index]
+#define _gloffset_MultiDrawElementsIndirectCountARB driDispatchRemapTable[MultiDrawElementsIndirectCountARB_remap_index]
+#define _gloffset_ClipControl driDispatchRemapTable[ClipControl_remap_index]
+#define _gloffset_BindTextureUnit driDispatchRemapTable[BindTextureUnit_remap_index]
+#define _gloffset_BlitNamedFramebuffer driDispatchRemapTable[BlitNamedFramebuffer_remap_index]
+#define _gloffset_CheckNamedFramebufferStatus driDispatchRemapTable[CheckNamedFramebufferStatus_remap_index]
+#define _gloffset_ClearNamedBufferData driDispatchRemapTable[ClearNamedBufferData_remap_index]
+#define _gloffset_ClearNamedBufferSubData driDispatchRemapTable[ClearNamedBufferSubData_remap_index]
+#define _gloffset_ClearNamedFramebufferfi driDispatchRemapTable[ClearNamedFramebufferfi_remap_index]
+#define _gloffset_ClearNamedFramebufferfv driDispatchRemapTable[ClearNamedFramebufferfv_remap_index]
+#define _gloffset_ClearNamedFramebufferiv driDispatchRemapTable[ClearNamedFramebufferiv_remap_index]
+#define _gloffset_ClearNamedFramebufferuiv driDispatchRemapTable[ClearNamedFramebufferuiv_remap_index]
+#define _gloffset_CompressedTextureSubImage1D driDispatchRemapTable[CompressedTextureSubImage1D_remap_index]
+#define _gloffset_CompressedTextureSubImage2D driDispatchRemapTable[CompressedTextureSubImage2D_remap_index]
+#define _gloffset_CompressedTextureSubImage3D driDispatchRemapTable[CompressedTextureSubImage3D_remap_index]
+#define _gloffset_CopyNamedBufferSubData driDispatchRemapTable[CopyNamedBufferSubData_remap_index]
+#define _gloffset_CopyTextureSubImage1D driDispatchRemapTable[CopyTextureSubImage1D_remap_index]
+#define _gloffset_CopyTextureSubImage2D driDispatchRemapTable[CopyTextureSubImage2D_remap_index]
+#define _gloffset_CopyTextureSubImage3D driDispatchRemapTable[CopyTextureSubImage3D_remap_index]
+#define _gloffset_CreateBuffers driDispatchRemapTable[CreateBuffers_remap_index]
+#define _gloffset_CreateFramebuffers driDispatchRemapTable[CreateFramebuffers_remap_index]
+#define _gloffset_CreateProgramPipelines driDispatchRemapTable[CreateProgramPipelines_remap_index]
+#define _gloffset_CreateQueries driDispatchRemapTable[CreateQueries_remap_index]
+#define _gloffset_CreateRenderbuffers driDispatchRemapTable[CreateRenderbuffers_remap_index]
+#define _gloffset_CreateSamplers driDispatchRemapTable[CreateSamplers_remap_index]
+#define _gloffset_CreateTextures driDispatchRemapTable[CreateTextures_remap_index]
+#define _gloffset_CreateTransformFeedbacks driDispatchRemapTable[CreateTransformFeedbacks_remap_index]
+#define _gloffset_CreateVertexArrays driDispatchRemapTable[CreateVertexArrays_remap_index]
+#define _gloffset_DisableVertexArrayAttrib driDispatchRemapTable[DisableVertexArrayAttrib_remap_index]
+#define _gloffset_EnableVertexArrayAttrib driDispatchRemapTable[EnableVertexArrayAttrib_remap_index]
+#define _gloffset_FlushMappedNamedBufferRange driDispatchRemapTable[FlushMappedNamedBufferRange_remap_index]
+#define _gloffset_GenerateTextureMipmap driDispatchRemapTable[GenerateTextureMipmap_remap_index]
+#define _gloffset_GetCompressedTextureImage driDispatchRemapTable[GetCompressedTextureImage_remap_index]
+#define _gloffset_GetNamedBufferParameteri64v driDispatchRemapTable[GetNamedBufferParameteri64v_remap_index]
+#define _gloffset_GetNamedBufferParameteriv driDispatchRemapTable[GetNamedBufferParameteriv_remap_index]
+#define _gloffset_GetNamedBufferPointerv driDispatchRemapTable[GetNamedBufferPointerv_remap_index]
+#define _gloffset_GetNamedBufferSubData driDispatchRemapTable[GetNamedBufferSubData_remap_index]
+#define _gloffset_GetNamedFramebufferAttachmentParameteriv driDispatchRemapTable[GetNamedFramebufferAttachmentParameteriv_remap_index]
+#define _gloffset_GetNamedFramebufferParameteriv driDispatchRemapTable[GetNamedFramebufferParameteriv_remap_index]
+#define _gloffset_GetNamedRenderbufferParameteriv driDispatchRemapTable[GetNamedRenderbufferParameteriv_remap_index]
+#define _gloffset_GetQueryBufferObjecti64v driDispatchRemapTable[GetQueryBufferObjecti64v_remap_index]
+#define _gloffset_GetQueryBufferObjectiv driDispatchRemapTable[GetQueryBufferObjectiv_remap_index]
+#define _gloffset_GetQueryBufferObjectui64v driDispatchRemapTable[GetQueryBufferObjectui64v_remap_index]
+#define _gloffset_GetQueryBufferObjectuiv driDispatchRemapTable[GetQueryBufferObjectuiv_remap_index]
+#define _gloffset_GetTextureImage driDispatchRemapTable[GetTextureImage_remap_index]
+#define _gloffset_GetTextureLevelParameterfv driDispatchRemapTable[GetTextureLevelParameterfv_remap_index]
+#define _gloffset_GetTextureLevelParameteriv driDispatchRemapTable[GetTextureLevelParameteriv_remap_index]
+#define _gloffset_GetTextureParameterIiv driDispatchRemapTable[GetTextureParameterIiv_remap_index]
+#define _gloffset_GetTextureParameterIuiv driDispatchRemapTable[GetTextureParameterIuiv_remap_index]
+#define _gloffset_GetTextureParameterfv driDispatchRemapTable[GetTextureParameterfv_remap_index]
+#define _gloffset_GetTextureParameteriv driDispatchRemapTable[GetTextureParameteriv_remap_index]
+#define _gloffset_GetTransformFeedbacki64_v driDispatchRemapTable[GetTransformFeedbacki64_v_remap_index]
+#define _gloffset_GetTransformFeedbacki_v driDispatchRemapTable[GetTransformFeedbacki_v_remap_index]
+#define _gloffset_GetTransformFeedbackiv driDispatchRemapTable[GetTransformFeedbackiv_remap_index]
+#define _gloffset_GetVertexArrayIndexed64iv driDispatchRemapTable[GetVertexArrayIndexed64iv_remap_index]
+#define _gloffset_GetVertexArrayIndexediv driDispatchRemapTable[GetVertexArrayIndexediv_remap_index]
+#define _gloffset_GetVertexArrayiv driDispatchRemapTable[GetVertexArrayiv_remap_index]
+#define _gloffset_InvalidateNamedFramebufferData driDispatchRemapTable[InvalidateNamedFramebufferData_remap_index]
+#define _gloffset_InvalidateNamedFramebufferSubData driDispatchRemapTable[InvalidateNamedFramebufferSubData_remap_index]
+#define _gloffset_MapNamedBuffer driDispatchRemapTable[MapNamedBuffer_remap_index]
+#define _gloffset_MapNamedBufferRange driDispatchRemapTable[MapNamedBufferRange_remap_index]
+#define _gloffset_NamedBufferData driDispatchRemapTable[NamedBufferData_remap_index]
+#define _gloffset_NamedBufferStorage driDispatchRemapTable[NamedBufferStorage_remap_index]
+#define _gloffset_NamedBufferSubData driDispatchRemapTable[NamedBufferSubData_remap_index]
+#define _gloffset_NamedFramebufferDrawBuffer driDispatchRemapTable[NamedFramebufferDrawBuffer_remap_index]
+#define _gloffset_NamedFramebufferDrawBuffers driDispatchRemapTable[NamedFramebufferDrawBuffers_remap_index]
+#define _gloffset_NamedFramebufferParameteri driDispatchRemapTable[NamedFramebufferParameteri_remap_index]
+#define _gloffset_NamedFramebufferReadBuffer driDispatchRemapTable[NamedFramebufferReadBuffer_remap_index]
+#define _gloffset_NamedFramebufferRenderbuffer driDispatchRemapTable[NamedFramebufferRenderbuffer_remap_index]
+#define _gloffset_NamedFramebufferTexture driDispatchRemapTable[NamedFramebufferTexture_remap_index]
+#define _gloffset_NamedFramebufferTextureLayer driDispatchRemapTable[NamedFramebufferTextureLayer_remap_index]
+#define _gloffset_NamedRenderbufferStorage driDispatchRemapTable[NamedRenderbufferStorage_remap_index]
+#define _gloffset_NamedRenderbufferStorageMultisample driDispatchRemapTable[NamedRenderbufferStorageMultisample_remap_index]
+#define _gloffset_TextureBuffer driDispatchRemapTable[TextureBuffer_remap_index]
+#define _gloffset_TextureBufferRange driDispatchRemapTable[TextureBufferRange_remap_index]
+#define _gloffset_TextureParameterIiv driDispatchRemapTable[TextureParameterIiv_remap_index]
+#define _gloffset_TextureParameterIuiv driDispatchRemapTable[TextureParameterIuiv_remap_index]
+#define _gloffset_TextureParameterf driDispatchRemapTable[TextureParameterf_remap_index]
+#define _gloffset_TextureParameterfv driDispatchRemapTable[TextureParameterfv_remap_index]
+#define _gloffset_TextureParameteri driDispatchRemapTable[TextureParameteri_remap_index]
+#define _gloffset_TextureParameteriv driDispatchRemapTable[TextureParameteriv_remap_index]
+#define _gloffset_TextureStorage1D driDispatchRemapTable[TextureStorage1D_remap_index]
+#define _gloffset_TextureStorage2D driDispatchRemapTable[TextureStorage2D_remap_index]
+#define _gloffset_TextureStorage2DMultisample driDispatchRemapTable[TextureStorage2DMultisample_remap_index]
+#define _gloffset_TextureStorage3D driDispatchRemapTable[TextureStorage3D_remap_index]
+#define _gloffset_TextureStorage3DMultisample driDispatchRemapTable[TextureStorage3DMultisample_remap_index]
+#define _gloffset_TextureSubImage1D driDispatchRemapTable[TextureSubImage1D_remap_index]
+#define _gloffset_TextureSubImage2D driDispatchRemapTable[TextureSubImage2D_remap_index]
+#define _gloffset_TextureSubImage3D driDispatchRemapTable[TextureSubImage3D_remap_index]
+#define _gloffset_TransformFeedbackBufferBase driDispatchRemapTable[TransformFeedbackBufferBase_remap_index]
+#define _gloffset_TransformFeedbackBufferRange driDispatchRemapTable[TransformFeedbackBufferRange_remap_index]
+#define _gloffset_UnmapNamedBuffer driDispatchRemapTable[UnmapNamedBuffer_remap_index]
+#define _gloffset_VertexArrayAttribBinding driDispatchRemapTable[VertexArrayAttribBinding_remap_index]
+#define _gloffset_VertexArrayAttribFormat driDispatchRemapTable[VertexArrayAttribFormat_remap_index]
+#define _gloffset_VertexArrayAttribIFormat driDispatchRemapTable[VertexArrayAttribIFormat_remap_index]
+#define _gloffset_VertexArrayAttribLFormat driDispatchRemapTable[VertexArrayAttribLFormat_remap_index]
+#define _gloffset_VertexArrayBindingDivisor driDispatchRemapTable[VertexArrayBindingDivisor_remap_index]
+#define _gloffset_VertexArrayElementBuffer driDispatchRemapTable[VertexArrayElementBuffer_remap_index]
+#define _gloffset_VertexArrayVertexBuffer driDispatchRemapTable[VertexArrayVertexBuffer_remap_index]
+#define _gloffset_VertexArrayVertexBuffers driDispatchRemapTable[VertexArrayVertexBuffers_remap_index]
+#define _gloffset_GetCompressedTextureSubImage driDispatchRemapTable[GetCompressedTextureSubImage_remap_index]
+#define _gloffset_GetTextureSubImage driDispatchRemapTable[GetTextureSubImage_remap_index]
+#define _gloffset_BufferPageCommitmentARB driDispatchRemapTable[BufferPageCommitmentARB_remap_index]
+#define _gloffset_NamedBufferPageCommitmentARB driDispatchRemapTable[NamedBufferPageCommitmentARB_remap_index]
+#define _gloffset_GetUniformi64vARB driDispatchRemapTable[GetUniformi64vARB_remap_index]
+#define _gloffset_GetUniformui64vARB driDispatchRemapTable[GetUniformui64vARB_remap_index]
+#define _gloffset_GetnUniformi64vARB driDispatchRemapTable[GetnUniformi64vARB_remap_index]
+#define _gloffset_GetnUniformui64vARB driDispatchRemapTable[GetnUniformui64vARB_remap_index]
+#define _gloffset_ProgramUniform1i64ARB driDispatchRemapTable[ProgramUniform1i64ARB_remap_index]
+#define _gloffset_ProgramUniform1i64vARB driDispatchRemapTable[ProgramUniform1i64vARB_remap_index]
+#define _gloffset_ProgramUniform1ui64ARB driDispatchRemapTable[ProgramUniform1ui64ARB_remap_index]
+#define _gloffset_ProgramUniform1ui64vARB driDispatchRemapTable[ProgramUniform1ui64vARB_remap_index]
+#define _gloffset_ProgramUniform2i64ARB driDispatchRemapTable[ProgramUniform2i64ARB_remap_index]
+#define _gloffset_ProgramUniform2i64vARB driDispatchRemapTable[ProgramUniform2i64vARB_remap_index]
+#define _gloffset_ProgramUniform2ui64ARB driDispatchRemapTable[ProgramUniform2ui64ARB_remap_index]
+#define _gloffset_ProgramUniform2ui64vARB driDispatchRemapTable[ProgramUniform2ui64vARB_remap_index]
+#define _gloffset_ProgramUniform3i64ARB driDispatchRemapTable[ProgramUniform3i64ARB_remap_index]
+#define _gloffset_ProgramUniform3i64vARB driDispatchRemapTable[ProgramUniform3i64vARB_remap_index]
+#define _gloffset_ProgramUniform3ui64ARB driDispatchRemapTable[ProgramUniform3ui64ARB_remap_index]
+#define _gloffset_ProgramUniform3ui64vARB driDispatchRemapTable[ProgramUniform3ui64vARB_remap_index]
+#define _gloffset_ProgramUniform4i64ARB driDispatchRemapTable[ProgramUniform4i64ARB_remap_index]
+#define _gloffset_ProgramUniform4i64vARB driDispatchRemapTable[ProgramUniform4i64vARB_remap_index]
+#define _gloffset_ProgramUniform4ui64ARB driDispatchRemapTable[ProgramUniform4ui64ARB_remap_index]
+#define _gloffset_ProgramUniform4ui64vARB driDispatchRemapTable[ProgramUniform4ui64vARB_remap_index]
+#define _gloffset_Uniform1i64ARB driDispatchRemapTable[Uniform1i64ARB_remap_index]
+#define _gloffset_Uniform1i64vARB driDispatchRemapTable[Uniform1i64vARB_remap_index]
+#define _gloffset_Uniform1ui64ARB driDispatchRemapTable[Uniform1ui64ARB_remap_index]
+#define _gloffset_Uniform1ui64vARB driDispatchRemapTable[Uniform1ui64vARB_remap_index]
+#define _gloffset_Uniform2i64ARB driDispatchRemapTable[Uniform2i64ARB_remap_index]
+#define _gloffset_Uniform2i64vARB driDispatchRemapTable[Uniform2i64vARB_remap_index]
+#define _gloffset_Uniform2ui64ARB driDispatchRemapTable[Uniform2ui64ARB_remap_index]
+#define _gloffset_Uniform2ui64vARB driDispatchRemapTable[Uniform2ui64vARB_remap_index]
+#define _gloffset_Uniform3i64ARB driDispatchRemapTable[Uniform3i64ARB_remap_index]
+#define _gloffset_Uniform3i64vARB driDispatchRemapTable[Uniform3i64vARB_remap_index]
+#define _gloffset_Uniform3ui64ARB driDispatchRemapTable[Uniform3ui64ARB_remap_index]
+#define _gloffset_Uniform3ui64vARB driDispatchRemapTable[Uniform3ui64vARB_remap_index]
+#define _gloffset_Uniform4i64ARB driDispatchRemapTable[Uniform4i64ARB_remap_index]
+#define _gloffset_Uniform4i64vARB driDispatchRemapTable[Uniform4i64vARB_remap_index]
+#define _gloffset_Uniform4ui64ARB driDispatchRemapTable[Uniform4ui64ARB_remap_index]
+#define _gloffset_Uniform4ui64vARB driDispatchRemapTable[Uniform4ui64vARB_remap_index]
+#define _gloffset_SpecializeShaderARB driDispatchRemapTable[SpecializeShaderARB_remap_index]
+#define _gloffset_InvalidateBufferData driDispatchRemapTable[InvalidateBufferData_remap_index]
+#define _gloffset_InvalidateBufferSubData driDispatchRemapTable[InvalidateBufferSubData_remap_index]
+#define _gloffset_InvalidateFramebuffer driDispatchRemapTable[InvalidateFramebuffer_remap_index]
+#define _gloffset_InvalidateSubFramebuffer driDispatchRemapTable[InvalidateSubFramebuffer_remap_index]
+#define _gloffset_InvalidateTexImage driDispatchRemapTable[InvalidateTexImage_remap_index]
+#define _gloffset_InvalidateTexSubImage driDispatchRemapTable[InvalidateTexSubImage_remap_index]
+#define _gloffset_PolygonOffsetEXT driDispatchRemapTable[PolygonOffsetEXT_remap_index]
+#define _gloffset_DrawTexfOES driDispatchRemapTable[DrawTexfOES_remap_index]
+#define _gloffset_DrawTexfvOES driDispatchRemapTable[DrawTexfvOES_remap_index]
+#define _gloffset_DrawTexiOES driDispatchRemapTable[DrawTexiOES_remap_index]
+#define _gloffset_DrawTexivOES driDispatchRemapTable[DrawTexivOES_remap_index]
+#define _gloffset_DrawTexsOES driDispatchRemapTable[DrawTexsOES_remap_index]
+#define _gloffset_DrawTexsvOES driDispatchRemapTable[DrawTexsvOES_remap_index]
+#define _gloffset_DrawTexxOES driDispatchRemapTable[DrawTexxOES_remap_index]
+#define _gloffset_DrawTexxvOES driDispatchRemapTable[DrawTexxvOES_remap_index]
+#define _gloffset_PointSizePointerOES driDispatchRemapTable[PointSizePointerOES_remap_index]
+#define _gloffset_QueryMatrixxOES driDispatchRemapTable[QueryMatrixxOES_remap_index]
+#define _gloffset_SampleMaskSGIS driDispatchRemapTable[SampleMaskSGIS_remap_index]
+#define _gloffset_SamplePatternSGIS driDispatchRemapTable[SamplePatternSGIS_remap_index]
+#define _gloffset_ColorPointerEXT driDispatchRemapTable[ColorPointerEXT_remap_index]
+#define _gloffset_EdgeFlagPointerEXT driDispatchRemapTable[EdgeFlagPointerEXT_remap_index]
+#define _gloffset_IndexPointerEXT driDispatchRemapTable[IndexPointerEXT_remap_index]
+#define _gloffset_NormalPointerEXT driDispatchRemapTable[NormalPointerEXT_remap_index]
+#define _gloffset_TexCoordPointerEXT driDispatchRemapTable[TexCoordPointerEXT_remap_index]
+#define _gloffset_VertexPointerEXT driDispatchRemapTable[VertexPointerEXT_remap_index]
+#define _gloffset_DiscardFramebufferEXT driDispatchRemapTable[DiscardFramebufferEXT_remap_index]
+#define _gloffset_ActiveShaderProgram driDispatchRemapTable[ActiveShaderProgram_remap_index]
+#define _gloffset_BindProgramPipeline driDispatchRemapTable[BindProgramPipeline_remap_index]
+#define _gloffset_CreateShaderProgramv driDispatchRemapTable[CreateShaderProgramv_remap_index]
+#define _gloffset_DeleteProgramPipelines driDispatchRemapTable[DeleteProgramPipelines_remap_index]
+#define _gloffset_GenProgramPipelines driDispatchRemapTable[GenProgramPipelines_remap_index]
+#define _gloffset_GetProgramPipelineInfoLog driDispatchRemapTable[GetProgramPipelineInfoLog_remap_index]
+#define _gloffset_GetProgramPipelineiv driDispatchRemapTable[GetProgramPipelineiv_remap_index]
+#define _gloffset_IsProgramPipeline driDispatchRemapTable[IsProgramPipeline_remap_index]
+#define _gloffset_LockArraysEXT driDispatchRemapTable[LockArraysEXT_remap_index]
+#define _gloffset_ProgramUniform1d driDispatchRemapTable[ProgramUniform1d_remap_index]
+#define _gloffset_ProgramUniform1dv driDispatchRemapTable[ProgramUniform1dv_remap_index]
+#define _gloffset_ProgramUniform1f driDispatchRemapTable[ProgramUniform1f_remap_index]
+#define _gloffset_ProgramUniform1fv driDispatchRemapTable[ProgramUniform1fv_remap_index]
+#define _gloffset_ProgramUniform1i driDispatchRemapTable[ProgramUniform1i_remap_index]
+#define _gloffset_ProgramUniform1iv driDispatchRemapTable[ProgramUniform1iv_remap_index]
+#define _gloffset_ProgramUniform1ui driDispatchRemapTable[ProgramUniform1ui_remap_index]
+#define _gloffset_ProgramUniform1uiv driDispatchRemapTable[ProgramUniform1uiv_remap_index]
+#define _gloffset_ProgramUniform2d driDispatchRemapTable[ProgramUniform2d_remap_index]
+#define _gloffset_ProgramUniform2dv driDispatchRemapTable[ProgramUniform2dv_remap_index]
+#define _gloffset_ProgramUniform2f driDispatchRemapTable[ProgramUniform2f_remap_index]
+#define _gloffset_ProgramUniform2fv driDispatchRemapTable[ProgramUniform2fv_remap_index]
+#define _gloffset_ProgramUniform2i driDispatchRemapTable[ProgramUniform2i_remap_index]
+#define _gloffset_ProgramUniform2iv driDispatchRemapTable[ProgramUniform2iv_remap_index]
+#define _gloffset_ProgramUniform2ui driDispatchRemapTable[ProgramUniform2ui_remap_index]
+#define _gloffset_ProgramUniform2uiv driDispatchRemapTable[ProgramUniform2uiv_remap_index]
+#define _gloffset_ProgramUniform3d driDispatchRemapTable[ProgramUniform3d_remap_index]
+#define _gloffset_ProgramUniform3dv driDispatchRemapTable[ProgramUniform3dv_remap_index]
+#define _gloffset_ProgramUniform3f driDispatchRemapTable[ProgramUniform3f_remap_index]
+#define _gloffset_ProgramUniform3fv driDispatchRemapTable[ProgramUniform3fv_remap_index]
+#define _gloffset_ProgramUniform3i driDispatchRemapTable[ProgramUniform3i_remap_index]
+#define _gloffset_ProgramUniform3iv driDispatchRemapTable[ProgramUniform3iv_remap_index]
+#define _gloffset_ProgramUniform3ui driDispatchRemapTable[ProgramUniform3ui_remap_index]
+#define _gloffset_ProgramUniform3uiv driDispatchRemapTable[ProgramUniform3uiv_remap_index]
+#define _gloffset_ProgramUniform4d driDispatchRemapTable[ProgramUniform4d_remap_index]
+#define _gloffset_ProgramUniform4dv driDispatchRemapTable[ProgramUniform4dv_remap_index]
+#define _gloffset_ProgramUniform4f driDispatchRemapTable[ProgramUniform4f_remap_index]
+#define _gloffset_ProgramUniform4fv driDispatchRemapTable[ProgramUniform4fv_remap_index]
+#define _gloffset_ProgramUniform4i driDispatchRemapTable[ProgramUniform4i_remap_index]
+#define _gloffset_ProgramUniform4iv driDispatchRemapTable[ProgramUniform4iv_remap_index]
+#define _gloffset_ProgramUniform4ui driDispatchRemapTable[ProgramUniform4ui_remap_index]
+#define _gloffset_ProgramUniform4uiv driDispatchRemapTable[ProgramUniform4uiv_remap_index]
+#define _gloffset_ProgramUniformMatrix2dv driDispatchRemapTable[ProgramUniformMatrix2dv_remap_index]
+#define _gloffset_ProgramUniformMatrix2fv driDispatchRemapTable[ProgramUniformMatrix2fv_remap_index]
+#define _gloffset_ProgramUniformMatrix2x3dv driDispatchRemapTable[ProgramUniformMatrix2x3dv_remap_index]
+#define _gloffset_ProgramUniformMatrix2x3fv driDispatchRemapTable[ProgramUniformMatrix2x3fv_remap_index]
+#define _gloffset_ProgramUniformMatrix2x4dv driDispatchRemapTable[ProgramUniformMatrix2x4dv_remap_index]
+#define _gloffset_ProgramUniformMatrix2x4fv driDispatchRemapTable[ProgramUniformMatrix2x4fv_remap_index]
+#define _gloffset_ProgramUniformMatrix3dv driDispatchRemapTable[ProgramUniformMatrix3dv_remap_index]
+#define _gloffset_ProgramUniformMatrix3fv driDispatchRemapTable[ProgramUniformMatrix3fv_remap_index]
+#define _gloffset_ProgramUniformMatrix3x2dv driDispatchRemapTable[ProgramUniformMatrix3x2dv_remap_index]
+#define _gloffset_ProgramUniformMatrix3x2fv driDispatchRemapTable[ProgramUniformMatrix3x2fv_remap_index]
+#define _gloffset_ProgramUniformMatrix3x4dv driDispatchRemapTable[ProgramUniformMatrix3x4dv_remap_index]
+#define _gloffset_ProgramUniformMatrix3x4fv driDispatchRemapTable[ProgramUniformMatrix3x4fv_remap_index]
+#define _gloffset_ProgramUniformMatrix4dv driDispatchRemapTable[ProgramUniformMatrix4dv_remap_index]
+#define _gloffset_ProgramUniformMatrix4fv driDispatchRemapTable[ProgramUniformMatrix4fv_remap_index]
+#define _gloffset_ProgramUniformMatrix4x2dv driDispatchRemapTable[ProgramUniformMatrix4x2dv_remap_index]
+#define _gloffset_ProgramUniformMatrix4x2fv driDispatchRemapTable[ProgramUniformMatrix4x2fv_remap_index]
+#define _gloffset_ProgramUniformMatrix4x3dv driDispatchRemapTable[ProgramUniformMatrix4x3dv_remap_index]
+#define _gloffset_ProgramUniformMatrix4x3fv driDispatchRemapTable[ProgramUniformMatrix4x3fv_remap_index]
+#define _gloffset_UnlockArraysEXT driDispatchRemapTable[UnlockArraysEXT_remap_index]
+#define _gloffset_UseProgramStages driDispatchRemapTable[UseProgramStages_remap_index]
+#define _gloffset_ValidateProgramPipeline driDispatchRemapTable[ValidateProgramPipeline_remap_index]
+#define _gloffset_DebugMessageCallback driDispatchRemapTable[DebugMessageCallback_remap_index]
+#define _gloffset_DebugMessageControl driDispatchRemapTable[DebugMessageControl_remap_index]
+#define _gloffset_DebugMessageInsert driDispatchRemapTable[DebugMessageInsert_remap_index]
+#define _gloffset_GetDebugMessageLog driDispatchRemapTable[GetDebugMessageLog_remap_index]
+#define _gloffset_GetObjectLabel driDispatchRemapTable[GetObjectLabel_remap_index]
+#define _gloffset_GetObjectPtrLabel driDispatchRemapTable[GetObjectPtrLabel_remap_index]
+#define _gloffset_ObjectLabel driDispatchRemapTable[ObjectLabel_remap_index]
+#define _gloffset_ObjectPtrLabel driDispatchRemapTable[ObjectPtrLabel_remap_index]
+#define _gloffset_PopDebugGroup driDispatchRemapTable[PopDebugGroup_remap_index]
+#define _gloffset_PushDebugGroup driDispatchRemapTable[PushDebugGroup_remap_index]
+#define _gloffset_SecondaryColor3fEXT driDispatchRemapTable[SecondaryColor3fEXT_remap_index]
+#define _gloffset_SecondaryColor3fvEXT driDispatchRemapTable[SecondaryColor3fvEXT_remap_index]
+#define _gloffset_MultiDrawElementsEXT driDispatchRemapTable[MultiDrawElementsEXT_remap_index]
+#define _gloffset_FogCoordfEXT driDispatchRemapTable[FogCoordfEXT_remap_index]
+#define _gloffset_FogCoordfvEXT driDispatchRemapTable[FogCoordfvEXT_remap_index]
+#define _gloffset_ResizeBuffersMESA driDispatchRemapTable[ResizeBuffersMESA_remap_index]
+#define _gloffset_WindowPos4dMESA driDispatchRemapTable[WindowPos4dMESA_remap_index]
+#define _gloffset_WindowPos4dvMESA driDispatchRemapTable[WindowPos4dvMESA_remap_index]
+#define _gloffset_WindowPos4fMESA driDispatchRemapTable[WindowPos4fMESA_remap_index]
+#define _gloffset_WindowPos4fvMESA driDispatchRemapTable[WindowPos4fvMESA_remap_index]
+#define _gloffset_WindowPos4iMESA driDispatchRemapTable[WindowPos4iMESA_remap_index]
+#define _gloffset_WindowPos4ivMESA driDispatchRemapTable[WindowPos4ivMESA_remap_index]
+#define _gloffset_WindowPos4sMESA driDispatchRemapTable[WindowPos4sMESA_remap_index]
+#define _gloffset_WindowPos4svMESA driDispatchRemapTable[WindowPos4svMESA_remap_index]
+#define _gloffset_MultiModeDrawArraysIBM driDispatchRemapTable[MultiModeDrawArraysIBM_remap_index]
+#define _gloffset_MultiModeDrawElementsIBM driDispatchRemapTable[MultiModeDrawElementsIBM_remap_index]
+#define _gloffset_AreProgramsResidentNV driDispatchRemapTable[AreProgramsResidentNV_remap_index]
+#define _gloffset_ExecuteProgramNV driDispatchRemapTable[ExecuteProgramNV_remap_index]
+#define _gloffset_GetProgramParameterdvNV driDispatchRemapTable[GetProgramParameterdvNV_remap_index]
+#define _gloffset_GetProgramParameterfvNV driDispatchRemapTable[GetProgramParameterfvNV_remap_index]
+#define _gloffset_GetProgramStringNV driDispatchRemapTable[GetProgramStringNV_remap_index]
+#define _gloffset_GetProgramivNV driDispatchRemapTable[GetProgramivNV_remap_index]
+#define _gloffset_GetTrackMatrixivNV driDispatchRemapTable[GetTrackMatrixivNV_remap_index]
+#define _gloffset_GetVertexAttribdvNV driDispatchRemapTable[GetVertexAttribdvNV_remap_index]
+#define _gloffset_GetVertexAttribfvNV driDispatchRemapTable[GetVertexAttribfvNV_remap_index]
+#define _gloffset_GetVertexAttribivNV driDispatchRemapTable[GetVertexAttribivNV_remap_index]
+#define _gloffset_LoadProgramNV driDispatchRemapTable[LoadProgramNV_remap_index]
+#define _gloffset_ProgramParameters4dvNV driDispatchRemapTable[ProgramParameters4dvNV_remap_index]
+#define _gloffset_ProgramParameters4fvNV driDispatchRemapTable[ProgramParameters4fvNV_remap_index]
+#define _gloffset_RequestResidentProgramsNV driDispatchRemapTable[RequestResidentProgramsNV_remap_index]
+#define _gloffset_TrackMatrixNV driDispatchRemapTable[TrackMatrixNV_remap_index]
+#define _gloffset_VertexAttrib1dNV driDispatchRemapTable[VertexAttrib1dNV_remap_index]
+#define _gloffset_VertexAttrib1dvNV driDispatchRemapTable[VertexAttrib1dvNV_remap_index]
+#define _gloffset_VertexAttrib1fNV driDispatchRemapTable[VertexAttrib1fNV_remap_index]
+#define _gloffset_VertexAttrib1fvNV driDispatchRemapTable[VertexAttrib1fvNV_remap_index]
+#define _gloffset_VertexAttrib1sNV driDispatchRemapTable[VertexAttrib1sNV_remap_index]
+#define _gloffset_VertexAttrib1svNV driDispatchRemapTable[VertexAttrib1svNV_remap_index]
+#define _gloffset_VertexAttrib2dNV driDispatchRemapTable[VertexAttrib2dNV_remap_index]
+#define _gloffset_VertexAttrib2dvNV driDispatchRemapTable[VertexAttrib2dvNV_remap_index]
+#define _gloffset_VertexAttrib2fNV driDispatchRemapTable[VertexAttrib2fNV_remap_index]
+#define _gloffset_VertexAttrib2fvNV driDispatchRemapTable[VertexAttrib2fvNV_remap_index]
+#define _gloffset_VertexAttrib2sNV driDispatchRemapTable[VertexAttrib2sNV_remap_index]
+#define _gloffset_VertexAttrib2svNV driDispatchRemapTable[VertexAttrib2svNV_remap_index]
+#define _gloffset_VertexAttrib3dNV driDispatchRemapTable[VertexAttrib3dNV_remap_index]
+#define _gloffset_VertexAttrib3dvNV driDispatchRemapTable[VertexAttrib3dvNV_remap_index]
+#define _gloffset_VertexAttrib3fNV driDispatchRemapTable[VertexAttrib3fNV_remap_index]
+#define _gloffset_VertexAttrib3fvNV driDispatchRemapTable[VertexAttrib3fvNV_remap_index]
+#define _gloffset_VertexAttrib3sNV driDispatchRemapTable[VertexAttrib3sNV_remap_index]
+#define _gloffset_VertexAttrib3svNV driDispatchRemapTable[VertexAttrib3svNV_remap_index]
+#define _gloffset_VertexAttrib4dNV driDispatchRemapTable[VertexAttrib4dNV_remap_index]
+#define _gloffset_VertexAttrib4dvNV driDispatchRemapTable[VertexAttrib4dvNV_remap_index]
+#define _gloffset_VertexAttrib4fNV driDispatchRemapTable[VertexAttrib4fNV_remap_index]
+#define _gloffset_VertexAttrib4fvNV driDispatchRemapTable[VertexAttrib4fvNV_remap_index]
+#define _gloffset_VertexAttrib4sNV driDispatchRemapTable[VertexAttrib4sNV_remap_index]
+#define _gloffset_VertexAttrib4svNV driDispatchRemapTable[VertexAttrib4svNV_remap_index]
+#define _gloffset_VertexAttrib4ubNV driDispatchRemapTable[VertexAttrib4ubNV_remap_index]
+#define _gloffset_VertexAttrib4ubvNV driDispatchRemapTable[VertexAttrib4ubvNV_remap_index]
+#define _gloffset_VertexAttribPointerNV driDispatchRemapTable[VertexAttribPointerNV_remap_index]
+#define _gloffset_VertexAttribs1dvNV driDispatchRemapTable[VertexAttribs1dvNV_remap_index]
+#define _gloffset_VertexAttribs1fvNV driDispatchRemapTable[VertexAttribs1fvNV_remap_index]
+#define _gloffset_VertexAttribs1svNV driDispatchRemapTable[VertexAttribs1svNV_remap_index]
+#define _gloffset_VertexAttribs2dvNV driDispatchRemapTable[VertexAttribs2dvNV_remap_index]
+#define _gloffset_VertexAttribs2fvNV driDispatchRemapTable[VertexAttribs2fvNV_remap_index]
+#define _gloffset_VertexAttribs2svNV driDispatchRemapTable[VertexAttribs2svNV_remap_index]
+#define _gloffset_VertexAttribs3dvNV driDispatchRemapTable[VertexAttribs3dvNV_remap_index]
+#define _gloffset_VertexAttribs3fvNV driDispatchRemapTable[VertexAttribs3fvNV_remap_index]
+#define _gloffset_VertexAttribs3svNV driDispatchRemapTable[VertexAttribs3svNV_remap_index]
+#define _gloffset_VertexAttribs4dvNV driDispatchRemapTable[VertexAttribs4dvNV_remap_index]
+#define _gloffset_VertexAttribs4fvNV driDispatchRemapTable[VertexAttribs4fvNV_remap_index]
+#define _gloffset_VertexAttribs4svNV driDispatchRemapTable[VertexAttribs4svNV_remap_index]
+#define _gloffset_VertexAttribs4ubvNV driDispatchRemapTable[VertexAttribs4ubvNV_remap_index]
+#define _gloffset_GetTexBumpParameterfvATI driDispatchRemapTable[GetTexBumpParameterfvATI_remap_index]
+#define _gloffset_GetTexBumpParameterivATI driDispatchRemapTable[GetTexBumpParameterivATI_remap_index]
+#define _gloffset_TexBumpParameterfvATI driDispatchRemapTable[TexBumpParameterfvATI_remap_index]
+#define _gloffset_TexBumpParameterivATI driDispatchRemapTable[TexBumpParameterivATI_remap_index]
+#define _gloffset_AlphaFragmentOp1ATI driDispatchRemapTable[AlphaFragmentOp1ATI_remap_index]
+#define _gloffset_AlphaFragmentOp2ATI driDispatchRemapTable[AlphaFragmentOp2ATI_remap_index]
+#define _gloffset_AlphaFragmentOp3ATI driDispatchRemapTable[AlphaFragmentOp3ATI_remap_index]
+#define _gloffset_BeginFragmentShaderATI driDispatchRemapTable[BeginFragmentShaderATI_remap_index]
+#define _gloffset_BindFragmentShaderATI driDispatchRemapTable[BindFragmentShaderATI_remap_index]
+#define _gloffset_ColorFragmentOp1ATI driDispatchRemapTable[ColorFragmentOp1ATI_remap_index]
+#define _gloffset_ColorFragmentOp2ATI driDispatchRemapTable[ColorFragmentOp2ATI_remap_index]
+#define _gloffset_ColorFragmentOp3ATI driDispatchRemapTable[ColorFragmentOp3ATI_remap_index]
+#define _gloffset_DeleteFragmentShaderATI driDispatchRemapTable[DeleteFragmentShaderATI_remap_index]
+#define _gloffset_EndFragmentShaderATI driDispatchRemapTable[EndFragmentShaderATI_remap_index]
+#define _gloffset_GenFragmentShadersATI driDispatchRemapTable[GenFragmentShadersATI_remap_index]
+#define _gloffset_PassTexCoordATI driDispatchRemapTable[PassTexCoordATI_remap_index]
+#define _gloffset_SampleMapATI driDispatchRemapTable[SampleMapATI_remap_index]
+#define _gloffset_SetFragmentShaderConstantATI driDispatchRemapTable[SetFragmentShaderConstantATI_remap_index]
+#define _gloffset_DepthRangeArrayfvOES driDispatchRemapTable[DepthRangeArrayfvOES_remap_index]
+#define _gloffset_DepthRangeIndexedfOES driDispatchRemapTable[DepthRangeIndexedfOES_remap_index]
+#define _gloffset_ActiveStencilFaceEXT driDispatchRemapTable[ActiveStencilFaceEXT_remap_index]
+#define _gloffset_GetProgramNamedParameterdvNV driDispatchRemapTable[GetProgramNamedParameterdvNV_remap_index]
+#define _gloffset_GetProgramNamedParameterfvNV driDispatchRemapTable[GetProgramNamedParameterfvNV_remap_index]
+#define _gloffset_ProgramNamedParameter4dNV driDispatchRemapTable[ProgramNamedParameter4dNV_remap_index]
+#define _gloffset_ProgramNamedParameter4dvNV driDispatchRemapTable[ProgramNamedParameter4dvNV_remap_index]
+#define _gloffset_ProgramNamedParameter4fNV driDispatchRemapTable[ProgramNamedParameter4fNV_remap_index]
+#define _gloffset_ProgramNamedParameter4fvNV driDispatchRemapTable[ProgramNamedParameter4fvNV_remap_index]
+#define _gloffset_PrimitiveRestartNV driDispatchRemapTable[PrimitiveRestartNV_remap_index]
+#define _gloffset_GetTexGenxvOES driDispatchRemapTable[GetTexGenxvOES_remap_index]
+#define _gloffset_TexGenxOES driDispatchRemapTable[TexGenxOES_remap_index]
+#define _gloffset_TexGenxvOES driDispatchRemapTable[TexGenxvOES_remap_index]
+#define _gloffset_DepthBoundsEXT driDispatchRemapTable[DepthBoundsEXT_remap_index]
+#define _gloffset_BindFramebufferEXT driDispatchRemapTable[BindFramebufferEXT_remap_index]
+#define _gloffset_BindRenderbufferEXT driDispatchRemapTable[BindRenderbufferEXT_remap_index]
+#define _gloffset_StringMarkerGREMEDY driDispatchRemapTable[StringMarkerGREMEDY_remap_index]
+#define _gloffset_BufferParameteriAPPLE driDispatchRemapTable[BufferParameteriAPPLE_remap_index]
+#define _gloffset_FlushMappedBufferRangeAPPLE driDispatchRemapTable[FlushMappedBufferRangeAPPLE_remap_index]
+#define _gloffset_VertexAttribI1iEXT driDispatchRemapTable[VertexAttribI1iEXT_remap_index]
+#define _gloffset_VertexAttribI1uiEXT driDispatchRemapTable[VertexAttribI1uiEXT_remap_index]
+#define _gloffset_VertexAttribI2iEXT driDispatchRemapTable[VertexAttribI2iEXT_remap_index]
+#define _gloffset_VertexAttribI2ivEXT driDispatchRemapTable[VertexAttribI2ivEXT_remap_index]
+#define _gloffset_VertexAttribI2uiEXT driDispatchRemapTable[VertexAttribI2uiEXT_remap_index]
+#define _gloffset_VertexAttribI2uivEXT driDispatchRemapTable[VertexAttribI2uivEXT_remap_index]
+#define _gloffset_VertexAttribI3iEXT driDispatchRemapTable[VertexAttribI3iEXT_remap_index]
+#define _gloffset_VertexAttribI3ivEXT driDispatchRemapTable[VertexAttribI3ivEXT_remap_index]
+#define _gloffset_VertexAttribI3uiEXT driDispatchRemapTable[VertexAttribI3uiEXT_remap_index]
+#define _gloffset_VertexAttribI3uivEXT driDispatchRemapTable[VertexAttribI3uivEXT_remap_index]
+#define _gloffset_VertexAttribI4iEXT driDispatchRemapTable[VertexAttribI4iEXT_remap_index]
+#define _gloffset_VertexAttribI4ivEXT driDispatchRemapTable[VertexAttribI4ivEXT_remap_index]
+#define _gloffset_VertexAttribI4uiEXT driDispatchRemapTable[VertexAttribI4uiEXT_remap_index]
+#define _gloffset_VertexAttribI4uivEXT driDispatchRemapTable[VertexAttribI4uivEXT_remap_index]
+#define _gloffset_ClearColorIiEXT driDispatchRemapTable[ClearColorIiEXT_remap_index]
+#define _gloffset_ClearColorIuiEXT driDispatchRemapTable[ClearColorIuiEXT_remap_index]
+#define _gloffset_BindBufferOffsetEXT driDispatchRemapTable[BindBufferOffsetEXT_remap_index]
+#define _gloffset_BeginPerfMonitorAMD driDispatchRemapTable[BeginPerfMonitorAMD_remap_index]
+#define _gloffset_DeletePerfMonitorsAMD driDispatchRemapTable[DeletePerfMonitorsAMD_remap_index]
+#define _gloffset_EndPerfMonitorAMD driDispatchRemapTable[EndPerfMonitorAMD_remap_index]
+#define _gloffset_GenPerfMonitorsAMD driDispatchRemapTable[GenPerfMonitorsAMD_remap_index]
+#define _gloffset_GetPerfMonitorCounterDataAMD driDispatchRemapTable[GetPerfMonitorCounterDataAMD_remap_index]
+#define _gloffset_GetPerfMonitorCounterInfoAMD driDispatchRemapTable[GetPerfMonitorCounterInfoAMD_remap_index]
+#define _gloffset_GetPerfMonitorCounterStringAMD driDispatchRemapTable[GetPerfMonitorCounterStringAMD_remap_index]
+#define _gloffset_GetPerfMonitorCountersAMD driDispatchRemapTable[GetPerfMonitorCountersAMD_remap_index]
+#define _gloffset_GetPerfMonitorGroupStringAMD driDispatchRemapTable[GetPerfMonitorGroupStringAMD_remap_index]
+#define _gloffset_GetPerfMonitorGroupsAMD driDispatchRemapTable[GetPerfMonitorGroupsAMD_remap_index]
+#define _gloffset_SelectPerfMonitorCountersAMD driDispatchRemapTable[SelectPerfMonitorCountersAMD_remap_index]
+#define _gloffset_GetObjectParameterivAPPLE driDispatchRemapTable[GetObjectParameterivAPPLE_remap_index]
+#define _gloffset_ObjectPurgeableAPPLE driDispatchRemapTable[ObjectPurgeableAPPLE_remap_index]
+#define _gloffset_ObjectUnpurgeableAPPLE driDispatchRemapTable[ObjectUnpurgeableAPPLE_remap_index]
+#define _gloffset_ActiveProgramEXT driDispatchRemapTable[ActiveProgramEXT_remap_index]
+#define _gloffset_CreateShaderProgramEXT driDispatchRemapTable[CreateShaderProgramEXT_remap_index]
+#define _gloffset_UseShaderProgramEXT driDispatchRemapTable[UseShaderProgramEXT_remap_index]
+#define _gloffset_TextureBarrierNV driDispatchRemapTable[TextureBarrierNV_remap_index]
+#define _gloffset_VDPAUFiniNV driDispatchRemapTable[VDPAUFiniNV_remap_index]
+#define _gloffset_VDPAUGetSurfaceivNV driDispatchRemapTable[VDPAUGetSurfaceivNV_remap_index]
+#define _gloffset_VDPAUInitNV driDispatchRemapTable[VDPAUInitNV_remap_index]
+#define _gloffset_VDPAUIsSurfaceNV driDispatchRemapTable[VDPAUIsSurfaceNV_remap_index]
+#define _gloffset_VDPAUMapSurfacesNV driDispatchRemapTable[VDPAUMapSurfacesNV_remap_index]
+#define _gloffset_VDPAURegisterOutputSurfaceNV driDispatchRemapTable[VDPAURegisterOutputSurfaceNV_remap_index]
+#define _gloffset_VDPAURegisterVideoSurfaceNV driDispatchRemapTable[VDPAURegisterVideoSurfaceNV_remap_index]
+#define _gloffset_VDPAUSurfaceAccessNV driDispatchRemapTable[VDPAUSurfaceAccessNV_remap_index]
+#define _gloffset_VDPAUUnmapSurfacesNV driDispatchRemapTable[VDPAUUnmapSurfacesNV_remap_index]
+#define _gloffset_VDPAUUnregisterSurfaceNV driDispatchRemapTable[VDPAUUnregisterSurfaceNV_remap_index]
+#define _gloffset_BeginPerfQueryINTEL driDispatchRemapTable[BeginPerfQueryINTEL_remap_index]
+#define _gloffset_CreatePerfQueryINTEL driDispatchRemapTable[CreatePerfQueryINTEL_remap_index]
+#define _gloffset_DeletePerfQueryINTEL driDispatchRemapTable[DeletePerfQueryINTEL_remap_index]
+#define _gloffset_EndPerfQueryINTEL driDispatchRemapTable[EndPerfQueryINTEL_remap_index]
+#define _gloffset_GetFirstPerfQueryIdINTEL driDispatchRemapTable[GetFirstPerfQueryIdINTEL_remap_index]
+#define _gloffset_GetNextPerfQueryIdINTEL driDispatchRemapTable[GetNextPerfQueryIdINTEL_remap_index]
+#define _gloffset_GetPerfCounterInfoINTEL driDispatchRemapTable[GetPerfCounterInfoINTEL_remap_index]
+#define _gloffset_GetPerfQueryDataINTEL driDispatchRemapTable[GetPerfQueryDataINTEL_remap_index]
+#define _gloffset_GetPerfQueryIdByNameINTEL driDispatchRemapTable[GetPerfQueryIdByNameINTEL_remap_index]
+#define _gloffset_GetPerfQueryInfoINTEL driDispatchRemapTable[GetPerfQueryInfoINTEL_remap_index]
+#define _gloffset_PolygonOffsetClampEXT driDispatchRemapTable[PolygonOffsetClampEXT_remap_index]
+#define _gloffset_WindowRectanglesEXT driDispatchRemapTable[WindowRectanglesEXT_remap_index]
+#define _gloffset_BufferStorageMemEXT driDispatchRemapTable[BufferStorageMemEXT_remap_index]
+#define _gloffset_CreateMemoryObjectsEXT driDispatchRemapTable[CreateMemoryObjectsEXT_remap_index]
+#define _gloffset_DeleteMemoryObjectsEXT driDispatchRemapTable[DeleteMemoryObjectsEXT_remap_index]
+#define _gloffset_DeleteSemaphoresEXT driDispatchRemapTable[DeleteSemaphoresEXT_remap_index]
+#define _gloffset_GenSemaphoresEXT driDispatchRemapTable[GenSemaphoresEXT_remap_index]
+#define _gloffset_GetMemoryObjectParameterivEXT driDispatchRemapTable[GetMemoryObjectParameterivEXT_remap_index]
+#define _gloffset_GetSemaphoreParameterui64vEXT driDispatchRemapTable[GetSemaphoreParameterui64vEXT_remap_index]
+#define _gloffset_GetUnsignedBytei_vEXT driDispatchRemapTable[GetUnsignedBytei_vEXT_remap_index]
+#define _gloffset_GetUnsignedBytevEXT driDispatchRemapTable[GetUnsignedBytevEXT_remap_index]
+#define _gloffset_IsMemoryObjectEXT driDispatchRemapTable[IsMemoryObjectEXT_remap_index]
+#define _gloffset_IsSemaphoreEXT driDispatchRemapTable[IsSemaphoreEXT_remap_index]
+#define _gloffset_MemoryObjectParameterivEXT driDispatchRemapTable[MemoryObjectParameterivEXT_remap_index]
+#define _gloffset_NamedBufferStorageMemEXT driDispatchRemapTable[NamedBufferStorageMemEXT_remap_index]
+#define _gloffset_SemaphoreParameterui64vEXT driDispatchRemapTable[SemaphoreParameterui64vEXT_remap_index]
+#define _gloffset_SignalSemaphoreEXT driDispatchRemapTable[SignalSemaphoreEXT_remap_index]
+#define _gloffset_TexStorageMem1DEXT driDispatchRemapTable[TexStorageMem1DEXT_remap_index]
+#define _gloffset_TexStorageMem2DEXT driDispatchRemapTable[TexStorageMem2DEXT_remap_index]
+#define _gloffset_TexStorageMem2DMultisampleEXT driDispatchRemapTable[TexStorageMem2DMultisampleEXT_remap_index]
+#define _gloffset_TexStorageMem3DEXT driDispatchRemapTable[TexStorageMem3DEXT_remap_index]
+#define _gloffset_TexStorageMem3DMultisampleEXT driDispatchRemapTable[TexStorageMem3DMultisampleEXT_remap_index]
+#define _gloffset_TextureStorageMem1DEXT driDispatchRemapTable[TextureStorageMem1DEXT_remap_index]
+#define _gloffset_TextureStorageMem2DEXT driDispatchRemapTable[TextureStorageMem2DEXT_remap_index]
+#define _gloffset_TextureStorageMem2DMultisampleEXT driDispatchRemapTable[TextureStorageMem2DMultisampleEXT_remap_index]
+#define _gloffset_TextureStorageMem3DEXT driDispatchRemapTable[TextureStorageMem3DEXT_remap_index]
+#define _gloffset_TextureStorageMem3DMultisampleEXT driDispatchRemapTable[TextureStorageMem3DMultisampleEXT_remap_index]
+#define _gloffset_WaitSemaphoreEXT driDispatchRemapTable[WaitSemaphoreEXT_remap_index]
+#define _gloffset_ImportMemoryFdEXT driDispatchRemapTable[ImportMemoryFdEXT_remap_index]
+#define _gloffset_ImportSemaphoreFdEXT driDispatchRemapTable[ImportSemaphoreFdEXT_remap_index]
+#define _gloffset_StencilFuncSeparateATI driDispatchRemapTable[StencilFuncSeparateATI_remap_index]
+#define _gloffset_ProgramEnvParameters4fvEXT driDispatchRemapTable[ProgramEnvParameters4fvEXT_remap_index]
+#define _gloffset_ProgramLocalParameters4fvEXT driDispatchRemapTable[ProgramLocalParameters4fvEXT_remap_index]
+#define _gloffset_EGLImageTargetRenderbufferStorageOES driDispatchRemapTable[EGLImageTargetRenderbufferStorageOES_remap_index]
+#define _gloffset_EGLImageTargetTexture2DOES driDispatchRemapTable[EGLImageTargetTexture2DOES_remap_index]
+#define _gloffset_AlphaFuncx driDispatchRemapTable[AlphaFuncx_remap_index]
+#define _gloffset_ClearColorx driDispatchRemapTable[ClearColorx_remap_index]
+#define _gloffset_ClearDepthx driDispatchRemapTable[ClearDepthx_remap_index]
+#define _gloffset_Color4x driDispatchRemapTable[Color4x_remap_index]
+#define _gloffset_DepthRangex driDispatchRemapTable[DepthRangex_remap_index]
+#define _gloffset_Fogx driDispatchRemapTable[Fogx_remap_index]
+#define _gloffset_Fogxv driDispatchRemapTable[Fogxv_remap_index]
+#define _gloffset_Frustumf driDispatchRemapTable[Frustumf_remap_index]
+#define _gloffset_Frustumx driDispatchRemapTable[Frustumx_remap_index]
+#define _gloffset_LightModelx driDispatchRemapTable[LightModelx_remap_index]
+#define _gloffset_LightModelxv driDispatchRemapTable[LightModelxv_remap_index]
+#define _gloffset_Lightx driDispatchRemapTable[Lightx_remap_index]
+#define _gloffset_Lightxv driDispatchRemapTable[Lightxv_remap_index]
+#define _gloffset_LineWidthx driDispatchRemapTable[LineWidthx_remap_index]
+#define _gloffset_LoadMatrixx driDispatchRemapTable[LoadMatrixx_remap_index]
+#define _gloffset_Materialx driDispatchRemapTable[Materialx_remap_index]
+#define _gloffset_Materialxv driDispatchRemapTable[Materialxv_remap_index]
+#define _gloffset_MultMatrixx driDispatchRemapTable[MultMatrixx_remap_index]
+#define _gloffset_MultiTexCoord4x driDispatchRemapTable[MultiTexCoord4x_remap_index]
+#define _gloffset_Normal3x driDispatchRemapTable[Normal3x_remap_index]
+#define _gloffset_Orthof driDispatchRemapTable[Orthof_remap_index]
+#define _gloffset_Orthox driDispatchRemapTable[Orthox_remap_index]
+#define _gloffset_PointSizex driDispatchRemapTable[PointSizex_remap_index]
+#define _gloffset_PolygonOffsetx driDispatchRemapTable[PolygonOffsetx_remap_index]
+#define _gloffset_Rotatex driDispatchRemapTable[Rotatex_remap_index]
+#define _gloffset_SampleCoveragex driDispatchRemapTable[SampleCoveragex_remap_index]
+#define _gloffset_Scalex driDispatchRemapTable[Scalex_remap_index]
+#define _gloffset_TexEnvx driDispatchRemapTable[TexEnvx_remap_index]
+#define _gloffset_TexEnvxv driDispatchRemapTable[TexEnvxv_remap_index]
+#define _gloffset_TexParameterx driDispatchRemapTable[TexParameterx_remap_index]
+#define _gloffset_Translatex driDispatchRemapTable[Translatex_remap_index]
+#define _gloffset_ClipPlanef driDispatchRemapTable[ClipPlanef_remap_index]
+#define _gloffset_ClipPlanex driDispatchRemapTable[ClipPlanex_remap_index]
+#define _gloffset_GetClipPlanef driDispatchRemapTable[GetClipPlanef_remap_index]
+#define _gloffset_GetClipPlanex driDispatchRemapTable[GetClipPlanex_remap_index]
+#define _gloffset_GetFixedv driDispatchRemapTable[GetFixedv_remap_index]
+#define _gloffset_GetLightxv driDispatchRemapTable[GetLightxv_remap_index]
+#define _gloffset_GetMaterialxv driDispatchRemapTable[GetMaterialxv_remap_index]
+#define _gloffset_GetTexEnvxv driDispatchRemapTable[GetTexEnvxv_remap_index]
+#define _gloffset_GetTexParameterxv driDispatchRemapTable[GetTexParameterxv_remap_index]
+#define _gloffset_PointParameterx driDispatchRemapTable[PointParameterx_remap_index]
+#define _gloffset_PointParameterxv driDispatchRemapTable[PointParameterxv_remap_index]
+#define _gloffset_TexParameterxv driDispatchRemapTable[TexParameterxv_remap_index]
+#define _gloffset_BlendBarrier driDispatchRemapTable[BlendBarrier_remap_index]
+#define _gloffset_PrimitiveBoundingBox driDispatchRemapTable[PrimitiveBoundingBox_remap_index]
+
+typedef void (GLAPIENTRYP _glptr_NewList)(GLuint, GLenum);
+#define CALL_NewList(disp, parameters) \
+ (* GET_NewList(disp)) parameters
+static inline _glptr_NewList GET_NewList(struct _glapi_table *disp) {
+ return (_glptr_NewList) (GET_by_offset(disp, _gloffset_NewList));
+}
+
+static inline void SET_NewList(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_NewList, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndList)(void);
+#define CALL_EndList(disp, parameters) \
+ (* GET_EndList(disp)) parameters
+static inline _glptr_EndList GET_EndList(struct _glapi_table *disp) {
+ return (_glptr_EndList) (GET_by_offset(disp, _gloffset_EndList));
+}
+
+static inline void SET_EndList(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_EndList, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CallList)(GLuint);
+#define CALL_CallList(disp, parameters) \
+ (* GET_CallList(disp)) parameters
+static inline _glptr_CallList GET_CallList(struct _glapi_table *disp) {
+ return (_glptr_CallList) (GET_by_offset(disp, _gloffset_CallList));
+}
+
+static inline void SET_CallList(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_CallList, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CallLists)(GLsizei, GLenum, const GLvoid *);
+#define CALL_CallLists(disp, parameters) \
+ (* GET_CallLists(disp)) parameters
+static inline _glptr_CallLists GET_CallLists(struct _glapi_table *disp) {
+ return (_glptr_CallLists) (GET_by_offset(disp, _gloffset_CallLists));
+}
+
+static inline void SET_CallLists(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CallLists, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteLists)(GLuint, GLsizei);
+#define CALL_DeleteLists(disp, parameters) \
+ (* GET_DeleteLists(disp)) parameters
+static inline _glptr_DeleteLists GET_DeleteLists(struct _glapi_table *disp) {
+ return (_glptr_DeleteLists) (GET_by_offset(disp, _gloffset_DeleteLists));
+}
+
+static inline void SET_DeleteLists(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DeleteLists, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GenLists)(GLsizei);
+#define CALL_GenLists(disp, parameters) \
+ (* GET_GenLists(disp)) parameters
+static inline _glptr_GenLists GET_GenLists(struct _glapi_table *disp) {
+ return (_glptr_GenLists) (GET_by_offset(disp, _gloffset_GenLists));
+}
+
+static inline void SET_GenLists(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLsizei)) {
+ SET_by_offset(disp, _gloffset_GenLists, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ListBase)(GLuint);
+#define CALL_ListBase(disp, parameters) \
+ (* GET_ListBase(disp)) parameters
+static inline _glptr_ListBase GET_ListBase(struct _glapi_table *disp) {
+ return (_glptr_ListBase) (GET_by_offset(disp, _gloffset_ListBase));
+}
+
+static inline void SET_ListBase(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_ListBase, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Begin)(GLenum);
+#define CALL_Begin(disp, parameters) \
+ (* GET_Begin(disp)) parameters
+static inline _glptr_Begin GET_Begin(struct _glapi_table *disp) {
+ return (_glptr_Begin) (GET_by_offset(disp, _gloffset_Begin));
+}
+
+static inline void SET_Begin(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_Begin, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Bitmap)(GLsizei, GLsizei, GLfloat, GLfloat, GLfloat, GLfloat, const GLubyte *);
+#define CALL_Bitmap(disp, parameters) \
+ (* GET_Bitmap(disp)) parameters
+static inline _glptr_Bitmap GET_Bitmap(struct _glapi_table *disp) {
+ return (_glptr_Bitmap) (GET_by_offset(disp, _gloffset_Bitmap));
+}
+
+static inline void SET_Bitmap(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLsizei, GLfloat, GLfloat, GLfloat, GLfloat, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_Bitmap, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3b)(GLbyte, GLbyte, GLbyte);
+#define CALL_Color3b(disp, parameters) \
+ (* GET_Color3b(disp)) parameters
+static inline _glptr_Color3b GET_Color3b(struct _glapi_table *disp) {
+ return (_glptr_Color3b) (GET_by_offset(disp, _gloffset_Color3b));
+}
+
+static inline void SET_Color3b(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbyte, GLbyte, GLbyte)) {
+ SET_by_offset(disp, _gloffset_Color3b, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3bv)(const GLbyte *);
+#define CALL_Color3bv(disp, parameters) \
+ (* GET_Color3bv(disp)) parameters
+static inline _glptr_Color3bv GET_Color3bv(struct _glapi_table *disp) {
+ return (_glptr_Color3bv) (GET_by_offset(disp, _gloffset_Color3bv));
+}
+
+static inline void SET_Color3bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_Color3bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_Color3d(disp, parameters) \
+ (* GET_Color3d(disp)) parameters
+static inline _glptr_Color3d GET_Color3d(struct _glapi_table *disp) {
+ return (_glptr_Color3d) (GET_by_offset(disp, _gloffset_Color3d));
+}
+
+static inline void SET_Color3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Color3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3dv)(const GLdouble *);
+#define CALL_Color3dv(disp, parameters) \
+ (* GET_Color3dv(disp)) parameters
+static inline _glptr_Color3dv GET_Color3dv(struct _glapi_table *disp) {
+ return (_glptr_Color3dv) (GET_by_offset(disp, _gloffset_Color3dv));
+}
+
+static inline void SET_Color3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Color3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_Color3f(disp, parameters) \
+ (* GET_Color3f(disp)) parameters
+static inline _glptr_Color3f GET_Color3f(struct _glapi_table *disp) {
+ return (_glptr_Color3f) (GET_by_offset(disp, _gloffset_Color3f));
+}
+
+static inline void SET_Color3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Color3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3fv)(const GLfloat *);
+#define CALL_Color3fv(disp, parameters) \
+ (* GET_Color3fv(disp)) parameters
+static inline _glptr_Color3fv GET_Color3fv(struct _glapi_table *disp) {
+ return (_glptr_Color3fv) (GET_by_offset(disp, _gloffset_Color3fv));
+}
+
+static inline void SET_Color3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Color3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3i)(GLint, GLint, GLint);
+#define CALL_Color3i(disp, parameters) \
+ (* GET_Color3i(disp)) parameters
+static inline _glptr_Color3i GET_Color3i(struct _glapi_table *disp) {
+ return (_glptr_Color3i) (GET_by_offset(disp, _gloffset_Color3i));
+}
+
+static inline void SET_Color3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Color3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3iv)(const GLint *);
+#define CALL_Color3iv(disp, parameters) \
+ (* GET_Color3iv(disp)) parameters
+static inline _glptr_Color3iv GET_Color3iv(struct _glapi_table *disp) {
+ return (_glptr_Color3iv) (GET_by_offset(disp, _gloffset_Color3iv));
+}
+
+static inline void SET_Color3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Color3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3s)(GLshort, GLshort, GLshort);
+#define CALL_Color3s(disp, parameters) \
+ (* GET_Color3s(disp)) parameters
+static inline _glptr_Color3s GET_Color3s(struct _glapi_table *disp) {
+ return (_glptr_Color3s) (GET_by_offset(disp, _gloffset_Color3s));
+}
+
+static inline void SET_Color3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Color3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3sv)(const GLshort *);
+#define CALL_Color3sv(disp, parameters) \
+ (* GET_Color3sv(disp)) parameters
+static inline _glptr_Color3sv GET_Color3sv(struct _glapi_table *disp) {
+ return (_glptr_Color3sv) (GET_by_offset(disp, _gloffset_Color3sv));
+}
+
+static inline void SET_Color3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Color3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3ub)(GLubyte, GLubyte, GLubyte);
+#define CALL_Color3ub(disp, parameters) \
+ (* GET_Color3ub(disp)) parameters
+static inline _glptr_Color3ub GET_Color3ub(struct _glapi_table *disp) {
+ return (_glptr_Color3ub) (GET_by_offset(disp, _gloffset_Color3ub));
+}
+
+static inline void SET_Color3ub(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLubyte, GLubyte, GLubyte)) {
+ SET_by_offset(disp, _gloffset_Color3ub, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3ubv)(const GLubyte *);
+#define CALL_Color3ubv(disp, parameters) \
+ (* GET_Color3ubv(disp)) parameters
+static inline _glptr_Color3ubv GET_Color3ubv(struct _glapi_table *disp) {
+ return (_glptr_Color3ubv) (GET_by_offset(disp, _gloffset_Color3ubv));
+}
+
+static inline void SET_Color3ubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_Color3ubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3ui)(GLuint, GLuint, GLuint);
+#define CALL_Color3ui(disp, parameters) \
+ (* GET_Color3ui(disp)) parameters
+static inline _glptr_Color3ui GET_Color3ui(struct _glapi_table *disp) {
+ return (_glptr_Color3ui) (GET_by_offset(disp, _gloffset_Color3ui));
+}
+
+static inline void SET_Color3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Color3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3uiv)(const GLuint *);
+#define CALL_Color3uiv(disp, parameters) \
+ (* GET_Color3uiv(disp)) parameters
+static inline _glptr_Color3uiv GET_Color3uiv(struct _glapi_table *disp) {
+ return (_glptr_Color3uiv) (GET_by_offset(disp, _gloffset_Color3uiv));
+}
+
+static inline void SET_Color3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Color3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3us)(GLushort, GLushort, GLushort);
+#define CALL_Color3us(disp, parameters) \
+ (* GET_Color3us(disp)) parameters
+static inline _glptr_Color3us GET_Color3us(struct _glapi_table *disp) {
+ return (_glptr_Color3us) (GET_by_offset(disp, _gloffset_Color3us));
+}
+
+static inline void SET_Color3us(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLushort, GLushort, GLushort)) {
+ SET_by_offset(disp, _gloffset_Color3us, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color3usv)(const GLushort *);
+#define CALL_Color3usv(disp, parameters) \
+ (* GET_Color3usv(disp)) parameters
+static inline _glptr_Color3usv GET_Color3usv(struct _glapi_table *disp) {
+ return (_glptr_Color3usv) (GET_by_offset(disp, _gloffset_Color3usv));
+}
+
+static inline void SET_Color3usv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLushort *)) {
+ SET_by_offset(disp, _gloffset_Color3usv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4b)(GLbyte, GLbyte, GLbyte, GLbyte);
+#define CALL_Color4b(disp, parameters) \
+ (* GET_Color4b(disp)) parameters
+static inline _glptr_Color4b GET_Color4b(struct _glapi_table *disp) {
+ return (_glptr_Color4b) (GET_by_offset(disp, _gloffset_Color4b));
+}
+
+static inline void SET_Color4b(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbyte, GLbyte, GLbyte, GLbyte)) {
+ SET_by_offset(disp, _gloffset_Color4b, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4bv)(const GLbyte *);
+#define CALL_Color4bv(disp, parameters) \
+ (* GET_Color4bv(disp)) parameters
+static inline _glptr_Color4bv GET_Color4bv(struct _glapi_table *disp) {
+ return (_glptr_Color4bv) (GET_by_offset(disp, _gloffset_Color4bv));
+}
+
+static inline void SET_Color4bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_Color4bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4d)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Color4d(disp, parameters) \
+ (* GET_Color4d(disp)) parameters
+static inline _glptr_Color4d GET_Color4d(struct _glapi_table *disp) {
+ return (_glptr_Color4d) (GET_by_offset(disp, _gloffset_Color4d));
+}
+
+static inline void SET_Color4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Color4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4dv)(const GLdouble *);
+#define CALL_Color4dv(disp, parameters) \
+ (* GET_Color4dv(disp)) parameters
+static inline _glptr_Color4dv GET_Color4dv(struct _glapi_table *disp) {
+ return (_glptr_Color4dv) (GET_by_offset(disp, _gloffset_Color4dv));
+}
+
+static inline void SET_Color4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Color4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4f)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Color4f(disp, parameters) \
+ (* GET_Color4f(disp)) parameters
+static inline _glptr_Color4f GET_Color4f(struct _glapi_table *disp) {
+ return (_glptr_Color4f) (GET_by_offset(disp, _gloffset_Color4f));
+}
+
+static inline void SET_Color4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Color4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4fv)(const GLfloat *);
+#define CALL_Color4fv(disp, parameters) \
+ (* GET_Color4fv(disp)) parameters
+static inline _glptr_Color4fv GET_Color4fv(struct _glapi_table *disp) {
+ return (_glptr_Color4fv) (GET_by_offset(disp, _gloffset_Color4fv));
+}
+
+static inline void SET_Color4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Color4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4i)(GLint, GLint, GLint, GLint);
+#define CALL_Color4i(disp, parameters) \
+ (* GET_Color4i(disp)) parameters
+static inline _glptr_Color4i GET_Color4i(struct _glapi_table *disp) {
+ return (_glptr_Color4i) (GET_by_offset(disp, _gloffset_Color4i));
+}
+
+static inline void SET_Color4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Color4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4iv)(const GLint *);
+#define CALL_Color4iv(disp, parameters) \
+ (* GET_Color4iv(disp)) parameters
+static inline _glptr_Color4iv GET_Color4iv(struct _glapi_table *disp) {
+ return (_glptr_Color4iv) (GET_by_offset(disp, _gloffset_Color4iv));
+}
+
+static inline void SET_Color4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Color4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4s)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_Color4s(disp, parameters) \
+ (* GET_Color4s(disp)) parameters
+static inline _glptr_Color4s GET_Color4s(struct _glapi_table *disp) {
+ return (_glptr_Color4s) (GET_by_offset(disp, _gloffset_Color4s));
+}
+
+static inline void SET_Color4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Color4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4sv)(const GLshort *);
+#define CALL_Color4sv(disp, parameters) \
+ (* GET_Color4sv(disp)) parameters
+static inline _glptr_Color4sv GET_Color4sv(struct _glapi_table *disp) {
+ return (_glptr_Color4sv) (GET_by_offset(disp, _gloffset_Color4sv));
+}
+
+static inline void SET_Color4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Color4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4ub)(GLubyte, GLubyte, GLubyte, GLubyte);
+#define CALL_Color4ub(disp, parameters) \
+ (* GET_Color4ub(disp)) parameters
+static inline _glptr_Color4ub GET_Color4ub(struct _glapi_table *disp) {
+ return (_glptr_Color4ub) (GET_by_offset(disp, _gloffset_Color4ub));
+}
+
+static inline void SET_Color4ub(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLubyte, GLubyte, GLubyte, GLubyte)) {
+ SET_by_offset(disp, _gloffset_Color4ub, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4ubv)(const GLubyte *);
+#define CALL_Color4ubv(disp, parameters) \
+ (* GET_Color4ubv(disp)) parameters
+static inline _glptr_Color4ubv GET_Color4ubv(struct _glapi_table *disp) {
+ return (_glptr_Color4ubv) (GET_by_offset(disp, _gloffset_Color4ubv));
+}
+
+static inline void SET_Color4ubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_Color4ubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4ui)(GLuint, GLuint, GLuint, GLuint);
+#define CALL_Color4ui(disp, parameters) \
+ (* GET_Color4ui(disp)) parameters
+static inline _glptr_Color4ui GET_Color4ui(struct _glapi_table *disp) {
+ return (_glptr_Color4ui) (GET_by_offset(disp, _gloffset_Color4ui));
+}
+
+static inline void SET_Color4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Color4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4uiv)(const GLuint *);
+#define CALL_Color4uiv(disp, parameters) \
+ (* GET_Color4uiv(disp)) parameters
+static inline _glptr_Color4uiv GET_Color4uiv(struct _glapi_table *disp) {
+ return (_glptr_Color4uiv) (GET_by_offset(disp, _gloffset_Color4uiv));
+}
+
+static inline void SET_Color4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Color4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4us)(GLushort, GLushort, GLushort, GLushort);
+#define CALL_Color4us(disp, parameters) \
+ (* GET_Color4us(disp)) parameters
+static inline _glptr_Color4us GET_Color4us(struct _glapi_table *disp) {
+ return (_glptr_Color4us) (GET_by_offset(disp, _gloffset_Color4us));
+}
+
+static inline void SET_Color4us(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLushort, GLushort, GLushort, GLushort)) {
+ SET_by_offset(disp, _gloffset_Color4us, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4usv)(const GLushort *);
+#define CALL_Color4usv(disp, parameters) \
+ (* GET_Color4usv(disp)) parameters
+static inline _glptr_Color4usv GET_Color4usv(struct _glapi_table *disp) {
+ return (_glptr_Color4usv) (GET_by_offset(disp, _gloffset_Color4usv));
+}
+
+static inline void SET_Color4usv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLushort *)) {
+ SET_by_offset(disp, _gloffset_Color4usv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EdgeFlag)(GLboolean);
+#define CALL_EdgeFlag(disp, parameters) \
+ (* GET_EdgeFlag(disp)) parameters
+static inline _glptr_EdgeFlag GET_EdgeFlag(struct _glapi_table *disp) {
+ return (_glptr_EdgeFlag) (GET_by_offset(disp, _gloffset_EdgeFlag));
+}
+
+static inline void SET_EdgeFlag(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLboolean)) {
+ SET_by_offset(disp, _gloffset_EdgeFlag, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EdgeFlagv)(const GLboolean *);
+#define CALL_EdgeFlagv(disp, parameters) \
+ (* GET_EdgeFlagv(disp)) parameters
+static inline _glptr_EdgeFlagv GET_EdgeFlagv(struct _glapi_table *disp) {
+ return (_glptr_EdgeFlagv) (GET_by_offset(disp, _gloffset_EdgeFlagv));
+}
+
+static inline void SET_EdgeFlagv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLboolean *)) {
+ SET_by_offset(disp, _gloffset_EdgeFlagv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_End)(void);
+#define CALL_End(disp, parameters) \
+ (* GET_End(disp)) parameters
+static inline _glptr_End GET_End(struct _glapi_table *disp) {
+ return (_glptr_End) (GET_by_offset(disp, _gloffset_End));
+}
+
+static inline void SET_End(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_End, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexd)(GLdouble);
+#define CALL_Indexd(disp, parameters) \
+ (* GET_Indexd(disp)) parameters
+static inline _glptr_Indexd GET_Indexd(struct _glapi_table *disp) {
+ return (_glptr_Indexd) (GET_by_offset(disp, _gloffset_Indexd));
+}
+
+static inline void SET_Indexd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble)) {
+ SET_by_offset(disp, _gloffset_Indexd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexdv)(const GLdouble *);
+#define CALL_Indexdv(disp, parameters) \
+ (* GET_Indexdv(disp)) parameters
+static inline _glptr_Indexdv GET_Indexdv(struct _glapi_table *disp) {
+ return (_glptr_Indexdv) (GET_by_offset(disp, _gloffset_Indexdv));
+}
+
+static inline void SET_Indexdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Indexdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexf)(GLfloat);
+#define CALL_Indexf(disp, parameters) \
+ (* GET_Indexf(disp)) parameters
+static inline _glptr_Indexf GET_Indexf(struct _glapi_table *disp) {
+ return (_glptr_Indexf) (GET_by_offset(disp, _gloffset_Indexf));
+}
+
+static inline void SET_Indexf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_Indexf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexfv)(const GLfloat *);
+#define CALL_Indexfv(disp, parameters) \
+ (* GET_Indexfv(disp)) parameters
+static inline _glptr_Indexfv GET_Indexfv(struct _glapi_table *disp) {
+ return (_glptr_Indexfv) (GET_by_offset(disp, _gloffset_Indexfv));
+}
+
+static inline void SET_Indexfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Indexfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexi)(GLint);
+#define CALL_Indexi(disp, parameters) \
+ (* GET_Indexi(disp)) parameters
+static inline _glptr_Indexi GET_Indexi(struct _glapi_table *disp) {
+ return (_glptr_Indexi) (GET_by_offset(disp, _gloffset_Indexi));
+}
+
+static inline void SET_Indexi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint)) {
+ SET_by_offset(disp, _gloffset_Indexi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexiv)(const GLint *);
+#define CALL_Indexiv(disp, parameters) \
+ (* GET_Indexiv(disp)) parameters
+static inline _glptr_Indexiv GET_Indexiv(struct _glapi_table *disp) {
+ return (_glptr_Indexiv) (GET_by_offset(disp, _gloffset_Indexiv));
+}
+
+static inline void SET_Indexiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Indexiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexs)(GLshort);
+#define CALL_Indexs(disp, parameters) \
+ (* GET_Indexs(disp)) parameters
+static inline _glptr_Indexs GET_Indexs(struct _glapi_table *disp) {
+ return (_glptr_Indexs) (GET_by_offset(disp, _gloffset_Indexs));
+}
+
+static inline void SET_Indexs(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort)) {
+ SET_by_offset(disp, _gloffset_Indexs, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexsv)(const GLshort *);
+#define CALL_Indexsv(disp, parameters) \
+ (* GET_Indexsv(disp)) parameters
+static inline _glptr_Indexsv GET_Indexsv(struct _glapi_table *disp) {
+ return (_glptr_Indexsv) (GET_by_offset(disp, _gloffset_Indexsv));
+}
+
+static inline void SET_Indexsv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Indexsv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3b)(GLbyte, GLbyte, GLbyte);
+#define CALL_Normal3b(disp, parameters) \
+ (* GET_Normal3b(disp)) parameters
+static inline _glptr_Normal3b GET_Normal3b(struct _glapi_table *disp) {
+ return (_glptr_Normal3b) (GET_by_offset(disp, _gloffset_Normal3b));
+}
+
+static inline void SET_Normal3b(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbyte, GLbyte, GLbyte)) {
+ SET_by_offset(disp, _gloffset_Normal3b, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3bv)(const GLbyte *);
+#define CALL_Normal3bv(disp, parameters) \
+ (* GET_Normal3bv(disp)) parameters
+static inline _glptr_Normal3bv GET_Normal3bv(struct _glapi_table *disp) {
+ return (_glptr_Normal3bv) (GET_by_offset(disp, _gloffset_Normal3bv));
+}
+
+static inline void SET_Normal3bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_Normal3bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_Normal3d(disp, parameters) \
+ (* GET_Normal3d(disp)) parameters
+static inline _glptr_Normal3d GET_Normal3d(struct _glapi_table *disp) {
+ return (_glptr_Normal3d) (GET_by_offset(disp, _gloffset_Normal3d));
+}
+
+static inline void SET_Normal3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Normal3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3dv)(const GLdouble *);
+#define CALL_Normal3dv(disp, parameters) \
+ (* GET_Normal3dv(disp)) parameters
+static inline _glptr_Normal3dv GET_Normal3dv(struct _glapi_table *disp) {
+ return (_glptr_Normal3dv) (GET_by_offset(disp, _gloffset_Normal3dv));
+}
+
+static inline void SET_Normal3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Normal3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_Normal3f(disp, parameters) \
+ (* GET_Normal3f(disp)) parameters
+static inline _glptr_Normal3f GET_Normal3f(struct _glapi_table *disp) {
+ return (_glptr_Normal3f) (GET_by_offset(disp, _gloffset_Normal3f));
+}
+
+static inline void SET_Normal3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Normal3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3fv)(const GLfloat *);
+#define CALL_Normal3fv(disp, parameters) \
+ (* GET_Normal3fv(disp)) parameters
+static inline _glptr_Normal3fv GET_Normal3fv(struct _glapi_table *disp) {
+ return (_glptr_Normal3fv) (GET_by_offset(disp, _gloffset_Normal3fv));
+}
+
+static inline void SET_Normal3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Normal3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3i)(GLint, GLint, GLint);
+#define CALL_Normal3i(disp, parameters) \
+ (* GET_Normal3i(disp)) parameters
+static inline _glptr_Normal3i GET_Normal3i(struct _glapi_table *disp) {
+ return (_glptr_Normal3i) (GET_by_offset(disp, _gloffset_Normal3i));
+}
+
+static inline void SET_Normal3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Normal3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3iv)(const GLint *);
+#define CALL_Normal3iv(disp, parameters) \
+ (* GET_Normal3iv(disp)) parameters
+static inline _glptr_Normal3iv GET_Normal3iv(struct _glapi_table *disp) {
+ return (_glptr_Normal3iv) (GET_by_offset(disp, _gloffset_Normal3iv));
+}
+
+static inline void SET_Normal3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Normal3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3s)(GLshort, GLshort, GLshort);
+#define CALL_Normal3s(disp, parameters) \
+ (* GET_Normal3s(disp)) parameters
+static inline _glptr_Normal3s GET_Normal3s(struct _glapi_table *disp) {
+ return (_glptr_Normal3s) (GET_by_offset(disp, _gloffset_Normal3s));
+}
+
+static inline void SET_Normal3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Normal3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3sv)(const GLshort *);
+#define CALL_Normal3sv(disp, parameters) \
+ (* GET_Normal3sv(disp)) parameters
+static inline _glptr_Normal3sv GET_Normal3sv(struct _glapi_table *disp) {
+ return (_glptr_Normal3sv) (GET_by_offset(disp, _gloffset_Normal3sv));
+}
+
+static inline void SET_Normal3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Normal3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2d)(GLdouble, GLdouble);
+#define CALL_RasterPos2d(disp, parameters) \
+ (* GET_RasterPos2d(disp)) parameters
+static inline _glptr_RasterPos2d GET_RasterPos2d(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2d) (GET_by_offset(disp, _gloffset_RasterPos2d));
+}
+
+static inline void SET_RasterPos2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_RasterPos2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2dv)(const GLdouble *);
+#define CALL_RasterPos2dv(disp, parameters) \
+ (* GET_RasterPos2dv(disp)) parameters
+static inline _glptr_RasterPos2dv GET_RasterPos2dv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2dv) (GET_by_offset(disp, _gloffset_RasterPos2dv));
+}
+
+static inline void SET_RasterPos2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_RasterPos2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2f)(GLfloat, GLfloat);
+#define CALL_RasterPos2f(disp, parameters) \
+ (* GET_RasterPos2f(disp)) parameters
+static inline _glptr_RasterPos2f GET_RasterPos2f(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2f) (GET_by_offset(disp, _gloffset_RasterPos2f));
+}
+
+static inline void SET_RasterPos2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_RasterPos2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2fv)(const GLfloat *);
+#define CALL_RasterPos2fv(disp, parameters) \
+ (* GET_RasterPos2fv(disp)) parameters
+static inline _glptr_RasterPos2fv GET_RasterPos2fv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2fv) (GET_by_offset(disp, _gloffset_RasterPos2fv));
+}
+
+static inline void SET_RasterPos2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_RasterPos2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2i)(GLint, GLint);
+#define CALL_RasterPos2i(disp, parameters) \
+ (* GET_RasterPos2i(disp)) parameters
+static inline _glptr_RasterPos2i GET_RasterPos2i(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2i) (GET_by_offset(disp, _gloffset_RasterPos2i));
+}
+
+static inline void SET_RasterPos2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_RasterPos2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2iv)(const GLint *);
+#define CALL_RasterPos2iv(disp, parameters) \
+ (* GET_RasterPos2iv(disp)) parameters
+static inline _glptr_RasterPos2iv GET_RasterPos2iv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2iv) (GET_by_offset(disp, _gloffset_RasterPos2iv));
+}
+
+static inline void SET_RasterPos2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_RasterPos2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2s)(GLshort, GLshort);
+#define CALL_RasterPos2s(disp, parameters) \
+ (* GET_RasterPos2s(disp)) parameters
+static inline _glptr_RasterPos2s GET_RasterPos2s(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2s) (GET_by_offset(disp, _gloffset_RasterPos2s));
+}
+
+static inline void SET_RasterPos2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_RasterPos2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos2sv)(const GLshort *);
+#define CALL_RasterPos2sv(disp, parameters) \
+ (* GET_RasterPos2sv(disp)) parameters
+static inline _glptr_RasterPos2sv GET_RasterPos2sv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos2sv) (GET_by_offset(disp, _gloffset_RasterPos2sv));
+}
+
+static inline void SET_RasterPos2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_RasterPos2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_RasterPos3d(disp, parameters) \
+ (* GET_RasterPos3d(disp)) parameters
+static inline _glptr_RasterPos3d GET_RasterPos3d(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3d) (GET_by_offset(disp, _gloffset_RasterPos3d));
+}
+
+static inline void SET_RasterPos3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_RasterPos3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3dv)(const GLdouble *);
+#define CALL_RasterPos3dv(disp, parameters) \
+ (* GET_RasterPos3dv(disp)) parameters
+static inline _glptr_RasterPos3dv GET_RasterPos3dv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3dv) (GET_by_offset(disp, _gloffset_RasterPos3dv));
+}
+
+static inline void SET_RasterPos3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_RasterPos3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_RasterPos3f(disp, parameters) \
+ (* GET_RasterPos3f(disp)) parameters
+static inline _glptr_RasterPos3f GET_RasterPos3f(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3f) (GET_by_offset(disp, _gloffset_RasterPos3f));
+}
+
+static inline void SET_RasterPos3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_RasterPos3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3fv)(const GLfloat *);
+#define CALL_RasterPos3fv(disp, parameters) \
+ (* GET_RasterPos3fv(disp)) parameters
+static inline _glptr_RasterPos3fv GET_RasterPos3fv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3fv) (GET_by_offset(disp, _gloffset_RasterPos3fv));
+}
+
+static inline void SET_RasterPos3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_RasterPos3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3i)(GLint, GLint, GLint);
+#define CALL_RasterPos3i(disp, parameters) \
+ (* GET_RasterPos3i(disp)) parameters
+static inline _glptr_RasterPos3i GET_RasterPos3i(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3i) (GET_by_offset(disp, _gloffset_RasterPos3i));
+}
+
+static inline void SET_RasterPos3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_RasterPos3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3iv)(const GLint *);
+#define CALL_RasterPos3iv(disp, parameters) \
+ (* GET_RasterPos3iv(disp)) parameters
+static inline _glptr_RasterPos3iv GET_RasterPos3iv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3iv) (GET_by_offset(disp, _gloffset_RasterPos3iv));
+}
+
+static inline void SET_RasterPos3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_RasterPos3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3s)(GLshort, GLshort, GLshort);
+#define CALL_RasterPos3s(disp, parameters) \
+ (* GET_RasterPos3s(disp)) parameters
+static inline _glptr_RasterPos3s GET_RasterPos3s(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3s) (GET_by_offset(disp, _gloffset_RasterPos3s));
+}
+
+static inline void SET_RasterPos3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_RasterPos3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos3sv)(const GLshort *);
+#define CALL_RasterPos3sv(disp, parameters) \
+ (* GET_RasterPos3sv(disp)) parameters
+static inline _glptr_RasterPos3sv GET_RasterPos3sv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos3sv) (GET_by_offset(disp, _gloffset_RasterPos3sv));
+}
+
+static inline void SET_RasterPos3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_RasterPos3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4d)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_RasterPos4d(disp, parameters) \
+ (* GET_RasterPos4d(disp)) parameters
+static inline _glptr_RasterPos4d GET_RasterPos4d(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4d) (GET_by_offset(disp, _gloffset_RasterPos4d));
+}
+
+static inline void SET_RasterPos4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_RasterPos4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4dv)(const GLdouble *);
+#define CALL_RasterPos4dv(disp, parameters) \
+ (* GET_RasterPos4dv(disp)) parameters
+static inline _glptr_RasterPos4dv GET_RasterPos4dv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4dv) (GET_by_offset(disp, _gloffset_RasterPos4dv));
+}
+
+static inline void SET_RasterPos4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_RasterPos4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4f)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_RasterPos4f(disp, parameters) \
+ (* GET_RasterPos4f(disp)) parameters
+static inline _glptr_RasterPos4f GET_RasterPos4f(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4f) (GET_by_offset(disp, _gloffset_RasterPos4f));
+}
+
+static inline void SET_RasterPos4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_RasterPos4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4fv)(const GLfloat *);
+#define CALL_RasterPos4fv(disp, parameters) \
+ (* GET_RasterPos4fv(disp)) parameters
+static inline _glptr_RasterPos4fv GET_RasterPos4fv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4fv) (GET_by_offset(disp, _gloffset_RasterPos4fv));
+}
+
+static inline void SET_RasterPos4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_RasterPos4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4i)(GLint, GLint, GLint, GLint);
+#define CALL_RasterPos4i(disp, parameters) \
+ (* GET_RasterPos4i(disp)) parameters
+static inline _glptr_RasterPos4i GET_RasterPos4i(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4i) (GET_by_offset(disp, _gloffset_RasterPos4i));
+}
+
+static inline void SET_RasterPos4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_RasterPos4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4iv)(const GLint *);
+#define CALL_RasterPos4iv(disp, parameters) \
+ (* GET_RasterPos4iv(disp)) parameters
+static inline _glptr_RasterPos4iv GET_RasterPos4iv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4iv) (GET_by_offset(disp, _gloffset_RasterPos4iv));
+}
+
+static inline void SET_RasterPos4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_RasterPos4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4s)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_RasterPos4s(disp, parameters) \
+ (* GET_RasterPos4s(disp)) parameters
+static inline _glptr_RasterPos4s GET_RasterPos4s(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4s) (GET_by_offset(disp, _gloffset_RasterPos4s));
+}
+
+static inline void SET_RasterPos4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_RasterPos4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RasterPos4sv)(const GLshort *);
+#define CALL_RasterPos4sv(disp, parameters) \
+ (* GET_RasterPos4sv(disp)) parameters
+static inline _glptr_RasterPos4sv GET_RasterPos4sv(struct _glapi_table *disp) {
+ return (_glptr_RasterPos4sv) (GET_by_offset(disp, _gloffset_RasterPos4sv));
+}
+
+static inline void SET_RasterPos4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_RasterPos4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectd)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Rectd(disp, parameters) \
+ (* GET_Rectd(disp)) parameters
+static inline _glptr_Rectd GET_Rectd(struct _glapi_table *disp) {
+ return (_glptr_Rectd) (GET_by_offset(disp, _gloffset_Rectd));
+}
+
+static inline void SET_Rectd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Rectd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectdv)(const GLdouble *, const GLdouble *);
+#define CALL_Rectdv(disp, parameters) \
+ (* GET_Rectdv(disp)) parameters
+static inline _glptr_Rectdv GET_Rectdv(struct _glapi_table *disp) {
+ return (_glptr_Rectdv) (GET_by_offset(disp, _gloffset_Rectdv));
+}
+
+static inline void SET_Rectdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Rectdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectf)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Rectf(disp, parameters) \
+ (* GET_Rectf(disp)) parameters
+static inline _glptr_Rectf GET_Rectf(struct _glapi_table *disp) {
+ return (_glptr_Rectf) (GET_by_offset(disp, _gloffset_Rectf));
+}
+
+static inline void SET_Rectf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Rectf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectfv)(const GLfloat *, const GLfloat *);
+#define CALL_Rectfv(disp, parameters) \
+ (* GET_Rectfv(disp)) parameters
+static inline _glptr_Rectfv GET_Rectfv(struct _glapi_table *disp) {
+ return (_glptr_Rectfv) (GET_by_offset(disp, _gloffset_Rectfv));
+}
+
+static inline void SET_Rectfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Rectfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Recti)(GLint, GLint, GLint, GLint);
+#define CALL_Recti(disp, parameters) \
+ (* GET_Recti(disp)) parameters
+static inline _glptr_Recti GET_Recti(struct _glapi_table *disp) {
+ return (_glptr_Recti) (GET_by_offset(disp, _gloffset_Recti));
+}
+
+static inline void SET_Recti(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Recti, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectiv)(const GLint *, const GLint *);
+#define CALL_Rectiv(disp, parameters) \
+ (* GET_Rectiv(disp)) parameters
+static inline _glptr_Rectiv GET_Rectiv(struct _glapi_table *disp) {
+ return (_glptr_Rectiv) (GET_by_offset(disp, _gloffset_Rectiv));
+}
+
+static inline void SET_Rectiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Rectiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rects)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_Rects(disp, parameters) \
+ (* GET_Rects(disp)) parameters
+static inline _glptr_Rects GET_Rects(struct _glapi_table *disp) {
+ return (_glptr_Rects) (GET_by_offset(disp, _gloffset_Rects));
+}
+
+static inline void SET_Rects(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Rects, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rectsv)(const GLshort *, const GLshort *);
+#define CALL_Rectsv(disp, parameters) \
+ (* GET_Rectsv(disp)) parameters
+static inline _glptr_Rectsv GET_Rectsv(struct _glapi_table *disp) {
+ return (_glptr_Rectsv) (GET_by_offset(disp, _gloffset_Rectsv));
+}
+
+static inline void SET_Rectsv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Rectsv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1d)(GLdouble);
+#define CALL_TexCoord1d(disp, parameters) \
+ (* GET_TexCoord1d(disp)) parameters
+static inline _glptr_TexCoord1d GET_TexCoord1d(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1d) (GET_by_offset(disp, _gloffset_TexCoord1d));
+}
+
+static inline void SET_TexCoord1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble)) {
+ SET_by_offset(disp, _gloffset_TexCoord1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1dv)(const GLdouble *);
+#define CALL_TexCoord1dv(disp, parameters) \
+ (* GET_TexCoord1dv(disp)) parameters
+static inline _glptr_TexCoord1dv GET_TexCoord1dv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1dv) (GET_by_offset(disp, _gloffset_TexCoord1dv));
+}
+
+static inline void SET_TexCoord1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_TexCoord1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1f)(GLfloat);
+#define CALL_TexCoord1f(disp, parameters) \
+ (* GET_TexCoord1f(disp)) parameters
+static inline _glptr_TexCoord1f GET_TexCoord1f(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1f) (GET_by_offset(disp, _gloffset_TexCoord1f));
+}
+
+static inline void SET_TexCoord1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexCoord1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1fv)(const GLfloat *);
+#define CALL_TexCoord1fv(disp, parameters) \
+ (* GET_TexCoord1fv(disp)) parameters
+static inline _glptr_TexCoord1fv GET_TexCoord1fv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1fv) (GET_by_offset(disp, _gloffset_TexCoord1fv));
+}
+
+static inline void SET_TexCoord1fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexCoord1fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1i)(GLint);
+#define CALL_TexCoord1i(disp, parameters) \
+ (* GET_TexCoord1i(disp)) parameters
+static inline _glptr_TexCoord1i GET_TexCoord1i(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1i) (GET_by_offset(disp, _gloffset_TexCoord1i));
+}
+
+static inline void SET_TexCoord1i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint)) {
+ SET_by_offset(disp, _gloffset_TexCoord1i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1iv)(const GLint *);
+#define CALL_TexCoord1iv(disp, parameters) \
+ (* GET_TexCoord1iv(disp)) parameters
+static inline _glptr_TexCoord1iv GET_TexCoord1iv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1iv) (GET_by_offset(disp, _gloffset_TexCoord1iv));
+}
+
+static inline void SET_TexCoord1iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexCoord1iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1s)(GLshort);
+#define CALL_TexCoord1s(disp, parameters) \
+ (* GET_TexCoord1s(disp)) parameters
+static inline _glptr_TexCoord1s GET_TexCoord1s(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1s) (GET_by_offset(disp, _gloffset_TexCoord1s));
+}
+
+static inline void SET_TexCoord1s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort)) {
+ SET_by_offset(disp, _gloffset_TexCoord1s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord1sv)(const GLshort *);
+#define CALL_TexCoord1sv(disp, parameters) \
+ (* GET_TexCoord1sv(disp)) parameters
+static inline _glptr_TexCoord1sv GET_TexCoord1sv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord1sv) (GET_by_offset(disp, _gloffset_TexCoord1sv));
+}
+
+static inline void SET_TexCoord1sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_TexCoord1sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2d)(GLdouble, GLdouble);
+#define CALL_TexCoord2d(disp, parameters) \
+ (* GET_TexCoord2d(disp)) parameters
+static inline _glptr_TexCoord2d GET_TexCoord2d(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2d) (GET_by_offset(disp, _gloffset_TexCoord2d));
+}
+
+static inline void SET_TexCoord2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_TexCoord2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2dv)(const GLdouble *);
+#define CALL_TexCoord2dv(disp, parameters) \
+ (* GET_TexCoord2dv(disp)) parameters
+static inline _glptr_TexCoord2dv GET_TexCoord2dv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2dv) (GET_by_offset(disp, _gloffset_TexCoord2dv));
+}
+
+static inline void SET_TexCoord2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_TexCoord2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2f)(GLfloat, GLfloat);
+#define CALL_TexCoord2f(disp, parameters) \
+ (* GET_TexCoord2f(disp)) parameters
+static inline _glptr_TexCoord2f GET_TexCoord2f(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2f) (GET_by_offset(disp, _gloffset_TexCoord2f));
+}
+
+static inline void SET_TexCoord2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexCoord2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2fv)(const GLfloat *);
+#define CALL_TexCoord2fv(disp, parameters) \
+ (* GET_TexCoord2fv(disp)) parameters
+static inline _glptr_TexCoord2fv GET_TexCoord2fv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2fv) (GET_by_offset(disp, _gloffset_TexCoord2fv));
+}
+
+static inline void SET_TexCoord2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexCoord2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2i)(GLint, GLint);
+#define CALL_TexCoord2i(disp, parameters) \
+ (* GET_TexCoord2i(disp)) parameters
+static inline _glptr_TexCoord2i GET_TexCoord2i(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2i) (GET_by_offset(disp, _gloffset_TexCoord2i));
+}
+
+static inline void SET_TexCoord2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_TexCoord2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2iv)(const GLint *);
+#define CALL_TexCoord2iv(disp, parameters) \
+ (* GET_TexCoord2iv(disp)) parameters
+static inline _glptr_TexCoord2iv GET_TexCoord2iv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2iv) (GET_by_offset(disp, _gloffset_TexCoord2iv));
+}
+
+static inline void SET_TexCoord2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexCoord2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2s)(GLshort, GLshort);
+#define CALL_TexCoord2s(disp, parameters) \
+ (* GET_TexCoord2s(disp)) parameters
+static inline _glptr_TexCoord2s GET_TexCoord2s(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2s) (GET_by_offset(disp, _gloffset_TexCoord2s));
+}
+
+static inline void SET_TexCoord2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_TexCoord2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord2sv)(const GLshort *);
+#define CALL_TexCoord2sv(disp, parameters) \
+ (* GET_TexCoord2sv(disp)) parameters
+static inline _glptr_TexCoord2sv GET_TexCoord2sv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord2sv) (GET_by_offset(disp, _gloffset_TexCoord2sv));
+}
+
+static inline void SET_TexCoord2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_TexCoord2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_TexCoord3d(disp, parameters) \
+ (* GET_TexCoord3d(disp)) parameters
+static inline _glptr_TexCoord3d GET_TexCoord3d(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3d) (GET_by_offset(disp, _gloffset_TexCoord3d));
+}
+
+static inline void SET_TexCoord3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_TexCoord3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3dv)(const GLdouble *);
+#define CALL_TexCoord3dv(disp, parameters) \
+ (* GET_TexCoord3dv(disp)) parameters
+static inline _glptr_TexCoord3dv GET_TexCoord3dv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3dv) (GET_by_offset(disp, _gloffset_TexCoord3dv));
+}
+
+static inline void SET_TexCoord3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_TexCoord3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_TexCoord3f(disp, parameters) \
+ (* GET_TexCoord3f(disp)) parameters
+static inline _glptr_TexCoord3f GET_TexCoord3f(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3f) (GET_by_offset(disp, _gloffset_TexCoord3f));
+}
+
+static inline void SET_TexCoord3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexCoord3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3fv)(const GLfloat *);
+#define CALL_TexCoord3fv(disp, parameters) \
+ (* GET_TexCoord3fv(disp)) parameters
+static inline _glptr_TexCoord3fv GET_TexCoord3fv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3fv) (GET_by_offset(disp, _gloffset_TexCoord3fv));
+}
+
+static inline void SET_TexCoord3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexCoord3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3i)(GLint, GLint, GLint);
+#define CALL_TexCoord3i(disp, parameters) \
+ (* GET_TexCoord3i(disp)) parameters
+static inline _glptr_TexCoord3i GET_TexCoord3i(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3i) (GET_by_offset(disp, _gloffset_TexCoord3i));
+}
+
+static inline void SET_TexCoord3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_TexCoord3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3iv)(const GLint *);
+#define CALL_TexCoord3iv(disp, parameters) \
+ (* GET_TexCoord3iv(disp)) parameters
+static inline _glptr_TexCoord3iv GET_TexCoord3iv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3iv) (GET_by_offset(disp, _gloffset_TexCoord3iv));
+}
+
+static inline void SET_TexCoord3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexCoord3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3s)(GLshort, GLshort, GLshort);
+#define CALL_TexCoord3s(disp, parameters) \
+ (* GET_TexCoord3s(disp)) parameters
+static inline _glptr_TexCoord3s GET_TexCoord3s(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3s) (GET_by_offset(disp, _gloffset_TexCoord3s));
+}
+
+static inline void SET_TexCoord3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_TexCoord3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord3sv)(const GLshort *);
+#define CALL_TexCoord3sv(disp, parameters) \
+ (* GET_TexCoord3sv(disp)) parameters
+static inline _glptr_TexCoord3sv GET_TexCoord3sv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord3sv) (GET_by_offset(disp, _gloffset_TexCoord3sv));
+}
+
+static inline void SET_TexCoord3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_TexCoord3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4d)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_TexCoord4d(disp, parameters) \
+ (* GET_TexCoord4d(disp)) parameters
+static inline _glptr_TexCoord4d GET_TexCoord4d(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4d) (GET_by_offset(disp, _gloffset_TexCoord4d));
+}
+
+static inline void SET_TexCoord4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_TexCoord4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4dv)(const GLdouble *);
+#define CALL_TexCoord4dv(disp, parameters) \
+ (* GET_TexCoord4dv(disp)) parameters
+static inline _glptr_TexCoord4dv GET_TexCoord4dv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4dv) (GET_by_offset(disp, _gloffset_TexCoord4dv));
+}
+
+static inline void SET_TexCoord4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_TexCoord4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4f)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_TexCoord4f(disp, parameters) \
+ (* GET_TexCoord4f(disp)) parameters
+static inline _glptr_TexCoord4f GET_TexCoord4f(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4f) (GET_by_offset(disp, _gloffset_TexCoord4f));
+}
+
+static inline void SET_TexCoord4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexCoord4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4fv)(const GLfloat *);
+#define CALL_TexCoord4fv(disp, parameters) \
+ (* GET_TexCoord4fv(disp)) parameters
+static inline _glptr_TexCoord4fv GET_TexCoord4fv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4fv) (GET_by_offset(disp, _gloffset_TexCoord4fv));
+}
+
+static inline void SET_TexCoord4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexCoord4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4i)(GLint, GLint, GLint, GLint);
+#define CALL_TexCoord4i(disp, parameters) \
+ (* GET_TexCoord4i(disp)) parameters
+static inline _glptr_TexCoord4i GET_TexCoord4i(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4i) (GET_by_offset(disp, _gloffset_TexCoord4i));
+}
+
+static inline void SET_TexCoord4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_TexCoord4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4iv)(const GLint *);
+#define CALL_TexCoord4iv(disp, parameters) \
+ (* GET_TexCoord4iv(disp)) parameters
+static inline _glptr_TexCoord4iv GET_TexCoord4iv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4iv) (GET_by_offset(disp, _gloffset_TexCoord4iv));
+}
+
+static inline void SET_TexCoord4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexCoord4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4s)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_TexCoord4s(disp, parameters) \
+ (* GET_TexCoord4s(disp)) parameters
+static inline _glptr_TexCoord4s GET_TexCoord4s(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4s) (GET_by_offset(disp, _gloffset_TexCoord4s));
+}
+
+static inline void SET_TexCoord4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_TexCoord4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoord4sv)(const GLshort *);
+#define CALL_TexCoord4sv(disp, parameters) \
+ (* GET_TexCoord4sv(disp)) parameters
+static inline _glptr_TexCoord4sv GET_TexCoord4sv(struct _glapi_table *disp) {
+ return (_glptr_TexCoord4sv) (GET_by_offset(disp, _gloffset_TexCoord4sv));
+}
+
+static inline void SET_TexCoord4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_TexCoord4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2d)(GLdouble, GLdouble);
+#define CALL_Vertex2d(disp, parameters) \
+ (* GET_Vertex2d(disp)) parameters
+static inline _glptr_Vertex2d GET_Vertex2d(struct _glapi_table *disp) {
+ return (_glptr_Vertex2d) (GET_by_offset(disp, _gloffset_Vertex2d));
+}
+
+static inline void SET_Vertex2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Vertex2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2dv)(const GLdouble *);
+#define CALL_Vertex2dv(disp, parameters) \
+ (* GET_Vertex2dv(disp)) parameters
+static inline _glptr_Vertex2dv GET_Vertex2dv(struct _glapi_table *disp) {
+ return (_glptr_Vertex2dv) (GET_by_offset(disp, _gloffset_Vertex2dv));
+}
+
+static inline void SET_Vertex2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Vertex2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2f)(GLfloat, GLfloat);
+#define CALL_Vertex2f(disp, parameters) \
+ (* GET_Vertex2f(disp)) parameters
+static inline _glptr_Vertex2f GET_Vertex2f(struct _glapi_table *disp) {
+ return (_glptr_Vertex2f) (GET_by_offset(disp, _gloffset_Vertex2f));
+}
+
+static inline void SET_Vertex2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Vertex2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2fv)(const GLfloat *);
+#define CALL_Vertex2fv(disp, parameters) \
+ (* GET_Vertex2fv(disp)) parameters
+static inline _glptr_Vertex2fv GET_Vertex2fv(struct _glapi_table *disp) {
+ return (_glptr_Vertex2fv) (GET_by_offset(disp, _gloffset_Vertex2fv));
+}
+
+static inline void SET_Vertex2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Vertex2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2i)(GLint, GLint);
+#define CALL_Vertex2i(disp, parameters) \
+ (* GET_Vertex2i(disp)) parameters
+static inline _glptr_Vertex2i GET_Vertex2i(struct _glapi_table *disp) {
+ return (_glptr_Vertex2i) (GET_by_offset(disp, _gloffset_Vertex2i));
+}
+
+static inline void SET_Vertex2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Vertex2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2iv)(const GLint *);
+#define CALL_Vertex2iv(disp, parameters) \
+ (* GET_Vertex2iv(disp)) parameters
+static inline _glptr_Vertex2iv GET_Vertex2iv(struct _glapi_table *disp) {
+ return (_glptr_Vertex2iv) (GET_by_offset(disp, _gloffset_Vertex2iv));
+}
+
+static inline void SET_Vertex2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Vertex2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2s)(GLshort, GLshort);
+#define CALL_Vertex2s(disp, parameters) \
+ (* GET_Vertex2s(disp)) parameters
+static inline _glptr_Vertex2s GET_Vertex2s(struct _glapi_table *disp) {
+ return (_glptr_Vertex2s) (GET_by_offset(disp, _gloffset_Vertex2s));
+}
+
+static inline void SET_Vertex2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Vertex2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex2sv)(const GLshort *);
+#define CALL_Vertex2sv(disp, parameters) \
+ (* GET_Vertex2sv(disp)) parameters
+static inline _glptr_Vertex2sv GET_Vertex2sv(struct _glapi_table *disp) {
+ return (_glptr_Vertex2sv) (GET_by_offset(disp, _gloffset_Vertex2sv));
+}
+
+static inline void SET_Vertex2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Vertex2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_Vertex3d(disp, parameters) \
+ (* GET_Vertex3d(disp)) parameters
+static inline _glptr_Vertex3d GET_Vertex3d(struct _glapi_table *disp) {
+ return (_glptr_Vertex3d) (GET_by_offset(disp, _gloffset_Vertex3d));
+}
+
+static inline void SET_Vertex3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Vertex3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3dv)(const GLdouble *);
+#define CALL_Vertex3dv(disp, parameters) \
+ (* GET_Vertex3dv(disp)) parameters
+static inline _glptr_Vertex3dv GET_Vertex3dv(struct _glapi_table *disp) {
+ return (_glptr_Vertex3dv) (GET_by_offset(disp, _gloffset_Vertex3dv));
+}
+
+static inline void SET_Vertex3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Vertex3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_Vertex3f(disp, parameters) \
+ (* GET_Vertex3f(disp)) parameters
+static inline _glptr_Vertex3f GET_Vertex3f(struct _glapi_table *disp) {
+ return (_glptr_Vertex3f) (GET_by_offset(disp, _gloffset_Vertex3f));
+}
+
+static inline void SET_Vertex3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Vertex3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3fv)(const GLfloat *);
+#define CALL_Vertex3fv(disp, parameters) \
+ (* GET_Vertex3fv(disp)) parameters
+static inline _glptr_Vertex3fv GET_Vertex3fv(struct _glapi_table *disp) {
+ return (_glptr_Vertex3fv) (GET_by_offset(disp, _gloffset_Vertex3fv));
+}
+
+static inline void SET_Vertex3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Vertex3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3i)(GLint, GLint, GLint);
+#define CALL_Vertex3i(disp, parameters) \
+ (* GET_Vertex3i(disp)) parameters
+static inline _glptr_Vertex3i GET_Vertex3i(struct _glapi_table *disp) {
+ return (_glptr_Vertex3i) (GET_by_offset(disp, _gloffset_Vertex3i));
+}
+
+static inline void SET_Vertex3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Vertex3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3iv)(const GLint *);
+#define CALL_Vertex3iv(disp, parameters) \
+ (* GET_Vertex3iv(disp)) parameters
+static inline _glptr_Vertex3iv GET_Vertex3iv(struct _glapi_table *disp) {
+ return (_glptr_Vertex3iv) (GET_by_offset(disp, _gloffset_Vertex3iv));
+}
+
+static inline void SET_Vertex3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Vertex3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3s)(GLshort, GLshort, GLshort);
+#define CALL_Vertex3s(disp, parameters) \
+ (* GET_Vertex3s(disp)) parameters
+static inline _glptr_Vertex3s GET_Vertex3s(struct _glapi_table *disp) {
+ return (_glptr_Vertex3s) (GET_by_offset(disp, _gloffset_Vertex3s));
+}
+
+static inline void SET_Vertex3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Vertex3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex3sv)(const GLshort *);
+#define CALL_Vertex3sv(disp, parameters) \
+ (* GET_Vertex3sv(disp)) parameters
+static inline _glptr_Vertex3sv GET_Vertex3sv(struct _glapi_table *disp) {
+ return (_glptr_Vertex3sv) (GET_by_offset(disp, _gloffset_Vertex3sv));
+}
+
+static inline void SET_Vertex3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Vertex3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4d)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Vertex4d(disp, parameters) \
+ (* GET_Vertex4d(disp)) parameters
+static inline _glptr_Vertex4d GET_Vertex4d(struct _glapi_table *disp) {
+ return (_glptr_Vertex4d) (GET_by_offset(disp, _gloffset_Vertex4d));
+}
+
+static inline void SET_Vertex4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Vertex4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4dv)(const GLdouble *);
+#define CALL_Vertex4dv(disp, parameters) \
+ (* GET_Vertex4dv(disp)) parameters
+static inline _glptr_Vertex4dv GET_Vertex4dv(struct _glapi_table *disp) {
+ return (_glptr_Vertex4dv) (GET_by_offset(disp, _gloffset_Vertex4dv));
+}
+
+static inline void SET_Vertex4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Vertex4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4f)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Vertex4f(disp, parameters) \
+ (* GET_Vertex4f(disp)) parameters
+static inline _glptr_Vertex4f GET_Vertex4f(struct _glapi_table *disp) {
+ return (_glptr_Vertex4f) (GET_by_offset(disp, _gloffset_Vertex4f));
+}
+
+static inline void SET_Vertex4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Vertex4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4fv)(const GLfloat *);
+#define CALL_Vertex4fv(disp, parameters) \
+ (* GET_Vertex4fv(disp)) parameters
+static inline _glptr_Vertex4fv GET_Vertex4fv(struct _glapi_table *disp) {
+ return (_glptr_Vertex4fv) (GET_by_offset(disp, _gloffset_Vertex4fv));
+}
+
+static inline void SET_Vertex4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Vertex4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4i)(GLint, GLint, GLint, GLint);
+#define CALL_Vertex4i(disp, parameters) \
+ (* GET_Vertex4i(disp)) parameters
+static inline _glptr_Vertex4i GET_Vertex4i(struct _glapi_table *disp) {
+ return (_glptr_Vertex4i) (GET_by_offset(disp, _gloffset_Vertex4i));
+}
+
+static inline void SET_Vertex4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Vertex4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4iv)(const GLint *);
+#define CALL_Vertex4iv(disp, parameters) \
+ (* GET_Vertex4iv(disp)) parameters
+static inline _glptr_Vertex4iv GET_Vertex4iv(struct _glapi_table *disp) {
+ return (_glptr_Vertex4iv) (GET_by_offset(disp, _gloffset_Vertex4iv));
+}
+
+static inline void SET_Vertex4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_Vertex4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4s)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_Vertex4s(disp, parameters) \
+ (* GET_Vertex4s(disp)) parameters
+static inline _glptr_Vertex4s GET_Vertex4s(struct _glapi_table *disp) {
+ return (_glptr_Vertex4s) (GET_by_offset(disp, _gloffset_Vertex4s));
+}
+
+static inline void SET_Vertex4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_Vertex4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Vertex4sv)(const GLshort *);
+#define CALL_Vertex4sv(disp, parameters) \
+ (* GET_Vertex4sv(disp)) parameters
+static inline _glptr_Vertex4sv GET_Vertex4sv(struct _glapi_table *disp) {
+ return (_glptr_Vertex4sv) (GET_by_offset(disp, _gloffset_Vertex4sv));
+}
+
+static inline void SET_Vertex4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_Vertex4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClipPlane)(GLenum, const GLdouble *);
+#define CALL_ClipPlane(disp, parameters) \
+ (* GET_ClipPlane(disp)) parameters
+static inline _glptr_ClipPlane GET_ClipPlane(struct _glapi_table *disp) {
+ return (_glptr_ClipPlane) (GET_by_offset(disp, _gloffset_ClipPlane));
+}
+
+static inline void SET_ClipPlane(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ClipPlane, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorMaterial)(GLenum, GLenum);
+#define CALL_ColorMaterial(disp, parameters) \
+ (* GET_ColorMaterial(disp)) parameters
+static inline _glptr_ColorMaterial GET_ColorMaterial(struct _glapi_table *disp) {
+ return (_glptr_ColorMaterial) (GET_by_offset(disp, _gloffset_ColorMaterial));
+}
+
+static inline void SET_ColorMaterial(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_ColorMaterial, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CullFace)(GLenum);
+#define CALL_CullFace(disp, parameters) \
+ (* GET_CullFace(disp)) parameters
+static inline _glptr_CullFace GET_CullFace(struct _glapi_table *disp) {
+ return (_glptr_CullFace) (GET_by_offset(disp, _gloffset_CullFace));
+}
+
+static inline void SET_CullFace(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_CullFace, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogf)(GLenum, GLfloat);
+#define CALL_Fogf(disp, parameters) \
+ (* GET_Fogf(disp)) parameters
+static inline _glptr_Fogf GET_Fogf(struct _glapi_table *disp) {
+ return (_glptr_Fogf) (GET_by_offset(disp, _gloffset_Fogf));
+}
+
+static inline void SET_Fogf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Fogf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogfv)(GLenum, const GLfloat *);
+#define CALL_Fogfv(disp, parameters) \
+ (* GET_Fogfv(disp)) parameters
+static inline _glptr_Fogfv GET_Fogfv(struct _glapi_table *disp) {
+ return (_glptr_Fogfv) (GET_by_offset(disp, _gloffset_Fogfv));
+}
+
+static inline void SET_Fogfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Fogfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogi)(GLenum, GLint);
+#define CALL_Fogi(disp, parameters) \
+ (* GET_Fogi(disp)) parameters
+static inline _glptr_Fogi GET_Fogi(struct _glapi_table *disp) {
+ return (_glptr_Fogi) (GET_by_offset(disp, _gloffset_Fogi));
+}
+
+static inline void SET_Fogi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_Fogi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogiv)(GLenum, const GLint *);
+#define CALL_Fogiv(disp, parameters) \
+ (* GET_Fogiv(disp)) parameters
+static inline _glptr_Fogiv GET_Fogiv(struct _glapi_table *disp) {
+ return (_glptr_Fogiv) (GET_by_offset(disp, _gloffset_Fogiv));
+}
+
+static inline void SET_Fogiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Fogiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FrontFace)(GLenum);
+#define CALL_FrontFace(disp, parameters) \
+ (* GET_FrontFace(disp)) parameters
+static inline _glptr_FrontFace GET_FrontFace(struct _glapi_table *disp) {
+ return (_glptr_FrontFace) (GET_by_offset(disp, _gloffset_FrontFace));
+}
+
+static inline void SET_FrontFace(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_FrontFace, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Hint)(GLenum, GLenum);
+#define CALL_Hint(disp, parameters) \
+ (* GET_Hint(disp)) parameters
+static inline _glptr_Hint GET_Hint(struct _glapi_table *disp) {
+ return (_glptr_Hint) (GET_by_offset(disp, _gloffset_Hint));
+}
+
+static inline void SET_Hint(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_Hint, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lightf)(GLenum, GLenum, GLfloat);
+#define CALL_Lightf(disp, parameters) \
+ (* GET_Lightf(disp)) parameters
+static inline _glptr_Lightf GET_Lightf(struct _glapi_table *disp) {
+ return (_glptr_Lightf) (GET_by_offset(disp, _gloffset_Lightf));
+}
+
+static inline void SET_Lightf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Lightf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lightfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_Lightfv(disp, parameters) \
+ (* GET_Lightfv(disp)) parameters
+static inline _glptr_Lightfv GET_Lightfv(struct _glapi_table *disp) {
+ return (_glptr_Lightfv) (GET_by_offset(disp, _gloffset_Lightfv));
+}
+
+static inline void SET_Lightfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Lightfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lighti)(GLenum, GLenum, GLint);
+#define CALL_Lighti(disp, parameters) \
+ (* GET_Lighti(disp)) parameters
+static inline _glptr_Lighti GET_Lighti(struct _glapi_table *disp) {
+ return (_glptr_Lighti) (GET_by_offset(disp, _gloffset_Lighti));
+}
+
+static inline void SET_Lighti(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_Lighti, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lightiv)(GLenum, GLenum, const GLint *);
+#define CALL_Lightiv(disp, parameters) \
+ (* GET_Lightiv(disp)) parameters
+static inline _glptr_Lightiv GET_Lightiv(struct _glapi_table *disp) {
+ return (_glptr_Lightiv) (GET_by_offset(disp, _gloffset_Lightiv));
+}
+
+static inline void SET_Lightiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Lightiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModelf)(GLenum, GLfloat);
+#define CALL_LightModelf(disp, parameters) \
+ (* GET_LightModelf(disp)) parameters
+static inline _glptr_LightModelf GET_LightModelf(struct _glapi_table *disp) {
+ return (_glptr_LightModelf) (GET_by_offset(disp, _gloffset_LightModelf));
+}
+
+static inline void SET_LightModelf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_LightModelf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModelfv)(GLenum, const GLfloat *);
+#define CALL_LightModelfv(disp, parameters) \
+ (* GET_LightModelfv(disp)) parameters
+static inline _glptr_LightModelfv GET_LightModelfv(struct _glapi_table *disp) {
+ return (_glptr_LightModelfv) (GET_by_offset(disp, _gloffset_LightModelfv));
+}
+
+static inline void SET_LightModelfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_LightModelfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModeli)(GLenum, GLint);
+#define CALL_LightModeli(disp, parameters) \
+ (* GET_LightModeli(disp)) parameters
+static inline _glptr_LightModeli GET_LightModeli(struct _glapi_table *disp) {
+ return (_glptr_LightModeli) (GET_by_offset(disp, _gloffset_LightModeli));
+}
+
+static inline void SET_LightModeli(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_LightModeli, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModeliv)(GLenum, const GLint *);
+#define CALL_LightModeliv(disp, parameters) \
+ (* GET_LightModeliv(disp)) parameters
+static inline _glptr_LightModeliv GET_LightModeliv(struct _glapi_table *disp) {
+ return (_glptr_LightModeliv) (GET_by_offset(disp, _gloffset_LightModeliv));
+}
+
+static inline void SET_LightModeliv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_LightModeliv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LineStipple)(GLint, GLushort);
+#define CALL_LineStipple(disp, parameters) \
+ (* GET_LineStipple(disp)) parameters
+static inline _glptr_LineStipple GET_LineStipple(struct _glapi_table *disp) {
+ return (_glptr_LineStipple) (GET_by_offset(disp, _gloffset_LineStipple));
+}
+
+static inline void SET_LineStipple(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLushort)) {
+ SET_by_offset(disp, _gloffset_LineStipple, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LineWidth)(GLfloat);
+#define CALL_LineWidth(disp, parameters) \
+ (* GET_LineWidth(disp)) parameters
+static inline _glptr_LineWidth GET_LineWidth(struct _glapi_table *disp) {
+ return (_glptr_LineWidth) (GET_by_offset(disp, _gloffset_LineWidth));
+}
+
+static inline void SET_LineWidth(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_LineWidth, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materialf)(GLenum, GLenum, GLfloat);
+#define CALL_Materialf(disp, parameters) \
+ (* GET_Materialf(disp)) parameters
+static inline _glptr_Materialf GET_Materialf(struct _glapi_table *disp) {
+ return (_glptr_Materialf) (GET_by_offset(disp, _gloffset_Materialf));
+}
+
+static inline void SET_Materialf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Materialf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materialfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_Materialfv(disp, parameters) \
+ (* GET_Materialfv(disp)) parameters
+static inline _glptr_Materialfv GET_Materialfv(struct _glapi_table *disp) {
+ return (_glptr_Materialfv) (GET_by_offset(disp, _gloffset_Materialfv));
+}
+
+static inline void SET_Materialfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Materialfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materiali)(GLenum, GLenum, GLint);
+#define CALL_Materiali(disp, parameters) \
+ (* GET_Materiali(disp)) parameters
+static inline _glptr_Materiali GET_Materiali(struct _glapi_table *disp) {
+ return (_glptr_Materiali) (GET_by_offset(disp, _gloffset_Materiali));
+}
+
+static inline void SET_Materiali(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_Materiali, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materialiv)(GLenum, GLenum, const GLint *);
+#define CALL_Materialiv(disp, parameters) \
+ (* GET_Materialiv(disp)) parameters
+static inline _glptr_Materialiv GET_Materialiv(struct _glapi_table *disp) {
+ return (_glptr_Materialiv) (GET_by_offset(disp, _gloffset_Materialiv));
+}
+
+static inline void SET_Materialiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Materialiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointSize)(GLfloat);
+#define CALL_PointSize(disp, parameters) \
+ (* GET_PointSize(disp)) parameters
+static inline _glptr_PointSize GET_PointSize(struct _glapi_table *disp) {
+ return (_glptr_PointSize) (GET_by_offset(disp, _gloffset_PointSize));
+}
+
+static inline void SET_PointSize(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_PointSize, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonMode)(GLenum, GLenum);
+#define CALL_PolygonMode(disp, parameters) \
+ (* GET_PolygonMode(disp)) parameters
+static inline _glptr_PolygonMode GET_PolygonMode(struct _glapi_table *disp) {
+ return (_glptr_PolygonMode) (GET_by_offset(disp, _gloffset_PolygonMode));
+}
+
+static inline void SET_PolygonMode(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_PolygonMode, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonStipple)(const GLubyte *);
+#define CALL_PolygonStipple(disp, parameters) \
+ (* GET_PolygonStipple(disp)) parameters
+static inline _glptr_PolygonStipple GET_PolygonStipple(struct _glapi_table *disp) {
+ return (_glptr_PolygonStipple) (GET_by_offset(disp, _gloffset_PolygonStipple));
+}
+
+static inline void SET_PolygonStipple(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_PolygonStipple, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Scissor)(GLint, GLint, GLsizei, GLsizei);
+#define CALL_Scissor(disp, parameters) \
+ (* GET_Scissor(disp)) parameters
+static inline _glptr_Scissor GET_Scissor(struct _glapi_table *disp) {
+ return (_glptr_Scissor) (GET_by_offset(disp, _gloffset_Scissor));
+}
+
+static inline void SET_Scissor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_Scissor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ShadeModel)(GLenum);
+#define CALL_ShadeModel(disp, parameters) \
+ (* GET_ShadeModel(disp)) parameters
+static inline _glptr_ShadeModel GET_ShadeModel(struct _glapi_table *disp) {
+ return (_glptr_ShadeModel) (GET_by_offset(disp, _gloffset_ShadeModel));
+}
+
+static inline void SET_ShadeModel(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ShadeModel, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterf)(GLenum, GLenum, GLfloat);
+#define CALL_TexParameterf(disp, parameters) \
+ (* GET_TexParameterf(disp)) parameters
+static inline _glptr_TexParameterf GET_TexParameterf(struct _glapi_table *disp) {
+ return (_glptr_TexParameterf) (GET_by_offset(disp, _gloffset_TexParameterf));
+}
+
+static inline void SET_TexParameterf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexParameterf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_TexParameterfv(disp, parameters) \
+ (* GET_TexParameterfv(disp)) parameters
+static inline _glptr_TexParameterfv GET_TexParameterfv(struct _glapi_table *disp) {
+ return (_glptr_TexParameterfv) (GET_by_offset(disp, _gloffset_TexParameterfv));
+}
+
+static inline void SET_TexParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameteri)(GLenum, GLenum, GLint);
+#define CALL_TexParameteri(disp, parameters) \
+ (* GET_TexParameteri(disp)) parameters
+static inline _glptr_TexParameteri GET_TexParameteri(struct _glapi_table *disp) {
+ return (_glptr_TexParameteri) (GET_by_offset(disp, _gloffset_TexParameteri));
+}
+
+static inline void SET_TexParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_TexParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameteriv)(GLenum, GLenum, const GLint *);
+#define CALL_TexParameteriv(disp, parameters) \
+ (* GET_TexParameteriv(disp)) parameters
+static inline _glptr_TexParameteriv GET_TexParameteriv(struct _glapi_table *disp) {
+ return (_glptr_TexParameteriv) (GET_by_offset(disp, _gloffset_TexParameteriv));
+}
+
+static inline void SET_TexParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexImage1D)(GLenum, GLint, GLint, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+#define CALL_TexImage1D(disp, parameters) \
+ (* GET_TexImage1D(disp)) parameters
+static inline _glptr_TexImage1D GET_TexImage1D(struct _glapi_table *disp) {
+ return (_glptr_TexImage1D) (GET_by_offset(disp, _gloffset_TexImage1D));
+}
+
+static inline void SET_TexImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLsizei, GLint, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexImage2D)(GLenum, GLint, GLint, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+#define CALL_TexImage2D(disp, parameters) \
+ (* GET_TexImage2D(disp)) parameters
+static inline _glptr_TexImage2D GET_TexImage2D(struct _glapi_table *disp) {
+ return (_glptr_TexImage2D) (GET_by_offset(disp, _gloffset_TexImage2D));
+}
+
+static inline void SET_TexImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnvf)(GLenum, GLenum, GLfloat);
+#define CALL_TexEnvf(disp, parameters) \
+ (* GET_TexEnvf(disp)) parameters
+static inline _glptr_TexEnvf GET_TexEnvf(struct _glapi_table *disp) {
+ return (_glptr_TexEnvf) (GET_by_offset(disp, _gloffset_TexEnvf));
+}
+
+static inline void SET_TexEnvf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexEnvf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnvfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_TexEnvfv(disp, parameters) \
+ (* GET_TexEnvfv(disp)) parameters
+static inline _glptr_TexEnvfv GET_TexEnvfv(struct _glapi_table *disp) {
+ return (_glptr_TexEnvfv) (GET_by_offset(disp, _gloffset_TexEnvfv));
+}
+
+static inline void SET_TexEnvfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexEnvfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnvi)(GLenum, GLenum, GLint);
+#define CALL_TexEnvi(disp, parameters) \
+ (* GET_TexEnvi(disp)) parameters
+static inline _glptr_TexEnvi GET_TexEnvi(struct _glapi_table *disp) {
+ return (_glptr_TexEnvi) (GET_by_offset(disp, _gloffset_TexEnvi));
+}
+
+static inline void SET_TexEnvi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_TexEnvi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnviv)(GLenum, GLenum, const GLint *);
+#define CALL_TexEnviv(disp, parameters) \
+ (* GET_TexEnviv(disp)) parameters
+static inline _glptr_TexEnviv GET_TexEnviv(struct _glapi_table *disp) {
+ return (_glptr_TexEnviv) (GET_by_offset(disp, _gloffset_TexEnviv));
+}
+
+static inline void SET_TexEnviv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexEnviv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGend)(GLenum, GLenum, GLdouble);
+#define CALL_TexGend(disp, parameters) \
+ (* GET_TexGend(disp)) parameters
+static inline _glptr_TexGend GET_TexGend(struct _glapi_table *disp) {
+ return (_glptr_TexGend) (GET_by_offset(disp, _gloffset_TexGend));
+}
+
+static inline void SET_TexGend(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLdouble)) {
+ SET_by_offset(disp, _gloffset_TexGend, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGendv)(GLenum, GLenum, const GLdouble *);
+#define CALL_TexGendv(disp, parameters) \
+ (* GET_TexGendv(disp)) parameters
+static inline _glptr_TexGendv GET_TexGendv(struct _glapi_table *disp) {
+ return (_glptr_TexGendv) (GET_by_offset(disp, _gloffset_TexGendv));
+}
+
+static inline void SET_TexGendv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_TexGendv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGenf)(GLenum, GLenum, GLfloat);
+#define CALL_TexGenf(disp, parameters) \
+ (* GET_TexGenf(disp)) parameters
+static inline _glptr_TexGenf GET_TexGenf(struct _glapi_table *disp) {
+ return (_glptr_TexGenf) (GET_by_offset(disp, _gloffset_TexGenf));
+}
+
+static inline void SET_TexGenf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TexGenf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGenfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_TexGenfv(disp, parameters) \
+ (* GET_TexGenfv(disp)) parameters
+static inline _glptr_TexGenfv GET_TexGenfv(struct _glapi_table *disp) {
+ return (_glptr_TexGenfv) (GET_by_offset(disp, _gloffset_TexGenfv));
+}
+
+static inline void SET_TexGenfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexGenfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGeni)(GLenum, GLenum, GLint);
+#define CALL_TexGeni(disp, parameters) \
+ (* GET_TexGeni(disp)) parameters
+static inline _glptr_TexGeni GET_TexGeni(struct _glapi_table *disp) {
+ return (_glptr_TexGeni) (GET_by_offset(disp, _gloffset_TexGeni));
+}
+
+static inline void SET_TexGeni(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_TexGeni, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGeniv)(GLenum, GLenum, const GLint *);
+#define CALL_TexGeniv(disp, parameters) \
+ (* GET_TexGeniv(disp)) parameters
+static inline _glptr_TexGeniv GET_TexGeniv(struct _glapi_table *disp) {
+ return (_glptr_TexGeniv) (GET_by_offset(disp, _gloffset_TexGeniv));
+}
+
+static inline void SET_TexGeniv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexGeniv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FeedbackBuffer)(GLsizei, GLenum, GLfloat *);
+#define CALL_FeedbackBuffer(disp, parameters) \
+ (* GET_FeedbackBuffer(disp)) parameters
+static inline _glptr_FeedbackBuffer GET_FeedbackBuffer(struct _glapi_table *disp) {
+ return (_glptr_FeedbackBuffer) (GET_by_offset(disp, _gloffset_FeedbackBuffer));
+}
+
+static inline void SET_FeedbackBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_FeedbackBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SelectBuffer)(GLsizei, GLuint *);
+#define CALL_SelectBuffer(disp, parameters) \
+ (* GET_SelectBuffer(disp)) parameters
+static inline _glptr_SelectBuffer GET_SelectBuffer(struct _glapi_table *disp) {
+ return (_glptr_SelectBuffer) (GET_by_offset(disp, _gloffset_SelectBuffer));
+}
+
+static inline void SET_SelectBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_SelectBuffer, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_RenderMode)(GLenum);
+#define CALL_RenderMode(disp, parameters) \
+ (* GET_RenderMode(disp)) parameters
+static inline _glptr_RenderMode GET_RenderMode(struct _glapi_table *disp) {
+ return (_glptr_RenderMode) (GET_by_offset(disp, _gloffset_RenderMode));
+}
+
+static inline void SET_RenderMode(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_RenderMode, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InitNames)(void);
+#define CALL_InitNames(disp, parameters) \
+ (* GET_InitNames(disp)) parameters
+static inline _glptr_InitNames GET_InitNames(struct _glapi_table *disp) {
+ return (_glptr_InitNames) (GET_by_offset(disp, _gloffset_InitNames));
+}
+
+static inline void SET_InitNames(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_InitNames, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadName)(GLuint);
+#define CALL_LoadName(disp, parameters) \
+ (* GET_LoadName(disp)) parameters
+static inline _glptr_LoadName GET_LoadName(struct _glapi_table *disp) {
+ return (_glptr_LoadName) (GET_by_offset(disp, _gloffset_LoadName));
+}
+
+static inline void SET_LoadName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_LoadName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PassThrough)(GLfloat);
+#define CALL_PassThrough(disp, parameters) \
+ (* GET_PassThrough(disp)) parameters
+static inline _glptr_PassThrough GET_PassThrough(struct _glapi_table *disp) {
+ return (_glptr_PassThrough) (GET_by_offset(disp, _gloffset_PassThrough));
+}
+
+static inline void SET_PassThrough(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_PassThrough, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PopName)(void);
+#define CALL_PopName(disp, parameters) \
+ (* GET_PopName(disp)) parameters
+static inline _glptr_PopName GET_PopName(struct _glapi_table *disp) {
+ return (_glptr_PopName) (GET_by_offset(disp, _gloffset_PopName));
+}
+
+static inline void SET_PopName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PopName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PushName)(GLuint);
+#define CALL_PushName(disp, parameters) \
+ (* GET_PushName(disp)) parameters
+static inline _glptr_PushName GET_PushName(struct _glapi_table *disp) {
+ return (_glptr_PushName) (GET_by_offset(disp, _gloffset_PushName));
+}
+
+static inline void SET_PushName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_PushName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawBuffer)(GLenum);
+#define CALL_DrawBuffer(disp, parameters) \
+ (* GET_DrawBuffer(disp)) parameters
+static inline _glptr_DrawBuffer GET_DrawBuffer(struct _glapi_table *disp) {
+ return (_glptr_DrawBuffer) (GET_by_offset(disp, _gloffset_DrawBuffer));
+}
+
+static inline void SET_DrawBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_DrawBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Clear)(GLbitfield);
+#define CALL_Clear(disp, parameters) \
+ (* GET_Clear(disp)) parameters
+static inline _glptr_Clear GET_Clear(struct _glapi_table *disp) {
+ return (_glptr_Clear) (GET_by_offset(disp, _gloffset_Clear));
+}
+
+static inline void SET_Clear(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbitfield)) {
+ SET_by_offset(disp, _gloffset_Clear, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearAccum)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ClearAccum(disp, parameters) \
+ (* GET_ClearAccum(disp)) parameters
+static inline _glptr_ClearAccum GET_ClearAccum(struct _glapi_table *disp) {
+ return (_glptr_ClearAccum) (GET_by_offset(disp, _gloffset_ClearAccum));
+}
+
+static inline void SET_ClearAccum(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ClearAccum, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearIndex)(GLfloat);
+#define CALL_ClearIndex(disp, parameters) \
+ (* GET_ClearIndex(disp)) parameters
+static inline _glptr_ClearIndex GET_ClearIndex(struct _glapi_table *disp) {
+ return (_glptr_ClearIndex) (GET_by_offset(disp, _gloffset_ClearIndex));
+}
+
+static inline void SET_ClearIndex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_ClearIndex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearColor)(GLclampf, GLclampf, GLclampf, GLclampf);
+#define CALL_ClearColor(disp, parameters) \
+ (* GET_ClearColor(disp)) parameters
+static inline _glptr_ClearColor GET_ClearColor(struct _glapi_table *disp) {
+ return (_glptr_ClearColor) (GET_by_offset(disp, _gloffset_ClearColor));
+}
+
+static inline void SET_ClearColor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf, GLclampf, GLclampf, GLclampf)) {
+ SET_by_offset(disp, _gloffset_ClearColor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearStencil)(GLint);
+#define CALL_ClearStencil(disp, parameters) \
+ (* GET_ClearStencil(disp)) parameters
+static inline _glptr_ClearStencil GET_ClearStencil(struct _glapi_table *disp) {
+ return (_glptr_ClearStencil) (GET_by_offset(disp, _gloffset_ClearStencil));
+}
+
+static inline void SET_ClearStencil(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint)) {
+ SET_by_offset(disp, _gloffset_ClearStencil, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearDepth)(GLclampd);
+#define CALL_ClearDepth(disp, parameters) \
+ (* GET_ClearDepth(disp)) parameters
+static inline _glptr_ClearDepth GET_ClearDepth(struct _glapi_table *disp) {
+ return (_glptr_ClearDepth) (GET_by_offset(disp, _gloffset_ClearDepth));
+}
+
+static inline void SET_ClearDepth(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampd)) {
+ SET_by_offset(disp, _gloffset_ClearDepth, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilMask)(GLuint);
+#define CALL_StencilMask(disp, parameters) \
+ (* GET_StencilMask(disp)) parameters
+static inline _glptr_StencilMask GET_StencilMask(struct _glapi_table *disp) {
+ return (_glptr_StencilMask) (GET_by_offset(disp, _gloffset_StencilMask));
+}
+
+static inline void SET_StencilMask(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_StencilMask, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorMask)(GLboolean, GLboolean, GLboolean, GLboolean);
+#define CALL_ColorMask(disp, parameters) \
+ (* GET_ColorMask(disp)) parameters
+static inline _glptr_ColorMask GET_ColorMask(struct _glapi_table *disp) {
+ return (_glptr_ColorMask) (GET_by_offset(disp, _gloffset_ColorMask));
+}
+
+static inline void SET_ColorMask(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLboolean, GLboolean, GLboolean, GLboolean)) {
+ SET_by_offset(disp, _gloffset_ColorMask, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthMask)(GLboolean);
+#define CALL_DepthMask(disp, parameters) \
+ (* GET_DepthMask(disp)) parameters
+static inline _glptr_DepthMask GET_DepthMask(struct _glapi_table *disp) {
+ return (_glptr_DepthMask) (GET_by_offset(disp, _gloffset_DepthMask));
+}
+
+static inline void SET_DepthMask(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLboolean)) {
+ SET_by_offset(disp, _gloffset_DepthMask, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_IndexMask)(GLuint);
+#define CALL_IndexMask(disp, parameters) \
+ (* GET_IndexMask(disp)) parameters
+static inline _glptr_IndexMask GET_IndexMask(struct _glapi_table *disp) {
+ return (_glptr_IndexMask) (GET_by_offset(disp, _gloffset_IndexMask));
+}
+
+static inline void SET_IndexMask(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IndexMask, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Accum)(GLenum, GLfloat);
+#define CALL_Accum(disp, parameters) \
+ (* GET_Accum(disp)) parameters
+static inline _glptr_Accum GET_Accum(struct _glapi_table *disp) {
+ return (_glptr_Accum) (GET_by_offset(disp, _gloffset_Accum));
+}
+
+static inline void SET_Accum(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Accum, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Disable)(GLenum);
+#define CALL_Disable(disp, parameters) \
+ (* GET_Disable(disp)) parameters
+static inline _glptr_Disable GET_Disable(struct _glapi_table *disp) {
+ return (_glptr_Disable) (GET_by_offset(disp, _gloffset_Disable));
+}
+
+static inline void SET_Disable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_Disable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Enable)(GLenum);
+#define CALL_Enable(disp, parameters) \
+ (* GET_Enable(disp)) parameters
+static inline _glptr_Enable GET_Enable(struct _glapi_table *disp) {
+ return (_glptr_Enable) (GET_by_offset(disp, _gloffset_Enable));
+}
+
+static inline void SET_Enable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_Enable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Finish)(void);
+#define CALL_Finish(disp, parameters) \
+ (* GET_Finish(disp)) parameters
+static inline _glptr_Finish GET_Finish(struct _glapi_table *disp) {
+ return (_glptr_Finish) (GET_by_offset(disp, _gloffset_Finish));
+}
+
+static inline void SET_Finish(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_Finish, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Flush)(void);
+#define CALL_Flush(disp, parameters) \
+ (* GET_Flush(disp)) parameters
+static inline _glptr_Flush GET_Flush(struct _glapi_table *disp) {
+ return (_glptr_Flush) (GET_by_offset(disp, _gloffset_Flush));
+}
+
+static inline void SET_Flush(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_Flush, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PopAttrib)(void);
+#define CALL_PopAttrib(disp, parameters) \
+ (* GET_PopAttrib(disp)) parameters
+static inline _glptr_PopAttrib GET_PopAttrib(struct _glapi_table *disp) {
+ return (_glptr_PopAttrib) (GET_by_offset(disp, _gloffset_PopAttrib));
+}
+
+static inline void SET_PopAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PopAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PushAttrib)(GLbitfield);
+#define CALL_PushAttrib(disp, parameters) \
+ (* GET_PushAttrib(disp)) parameters
+static inline _glptr_PushAttrib GET_PushAttrib(struct _glapi_table *disp) {
+ return (_glptr_PushAttrib) (GET_by_offset(disp, _gloffset_PushAttrib));
+}
+
+static inline void SET_PushAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbitfield)) {
+ SET_by_offset(disp, _gloffset_PushAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Map1d)(GLenum, GLdouble, GLdouble, GLint, GLint, const GLdouble *);
+#define CALL_Map1d(disp, parameters) \
+ (* GET_Map1d(disp)) parameters
+static inline _glptr_Map1d GET_Map1d(struct _glapi_table *disp) {
+ return (_glptr_Map1d) (GET_by_offset(disp, _gloffset_Map1d));
+}
+
+static inline void SET_Map1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble, GLdouble, GLint, GLint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Map1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Map1f)(GLenum, GLfloat, GLfloat, GLint, GLint, const GLfloat *);
+#define CALL_Map1f(disp, parameters) \
+ (* GET_Map1f(disp)) parameters
+static inline _glptr_Map1f GET_Map1f(struct _glapi_table *disp) {
+ return (_glptr_Map1f) (GET_by_offset(disp, _gloffset_Map1f));
+}
+
+static inline void SET_Map1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat, GLfloat, GLint, GLint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Map1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Map2d)(GLenum, GLdouble, GLdouble, GLint, GLint, GLdouble, GLdouble, GLint, GLint, const GLdouble *);
+#define CALL_Map2d(disp, parameters) \
+ (* GET_Map2d(disp)) parameters
+static inline _glptr_Map2d GET_Map2d(struct _glapi_table *disp) {
+ return (_glptr_Map2d) (GET_by_offset(disp, _gloffset_Map2d));
+}
+
+static inline void SET_Map2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble, GLdouble, GLint, GLint, GLdouble, GLdouble, GLint, GLint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Map2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Map2f)(GLenum, GLfloat, GLfloat, GLint, GLint, GLfloat, GLfloat, GLint, GLint, const GLfloat *);
+#define CALL_Map2f(disp, parameters) \
+ (* GET_Map2f(disp)) parameters
+static inline _glptr_Map2f GET_Map2f(struct _glapi_table *disp) {
+ return (_glptr_Map2f) (GET_by_offset(disp, _gloffset_Map2f));
+}
+
+static inline void SET_Map2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat, GLfloat, GLint, GLint, GLfloat, GLfloat, GLint, GLint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Map2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MapGrid1d)(GLint, GLdouble, GLdouble);
+#define CALL_MapGrid1d(disp, parameters) \
+ (* GET_MapGrid1d(disp)) parameters
+static inline _glptr_MapGrid1d GET_MapGrid1d(struct _glapi_table *disp) {
+ return (_glptr_MapGrid1d) (GET_by_offset(disp, _gloffset_MapGrid1d));
+}
+
+static inline void SET_MapGrid1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MapGrid1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MapGrid1f)(GLint, GLfloat, GLfloat);
+#define CALL_MapGrid1f(disp, parameters) \
+ (* GET_MapGrid1f(disp)) parameters
+static inline _glptr_MapGrid1f GET_MapGrid1f(struct _glapi_table *disp) {
+ return (_glptr_MapGrid1f) (GET_by_offset(disp, _gloffset_MapGrid1f));
+}
+
+static inline void SET_MapGrid1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MapGrid1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MapGrid2d)(GLint, GLdouble, GLdouble, GLint, GLdouble, GLdouble);
+#define CALL_MapGrid2d(disp, parameters) \
+ (* GET_MapGrid2d(disp)) parameters
+static inline _glptr_MapGrid2d GET_MapGrid2d(struct _glapi_table *disp) {
+ return (_glptr_MapGrid2d) (GET_by_offset(disp, _gloffset_MapGrid2d));
+}
+
+static inline void SET_MapGrid2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble, GLdouble, GLint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MapGrid2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MapGrid2f)(GLint, GLfloat, GLfloat, GLint, GLfloat, GLfloat);
+#define CALL_MapGrid2f(disp, parameters) \
+ (* GET_MapGrid2f(disp)) parameters
+static inline _glptr_MapGrid2f GET_MapGrid2f(struct _glapi_table *disp) {
+ return (_glptr_MapGrid2f) (GET_by_offset(disp, _gloffset_MapGrid2f));
+}
+
+static inline void SET_MapGrid2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat, GLfloat, GLint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MapGrid2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord1d)(GLdouble);
+#define CALL_EvalCoord1d(disp, parameters) \
+ (* GET_EvalCoord1d(disp)) parameters
+static inline _glptr_EvalCoord1d GET_EvalCoord1d(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord1d) (GET_by_offset(disp, _gloffset_EvalCoord1d));
+}
+
+static inline void SET_EvalCoord1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble)) {
+ SET_by_offset(disp, _gloffset_EvalCoord1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord1dv)(const GLdouble *);
+#define CALL_EvalCoord1dv(disp, parameters) \
+ (* GET_EvalCoord1dv(disp)) parameters
+static inline _glptr_EvalCoord1dv GET_EvalCoord1dv(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord1dv) (GET_by_offset(disp, _gloffset_EvalCoord1dv));
+}
+
+static inline void SET_EvalCoord1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_EvalCoord1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord1f)(GLfloat);
+#define CALL_EvalCoord1f(disp, parameters) \
+ (* GET_EvalCoord1f(disp)) parameters
+static inline _glptr_EvalCoord1f GET_EvalCoord1f(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord1f) (GET_by_offset(disp, _gloffset_EvalCoord1f));
+}
+
+static inline void SET_EvalCoord1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_EvalCoord1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord1fv)(const GLfloat *);
+#define CALL_EvalCoord1fv(disp, parameters) \
+ (* GET_EvalCoord1fv(disp)) parameters
+static inline _glptr_EvalCoord1fv GET_EvalCoord1fv(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord1fv) (GET_by_offset(disp, _gloffset_EvalCoord1fv));
+}
+
+static inline void SET_EvalCoord1fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_EvalCoord1fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord2d)(GLdouble, GLdouble);
+#define CALL_EvalCoord2d(disp, parameters) \
+ (* GET_EvalCoord2d(disp)) parameters
+static inline _glptr_EvalCoord2d GET_EvalCoord2d(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord2d) (GET_by_offset(disp, _gloffset_EvalCoord2d));
+}
+
+static inline void SET_EvalCoord2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_EvalCoord2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord2dv)(const GLdouble *);
+#define CALL_EvalCoord2dv(disp, parameters) \
+ (* GET_EvalCoord2dv(disp)) parameters
+static inline _glptr_EvalCoord2dv GET_EvalCoord2dv(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord2dv) (GET_by_offset(disp, _gloffset_EvalCoord2dv));
+}
+
+static inline void SET_EvalCoord2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_EvalCoord2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord2f)(GLfloat, GLfloat);
+#define CALL_EvalCoord2f(disp, parameters) \
+ (* GET_EvalCoord2f(disp)) parameters
+static inline _glptr_EvalCoord2f GET_EvalCoord2f(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord2f) (GET_by_offset(disp, _gloffset_EvalCoord2f));
+}
+
+static inline void SET_EvalCoord2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_EvalCoord2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalCoord2fv)(const GLfloat *);
+#define CALL_EvalCoord2fv(disp, parameters) \
+ (* GET_EvalCoord2fv(disp)) parameters
+static inline _glptr_EvalCoord2fv GET_EvalCoord2fv(struct _glapi_table *disp) {
+ return (_glptr_EvalCoord2fv) (GET_by_offset(disp, _gloffset_EvalCoord2fv));
+}
+
+static inline void SET_EvalCoord2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_EvalCoord2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalMesh1)(GLenum, GLint, GLint);
+#define CALL_EvalMesh1(disp, parameters) \
+ (* GET_EvalMesh1(disp)) parameters
+static inline _glptr_EvalMesh1 GET_EvalMesh1(struct _glapi_table *disp) {
+ return (_glptr_EvalMesh1) (GET_by_offset(disp, _gloffset_EvalMesh1));
+}
+
+static inline void SET_EvalMesh1(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_EvalMesh1, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalPoint1)(GLint);
+#define CALL_EvalPoint1(disp, parameters) \
+ (* GET_EvalPoint1(disp)) parameters
+static inline _glptr_EvalPoint1 GET_EvalPoint1(struct _glapi_table *disp) {
+ return (_glptr_EvalPoint1) (GET_by_offset(disp, _gloffset_EvalPoint1));
+}
+
+static inline void SET_EvalPoint1(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint)) {
+ SET_by_offset(disp, _gloffset_EvalPoint1, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalMesh2)(GLenum, GLint, GLint, GLint, GLint);
+#define CALL_EvalMesh2(disp, parameters) \
+ (* GET_EvalMesh2(disp)) parameters
+static inline _glptr_EvalMesh2 GET_EvalMesh2(struct _glapi_table *disp) {
+ return (_glptr_EvalMesh2) (GET_by_offset(disp, _gloffset_EvalMesh2));
+}
+
+static inline void SET_EvalMesh2(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_EvalMesh2, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EvalPoint2)(GLint, GLint);
+#define CALL_EvalPoint2(disp, parameters) \
+ (* GET_EvalPoint2(disp)) parameters
+static inline _glptr_EvalPoint2 GET_EvalPoint2(struct _glapi_table *disp) {
+ return (_glptr_EvalPoint2) (GET_by_offset(disp, _gloffset_EvalPoint2));
+}
+
+static inline void SET_EvalPoint2(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_EvalPoint2, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AlphaFunc)(GLenum, GLclampf);
+#define CALL_AlphaFunc(disp, parameters) \
+ (* GET_AlphaFunc(disp)) parameters
+static inline _glptr_AlphaFunc GET_AlphaFunc(struct _glapi_table *disp) {
+ return (_glptr_AlphaFunc) (GET_by_offset(disp, _gloffset_AlphaFunc));
+}
+
+static inline void SET_AlphaFunc(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLclampf)) {
+ SET_by_offset(disp, _gloffset_AlphaFunc, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendFunc)(GLenum, GLenum);
+#define CALL_BlendFunc(disp, parameters) \
+ (* GET_BlendFunc(disp)) parameters
+static inline _glptr_BlendFunc GET_BlendFunc(struct _glapi_table *disp) {
+ return (_glptr_BlendFunc) (GET_by_offset(disp, _gloffset_BlendFunc));
+}
+
+static inline void SET_BlendFunc(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendFunc, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LogicOp)(GLenum);
+#define CALL_LogicOp(disp, parameters) \
+ (* GET_LogicOp(disp)) parameters
+static inline _glptr_LogicOp GET_LogicOp(struct _glapi_table *disp) {
+ return (_glptr_LogicOp) (GET_by_offset(disp, _gloffset_LogicOp));
+}
+
+static inline void SET_LogicOp(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_LogicOp, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilFunc)(GLenum, GLint, GLuint);
+#define CALL_StencilFunc(disp, parameters) \
+ (* GET_StencilFunc(disp)) parameters
+static inline _glptr_StencilFunc GET_StencilFunc(struct _glapi_table *disp) {
+ return (_glptr_StencilFunc) (GET_by_offset(disp, _gloffset_StencilFunc));
+}
+
+static inline void SET_StencilFunc(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_StencilFunc, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilOp)(GLenum, GLenum, GLenum);
+#define CALL_StencilOp(disp, parameters) \
+ (* GET_StencilOp(disp)) parameters
+static inline _glptr_StencilOp GET_StencilOp(struct _glapi_table *disp) {
+ return (_glptr_StencilOp) (GET_by_offset(disp, _gloffset_StencilOp));
+}
+
+static inline void SET_StencilOp(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_StencilOp, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthFunc)(GLenum);
+#define CALL_DepthFunc(disp, parameters) \
+ (* GET_DepthFunc(disp)) parameters
+static inline _glptr_DepthFunc GET_DepthFunc(struct _glapi_table *disp) {
+ return (_glptr_DepthFunc) (GET_by_offset(disp, _gloffset_DepthFunc));
+}
+
+static inline void SET_DepthFunc(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_DepthFunc, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelZoom)(GLfloat, GLfloat);
+#define CALL_PixelZoom(disp, parameters) \
+ (* GET_PixelZoom(disp)) parameters
+static inline _glptr_PixelZoom GET_PixelZoom(struct _glapi_table *disp) {
+ return (_glptr_PixelZoom) (GET_by_offset(disp, _gloffset_PixelZoom));
+}
+
+static inline void SET_PixelZoom(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PixelZoom, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelTransferf)(GLenum, GLfloat);
+#define CALL_PixelTransferf(disp, parameters) \
+ (* GET_PixelTransferf(disp)) parameters
+static inline _glptr_PixelTransferf GET_PixelTransferf(struct _glapi_table *disp) {
+ return (_glptr_PixelTransferf) (GET_by_offset(disp, _gloffset_PixelTransferf));
+}
+
+static inline void SET_PixelTransferf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PixelTransferf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelTransferi)(GLenum, GLint);
+#define CALL_PixelTransferi(disp, parameters) \
+ (* GET_PixelTransferi(disp)) parameters
+static inline _glptr_PixelTransferi GET_PixelTransferi(struct _glapi_table *disp) {
+ return (_glptr_PixelTransferi) (GET_by_offset(disp, _gloffset_PixelTransferi));
+}
+
+static inline void SET_PixelTransferi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_PixelTransferi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelStoref)(GLenum, GLfloat);
+#define CALL_PixelStoref(disp, parameters) \
+ (* GET_PixelStoref(disp)) parameters
+static inline _glptr_PixelStoref GET_PixelStoref(struct _glapi_table *disp) {
+ return (_glptr_PixelStoref) (GET_by_offset(disp, _gloffset_PixelStoref));
+}
+
+static inline void SET_PixelStoref(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PixelStoref, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelStorei)(GLenum, GLint);
+#define CALL_PixelStorei(disp, parameters) \
+ (* GET_PixelStorei(disp)) parameters
+static inline _glptr_PixelStorei GET_PixelStorei(struct _glapi_table *disp) {
+ return (_glptr_PixelStorei) (GET_by_offset(disp, _gloffset_PixelStorei));
+}
+
+static inline void SET_PixelStorei(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_PixelStorei, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelMapfv)(GLenum, GLsizei, const GLfloat *);
+#define CALL_PixelMapfv(disp, parameters) \
+ (* GET_PixelMapfv(disp)) parameters
+static inline _glptr_PixelMapfv GET_PixelMapfv(struct _glapi_table *disp) {
+ return (_glptr_PixelMapfv) (GET_by_offset(disp, _gloffset_PixelMapfv));
+}
+
+static inline void SET_PixelMapfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_PixelMapfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelMapuiv)(GLenum, GLsizei, const GLuint *);
+#define CALL_PixelMapuiv(disp, parameters) \
+ (* GET_PixelMapuiv(disp)) parameters
+static inline _glptr_PixelMapuiv GET_PixelMapuiv(struct _glapi_table *disp) {
+ return (_glptr_PixelMapuiv) (GET_by_offset(disp, _gloffset_PixelMapuiv));
+}
+
+static inline void SET_PixelMapuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_PixelMapuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PixelMapusv)(GLenum, GLsizei, const GLushort *);
+#define CALL_PixelMapusv(disp, parameters) \
+ (* GET_PixelMapusv(disp)) parameters
+static inline _glptr_PixelMapusv GET_PixelMapusv(struct _glapi_table *disp) {
+ return (_glptr_PixelMapusv) (GET_by_offset(disp, _gloffset_PixelMapusv));
+}
+
+static inline void SET_PixelMapusv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLushort *)) {
+ SET_by_offset(disp, _gloffset_PixelMapusv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ReadBuffer)(GLenum);
+#define CALL_ReadBuffer(disp, parameters) \
+ (* GET_ReadBuffer(disp)) parameters
+static inline _glptr_ReadBuffer GET_ReadBuffer(struct _glapi_table *disp) {
+ return (_glptr_ReadBuffer) (GET_by_offset(disp, _gloffset_ReadBuffer));
+}
+
+static inline void SET_ReadBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ReadBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyPixels)(GLint, GLint, GLsizei, GLsizei, GLenum);
+#define CALL_CopyPixels(disp, parameters) \
+ (* GET_CopyPixels(disp)) parameters
+static inline _glptr_CopyPixels GET_CopyPixels(struct _glapi_table *disp) {
+ return (_glptr_CopyPixels) (GET_by_offset(disp, _gloffset_CopyPixels));
+}
+
+static inline void SET_CopyPixels(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLsizei, GLsizei, GLenum)) {
+ SET_by_offset(disp, _gloffset_CopyPixels, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ReadPixels)(GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, GLvoid *);
+#define CALL_ReadPixels(disp, parameters) \
+ (* GET_ReadPixels(disp)) parameters
+static inline _glptr_ReadPixels GET_ReadPixels(struct _glapi_table *disp) {
+ return (_glptr_ReadPixels) (GET_by_offset(disp, _gloffset_ReadPixels));
+}
+
+static inline void SET_ReadPixels(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ReadPixels, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawPixels)(GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_DrawPixels(disp, parameters) \
+ (* GET_DrawPixels(disp)) parameters
+static inline _glptr_DrawPixels GET_DrawPixels(struct _glapi_table *disp) {
+ return (_glptr_DrawPixels) (GET_by_offset(disp, _gloffset_DrawPixels));
+}
+
+static inline void SET_DrawPixels(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DrawPixels, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBooleanv)(GLenum, GLboolean *);
+#define CALL_GetBooleanv(disp, parameters) \
+ (* GET_GetBooleanv(disp)) parameters
+static inline _glptr_GetBooleanv GET_GetBooleanv(struct _glapi_table *disp) {
+ return (_glptr_GetBooleanv) (GET_by_offset(disp, _gloffset_GetBooleanv));
+}
+
+static inline void SET_GetBooleanv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLboolean *)) {
+ SET_by_offset(disp, _gloffset_GetBooleanv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetClipPlane)(GLenum, GLdouble *);
+#define CALL_GetClipPlane(disp, parameters) \
+ (* GET_GetClipPlane(disp)) parameters
+static inline _glptr_GetClipPlane GET_GetClipPlane(struct _glapi_table *disp) {
+ return (_glptr_GetClipPlane) (GET_by_offset(disp, _gloffset_GetClipPlane));
+}
+
+static inline void SET_GetClipPlane(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetClipPlane, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetDoublev)(GLenum, GLdouble *);
+#define CALL_GetDoublev(disp, parameters) \
+ (* GET_GetDoublev(disp)) parameters
+static inline _glptr_GetDoublev GET_GetDoublev(struct _glapi_table *disp) {
+ return (_glptr_GetDoublev) (GET_by_offset(disp, _gloffset_GetDoublev));
+}
+
+static inline void SET_GetDoublev(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetDoublev, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_GetError)(void);
+#define CALL_GetError(disp, parameters) \
+ (* GET_GetError(disp)) parameters
+static inline _glptr_GetError GET_GetError(struct _glapi_table *disp) {
+ return (_glptr_GetError) (GET_by_offset(disp, _gloffset_GetError));
+}
+
+static inline void SET_GetError(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_GetError, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFloatv)(GLenum, GLfloat *);
+#define CALL_GetFloatv(disp, parameters) \
+ (* GET_GetFloatv(disp)) parameters
+static inline _glptr_GetFloatv GET_GetFloatv(struct _glapi_table *disp) {
+ return (_glptr_GetFloatv) (GET_by_offset(disp, _gloffset_GetFloatv));
+}
+
+static inline void SET_GetFloatv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetFloatv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetIntegerv)(GLenum, GLint *);
+#define CALL_GetIntegerv(disp, parameters) \
+ (* GET_GetIntegerv(disp)) parameters
+static inline _glptr_GetIntegerv GET_GetIntegerv(struct _glapi_table *disp) {
+ return (_glptr_GetIntegerv) (GET_by_offset(disp, _gloffset_GetIntegerv));
+}
+
+static inline void SET_GetIntegerv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetIntegerv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetLightfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetLightfv(disp, parameters) \
+ (* GET_GetLightfv(disp)) parameters
+static inline _glptr_GetLightfv GET_GetLightfv(struct _glapi_table *disp) {
+ return (_glptr_GetLightfv) (GET_by_offset(disp, _gloffset_GetLightfv));
+}
+
+static inline void SET_GetLightfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetLightfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetLightiv)(GLenum, GLenum, GLint *);
+#define CALL_GetLightiv(disp, parameters) \
+ (* GET_GetLightiv(disp)) parameters
+static inline _glptr_GetLightiv GET_GetLightiv(struct _glapi_table *disp) {
+ return (_glptr_GetLightiv) (GET_by_offset(disp, _gloffset_GetLightiv));
+}
+
+static inline void SET_GetLightiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetLightiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMapdv)(GLenum, GLenum, GLdouble *);
+#define CALL_GetMapdv(disp, parameters) \
+ (* GET_GetMapdv(disp)) parameters
+static inline _glptr_GetMapdv GET_GetMapdv(struct _glapi_table *disp) {
+ return (_glptr_GetMapdv) (GET_by_offset(disp, _gloffset_GetMapdv));
+}
+
+static inline void SET_GetMapdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetMapdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMapfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetMapfv(disp, parameters) \
+ (* GET_GetMapfv(disp)) parameters
+static inline _glptr_GetMapfv GET_GetMapfv(struct _glapi_table *disp) {
+ return (_glptr_GetMapfv) (GET_by_offset(disp, _gloffset_GetMapfv));
+}
+
+static inline void SET_GetMapfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetMapfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMapiv)(GLenum, GLenum, GLint *);
+#define CALL_GetMapiv(disp, parameters) \
+ (* GET_GetMapiv(disp)) parameters
+static inline _glptr_GetMapiv GET_GetMapiv(struct _glapi_table *disp) {
+ return (_glptr_GetMapiv) (GET_by_offset(disp, _gloffset_GetMapiv));
+}
+
+static inline void SET_GetMapiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetMapiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMaterialfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetMaterialfv(disp, parameters) \
+ (* GET_GetMaterialfv(disp)) parameters
+static inline _glptr_GetMaterialfv GET_GetMaterialfv(struct _glapi_table *disp) {
+ return (_glptr_GetMaterialfv) (GET_by_offset(disp, _gloffset_GetMaterialfv));
+}
+
+static inline void SET_GetMaterialfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetMaterialfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMaterialiv)(GLenum, GLenum, GLint *);
+#define CALL_GetMaterialiv(disp, parameters) \
+ (* GET_GetMaterialiv(disp)) parameters
+static inline _glptr_GetMaterialiv GET_GetMaterialiv(struct _glapi_table *disp) {
+ return (_glptr_GetMaterialiv) (GET_by_offset(disp, _gloffset_GetMaterialiv));
+}
+
+static inline void SET_GetMaterialiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetMaterialiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPixelMapfv)(GLenum, GLfloat *);
+#define CALL_GetPixelMapfv(disp, parameters) \
+ (* GET_GetPixelMapfv(disp)) parameters
+static inline _glptr_GetPixelMapfv GET_GetPixelMapfv(struct _glapi_table *disp) {
+ return (_glptr_GetPixelMapfv) (GET_by_offset(disp, _gloffset_GetPixelMapfv));
+}
+
+static inline void SET_GetPixelMapfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetPixelMapfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPixelMapuiv)(GLenum, GLuint *);
+#define CALL_GetPixelMapuiv(disp, parameters) \
+ (* GET_GetPixelMapuiv(disp)) parameters
+static inline _glptr_GetPixelMapuiv GET_GetPixelMapuiv(struct _glapi_table *disp) {
+ return (_glptr_GetPixelMapuiv) (GET_by_offset(disp, _gloffset_GetPixelMapuiv));
+}
+
+static inline void SET_GetPixelMapuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPixelMapuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPixelMapusv)(GLenum, GLushort *);
+#define CALL_GetPixelMapusv(disp, parameters) \
+ (* GET_GetPixelMapusv(disp)) parameters
+static inline _glptr_GetPixelMapusv GET_GetPixelMapusv(struct _glapi_table *disp) {
+ return (_glptr_GetPixelMapusv) (GET_by_offset(disp, _gloffset_GetPixelMapusv));
+}
+
+static inline void SET_GetPixelMapusv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLushort *)) {
+ SET_by_offset(disp, _gloffset_GetPixelMapusv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPolygonStipple)(GLubyte *);
+#define CALL_GetPolygonStipple(disp, parameters) \
+ (* GET_GetPolygonStipple(disp)) parameters
+static inline _glptr_GetPolygonStipple GET_GetPolygonStipple(struct _glapi_table *disp) {
+ return (_glptr_GetPolygonStipple) (GET_by_offset(disp, _gloffset_GetPolygonStipple));
+}
+
+static inline void SET_GetPolygonStipple(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLubyte *)) {
+ SET_by_offset(disp, _gloffset_GetPolygonStipple, fn);
+}
+
+typedef const GLubyte * (GLAPIENTRYP _glptr_GetString)(GLenum);
+#define CALL_GetString(disp, parameters) \
+ (* GET_GetString(disp)) parameters
+static inline _glptr_GetString GET_GetString(struct _glapi_table *disp) {
+ return (_glptr_GetString) (GET_by_offset(disp, _gloffset_GetString));
+}
+
+static inline void SET_GetString(struct _glapi_table *disp, const GLubyte * (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_GetString, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexEnvfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetTexEnvfv(disp, parameters) \
+ (* GET_GetTexEnvfv(disp)) parameters
+static inline _glptr_GetTexEnvfv GET_GetTexEnvfv(struct _glapi_table *disp) {
+ return (_glptr_GetTexEnvfv) (GET_by_offset(disp, _gloffset_GetTexEnvfv));
+}
+
+static inline void SET_GetTexEnvfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTexEnvfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexEnviv)(GLenum, GLenum, GLint *);
+#define CALL_GetTexEnviv(disp, parameters) \
+ (* GET_GetTexEnviv(disp)) parameters
+static inline _glptr_GetTexEnviv GET_GetTexEnviv(struct _glapi_table *disp) {
+ return (_glptr_GetTexEnviv) (GET_by_offset(disp, _gloffset_GetTexEnviv));
+}
+
+static inline void SET_GetTexEnviv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexEnviv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexGendv)(GLenum, GLenum, GLdouble *);
+#define CALL_GetTexGendv(disp, parameters) \
+ (* GET_GetTexGendv(disp)) parameters
+static inline _glptr_GetTexGendv GET_GetTexGendv(struct _glapi_table *disp) {
+ return (_glptr_GetTexGendv) (GET_by_offset(disp, _gloffset_GetTexGendv));
+}
+
+static inline void SET_GetTexGendv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetTexGendv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexGenfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetTexGenfv(disp, parameters) \
+ (* GET_GetTexGenfv(disp)) parameters
+static inline _glptr_GetTexGenfv GET_GetTexGenfv(struct _glapi_table *disp) {
+ return (_glptr_GetTexGenfv) (GET_by_offset(disp, _gloffset_GetTexGenfv));
+}
+
+static inline void SET_GetTexGenfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTexGenfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexGeniv)(GLenum, GLenum, GLint *);
+#define CALL_GetTexGeniv(disp, parameters) \
+ (* GET_GetTexGeniv(disp)) parameters
+static inline _glptr_GetTexGeniv GET_GetTexGeniv(struct _glapi_table *disp) {
+ return (_glptr_GetTexGeniv) (GET_by_offset(disp, _gloffset_GetTexGeniv));
+}
+
+static inline void SET_GetTexGeniv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexGeniv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexImage)(GLenum, GLint, GLenum, GLenum, GLvoid *);
+#define CALL_GetTexImage(disp, parameters) \
+ (* GET_GetTexImage(disp)) parameters
+static inline _glptr_GetTexImage GET_GetTexImage(struct _glapi_table *disp) {
+ return (_glptr_GetTexImage) (GET_by_offset(disp, _gloffset_GetTexImage));
+}
+
+static inline void SET_GetTexImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetTexImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexParameterfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetTexParameterfv(disp, parameters) \
+ (* GET_GetTexParameterfv(disp)) parameters
+static inline _glptr_GetTexParameterfv GET_GetTexParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetTexParameterfv) (GET_by_offset(disp, _gloffset_GetTexParameterfv));
+}
+
+static inline void SET_GetTexParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTexParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetTexParameteriv(disp, parameters) \
+ (* GET_GetTexParameteriv(disp)) parameters
+static inline _glptr_GetTexParameteriv GET_GetTexParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetTexParameteriv) (GET_by_offset(disp, _gloffset_GetTexParameteriv));
+}
+
+static inline void SET_GetTexParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexLevelParameterfv)(GLenum, GLint, GLenum, GLfloat *);
+#define CALL_GetTexLevelParameterfv(disp, parameters) \
+ (* GET_GetTexLevelParameterfv(disp)) parameters
+static inline _glptr_GetTexLevelParameterfv GET_GetTexLevelParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetTexLevelParameterfv) (GET_by_offset(disp, _gloffset_GetTexLevelParameterfv));
+}
+
+static inline void SET_GetTexLevelParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTexLevelParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexLevelParameteriv)(GLenum, GLint, GLenum, GLint *);
+#define CALL_GetTexLevelParameteriv(disp, parameters) \
+ (* GET_GetTexLevelParameteriv(disp)) parameters
+static inline _glptr_GetTexLevelParameteriv GET_GetTexLevelParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetTexLevelParameteriv) (GET_by_offset(disp, _gloffset_GetTexLevelParameteriv));
+}
+
+static inline void SET_GetTexLevelParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexLevelParameteriv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsEnabled)(GLenum);
+#define CALL_IsEnabled(disp, parameters) \
+ (* GET_IsEnabled(disp)) parameters
+static inline _glptr_IsEnabled GET_IsEnabled(struct _glapi_table *disp) {
+ return (_glptr_IsEnabled) (GET_by_offset(disp, _gloffset_IsEnabled));
+}
+
+static inline void SET_IsEnabled(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_IsEnabled, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsList)(GLuint);
+#define CALL_IsList(disp, parameters) \
+ (* GET_IsList(disp)) parameters
+static inline _glptr_IsList GET_IsList(struct _glapi_table *disp) {
+ return (_glptr_IsList) (GET_by_offset(disp, _gloffset_IsList));
+}
+
+static inline void SET_IsList(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsList, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRange)(GLclampd, GLclampd);
+#define CALL_DepthRange(disp, parameters) \
+ (* GET_DepthRange(disp)) parameters
+static inline _glptr_DepthRange GET_DepthRange(struct _glapi_table *disp) {
+ return (_glptr_DepthRange) (GET_by_offset(disp, _gloffset_DepthRange));
+}
+
+static inline void SET_DepthRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampd, GLclampd)) {
+ SET_by_offset(disp, _gloffset_DepthRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Frustum)(GLdouble, GLdouble, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Frustum(disp, parameters) \
+ (* GET_Frustum(disp)) parameters
+static inline _glptr_Frustum GET_Frustum(struct _glapi_table *disp) {
+ return (_glptr_Frustum) (GET_by_offset(disp, _gloffset_Frustum));
+}
+
+static inline void SET_Frustum(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Frustum, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadIdentity)(void);
+#define CALL_LoadIdentity(disp, parameters) \
+ (* GET_LoadIdentity(disp)) parameters
+static inline _glptr_LoadIdentity GET_LoadIdentity(struct _glapi_table *disp) {
+ return (_glptr_LoadIdentity) (GET_by_offset(disp, _gloffset_LoadIdentity));
+}
+
+static inline void SET_LoadIdentity(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_LoadIdentity, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadMatrixf)(const GLfloat *);
+#define CALL_LoadMatrixf(disp, parameters) \
+ (* GET_LoadMatrixf(disp)) parameters
+static inline _glptr_LoadMatrixf GET_LoadMatrixf(struct _glapi_table *disp) {
+ return (_glptr_LoadMatrixf) (GET_by_offset(disp, _gloffset_LoadMatrixf));
+}
+
+static inline void SET_LoadMatrixf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_LoadMatrixf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadMatrixd)(const GLdouble *);
+#define CALL_LoadMatrixd(disp, parameters) \
+ (* GET_LoadMatrixd(disp)) parameters
+static inline _glptr_LoadMatrixd GET_LoadMatrixd(struct _glapi_table *disp) {
+ return (_glptr_LoadMatrixd) (GET_by_offset(disp, _gloffset_LoadMatrixd));
+}
+
+static inline void SET_LoadMatrixd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_LoadMatrixd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MatrixMode)(GLenum);
+#define CALL_MatrixMode(disp, parameters) \
+ (* GET_MatrixMode(disp)) parameters
+static inline _glptr_MatrixMode GET_MatrixMode(struct _glapi_table *disp) {
+ return (_glptr_MatrixMode) (GET_by_offset(disp, _gloffset_MatrixMode));
+}
+
+static inline void SET_MatrixMode(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_MatrixMode, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultMatrixf)(const GLfloat *);
+#define CALL_MultMatrixf(disp, parameters) \
+ (* GET_MultMatrixf(disp)) parameters
+static inline _glptr_MultMatrixf GET_MultMatrixf(struct _glapi_table *disp) {
+ return (_glptr_MultMatrixf) (GET_by_offset(disp, _gloffset_MultMatrixf));
+}
+
+static inline void SET_MultMatrixf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultMatrixf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultMatrixd)(const GLdouble *);
+#define CALL_MultMatrixd(disp, parameters) \
+ (* GET_MultMatrixd(disp)) parameters
+static inline _glptr_MultMatrixd GET_MultMatrixd(struct _glapi_table *disp) {
+ return (_glptr_MultMatrixd) (GET_by_offset(disp, _gloffset_MultMatrixd));
+}
+
+static inline void SET_MultMatrixd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultMatrixd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Ortho)(GLdouble, GLdouble, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Ortho(disp, parameters) \
+ (* GET_Ortho(disp)) parameters
+static inline _glptr_Ortho GET_Ortho(struct _glapi_table *disp) {
+ return (_glptr_Ortho) (GET_by_offset(disp, _gloffset_Ortho));
+}
+
+static inline void SET_Ortho(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Ortho, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PopMatrix)(void);
+#define CALL_PopMatrix(disp, parameters) \
+ (* GET_PopMatrix(disp)) parameters
+static inline _glptr_PopMatrix GET_PopMatrix(struct _glapi_table *disp) {
+ return (_glptr_PopMatrix) (GET_by_offset(disp, _gloffset_PopMatrix));
+}
+
+static inline void SET_PopMatrix(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PopMatrix, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PushMatrix)(void);
+#define CALL_PushMatrix(disp, parameters) \
+ (* GET_PushMatrix(disp)) parameters
+static inline _glptr_PushMatrix GET_PushMatrix(struct _glapi_table *disp) {
+ return (_glptr_PushMatrix) (GET_by_offset(disp, _gloffset_PushMatrix));
+}
+
+static inline void SET_PushMatrix(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PushMatrix, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rotated)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Rotated(disp, parameters) \
+ (* GET_Rotated(disp)) parameters
+static inline _glptr_Rotated GET_Rotated(struct _glapi_table *disp) {
+ return (_glptr_Rotated) (GET_by_offset(disp, _gloffset_Rotated));
+}
+
+static inline void SET_Rotated(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Rotated, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rotatef)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Rotatef(disp, parameters) \
+ (* GET_Rotatef(disp)) parameters
+static inline _glptr_Rotatef GET_Rotatef(struct _glapi_table *disp) {
+ return (_glptr_Rotatef) (GET_by_offset(disp, _gloffset_Rotatef));
+}
+
+static inline void SET_Rotatef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Rotatef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Scaled)(GLdouble, GLdouble, GLdouble);
+#define CALL_Scaled(disp, parameters) \
+ (* GET_Scaled(disp)) parameters
+static inline _glptr_Scaled GET_Scaled(struct _glapi_table *disp) {
+ return (_glptr_Scaled) (GET_by_offset(disp, _gloffset_Scaled));
+}
+
+static inline void SET_Scaled(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Scaled, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Scalef)(GLfloat, GLfloat, GLfloat);
+#define CALL_Scalef(disp, parameters) \
+ (* GET_Scalef(disp)) parameters
+static inline _glptr_Scalef GET_Scalef(struct _glapi_table *disp) {
+ return (_glptr_Scalef) (GET_by_offset(disp, _gloffset_Scalef));
+}
+
+static inline void SET_Scalef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Scalef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Translated)(GLdouble, GLdouble, GLdouble);
+#define CALL_Translated(disp, parameters) \
+ (* GET_Translated(disp)) parameters
+static inline _glptr_Translated GET_Translated(struct _glapi_table *disp) {
+ return (_glptr_Translated) (GET_by_offset(disp, _gloffset_Translated));
+}
+
+static inline void SET_Translated(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Translated, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Translatef)(GLfloat, GLfloat, GLfloat);
+#define CALL_Translatef(disp, parameters) \
+ (* GET_Translatef(disp)) parameters
+static inline _glptr_Translatef GET_Translatef(struct _glapi_table *disp) {
+ return (_glptr_Translatef) (GET_by_offset(disp, _gloffset_Translatef));
+}
+
+static inline void SET_Translatef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Translatef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Viewport)(GLint, GLint, GLsizei, GLsizei);
+#define CALL_Viewport(disp, parameters) \
+ (* GET_Viewport(disp)) parameters
+static inline _glptr_Viewport GET_Viewport(struct _glapi_table *disp) {
+ return (_glptr_Viewport) (GET_by_offset(disp, _gloffset_Viewport));
+}
+
+static inline void SET_Viewport(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_Viewport, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ArrayElement)(GLint);
+#define CALL_ArrayElement(disp, parameters) \
+ (* GET_ArrayElement(disp)) parameters
+static inline _glptr_ArrayElement GET_ArrayElement(struct _glapi_table *disp) {
+ return (_glptr_ArrayElement) (GET_by_offset(disp, _gloffset_ArrayElement));
+}
+
+static inline void SET_ArrayElement(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint)) {
+ SET_by_offset(disp, _gloffset_ArrayElement, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindTexture)(GLenum, GLuint);
+#define CALL_BindTexture(disp, parameters) \
+ (* GET_BindTexture(disp)) parameters
+static inline _glptr_BindTexture GET_BindTexture(struct _glapi_table *disp) {
+ return (_glptr_BindTexture) (GET_by_offset(disp, _gloffset_BindTexture));
+}
+
+static inline void SET_BindTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorPointer)(GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_ColorPointer(disp, parameters) \
+ (* GET_ColorPointer(disp)) parameters
+static inline _glptr_ColorPointer GET_ColorPointer(struct _glapi_table *disp) {
+ return (_glptr_ColorPointer) (GET_by_offset(disp, _gloffset_ColorPointer));
+}
+
+static inline void SET_ColorPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ColorPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DisableClientState)(GLenum);
+#define CALL_DisableClientState(disp, parameters) \
+ (* GET_DisableClientState(disp)) parameters
+static inline _glptr_DisableClientState GET_DisableClientState(struct _glapi_table *disp) {
+ return (_glptr_DisableClientState) (GET_by_offset(disp, _gloffset_DisableClientState));
+}
+
+static inline void SET_DisableClientState(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_DisableClientState, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawArrays)(GLenum, GLint, GLsizei);
+#define CALL_DrawArrays(disp, parameters) \
+ (* GET_DrawArrays(disp)) parameters
+static inline _glptr_DrawArrays GET_DrawArrays(struct _glapi_table *disp) {
+ return (_glptr_DrawArrays) (GET_by_offset(disp, _gloffset_DrawArrays));
+}
+
+static inline void SET_DrawArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DrawArrays, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElements)(GLenum, GLsizei, GLenum, const GLvoid *);
+#define CALL_DrawElements(disp, parameters) \
+ (* GET_DrawElements(disp)) parameters
+static inline _glptr_DrawElements GET_DrawElements(struct _glapi_table *disp) {
+ return (_glptr_DrawElements) (GET_by_offset(disp, _gloffset_DrawElements));
+}
+
+static inline void SET_DrawElements(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DrawElements, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EdgeFlagPointer)(GLsizei, const GLvoid *);
+#define CALL_EdgeFlagPointer(disp, parameters) \
+ (* GET_EdgeFlagPointer(disp)) parameters
+static inline _glptr_EdgeFlagPointer GET_EdgeFlagPointer(struct _glapi_table *disp) {
+ return (_glptr_EdgeFlagPointer) (GET_by_offset(disp, _gloffset_EdgeFlagPointer));
+}
+
+static inline void SET_EdgeFlagPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_EdgeFlagPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EnableClientState)(GLenum);
+#define CALL_EnableClientState(disp, parameters) \
+ (* GET_EnableClientState(disp)) parameters
+static inline _glptr_EnableClientState GET_EnableClientState(struct _glapi_table *disp) {
+ return (_glptr_EnableClientState) (GET_by_offset(disp, _gloffset_EnableClientState));
+}
+
+static inline void SET_EnableClientState(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_EnableClientState, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_IndexPointer)(GLenum, GLsizei, const GLvoid *);
+#define CALL_IndexPointer(disp, parameters) \
+ (* GET_IndexPointer(disp)) parameters
+static inline _glptr_IndexPointer GET_IndexPointer(struct _glapi_table *disp) {
+ return (_glptr_IndexPointer) (GET_by_offset(disp, _gloffset_IndexPointer));
+}
+
+static inline void SET_IndexPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_IndexPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexub)(GLubyte);
+#define CALL_Indexub(disp, parameters) \
+ (* GET_Indexub(disp)) parameters
+static inline _glptr_Indexub GET_Indexub(struct _glapi_table *disp) {
+ return (_glptr_Indexub) (GET_by_offset(disp, _gloffset_Indexub));
+}
+
+static inline void SET_Indexub(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLubyte)) {
+ SET_by_offset(disp, _gloffset_Indexub, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Indexubv)(const GLubyte *);
+#define CALL_Indexubv(disp, parameters) \
+ (* GET_Indexubv(disp)) parameters
+static inline _glptr_Indexubv GET_Indexubv(struct _glapi_table *disp) {
+ return (_glptr_Indexubv) (GET_by_offset(disp, _gloffset_Indexubv));
+}
+
+static inline void SET_Indexubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_Indexubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InterleavedArrays)(GLenum, GLsizei, const GLvoid *);
+#define CALL_InterleavedArrays(disp, parameters) \
+ (* GET_InterleavedArrays(disp)) parameters
+static inline _glptr_InterleavedArrays GET_InterleavedArrays(struct _glapi_table *disp) {
+ return (_glptr_InterleavedArrays) (GET_by_offset(disp, _gloffset_InterleavedArrays));
+}
+
+static inline void SET_InterleavedArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_InterleavedArrays, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NormalPointer)(GLenum, GLsizei, const GLvoid *);
+#define CALL_NormalPointer(disp, parameters) \
+ (* GET_NormalPointer(disp)) parameters
+static inline _glptr_NormalPointer GET_NormalPointer(struct _glapi_table *disp) {
+ return (_glptr_NormalPointer) (GET_by_offset(disp, _gloffset_NormalPointer));
+}
+
+static inline void SET_NormalPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_NormalPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonOffset)(GLfloat, GLfloat);
+#define CALL_PolygonOffset(disp, parameters) \
+ (* GET_PolygonOffset(disp)) parameters
+static inline _glptr_PolygonOffset GET_PolygonOffset(struct _glapi_table *disp) {
+ return (_glptr_PolygonOffset) (GET_by_offset(disp, _gloffset_PolygonOffset));
+}
+
+static inline void SET_PolygonOffset(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PolygonOffset, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordPointer)(GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_TexCoordPointer(disp, parameters) \
+ (* GET_TexCoordPointer(disp)) parameters
+static inline _glptr_TexCoordPointer GET_TexCoordPointer(struct _glapi_table *disp) {
+ return (_glptr_TexCoordPointer) (GET_by_offset(disp, _gloffset_TexCoordPointer));
+}
+
+static inline void SET_TexCoordPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexCoordPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexPointer)(GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_VertexPointer(disp, parameters) \
+ (* GET_VertexPointer(disp)) parameters
+static inline _glptr_VertexPointer GET_VertexPointer(struct _glapi_table *disp) {
+ return (_glptr_VertexPointer) (GET_by_offset(disp, _gloffset_VertexPointer));
+}
+
+static inline void SET_VertexPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexPointer, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_AreTexturesResident)(GLsizei, const GLuint *, GLboolean *);
+#define CALL_AreTexturesResident(disp, parameters) \
+ (* GET_AreTexturesResident(disp)) parameters
+static inline _glptr_AreTexturesResident GET_AreTexturesResident(struct _glapi_table *disp) {
+ return (_glptr_AreTexturesResident) (GET_by_offset(disp, _gloffset_AreTexturesResident));
+}
+
+static inline void SET_AreTexturesResident(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLsizei, const GLuint *, GLboolean *)) {
+ SET_by_offset(disp, _gloffset_AreTexturesResident, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTexImage1D)(GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLint);
+#define CALL_CopyTexImage1D(disp, parameters) \
+ (* GET_CopyTexImage1D(disp)) parameters
+static inline _glptr_CopyTexImage1D GET_CopyTexImage1D(struct _glapi_table *disp) {
+ return (_glptr_CopyTexImage1D) (GET_by_offset(disp, _gloffset_CopyTexImage1D));
+}
+
+static inline void SET_CopyTexImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLint)) {
+ SET_by_offset(disp, _gloffset_CopyTexImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTexImage2D)(GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLsizei, GLint);
+#define CALL_CopyTexImage2D(disp, parameters) \
+ (* GET_CopyTexImage2D(disp)) parameters
+static inline _glptr_CopyTexImage2D GET_CopyTexImage2D(struct _glapi_table *disp) {
+ return (_glptr_CopyTexImage2D) (GET_by_offset(disp, _gloffset_CopyTexImage2D));
+}
+
+static inline void SET_CopyTexImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLint, GLint, GLsizei, GLsizei, GLint)) {
+ SET_by_offset(disp, _gloffset_CopyTexImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTexSubImage1D)(GLenum, GLint, GLint, GLint, GLint, GLsizei);
+#define CALL_CopyTexSubImage1D(disp, parameters) \
+ (* GET_CopyTexSubImage1D(disp)) parameters
+static inline _glptr_CopyTexSubImage1D GET_CopyTexSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_CopyTexSubImage1D) (GET_by_offset(disp, _gloffset_CopyTexSubImage1D));
+}
+
+static inline void SET_CopyTexSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTexSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTexSubImage2D)(GLenum, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#define CALL_CopyTexSubImage2D(disp, parameters) \
+ (* GET_CopyTexSubImage2D(disp)) parameters
+static inline _glptr_CopyTexSubImage2D GET_CopyTexSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_CopyTexSubImage2D) (GET_by_offset(disp, _gloffset_CopyTexSubImage2D));
+}
+
+static inline void SET_CopyTexSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTexSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteTextures)(GLsizei, const GLuint *);
+#define CALL_DeleteTextures(disp, parameters) \
+ (* GET_DeleteTextures(disp)) parameters
+static inline _glptr_DeleteTextures GET_DeleteTextures(struct _glapi_table *disp) {
+ return (_glptr_DeleteTextures) (GET_by_offset(disp, _gloffset_DeleteTextures));
+}
+
+static inline void SET_DeleteTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenTextures)(GLsizei, GLuint *);
+#define CALL_GenTextures(disp, parameters) \
+ (* GET_GenTextures(disp)) parameters
+static inline _glptr_GenTextures GET_GenTextures(struct _glapi_table *disp) {
+ return (_glptr_GenTextures) (GET_by_offset(disp, _gloffset_GenTextures));
+}
+
+static inline void SET_GenTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPointerv)(GLenum, GLvoid **);
+#define CALL_GetPointerv(disp, parameters) \
+ (* GET_GetPointerv(disp)) parameters
+static inline _glptr_GetPointerv GET_GetPointerv(struct _glapi_table *disp) {
+ return (_glptr_GetPointerv) (GET_by_offset(disp, _gloffset_GetPointerv));
+}
+
+static inline void SET_GetPointerv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLvoid **)) {
+ SET_by_offset(disp, _gloffset_GetPointerv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsTexture)(GLuint);
+#define CALL_IsTexture(disp, parameters) \
+ (* GET_IsTexture(disp)) parameters
+static inline _glptr_IsTexture GET_IsTexture(struct _glapi_table *disp) {
+ return (_glptr_IsTexture) (GET_by_offset(disp, _gloffset_IsTexture));
+}
+
+static inline void SET_IsTexture(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PrioritizeTextures)(GLsizei, const GLuint *, const GLclampf *);
+#define CALL_PrioritizeTextures(disp, parameters) \
+ (* GET_PrioritizeTextures(disp)) parameters
+static inline _glptr_PrioritizeTextures GET_PrioritizeTextures(struct _glapi_table *disp) {
+ return (_glptr_PrioritizeTextures) (GET_by_offset(disp, _gloffset_PrioritizeTextures));
+}
+
+static inline void SET_PrioritizeTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *, const GLclampf *)) {
+ SET_by_offset(disp, _gloffset_PrioritizeTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexSubImage1D)(GLenum, GLint, GLint, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TexSubImage1D(disp, parameters) \
+ (* GET_TexSubImage1D(disp)) parameters
+static inline _glptr_TexSubImage1D GET_TexSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_TexSubImage1D) (GET_by_offset(disp, _gloffset_TexSubImage1D));
+}
+
+static inline void SET_TexSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexSubImage2D)(GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TexSubImage2D(disp, parameters) \
+ (* GET_TexSubImage2D(disp)) parameters
+static inline _glptr_TexSubImage2D GET_TexSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_TexSubImage2D) (GET_by_offset(disp, _gloffset_TexSubImage2D));
+}
+
+static inline void SET_TexSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PopClientAttrib)(void);
+#define CALL_PopClientAttrib(disp, parameters) \
+ (* GET_PopClientAttrib(disp)) parameters
+static inline _glptr_PopClientAttrib GET_PopClientAttrib(struct _glapi_table *disp) {
+ return (_glptr_PopClientAttrib) (GET_by_offset(disp, _gloffset_PopClientAttrib));
+}
+
+static inline void SET_PopClientAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PopClientAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PushClientAttrib)(GLbitfield);
+#define CALL_PushClientAttrib(disp, parameters) \
+ (* GET_PushClientAttrib(disp)) parameters
+static inline _glptr_PushClientAttrib GET_PushClientAttrib(struct _glapi_table *disp) {
+ return (_glptr_PushClientAttrib) (GET_by_offset(disp, _gloffset_PushClientAttrib));
+}
+
+static inline void SET_PushClientAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbitfield)) {
+ SET_by_offset(disp, _gloffset_PushClientAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendColor)(GLclampf, GLclampf, GLclampf, GLclampf);
+#define CALL_BlendColor(disp, parameters) \
+ (* GET_BlendColor(disp)) parameters
+static inline _glptr_BlendColor GET_BlendColor(struct _glapi_table *disp) {
+ return (_glptr_BlendColor) (GET_by_offset(disp, _gloffset_BlendColor));
+}
+
+static inline void SET_BlendColor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf, GLclampf, GLclampf, GLclampf)) {
+ SET_by_offset(disp, _gloffset_BlendColor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendEquation)(GLenum);
+#define CALL_BlendEquation(disp, parameters) \
+ (* GET_BlendEquation(disp)) parameters
+static inline _glptr_BlendEquation GET_BlendEquation(struct _glapi_table *disp) {
+ return (_glptr_BlendEquation) (GET_by_offset(disp, _gloffset_BlendEquation));
+}
+
+static inline void SET_BlendEquation(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendEquation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawRangeElements)(GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *);
+#define CALL_DrawRangeElements(disp, parameters) \
+ (* GET_DrawRangeElements(disp)) parameters
+static inline _glptr_DrawRangeElements GET_DrawRangeElements(struct _glapi_table *disp) {
+ return (_glptr_DrawRangeElements) (GET_by_offset(disp, _gloffset_DrawRangeElements));
+}
+
+static inline void SET_DrawRangeElements(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DrawRangeElements, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorTable)(GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_ColorTable(disp, parameters) \
+ (* GET_ColorTable(disp)) parameters
+static inline _glptr_ColorTable GET_ColorTable(struct _glapi_table *disp) {
+ return (_glptr_ColorTable) (GET_by_offset(disp, _gloffset_ColorTable));
+}
+
+static inline void SET_ColorTable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ColorTable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorTableParameterfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_ColorTableParameterfv(disp, parameters) \
+ (* GET_ColorTableParameterfv(disp)) parameters
+static inline _glptr_ColorTableParameterfv GET_ColorTableParameterfv(struct _glapi_table *disp) {
+ return (_glptr_ColorTableParameterfv) (GET_by_offset(disp, _gloffset_ColorTableParameterfv));
+}
+
+static inline void SET_ColorTableParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ColorTableParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorTableParameteriv)(GLenum, GLenum, const GLint *);
+#define CALL_ColorTableParameteriv(disp, parameters) \
+ (* GET_ColorTableParameteriv(disp)) parameters
+static inline _glptr_ColorTableParameteriv GET_ColorTableParameteriv(struct _glapi_table *disp) {
+ return (_glptr_ColorTableParameteriv) (GET_by_offset(disp, _gloffset_ColorTableParameteriv));
+}
+
+static inline void SET_ColorTableParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ColorTableParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyColorTable)(GLenum, GLenum, GLint, GLint, GLsizei);
+#define CALL_CopyColorTable(disp, parameters) \
+ (* GET_CopyColorTable(disp)) parameters
+static inline _glptr_CopyColorTable GET_CopyColorTable(struct _glapi_table *disp) {
+ return (_glptr_CopyColorTable) (GET_by_offset(disp, _gloffset_CopyColorTable));
+}
+
+static inline void SET_CopyColorTable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyColorTable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetColorTable)(GLenum, GLenum, GLenum, GLvoid *);
+#define CALL_GetColorTable(disp, parameters) \
+ (* GET_GetColorTable(disp)) parameters
+static inline _glptr_GetColorTable GET_GetColorTable(struct _glapi_table *disp) {
+ return (_glptr_GetColorTable) (GET_by_offset(disp, _gloffset_GetColorTable));
+}
+
+static inline void SET_GetColorTable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetColorTable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetColorTableParameterfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetColorTableParameterfv(disp, parameters) \
+ (* GET_GetColorTableParameterfv(disp)) parameters
+static inline _glptr_GetColorTableParameterfv GET_GetColorTableParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetColorTableParameterfv) (GET_by_offset(disp, _gloffset_GetColorTableParameterfv));
+}
+
+static inline void SET_GetColorTableParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetColorTableParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetColorTableParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetColorTableParameteriv(disp, parameters) \
+ (* GET_GetColorTableParameteriv(disp)) parameters
+static inline _glptr_GetColorTableParameteriv GET_GetColorTableParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetColorTableParameteriv) (GET_by_offset(disp, _gloffset_GetColorTableParameteriv));
+}
+
+static inline void SET_GetColorTableParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetColorTableParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorSubTable)(GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_ColorSubTable(disp, parameters) \
+ (* GET_ColorSubTable(disp)) parameters
+static inline _glptr_ColorSubTable GET_ColorSubTable(struct _glapi_table *disp) {
+ return (_glptr_ColorSubTable) (GET_by_offset(disp, _gloffset_ColorSubTable));
+}
+
+static inline void SET_ColorSubTable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ColorSubTable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyColorSubTable)(GLenum, GLsizei, GLint, GLint, GLsizei);
+#define CALL_CopyColorSubTable(disp, parameters) \
+ (* GET_CopyColorSubTable(disp)) parameters
+static inline _glptr_CopyColorSubTable GET_CopyColorSubTable(struct _glapi_table *disp) {
+ return (_glptr_CopyColorSubTable) (GET_by_offset(disp, _gloffset_CopyColorSubTable));
+}
+
+static inline void SET_CopyColorSubTable(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLint, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyColorSubTable, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionFilter1D)(GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_ConvolutionFilter1D(disp, parameters) \
+ (* GET_ConvolutionFilter1D(disp)) parameters
+static inline _glptr_ConvolutionFilter1D GET_ConvolutionFilter1D(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionFilter1D) (GET_by_offset(disp, _gloffset_ConvolutionFilter1D));
+}
+
+static inline void SET_ConvolutionFilter1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ConvolutionFilter1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionFilter2D)(GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_ConvolutionFilter2D(disp, parameters) \
+ (* GET_ConvolutionFilter2D(disp)) parameters
+static inline _glptr_ConvolutionFilter2D GET_ConvolutionFilter2D(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionFilter2D) (GET_by_offset(disp, _gloffset_ConvolutionFilter2D));
+}
+
+static inline void SET_ConvolutionFilter2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ConvolutionFilter2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionParameterf)(GLenum, GLenum, GLfloat);
+#define CALL_ConvolutionParameterf(disp, parameters) \
+ (* GET_ConvolutionParameterf(disp)) parameters
+static inline _glptr_ConvolutionParameterf GET_ConvolutionParameterf(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionParameterf) (GET_by_offset(disp, _gloffset_ConvolutionParameterf));
+}
+
+static inline void SET_ConvolutionParameterf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ConvolutionParameterf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionParameterfv)(GLenum, GLenum, const GLfloat *);
+#define CALL_ConvolutionParameterfv(disp, parameters) \
+ (* GET_ConvolutionParameterfv(disp)) parameters
+static inline _glptr_ConvolutionParameterfv GET_ConvolutionParameterfv(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionParameterfv) (GET_by_offset(disp, _gloffset_ConvolutionParameterfv));
+}
+
+static inline void SET_ConvolutionParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ConvolutionParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionParameteri)(GLenum, GLenum, GLint);
+#define CALL_ConvolutionParameteri(disp, parameters) \
+ (* GET_ConvolutionParameteri(disp)) parameters
+static inline _glptr_ConvolutionParameteri GET_ConvolutionParameteri(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionParameteri) (GET_by_offset(disp, _gloffset_ConvolutionParameteri));
+}
+
+static inline void SET_ConvolutionParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_ConvolutionParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ConvolutionParameteriv)(GLenum, GLenum, const GLint *);
+#define CALL_ConvolutionParameteriv(disp, parameters) \
+ (* GET_ConvolutionParameteriv(disp)) parameters
+static inline _glptr_ConvolutionParameteriv GET_ConvolutionParameteriv(struct _glapi_table *disp) {
+ return (_glptr_ConvolutionParameteriv) (GET_by_offset(disp, _gloffset_ConvolutionParameteriv));
+}
+
+static inline void SET_ConvolutionParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ConvolutionParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyConvolutionFilter1D)(GLenum, GLenum, GLint, GLint, GLsizei);
+#define CALL_CopyConvolutionFilter1D(disp, parameters) \
+ (* GET_CopyConvolutionFilter1D(disp)) parameters
+static inline _glptr_CopyConvolutionFilter1D GET_CopyConvolutionFilter1D(struct _glapi_table *disp) {
+ return (_glptr_CopyConvolutionFilter1D) (GET_by_offset(disp, _gloffset_CopyConvolutionFilter1D));
+}
+
+static inline void SET_CopyConvolutionFilter1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyConvolutionFilter1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyConvolutionFilter2D)(GLenum, GLenum, GLint, GLint, GLsizei, GLsizei);
+#define CALL_CopyConvolutionFilter2D(disp, parameters) \
+ (* GET_CopyConvolutionFilter2D(disp)) parameters
+static inline _glptr_CopyConvolutionFilter2D GET_CopyConvolutionFilter2D(struct _glapi_table *disp) {
+ return (_glptr_CopyConvolutionFilter2D) (GET_by_offset(disp, _gloffset_CopyConvolutionFilter2D));
+}
+
+static inline void SET_CopyConvolutionFilter2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyConvolutionFilter2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetConvolutionFilter)(GLenum, GLenum, GLenum, GLvoid *);
+#define CALL_GetConvolutionFilter(disp, parameters) \
+ (* GET_GetConvolutionFilter(disp)) parameters
+static inline _glptr_GetConvolutionFilter GET_GetConvolutionFilter(struct _glapi_table *disp) {
+ return (_glptr_GetConvolutionFilter) (GET_by_offset(disp, _gloffset_GetConvolutionFilter));
+}
+
+static inline void SET_GetConvolutionFilter(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetConvolutionFilter, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetConvolutionParameterfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetConvolutionParameterfv(disp, parameters) \
+ (* GET_GetConvolutionParameterfv(disp)) parameters
+static inline _glptr_GetConvolutionParameterfv GET_GetConvolutionParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetConvolutionParameterfv) (GET_by_offset(disp, _gloffset_GetConvolutionParameterfv));
+}
+
+static inline void SET_GetConvolutionParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetConvolutionParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetConvolutionParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetConvolutionParameteriv(disp, parameters) \
+ (* GET_GetConvolutionParameteriv(disp)) parameters
+static inline _glptr_GetConvolutionParameteriv GET_GetConvolutionParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetConvolutionParameteriv) (GET_by_offset(disp, _gloffset_GetConvolutionParameteriv));
+}
+
+static inline void SET_GetConvolutionParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetConvolutionParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSeparableFilter)(GLenum, GLenum, GLenum, GLvoid *, GLvoid *, GLvoid *);
+#define CALL_GetSeparableFilter(disp, parameters) \
+ (* GET_GetSeparableFilter(disp)) parameters
+static inline _glptr_GetSeparableFilter GET_GetSeparableFilter(struct _glapi_table *disp) {
+ return (_glptr_GetSeparableFilter) (GET_by_offset(disp, _gloffset_GetSeparableFilter));
+}
+
+static inline void SET_GetSeparableFilter(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLvoid *, GLvoid *, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetSeparableFilter, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SeparableFilter2D)(GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *, const GLvoid *);
+#define CALL_SeparableFilter2D(disp, parameters) \
+ (* GET_SeparableFilter2D(disp)) parameters
+static inline _glptr_SeparableFilter2D GET_SeparableFilter2D(struct _glapi_table *disp) {
+ return (_glptr_SeparableFilter2D) (GET_by_offset(disp, _gloffset_SeparableFilter2D));
+}
+
+static inline void SET_SeparableFilter2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_SeparableFilter2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetHistogram)(GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+#define CALL_GetHistogram(disp, parameters) \
+ (* GET_GetHistogram(disp)) parameters
+static inline _glptr_GetHistogram GET_GetHistogram(struct _glapi_table *disp) {
+ return (_glptr_GetHistogram) (GET_by_offset(disp, _gloffset_GetHistogram));
+}
+
+static inline void SET_GetHistogram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLboolean, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetHistogram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetHistogramParameterfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetHistogramParameterfv(disp, parameters) \
+ (* GET_GetHistogramParameterfv(disp)) parameters
+static inline _glptr_GetHistogramParameterfv GET_GetHistogramParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetHistogramParameterfv) (GET_by_offset(disp, _gloffset_GetHistogramParameterfv));
+}
+
+static inline void SET_GetHistogramParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetHistogramParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetHistogramParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetHistogramParameteriv(disp, parameters) \
+ (* GET_GetHistogramParameteriv(disp)) parameters
+static inline _glptr_GetHistogramParameteriv GET_GetHistogramParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetHistogramParameteriv) (GET_by_offset(disp, _gloffset_GetHistogramParameteriv));
+}
+
+static inline void SET_GetHistogramParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetHistogramParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMinmax)(GLenum, GLboolean, GLenum, GLenum, GLvoid *);
+#define CALL_GetMinmax(disp, parameters) \
+ (* GET_GetMinmax(disp)) parameters
+static inline _glptr_GetMinmax GET_GetMinmax(struct _glapi_table *disp) {
+ return (_glptr_GetMinmax) (GET_by_offset(disp, _gloffset_GetMinmax));
+}
+
+static inline void SET_GetMinmax(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLboolean, GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetMinmax, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMinmaxParameterfv)(GLenum, GLenum, GLfloat *);
+#define CALL_GetMinmaxParameterfv(disp, parameters) \
+ (* GET_GetMinmaxParameterfv(disp)) parameters
+static inline _glptr_GetMinmaxParameterfv GET_GetMinmaxParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetMinmaxParameterfv) (GET_by_offset(disp, _gloffset_GetMinmaxParameterfv));
+}
+
+static inline void SET_GetMinmaxParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetMinmaxParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMinmaxParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetMinmaxParameteriv(disp, parameters) \
+ (* GET_GetMinmaxParameteriv(disp)) parameters
+static inline _glptr_GetMinmaxParameteriv GET_GetMinmaxParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetMinmaxParameteriv) (GET_by_offset(disp, _gloffset_GetMinmaxParameteriv));
+}
+
+static inline void SET_GetMinmaxParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetMinmaxParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Histogram)(GLenum, GLsizei, GLenum, GLboolean);
+#define CALL_Histogram(disp, parameters) \
+ (* GET_Histogram(disp)) parameters
+static inline _glptr_Histogram GET_Histogram(struct _glapi_table *disp) {
+ return (_glptr_Histogram) (GET_by_offset(disp, _gloffset_Histogram));
+}
+
+static inline void SET_Histogram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLboolean)) {
+ SET_by_offset(disp, _gloffset_Histogram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Minmax)(GLenum, GLenum, GLboolean);
+#define CALL_Minmax(disp, parameters) \
+ (* GET_Minmax(disp)) parameters
+static inline _glptr_Minmax GET_Minmax(struct _glapi_table *disp) {
+ return (_glptr_Minmax) (GET_by_offset(disp, _gloffset_Minmax));
+}
+
+static inline void SET_Minmax(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLboolean)) {
+ SET_by_offset(disp, _gloffset_Minmax, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ResetHistogram)(GLenum);
+#define CALL_ResetHistogram(disp, parameters) \
+ (* GET_ResetHistogram(disp)) parameters
+static inline _glptr_ResetHistogram GET_ResetHistogram(struct _glapi_table *disp) {
+ return (_glptr_ResetHistogram) (GET_by_offset(disp, _gloffset_ResetHistogram));
+}
+
+static inline void SET_ResetHistogram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ResetHistogram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ResetMinmax)(GLenum);
+#define CALL_ResetMinmax(disp, parameters) \
+ (* GET_ResetMinmax(disp)) parameters
+static inline _glptr_ResetMinmax GET_ResetMinmax(struct _glapi_table *disp) {
+ return (_glptr_ResetMinmax) (GET_by_offset(disp, _gloffset_ResetMinmax));
+}
+
+static inline void SET_ResetMinmax(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ResetMinmax, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexImage3D)(GLenum, GLint, GLint, GLsizei, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *);
+#define CALL_TexImage3D(disp, parameters) \
+ (* GET_TexImage3D(disp)) parameters
+static inline _glptr_TexImage3D GET_TexImage3D(struct _glapi_table *disp) {
+ return (_glptr_TexImage3D) (GET_by_offset(disp, _gloffset_TexImage3D));
+}
+
+static inline void SET_TexImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLsizei, GLsizei, GLsizei, GLint, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexSubImage3D)(GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TexSubImage3D(disp, parameters) \
+ (* GET_TexSubImage3D(disp)) parameters
+static inline _glptr_TexSubImage3D GET_TexSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_TexSubImage3D) (GET_by_offset(disp, _gloffset_TexSubImage3D));
+}
+
+static inline void SET_TexSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTexSubImage3D)(GLenum, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#define CALL_CopyTexSubImage3D(disp, parameters) \
+ (* GET_CopyTexSubImage3D(disp)) parameters
+static inline _glptr_CopyTexSubImage3D GET_CopyTexSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_CopyTexSubImage3D) (GET_by_offset(disp, _gloffset_CopyTexSubImage3D));
+}
+
+static inline void SET_CopyTexSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTexSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ActiveTexture)(GLenum);
+#define CALL_ActiveTexture(disp, parameters) \
+ (* GET_ActiveTexture(disp)) parameters
+static inline _glptr_ActiveTexture GET_ActiveTexture(struct _glapi_table *disp) {
+ return (_glptr_ActiveTexture) (GET_by_offset(disp, _gloffset_ActiveTexture));
+}
+
+static inline void SET_ActiveTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ActiveTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClientActiveTexture)(GLenum);
+#define CALL_ClientActiveTexture(disp, parameters) \
+ (* GET_ClientActiveTexture(disp)) parameters
+static inline _glptr_ClientActiveTexture GET_ClientActiveTexture(struct _glapi_table *disp) {
+ return (_glptr_ClientActiveTexture) (GET_by_offset(disp, _gloffset_ClientActiveTexture));
+}
+
+static inline void SET_ClientActiveTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ClientActiveTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1d)(GLenum, GLdouble);
+#define CALL_MultiTexCoord1d(disp, parameters) \
+ (* GET_MultiTexCoord1d(disp)) parameters
+static inline _glptr_MultiTexCoord1d GET_MultiTexCoord1d(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1d) (GET_by_offset(disp, _gloffset_MultiTexCoord1d));
+}
+
+static inline void SET_MultiTexCoord1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1dv)(GLenum, const GLdouble *);
+#define CALL_MultiTexCoord1dv(disp, parameters) \
+ (* GET_MultiTexCoord1dv(disp)) parameters
+static inline _glptr_MultiTexCoord1dv GET_MultiTexCoord1dv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1dv) (GET_by_offset(disp, _gloffset_MultiTexCoord1dv));
+}
+
+static inline void SET_MultiTexCoord1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1fARB)(GLenum, GLfloat);
+#define CALL_MultiTexCoord1fARB(disp, parameters) \
+ (* GET_MultiTexCoord1fARB(disp)) parameters
+static inline _glptr_MultiTexCoord1fARB GET_MultiTexCoord1fARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1fARB) (GET_by_offset(disp, _gloffset_MultiTexCoord1fARB));
+}
+
+static inline void SET_MultiTexCoord1fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1fvARB)(GLenum, const GLfloat *);
+#define CALL_MultiTexCoord1fvARB(disp, parameters) \
+ (* GET_MultiTexCoord1fvARB(disp)) parameters
+static inline _glptr_MultiTexCoord1fvARB GET_MultiTexCoord1fvARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1fvARB) (GET_by_offset(disp, _gloffset_MultiTexCoord1fvARB));
+}
+
+static inline void SET_MultiTexCoord1fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1i)(GLenum, GLint);
+#define CALL_MultiTexCoord1i(disp, parameters) \
+ (* GET_MultiTexCoord1i(disp)) parameters
+static inline _glptr_MultiTexCoord1i GET_MultiTexCoord1i(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1i) (GET_by_offset(disp, _gloffset_MultiTexCoord1i));
+}
+
+static inline void SET_MultiTexCoord1i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1iv)(GLenum, const GLint *);
+#define CALL_MultiTexCoord1iv(disp, parameters) \
+ (* GET_MultiTexCoord1iv(disp)) parameters
+static inline _glptr_MultiTexCoord1iv GET_MultiTexCoord1iv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1iv) (GET_by_offset(disp, _gloffset_MultiTexCoord1iv));
+}
+
+static inline void SET_MultiTexCoord1iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1s)(GLenum, GLshort);
+#define CALL_MultiTexCoord1s(disp, parameters) \
+ (* GET_MultiTexCoord1s(disp)) parameters
+static inline _glptr_MultiTexCoord1s GET_MultiTexCoord1s(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1s) (GET_by_offset(disp, _gloffset_MultiTexCoord1s));
+}
+
+static inline void SET_MultiTexCoord1s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLshort)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord1sv)(GLenum, const GLshort *);
+#define CALL_MultiTexCoord1sv(disp, parameters) \
+ (* GET_MultiTexCoord1sv(disp)) parameters
+static inline _glptr_MultiTexCoord1sv GET_MultiTexCoord1sv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord1sv) (GET_by_offset(disp, _gloffset_MultiTexCoord1sv));
+}
+
+static inline void SET_MultiTexCoord1sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord1sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2d)(GLenum, GLdouble, GLdouble);
+#define CALL_MultiTexCoord2d(disp, parameters) \
+ (* GET_MultiTexCoord2d(disp)) parameters
+static inline _glptr_MultiTexCoord2d GET_MultiTexCoord2d(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2d) (GET_by_offset(disp, _gloffset_MultiTexCoord2d));
+}
+
+static inline void SET_MultiTexCoord2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2dv)(GLenum, const GLdouble *);
+#define CALL_MultiTexCoord2dv(disp, parameters) \
+ (* GET_MultiTexCoord2dv(disp)) parameters
+static inline _glptr_MultiTexCoord2dv GET_MultiTexCoord2dv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2dv) (GET_by_offset(disp, _gloffset_MultiTexCoord2dv));
+}
+
+static inline void SET_MultiTexCoord2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2fARB)(GLenum, GLfloat, GLfloat);
+#define CALL_MultiTexCoord2fARB(disp, parameters) \
+ (* GET_MultiTexCoord2fARB(disp)) parameters
+static inline _glptr_MultiTexCoord2fARB GET_MultiTexCoord2fARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2fARB) (GET_by_offset(disp, _gloffset_MultiTexCoord2fARB));
+}
+
+static inline void SET_MultiTexCoord2fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2fvARB)(GLenum, const GLfloat *);
+#define CALL_MultiTexCoord2fvARB(disp, parameters) \
+ (* GET_MultiTexCoord2fvARB(disp)) parameters
+static inline _glptr_MultiTexCoord2fvARB GET_MultiTexCoord2fvARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2fvARB) (GET_by_offset(disp, _gloffset_MultiTexCoord2fvARB));
+}
+
+static inline void SET_MultiTexCoord2fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2i)(GLenum, GLint, GLint);
+#define CALL_MultiTexCoord2i(disp, parameters) \
+ (* GET_MultiTexCoord2i(disp)) parameters
+static inline _glptr_MultiTexCoord2i GET_MultiTexCoord2i(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2i) (GET_by_offset(disp, _gloffset_MultiTexCoord2i));
+}
+
+static inline void SET_MultiTexCoord2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2iv)(GLenum, const GLint *);
+#define CALL_MultiTexCoord2iv(disp, parameters) \
+ (* GET_MultiTexCoord2iv(disp)) parameters
+static inline _glptr_MultiTexCoord2iv GET_MultiTexCoord2iv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2iv) (GET_by_offset(disp, _gloffset_MultiTexCoord2iv));
+}
+
+static inline void SET_MultiTexCoord2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2s)(GLenum, GLshort, GLshort);
+#define CALL_MultiTexCoord2s(disp, parameters) \
+ (* GET_MultiTexCoord2s(disp)) parameters
+static inline _glptr_MultiTexCoord2s GET_MultiTexCoord2s(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2s) (GET_by_offset(disp, _gloffset_MultiTexCoord2s));
+}
+
+static inline void SET_MultiTexCoord2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord2sv)(GLenum, const GLshort *);
+#define CALL_MultiTexCoord2sv(disp, parameters) \
+ (* GET_MultiTexCoord2sv(disp)) parameters
+static inline _glptr_MultiTexCoord2sv GET_MultiTexCoord2sv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord2sv) (GET_by_offset(disp, _gloffset_MultiTexCoord2sv));
+}
+
+static inline void SET_MultiTexCoord2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3d)(GLenum, GLdouble, GLdouble, GLdouble);
+#define CALL_MultiTexCoord3d(disp, parameters) \
+ (* GET_MultiTexCoord3d(disp)) parameters
+static inline _glptr_MultiTexCoord3d GET_MultiTexCoord3d(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3d) (GET_by_offset(disp, _gloffset_MultiTexCoord3d));
+}
+
+static inline void SET_MultiTexCoord3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3dv)(GLenum, const GLdouble *);
+#define CALL_MultiTexCoord3dv(disp, parameters) \
+ (* GET_MultiTexCoord3dv(disp)) parameters
+static inline _glptr_MultiTexCoord3dv GET_MultiTexCoord3dv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3dv) (GET_by_offset(disp, _gloffset_MultiTexCoord3dv));
+}
+
+static inline void SET_MultiTexCoord3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3fARB)(GLenum, GLfloat, GLfloat, GLfloat);
+#define CALL_MultiTexCoord3fARB(disp, parameters) \
+ (* GET_MultiTexCoord3fARB(disp)) parameters
+static inline _glptr_MultiTexCoord3fARB GET_MultiTexCoord3fARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3fARB) (GET_by_offset(disp, _gloffset_MultiTexCoord3fARB));
+}
+
+static inline void SET_MultiTexCoord3fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3fvARB)(GLenum, const GLfloat *);
+#define CALL_MultiTexCoord3fvARB(disp, parameters) \
+ (* GET_MultiTexCoord3fvARB(disp)) parameters
+static inline _glptr_MultiTexCoord3fvARB GET_MultiTexCoord3fvARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3fvARB) (GET_by_offset(disp, _gloffset_MultiTexCoord3fvARB));
+}
+
+static inline void SET_MultiTexCoord3fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3i)(GLenum, GLint, GLint, GLint);
+#define CALL_MultiTexCoord3i(disp, parameters) \
+ (* GET_MultiTexCoord3i(disp)) parameters
+static inline _glptr_MultiTexCoord3i GET_MultiTexCoord3i(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3i) (GET_by_offset(disp, _gloffset_MultiTexCoord3i));
+}
+
+static inline void SET_MultiTexCoord3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3iv)(GLenum, const GLint *);
+#define CALL_MultiTexCoord3iv(disp, parameters) \
+ (* GET_MultiTexCoord3iv(disp)) parameters
+static inline _glptr_MultiTexCoord3iv GET_MultiTexCoord3iv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3iv) (GET_by_offset(disp, _gloffset_MultiTexCoord3iv));
+}
+
+static inline void SET_MultiTexCoord3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3s)(GLenum, GLshort, GLshort, GLshort);
+#define CALL_MultiTexCoord3s(disp, parameters) \
+ (* GET_MultiTexCoord3s(disp)) parameters
+static inline _glptr_MultiTexCoord3s GET_MultiTexCoord3s(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3s) (GET_by_offset(disp, _gloffset_MultiTexCoord3s));
+}
+
+static inline void SET_MultiTexCoord3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord3sv)(GLenum, const GLshort *);
+#define CALL_MultiTexCoord3sv(disp, parameters) \
+ (* GET_MultiTexCoord3sv(disp)) parameters
+static inline _glptr_MultiTexCoord3sv GET_MultiTexCoord3sv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord3sv) (GET_by_offset(disp, _gloffset_MultiTexCoord3sv));
+}
+
+static inline void SET_MultiTexCoord3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4d)(GLenum, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_MultiTexCoord4d(disp, parameters) \
+ (* GET_MultiTexCoord4d(disp)) parameters
+static inline _glptr_MultiTexCoord4d GET_MultiTexCoord4d(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4d) (GET_by_offset(disp, _gloffset_MultiTexCoord4d));
+}
+
+static inline void SET_MultiTexCoord4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4dv)(GLenum, const GLdouble *);
+#define CALL_MultiTexCoord4dv(disp, parameters) \
+ (* GET_MultiTexCoord4dv(disp)) parameters
+static inline _glptr_MultiTexCoord4dv GET_MultiTexCoord4dv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4dv) (GET_by_offset(disp, _gloffset_MultiTexCoord4dv));
+}
+
+static inline void SET_MultiTexCoord4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4fARB)(GLenum, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_MultiTexCoord4fARB(disp, parameters) \
+ (* GET_MultiTexCoord4fARB(disp)) parameters
+static inline _glptr_MultiTexCoord4fARB GET_MultiTexCoord4fARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4fARB) (GET_by_offset(disp, _gloffset_MultiTexCoord4fARB));
+}
+
+static inline void SET_MultiTexCoord4fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4fvARB)(GLenum, const GLfloat *);
+#define CALL_MultiTexCoord4fvARB(disp, parameters) \
+ (* GET_MultiTexCoord4fvARB(disp)) parameters
+static inline _glptr_MultiTexCoord4fvARB GET_MultiTexCoord4fvARB(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4fvARB) (GET_by_offset(disp, _gloffset_MultiTexCoord4fvARB));
+}
+
+static inline void SET_MultiTexCoord4fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4i)(GLenum, GLint, GLint, GLint, GLint);
+#define CALL_MultiTexCoord4i(disp, parameters) \
+ (* GET_MultiTexCoord4i(disp)) parameters
+static inline _glptr_MultiTexCoord4i GET_MultiTexCoord4i(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4i) (GET_by_offset(disp, _gloffset_MultiTexCoord4i));
+}
+
+static inline void SET_MultiTexCoord4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4iv)(GLenum, const GLint *);
+#define CALL_MultiTexCoord4iv(disp, parameters) \
+ (* GET_MultiTexCoord4iv(disp)) parameters
+static inline _glptr_MultiTexCoord4iv GET_MultiTexCoord4iv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4iv) (GET_by_offset(disp, _gloffset_MultiTexCoord4iv));
+}
+
+static inline void SET_MultiTexCoord4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4s)(GLenum, GLshort, GLshort, GLshort, GLshort);
+#define CALL_MultiTexCoord4s(disp, parameters) \
+ (* GET_MultiTexCoord4s(disp)) parameters
+static inline _glptr_MultiTexCoord4s GET_MultiTexCoord4s(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4s) (GET_by_offset(disp, _gloffset_MultiTexCoord4s));
+}
+
+static inline void SET_MultiTexCoord4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4sv)(GLenum, const GLshort *);
+#define CALL_MultiTexCoord4sv(disp, parameters) \
+ (* GET_MultiTexCoord4sv(disp)) parameters
+static inline _glptr_MultiTexCoord4sv GET_MultiTexCoord4sv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4sv) (GET_by_offset(disp, _gloffset_MultiTexCoord4sv));
+}
+
+static inline void SET_MultiTexCoord4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexImage1D)(GLenum, GLint, GLenum, GLsizei, GLint, GLsizei, const GLvoid *);
+#define CALL_CompressedTexImage1D(disp, parameters) \
+ (* GET_CompressedTexImage1D(disp)) parameters
+static inline _glptr_CompressedTexImage1D GET_CompressedTexImage1D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexImage1D) (GET_by_offset(disp, _gloffset_CompressedTexImage1D));
+}
+
+static inline void SET_CompressedTexImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLsizei, GLint, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexImage2D)(GLenum, GLint, GLenum, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+#define CALL_CompressedTexImage2D(disp, parameters) \
+ (* GET_CompressedTexImage2D(disp)) parameters
+static inline _glptr_CompressedTexImage2D GET_CompressedTexImage2D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexImage2D) (GET_by_offset(disp, _gloffset_CompressedTexImage2D));
+}
+
+static inline void SET_CompressedTexImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexImage3D)(GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *);
+#define CALL_CompressedTexImage3D(disp, parameters) \
+ (* GET_CompressedTexImage3D(disp)) parameters
+static inline _glptr_CompressedTexImage3D GET_CompressedTexImage3D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexImage3D) (GET_by_offset(disp, _gloffset_CompressedTexImage3D));
+}
+
+static inline void SET_CompressedTexImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLsizei, GLsizei, GLsizei, GLint, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexSubImage1D)(GLenum, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTexSubImage1D(disp, parameters) \
+ (* GET_CompressedTexSubImage1D(disp)) parameters
+static inline _glptr_CompressedTexSubImage1D GET_CompressedTexSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexSubImage1D) (GET_by_offset(disp, _gloffset_CompressedTexSubImage1D));
+}
+
+static inline void SET_CompressedTexSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexSubImage2D)(GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTexSubImage2D(disp, parameters) \
+ (* GET_CompressedTexSubImage2D(disp)) parameters
+static inline _glptr_CompressedTexSubImage2D GET_CompressedTexSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexSubImage2D) (GET_by_offset(disp, _gloffset_CompressedTexSubImage2D));
+}
+
+static inline void SET_CompressedTexSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTexSubImage3D)(GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTexSubImage3D(disp, parameters) \
+ (* GET_CompressedTexSubImage3D(disp)) parameters
+static inline _glptr_CompressedTexSubImage3D GET_CompressedTexSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTexSubImage3D) (GET_by_offset(disp, _gloffset_CompressedTexSubImage3D));
+}
+
+static inline void SET_CompressedTexSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTexSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetCompressedTexImage)(GLenum, GLint, GLvoid *);
+#define CALL_GetCompressedTexImage(disp, parameters) \
+ (* GET_GetCompressedTexImage(disp)) parameters
+static inline _glptr_GetCompressedTexImage GET_GetCompressedTexImage(struct _glapi_table *disp) {
+ return (_glptr_GetCompressedTexImage) (GET_by_offset(disp, _gloffset_GetCompressedTexImage));
+}
+
+static inline void SET_GetCompressedTexImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetCompressedTexImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadTransposeMatrixd)(const GLdouble *);
+#define CALL_LoadTransposeMatrixd(disp, parameters) \
+ (* GET_LoadTransposeMatrixd(disp)) parameters
+static inline _glptr_LoadTransposeMatrixd GET_LoadTransposeMatrixd(struct _glapi_table *disp) {
+ return (_glptr_LoadTransposeMatrixd) (GET_by_offset(disp, _gloffset_LoadTransposeMatrixd));
+}
+
+static inline void SET_LoadTransposeMatrixd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_LoadTransposeMatrixd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadTransposeMatrixf)(const GLfloat *);
+#define CALL_LoadTransposeMatrixf(disp, parameters) \
+ (* GET_LoadTransposeMatrixf(disp)) parameters
+static inline _glptr_LoadTransposeMatrixf GET_LoadTransposeMatrixf(struct _glapi_table *disp) {
+ return (_glptr_LoadTransposeMatrixf) (GET_by_offset(disp, _gloffset_LoadTransposeMatrixf));
+}
+
+static inline void SET_LoadTransposeMatrixf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_LoadTransposeMatrixf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultTransposeMatrixd)(const GLdouble *);
+#define CALL_MultTransposeMatrixd(disp, parameters) \
+ (* GET_MultTransposeMatrixd(disp)) parameters
+static inline _glptr_MultTransposeMatrixd GET_MultTransposeMatrixd(struct _glapi_table *disp) {
+ return (_glptr_MultTransposeMatrixd) (GET_by_offset(disp, _gloffset_MultTransposeMatrixd));
+}
+
+static inline void SET_MultTransposeMatrixd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_MultTransposeMatrixd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultTransposeMatrixf)(const GLfloat *);
+#define CALL_MultTransposeMatrixf(disp, parameters) \
+ (* GET_MultTransposeMatrixf(disp)) parameters
+static inline _glptr_MultTransposeMatrixf GET_MultTransposeMatrixf(struct _glapi_table *disp) {
+ return (_glptr_MultTransposeMatrixf) (GET_by_offset(disp, _gloffset_MultTransposeMatrixf));
+}
+
+static inline void SET_MultTransposeMatrixf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_MultTransposeMatrixf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SampleCoverage)(GLclampf, GLboolean);
+#define CALL_SampleCoverage(disp, parameters) \
+ (* GET_SampleCoverage(disp)) parameters
+static inline _glptr_SampleCoverage GET_SampleCoverage(struct _glapi_table *disp) {
+ return (_glptr_SampleCoverage) (GET_by_offset(disp, _gloffset_SampleCoverage));
+}
+
+static inline void SET_SampleCoverage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf, GLboolean)) {
+ SET_by_offset(disp, _gloffset_SampleCoverage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendFuncSeparate)(GLenum, GLenum, GLenum, GLenum);
+#define CALL_BlendFuncSeparate(disp, parameters) \
+ (* GET_BlendFuncSeparate(disp)) parameters
+static inline _glptr_BlendFuncSeparate GET_BlendFuncSeparate(struct _glapi_table *disp) {
+ return (_glptr_BlendFuncSeparate) (GET_by_offset(disp, _gloffset_BlendFuncSeparate));
+}
+
+static inline void SET_BlendFuncSeparate(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendFuncSeparate, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FogCoordPointer)(GLenum, GLsizei, const GLvoid *);
+#define CALL_FogCoordPointer(disp, parameters) \
+ (* GET_FogCoordPointer(disp)) parameters
+static inline _glptr_FogCoordPointer GET_FogCoordPointer(struct _glapi_table *disp) {
+ return (_glptr_FogCoordPointer) (GET_by_offset(disp, _gloffset_FogCoordPointer));
+}
+
+static inline void SET_FogCoordPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_FogCoordPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FogCoordd)(GLdouble);
+#define CALL_FogCoordd(disp, parameters) \
+ (* GET_FogCoordd(disp)) parameters
+static inline _glptr_FogCoordd GET_FogCoordd(struct _glapi_table *disp) {
+ return (_glptr_FogCoordd) (GET_by_offset(disp, _gloffset_FogCoordd));
+}
+
+static inline void SET_FogCoordd(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble)) {
+ SET_by_offset(disp, _gloffset_FogCoordd, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FogCoorddv)(const GLdouble *);
+#define CALL_FogCoorddv(disp, parameters) \
+ (* GET_FogCoorddv(disp)) parameters
+static inline _glptr_FogCoorddv GET_FogCoorddv(struct _glapi_table *disp) {
+ return (_glptr_FogCoorddv) (GET_by_offset(disp, _gloffset_FogCoorddv));
+}
+
+static inline void SET_FogCoorddv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_FogCoorddv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawArrays)(GLenum, const GLint *, const GLsizei *, GLsizei);
+#define CALL_MultiDrawArrays(disp, parameters) \
+ (* GET_MultiDrawArrays(disp)) parameters
+static inline _glptr_MultiDrawArrays GET_MultiDrawArrays(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawArrays) (GET_by_offset(disp, _gloffset_MultiDrawArrays));
+}
+
+static inline void SET_MultiDrawArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *, const GLsizei *, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawArrays, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameterf)(GLenum, GLfloat);
+#define CALL_PointParameterf(disp, parameters) \
+ (* GET_PointParameterf(disp)) parameters
+static inline _glptr_PointParameterf GET_PointParameterf(struct _glapi_table *disp) {
+ return (_glptr_PointParameterf) (GET_by_offset(disp, _gloffset_PointParameterf));
+}
+
+static inline void SET_PointParameterf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PointParameterf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameterfv)(GLenum, const GLfloat *);
+#define CALL_PointParameterfv(disp, parameters) \
+ (* GET_PointParameterfv(disp)) parameters
+static inline _glptr_PointParameterfv GET_PointParameterfv(struct _glapi_table *disp) {
+ return (_glptr_PointParameterfv) (GET_by_offset(disp, _gloffset_PointParameterfv));
+}
+
+static inline void SET_PointParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_PointParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameteri)(GLenum, GLint);
+#define CALL_PointParameteri(disp, parameters) \
+ (* GET_PointParameteri(disp)) parameters
+static inline _glptr_PointParameteri GET_PointParameteri(struct _glapi_table *disp) {
+ return (_glptr_PointParameteri) (GET_by_offset(disp, _gloffset_PointParameteri));
+}
+
+static inline void SET_PointParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_PointParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameteriv)(GLenum, const GLint *);
+#define CALL_PointParameteriv(disp, parameters) \
+ (* GET_PointParameteriv(disp)) parameters
+static inline _glptr_PointParameteriv GET_PointParameteriv(struct _glapi_table *disp) {
+ return (_glptr_PointParameteriv) (GET_by_offset(disp, _gloffset_PointParameteriv));
+}
+
+static inline void SET_PointParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_PointParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3b)(GLbyte, GLbyte, GLbyte);
+#define CALL_SecondaryColor3b(disp, parameters) \
+ (* GET_SecondaryColor3b(disp)) parameters
+static inline _glptr_SecondaryColor3b GET_SecondaryColor3b(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3b) (GET_by_offset(disp, _gloffset_SecondaryColor3b));
+}
+
+static inline void SET_SecondaryColor3b(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbyte, GLbyte, GLbyte)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3b, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3bv)(const GLbyte *);
+#define CALL_SecondaryColor3bv(disp, parameters) \
+ (* GET_SecondaryColor3bv(disp)) parameters
+static inline _glptr_SecondaryColor3bv GET_SecondaryColor3bv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3bv) (GET_by_offset(disp, _gloffset_SecondaryColor3bv));
+}
+
+static inline void SET_SecondaryColor3bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_SecondaryColor3d(disp, parameters) \
+ (* GET_SecondaryColor3d(disp)) parameters
+static inline _glptr_SecondaryColor3d GET_SecondaryColor3d(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3d) (GET_by_offset(disp, _gloffset_SecondaryColor3d));
+}
+
+static inline void SET_SecondaryColor3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3dv)(const GLdouble *);
+#define CALL_SecondaryColor3dv(disp, parameters) \
+ (* GET_SecondaryColor3dv(disp)) parameters
+static inline _glptr_SecondaryColor3dv GET_SecondaryColor3dv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3dv) (GET_by_offset(disp, _gloffset_SecondaryColor3dv));
+}
+
+static inline void SET_SecondaryColor3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3i)(GLint, GLint, GLint);
+#define CALL_SecondaryColor3i(disp, parameters) \
+ (* GET_SecondaryColor3i(disp)) parameters
+static inline _glptr_SecondaryColor3i GET_SecondaryColor3i(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3i) (GET_by_offset(disp, _gloffset_SecondaryColor3i));
+}
+
+static inline void SET_SecondaryColor3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3iv)(const GLint *);
+#define CALL_SecondaryColor3iv(disp, parameters) \
+ (* GET_SecondaryColor3iv(disp)) parameters
+static inline _glptr_SecondaryColor3iv GET_SecondaryColor3iv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3iv) (GET_by_offset(disp, _gloffset_SecondaryColor3iv));
+}
+
+static inline void SET_SecondaryColor3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3s)(GLshort, GLshort, GLshort);
+#define CALL_SecondaryColor3s(disp, parameters) \
+ (* GET_SecondaryColor3s(disp)) parameters
+static inline _glptr_SecondaryColor3s GET_SecondaryColor3s(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3s) (GET_by_offset(disp, _gloffset_SecondaryColor3s));
+}
+
+static inline void SET_SecondaryColor3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3sv)(const GLshort *);
+#define CALL_SecondaryColor3sv(disp, parameters) \
+ (* GET_SecondaryColor3sv(disp)) parameters
+static inline _glptr_SecondaryColor3sv GET_SecondaryColor3sv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3sv) (GET_by_offset(disp, _gloffset_SecondaryColor3sv));
+}
+
+static inline void SET_SecondaryColor3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3ub)(GLubyte, GLubyte, GLubyte);
+#define CALL_SecondaryColor3ub(disp, parameters) \
+ (* GET_SecondaryColor3ub(disp)) parameters
+static inline _glptr_SecondaryColor3ub GET_SecondaryColor3ub(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3ub) (GET_by_offset(disp, _gloffset_SecondaryColor3ub));
+}
+
+static inline void SET_SecondaryColor3ub(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLubyte, GLubyte, GLubyte)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3ub, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3ubv)(const GLubyte *);
+#define CALL_SecondaryColor3ubv(disp, parameters) \
+ (* GET_SecondaryColor3ubv(disp)) parameters
+static inline _glptr_SecondaryColor3ubv GET_SecondaryColor3ubv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3ubv) (GET_by_offset(disp, _gloffset_SecondaryColor3ubv));
+}
+
+static inline void SET_SecondaryColor3ubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3ubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3ui)(GLuint, GLuint, GLuint);
+#define CALL_SecondaryColor3ui(disp, parameters) \
+ (* GET_SecondaryColor3ui(disp)) parameters
+static inline _glptr_SecondaryColor3ui GET_SecondaryColor3ui(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3ui) (GET_by_offset(disp, _gloffset_SecondaryColor3ui));
+}
+
+static inline void SET_SecondaryColor3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3uiv)(const GLuint *);
+#define CALL_SecondaryColor3uiv(disp, parameters) \
+ (* GET_SecondaryColor3uiv(disp)) parameters
+static inline _glptr_SecondaryColor3uiv GET_SecondaryColor3uiv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3uiv) (GET_by_offset(disp, _gloffset_SecondaryColor3uiv));
+}
+
+static inline void SET_SecondaryColor3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLuint *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3us)(GLushort, GLushort, GLushort);
+#define CALL_SecondaryColor3us(disp, parameters) \
+ (* GET_SecondaryColor3us(disp)) parameters
+static inline _glptr_SecondaryColor3us GET_SecondaryColor3us(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3us) (GET_by_offset(disp, _gloffset_SecondaryColor3us));
+}
+
+static inline void SET_SecondaryColor3us(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLushort, GLushort, GLushort)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3us, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3usv)(const GLushort *);
+#define CALL_SecondaryColor3usv(disp, parameters) \
+ (* GET_SecondaryColor3usv(disp)) parameters
+static inline _glptr_SecondaryColor3usv GET_SecondaryColor3usv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3usv) (GET_by_offset(disp, _gloffset_SecondaryColor3usv));
+}
+
+static inline void SET_SecondaryColor3usv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLushort *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3usv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColorPointer)(GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_SecondaryColorPointer(disp, parameters) \
+ (* GET_SecondaryColorPointer(disp)) parameters
+static inline _glptr_SecondaryColorPointer GET_SecondaryColorPointer(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColorPointer) (GET_by_offset(disp, _gloffset_SecondaryColorPointer));
+}
+
+static inline void SET_SecondaryColorPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColorPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2d)(GLdouble, GLdouble);
+#define CALL_WindowPos2d(disp, parameters) \
+ (* GET_WindowPos2d(disp)) parameters
+static inline _glptr_WindowPos2d GET_WindowPos2d(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2d) (GET_by_offset(disp, _gloffset_WindowPos2d));
+}
+
+static inline void SET_WindowPos2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_WindowPos2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2dv)(const GLdouble *);
+#define CALL_WindowPos2dv(disp, parameters) \
+ (* GET_WindowPos2dv(disp)) parameters
+static inline _glptr_WindowPos2dv GET_WindowPos2dv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2dv) (GET_by_offset(disp, _gloffset_WindowPos2dv));
+}
+
+static inline void SET_WindowPos2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_WindowPos2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2f)(GLfloat, GLfloat);
+#define CALL_WindowPos2f(disp, parameters) \
+ (* GET_WindowPos2f(disp)) parameters
+static inline _glptr_WindowPos2f GET_WindowPos2f(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2f) (GET_by_offset(disp, _gloffset_WindowPos2f));
+}
+
+static inline void SET_WindowPos2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_WindowPos2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2fv)(const GLfloat *);
+#define CALL_WindowPos2fv(disp, parameters) \
+ (* GET_WindowPos2fv(disp)) parameters
+static inline _glptr_WindowPos2fv GET_WindowPos2fv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2fv) (GET_by_offset(disp, _gloffset_WindowPos2fv));
+}
+
+static inline void SET_WindowPos2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_WindowPos2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2i)(GLint, GLint);
+#define CALL_WindowPos2i(disp, parameters) \
+ (* GET_WindowPos2i(disp)) parameters
+static inline _glptr_WindowPos2i GET_WindowPos2i(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2i) (GET_by_offset(disp, _gloffset_WindowPos2i));
+}
+
+static inline void SET_WindowPos2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_WindowPos2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2iv)(const GLint *);
+#define CALL_WindowPos2iv(disp, parameters) \
+ (* GET_WindowPos2iv(disp)) parameters
+static inline _glptr_WindowPos2iv GET_WindowPos2iv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2iv) (GET_by_offset(disp, _gloffset_WindowPos2iv));
+}
+
+static inline void SET_WindowPos2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_WindowPos2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2s)(GLshort, GLshort);
+#define CALL_WindowPos2s(disp, parameters) \
+ (* GET_WindowPos2s(disp)) parameters
+static inline _glptr_WindowPos2s GET_WindowPos2s(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2s) (GET_by_offset(disp, _gloffset_WindowPos2s));
+}
+
+static inline void SET_WindowPos2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_WindowPos2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos2sv)(const GLshort *);
+#define CALL_WindowPos2sv(disp, parameters) \
+ (* GET_WindowPos2sv(disp)) parameters
+static inline _glptr_WindowPos2sv GET_WindowPos2sv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos2sv) (GET_by_offset(disp, _gloffset_WindowPos2sv));
+}
+
+static inline void SET_WindowPos2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_WindowPos2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3d)(GLdouble, GLdouble, GLdouble);
+#define CALL_WindowPos3d(disp, parameters) \
+ (* GET_WindowPos3d(disp)) parameters
+static inline _glptr_WindowPos3d GET_WindowPos3d(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3d) (GET_by_offset(disp, _gloffset_WindowPos3d));
+}
+
+static inline void SET_WindowPos3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_WindowPos3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3dv)(const GLdouble *);
+#define CALL_WindowPos3dv(disp, parameters) \
+ (* GET_WindowPos3dv(disp)) parameters
+static inline _glptr_WindowPos3dv GET_WindowPos3dv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3dv) (GET_by_offset(disp, _gloffset_WindowPos3dv));
+}
+
+static inline void SET_WindowPos3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_WindowPos3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3f)(GLfloat, GLfloat, GLfloat);
+#define CALL_WindowPos3f(disp, parameters) \
+ (* GET_WindowPos3f(disp)) parameters
+static inline _glptr_WindowPos3f GET_WindowPos3f(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3f) (GET_by_offset(disp, _gloffset_WindowPos3f));
+}
+
+static inline void SET_WindowPos3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_WindowPos3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3fv)(const GLfloat *);
+#define CALL_WindowPos3fv(disp, parameters) \
+ (* GET_WindowPos3fv(disp)) parameters
+static inline _glptr_WindowPos3fv GET_WindowPos3fv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3fv) (GET_by_offset(disp, _gloffset_WindowPos3fv));
+}
+
+static inline void SET_WindowPos3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_WindowPos3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3i)(GLint, GLint, GLint);
+#define CALL_WindowPos3i(disp, parameters) \
+ (* GET_WindowPos3i(disp)) parameters
+static inline _glptr_WindowPos3i GET_WindowPos3i(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3i) (GET_by_offset(disp, _gloffset_WindowPos3i));
+}
+
+static inline void SET_WindowPos3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_WindowPos3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3iv)(const GLint *);
+#define CALL_WindowPos3iv(disp, parameters) \
+ (* GET_WindowPos3iv(disp)) parameters
+static inline _glptr_WindowPos3iv GET_WindowPos3iv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3iv) (GET_by_offset(disp, _gloffset_WindowPos3iv));
+}
+
+static inline void SET_WindowPos3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_WindowPos3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3s)(GLshort, GLshort, GLshort);
+#define CALL_WindowPos3s(disp, parameters) \
+ (* GET_WindowPos3s(disp)) parameters
+static inline _glptr_WindowPos3s GET_WindowPos3s(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3s) (GET_by_offset(disp, _gloffset_WindowPos3s));
+}
+
+static inline void SET_WindowPos3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_WindowPos3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos3sv)(const GLshort *);
+#define CALL_WindowPos3sv(disp, parameters) \
+ (* GET_WindowPos3sv(disp)) parameters
+static inline _glptr_WindowPos3sv GET_WindowPos3sv(struct _glapi_table *disp) {
+ return (_glptr_WindowPos3sv) (GET_by_offset(disp, _gloffset_WindowPos3sv));
+}
+
+static inline void SET_WindowPos3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_WindowPos3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginQuery)(GLenum, GLuint);
+#define CALL_BeginQuery(disp, parameters) \
+ (* GET_BeginQuery(disp)) parameters
+static inline _glptr_BeginQuery GET_BeginQuery(struct _glapi_table *disp) {
+ return (_glptr_BeginQuery) (GET_by_offset(disp, _gloffset_BeginQuery));
+}
+
+static inline void SET_BeginQuery(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BeginQuery, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBuffer)(GLenum, GLuint);
+#define CALL_BindBuffer(disp, parameters) \
+ (* GET_BindBuffer(disp)) parameters
+static inline _glptr_BindBuffer GET_BindBuffer(struct _glapi_table *disp) {
+ return (_glptr_BindBuffer) (GET_by_offset(disp, _gloffset_BindBuffer));
+}
+
+static inline void SET_BindBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferData)(GLenum, GLsizeiptr, const GLvoid *, GLenum);
+#define CALL_BufferData(disp, parameters) \
+ (* GET_BufferData(disp)) parameters
+static inline _glptr_BufferData GET_BufferData(struct _glapi_table *disp) {
+ return (_glptr_BufferData) (GET_by_offset(disp, _gloffset_BufferData));
+}
+
+static inline void SET_BufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizeiptr, const GLvoid *, GLenum)) {
+ SET_by_offset(disp, _gloffset_BufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferSubData)(GLenum, GLintptr, GLsizeiptr, const GLvoid *);
+#define CALL_BufferSubData(disp, parameters) \
+ (* GET_BufferSubData(disp)) parameters
+static inline _glptr_BufferSubData GET_BufferSubData(struct _glapi_table *disp) {
+ return (_glptr_BufferSubData) (GET_by_offset(disp, _gloffset_BufferSubData));
+}
+
+static inline void SET_BufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_BufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteBuffers)(GLsizei, const GLuint *);
+#define CALL_DeleteBuffers(disp, parameters) \
+ (* GET_DeleteBuffers(disp)) parameters
+static inline _glptr_DeleteBuffers GET_DeleteBuffers(struct _glapi_table *disp) {
+ return (_glptr_DeleteBuffers) (GET_by_offset(disp, _gloffset_DeleteBuffers));
+}
+
+static inline void SET_DeleteBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteQueries)(GLsizei, const GLuint *);
+#define CALL_DeleteQueries(disp, parameters) \
+ (* GET_DeleteQueries(disp)) parameters
+static inline _glptr_DeleteQueries GET_DeleteQueries(struct _glapi_table *disp) {
+ return (_glptr_DeleteQueries) (GET_by_offset(disp, _gloffset_DeleteQueries));
+}
+
+static inline void SET_DeleteQueries(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteQueries, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndQuery)(GLenum);
+#define CALL_EndQuery(disp, parameters) \
+ (* GET_EndQuery(disp)) parameters
+static inline _glptr_EndQuery GET_EndQuery(struct _glapi_table *disp) {
+ return (_glptr_EndQuery) (GET_by_offset(disp, _gloffset_EndQuery));
+}
+
+static inline void SET_EndQuery(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_EndQuery, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenBuffers)(GLsizei, GLuint *);
+#define CALL_GenBuffers(disp, parameters) \
+ (* GET_GenBuffers(disp)) parameters
+static inline _glptr_GenBuffers GET_GenBuffers(struct _glapi_table *disp) {
+ return (_glptr_GenBuffers) (GET_by_offset(disp, _gloffset_GenBuffers));
+}
+
+static inline void SET_GenBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenQueries)(GLsizei, GLuint *);
+#define CALL_GenQueries(disp, parameters) \
+ (* GET_GenQueries(disp)) parameters
+static inline _glptr_GenQueries GET_GenQueries(struct _glapi_table *disp) {
+ return (_glptr_GenQueries) (GET_by_offset(disp, _gloffset_GenQueries));
+}
+
+static inline void SET_GenQueries(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenQueries, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBufferParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetBufferParameteriv(disp, parameters) \
+ (* GET_GetBufferParameteriv(disp)) parameters
+static inline _glptr_GetBufferParameteriv GET_GetBufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetBufferParameteriv) (GET_by_offset(disp, _gloffset_GetBufferParameteriv));
+}
+
+static inline void SET_GetBufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetBufferParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBufferPointerv)(GLenum, GLenum, GLvoid **);
+#define CALL_GetBufferPointerv(disp, parameters) \
+ (* GET_GetBufferPointerv(disp)) parameters
+static inline _glptr_GetBufferPointerv GET_GetBufferPointerv(struct _glapi_table *disp) {
+ return (_glptr_GetBufferPointerv) (GET_by_offset(disp, _gloffset_GetBufferPointerv));
+}
+
+static inline void SET_GetBufferPointerv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLvoid **)) {
+ SET_by_offset(disp, _gloffset_GetBufferPointerv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBufferSubData)(GLenum, GLintptr, GLsizeiptr, GLvoid *);
+#define CALL_GetBufferSubData(disp, parameters) \
+ (* GET_GetBufferSubData(disp)) parameters
+static inline _glptr_GetBufferSubData GET_GetBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_GetBufferSubData) (GET_by_offset(disp, _gloffset_GetBufferSubData));
+}
+
+static inline void SET_GetBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryObjectiv)(GLuint, GLenum, GLint *);
+#define CALL_GetQueryObjectiv(disp, parameters) \
+ (* GET_GetQueryObjectiv(disp)) parameters
+static inline _glptr_GetQueryObjectiv GET_GetQueryObjectiv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryObjectiv) (GET_by_offset(disp, _gloffset_GetQueryObjectiv));
+}
+
+static inline void SET_GetQueryObjectiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetQueryObjectiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryObjectuiv)(GLuint, GLenum, GLuint *);
+#define CALL_GetQueryObjectuiv(disp, parameters) \
+ (* GET_GetQueryObjectuiv(disp)) parameters
+static inline _glptr_GetQueryObjectuiv GET_GetQueryObjectuiv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryObjectuiv) (GET_by_offset(disp, _gloffset_GetQueryObjectuiv));
+}
+
+static inline void SET_GetQueryObjectuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetQueryObjectuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryiv)(GLenum, GLenum, GLint *);
+#define CALL_GetQueryiv(disp, parameters) \
+ (* GET_GetQueryiv(disp)) parameters
+static inline _glptr_GetQueryiv GET_GetQueryiv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryiv) (GET_by_offset(disp, _gloffset_GetQueryiv));
+}
+
+static inline void SET_GetQueryiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetQueryiv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsBuffer)(GLuint);
+#define CALL_IsBuffer(disp, parameters) \
+ (* GET_IsBuffer(disp)) parameters
+static inline _glptr_IsBuffer GET_IsBuffer(struct _glapi_table *disp) {
+ return (_glptr_IsBuffer) (GET_by_offset(disp, _gloffset_IsBuffer));
+}
+
+static inline void SET_IsBuffer(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsBuffer, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsQuery)(GLuint);
+#define CALL_IsQuery(disp, parameters) \
+ (* GET_IsQuery(disp)) parameters
+static inline _glptr_IsQuery GET_IsQuery(struct _glapi_table *disp) {
+ return (_glptr_IsQuery) (GET_by_offset(disp, _gloffset_IsQuery));
+}
+
+static inline void SET_IsQuery(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsQuery, fn);
+}
+
+typedef GLvoid * (GLAPIENTRYP _glptr_MapBuffer)(GLenum, GLenum);
+#define CALL_MapBuffer(disp, parameters) \
+ (* GET_MapBuffer(disp)) parameters
+static inline _glptr_MapBuffer GET_MapBuffer(struct _glapi_table *disp) {
+ return (_glptr_MapBuffer) (GET_by_offset(disp, _gloffset_MapBuffer));
+}
+
+static inline void SET_MapBuffer(struct _glapi_table *disp, GLvoid * (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_MapBuffer, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_UnmapBuffer)(GLenum);
+#define CALL_UnmapBuffer(disp, parameters) \
+ (* GET_UnmapBuffer(disp)) parameters
+static inline _glptr_UnmapBuffer GET_UnmapBuffer(struct _glapi_table *disp) {
+ return (_glptr_UnmapBuffer) (GET_by_offset(disp, _gloffset_UnmapBuffer));
+}
+
+static inline void SET_UnmapBuffer(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_UnmapBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AttachShader)(GLuint, GLuint);
+#define CALL_AttachShader(disp, parameters) \
+ (* GET_AttachShader(disp)) parameters
+static inline _glptr_AttachShader GET_AttachShader(struct _glapi_table *disp) {
+ return (_glptr_AttachShader) (GET_by_offset(disp, _gloffset_AttachShader));
+}
+
+static inline void SET_AttachShader(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_AttachShader, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindAttribLocation)(GLuint, GLuint, const GLchar *);
+#define CALL_BindAttribLocation(disp, parameters) \
+ (* GET_BindAttribLocation(disp)) parameters
+static inline _glptr_BindAttribLocation GET_BindAttribLocation(struct _glapi_table *disp) {
+ return (_glptr_BindAttribLocation) (GET_by_offset(disp, _gloffset_BindAttribLocation));
+}
+
+static inline void SET_BindAttribLocation(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_BindAttribLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendEquationSeparate)(GLenum, GLenum);
+#define CALL_BlendEquationSeparate(disp, parameters) \
+ (* GET_BlendEquationSeparate(disp)) parameters
+static inline _glptr_BlendEquationSeparate GET_BlendEquationSeparate(struct _glapi_table *disp) {
+ return (_glptr_BlendEquationSeparate) (GET_by_offset(disp, _gloffset_BlendEquationSeparate));
+}
+
+static inline void SET_BlendEquationSeparate(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendEquationSeparate, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompileShader)(GLuint);
+#define CALL_CompileShader(disp, parameters) \
+ (* GET_CompileShader(disp)) parameters
+static inline _glptr_CompileShader GET_CompileShader(struct _glapi_table *disp) {
+ return (_glptr_CompileShader) (GET_by_offset(disp, _gloffset_CompileShader));
+}
+
+static inline void SET_CompileShader(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_CompileShader, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_CreateProgram)(void);
+#define CALL_CreateProgram(disp, parameters) \
+ (* GET_CreateProgram(disp)) parameters
+static inline _glptr_CreateProgram GET_CreateProgram(struct _glapi_table *disp) {
+ return (_glptr_CreateProgram) (GET_by_offset(disp, _gloffset_CreateProgram));
+}
+
+static inline void SET_CreateProgram(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_CreateProgram, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_CreateShader)(GLenum);
+#define CALL_CreateShader(disp, parameters) \
+ (* GET_CreateShader(disp)) parameters
+static inline _glptr_CreateShader GET_CreateShader(struct _glapi_table *disp) {
+ return (_glptr_CreateShader) (GET_by_offset(disp, _gloffset_CreateShader));
+}
+
+static inline void SET_CreateShader(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_CreateShader, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteProgram)(GLuint);
+#define CALL_DeleteProgram(disp, parameters) \
+ (* GET_DeleteProgram(disp)) parameters
+static inline _glptr_DeleteProgram GET_DeleteProgram(struct _glapi_table *disp) {
+ return (_glptr_DeleteProgram) (GET_by_offset(disp, _gloffset_DeleteProgram));
+}
+
+static inline void SET_DeleteProgram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_DeleteProgram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteShader)(GLuint);
+#define CALL_DeleteShader(disp, parameters) \
+ (* GET_DeleteShader(disp)) parameters
+static inline _glptr_DeleteShader GET_DeleteShader(struct _glapi_table *disp) {
+ return (_glptr_DeleteShader) (GET_by_offset(disp, _gloffset_DeleteShader));
+}
+
+static inline void SET_DeleteShader(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_DeleteShader, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DetachShader)(GLuint, GLuint);
+#define CALL_DetachShader(disp, parameters) \
+ (* GET_DetachShader(disp)) parameters
+static inline _glptr_DetachShader GET_DetachShader(struct _glapi_table *disp) {
+ return (_glptr_DetachShader) (GET_by_offset(disp, _gloffset_DetachShader));
+}
+
+static inline void SET_DetachShader(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DetachShader, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DisableVertexAttribArray)(GLuint);
+#define CALL_DisableVertexAttribArray(disp, parameters) \
+ (* GET_DisableVertexAttribArray(disp)) parameters
+static inline _glptr_DisableVertexAttribArray GET_DisableVertexAttribArray(struct _glapi_table *disp) {
+ return (_glptr_DisableVertexAttribArray) (GET_by_offset(disp, _gloffset_DisableVertexAttribArray));
+}
+
+static inline void SET_DisableVertexAttribArray(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_DisableVertexAttribArray, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawBuffers)(GLsizei, const GLenum *);
+#define CALL_DrawBuffers(disp, parameters) \
+ (* GET_DrawBuffers(disp)) parameters
+static inline _glptr_DrawBuffers GET_DrawBuffers(struct _glapi_table *disp) {
+ return (_glptr_DrawBuffers) (GET_by_offset(disp, _gloffset_DrawBuffers));
+}
+
+static inline void SET_DrawBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_DrawBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EnableVertexAttribArray)(GLuint);
+#define CALL_EnableVertexAttribArray(disp, parameters) \
+ (* GET_EnableVertexAttribArray(disp)) parameters
+static inline _glptr_EnableVertexAttribArray GET_EnableVertexAttribArray(struct _glapi_table *disp) {
+ return (_glptr_EnableVertexAttribArray) (GET_by_offset(disp, _gloffset_EnableVertexAttribArray));
+}
+
+static inline void SET_EnableVertexAttribArray(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_EnableVertexAttribArray, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveAttrib)(GLuint, GLuint, GLsizei , GLsizei *, GLint *, GLenum *, GLchar *);
+#define CALL_GetActiveAttrib(disp, parameters) \
+ (* GET_GetActiveAttrib(disp)) parameters
+static inline _glptr_GetActiveAttrib GET_GetActiveAttrib(struct _glapi_table *disp) {
+ return (_glptr_GetActiveAttrib) (GET_by_offset(disp, _gloffset_GetActiveAttrib));
+}
+
+static inline void SET_GetActiveAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei , GLsizei *, GLint *, GLenum *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveUniform)(GLuint, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLchar *);
+#define CALL_GetActiveUniform(disp, parameters) \
+ (* GET_GetActiveUniform(disp)) parameters
+static inline _glptr_GetActiveUniform GET_GetActiveUniform(struct _glapi_table *disp) {
+ return (_glptr_GetActiveUniform) (GET_by_offset(disp, _gloffset_GetActiveUniform));
+}
+
+static inline void SET_GetActiveUniform(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLsizei *, GLint *, GLenum *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveUniform, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetAttachedShaders)(GLuint, GLsizei, GLsizei *, GLuint *);
+#define CALL_GetAttachedShaders(disp, parameters) \
+ (* GET_GetAttachedShaders(disp)) parameters
+static inline _glptr_GetAttachedShaders GET_GetAttachedShaders(struct _glapi_table *disp) {
+ return (_glptr_GetAttachedShaders) (GET_by_offset(disp, _gloffset_GetAttachedShaders));
+}
+
+static inline void SET_GetAttachedShaders(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetAttachedShaders, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetAttribLocation)(GLuint, const GLchar *);
+#define CALL_GetAttribLocation(disp, parameters) \
+ (* GET_GetAttribLocation(disp)) parameters
+static inline _glptr_GetAttribLocation GET_GetAttribLocation(struct _glapi_table *disp) {
+ return (_glptr_GetAttribLocation) (GET_by_offset(disp, _gloffset_GetAttribLocation));
+}
+
+static inline void SET_GetAttribLocation(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetAttribLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramInfoLog)(GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetProgramInfoLog(disp, parameters) \
+ (* GET_GetProgramInfoLog(disp)) parameters
+static inline _glptr_GetProgramInfoLog GET_GetProgramInfoLog(struct _glapi_table *disp) {
+ return (_glptr_GetProgramInfoLog) (GET_by_offset(disp, _gloffset_GetProgramInfoLog));
+}
+
+static inline void SET_GetProgramInfoLog(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramInfoLog, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramiv)(GLuint, GLenum, GLint *);
+#define CALL_GetProgramiv(disp, parameters) \
+ (* GET_GetProgramiv(disp)) parameters
+static inline _glptr_GetProgramiv GET_GetProgramiv(struct _glapi_table *disp) {
+ return (_glptr_GetProgramiv) (GET_by_offset(disp, _gloffset_GetProgramiv));
+}
+
+static inline void SET_GetProgramiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetShaderInfoLog)(GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetShaderInfoLog(disp, parameters) \
+ (* GET_GetShaderInfoLog(disp)) parameters
+static inline _glptr_GetShaderInfoLog GET_GetShaderInfoLog(struct _glapi_table *disp) {
+ return (_glptr_GetShaderInfoLog) (GET_by_offset(disp, _gloffset_GetShaderInfoLog));
+}
+
+static inline void SET_GetShaderInfoLog(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetShaderInfoLog, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetShaderSource)(GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetShaderSource(disp, parameters) \
+ (* GET_GetShaderSource(disp)) parameters
+static inline _glptr_GetShaderSource GET_GetShaderSource(struct _glapi_table *disp) {
+ return (_glptr_GetShaderSource) (GET_by_offset(disp, _gloffset_GetShaderSource));
+}
+
+static inline void SET_GetShaderSource(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetShaderSource, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetShaderiv)(GLuint, GLenum, GLint *);
+#define CALL_GetShaderiv(disp, parameters) \
+ (* GET_GetShaderiv(disp)) parameters
+static inline _glptr_GetShaderiv GET_GetShaderiv(struct _glapi_table *disp) {
+ return (_glptr_GetShaderiv) (GET_by_offset(disp, _gloffset_GetShaderiv));
+}
+
+static inline void SET_GetShaderiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetShaderiv, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetUniformLocation)(GLuint, const GLchar *);
+#define CALL_GetUniformLocation(disp, parameters) \
+ (* GET_GetUniformLocation(disp)) parameters
+static inline _glptr_GetUniformLocation GET_GetUniformLocation(struct _glapi_table *disp) {
+ return (_glptr_GetUniformLocation) (GET_by_offset(disp, _gloffset_GetUniformLocation));
+}
+
+static inline void SET_GetUniformLocation(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetUniformLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformfv)(GLuint, GLint, GLfloat *);
+#define CALL_GetUniformfv(disp, parameters) \
+ (* GET_GetUniformfv(disp)) parameters
+static inline _glptr_GetUniformfv GET_GetUniformfv(struct _glapi_table *disp) {
+ return (_glptr_GetUniformfv) (GET_by_offset(disp, _gloffset_GetUniformfv));
+}
+
+static inline void SET_GetUniformfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetUniformfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformiv)(GLuint, GLint, GLint *);
+#define CALL_GetUniformiv(disp, parameters) \
+ (* GET_GetUniformiv(disp)) parameters
+static inline _glptr_GetUniformiv GET_GetUniformiv(struct _glapi_table *disp) {
+ return (_glptr_GetUniformiv) (GET_by_offset(disp, _gloffset_GetUniformiv));
+}
+
+static inline void SET_GetUniformiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetUniformiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribPointerv)(GLuint, GLenum, GLvoid **);
+#define CALL_GetVertexAttribPointerv(disp, parameters) \
+ (* GET_GetVertexAttribPointerv(disp)) parameters
+static inline _glptr_GetVertexAttribPointerv GET_GetVertexAttribPointerv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribPointerv) (GET_by_offset(disp, _gloffset_GetVertexAttribPointerv));
+}
+
+static inline void SET_GetVertexAttribPointerv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLvoid **)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribPointerv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribdv)(GLuint, GLenum, GLdouble *);
+#define CALL_GetVertexAttribdv(disp, parameters) \
+ (* GET_GetVertexAttribdv(disp)) parameters
+static inline _glptr_GetVertexAttribdv GET_GetVertexAttribdv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribdv) (GET_by_offset(disp, _gloffset_GetVertexAttribdv));
+}
+
+static inline void SET_GetVertexAttribdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribfv)(GLuint, GLenum, GLfloat *);
+#define CALL_GetVertexAttribfv(disp, parameters) \
+ (* GET_GetVertexAttribfv(disp)) parameters
+static inline _glptr_GetVertexAttribfv GET_GetVertexAttribfv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribfv) (GET_by_offset(disp, _gloffset_GetVertexAttribfv));
+}
+
+static inline void SET_GetVertexAttribfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribiv)(GLuint, GLenum, GLint *);
+#define CALL_GetVertexAttribiv(disp, parameters) \
+ (* GET_GetVertexAttribiv(disp)) parameters
+static inline _glptr_GetVertexAttribiv GET_GetVertexAttribiv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribiv) (GET_by_offset(disp, _gloffset_GetVertexAttribiv));
+}
+
+static inline void SET_GetVertexAttribiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribiv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsProgram)(GLuint);
+#define CALL_IsProgram(disp, parameters) \
+ (* GET_IsProgram(disp)) parameters
+static inline _glptr_IsProgram GET_IsProgram(struct _glapi_table *disp) {
+ return (_glptr_IsProgram) (GET_by_offset(disp, _gloffset_IsProgram));
+}
+
+static inline void SET_IsProgram(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsProgram, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsShader)(GLuint);
+#define CALL_IsShader(disp, parameters) \
+ (* GET_IsShader(disp)) parameters
+static inline _glptr_IsShader GET_IsShader(struct _glapi_table *disp) {
+ return (_glptr_IsShader) (GET_by_offset(disp, _gloffset_IsShader));
+}
+
+static inline void SET_IsShader(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsShader, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LinkProgram)(GLuint);
+#define CALL_LinkProgram(disp, parameters) \
+ (* GET_LinkProgram(disp)) parameters
+static inline _glptr_LinkProgram GET_LinkProgram(struct _glapi_table *disp) {
+ return (_glptr_LinkProgram) (GET_by_offset(disp, _gloffset_LinkProgram));
+}
+
+static inline void SET_LinkProgram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_LinkProgram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ShaderSource)(GLuint, GLsizei, const GLchar * const *, const GLint *);
+#define CALL_ShaderSource(disp, parameters) \
+ (* GET_ShaderSource(disp)) parameters
+static inline _glptr_ShaderSource GET_ShaderSource(struct _glapi_table *disp) {
+ return (_glptr_ShaderSource) (GET_by_offset(disp, _gloffset_ShaderSource));
+}
+
+static inline void SET_ShaderSource(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLchar * const *, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ShaderSource, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilFuncSeparate)(GLenum, GLenum, GLint, GLuint);
+#define CALL_StencilFuncSeparate(disp, parameters) \
+ (* GET_StencilFuncSeparate(disp)) parameters
+static inline _glptr_StencilFuncSeparate GET_StencilFuncSeparate(struct _glapi_table *disp) {
+ return (_glptr_StencilFuncSeparate) (GET_by_offset(disp, _gloffset_StencilFuncSeparate));
+}
+
+static inline void SET_StencilFuncSeparate(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_StencilFuncSeparate, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilMaskSeparate)(GLenum, GLuint);
+#define CALL_StencilMaskSeparate(disp, parameters) \
+ (* GET_StencilMaskSeparate(disp)) parameters
+static inline _glptr_StencilMaskSeparate GET_StencilMaskSeparate(struct _glapi_table *disp) {
+ return (_glptr_StencilMaskSeparate) (GET_by_offset(disp, _gloffset_StencilMaskSeparate));
+}
+
+static inline void SET_StencilMaskSeparate(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_StencilMaskSeparate, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilOpSeparate)(GLenum, GLenum, GLenum, GLenum);
+#define CALL_StencilOpSeparate(disp, parameters) \
+ (* GET_StencilOpSeparate(disp)) parameters
+static inline _glptr_StencilOpSeparate GET_StencilOpSeparate(struct _glapi_table *disp) {
+ return (_glptr_StencilOpSeparate) (GET_by_offset(disp, _gloffset_StencilOpSeparate));
+}
+
+static inline void SET_StencilOpSeparate(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_StencilOpSeparate, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1f)(GLint, GLfloat);
+#define CALL_Uniform1f(disp, parameters) \
+ (* GET_Uniform1f(disp)) parameters
+static inline _glptr_Uniform1f GET_Uniform1f(struct _glapi_table *disp) {
+ return (_glptr_Uniform1f) (GET_by_offset(disp, _gloffset_Uniform1f));
+}
+
+static inline void SET_Uniform1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Uniform1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1fv)(GLint, GLsizei, const GLfloat *);
+#define CALL_Uniform1fv(disp, parameters) \
+ (* GET_Uniform1fv(disp)) parameters
+static inline _glptr_Uniform1fv GET_Uniform1fv(struct _glapi_table *disp) {
+ return (_glptr_Uniform1fv) (GET_by_offset(disp, _gloffset_Uniform1fv));
+}
+
+static inline void SET_Uniform1fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Uniform1fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1i)(GLint, GLint);
+#define CALL_Uniform1i(disp, parameters) \
+ (* GET_Uniform1i(disp)) parameters
+static inline _glptr_Uniform1i GET_Uniform1i(struct _glapi_table *disp) {
+ return (_glptr_Uniform1i) (GET_by_offset(disp, _gloffset_Uniform1i));
+}
+
+static inline void SET_Uniform1i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Uniform1i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1iv)(GLint, GLsizei, const GLint *);
+#define CALL_Uniform1iv(disp, parameters) \
+ (* GET_Uniform1iv(disp)) parameters
+static inline _glptr_Uniform1iv GET_Uniform1iv(struct _glapi_table *disp) {
+ return (_glptr_Uniform1iv) (GET_by_offset(disp, _gloffset_Uniform1iv));
+}
+
+static inline void SET_Uniform1iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Uniform1iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2f)(GLint, GLfloat, GLfloat);
+#define CALL_Uniform2f(disp, parameters) \
+ (* GET_Uniform2f(disp)) parameters
+static inline _glptr_Uniform2f GET_Uniform2f(struct _glapi_table *disp) {
+ return (_glptr_Uniform2f) (GET_by_offset(disp, _gloffset_Uniform2f));
+}
+
+static inline void SET_Uniform2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Uniform2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2fv)(GLint, GLsizei, const GLfloat *);
+#define CALL_Uniform2fv(disp, parameters) \
+ (* GET_Uniform2fv(disp)) parameters
+static inline _glptr_Uniform2fv GET_Uniform2fv(struct _glapi_table *disp) {
+ return (_glptr_Uniform2fv) (GET_by_offset(disp, _gloffset_Uniform2fv));
+}
+
+static inline void SET_Uniform2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Uniform2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2i)(GLint, GLint, GLint);
+#define CALL_Uniform2i(disp, parameters) \
+ (* GET_Uniform2i(disp)) parameters
+static inline _glptr_Uniform2i GET_Uniform2i(struct _glapi_table *disp) {
+ return (_glptr_Uniform2i) (GET_by_offset(disp, _gloffset_Uniform2i));
+}
+
+static inline void SET_Uniform2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Uniform2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2iv)(GLint, GLsizei, const GLint *);
+#define CALL_Uniform2iv(disp, parameters) \
+ (* GET_Uniform2iv(disp)) parameters
+static inline _glptr_Uniform2iv GET_Uniform2iv(struct _glapi_table *disp) {
+ return (_glptr_Uniform2iv) (GET_by_offset(disp, _gloffset_Uniform2iv));
+}
+
+static inline void SET_Uniform2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Uniform2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3f)(GLint, GLfloat, GLfloat, GLfloat);
+#define CALL_Uniform3f(disp, parameters) \
+ (* GET_Uniform3f(disp)) parameters
+static inline _glptr_Uniform3f GET_Uniform3f(struct _glapi_table *disp) {
+ return (_glptr_Uniform3f) (GET_by_offset(disp, _gloffset_Uniform3f));
+}
+
+static inline void SET_Uniform3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Uniform3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3fv)(GLint, GLsizei, const GLfloat *);
+#define CALL_Uniform3fv(disp, parameters) \
+ (* GET_Uniform3fv(disp)) parameters
+static inline _glptr_Uniform3fv GET_Uniform3fv(struct _glapi_table *disp) {
+ return (_glptr_Uniform3fv) (GET_by_offset(disp, _gloffset_Uniform3fv));
+}
+
+static inline void SET_Uniform3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Uniform3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3i)(GLint, GLint, GLint, GLint);
+#define CALL_Uniform3i(disp, parameters) \
+ (* GET_Uniform3i(disp)) parameters
+static inline _glptr_Uniform3i GET_Uniform3i(struct _glapi_table *disp) {
+ return (_glptr_Uniform3i) (GET_by_offset(disp, _gloffset_Uniform3i));
+}
+
+static inline void SET_Uniform3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Uniform3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3iv)(GLint, GLsizei, const GLint *);
+#define CALL_Uniform3iv(disp, parameters) \
+ (* GET_Uniform3iv(disp)) parameters
+static inline _glptr_Uniform3iv GET_Uniform3iv(struct _glapi_table *disp) {
+ return (_glptr_Uniform3iv) (GET_by_offset(disp, _gloffset_Uniform3iv));
+}
+
+static inline void SET_Uniform3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Uniform3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4f)(GLint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Uniform4f(disp, parameters) \
+ (* GET_Uniform4f(disp)) parameters
+static inline _glptr_Uniform4f GET_Uniform4f(struct _glapi_table *disp) {
+ return (_glptr_Uniform4f) (GET_by_offset(disp, _gloffset_Uniform4f));
+}
+
+static inline void SET_Uniform4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Uniform4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4fv)(GLint, GLsizei, const GLfloat *);
+#define CALL_Uniform4fv(disp, parameters) \
+ (* GET_Uniform4fv(disp)) parameters
+static inline _glptr_Uniform4fv GET_Uniform4fv(struct _glapi_table *disp) {
+ return (_glptr_Uniform4fv) (GET_by_offset(disp, _gloffset_Uniform4fv));
+}
+
+static inline void SET_Uniform4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_Uniform4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4i)(GLint, GLint, GLint, GLint, GLint);
+#define CALL_Uniform4i(disp, parameters) \
+ (* GET_Uniform4i(disp)) parameters
+static inline _glptr_Uniform4i GET_Uniform4i(struct _glapi_table *disp) {
+ return (_glptr_Uniform4i) (GET_by_offset(disp, _gloffset_Uniform4i));
+}
+
+static inline void SET_Uniform4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_Uniform4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4iv)(GLint, GLsizei, const GLint *);
+#define CALL_Uniform4iv(disp, parameters) \
+ (* GET_Uniform4iv(disp)) parameters
+static inline _glptr_Uniform4iv GET_Uniform4iv(struct _glapi_table *disp) {
+ return (_glptr_Uniform4iv) (GET_by_offset(disp, _gloffset_Uniform4iv));
+}
+
+static inline void SET_Uniform4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_Uniform4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix2fv(disp, parameters) \
+ (* GET_UniformMatrix2fv(disp)) parameters
+static inline _glptr_UniformMatrix2fv GET_UniformMatrix2fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2fv) (GET_by_offset(disp, _gloffset_UniformMatrix2fv));
+}
+
+static inline void SET_UniformMatrix2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix3fv(disp, parameters) \
+ (* GET_UniformMatrix3fv(disp)) parameters
+static inline _glptr_UniformMatrix3fv GET_UniformMatrix3fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3fv) (GET_by_offset(disp, _gloffset_UniformMatrix3fv));
+}
+
+static inline void SET_UniformMatrix3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix4fv(disp, parameters) \
+ (* GET_UniformMatrix4fv(disp)) parameters
+static inline _glptr_UniformMatrix4fv GET_UniformMatrix4fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4fv) (GET_by_offset(disp, _gloffset_UniformMatrix4fv));
+}
+
+static inline void SET_UniformMatrix4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UseProgram)(GLuint);
+#define CALL_UseProgram(disp, parameters) \
+ (* GET_UseProgram(disp)) parameters
+static inline _glptr_UseProgram GET_UseProgram(struct _glapi_table *disp) {
+ return (_glptr_UseProgram) (GET_by_offset(disp, _gloffset_UseProgram));
+}
+
+static inline void SET_UseProgram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_UseProgram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ValidateProgram)(GLuint);
+#define CALL_ValidateProgram(disp, parameters) \
+ (* GET_ValidateProgram(disp)) parameters
+static inline _glptr_ValidateProgram GET_ValidateProgram(struct _glapi_table *disp) {
+ return (_glptr_ValidateProgram) (GET_by_offset(disp, _gloffset_ValidateProgram));
+}
+
+static inline void SET_ValidateProgram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_ValidateProgram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1d)(GLuint, GLdouble);
+#define CALL_VertexAttrib1d(disp, parameters) \
+ (* GET_VertexAttrib1d(disp)) parameters
+static inline _glptr_VertexAttrib1d GET_VertexAttrib1d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1d) (GET_by_offset(disp, _gloffset_VertexAttrib1d));
+}
+
+static inline void SET_VertexAttrib1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib1dv(disp, parameters) \
+ (* GET_VertexAttrib1dv(disp)) parameters
+static inline _glptr_VertexAttrib1dv GET_VertexAttrib1dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1dv) (GET_by_offset(disp, _gloffset_VertexAttrib1dv));
+}
+
+static inline void SET_VertexAttrib1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1s)(GLuint, GLshort);
+#define CALL_VertexAttrib1s(disp, parameters) \
+ (* GET_VertexAttrib1s(disp)) parameters
+static inline _glptr_VertexAttrib1s GET_VertexAttrib1s(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1s) (GET_by_offset(disp, _gloffset_VertexAttrib1s));
+}
+
+static inline void SET_VertexAttrib1s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1sv)(GLuint, const GLshort *);
+#define CALL_VertexAttrib1sv(disp, parameters) \
+ (* GET_VertexAttrib1sv(disp)) parameters
+static inline _glptr_VertexAttrib1sv GET_VertexAttrib1sv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1sv) (GET_by_offset(disp, _gloffset_VertexAttrib1sv));
+}
+
+static inline void SET_VertexAttrib1sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2d)(GLuint, GLdouble, GLdouble);
+#define CALL_VertexAttrib2d(disp, parameters) \
+ (* GET_VertexAttrib2d(disp)) parameters
+static inline _glptr_VertexAttrib2d GET_VertexAttrib2d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2d) (GET_by_offset(disp, _gloffset_VertexAttrib2d));
+}
+
+static inline void SET_VertexAttrib2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib2dv(disp, parameters) \
+ (* GET_VertexAttrib2dv(disp)) parameters
+static inline _glptr_VertexAttrib2dv GET_VertexAttrib2dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2dv) (GET_by_offset(disp, _gloffset_VertexAttrib2dv));
+}
+
+static inline void SET_VertexAttrib2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2s)(GLuint, GLshort, GLshort);
+#define CALL_VertexAttrib2s(disp, parameters) \
+ (* GET_VertexAttrib2s(disp)) parameters
+static inline _glptr_VertexAttrib2s GET_VertexAttrib2s(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2s) (GET_by_offset(disp, _gloffset_VertexAttrib2s));
+}
+
+static inline void SET_VertexAttrib2s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2sv)(GLuint, const GLshort *);
+#define CALL_VertexAttrib2sv(disp, parameters) \
+ (* GET_VertexAttrib2sv(disp)) parameters
+static inline _glptr_VertexAttrib2sv GET_VertexAttrib2sv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2sv) (GET_by_offset(disp, _gloffset_VertexAttrib2sv));
+}
+
+static inline void SET_VertexAttrib2sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3d)(GLuint, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttrib3d(disp, parameters) \
+ (* GET_VertexAttrib3d(disp)) parameters
+static inline _glptr_VertexAttrib3d GET_VertexAttrib3d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3d) (GET_by_offset(disp, _gloffset_VertexAttrib3d));
+}
+
+static inline void SET_VertexAttrib3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib3dv(disp, parameters) \
+ (* GET_VertexAttrib3dv(disp)) parameters
+static inline _glptr_VertexAttrib3dv GET_VertexAttrib3dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3dv) (GET_by_offset(disp, _gloffset_VertexAttrib3dv));
+}
+
+static inline void SET_VertexAttrib3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3s)(GLuint, GLshort, GLshort, GLshort);
+#define CALL_VertexAttrib3s(disp, parameters) \
+ (* GET_VertexAttrib3s(disp)) parameters
+static inline _glptr_VertexAttrib3s GET_VertexAttrib3s(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3s) (GET_by_offset(disp, _gloffset_VertexAttrib3s));
+}
+
+static inline void SET_VertexAttrib3s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3sv)(GLuint, const GLshort *);
+#define CALL_VertexAttrib3sv(disp, parameters) \
+ (* GET_VertexAttrib3sv(disp)) parameters
+static inline _glptr_VertexAttrib3sv GET_VertexAttrib3sv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3sv) (GET_by_offset(disp, _gloffset_VertexAttrib3sv));
+}
+
+static inline void SET_VertexAttrib3sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nbv)(GLuint, const GLbyte *);
+#define CALL_VertexAttrib4Nbv(disp, parameters) \
+ (* GET_VertexAttrib4Nbv(disp)) parameters
+static inline _glptr_VertexAttrib4Nbv GET_VertexAttrib4Nbv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nbv) (GET_by_offset(disp, _gloffset_VertexAttrib4Nbv));
+}
+
+static inline void SET_VertexAttrib4Nbv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nbv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Niv)(GLuint, const GLint *);
+#define CALL_VertexAttrib4Niv(disp, parameters) \
+ (* GET_VertexAttrib4Niv(disp)) parameters
+static inline _glptr_VertexAttrib4Niv GET_VertexAttrib4Niv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Niv) (GET_by_offset(disp, _gloffset_VertexAttrib4Niv));
+}
+
+static inline void SET_VertexAttrib4Niv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Niv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nsv)(GLuint, const GLshort *);
+#define CALL_VertexAttrib4Nsv(disp, parameters) \
+ (* GET_VertexAttrib4Nsv(disp)) parameters
+static inline _glptr_VertexAttrib4Nsv GET_VertexAttrib4Nsv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nsv) (GET_by_offset(disp, _gloffset_VertexAttrib4Nsv));
+}
+
+static inline void SET_VertexAttrib4Nsv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nsv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nub)(GLuint, GLubyte, GLubyte, GLubyte, GLubyte);
+#define CALL_VertexAttrib4Nub(disp, parameters) \
+ (* GET_VertexAttrib4Nub(disp)) parameters
+static inline _glptr_VertexAttrib4Nub GET_VertexAttrib4Nub(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nub) (GET_by_offset(disp, _gloffset_VertexAttrib4Nub));
+}
+
+static inline void SET_VertexAttrib4Nub(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLubyte, GLubyte, GLubyte, GLubyte)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nub, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nubv)(GLuint, const GLubyte *);
+#define CALL_VertexAttrib4Nubv(disp, parameters) \
+ (* GET_VertexAttrib4Nubv(disp)) parameters
+static inline _glptr_VertexAttrib4Nubv GET_VertexAttrib4Nubv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nubv) (GET_by_offset(disp, _gloffset_VertexAttrib4Nubv));
+}
+
+static inline void SET_VertexAttrib4Nubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nuiv)(GLuint, const GLuint *);
+#define CALL_VertexAttrib4Nuiv(disp, parameters) \
+ (* GET_VertexAttrib4Nuiv(disp)) parameters
+static inline _glptr_VertexAttrib4Nuiv GET_VertexAttrib4Nuiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nuiv) (GET_by_offset(disp, _gloffset_VertexAttrib4Nuiv));
+}
+
+static inline void SET_VertexAttrib4Nuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4Nusv)(GLuint, const GLushort *);
+#define CALL_VertexAttrib4Nusv(disp, parameters) \
+ (* GET_VertexAttrib4Nusv(disp)) parameters
+static inline _glptr_VertexAttrib4Nusv GET_VertexAttrib4Nusv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4Nusv) (GET_by_offset(disp, _gloffset_VertexAttrib4Nusv));
+}
+
+static inline void SET_VertexAttrib4Nusv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLushort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4Nusv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4bv)(GLuint, const GLbyte *);
+#define CALL_VertexAttrib4bv(disp, parameters) \
+ (* GET_VertexAttrib4bv(disp)) parameters
+static inline _glptr_VertexAttrib4bv GET_VertexAttrib4bv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4bv) (GET_by_offset(disp, _gloffset_VertexAttrib4bv));
+}
+
+static inline void SET_VertexAttrib4bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4d)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttrib4d(disp, parameters) \
+ (* GET_VertexAttrib4d(disp)) parameters
+static inline _glptr_VertexAttrib4d GET_VertexAttrib4d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4d) (GET_by_offset(disp, _gloffset_VertexAttrib4d));
+}
+
+static inline void SET_VertexAttrib4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib4dv(disp, parameters) \
+ (* GET_VertexAttrib4dv(disp)) parameters
+static inline _glptr_VertexAttrib4dv GET_VertexAttrib4dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4dv) (GET_by_offset(disp, _gloffset_VertexAttrib4dv));
+}
+
+static inline void SET_VertexAttrib4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4iv)(GLuint, const GLint *);
+#define CALL_VertexAttrib4iv(disp, parameters) \
+ (* GET_VertexAttrib4iv(disp)) parameters
+static inline _glptr_VertexAttrib4iv GET_VertexAttrib4iv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4iv) (GET_by_offset(disp, _gloffset_VertexAttrib4iv));
+}
+
+static inline void SET_VertexAttrib4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4s)(GLuint, GLshort, GLshort, GLshort, GLshort);
+#define CALL_VertexAttrib4s(disp, parameters) \
+ (* GET_VertexAttrib4s(disp)) parameters
+static inline _glptr_VertexAttrib4s GET_VertexAttrib4s(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4s) (GET_by_offset(disp, _gloffset_VertexAttrib4s));
+}
+
+static inline void SET_VertexAttrib4s(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4s, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4sv)(GLuint, const GLshort *);
+#define CALL_VertexAttrib4sv(disp, parameters) \
+ (* GET_VertexAttrib4sv(disp)) parameters
+static inline _glptr_VertexAttrib4sv GET_VertexAttrib4sv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4sv) (GET_by_offset(disp, _gloffset_VertexAttrib4sv));
+}
+
+static inline void SET_VertexAttrib4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4ubv)(GLuint, const GLubyte *);
+#define CALL_VertexAttrib4ubv(disp, parameters) \
+ (* GET_VertexAttrib4ubv(disp)) parameters
+static inline _glptr_VertexAttrib4ubv GET_VertexAttrib4ubv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4ubv) (GET_by_offset(disp, _gloffset_VertexAttrib4ubv));
+}
+
+static inline void SET_VertexAttrib4ubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4ubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4uiv)(GLuint, const GLuint *);
+#define CALL_VertexAttrib4uiv(disp, parameters) \
+ (* GET_VertexAttrib4uiv(disp)) parameters
+static inline _glptr_VertexAttrib4uiv GET_VertexAttrib4uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4uiv) (GET_by_offset(disp, _gloffset_VertexAttrib4uiv));
+}
+
+static inline void SET_VertexAttrib4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4usv)(GLuint, const GLushort *);
+#define CALL_VertexAttrib4usv(disp, parameters) \
+ (* GET_VertexAttrib4usv(disp)) parameters
+static inline _glptr_VertexAttrib4usv GET_VertexAttrib4usv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4usv) (GET_by_offset(disp, _gloffset_VertexAttrib4usv));
+}
+
+static inline void SET_VertexAttrib4usv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLushort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4usv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribPointer)(GLuint, GLint, GLenum, GLboolean, GLsizei, const GLvoid *);
+#define CALL_VertexAttribPointer(disp, parameters) \
+ (* GET_VertexAttribPointer(disp)) parameters
+static inline _glptr_VertexAttribPointer GET_VertexAttribPointer(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribPointer) (GET_by_offset(disp, _gloffset_VertexAttribPointer));
+}
+
+static inline void SET_VertexAttribPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLboolean, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2x3fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix2x3fv(disp, parameters) \
+ (* GET_UniformMatrix2x3fv(disp)) parameters
+static inline _glptr_UniformMatrix2x3fv GET_UniformMatrix2x3fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2x3fv) (GET_by_offset(disp, _gloffset_UniformMatrix2x3fv));
+}
+
+static inline void SET_UniformMatrix2x3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2x3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2x4fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix2x4fv(disp, parameters) \
+ (* GET_UniformMatrix2x4fv(disp)) parameters
+static inline _glptr_UniformMatrix2x4fv GET_UniformMatrix2x4fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2x4fv) (GET_by_offset(disp, _gloffset_UniformMatrix2x4fv));
+}
+
+static inline void SET_UniformMatrix2x4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2x4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3x2fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix3x2fv(disp, parameters) \
+ (* GET_UniformMatrix3x2fv(disp)) parameters
+static inline _glptr_UniformMatrix3x2fv GET_UniformMatrix3x2fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3x2fv) (GET_by_offset(disp, _gloffset_UniformMatrix3x2fv));
+}
+
+static inline void SET_UniformMatrix3x2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3x2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3x4fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix3x4fv(disp, parameters) \
+ (* GET_UniformMatrix3x4fv(disp)) parameters
+static inline _glptr_UniformMatrix3x4fv GET_UniformMatrix3x4fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3x4fv) (GET_by_offset(disp, _gloffset_UniformMatrix3x4fv));
+}
+
+static inline void SET_UniformMatrix3x4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3x4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4x2fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix4x2fv(disp, parameters) \
+ (* GET_UniformMatrix4x2fv(disp)) parameters
+static inline _glptr_UniformMatrix4x2fv GET_UniformMatrix4x2fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4x2fv) (GET_by_offset(disp, _gloffset_UniformMatrix4x2fv));
+}
+
+static inline void SET_UniformMatrix4x2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4x2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4x3fv)(GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_UniformMatrix4x3fv(disp, parameters) \
+ (* GET_UniformMatrix4x3fv(disp)) parameters
+static inline _glptr_UniformMatrix4x3fv GET_UniformMatrix4x3fv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4x3fv) (GET_by_offset(disp, _gloffset_UniformMatrix4x3fv));
+}
+
+static inline void SET_UniformMatrix4x3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4x3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginConditionalRender)(GLuint, GLenum);
+#define CALL_BeginConditionalRender(disp, parameters) \
+ (* GET_BeginConditionalRender(disp)) parameters
+static inline _glptr_BeginConditionalRender GET_BeginConditionalRender(struct _glapi_table *disp) {
+ return (_glptr_BeginConditionalRender) (GET_by_offset(disp, _gloffset_BeginConditionalRender));
+}
+
+static inline void SET_BeginConditionalRender(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_BeginConditionalRender, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginTransformFeedback)(GLenum);
+#define CALL_BeginTransformFeedback(disp, parameters) \
+ (* GET_BeginTransformFeedback(disp)) parameters
+static inline _glptr_BeginTransformFeedback GET_BeginTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_BeginTransformFeedback) (GET_by_offset(disp, _gloffset_BeginTransformFeedback));
+}
+
+static inline void SET_BeginTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_BeginTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBufferBase)(GLenum, GLuint, GLuint);
+#define CALL_BindBufferBase(disp, parameters) \
+ (* GET_BindBufferBase(disp)) parameters
+static inline _glptr_BindBufferBase GET_BindBufferBase(struct _glapi_table *disp) {
+ return (_glptr_BindBufferBase) (GET_by_offset(disp, _gloffset_BindBufferBase));
+}
+
+static inline void SET_BindBufferBase(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindBufferBase, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBufferRange)(GLenum, GLuint, GLuint, GLintptr, GLsizeiptr);
+#define CALL_BindBufferRange(disp, parameters) \
+ (* GET_BindBufferRange(disp)) parameters
+static inline _glptr_BindBufferRange GET_BindBufferRange(struct _glapi_table *disp) {
+ return (_glptr_BindBufferRange) (GET_by_offset(disp, _gloffset_BindBufferRange));
+}
+
+static inline void SET_BindBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_BindBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindFragDataLocation)(GLuint, GLuint, const GLchar *);
+#define CALL_BindFragDataLocation(disp, parameters) \
+ (* GET_BindFragDataLocation(disp)) parameters
+static inline _glptr_BindFragDataLocation GET_BindFragDataLocation(struct _glapi_table *disp) {
+ return (_glptr_BindFragDataLocation) (GET_by_offset(disp, _gloffset_BindFragDataLocation));
+}
+
+static inline void SET_BindFragDataLocation(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_BindFragDataLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClampColor)(GLenum, GLenum);
+#define CALL_ClampColor(disp, parameters) \
+ (* GET_ClampColor(disp)) parameters
+static inline _glptr_ClampColor GET_ClampColor(struct _glapi_table *disp) {
+ return (_glptr_ClampColor) (GET_by_offset(disp, _gloffset_ClampColor));
+}
+
+static inline void SET_ClampColor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_ClampColor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferfi)(GLenum, GLint, GLfloat, GLint);
+#define CALL_ClearBufferfi(disp, parameters) \
+ (* GET_ClearBufferfi(disp)) parameters
+static inline _glptr_ClearBufferfi GET_ClearBufferfi(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferfi) (GET_by_offset(disp, _gloffset_ClearBufferfi));
+}
+
+static inline void SET_ClearBufferfi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLfloat, GLint)) {
+ SET_by_offset(disp, _gloffset_ClearBufferfi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferfv)(GLenum, GLint, const GLfloat *);
+#define CALL_ClearBufferfv(disp, parameters) \
+ (* GET_ClearBufferfv(disp)) parameters
+static inline _glptr_ClearBufferfv GET_ClearBufferfv(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferfv) (GET_by_offset(disp, _gloffset_ClearBufferfv));
+}
+
+static inline void SET_ClearBufferfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ClearBufferfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferiv)(GLenum, GLint, const GLint *);
+#define CALL_ClearBufferiv(disp, parameters) \
+ (* GET_ClearBufferiv(disp)) parameters
+static inline _glptr_ClearBufferiv GET_ClearBufferiv(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferiv) (GET_by_offset(disp, _gloffset_ClearBufferiv));
+}
+
+static inline void SET_ClearBufferiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ClearBufferiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferuiv)(GLenum, GLint, const GLuint *);
+#define CALL_ClearBufferuiv(disp, parameters) \
+ (* GET_ClearBufferuiv(disp)) parameters
+static inline _glptr_ClearBufferuiv GET_ClearBufferuiv(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferuiv) (GET_by_offset(disp, _gloffset_ClearBufferuiv));
+}
+
+static inline void SET_ClearBufferuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ClearBufferuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorMaski)(GLuint, GLboolean, GLboolean, GLboolean, GLboolean);
+#define CALL_ColorMaski(disp, parameters) \
+ (* GET_ColorMaski(disp)) parameters
+static inline _glptr_ColorMaski GET_ColorMaski(struct _glapi_table *disp) {
+ return (_glptr_ColorMaski) (GET_by_offset(disp, _gloffset_ColorMaski));
+}
+
+static inline void SET_ColorMaski(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLboolean, GLboolean, GLboolean, GLboolean)) {
+ SET_by_offset(disp, _gloffset_ColorMaski, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Disablei)(GLenum, GLuint);
+#define CALL_Disablei(disp, parameters) \
+ (* GET_Disablei(disp)) parameters
+static inline _glptr_Disablei GET_Disablei(struct _glapi_table *disp) {
+ return (_glptr_Disablei) (GET_by_offset(disp, _gloffset_Disablei));
+}
+
+static inline void SET_Disablei(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_Disablei, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Enablei)(GLenum, GLuint);
+#define CALL_Enablei(disp, parameters) \
+ (* GET_Enablei(disp)) parameters
+static inline _glptr_Enablei GET_Enablei(struct _glapi_table *disp) {
+ return (_glptr_Enablei) (GET_by_offset(disp, _gloffset_Enablei));
+}
+
+static inline void SET_Enablei(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_Enablei, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndConditionalRender)(void);
+#define CALL_EndConditionalRender(disp, parameters) \
+ (* GET_EndConditionalRender(disp)) parameters
+static inline _glptr_EndConditionalRender GET_EndConditionalRender(struct _glapi_table *disp) {
+ return (_glptr_EndConditionalRender) (GET_by_offset(disp, _gloffset_EndConditionalRender));
+}
+
+static inline void SET_EndConditionalRender(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_EndConditionalRender, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndTransformFeedback)(void);
+#define CALL_EndTransformFeedback(disp, parameters) \
+ (* GET_EndTransformFeedback(disp)) parameters
+static inline _glptr_EndTransformFeedback GET_EndTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_EndTransformFeedback) (GET_by_offset(disp, _gloffset_EndTransformFeedback));
+}
+
+static inline void SET_EndTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_EndTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBooleani_v)(GLenum, GLuint, GLboolean *);
+#define CALL_GetBooleani_v(disp, parameters) \
+ (* GET_GetBooleani_v(disp)) parameters
+static inline _glptr_GetBooleani_v GET_GetBooleani_v(struct _glapi_table *disp) {
+ return (_glptr_GetBooleani_v) (GET_by_offset(disp, _gloffset_GetBooleani_v));
+}
+
+static inline void SET_GetBooleani_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLboolean *)) {
+ SET_by_offset(disp, _gloffset_GetBooleani_v, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetFragDataLocation)(GLuint, const GLchar *);
+#define CALL_GetFragDataLocation(disp, parameters) \
+ (* GET_GetFragDataLocation(disp)) parameters
+static inline _glptr_GetFragDataLocation GET_GetFragDataLocation(struct _glapi_table *disp) {
+ return (_glptr_GetFragDataLocation) (GET_by_offset(disp, _gloffset_GetFragDataLocation));
+}
+
+static inline void SET_GetFragDataLocation(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetFragDataLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetIntegeri_v)(GLenum, GLuint, GLint *);
+#define CALL_GetIntegeri_v(disp, parameters) \
+ (* GET_GetIntegeri_v(disp)) parameters
+static inline _glptr_GetIntegeri_v GET_GetIntegeri_v(struct _glapi_table *disp) {
+ return (_glptr_GetIntegeri_v) (GET_by_offset(disp, _gloffset_GetIntegeri_v));
+}
+
+static inline void SET_GetIntegeri_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetIntegeri_v, fn);
+}
+
+typedef const GLubyte * (GLAPIENTRYP _glptr_GetStringi)(GLenum, GLuint);
+#define CALL_GetStringi(disp, parameters) \
+ (* GET_GetStringi(disp)) parameters
+static inline _glptr_GetStringi GET_GetStringi(struct _glapi_table *disp) {
+ return (_glptr_GetStringi) (GET_by_offset(disp, _gloffset_GetStringi));
+}
+
+static inline void SET_GetStringi(struct _glapi_table *disp, const GLubyte * (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_GetStringi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexParameterIiv)(GLenum, GLenum, GLint *);
+#define CALL_GetTexParameterIiv(disp, parameters) \
+ (* GET_GetTexParameterIiv(disp)) parameters
+static inline _glptr_GetTexParameterIiv GET_GetTexParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_GetTexParameterIiv) (GET_by_offset(disp, _gloffset_GetTexParameterIiv));
+}
+
+static inline void SET_GetTexParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexParameterIuiv)(GLenum, GLenum, GLuint *);
+#define CALL_GetTexParameterIuiv(disp, parameters) \
+ (* GET_GetTexParameterIuiv(disp)) parameters
+static inline _glptr_GetTexParameterIuiv GET_GetTexParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_GetTexParameterIuiv) (GET_by_offset(disp, _gloffset_GetTexParameterIuiv));
+}
+
+static inline void SET_GetTexParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetTexParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTransformFeedbackVarying)(GLuint, GLuint, GLsizei, GLsizei *, GLsizei *, GLenum *, GLchar *);
+#define CALL_GetTransformFeedbackVarying(disp, parameters) \
+ (* GET_GetTransformFeedbackVarying(disp)) parameters
+static inline _glptr_GetTransformFeedbackVarying GET_GetTransformFeedbackVarying(struct _glapi_table *disp) {
+ return (_glptr_GetTransformFeedbackVarying) (GET_by_offset(disp, _gloffset_GetTransformFeedbackVarying));
+}
+
+static inline void SET_GetTransformFeedbackVarying(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLsizei *, GLsizei *, GLenum *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetTransformFeedbackVarying, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformuiv)(GLuint, GLint, GLuint *);
+#define CALL_GetUniformuiv(disp, parameters) \
+ (* GET_GetUniformuiv(disp)) parameters
+static inline _glptr_GetUniformuiv GET_GetUniformuiv(struct _glapi_table *disp) {
+ return (_glptr_GetUniformuiv) (GET_by_offset(disp, _gloffset_GetUniformuiv));
+}
+
+static inline void SET_GetUniformuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetUniformuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribIiv)(GLuint, GLenum, GLint *);
+#define CALL_GetVertexAttribIiv(disp, parameters) \
+ (* GET_GetVertexAttribIiv(disp)) parameters
+static inline _glptr_GetVertexAttribIiv GET_GetVertexAttribIiv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribIiv) (GET_by_offset(disp, _gloffset_GetVertexAttribIiv));
+}
+
+static inline void SET_GetVertexAttribIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribIuiv)(GLuint, GLenum, GLuint *);
+#define CALL_GetVertexAttribIuiv(disp, parameters) \
+ (* GET_GetVertexAttribIuiv(disp)) parameters
+static inline _glptr_GetVertexAttribIuiv GET_GetVertexAttribIuiv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribIuiv) (GET_by_offset(disp, _gloffset_GetVertexAttribIuiv));
+}
+
+static inline void SET_GetVertexAttribIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribIuiv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsEnabledi)(GLenum, GLuint);
+#define CALL_IsEnabledi(disp, parameters) \
+ (* GET_IsEnabledi(disp)) parameters
+static inline _glptr_IsEnabledi GET_IsEnabledi(struct _glapi_table *disp) {
+ return (_glptr_IsEnabledi) (GET_by_offset(disp, _gloffset_IsEnabledi));
+}
+
+static inline void SET_IsEnabledi(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_IsEnabledi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterIiv)(GLenum, GLenum, const GLint *);
+#define CALL_TexParameterIiv(disp, parameters) \
+ (* GET_TexParameterIiv(disp)) parameters
+static inline _glptr_TexParameterIiv GET_TexParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_TexParameterIiv) (GET_by_offset(disp, _gloffset_TexParameterIiv));
+}
+
+static inline void SET_TexParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterIuiv)(GLenum, GLenum, const GLuint *);
+#define CALL_TexParameterIuiv(disp, parameters) \
+ (* GET_TexParameterIuiv(disp)) parameters
+static inline _glptr_TexParameterIuiv GET_TexParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_TexParameterIuiv) (GET_by_offset(disp, _gloffset_TexParameterIuiv));
+}
+
+static inline void SET_TexParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TexParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TransformFeedbackVaryings)(GLuint, GLsizei, const GLchar * const *, GLenum);
+#define CALL_TransformFeedbackVaryings(disp, parameters) \
+ (* GET_TransformFeedbackVaryings(disp)) parameters
+static inline _glptr_TransformFeedbackVaryings GET_TransformFeedbackVaryings(struct _glapi_table *disp) {
+ return (_glptr_TransformFeedbackVaryings) (GET_by_offset(disp, _gloffset_TransformFeedbackVaryings));
+}
+
+static inline void SET_TransformFeedbackVaryings(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLchar * const *, GLenum)) {
+ SET_by_offset(disp, _gloffset_TransformFeedbackVaryings, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1ui)(GLint, GLuint);
+#define CALL_Uniform1ui(disp, parameters) \
+ (* GET_Uniform1ui(disp)) parameters
+static inline _glptr_Uniform1ui GET_Uniform1ui(struct _glapi_table *disp) {
+ return (_glptr_Uniform1ui) (GET_by_offset(disp, _gloffset_Uniform1ui));
+}
+
+static inline void SET_Uniform1ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Uniform1ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1uiv)(GLint, GLsizei, const GLuint *);
+#define CALL_Uniform1uiv(disp, parameters) \
+ (* GET_Uniform1uiv(disp)) parameters
+static inline _glptr_Uniform1uiv GET_Uniform1uiv(struct _glapi_table *disp) {
+ return (_glptr_Uniform1uiv) (GET_by_offset(disp, _gloffset_Uniform1uiv));
+}
+
+static inline void SET_Uniform1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Uniform1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2ui)(GLint, GLuint, GLuint);
+#define CALL_Uniform2ui(disp, parameters) \
+ (* GET_Uniform2ui(disp)) parameters
+static inline _glptr_Uniform2ui GET_Uniform2ui(struct _glapi_table *disp) {
+ return (_glptr_Uniform2ui) (GET_by_offset(disp, _gloffset_Uniform2ui));
+}
+
+static inline void SET_Uniform2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Uniform2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2uiv)(GLint, GLsizei, const GLuint *);
+#define CALL_Uniform2uiv(disp, parameters) \
+ (* GET_Uniform2uiv(disp)) parameters
+static inline _glptr_Uniform2uiv GET_Uniform2uiv(struct _glapi_table *disp) {
+ return (_glptr_Uniform2uiv) (GET_by_offset(disp, _gloffset_Uniform2uiv));
+}
+
+static inline void SET_Uniform2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Uniform2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3ui)(GLint, GLuint, GLuint, GLuint);
+#define CALL_Uniform3ui(disp, parameters) \
+ (* GET_Uniform3ui(disp)) parameters
+static inline _glptr_Uniform3ui GET_Uniform3ui(struct _glapi_table *disp) {
+ return (_glptr_Uniform3ui) (GET_by_offset(disp, _gloffset_Uniform3ui));
+}
+
+static inline void SET_Uniform3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Uniform3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3uiv)(GLint, GLsizei, const GLuint *);
+#define CALL_Uniform3uiv(disp, parameters) \
+ (* GET_Uniform3uiv(disp)) parameters
+static inline _glptr_Uniform3uiv GET_Uniform3uiv(struct _glapi_table *disp) {
+ return (_glptr_Uniform3uiv) (GET_by_offset(disp, _gloffset_Uniform3uiv));
+}
+
+static inline void SET_Uniform3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Uniform3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4ui)(GLint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_Uniform4ui(disp, parameters) \
+ (* GET_Uniform4ui(disp)) parameters
+static inline _glptr_Uniform4ui GET_Uniform4ui(struct _glapi_table *disp) {
+ return (_glptr_Uniform4ui) (GET_by_offset(disp, _gloffset_Uniform4ui));
+}
+
+static inline void SET_Uniform4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_Uniform4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4uiv)(GLint, GLsizei, const GLuint *);
+#define CALL_Uniform4uiv(disp, parameters) \
+ (* GET_Uniform4uiv(disp)) parameters
+static inline _glptr_Uniform4uiv GET_Uniform4uiv(struct _glapi_table *disp) {
+ return (_glptr_Uniform4uiv) (GET_by_offset(disp, _gloffset_Uniform4uiv));
+}
+
+static inline void SET_Uniform4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_Uniform4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI1iv)(GLuint, const GLint *);
+#define CALL_VertexAttribI1iv(disp, parameters) \
+ (* GET_VertexAttribI1iv(disp)) parameters
+static inline _glptr_VertexAttribI1iv GET_VertexAttribI1iv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI1iv) (GET_by_offset(disp, _gloffset_VertexAttribI1iv));
+}
+
+static inline void SET_VertexAttribI1iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI1iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI1uiv)(GLuint, const GLuint *);
+#define CALL_VertexAttribI1uiv(disp, parameters) \
+ (* GET_VertexAttribI1uiv(disp)) parameters
+static inline _glptr_VertexAttribI1uiv GET_VertexAttribI1uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI1uiv) (GET_by_offset(disp, _gloffset_VertexAttribI1uiv));
+}
+
+static inline void SET_VertexAttribI1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4bv)(GLuint, const GLbyte *);
+#define CALL_VertexAttribI4bv(disp, parameters) \
+ (* GET_VertexAttribI4bv(disp)) parameters
+static inline _glptr_VertexAttribI4bv GET_VertexAttribI4bv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4bv) (GET_by_offset(disp, _gloffset_VertexAttribI4bv));
+}
+
+static inline void SET_VertexAttribI4bv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLbyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4bv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4sv)(GLuint, const GLshort *);
+#define CALL_VertexAttribI4sv(disp, parameters) \
+ (* GET_VertexAttribI4sv(disp)) parameters
+static inline _glptr_VertexAttribI4sv GET_VertexAttribI4sv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4sv) (GET_by_offset(disp, _gloffset_VertexAttribI4sv));
+}
+
+static inline void SET_VertexAttribI4sv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4sv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4ubv)(GLuint, const GLubyte *);
+#define CALL_VertexAttribI4ubv(disp, parameters) \
+ (* GET_VertexAttribI4ubv(disp)) parameters
+static inline _glptr_VertexAttribI4ubv GET_VertexAttribI4ubv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4ubv) (GET_by_offset(disp, _gloffset_VertexAttribI4ubv));
+}
+
+static inline void SET_VertexAttribI4ubv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4ubv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4usv)(GLuint, const GLushort *);
+#define CALL_VertexAttribI4usv(disp, parameters) \
+ (* GET_VertexAttribI4usv(disp)) parameters
+static inline _glptr_VertexAttribI4usv GET_VertexAttribI4usv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4usv) (GET_by_offset(disp, _gloffset_VertexAttribI4usv));
+}
+
+static inline void SET_VertexAttribI4usv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLushort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4usv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribIPointer)(GLuint, GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_VertexAttribIPointer(disp, parameters) \
+ (* GET_VertexAttribIPointer(disp)) parameters
+static inline _glptr_VertexAttribIPointer GET_VertexAttribIPointer(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribIPointer) (GET_by_offset(disp, _gloffset_VertexAttribIPointer));
+}
+
+static inline void SET_VertexAttribIPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribIPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PrimitiveRestartIndex)(GLuint);
+#define CALL_PrimitiveRestartIndex(disp, parameters) \
+ (* GET_PrimitiveRestartIndex(disp)) parameters
+static inline _glptr_PrimitiveRestartIndex GET_PrimitiveRestartIndex(struct _glapi_table *disp) {
+ return (_glptr_PrimitiveRestartIndex) (GET_by_offset(disp, _gloffset_PrimitiveRestartIndex));
+}
+
+static inline void SET_PrimitiveRestartIndex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_PrimitiveRestartIndex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexBuffer)(GLenum, GLenum, GLuint);
+#define CALL_TexBuffer(disp, parameters) \
+ (* GET_TexBuffer(disp)) parameters
+static inline _glptr_TexBuffer GET_TexBuffer(struct _glapi_table *disp) {
+ return (_glptr_TexBuffer) (GET_by_offset(disp, _gloffset_TexBuffer));
+}
+
+static inline void SET_TexBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TexBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferTexture)(GLenum, GLenum, GLuint, GLint);
+#define CALL_FramebufferTexture(disp, parameters) \
+ (* GET_FramebufferTexture(disp)) parameters
+static inline _glptr_FramebufferTexture GET_FramebufferTexture(struct _glapi_table *disp) {
+ return (_glptr_FramebufferTexture) (GET_by_offset(disp, _gloffset_FramebufferTexture));
+}
+
+static inline void SET_FramebufferTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetBufferParameteri64v)(GLenum, GLenum, GLint64 *);
+#define CALL_GetBufferParameteri64v(disp, parameters) \
+ (* GET_GetBufferParameteri64v(disp)) parameters
+static inline _glptr_GetBufferParameteri64v GET_GetBufferParameteri64v(struct _glapi_table *disp) {
+ return (_glptr_GetBufferParameteri64v) (GET_by_offset(disp, _gloffset_GetBufferParameteri64v));
+}
+
+static inline void SET_GetBufferParameteri64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetBufferParameteri64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetInteger64i_v)(GLenum, GLuint, GLint64 *);
+#define CALL_GetInteger64i_v(disp, parameters) \
+ (* GET_GetInteger64i_v(disp)) parameters
+static inline _glptr_GetInteger64i_v GET_GetInteger64i_v(struct _glapi_table *disp) {
+ return (_glptr_GetInteger64i_v) (GET_by_offset(disp, _gloffset_GetInteger64i_v));
+}
+
+static inline void SET_GetInteger64i_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetInteger64i_v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribDivisor)(GLuint, GLuint);
+#define CALL_VertexAttribDivisor(disp, parameters) \
+ (* GET_VertexAttribDivisor(disp)) parameters
+static inline _glptr_VertexAttribDivisor GET_VertexAttribDivisor(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribDivisor) (GET_by_offset(disp, _gloffset_VertexAttribDivisor));
+}
+
+static inline void SET_VertexAttribDivisor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribDivisor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MinSampleShading)(GLfloat);
+#define CALL_MinSampleShading(disp, parameters) \
+ (* GET_MinSampleShading(disp)) parameters
+static inline _glptr_MinSampleShading GET_MinSampleShading(struct _glapi_table *disp) {
+ return (_glptr_MinSampleShading) (GET_by_offset(disp, _gloffset_MinSampleShading));
+}
+
+static inline void SET_MinSampleShading(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_MinSampleShading, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MemoryBarrierByRegion)(GLbitfield);
+#define CALL_MemoryBarrierByRegion(disp, parameters) \
+ (* GET_MemoryBarrierByRegion(disp)) parameters
+static inline _glptr_MemoryBarrierByRegion GET_MemoryBarrierByRegion(struct _glapi_table *disp) {
+ return (_glptr_MemoryBarrierByRegion) (GET_by_offset(disp, _gloffset_MemoryBarrierByRegion));
+}
+
+static inline void SET_MemoryBarrierByRegion(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbitfield)) {
+ SET_by_offset(disp, _gloffset_MemoryBarrierByRegion, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindProgramARB)(GLenum, GLuint);
+#define CALL_BindProgramARB(disp, parameters) \
+ (* GET_BindProgramARB(disp)) parameters
+static inline _glptr_BindProgramARB GET_BindProgramARB(struct _glapi_table *disp) {
+ return (_glptr_BindProgramARB) (GET_by_offset(disp, _gloffset_BindProgramARB));
+}
+
+static inline void SET_BindProgramARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindProgramARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteProgramsARB)(GLsizei, const GLuint *);
+#define CALL_DeleteProgramsARB(disp, parameters) \
+ (* GET_DeleteProgramsARB(disp)) parameters
+static inline _glptr_DeleteProgramsARB GET_DeleteProgramsARB(struct _glapi_table *disp) {
+ return (_glptr_DeleteProgramsARB) (GET_by_offset(disp, _gloffset_DeleteProgramsARB));
+}
+
+static inline void SET_DeleteProgramsARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteProgramsARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenProgramsARB)(GLsizei, GLuint *);
+#define CALL_GenProgramsARB(disp, parameters) \
+ (* GET_GenProgramsARB(disp)) parameters
+static inline _glptr_GenProgramsARB GET_GenProgramsARB(struct _glapi_table *disp) {
+ return (_glptr_GenProgramsARB) (GET_by_offset(disp, _gloffset_GenProgramsARB));
+}
+
+static inline void SET_GenProgramsARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenProgramsARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramEnvParameterdvARB)(GLenum, GLuint, GLdouble *);
+#define CALL_GetProgramEnvParameterdvARB(disp, parameters) \
+ (* GET_GetProgramEnvParameterdvARB(disp)) parameters
+static inline _glptr_GetProgramEnvParameterdvARB GET_GetProgramEnvParameterdvARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramEnvParameterdvARB) (GET_by_offset(disp, _gloffset_GetProgramEnvParameterdvARB));
+}
+
+static inline void SET_GetProgramEnvParameterdvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetProgramEnvParameterdvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramEnvParameterfvARB)(GLenum, GLuint, GLfloat *);
+#define CALL_GetProgramEnvParameterfvARB(disp, parameters) \
+ (* GET_GetProgramEnvParameterfvARB(disp)) parameters
+static inline _glptr_GetProgramEnvParameterfvARB GET_GetProgramEnvParameterfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramEnvParameterfvARB) (GET_by_offset(disp, _gloffset_GetProgramEnvParameterfvARB));
+}
+
+static inline void SET_GetProgramEnvParameterfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetProgramEnvParameterfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramLocalParameterdvARB)(GLenum, GLuint, GLdouble *);
+#define CALL_GetProgramLocalParameterdvARB(disp, parameters) \
+ (* GET_GetProgramLocalParameterdvARB(disp)) parameters
+static inline _glptr_GetProgramLocalParameterdvARB GET_GetProgramLocalParameterdvARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramLocalParameterdvARB) (GET_by_offset(disp, _gloffset_GetProgramLocalParameterdvARB));
+}
+
+static inline void SET_GetProgramLocalParameterdvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetProgramLocalParameterdvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramLocalParameterfvARB)(GLenum, GLuint, GLfloat *);
+#define CALL_GetProgramLocalParameterfvARB(disp, parameters) \
+ (* GET_GetProgramLocalParameterfvARB(disp)) parameters
+static inline _glptr_GetProgramLocalParameterfvARB GET_GetProgramLocalParameterfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramLocalParameterfvARB) (GET_by_offset(disp, _gloffset_GetProgramLocalParameterfvARB));
+}
+
+static inline void SET_GetProgramLocalParameterfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetProgramLocalParameterfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramStringARB)(GLenum, GLenum, GLvoid *);
+#define CALL_GetProgramStringARB(disp, parameters) \
+ (* GET_GetProgramStringARB(disp)) parameters
+static inline _glptr_GetProgramStringARB GET_GetProgramStringARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramStringARB) (GET_by_offset(disp, _gloffset_GetProgramStringARB));
+}
+
+static inline void SET_GetProgramStringARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetProgramStringARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramivARB)(GLenum, GLenum, GLint *);
+#define CALL_GetProgramivARB(disp, parameters) \
+ (* GET_GetProgramivARB(disp)) parameters
+static inline _glptr_GetProgramivARB GET_GetProgramivARB(struct _glapi_table *disp) {
+ return (_glptr_GetProgramivARB) (GET_by_offset(disp, _gloffset_GetProgramivARB));
+}
+
+static inline void SET_GetProgramivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramivARB, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsProgramARB)(GLuint);
+#define CALL_IsProgramARB(disp, parameters) \
+ (* GET_IsProgramARB(disp)) parameters
+static inline _glptr_IsProgramARB GET_IsProgramARB(struct _glapi_table *disp) {
+ return (_glptr_IsProgramARB) (GET_by_offset(disp, _gloffset_IsProgramARB));
+}
+
+static inline void SET_IsProgramARB(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsProgramARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramEnvParameter4dARB)(GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_ProgramEnvParameter4dARB(disp, parameters) \
+ (* GET_ProgramEnvParameter4dARB(disp)) parameters
+static inline _glptr_ProgramEnvParameter4dARB GET_ProgramEnvParameter4dARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramEnvParameter4dARB) (GET_by_offset(disp, _gloffset_ProgramEnvParameter4dARB));
+}
+
+static inline void SET_ProgramEnvParameter4dARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramEnvParameter4dARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramEnvParameter4dvARB)(GLenum, GLuint, const GLdouble *);
+#define CALL_ProgramEnvParameter4dvARB(disp, parameters) \
+ (* GET_ProgramEnvParameter4dvARB(disp)) parameters
+static inline _glptr_ProgramEnvParameter4dvARB GET_ProgramEnvParameter4dvARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramEnvParameter4dvARB) (GET_by_offset(disp, _gloffset_ProgramEnvParameter4dvARB));
+}
+
+static inline void SET_ProgramEnvParameter4dvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramEnvParameter4dvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramEnvParameter4fARB)(GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ProgramEnvParameter4fARB(disp, parameters) \
+ (* GET_ProgramEnvParameter4fARB(disp)) parameters
+static inline _glptr_ProgramEnvParameter4fARB GET_ProgramEnvParameter4fARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramEnvParameter4fARB) (GET_by_offset(disp, _gloffset_ProgramEnvParameter4fARB));
+}
+
+static inline void SET_ProgramEnvParameter4fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramEnvParameter4fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramEnvParameter4fvARB)(GLenum, GLuint, const GLfloat *);
+#define CALL_ProgramEnvParameter4fvARB(disp, parameters) \
+ (* GET_ProgramEnvParameter4fvARB(disp)) parameters
+static inline _glptr_ProgramEnvParameter4fvARB GET_ProgramEnvParameter4fvARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramEnvParameter4fvARB) (GET_by_offset(disp, _gloffset_ProgramEnvParameter4fvARB));
+}
+
+static inline void SET_ProgramEnvParameter4fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramEnvParameter4fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramLocalParameter4dARB)(GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_ProgramLocalParameter4dARB(disp, parameters) \
+ (* GET_ProgramLocalParameter4dARB(disp)) parameters
+static inline _glptr_ProgramLocalParameter4dARB GET_ProgramLocalParameter4dARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramLocalParameter4dARB) (GET_by_offset(disp, _gloffset_ProgramLocalParameter4dARB));
+}
+
+static inline void SET_ProgramLocalParameter4dARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramLocalParameter4dARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramLocalParameter4dvARB)(GLenum, GLuint, const GLdouble *);
+#define CALL_ProgramLocalParameter4dvARB(disp, parameters) \
+ (* GET_ProgramLocalParameter4dvARB(disp)) parameters
+static inline _glptr_ProgramLocalParameter4dvARB GET_ProgramLocalParameter4dvARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramLocalParameter4dvARB) (GET_by_offset(disp, _gloffset_ProgramLocalParameter4dvARB));
+}
+
+static inline void SET_ProgramLocalParameter4dvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramLocalParameter4dvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramLocalParameter4fARB)(GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ProgramLocalParameter4fARB(disp, parameters) \
+ (* GET_ProgramLocalParameter4fARB(disp)) parameters
+static inline _glptr_ProgramLocalParameter4fARB GET_ProgramLocalParameter4fARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramLocalParameter4fARB) (GET_by_offset(disp, _gloffset_ProgramLocalParameter4fARB));
+}
+
+static inline void SET_ProgramLocalParameter4fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramLocalParameter4fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramLocalParameter4fvARB)(GLenum, GLuint, const GLfloat *);
+#define CALL_ProgramLocalParameter4fvARB(disp, parameters) \
+ (* GET_ProgramLocalParameter4fvARB(disp)) parameters
+static inline _glptr_ProgramLocalParameter4fvARB GET_ProgramLocalParameter4fvARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramLocalParameter4fvARB) (GET_by_offset(disp, _gloffset_ProgramLocalParameter4fvARB));
+}
+
+static inline void SET_ProgramLocalParameter4fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramLocalParameter4fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramStringARB)(GLenum, GLenum, GLsizei, const GLvoid *);
+#define CALL_ProgramStringARB(disp, parameters) \
+ (* GET_ProgramStringARB(disp)) parameters
+static inline _glptr_ProgramStringARB GET_ProgramStringARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramStringARB) (GET_by_offset(disp, _gloffset_ProgramStringARB));
+}
+
+static inline void SET_ProgramStringARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ProgramStringARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1fARB)(GLuint, GLfloat);
+#define CALL_VertexAttrib1fARB(disp, parameters) \
+ (* GET_VertexAttrib1fARB(disp)) parameters
+static inline _glptr_VertexAttrib1fARB GET_VertexAttrib1fARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1fARB) (GET_by_offset(disp, _gloffset_VertexAttrib1fARB));
+}
+
+static inline void SET_VertexAttrib1fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1fvARB)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib1fvARB(disp, parameters) \
+ (* GET_VertexAttrib1fvARB(disp)) parameters
+static inline _glptr_VertexAttrib1fvARB GET_VertexAttrib1fvARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1fvARB) (GET_by_offset(disp, _gloffset_VertexAttrib1fvARB));
+}
+
+static inline void SET_VertexAttrib1fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2fARB)(GLuint, GLfloat, GLfloat);
+#define CALL_VertexAttrib2fARB(disp, parameters) \
+ (* GET_VertexAttrib2fARB(disp)) parameters
+static inline _glptr_VertexAttrib2fARB GET_VertexAttrib2fARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2fARB) (GET_by_offset(disp, _gloffset_VertexAttrib2fARB));
+}
+
+static inline void SET_VertexAttrib2fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2fvARB)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib2fvARB(disp, parameters) \
+ (* GET_VertexAttrib2fvARB(disp)) parameters
+static inline _glptr_VertexAttrib2fvARB GET_VertexAttrib2fvARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2fvARB) (GET_by_offset(disp, _gloffset_VertexAttrib2fvARB));
+}
+
+static inline void SET_VertexAttrib2fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3fARB)(GLuint, GLfloat, GLfloat, GLfloat);
+#define CALL_VertexAttrib3fARB(disp, parameters) \
+ (* GET_VertexAttrib3fARB(disp)) parameters
+static inline _glptr_VertexAttrib3fARB GET_VertexAttrib3fARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3fARB) (GET_by_offset(disp, _gloffset_VertexAttrib3fARB));
+}
+
+static inline void SET_VertexAttrib3fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3fvARB)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib3fvARB(disp, parameters) \
+ (* GET_VertexAttrib3fvARB(disp)) parameters
+static inline _glptr_VertexAttrib3fvARB GET_VertexAttrib3fvARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3fvARB) (GET_by_offset(disp, _gloffset_VertexAttrib3fvARB));
+}
+
+static inline void SET_VertexAttrib3fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4fARB)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_VertexAttrib4fARB(disp, parameters) \
+ (* GET_VertexAttrib4fARB(disp)) parameters
+static inline _glptr_VertexAttrib4fARB GET_VertexAttrib4fARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4fARB) (GET_by_offset(disp, _gloffset_VertexAttrib4fARB));
+}
+
+static inline void SET_VertexAttrib4fARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4fARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4fvARB)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib4fvARB(disp, parameters) \
+ (* GET_VertexAttrib4fvARB(disp)) parameters
+static inline _glptr_VertexAttrib4fvARB GET_VertexAttrib4fvARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4fvARB) (GET_by_offset(disp, _gloffset_VertexAttrib4fvARB));
+}
+
+static inline void SET_VertexAttrib4fvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4fvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AttachObjectARB)(GLhandleARB, GLhandleARB);
+#define CALL_AttachObjectARB(disp, parameters) \
+ (* GET_AttachObjectARB(disp)) parameters
+static inline _glptr_AttachObjectARB GET_AttachObjectARB(struct _glapi_table *disp) {
+ return (_glptr_AttachObjectARB) (GET_by_offset(disp, _gloffset_AttachObjectARB));
+}
+
+static inline void SET_AttachObjectARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLhandleARB)) {
+ SET_by_offset(disp, _gloffset_AttachObjectARB, fn);
+}
+
+typedef GLhandleARB (GLAPIENTRYP _glptr_CreateProgramObjectARB)(void);
+#define CALL_CreateProgramObjectARB(disp, parameters) \
+ (* GET_CreateProgramObjectARB(disp)) parameters
+static inline _glptr_CreateProgramObjectARB GET_CreateProgramObjectARB(struct _glapi_table *disp) {
+ return (_glptr_CreateProgramObjectARB) (GET_by_offset(disp, _gloffset_CreateProgramObjectARB));
+}
+
+static inline void SET_CreateProgramObjectARB(struct _glapi_table *disp, GLhandleARB (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_CreateProgramObjectARB, fn);
+}
+
+typedef GLhandleARB (GLAPIENTRYP _glptr_CreateShaderObjectARB)(GLenum);
+#define CALL_CreateShaderObjectARB(disp, parameters) \
+ (* GET_CreateShaderObjectARB(disp)) parameters
+static inline _glptr_CreateShaderObjectARB GET_CreateShaderObjectARB(struct _glapi_table *disp) {
+ return (_glptr_CreateShaderObjectARB) (GET_by_offset(disp, _gloffset_CreateShaderObjectARB));
+}
+
+static inline void SET_CreateShaderObjectARB(struct _glapi_table *disp, GLhandleARB (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_CreateShaderObjectARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteObjectARB)(GLhandleARB);
+#define CALL_DeleteObjectARB(disp, parameters) \
+ (* GET_DeleteObjectARB(disp)) parameters
+static inline _glptr_DeleteObjectARB GET_DeleteObjectARB(struct _glapi_table *disp) {
+ return (_glptr_DeleteObjectARB) (GET_by_offset(disp, _gloffset_DeleteObjectARB));
+}
+
+static inline void SET_DeleteObjectARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB)) {
+ SET_by_offset(disp, _gloffset_DeleteObjectARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DetachObjectARB)(GLhandleARB, GLhandleARB);
+#define CALL_DetachObjectARB(disp, parameters) \
+ (* GET_DetachObjectARB(disp)) parameters
+static inline _glptr_DetachObjectARB GET_DetachObjectARB(struct _glapi_table *disp) {
+ return (_glptr_DetachObjectARB) (GET_by_offset(disp, _gloffset_DetachObjectARB));
+}
+
+static inline void SET_DetachObjectARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLhandleARB)) {
+ SET_by_offset(disp, _gloffset_DetachObjectARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetAttachedObjectsARB)(GLhandleARB, GLsizei, GLsizei *, GLhandleARB *);
+#define CALL_GetAttachedObjectsARB(disp, parameters) \
+ (* GET_GetAttachedObjectsARB(disp)) parameters
+static inline _glptr_GetAttachedObjectsARB GET_GetAttachedObjectsARB(struct _glapi_table *disp) {
+ return (_glptr_GetAttachedObjectsARB) (GET_by_offset(disp, _gloffset_GetAttachedObjectsARB));
+}
+
+static inline void SET_GetAttachedObjectsARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLsizei, GLsizei *, GLhandleARB *)) {
+ SET_by_offset(disp, _gloffset_GetAttachedObjectsARB, fn);
+}
+
+typedef GLhandleARB (GLAPIENTRYP _glptr_GetHandleARB)(GLenum);
+#define CALL_GetHandleARB(disp, parameters) \
+ (* GET_GetHandleARB(disp)) parameters
+static inline _glptr_GetHandleARB GET_GetHandleARB(struct _glapi_table *disp) {
+ return (_glptr_GetHandleARB) (GET_by_offset(disp, _gloffset_GetHandleARB));
+}
+
+static inline void SET_GetHandleARB(struct _glapi_table *disp, GLhandleARB (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_GetHandleARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetInfoLogARB)(GLhandleARB, GLsizei, GLsizei *, GLcharARB *);
+#define CALL_GetInfoLogARB(disp, parameters) \
+ (* GET_GetInfoLogARB(disp)) parameters
+static inline _glptr_GetInfoLogARB GET_GetInfoLogARB(struct _glapi_table *disp) {
+ return (_glptr_GetInfoLogARB) (GET_by_offset(disp, _gloffset_GetInfoLogARB));
+}
+
+static inline void SET_GetInfoLogARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLsizei, GLsizei *, GLcharARB *)) {
+ SET_by_offset(disp, _gloffset_GetInfoLogARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetObjectParameterfvARB)(GLhandleARB, GLenum, GLfloat *);
+#define CALL_GetObjectParameterfvARB(disp, parameters) \
+ (* GET_GetObjectParameterfvARB(disp)) parameters
+static inline _glptr_GetObjectParameterfvARB GET_GetObjectParameterfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetObjectParameterfvARB) (GET_by_offset(disp, _gloffset_GetObjectParameterfvARB));
+}
+
+static inline void SET_GetObjectParameterfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetObjectParameterfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetObjectParameterivARB)(GLhandleARB, GLenum, GLint *);
+#define CALL_GetObjectParameterivARB(disp, parameters) \
+ (* GET_GetObjectParameterivARB(disp)) parameters
+static inline _glptr_GetObjectParameterivARB GET_GetObjectParameterivARB(struct _glapi_table *disp) {
+ return (_glptr_GetObjectParameterivARB) (GET_by_offset(disp, _gloffset_GetObjectParameterivARB));
+}
+
+static inline void SET_GetObjectParameterivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLhandleARB, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetObjectParameterivARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawArraysInstancedARB)(GLenum, GLint, GLsizei, GLsizei);
+#define CALL_DrawArraysInstancedARB(disp, parameters) \
+ (* GET_DrawArraysInstancedARB(disp)) parameters
+static inline _glptr_DrawArraysInstancedARB GET_DrawArraysInstancedARB(struct _glapi_table *disp) {
+ return (_glptr_DrawArraysInstancedARB) (GET_by_offset(disp, _gloffset_DrawArraysInstancedARB));
+}
+
+static inline void SET_DrawArraysInstancedARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DrawArraysInstancedARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsInstancedARB)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei);
+#define CALL_DrawElementsInstancedARB(disp, parameters) \
+ (* GET_DrawElementsInstancedARB(disp)) parameters
+static inline _glptr_DrawElementsInstancedARB GET_DrawElementsInstancedARB(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsInstancedARB) (GET_by_offset(disp, _gloffset_DrawElementsInstancedARB));
+}
+
+static inline void SET_DrawElementsInstancedARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DrawElementsInstancedARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindFramebuffer)(GLenum, GLuint);
+#define CALL_BindFramebuffer(disp, parameters) \
+ (* GET_BindFramebuffer(disp)) parameters
+static inline _glptr_BindFramebuffer GET_BindFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_BindFramebuffer) (GET_by_offset(disp, _gloffset_BindFramebuffer));
+}
+
+static inline void SET_BindFramebuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindFramebuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindRenderbuffer)(GLenum, GLuint);
+#define CALL_BindRenderbuffer(disp, parameters) \
+ (* GET_BindRenderbuffer(disp)) parameters
+static inline _glptr_BindRenderbuffer GET_BindRenderbuffer(struct _glapi_table *disp) {
+ return (_glptr_BindRenderbuffer) (GET_by_offset(disp, _gloffset_BindRenderbuffer));
+}
+
+static inline void SET_BindRenderbuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindRenderbuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlitFramebuffer)(GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLbitfield, GLenum);
+#define CALL_BlitFramebuffer(disp, parameters) \
+ (* GET_BlitFramebuffer(disp)) parameters
+static inline _glptr_BlitFramebuffer GET_BlitFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_BlitFramebuffer) (GET_by_offset(disp, _gloffset_BlitFramebuffer));
+}
+
+static inline void SET_BlitFramebuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLbitfield, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlitFramebuffer, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_CheckFramebufferStatus)(GLenum);
+#define CALL_CheckFramebufferStatus(disp, parameters) \
+ (* GET_CheckFramebufferStatus(disp)) parameters
+static inline _glptr_CheckFramebufferStatus GET_CheckFramebufferStatus(struct _glapi_table *disp) {
+ return (_glptr_CheckFramebufferStatus) (GET_by_offset(disp, _gloffset_CheckFramebufferStatus));
+}
+
+static inline void SET_CheckFramebufferStatus(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_CheckFramebufferStatus, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteFramebuffers)(GLsizei, const GLuint *);
+#define CALL_DeleteFramebuffers(disp, parameters) \
+ (* GET_DeleteFramebuffers(disp)) parameters
+static inline _glptr_DeleteFramebuffers GET_DeleteFramebuffers(struct _glapi_table *disp) {
+ return (_glptr_DeleteFramebuffers) (GET_by_offset(disp, _gloffset_DeleteFramebuffers));
+}
+
+static inline void SET_DeleteFramebuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteFramebuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteRenderbuffers)(GLsizei, const GLuint *);
+#define CALL_DeleteRenderbuffers(disp, parameters) \
+ (* GET_DeleteRenderbuffers(disp)) parameters
+static inline _glptr_DeleteRenderbuffers GET_DeleteRenderbuffers(struct _glapi_table *disp) {
+ return (_glptr_DeleteRenderbuffers) (GET_by_offset(disp, _gloffset_DeleteRenderbuffers));
+}
+
+static inline void SET_DeleteRenderbuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteRenderbuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferRenderbuffer)(GLenum, GLenum, GLenum, GLuint);
+#define CALL_FramebufferRenderbuffer(disp, parameters) \
+ (* GET_FramebufferRenderbuffer(disp)) parameters
+static inline _glptr_FramebufferRenderbuffer GET_FramebufferRenderbuffer(struct _glapi_table *disp) {
+ return (_glptr_FramebufferRenderbuffer) (GET_by_offset(disp, _gloffset_FramebufferRenderbuffer));
+}
+
+static inline void SET_FramebufferRenderbuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_FramebufferRenderbuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferTexture1D)(GLenum, GLenum, GLenum, GLuint, GLint);
+#define CALL_FramebufferTexture1D(disp, parameters) \
+ (* GET_FramebufferTexture1D(disp)) parameters
+static inline _glptr_FramebufferTexture1D GET_FramebufferTexture1D(struct _glapi_table *disp) {
+ return (_glptr_FramebufferTexture1D) (GET_by_offset(disp, _gloffset_FramebufferTexture1D));
+}
+
+static inline void SET_FramebufferTexture1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferTexture1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferTexture2D)(GLenum, GLenum, GLenum, GLuint, GLint);
+#define CALL_FramebufferTexture2D(disp, parameters) \
+ (* GET_FramebufferTexture2D(disp)) parameters
+static inline _glptr_FramebufferTexture2D GET_FramebufferTexture2D(struct _glapi_table *disp) {
+ return (_glptr_FramebufferTexture2D) (GET_by_offset(disp, _gloffset_FramebufferTexture2D));
+}
+
+static inline void SET_FramebufferTexture2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferTexture2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferTexture3D)(GLenum, GLenum, GLenum, GLuint, GLint, GLint);
+#define CALL_FramebufferTexture3D(disp, parameters) \
+ (* GET_FramebufferTexture3D(disp)) parameters
+static inline _glptr_FramebufferTexture3D GET_FramebufferTexture3D(struct _glapi_table *disp) {
+ return (_glptr_FramebufferTexture3D) (GET_by_offset(disp, _gloffset_FramebufferTexture3D));
+}
+
+static inline void SET_FramebufferTexture3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLuint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferTexture3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferTextureLayer)(GLenum, GLenum, GLuint, GLint, GLint);
+#define CALL_FramebufferTextureLayer(disp, parameters) \
+ (* GET_FramebufferTextureLayer(disp)) parameters
+static inline _glptr_FramebufferTextureLayer GET_FramebufferTextureLayer(struct _glapi_table *disp) {
+ return (_glptr_FramebufferTextureLayer) (GET_by_offset(disp, _gloffset_FramebufferTextureLayer));
+}
+
+static inline void SET_FramebufferTextureLayer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferTextureLayer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenFramebuffers)(GLsizei, GLuint *);
+#define CALL_GenFramebuffers(disp, parameters) \
+ (* GET_GenFramebuffers(disp)) parameters
+static inline _glptr_GenFramebuffers GET_GenFramebuffers(struct _glapi_table *disp) {
+ return (_glptr_GenFramebuffers) (GET_by_offset(disp, _gloffset_GenFramebuffers));
+}
+
+static inline void SET_GenFramebuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenFramebuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenRenderbuffers)(GLsizei, GLuint *);
+#define CALL_GenRenderbuffers(disp, parameters) \
+ (* GET_GenRenderbuffers(disp)) parameters
+static inline _glptr_GenRenderbuffers GET_GenRenderbuffers(struct _glapi_table *disp) {
+ return (_glptr_GenRenderbuffers) (GET_by_offset(disp, _gloffset_GenRenderbuffers));
+}
+
+static inline void SET_GenRenderbuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenRenderbuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenerateMipmap)(GLenum);
+#define CALL_GenerateMipmap(disp, parameters) \
+ (* GET_GenerateMipmap(disp)) parameters
+static inline _glptr_GenerateMipmap GET_GenerateMipmap(struct _glapi_table *disp) {
+ return (_glptr_GenerateMipmap) (GET_by_offset(disp, _gloffset_GenerateMipmap));
+}
+
+static inline void SET_GenerateMipmap(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_GenerateMipmap, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFramebufferAttachmentParameteriv)(GLenum, GLenum, GLenum, GLint *);
+#define CALL_GetFramebufferAttachmentParameteriv(disp, parameters) \
+ (* GET_GetFramebufferAttachmentParameteriv(disp)) parameters
+static inline _glptr_GetFramebufferAttachmentParameteriv GET_GetFramebufferAttachmentParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetFramebufferAttachmentParameteriv) (GET_by_offset(disp, _gloffset_GetFramebufferAttachmentParameteriv));
+}
+
+static inline void SET_GetFramebufferAttachmentParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetFramebufferAttachmentParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetRenderbufferParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetRenderbufferParameteriv(disp, parameters) \
+ (* GET_GetRenderbufferParameteriv(disp)) parameters
+static inline _glptr_GetRenderbufferParameteriv GET_GetRenderbufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetRenderbufferParameteriv) (GET_by_offset(disp, _gloffset_GetRenderbufferParameteriv));
+}
+
+static inline void SET_GetRenderbufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetRenderbufferParameteriv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsFramebuffer)(GLuint);
+#define CALL_IsFramebuffer(disp, parameters) \
+ (* GET_IsFramebuffer(disp)) parameters
+static inline _glptr_IsFramebuffer GET_IsFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_IsFramebuffer) (GET_by_offset(disp, _gloffset_IsFramebuffer));
+}
+
+static inline void SET_IsFramebuffer(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsFramebuffer, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsRenderbuffer)(GLuint);
+#define CALL_IsRenderbuffer(disp, parameters) \
+ (* GET_IsRenderbuffer(disp)) parameters
+static inline _glptr_IsRenderbuffer GET_IsRenderbuffer(struct _glapi_table *disp) {
+ return (_glptr_IsRenderbuffer) (GET_by_offset(disp, _gloffset_IsRenderbuffer));
+}
+
+static inline void SET_IsRenderbuffer(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsRenderbuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RenderbufferStorage)(GLenum, GLenum, GLsizei, GLsizei);
+#define CALL_RenderbufferStorage(disp, parameters) \
+ (* GET_RenderbufferStorage(disp)) parameters
+static inline _glptr_RenderbufferStorage GET_RenderbufferStorage(struct _glapi_table *disp) {
+ return (_glptr_RenderbufferStorage) (GET_by_offset(disp, _gloffset_RenderbufferStorage));
+}
+
+static inline void SET_RenderbufferStorage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_RenderbufferStorage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RenderbufferStorageMultisample)(GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+#define CALL_RenderbufferStorageMultisample(disp, parameters) \
+ (* GET_RenderbufferStorageMultisample(disp)) parameters
+static inline _glptr_RenderbufferStorageMultisample GET_RenderbufferStorageMultisample(struct _glapi_table *disp) {
+ return (_glptr_RenderbufferStorageMultisample) (GET_by_offset(disp, _gloffset_RenderbufferStorageMultisample));
+}
+
+static inline void SET_RenderbufferStorageMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_RenderbufferStorageMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FlushMappedBufferRange)(GLenum, GLintptr, GLsizeiptr);
+#define CALL_FlushMappedBufferRange(disp, parameters) \
+ (* GET_FlushMappedBufferRange(disp)) parameters
+static inline _glptr_FlushMappedBufferRange GET_FlushMappedBufferRange(struct _glapi_table *disp) {
+ return (_glptr_FlushMappedBufferRange) (GET_by_offset(disp, _gloffset_FlushMappedBufferRange));
+}
+
+static inline void SET_FlushMappedBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_FlushMappedBufferRange, fn);
+}
+
+typedef GLvoid * (GLAPIENTRYP _glptr_MapBufferRange)(GLenum, GLintptr, GLsizeiptr, GLbitfield);
+#define CALL_MapBufferRange(disp, parameters) \
+ (* GET_MapBufferRange(disp)) parameters
+static inline _glptr_MapBufferRange GET_MapBufferRange(struct _glapi_table *disp) {
+ return (_glptr_MapBufferRange) (GET_by_offset(disp, _gloffset_MapBufferRange));
+}
+
+static inline void SET_MapBufferRange(struct _glapi_table *disp, GLvoid * (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_MapBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindVertexArray)(GLuint);
+#define CALL_BindVertexArray(disp, parameters) \
+ (* GET_BindVertexArray(disp)) parameters
+static inline _glptr_BindVertexArray GET_BindVertexArray(struct _glapi_table *disp) {
+ return (_glptr_BindVertexArray) (GET_by_offset(disp, _gloffset_BindVertexArray));
+}
+
+static inline void SET_BindVertexArray(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_BindVertexArray, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteVertexArrays)(GLsizei, const GLuint *);
+#define CALL_DeleteVertexArrays(disp, parameters) \
+ (* GET_DeleteVertexArrays(disp)) parameters
+static inline _glptr_DeleteVertexArrays GET_DeleteVertexArrays(struct _glapi_table *disp) {
+ return (_glptr_DeleteVertexArrays) (GET_by_offset(disp, _gloffset_DeleteVertexArrays));
+}
+
+static inline void SET_DeleteVertexArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteVertexArrays, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenVertexArrays)(GLsizei, GLuint *);
+#define CALL_GenVertexArrays(disp, parameters) \
+ (* GET_GenVertexArrays(disp)) parameters
+static inline _glptr_GenVertexArrays GET_GenVertexArrays(struct _glapi_table *disp) {
+ return (_glptr_GenVertexArrays) (GET_by_offset(disp, _gloffset_GenVertexArrays));
+}
+
+static inline void SET_GenVertexArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenVertexArrays, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsVertexArray)(GLuint);
+#define CALL_IsVertexArray(disp, parameters) \
+ (* GET_IsVertexArray(disp)) parameters
+static inline _glptr_IsVertexArray GET_IsVertexArray(struct _glapi_table *disp) {
+ return (_glptr_IsVertexArray) (GET_by_offset(disp, _gloffset_IsVertexArray));
+}
+
+static inline void SET_IsVertexArray(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsVertexArray, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveUniformBlockName)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetActiveUniformBlockName(disp, parameters) \
+ (* GET_GetActiveUniformBlockName(disp)) parameters
+static inline _glptr_GetActiveUniformBlockName GET_GetActiveUniformBlockName(struct _glapi_table *disp) {
+ return (_glptr_GetActiveUniformBlockName) (GET_by_offset(disp, _gloffset_GetActiveUniformBlockName));
+}
+
+static inline void SET_GetActiveUniformBlockName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveUniformBlockName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveUniformBlockiv)(GLuint, GLuint, GLenum, GLint *);
+#define CALL_GetActiveUniformBlockiv(disp, parameters) \
+ (* GET_GetActiveUniformBlockiv(disp)) parameters
+static inline _glptr_GetActiveUniformBlockiv GET_GetActiveUniformBlockiv(struct _glapi_table *disp) {
+ return (_glptr_GetActiveUniformBlockiv) (GET_by_offset(disp, _gloffset_GetActiveUniformBlockiv));
+}
+
+static inline void SET_GetActiveUniformBlockiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetActiveUniformBlockiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveUniformName)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetActiveUniformName(disp, parameters) \
+ (* GET_GetActiveUniformName(disp)) parameters
+static inline _glptr_GetActiveUniformName GET_GetActiveUniformName(struct _glapi_table *disp) {
+ return (_glptr_GetActiveUniformName) (GET_by_offset(disp, _gloffset_GetActiveUniformName));
+}
+
+static inline void SET_GetActiveUniformName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveUniformName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveUniformsiv)(GLuint, GLsizei, const GLuint *, GLenum, GLint *);
+#define CALL_GetActiveUniformsiv(disp, parameters) \
+ (* GET_GetActiveUniformsiv(disp)) parameters
+static inline _glptr_GetActiveUniformsiv GET_GetActiveUniformsiv(struct _glapi_table *disp) {
+ return (_glptr_GetActiveUniformsiv) (GET_by_offset(disp, _gloffset_GetActiveUniformsiv));
+}
+
+static inline void SET_GetActiveUniformsiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLuint *, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetActiveUniformsiv, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GetUniformBlockIndex)(GLuint, const GLchar *);
+#define CALL_GetUniformBlockIndex(disp, parameters) \
+ (* GET_GetUniformBlockIndex(disp)) parameters
+static inline _glptr_GetUniformBlockIndex GET_GetUniformBlockIndex(struct _glapi_table *disp) {
+ return (_glptr_GetUniformBlockIndex) (GET_by_offset(disp, _gloffset_GetUniformBlockIndex));
+}
+
+static inline void SET_GetUniformBlockIndex(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetUniformBlockIndex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformIndices)(GLuint, GLsizei, const GLchar * const *, GLuint *);
+#define CALL_GetUniformIndices(disp, parameters) \
+ (* GET_GetUniformIndices(disp)) parameters
+static inline _glptr_GetUniformIndices GET_GetUniformIndices(struct _glapi_table *disp) {
+ return (_glptr_GetUniformIndices) (GET_by_offset(disp, _gloffset_GetUniformIndices));
+}
+
+static inline void SET_GetUniformIndices(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLchar * const *, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetUniformIndices, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformBlockBinding)(GLuint, GLuint, GLuint);
+#define CALL_UniformBlockBinding(disp, parameters) \
+ (* GET_UniformBlockBinding(disp)) parameters
+static inline _glptr_UniformBlockBinding GET_UniformBlockBinding(struct _glapi_table *disp) {
+ return (_glptr_UniformBlockBinding) (GET_by_offset(disp, _gloffset_UniformBlockBinding));
+}
+
+static inline void SET_UniformBlockBinding(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_UniformBlockBinding, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyBufferSubData)(GLenum, GLenum, GLintptr, GLintptr, GLsizeiptr);
+#define CALL_CopyBufferSubData(disp, parameters) \
+ (* GET_CopyBufferSubData(disp)) parameters
+static inline _glptr_CopyBufferSubData GET_CopyBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_CopyBufferSubData) (GET_by_offset(disp, _gloffset_CopyBufferSubData));
+}
+
+static inline void SET_CopyBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLintptr, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_CopyBufferSubData, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_ClientWaitSync)(GLsync, GLbitfield, GLuint64);
+#define CALL_ClientWaitSync(disp, parameters) \
+ (* GET_ClientWaitSync(disp)) parameters
+static inline _glptr_ClientWaitSync GET_ClientWaitSync(struct _glapi_table *disp) {
+ return (_glptr_ClientWaitSync) (GET_by_offset(disp, _gloffset_ClientWaitSync));
+}
+
+static inline void SET_ClientWaitSync(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(GLsync, GLbitfield, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ClientWaitSync, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteSync)(GLsync);
+#define CALL_DeleteSync(disp, parameters) \
+ (* GET_DeleteSync(disp)) parameters
+static inline _glptr_DeleteSync GET_DeleteSync(struct _glapi_table *disp) {
+ return (_glptr_DeleteSync) (GET_by_offset(disp, _gloffset_DeleteSync));
+}
+
+static inline void SET_DeleteSync(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsync)) {
+ SET_by_offset(disp, _gloffset_DeleteSync, fn);
+}
+
+typedef GLsync (GLAPIENTRYP _glptr_FenceSync)(GLenum, GLbitfield);
+#define CALL_FenceSync(disp, parameters) \
+ (* GET_FenceSync(disp)) parameters
+static inline _glptr_FenceSync GET_FenceSync(struct _glapi_table *disp) {
+ return (_glptr_FenceSync) (GET_by_offset(disp, _gloffset_FenceSync));
+}
+
+static inline void SET_FenceSync(struct _glapi_table *disp, GLsync (GLAPIENTRYP fn)(GLenum, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_FenceSync, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetInteger64v)(GLenum, GLint64 *);
+#define CALL_GetInteger64v(disp, parameters) \
+ (* GET_GetInteger64v(disp)) parameters
+static inline _glptr_GetInteger64v GET_GetInteger64v(struct _glapi_table *disp) {
+ return (_glptr_GetInteger64v) (GET_by_offset(disp, _gloffset_GetInteger64v));
+}
+
+static inline void SET_GetInteger64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetInteger64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSynciv)(GLsync, GLenum, GLsizei, GLsizei *, GLint *);
+#define CALL_GetSynciv(disp, parameters) \
+ (* GET_GetSynciv(disp)) parameters
+static inline _glptr_GetSynciv GET_GetSynciv(struct _glapi_table *disp) {
+ return (_glptr_GetSynciv) (GET_by_offset(disp, _gloffset_GetSynciv));
+}
+
+static inline void SET_GetSynciv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsync, GLenum, GLsizei, GLsizei *, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetSynciv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsSync)(GLsync);
+#define CALL_IsSync(disp, parameters) \
+ (* GET_IsSync(disp)) parameters
+static inline _glptr_IsSync GET_IsSync(struct _glapi_table *disp) {
+ return (_glptr_IsSync) (GET_by_offset(disp, _gloffset_IsSync));
+}
+
+static inline void SET_IsSync(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLsync)) {
+ SET_by_offset(disp, _gloffset_IsSync, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WaitSync)(GLsync, GLbitfield, GLuint64);
+#define CALL_WaitSync(disp, parameters) \
+ (* GET_WaitSync(disp)) parameters
+static inline _glptr_WaitSync GET_WaitSync(struct _glapi_table *disp) {
+ return (_glptr_WaitSync) (GET_by_offset(disp, _gloffset_WaitSync));
+}
+
+static inline void SET_WaitSync(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsync, GLbitfield, GLuint64)) {
+ SET_by_offset(disp, _gloffset_WaitSync, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsBaseVertex)(GLenum, GLsizei, GLenum, const GLvoid *, GLint);
+#define CALL_DrawElementsBaseVertex(disp, parameters) \
+ (* GET_DrawElementsBaseVertex(disp)) parameters
+static inline _glptr_DrawElementsBaseVertex GET_DrawElementsBaseVertex(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsBaseVertex) (GET_by_offset(disp, _gloffset_DrawElementsBaseVertex));
+}
+
+static inline void SET_DrawElementsBaseVertex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *, GLint)) {
+ SET_by_offset(disp, _gloffset_DrawElementsBaseVertex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsInstancedBaseVertex)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLint);
+#define CALL_DrawElementsInstancedBaseVertex(disp, parameters) \
+ (* GET_DrawElementsInstancedBaseVertex(disp)) parameters
+static inline _glptr_DrawElementsInstancedBaseVertex GET_DrawElementsInstancedBaseVertex(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsInstancedBaseVertex) (GET_by_offset(disp, _gloffset_DrawElementsInstancedBaseVertex));
+}
+
+static inline void SET_DrawElementsInstancedBaseVertex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLint)) {
+ SET_by_offset(disp, _gloffset_DrawElementsInstancedBaseVertex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawRangeElementsBaseVertex)(GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *, GLint);
+#define CALL_DrawRangeElementsBaseVertex(disp, parameters) \
+ (* GET_DrawRangeElementsBaseVertex(disp)) parameters
+static inline _glptr_DrawRangeElementsBaseVertex GET_DrawRangeElementsBaseVertex(struct _glapi_table *disp) {
+ return (_glptr_DrawRangeElementsBaseVertex) (GET_by_offset(disp, _gloffset_DrawRangeElementsBaseVertex));
+}
+
+static inline void SET_DrawRangeElementsBaseVertex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLsizei, GLenum, const GLvoid *, GLint)) {
+ SET_by_offset(disp, _gloffset_DrawRangeElementsBaseVertex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawElementsBaseVertex)(GLenum, const GLsizei *, GLenum, const GLvoid * const *, GLsizei, const GLint *);
+#define CALL_MultiDrawElementsBaseVertex(disp, parameters) \
+ (* GET_MultiDrawElementsBaseVertex(disp)) parameters
+static inline _glptr_MultiDrawElementsBaseVertex GET_MultiDrawElementsBaseVertex(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawElementsBaseVertex) (GET_by_offset(disp, _gloffset_MultiDrawElementsBaseVertex));
+}
+
+static inline void SET_MultiDrawElementsBaseVertex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLsizei *, GLenum, const GLvoid * const *, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MultiDrawElementsBaseVertex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProvokingVertex)(GLenum);
+#define CALL_ProvokingVertex(disp, parameters) \
+ (* GET_ProvokingVertex(disp)) parameters
+static inline _glptr_ProvokingVertex GET_ProvokingVertex(struct _glapi_table *disp) {
+ return (_glptr_ProvokingVertex) (GET_by_offset(disp, _gloffset_ProvokingVertex));
+}
+
+static inline void SET_ProvokingVertex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ProvokingVertex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMultisamplefv)(GLenum, GLuint, GLfloat *);
+#define CALL_GetMultisamplefv(disp, parameters) \
+ (* GET_GetMultisamplefv(disp)) parameters
+static inline _glptr_GetMultisamplefv GET_GetMultisamplefv(struct _glapi_table *disp) {
+ return (_glptr_GetMultisamplefv) (GET_by_offset(disp, _gloffset_GetMultisamplefv));
+}
+
+static inline void SET_GetMultisamplefv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetMultisamplefv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SampleMaski)(GLuint, GLbitfield);
+#define CALL_SampleMaski(disp, parameters) \
+ (* GET_SampleMaski(disp)) parameters
+static inline _glptr_SampleMaski GET_SampleMaski(struct _glapi_table *disp) {
+ return (_glptr_SampleMaski) (GET_by_offset(disp, _gloffset_SampleMaski));
+}
+
+static inline void SET_SampleMaski(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_SampleMaski, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexImage2DMultisample)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean);
+#define CALL_TexImage2DMultisample(disp, parameters) \
+ (* GET_TexImage2DMultisample(disp)) parameters
+static inline _glptr_TexImage2DMultisample GET_TexImage2DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TexImage2DMultisample) (GET_by_offset(disp, _gloffset_TexImage2DMultisample));
+}
+
+static inline void SET_TexImage2DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TexImage2DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexImage3DMultisample)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean);
+#define CALL_TexImage3DMultisample(disp, parameters) \
+ (* GET_TexImage3DMultisample(disp)) parameters
+static inline _glptr_TexImage3DMultisample GET_TexImage3DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TexImage3DMultisample) (GET_by_offset(disp, _gloffset_TexImage3DMultisample));
+}
+
+static inline void SET_TexImage3DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TexImage3DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendEquationSeparateiARB)(GLuint, GLenum, GLenum);
+#define CALL_BlendEquationSeparateiARB(disp, parameters) \
+ (* GET_BlendEquationSeparateiARB(disp)) parameters
+static inline _glptr_BlendEquationSeparateiARB GET_BlendEquationSeparateiARB(struct _glapi_table *disp) {
+ return (_glptr_BlendEquationSeparateiARB) (GET_by_offset(disp, _gloffset_BlendEquationSeparateiARB));
+}
+
+static inline void SET_BlendEquationSeparateiARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendEquationSeparateiARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendEquationiARB)(GLuint, GLenum);
+#define CALL_BlendEquationiARB(disp, parameters) \
+ (* GET_BlendEquationiARB(disp)) parameters
+static inline _glptr_BlendEquationiARB GET_BlendEquationiARB(struct _glapi_table *disp) {
+ return (_glptr_BlendEquationiARB) (GET_by_offset(disp, _gloffset_BlendEquationiARB));
+}
+
+static inline void SET_BlendEquationiARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendEquationiARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendFuncSeparateiARB)(GLuint, GLenum, GLenum, GLenum, GLenum);
+#define CALL_BlendFuncSeparateiARB(disp, parameters) \
+ (* GET_BlendFuncSeparateiARB(disp)) parameters
+static inline _glptr_BlendFuncSeparateiARB GET_BlendFuncSeparateiARB(struct _glapi_table *disp) {
+ return (_glptr_BlendFuncSeparateiARB) (GET_by_offset(disp, _gloffset_BlendFuncSeparateiARB));
+}
+
+static inline void SET_BlendFuncSeparateiARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendFuncSeparateiARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendFunciARB)(GLuint, GLenum, GLenum);
+#define CALL_BlendFunciARB(disp, parameters) \
+ (* GET_BlendFunciARB(disp)) parameters
+static inline _glptr_BlendFunciARB GET_BlendFunciARB(struct _glapi_table *disp) {
+ return (_glptr_BlendFunciARB) (GET_by_offset(disp, _gloffset_BlendFunciARB));
+}
+
+static inline void SET_BlendFunciARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlendFunciARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindFragDataLocationIndexed)(GLuint, GLuint, GLuint, const GLchar *);
+#define CALL_BindFragDataLocationIndexed(disp, parameters) \
+ (* GET_BindFragDataLocationIndexed(disp)) parameters
+static inline _glptr_BindFragDataLocationIndexed GET_BindFragDataLocationIndexed(struct _glapi_table *disp) {
+ return (_glptr_BindFragDataLocationIndexed) (GET_by_offset(disp, _gloffset_BindFragDataLocationIndexed));
+}
+
+static inline void SET_BindFragDataLocationIndexed(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_BindFragDataLocationIndexed, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetFragDataIndex)(GLuint, const GLchar *);
+#define CALL_GetFragDataIndex(disp, parameters) \
+ (* GET_GetFragDataIndex(disp)) parameters
+static inline _glptr_GetFragDataIndex GET_GetFragDataIndex(struct _glapi_table *disp) {
+ return (_glptr_GetFragDataIndex) (GET_by_offset(disp, _gloffset_GetFragDataIndex));
+}
+
+static inline void SET_GetFragDataIndex(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetFragDataIndex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindSampler)(GLuint, GLuint);
+#define CALL_BindSampler(disp, parameters) \
+ (* GET_BindSampler(disp)) parameters
+static inline _glptr_BindSampler GET_BindSampler(struct _glapi_table *disp) {
+ return (_glptr_BindSampler) (GET_by_offset(disp, _gloffset_BindSampler));
+}
+
+static inline void SET_BindSampler(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindSampler, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteSamplers)(GLsizei, const GLuint *);
+#define CALL_DeleteSamplers(disp, parameters) \
+ (* GET_DeleteSamplers(disp)) parameters
+static inline _glptr_DeleteSamplers GET_DeleteSamplers(struct _glapi_table *disp) {
+ return (_glptr_DeleteSamplers) (GET_by_offset(disp, _gloffset_DeleteSamplers));
+}
+
+static inline void SET_DeleteSamplers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteSamplers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenSamplers)(GLsizei, GLuint *);
+#define CALL_GenSamplers(disp, parameters) \
+ (* GET_GenSamplers(disp)) parameters
+static inline _glptr_GenSamplers GET_GenSamplers(struct _glapi_table *disp) {
+ return (_glptr_GenSamplers) (GET_by_offset(disp, _gloffset_GenSamplers));
+}
+
+static inline void SET_GenSamplers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenSamplers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSamplerParameterIiv)(GLuint, GLenum, GLint *);
+#define CALL_GetSamplerParameterIiv(disp, parameters) \
+ (* GET_GetSamplerParameterIiv(disp)) parameters
+static inline _glptr_GetSamplerParameterIiv GET_GetSamplerParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_GetSamplerParameterIiv) (GET_by_offset(disp, _gloffset_GetSamplerParameterIiv));
+}
+
+static inline void SET_GetSamplerParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetSamplerParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSamplerParameterIuiv)(GLuint, GLenum, GLuint *);
+#define CALL_GetSamplerParameterIuiv(disp, parameters) \
+ (* GET_GetSamplerParameterIuiv(disp)) parameters
+static inline _glptr_GetSamplerParameterIuiv GET_GetSamplerParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_GetSamplerParameterIuiv) (GET_by_offset(disp, _gloffset_GetSamplerParameterIuiv));
+}
+
+static inline void SET_GetSamplerParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetSamplerParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSamplerParameterfv)(GLuint, GLenum, GLfloat *);
+#define CALL_GetSamplerParameterfv(disp, parameters) \
+ (* GET_GetSamplerParameterfv(disp)) parameters
+static inline _glptr_GetSamplerParameterfv GET_GetSamplerParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetSamplerParameterfv) (GET_by_offset(disp, _gloffset_GetSamplerParameterfv));
+}
+
+static inline void SET_GetSamplerParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetSamplerParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSamplerParameteriv)(GLuint, GLenum, GLint *);
+#define CALL_GetSamplerParameteriv(disp, parameters) \
+ (* GET_GetSamplerParameteriv(disp)) parameters
+static inline _glptr_GetSamplerParameteriv GET_GetSamplerParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetSamplerParameteriv) (GET_by_offset(disp, _gloffset_GetSamplerParameteriv));
+}
+
+static inline void SET_GetSamplerParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetSamplerParameteriv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsSampler)(GLuint);
+#define CALL_IsSampler(disp, parameters) \
+ (* GET_IsSampler(disp)) parameters
+static inline _glptr_IsSampler GET_IsSampler(struct _glapi_table *disp) {
+ return (_glptr_IsSampler) (GET_by_offset(disp, _gloffset_IsSampler));
+}
+
+static inline void SET_IsSampler(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsSampler, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameterIiv)(GLuint, GLenum, const GLint *);
+#define CALL_SamplerParameterIiv(disp, parameters) \
+ (* GET_SamplerParameterIiv(disp)) parameters
+static inline _glptr_SamplerParameterIiv GET_SamplerParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameterIiv) (GET_by_offset(disp, _gloffset_SamplerParameterIiv));
+}
+
+static inline void SET_SamplerParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_SamplerParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameterIuiv)(GLuint, GLenum, const GLuint *);
+#define CALL_SamplerParameterIuiv(disp, parameters) \
+ (* GET_SamplerParameterIuiv(disp)) parameters
+static inline _glptr_SamplerParameterIuiv GET_SamplerParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameterIuiv) (GET_by_offset(disp, _gloffset_SamplerParameterIuiv));
+}
+
+static inline void SET_SamplerParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_SamplerParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameterf)(GLuint, GLenum, GLfloat);
+#define CALL_SamplerParameterf(disp, parameters) \
+ (* GET_SamplerParameterf(disp)) parameters
+static inline _glptr_SamplerParameterf GET_SamplerParameterf(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameterf) (GET_by_offset(disp, _gloffset_SamplerParameterf));
+}
+
+static inline void SET_SamplerParameterf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_SamplerParameterf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameterfv)(GLuint, GLenum, const GLfloat *);
+#define CALL_SamplerParameterfv(disp, parameters) \
+ (* GET_SamplerParameterfv(disp)) parameters
+static inline _glptr_SamplerParameterfv GET_SamplerParameterfv(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameterfv) (GET_by_offset(disp, _gloffset_SamplerParameterfv));
+}
+
+static inline void SET_SamplerParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_SamplerParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameteri)(GLuint, GLenum, GLint);
+#define CALL_SamplerParameteri(disp, parameters) \
+ (* GET_SamplerParameteri(disp)) parameters
+static inline _glptr_SamplerParameteri GET_SamplerParameteri(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameteri) (GET_by_offset(disp, _gloffset_SamplerParameteri));
+}
+
+static inline void SET_SamplerParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_SamplerParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplerParameteriv)(GLuint, GLenum, const GLint *);
+#define CALL_SamplerParameteriv(disp, parameters) \
+ (* GET_SamplerParameteriv(disp)) parameters
+static inline _glptr_SamplerParameteriv GET_SamplerParameteriv(struct _glapi_table *disp) {
+ return (_glptr_SamplerParameteriv) (GET_by_offset(disp, _gloffset_SamplerParameteriv));
+}
+
+static inline void SET_SamplerParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_SamplerParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryObjecti64v)(GLuint, GLenum, GLint64 *);
+#define CALL_GetQueryObjecti64v(disp, parameters) \
+ (* GET_GetQueryObjecti64v(disp)) parameters
+static inline _glptr_GetQueryObjecti64v GET_GetQueryObjecti64v(struct _glapi_table *disp) {
+ return (_glptr_GetQueryObjecti64v) (GET_by_offset(disp, _gloffset_GetQueryObjecti64v));
+}
+
+static inline void SET_GetQueryObjecti64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetQueryObjecti64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryObjectui64v)(GLuint, GLenum, GLuint64 *);
+#define CALL_GetQueryObjectui64v(disp, parameters) \
+ (* GET_GetQueryObjectui64v(disp)) parameters
+static inline _glptr_GetQueryObjectui64v GET_GetQueryObjectui64v(struct _glapi_table *disp) {
+ return (_glptr_GetQueryObjectui64v) (GET_by_offset(disp, _gloffset_GetQueryObjectui64v));
+}
+
+static inline void SET_GetQueryObjectui64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_GetQueryObjectui64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_QueryCounter)(GLuint, GLenum);
+#define CALL_QueryCounter(disp, parameters) \
+ (* GET_QueryCounter(disp)) parameters
+static inline _glptr_QueryCounter GET_QueryCounter(struct _glapi_table *disp) {
+ return (_glptr_QueryCounter) (GET_by_offset(disp, _gloffset_QueryCounter));
+}
+
+static inline void SET_QueryCounter(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_QueryCounter, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorP3ui)(GLenum, GLuint);
+#define CALL_ColorP3ui(disp, parameters) \
+ (* GET_ColorP3ui(disp)) parameters
+static inline _glptr_ColorP3ui GET_ColorP3ui(struct _glapi_table *disp) {
+ return (_glptr_ColorP3ui) (GET_by_offset(disp, _gloffset_ColorP3ui));
+}
+
+static inline void SET_ColorP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_ColorP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorP3uiv)(GLenum, const GLuint *);
+#define CALL_ColorP3uiv(disp, parameters) \
+ (* GET_ColorP3uiv(disp)) parameters
+static inline _glptr_ColorP3uiv GET_ColorP3uiv(struct _glapi_table *disp) {
+ return (_glptr_ColorP3uiv) (GET_by_offset(disp, _gloffset_ColorP3uiv));
+}
+
+static inline void SET_ColorP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ColorP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorP4ui)(GLenum, GLuint);
+#define CALL_ColorP4ui(disp, parameters) \
+ (* GET_ColorP4ui(disp)) parameters
+static inline _glptr_ColorP4ui GET_ColorP4ui(struct _glapi_table *disp) {
+ return (_glptr_ColorP4ui) (GET_by_offset(disp, _gloffset_ColorP4ui));
+}
+
+static inline void SET_ColorP4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_ColorP4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorP4uiv)(GLenum, const GLuint *);
+#define CALL_ColorP4uiv(disp, parameters) \
+ (* GET_ColorP4uiv(disp)) parameters
+static inline _glptr_ColorP4uiv GET_ColorP4uiv(struct _glapi_table *disp) {
+ return (_glptr_ColorP4uiv) (GET_by_offset(disp, _gloffset_ColorP4uiv));
+}
+
+static inline void SET_ColorP4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ColorP4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP1ui)(GLenum, GLenum, GLuint);
+#define CALL_MultiTexCoordP1ui(disp, parameters) \
+ (* GET_MultiTexCoordP1ui(disp)) parameters
+static inline _glptr_MultiTexCoordP1ui GET_MultiTexCoordP1ui(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP1ui) (GET_by_offset(disp, _gloffset_MultiTexCoordP1ui));
+}
+
+static inline void SET_MultiTexCoordP1ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP1ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP1uiv)(GLenum, GLenum, const GLuint *);
+#define CALL_MultiTexCoordP1uiv(disp, parameters) \
+ (* GET_MultiTexCoordP1uiv(disp)) parameters
+static inline _glptr_MultiTexCoordP1uiv GET_MultiTexCoordP1uiv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP1uiv) (GET_by_offset(disp, _gloffset_MultiTexCoordP1uiv));
+}
+
+static inline void SET_MultiTexCoordP1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP2ui)(GLenum, GLenum, GLuint);
+#define CALL_MultiTexCoordP2ui(disp, parameters) \
+ (* GET_MultiTexCoordP2ui(disp)) parameters
+static inline _glptr_MultiTexCoordP2ui GET_MultiTexCoordP2ui(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP2ui) (GET_by_offset(disp, _gloffset_MultiTexCoordP2ui));
+}
+
+static inline void SET_MultiTexCoordP2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP2uiv)(GLenum, GLenum, const GLuint *);
+#define CALL_MultiTexCoordP2uiv(disp, parameters) \
+ (* GET_MultiTexCoordP2uiv(disp)) parameters
+static inline _glptr_MultiTexCoordP2uiv GET_MultiTexCoordP2uiv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP2uiv) (GET_by_offset(disp, _gloffset_MultiTexCoordP2uiv));
+}
+
+static inline void SET_MultiTexCoordP2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP3ui)(GLenum, GLenum, GLuint);
+#define CALL_MultiTexCoordP3ui(disp, parameters) \
+ (* GET_MultiTexCoordP3ui(disp)) parameters
+static inline _glptr_MultiTexCoordP3ui GET_MultiTexCoordP3ui(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP3ui) (GET_by_offset(disp, _gloffset_MultiTexCoordP3ui));
+}
+
+static inline void SET_MultiTexCoordP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP3uiv)(GLenum, GLenum, const GLuint *);
+#define CALL_MultiTexCoordP3uiv(disp, parameters) \
+ (* GET_MultiTexCoordP3uiv(disp)) parameters
+static inline _glptr_MultiTexCoordP3uiv GET_MultiTexCoordP3uiv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP3uiv) (GET_by_offset(disp, _gloffset_MultiTexCoordP3uiv));
+}
+
+static inline void SET_MultiTexCoordP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP4ui)(GLenum, GLenum, GLuint);
+#define CALL_MultiTexCoordP4ui(disp, parameters) \
+ (* GET_MultiTexCoordP4ui(disp)) parameters
+static inline _glptr_MultiTexCoordP4ui GET_MultiTexCoordP4ui(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP4ui) (GET_by_offset(disp, _gloffset_MultiTexCoordP4ui));
+}
+
+static inline void SET_MultiTexCoordP4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoordP4uiv)(GLenum, GLenum, const GLuint *);
+#define CALL_MultiTexCoordP4uiv(disp, parameters) \
+ (* GET_MultiTexCoordP4uiv(disp)) parameters
+static inline _glptr_MultiTexCoordP4uiv GET_MultiTexCoordP4uiv(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoordP4uiv) (GET_by_offset(disp, _gloffset_MultiTexCoordP4uiv));
+}
+
+static inline void SET_MultiTexCoordP4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoordP4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NormalP3ui)(GLenum, GLuint);
+#define CALL_NormalP3ui(disp, parameters) \
+ (* GET_NormalP3ui(disp)) parameters
+static inline _glptr_NormalP3ui GET_NormalP3ui(struct _glapi_table *disp) {
+ return (_glptr_NormalP3ui) (GET_by_offset(disp, _gloffset_NormalP3ui));
+}
+
+static inline void SET_NormalP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_NormalP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NormalP3uiv)(GLenum, const GLuint *);
+#define CALL_NormalP3uiv(disp, parameters) \
+ (* GET_NormalP3uiv(disp)) parameters
+static inline _glptr_NormalP3uiv GET_NormalP3uiv(struct _glapi_table *disp) {
+ return (_glptr_NormalP3uiv) (GET_by_offset(disp, _gloffset_NormalP3uiv));
+}
+
+static inline void SET_NormalP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_NormalP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColorP3ui)(GLenum, GLuint);
+#define CALL_SecondaryColorP3ui(disp, parameters) \
+ (* GET_SecondaryColorP3ui(disp)) parameters
+static inline _glptr_SecondaryColorP3ui GET_SecondaryColorP3ui(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColorP3ui) (GET_by_offset(disp, _gloffset_SecondaryColorP3ui));
+}
+
+static inline void SET_SecondaryColorP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_SecondaryColorP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColorP3uiv)(GLenum, const GLuint *);
+#define CALL_SecondaryColorP3uiv(disp, parameters) \
+ (* GET_SecondaryColorP3uiv(disp)) parameters
+static inline _glptr_SecondaryColorP3uiv GET_SecondaryColorP3uiv(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColorP3uiv) (GET_by_offset(disp, _gloffset_SecondaryColorP3uiv));
+}
+
+static inline void SET_SecondaryColorP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColorP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP1ui)(GLenum, GLuint);
+#define CALL_TexCoordP1ui(disp, parameters) \
+ (* GET_TexCoordP1ui(disp)) parameters
+static inline _glptr_TexCoordP1ui GET_TexCoordP1ui(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP1ui) (GET_by_offset(disp, _gloffset_TexCoordP1ui));
+}
+
+static inline void SET_TexCoordP1ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TexCoordP1ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP1uiv)(GLenum, const GLuint *);
+#define CALL_TexCoordP1uiv(disp, parameters) \
+ (* GET_TexCoordP1uiv(disp)) parameters
+static inline _glptr_TexCoordP1uiv GET_TexCoordP1uiv(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP1uiv) (GET_by_offset(disp, _gloffset_TexCoordP1uiv));
+}
+
+static inline void SET_TexCoordP1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TexCoordP1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP2ui)(GLenum, GLuint);
+#define CALL_TexCoordP2ui(disp, parameters) \
+ (* GET_TexCoordP2ui(disp)) parameters
+static inline _glptr_TexCoordP2ui GET_TexCoordP2ui(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP2ui) (GET_by_offset(disp, _gloffset_TexCoordP2ui));
+}
+
+static inline void SET_TexCoordP2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TexCoordP2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP2uiv)(GLenum, const GLuint *);
+#define CALL_TexCoordP2uiv(disp, parameters) \
+ (* GET_TexCoordP2uiv(disp)) parameters
+static inline _glptr_TexCoordP2uiv GET_TexCoordP2uiv(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP2uiv) (GET_by_offset(disp, _gloffset_TexCoordP2uiv));
+}
+
+static inline void SET_TexCoordP2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TexCoordP2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP3ui)(GLenum, GLuint);
+#define CALL_TexCoordP3ui(disp, parameters) \
+ (* GET_TexCoordP3ui(disp)) parameters
+static inline _glptr_TexCoordP3ui GET_TexCoordP3ui(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP3ui) (GET_by_offset(disp, _gloffset_TexCoordP3ui));
+}
+
+static inline void SET_TexCoordP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TexCoordP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP3uiv)(GLenum, const GLuint *);
+#define CALL_TexCoordP3uiv(disp, parameters) \
+ (* GET_TexCoordP3uiv(disp)) parameters
+static inline _glptr_TexCoordP3uiv GET_TexCoordP3uiv(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP3uiv) (GET_by_offset(disp, _gloffset_TexCoordP3uiv));
+}
+
+static inline void SET_TexCoordP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TexCoordP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP4ui)(GLenum, GLuint);
+#define CALL_TexCoordP4ui(disp, parameters) \
+ (* GET_TexCoordP4ui(disp)) parameters
+static inline _glptr_TexCoordP4ui GET_TexCoordP4ui(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP4ui) (GET_by_offset(disp, _gloffset_TexCoordP4ui));
+}
+
+static inline void SET_TexCoordP4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TexCoordP4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordP4uiv)(GLenum, const GLuint *);
+#define CALL_TexCoordP4uiv(disp, parameters) \
+ (* GET_TexCoordP4uiv(disp)) parameters
+static inline _glptr_TexCoordP4uiv GET_TexCoordP4uiv(struct _glapi_table *disp) {
+ return (_glptr_TexCoordP4uiv) (GET_by_offset(disp, _gloffset_TexCoordP4uiv));
+}
+
+static inline void SET_TexCoordP4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TexCoordP4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP1ui)(GLuint, GLenum, GLboolean, GLuint);
+#define CALL_VertexAttribP1ui(disp, parameters) \
+ (* GET_VertexAttribP1ui(disp)) parameters
+static inline _glptr_VertexAttribP1ui GET_VertexAttribP1ui(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP1ui) (GET_by_offset(disp, _gloffset_VertexAttribP1ui));
+}
+
+static inline void SET_VertexAttribP1ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP1ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP1uiv)(GLuint, GLenum, GLboolean, const GLuint *);
+#define CALL_VertexAttribP1uiv(disp, parameters) \
+ (* GET_VertexAttribP1uiv(disp)) parameters
+static inline _glptr_VertexAttribP1uiv GET_VertexAttribP1uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP1uiv) (GET_by_offset(disp, _gloffset_VertexAttribP1uiv));
+}
+
+static inline void SET_VertexAttribP1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP2ui)(GLuint, GLenum, GLboolean, GLuint);
+#define CALL_VertexAttribP2ui(disp, parameters) \
+ (* GET_VertexAttribP2ui(disp)) parameters
+static inline _glptr_VertexAttribP2ui GET_VertexAttribP2ui(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP2ui) (GET_by_offset(disp, _gloffset_VertexAttribP2ui));
+}
+
+static inline void SET_VertexAttribP2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP2uiv)(GLuint, GLenum, GLboolean, const GLuint *);
+#define CALL_VertexAttribP2uiv(disp, parameters) \
+ (* GET_VertexAttribP2uiv(disp)) parameters
+static inline _glptr_VertexAttribP2uiv GET_VertexAttribP2uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP2uiv) (GET_by_offset(disp, _gloffset_VertexAttribP2uiv));
+}
+
+static inline void SET_VertexAttribP2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP3ui)(GLuint, GLenum, GLboolean, GLuint);
+#define CALL_VertexAttribP3ui(disp, parameters) \
+ (* GET_VertexAttribP3ui(disp)) parameters
+static inline _glptr_VertexAttribP3ui GET_VertexAttribP3ui(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP3ui) (GET_by_offset(disp, _gloffset_VertexAttribP3ui));
+}
+
+static inline void SET_VertexAttribP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP3uiv)(GLuint, GLenum, GLboolean, const GLuint *);
+#define CALL_VertexAttribP3uiv(disp, parameters) \
+ (* GET_VertexAttribP3uiv(disp)) parameters
+static inline _glptr_VertexAttribP3uiv GET_VertexAttribP3uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP3uiv) (GET_by_offset(disp, _gloffset_VertexAttribP3uiv));
+}
+
+static inline void SET_VertexAttribP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP4ui)(GLuint, GLenum, GLboolean, GLuint);
+#define CALL_VertexAttribP4ui(disp, parameters) \
+ (* GET_VertexAttribP4ui(disp)) parameters
+static inline _glptr_VertexAttribP4ui GET_VertexAttribP4ui(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP4ui) (GET_by_offset(disp, _gloffset_VertexAttribP4ui));
+}
+
+static inline void SET_VertexAttribP4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribP4uiv)(GLuint, GLenum, GLboolean, const GLuint *);
+#define CALL_VertexAttribP4uiv(disp, parameters) \
+ (* GET_VertexAttribP4uiv(disp)) parameters
+static inline _glptr_VertexAttribP4uiv GET_VertexAttribP4uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribP4uiv) (GET_by_offset(disp, _gloffset_VertexAttribP4uiv));
+}
+
+static inline void SET_VertexAttribP4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLboolean, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribP4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP2ui)(GLenum, GLuint);
+#define CALL_VertexP2ui(disp, parameters) \
+ (* GET_VertexP2ui(disp)) parameters
+static inline _glptr_VertexP2ui GET_VertexP2ui(struct _glapi_table *disp) {
+ return (_glptr_VertexP2ui) (GET_by_offset(disp, _gloffset_VertexP2ui));
+}
+
+static inline void SET_VertexP2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexP2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP2uiv)(GLenum, const GLuint *);
+#define CALL_VertexP2uiv(disp, parameters) \
+ (* GET_VertexP2uiv(disp)) parameters
+static inline _glptr_VertexP2uiv GET_VertexP2uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexP2uiv) (GET_by_offset(disp, _gloffset_VertexP2uiv));
+}
+
+static inline void SET_VertexP2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexP2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP3ui)(GLenum, GLuint);
+#define CALL_VertexP3ui(disp, parameters) \
+ (* GET_VertexP3ui(disp)) parameters
+static inline _glptr_VertexP3ui GET_VertexP3ui(struct _glapi_table *disp) {
+ return (_glptr_VertexP3ui) (GET_by_offset(disp, _gloffset_VertexP3ui));
+}
+
+static inline void SET_VertexP3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexP3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP3uiv)(GLenum, const GLuint *);
+#define CALL_VertexP3uiv(disp, parameters) \
+ (* GET_VertexP3uiv(disp)) parameters
+static inline _glptr_VertexP3uiv GET_VertexP3uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexP3uiv) (GET_by_offset(disp, _gloffset_VertexP3uiv));
+}
+
+static inline void SET_VertexP3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexP3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP4ui)(GLenum, GLuint);
+#define CALL_VertexP4ui(disp, parameters) \
+ (* GET_VertexP4ui(disp)) parameters
+static inline _glptr_VertexP4ui GET_VertexP4ui(struct _glapi_table *disp) {
+ return (_glptr_VertexP4ui) (GET_by_offset(disp, _gloffset_VertexP4ui));
+}
+
+static inline void SET_VertexP4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexP4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexP4uiv)(GLenum, const GLuint *);
+#define CALL_VertexP4uiv(disp, parameters) \
+ (* GET_VertexP4uiv(disp)) parameters
+static inline _glptr_VertexP4uiv GET_VertexP4uiv(struct _glapi_table *disp) {
+ return (_glptr_VertexP4uiv) (GET_by_offset(disp, _gloffset_VertexP4uiv));
+}
+
+static inline void SET_VertexP4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexP4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawArraysIndirect)(GLenum, const GLvoid *);
+#define CALL_DrawArraysIndirect(disp, parameters) \
+ (* GET_DrawArraysIndirect(disp)) parameters
+static inline _glptr_DrawArraysIndirect GET_DrawArraysIndirect(struct _glapi_table *disp) {
+ return (_glptr_DrawArraysIndirect) (GET_by_offset(disp, _gloffset_DrawArraysIndirect));
+}
+
+static inline void SET_DrawArraysIndirect(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DrawArraysIndirect, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsIndirect)(GLenum, GLenum, const GLvoid *);
+#define CALL_DrawElementsIndirect(disp, parameters) \
+ (* GET_DrawElementsIndirect(disp)) parameters
+static inline _glptr_DrawElementsIndirect GET_DrawElementsIndirect(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsIndirect) (GET_by_offset(disp, _gloffset_DrawElementsIndirect));
+}
+
+static inline void SET_DrawElementsIndirect(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DrawElementsIndirect, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformdv)(GLuint, GLint, GLdouble *);
+#define CALL_GetUniformdv(disp, parameters) \
+ (* GET_GetUniformdv(disp)) parameters
+static inline _glptr_GetUniformdv GET_GetUniformdv(struct _glapi_table *disp) {
+ return (_glptr_GetUniformdv) (GET_by_offset(disp, _gloffset_GetUniformdv));
+}
+
+static inline void SET_GetUniformdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetUniformdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1d)(GLint, GLdouble);
+#define CALL_Uniform1d(disp, parameters) \
+ (* GET_Uniform1d(disp)) parameters
+static inline _glptr_Uniform1d GET_Uniform1d(struct _glapi_table *disp) {
+ return (_glptr_Uniform1d) (GET_by_offset(disp, _gloffset_Uniform1d));
+}
+
+static inline void SET_Uniform1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Uniform1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1dv)(GLint, GLsizei, const GLdouble *);
+#define CALL_Uniform1dv(disp, parameters) \
+ (* GET_Uniform1dv(disp)) parameters
+static inline _glptr_Uniform1dv GET_Uniform1dv(struct _glapi_table *disp) {
+ return (_glptr_Uniform1dv) (GET_by_offset(disp, _gloffset_Uniform1dv));
+}
+
+static inline void SET_Uniform1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Uniform1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2d)(GLint, GLdouble, GLdouble);
+#define CALL_Uniform2d(disp, parameters) \
+ (* GET_Uniform2d(disp)) parameters
+static inline _glptr_Uniform2d GET_Uniform2d(struct _glapi_table *disp) {
+ return (_glptr_Uniform2d) (GET_by_offset(disp, _gloffset_Uniform2d));
+}
+
+static inline void SET_Uniform2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Uniform2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2dv)(GLint, GLsizei, const GLdouble *);
+#define CALL_Uniform2dv(disp, parameters) \
+ (* GET_Uniform2dv(disp)) parameters
+static inline _glptr_Uniform2dv GET_Uniform2dv(struct _glapi_table *disp) {
+ return (_glptr_Uniform2dv) (GET_by_offset(disp, _gloffset_Uniform2dv));
+}
+
+static inline void SET_Uniform2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Uniform2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3d)(GLint, GLdouble, GLdouble, GLdouble);
+#define CALL_Uniform3d(disp, parameters) \
+ (* GET_Uniform3d(disp)) parameters
+static inline _glptr_Uniform3d GET_Uniform3d(struct _glapi_table *disp) {
+ return (_glptr_Uniform3d) (GET_by_offset(disp, _gloffset_Uniform3d));
+}
+
+static inline void SET_Uniform3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Uniform3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3dv)(GLint, GLsizei, const GLdouble *);
+#define CALL_Uniform3dv(disp, parameters) \
+ (* GET_Uniform3dv(disp)) parameters
+static inline _glptr_Uniform3dv GET_Uniform3dv(struct _glapi_table *disp) {
+ return (_glptr_Uniform3dv) (GET_by_offset(disp, _gloffset_Uniform3dv));
+}
+
+static inline void SET_Uniform3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Uniform3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4d)(GLint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_Uniform4d(disp, parameters) \
+ (* GET_Uniform4d(disp)) parameters
+static inline _glptr_Uniform4d GET_Uniform4d(struct _glapi_table *disp) {
+ return (_glptr_Uniform4d) (GET_by_offset(disp, _gloffset_Uniform4d));
+}
+
+static inline void SET_Uniform4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_Uniform4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4dv)(GLint, GLsizei, const GLdouble *);
+#define CALL_Uniform4dv(disp, parameters) \
+ (* GET_Uniform4dv(disp)) parameters
+static inline _glptr_Uniform4dv GET_Uniform4dv(struct _glapi_table *disp) {
+ return (_glptr_Uniform4dv) (GET_by_offset(disp, _gloffset_Uniform4dv));
+}
+
+static inline void SET_Uniform4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_Uniform4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix2dv(disp, parameters) \
+ (* GET_UniformMatrix2dv(disp)) parameters
+static inline _glptr_UniformMatrix2dv GET_UniformMatrix2dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2dv) (GET_by_offset(disp, _gloffset_UniformMatrix2dv));
+}
+
+static inline void SET_UniformMatrix2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2x3dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix2x3dv(disp, parameters) \
+ (* GET_UniformMatrix2x3dv(disp)) parameters
+static inline _glptr_UniformMatrix2x3dv GET_UniformMatrix2x3dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2x3dv) (GET_by_offset(disp, _gloffset_UniformMatrix2x3dv));
+}
+
+static inline void SET_UniformMatrix2x3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2x3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix2x4dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix2x4dv(disp, parameters) \
+ (* GET_UniformMatrix2x4dv(disp)) parameters
+static inline _glptr_UniformMatrix2x4dv GET_UniformMatrix2x4dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix2x4dv) (GET_by_offset(disp, _gloffset_UniformMatrix2x4dv));
+}
+
+static inline void SET_UniformMatrix2x4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix2x4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix3dv(disp, parameters) \
+ (* GET_UniformMatrix3dv(disp)) parameters
+static inline _glptr_UniformMatrix3dv GET_UniformMatrix3dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3dv) (GET_by_offset(disp, _gloffset_UniformMatrix3dv));
+}
+
+static inline void SET_UniformMatrix3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3x2dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix3x2dv(disp, parameters) \
+ (* GET_UniformMatrix3x2dv(disp)) parameters
+static inline _glptr_UniformMatrix3x2dv GET_UniformMatrix3x2dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3x2dv) (GET_by_offset(disp, _gloffset_UniformMatrix3x2dv));
+}
+
+static inline void SET_UniformMatrix3x2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3x2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix3x4dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix3x4dv(disp, parameters) \
+ (* GET_UniformMatrix3x4dv(disp)) parameters
+static inline _glptr_UniformMatrix3x4dv GET_UniformMatrix3x4dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix3x4dv) (GET_by_offset(disp, _gloffset_UniformMatrix3x4dv));
+}
+
+static inline void SET_UniformMatrix3x4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix3x4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix4dv(disp, parameters) \
+ (* GET_UniformMatrix4dv(disp)) parameters
+static inline _glptr_UniformMatrix4dv GET_UniformMatrix4dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4dv) (GET_by_offset(disp, _gloffset_UniformMatrix4dv));
+}
+
+static inline void SET_UniformMatrix4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4x2dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix4x2dv(disp, parameters) \
+ (* GET_UniformMatrix4x2dv(disp)) parameters
+static inline _glptr_UniformMatrix4x2dv GET_UniformMatrix4x2dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4x2dv) (GET_by_offset(disp, _gloffset_UniformMatrix4x2dv));
+}
+
+static inline void SET_UniformMatrix4x2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4x2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformMatrix4x3dv)(GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_UniformMatrix4x3dv(disp, parameters) \
+ (* GET_UniformMatrix4x3dv(disp)) parameters
+static inline _glptr_UniformMatrix4x3dv GET_UniformMatrix4x3dv(struct _glapi_table *disp) {
+ return (_glptr_UniformMatrix4x3dv) (GET_by_offset(disp, _gloffset_UniformMatrix4x3dv));
+}
+
+static inline void SET_UniformMatrix4x3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_UniformMatrix4x3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveSubroutineName)(GLuint, GLenum, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetActiveSubroutineName(disp, parameters) \
+ (* GET_GetActiveSubroutineName(disp)) parameters
+static inline _glptr_GetActiveSubroutineName GET_GetActiveSubroutineName(struct _glapi_table *disp) {
+ return (_glptr_GetActiveSubroutineName) (GET_by_offset(disp, _gloffset_GetActiveSubroutineName));
+}
+
+static inline void SET_GetActiveSubroutineName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveSubroutineName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveSubroutineUniformName)(GLuint, GLenum, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetActiveSubroutineUniformName(disp, parameters) \
+ (* GET_GetActiveSubroutineUniformName(disp)) parameters
+static inline _glptr_GetActiveSubroutineUniformName GET_GetActiveSubroutineUniformName(struct _glapi_table *disp) {
+ return (_glptr_GetActiveSubroutineUniformName) (GET_by_offset(disp, _gloffset_GetActiveSubroutineUniformName));
+}
+
+static inline void SET_GetActiveSubroutineUniformName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetActiveSubroutineUniformName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveSubroutineUniformiv)(GLuint, GLenum, GLuint, GLenum, GLint *);
+#define CALL_GetActiveSubroutineUniformiv(disp, parameters) \
+ (* GET_GetActiveSubroutineUniformiv(disp)) parameters
+static inline _glptr_GetActiveSubroutineUniformiv GET_GetActiveSubroutineUniformiv(struct _glapi_table *disp) {
+ return (_glptr_GetActiveSubroutineUniformiv) (GET_by_offset(disp, _gloffset_GetActiveSubroutineUniformiv));
+}
+
+static inline void SET_GetActiveSubroutineUniformiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetActiveSubroutineUniformiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramStageiv)(GLuint, GLenum, GLenum, GLint *);
+#define CALL_GetProgramStageiv(disp, parameters) \
+ (* GET_GetProgramStageiv(disp)) parameters
+static inline _glptr_GetProgramStageiv GET_GetProgramStageiv(struct _glapi_table *disp) {
+ return (_glptr_GetProgramStageiv) (GET_by_offset(disp, _gloffset_GetProgramStageiv));
+}
+
+static inline void SET_GetProgramStageiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramStageiv, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GetSubroutineIndex)(GLuint, GLenum, const GLchar *);
+#define CALL_GetSubroutineIndex(disp, parameters) \
+ (* GET_GetSubroutineIndex(disp)) parameters
+static inline _glptr_GetSubroutineIndex GET_GetSubroutineIndex(struct _glapi_table *disp) {
+ return (_glptr_GetSubroutineIndex) (GET_by_offset(disp, _gloffset_GetSubroutineIndex));
+}
+
+static inline void SET_GetSubroutineIndex(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLuint, GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetSubroutineIndex, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetSubroutineUniformLocation)(GLuint, GLenum, const GLchar *);
+#define CALL_GetSubroutineUniformLocation(disp, parameters) \
+ (* GET_GetSubroutineUniformLocation(disp)) parameters
+static inline _glptr_GetSubroutineUniformLocation GET_GetSubroutineUniformLocation(struct _glapi_table *disp) {
+ return (_glptr_GetSubroutineUniformLocation) (GET_by_offset(disp, _gloffset_GetSubroutineUniformLocation));
+}
+
+static inline void SET_GetSubroutineUniformLocation(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetSubroutineUniformLocation, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformSubroutineuiv)(GLenum, GLint, GLuint *);
+#define CALL_GetUniformSubroutineuiv(disp, parameters) \
+ (* GET_GetUniformSubroutineuiv(disp)) parameters
+static inline _glptr_GetUniformSubroutineuiv GET_GetUniformSubroutineuiv(struct _glapi_table *disp) {
+ return (_glptr_GetUniformSubroutineuiv) (GET_by_offset(disp, _gloffset_GetUniformSubroutineuiv));
+}
+
+static inline void SET_GetUniformSubroutineuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetUniformSubroutineuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformSubroutinesuiv)(GLenum, GLsizei, const GLuint *);
+#define CALL_UniformSubroutinesuiv(disp, parameters) \
+ (* GET_UniformSubroutinesuiv(disp)) parameters
+static inline _glptr_UniformSubroutinesuiv GET_UniformSubroutinesuiv(struct _glapi_table *disp) {
+ return (_glptr_UniformSubroutinesuiv) (GET_by_offset(disp, _gloffset_UniformSubroutinesuiv));
+}
+
+static inline void SET_UniformSubroutinesuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_UniformSubroutinesuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PatchParameterfv)(GLenum, const GLfloat *);
+#define CALL_PatchParameterfv(disp, parameters) \
+ (* GET_PatchParameterfv(disp)) parameters
+static inline _glptr_PatchParameterfv GET_PatchParameterfv(struct _glapi_table *disp) {
+ return (_glptr_PatchParameterfv) (GET_by_offset(disp, _gloffset_PatchParameterfv));
+}
+
+static inline void SET_PatchParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_PatchParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PatchParameteri)(GLenum, GLint);
+#define CALL_PatchParameteri(disp, parameters) \
+ (* GET_PatchParameteri(disp)) parameters
+static inline _glptr_PatchParameteri GET_PatchParameteri(struct _glapi_table *disp) {
+ return (_glptr_PatchParameteri) (GET_by_offset(disp, _gloffset_PatchParameteri));
+}
+
+static inline void SET_PatchParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_PatchParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindTransformFeedback)(GLenum, GLuint);
+#define CALL_BindTransformFeedback(disp, parameters) \
+ (* GET_BindTransformFeedback(disp)) parameters
+static inline _glptr_BindTransformFeedback GET_BindTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_BindTransformFeedback) (GET_by_offset(disp, _gloffset_BindTransformFeedback));
+}
+
+static inline void SET_BindTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteTransformFeedbacks)(GLsizei, const GLuint *);
+#define CALL_DeleteTransformFeedbacks(disp, parameters) \
+ (* GET_DeleteTransformFeedbacks(disp)) parameters
+static inline _glptr_DeleteTransformFeedbacks GET_DeleteTransformFeedbacks(struct _glapi_table *disp) {
+ return (_glptr_DeleteTransformFeedbacks) (GET_by_offset(disp, _gloffset_DeleteTransformFeedbacks));
+}
+
+static inline void SET_DeleteTransformFeedbacks(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteTransformFeedbacks, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTransformFeedback)(GLenum, GLuint);
+#define CALL_DrawTransformFeedback(disp, parameters) \
+ (* GET_DrawTransformFeedback(disp)) parameters
+static inline _glptr_DrawTransformFeedback GET_DrawTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_DrawTransformFeedback) (GET_by_offset(disp, _gloffset_DrawTransformFeedback));
+}
+
+static inline void SET_DrawTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_DrawTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenTransformFeedbacks)(GLsizei, GLuint *);
+#define CALL_GenTransformFeedbacks(disp, parameters) \
+ (* GET_GenTransformFeedbacks(disp)) parameters
+static inline _glptr_GenTransformFeedbacks GET_GenTransformFeedbacks(struct _glapi_table *disp) {
+ return (_glptr_GenTransformFeedbacks) (GET_by_offset(disp, _gloffset_GenTransformFeedbacks));
+}
+
+static inline void SET_GenTransformFeedbacks(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenTransformFeedbacks, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsTransformFeedback)(GLuint);
+#define CALL_IsTransformFeedback(disp, parameters) \
+ (* GET_IsTransformFeedback(disp)) parameters
+static inline _glptr_IsTransformFeedback GET_IsTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_IsTransformFeedback) (GET_by_offset(disp, _gloffset_IsTransformFeedback));
+}
+
+static inline void SET_IsTransformFeedback(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PauseTransformFeedback)(void);
+#define CALL_PauseTransformFeedback(disp, parameters) \
+ (* GET_PauseTransformFeedback(disp)) parameters
+static inline _glptr_PauseTransformFeedback GET_PauseTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_PauseTransformFeedback) (GET_by_offset(disp, _gloffset_PauseTransformFeedback));
+}
+
+static inline void SET_PauseTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PauseTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ResumeTransformFeedback)(void);
+#define CALL_ResumeTransformFeedback(disp, parameters) \
+ (* GET_ResumeTransformFeedback(disp)) parameters
+static inline _glptr_ResumeTransformFeedback GET_ResumeTransformFeedback(struct _glapi_table *disp) {
+ return (_glptr_ResumeTransformFeedback) (GET_by_offset(disp, _gloffset_ResumeTransformFeedback));
+}
+
+static inline void SET_ResumeTransformFeedback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_ResumeTransformFeedback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginQueryIndexed)(GLenum, GLuint, GLuint);
+#define CALL_BeginQueryIndexed(disp, parameters) \
+ (* GET_BeginQueryIndexed(disp)) parameters
+static inline _glptr_BeginQueryIndexed GET_BeginQueryIndexed(struct _glapi_table *disp) {
+ return (_glptr_BeginQueryIndexed) (GET_by_offset(disp, _gloffset_BeginQueryIndexed));
+}
+
+static inline void SET_BeginQueryIndexed(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_BeginQueryIndexed, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTransformFeedbackStream)(GLenum, GLuint, GLuint);
+#define CALL_DrawTransformFeedbackStream(disp, parameters) \
+ (* GET_DrawTransformFeedbackStream(disp)) parameters
+static inline _glptr_DrawTransformFeedbackStream GET_DrawTransformFeedbackStream(struct _glapi_table *disp) {
+ return (_glptr_DrawTransformFeedbackStream) (GET_by_offset(disp, _gloffset_DrawTransformFeedbackStream));
+}
+
+static inline void SET_DrawTransformFeedbackStream(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DrawTransformFeedbackStream, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndQueryIndexed)(GLenum, GLuint);
+#define CALL_EndQueryIndexed(disp, parameters) \
+ (* GET_EndQueryIndexed(disp)) parameters
+static inline _glptr_EndQueryIndexed GET_EndQueryIndexed(struct _glapi_table *disp) {
+ return (_glptr_EndQueryIndexed) (GET_by_offset(disp, _gloffset_EndQueryIndexed));
+}
+
+static inline void SET_EndQueryIndexed(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_EndQueryIndexed, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryIndexediv)(GLenum, GLuint, GLenum, GLint *);
+#define CALL_GetQueryIndexediv(disp, parameters) \
+ (* GET_GetQueryIndexediv(disp)) parameters
+static inline _glptr_GetQueryIndexediv GET_GetQueryIndexediv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryIndexediv) (GET_by_offset(disp, _gloffset_GetQueryIndexediv));
+}
+
+static inline void SET_GetQueryIndexediv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetQueryIndexediv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearDepthf)(GLclampf);
+#define CALL_ClearDepthf(disp, parameters) \
+ (* GET_ClearDepthf(disp)) parameters
+static inline _glptr_ClearDepthf GET_ClearDepthf(struct _glapi_table *disp) {
+ return (_glptr_ClearDepthf) (GET_by_offset(disp, _gloffset_ClearDepthf));
+}
+
+static inline void SET_ClearDepthf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf)) {
+ SET_by_offset(disp, _gloffset_ClearDepthf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangef)(GLclampf, GLclampf);
+#define CALL_DepthRangef(disp, parameters) \
+ (* GET_DepthRangef(disp)) parameters
+static inline _glptr_DepthRangef GET_DepthRangef(struct _glapi_table *disp) {
+ return (_glptr_DepthRangef) (GET_by_offset(disp, _gloffset_DepthRangef));
+}
+
+static inline void SET_DepthRangef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf, GLclampf)) {
+ SET_by_offset(disp, _gloffset_DepthRangef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetShaderPrecisionFormat)(GLenum, GLenum, GLint *, GLint *);
+#define CALL_GetShaderPrecisionFormat(disp, parameters) \
+ (* GET_GetShaderPrecisionFormat(disp)) parameters
+static inline _glptr_GetShaderPrecisionFormat GET_GetShaderPrecisionFormat(struct _glapi_table *disp) {
+ return (_glptr_GetShaderPrecisionFormat) (GET_by_offset(disp, _gloffset_GetShaderPrecisionFormat));
+}
+
+static inline void SET_GetShaderPrecisionFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetShaderPrecisionFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ReleaseShaderCompiler)(void);
+#define CALL_ReleaseShaderCompiler(disp, parameters) \
+ (* GET_ReleaseShaderCompiler(disp)) parameters
+static inline _glptr_ReleaseShaderCompiler GET_ReleaseShaderCompiler(struct _glapi_table *disp) {
+ return (_glptr_ReleaseShaderCompiler) (GET_by_offset(disp, _gloffset_ReleaseShaderCompiler));
+}
+
+static inline void SET_ReleaseShaderCompiler(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_ReleaseShaderCompiler, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ShaderBinary)(GLsizei, const GLuint *, GLenum, const GLvoid *, GLsizei);
+#define CALL_ShaderBinary(disp, parameters) \
+ (* GET_ShaderBinary(disp)) parameters
+static inline _glptr_ShaderBinary GET_ShaderBinary(struct _glapi_table *disp) {
+ return (_glptr_ShaderBinary) (GET_by_offset(disp, _gloffset_ShaderBinary));
+}
+
+static inline void SET_ShaderBinary(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *, GLenum, const GLvoid *, GLsizei)) {
+ SET_by_offset(disp, _gloffset_ShaderBinary, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramBinary)(GLuint, GLsizei, GLsizei *, GLenum *, GLvoid *);
+#define CALL_GetProgramBinary(disp, parameters) \
+ (* GET_GetProgramBinary(disp)) parameters
+static inline _glptr_GetProgramBinary GET_GetProgramBinary(struct _glapi_table *disp) {
+ return (_glptr_GetProgramBinary) (GET_by_offset(disp, _gloffset_GetProgramBinary));
+}
+
+static inline void SET_GetProgramBinary(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLenum *, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetProgramBinary, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramBinary)(GLuint, GLenum, const GLvoid *, GLsizei);
+#define CALL_ProgramBinary(disp, parameters) \
+ (* GET_ProgramBinary(disp)) parameters
+static inline _glptr_ProgramBinary GET_ProgramBinary(struct _glapi_table *disp) {
+ return (_glptr_ProgramBinary) (GET_by_offset(disp, _gloffset_ProgramBinary));
+}
+
+static inline void SET_ProgramBinary(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLvoid *, GLsizei)) {
+ SET_by_offset(disp, _gloffset_ProgramBinary, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramParameteri)(GLuint, GLenum, GLint);
+#define CALL_ProgramParameteri(disp, parameters) \
+ (* GET_ProgramParameteri(disp)) parameters
+static inline _glptr_ProgramParameteri GET_ProgramParameteri(struct _glapi_table *disp) {
+ return (_glptr_ProgramParameteri) (GET_by_offset(disp, _gloffset_ProgramParameteri));
+}
+
+static inline void SET_ProgramParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_ProgramParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribLdv)(GLuint, GLenum, GLdouble *);
+#define CALL_GetVertexAttribLdv(disp, parameters) \
+ (* GET_GetVertexAttribLdv(disp)) parameters
+static inline _glptr_GetVertexAttribLdv GET_GetVertexAttribLdv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribLdv) (GET_by_offset(disp, _gloffset_GetVertexAttribLdv));
+}
+
+static inline void SET_GetVertexAttribLdv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribLdv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL1d)(GLuint, GLdouble);
+#define CALL_VertexAttribL1d(disp, parameters) \
+ (* GET_VertexAttribL1d(disp)) parameters
+static inline _glptr_VertexAttribL1d GET_VertexAttribL1d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL1d) (GET_by_offset(disp, _gloffset_VertexAttribL1d));
+}
+
+static inline void SET_VertexAttribL1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL1dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttribL1dv(disp, parameters) \
+ (* GET_VertexAttribL1dv(disp)) parameters
+static inline _glptr_VertexAttribL1dv GET_VertexAttribL1dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL1dv) (GET_by_offset(disp, _gloffset_VertexAttribL1dv));
+}
+
+static inline void SET_VertexAttribL1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL2d)(GLuint, GLdouble, GLdouble);
+#define CALL_VertexAttribL2d(disp, parameters) \
+ (* GET_VertexAttribL2d(disp)) parameters
+static inline _glptr_VertexAttribL2d GET_VertexAttribL2d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL2d) (GET_by_offset(disp, _gloffset_VertexAttribL2d));
+}
+
+static inline void SET_VertexAttribL2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL2dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttribL2dv(disp, parameters) \
+ (* GET_VertexAttribL2dv(disp)) parameters
+static inline _glptr_VertexAttribL2dv GET_VertexAttribL2dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL2dv) (GET_by_offset(disp, _gloffset_VertexAttribL2dv));
+}
+
+static inline void SET_VertexAttribL2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL3d)(GLuint, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttribL3d(disp, parameters) \
+ (* GET_VertexAttribL3d(disp)) parameters
+static inline _glptr_VertexAttribL3d GET_VertexAttribL3d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL3d) (GET_by_offset(disp, _gloffset_VertexAttribL3d));
+}
+
+static inline void SET_VertexAttribL3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL3dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttribL3dv(disp, parameters) \
+ (* GET_VertexAttribL3dv(disp)) parameters
+static inline _glptr_VertexAttribL3dv GET_VertexAttribL3dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL3dv) (GET_by_offset(disp, _gloffset_VertexAttribL3dv));
+}
+
+static inline void SET_VertexAttribL3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL4d)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttribL4d(disp, parameters) \
+ (* GET_VertexAttribL4d(disp)) parameters
+static inline _glptr_VertexAttribL4d GET_VertexAttribL4d(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL4d) (GET_by_offset(disp, _gloffset_VertexAttribL4d));
+}
+
+static inline void SET_VertexAttribL4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL4dv)(GLuint, const GLdouble *);
+#define CALL_VertexAttribL4dv(disp, parameters) \
+ (* GET_VertexAttribL4dv(disp)) parameters
+static inline _glptr_VertexAttribL4dv GET_VertexAttribL4dv(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL4dv) (GET_by_offset(disp, _gloffset_VertexAttribL4dv));
+}
+
+static inline void SET_VertexAttribL4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribLPointer)(GLuint, GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_VertexAttribLPointer(disp, parameters) \
+ (* GET_VertexAttribLPointer(disp)) parameters
+static inline _glptr_VertexAttribLPointer GET_VertexAttribLPointer(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribLPointer) (GET_by_offset(disp, _gloffset_VertexAttribLPointer));
+}
+
+static inline void SET_VertexAttribLPointer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribLPointer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangeArrayv)(GLuint, GLsizei, const GLclampd *);
+#define CALL_DepthRangeArrayv(disp, parameters) \
+ (* GET_DepthRangeArrayv(disp)) parameters
+static inline _glptr_DepthRangeArrayv GET_DepthRangeArrayv(struct _glapi_table *disp) {
+ return (_glptr_DepthRangeArrayv) (GET_by_offset(disp, _gloffset_DepthRangeArrayv));
+}
+
+static inline void SET_DepthRangeArrayv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLclampd *)) {
+ SET_by_offset(disp, _gloffset_DepthRangeArrayv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangeIndexed)(GLuint, GLclampd, GLclampd);
+#define CALL_DepthRangeIndexed(disp, parameters) \
+ (* GET_DepthRangeIndexed(disp)) parameters
+static inline _glptr_DepthRangeIndexed GET_DepthRangeIndexed(struct _glapi_table *disp) {
+ return (_glptr_DepthRangeIndexed) (GET_by_offset(disp, _gloffset_DepthRangeIndexed));
+}
+
+static inline void SET_DepthRangeIndexed(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLclampd, GLclampd)) {
+ SET_by_offset(disp, _gloffset_DepthRangeIndexed, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetDoublei_v)(GLenum, GLuint, GLdouble *);
+#define CALL_GetDoublei_v(disp, parameters) \
+ (* GET_GetDoublei_v(disp)) parameters
+static inline _glptr_GetDoublei_v GET_GetDoublei_v(struct _glapi_table *disp) {
+ return (_glptr_GetDoublei_v) (GET_by_offset(disp, _gloffset_GetDoublei_v));
+}
+
+static inline void SET_GetDoublei_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetDoublei_v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFloati_v)(GLenum, GLuint, GLfloat *);
+#define CALL_GetFloati_v(disp, parameters) \
+ (* GET_GetFloati_v(disp)) parameters
+static inline _glptr_GetFloati_v GET_GetFloati_v(struct _glapi_table *disp) {
+ return (_glptr_GetFloati_v) (GET_by_offset(disp, _gloffset_GetFloati_v));
+}
+
+static inline void SET_GetFloati_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetFloati_v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ScissorArrayv)(GLuint, GLsizei, const int *);
+#define CALL_ScissorArrayv(disp, parameters) \
+ (* GET_ScissorArrayv(disp)) parameters
+static inline _glptr_ScissorArrayv GET_ScissorArrayv(struct _glapi_table *disp) {
+ return (_glptr_ScissorArrayv) (GET_by_offset(disp, _gloffset_ScissorArrayv));
+}
+
+static inline void SET_ScissorArrayv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const int *)) {
+ SET_by_offset(disp, _gloffset_ScissorArrayv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ScissorIndexed)(GLuint, GLint, GLint, GLsizei, GLsizei);
+#define CALL_ScissorIndexed(disp, parameters) \
+ (* GET_ScissorIndexed(disp)) parameters
+static inline _glptr_ScissorIndexed GET_ScissorIndexed(struct _glapi_table *disp) {
+ return (_glptr_ScissorIndexed) (GET_by_offset(disp, _gloffset_ScissorIndexed));
+}
+
+static inline void SET_ScissorIndexed(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_ScissorIndexed, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ScissorIndexedv)(GLuint, const GLint *);
+#define CALL_ScissorIndexedv(disp, parameters) \
+ (* GET_ScissorIndexedv(disp)) parameters
+static inline _glptr_ScissorIndexedv GET_ScissorIndexedv(struct _glapi_table *disp) {
+ return (_glptr_ScissorIndexedv) (GET_by_offset(disp, _gloffset_ScissorIndexedv));
+}
+
+static inline void SET_ScissorIndexedv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ScissorIndexedv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ViewportArrayv)(GLuint, GLsizei, const GLfloat *);
+#define CALL_ViewportArrayv(disp, parameters) \
+ (* GET_ViewportArrayv(disp)) parameters
+static inline _glptr_ViewportArrayv GET_ViewportArrayv(struct _glapi_table *disp) {
+ return (_glptr_ViewportArrayv) (GET_by_offset(disp, _gloffset_ViewportArrayv));
+}
+
+static inline void SET_ViewportArrayv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ViewportArrayv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ViewportIndexedf)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ViewportIndexedf(disp, parameters) \
+ (* GET_ViewportIndexedf(disp)) parameters
+static inline _glptr_ViewportIndexedf GET_ViewportIndexedf(struct _glapi_table *disp) {
+ return (_glptr_ViewportIndexedf) (GET_by_offset(disp, _gloffset_ViewportIndexedf));
+}
+
+static inline void SET_ViewportIndexedf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ViewportIndexedf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ViewportIndexedfv)(GLuint, const GLfloat *);
+#define CALL_ViewportIndexedfv(disp, parameters) \
+ (* GET_ViewportIndexedfv(disp)) parameters
+static inline _glptr_ViewportIndexedfv GET_ViewportIndexedfv(struct _glapi_table *disp) {
+ return (_glptr_ViewportIndexedfv) (GET_by_offset(disp, _gloffset_ViewportIndexedfv));
+}
+
+static inline void SET_ViewportIndexedfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ViewportIndexedfv, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_GetGraphicsResetStatusARB)(void);
+#define CALL_GetGraphicsResetStatusARB(disp, parameters) \
+ (* GET_GetGraphicsResetStatusARB(disp)) parameters
+static inline _glptr_GetGraphicsResetStatusARB GET_GetGraphicsResetStatusARB(struct _glapi_table *disp) {
+ return (_glptr_GetGraphicsResetStatusARB) (GET_by_offset(disp, _gloffset_GetGraphicsResetStatusARB));
+}
+
+static inline void SET_GetGraphicsResetStatusARB(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_GetGraphicsResetStatusARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnColorTableARB)(GLenum, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetnColorTableARB(disp, parameters) \
+ (* GET_GetnColorTableARB(disp)) parameters
+static inline _glptr_GetnColorTableARB GET_GetnColorTableARB(struct _glapi_table *disp) {
+ return (_glptr_GetnColorTableARB) (GET_by_offset(disp, _gloffset_GetnColorTableARB));
+}
+
+static inline void SET_GetnColorTableARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnColorTableARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnCompressedTexImageARB)(GLenum, GLint, GLsizei, GLvoid *);
+#define CALL_GetnCompressedTexImageARB(disp, parameters) \
+ (* GET_GetnCompressedTexImageARB(disp)) parameters
+static inline _glptr_GetnCompressedTexImageARB GET_GetnCompressedTexImageARB(struct _glapi_table *disp) {
+ return (_glptr_GetnCompressedTexImageARB) (GET_by_offset(disp, _gloffset_GetnCompressedTexImageARB));
+}
+
+static inline void SET_GetnCompressedTexImageARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnCompressedTexImageARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnConvolutionFilterARB)(GLenum, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetnConvolutionFilterARB(disp, parameters) \
+ (* GET_GetnConvolutionFilterARB(disp)) parameters
+static inline _glptr_GetnConvolutionFilterARB GET_GetnConvolutionFilterARB(struct _glapi_table *disp) {
+ return (_glptr_GetnConvolutionFilterARB) (GET_by_offset(disp, _gloffset_GetnConvolutionFilterARB));
+}
+
+static inline void SET_GetnConvolutionFilterARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnConvolutionFilterARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnHistogramARB)(GLenum, GLboolean, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetnHistogramARB(disp, parameters) \
+ (* GET_GetnHistogramARB(disp)) parameters
+static inline _glptr_GetnHistogramARB GET_GetnHistogramARB(struct _glapi_table *disp) {
+ return (_glptr_GetnHistogramARB) (GET_by_offset(disp, _gloffset_GetnHistogramARB));
+}
+
+static inline void SET_GetnHistogramARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLboolean, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnHistogramARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnMapdvARB)(GLenum, GLenum, GLsizei, GLdouble *);
+#define CALL_GetnMapdvARB(disp, parameters) \
+ (* GET_GetnMapdvARB(disp)) parameters
+static inline _glptr_GetnMapdvARB GET_GetnMapdvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnMapdvARB) (GET_by_offset(disp, _gloffset_GetnMapdvARB));
+}
+
+static inline void SET_GetnMapdvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetnMapdvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnMapfvARB)(GLenum, GLenum, GLsizei, GLfloat *);
+#define CALL_GetnMapfvARB(disp, parameters) \
+ (* GET_GetnMapfvARB(disp)) parameters
+static inline _glptr_GetnMapfvARB GET_GetnMapfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnMapfvARB) (GET_by_offset(disp, _gloffset_GetnMapfvARB));
+}
+
+static inline void SET_GetnMapfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetnMapfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnMapivARB)(GLenum, GLenum, GLsizei, GLint *);
+#define CALL_GetnMapivARB(disp, parameters) \
+ (* GET_GetnMapivARB(disp)) parameters
+static inline _glptr_GetnMapivARB GET_GetnMapivARB(struct _glapi_table *disp) {
+ return (_glptr_GetnMapivARB) (GET_by_offset(disp, _gloffset_GetnMapivARB));
+}
+
+static inline void SET_GetnMapivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLsizei, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetnMapivARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnMinmaxARB)(GLenum, GLboolean, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetnMinmaxARB(disp, parameters) \
+ (* GET_GetnMinmaxARB(disp)) parameters
+static inline _glptr_GetnMinmaxARB GET_GetnMinmaxARB(struct _glapi_table *disp) {
+ return (_glptr_GetnMinmaxARB) (GET_by_offset(disp, _gloffset_GetnMinmaxARB));
+}
+
+static inline void SET_GetnMinmaxARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLboolean, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnMinmaxARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnPixelMapfvARB)(GLenum, GLsizei, GLfloat *);
+#define CALL_GetnPixelMapfvARB(disp, parameters) \
+ (* GET_GetnPixelMapfvARB(disp)) parameters
+static inline _glptr_GetnPixelMapfvARB GET_GetnPixelMapfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnPixelMapfvARB) (GET_by_offset(disp, _gloffset_GetnPixelMapfvARB));
+}
+
+static inline void SET_GetnPixelMapfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetnPixelMapfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnPixelMapuivARB)(GLenum, GLsizei, GLuint *);
+#define CALL_GetnPixelMapuivARB(disp, parameters) \
+ (* GET_GetnPixelMapuivARB(disp)) parameters
+static inline _glptr_GetnPixelMapuivARB GET_GetnPixelMapuivARB(struct _glapi_table *disp) {
+ return (_glptr_GetnPixelMapuivARB) (GET_by_offset(disp, _gloffset_GetnPixelMapuivARB));
+}
+
+static inline void SET_GetnPixelMapuivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetnPixelMapuivARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnPixelMapusvARB)(GLenum, GLsizei, GLushort *);
+#define CALL_GetnPixelMapusvARB(disp, parameters) \
+ (* GET_GetnPixelMapusvARB(disp)) parameters
+static inline _glptr_GetnPixelMapusvARB GET_GetnPixelMapusvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnPixelMapusvARB) (GET_by_offset(disp, _gloffset_GetnPixelMapusvARB));
+}
+
+static inline void SET_GetnPixelMapusvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLushort *)) {
+ SET_by_offset(disp, _gloffset_GetnPixelMapusvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnPolygonStippleARB)(GLsizei, GLubyte *);
+#define CALL_GetnPolygonStippleARB(disp, parameters) \
+ (* GET_GetnPolygonStippleARB(disp)) parameters
+static inline _glptr_GetnPolygonStippleARB GET_GetnPolygonStippleARB(struct _glapi_table *disp) {
+ return (_glptr_GetnPolygonStippleARB) (GET_by_offset(disp, _gloffset_GetnPolygonStippleARB));
+}
+
+static inline void SET_GetnPolygonStippleARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLubyte *)) {
+ SET_by_offset(disp, _gloffset_GetnPolygonStippleARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnSeparableFilterARB)(GLenum, GLenum, GLenum, GLsizei, GLvoid *, GLsizei, GLvoid *, GLvoid *);
+#define CALL_GetnSeparableFilterARB(disp, parameters) \
+ (* GET_GetnSeparableFilterARB(disp)) parameters
+static inline _glptr_GetnSeparableFilterARB GET_GetnSeparableFilterARB(struct _glapi_table *disp) {
+ return (_glptr_GetnSeparableFilterARB) (GET_by_offset(disp, _gloffset_GetnSeparableFilterARB));
+}
+
+static inline void SET_GetnSeparableFilterARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, GLvoid *, GLsizei, GLvoid *, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnSeparableFilterARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnTexImageARB)(GLenum, GLint, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetnTexImageARB(disp, parameters) \
+ (* GET_GetnTexImageARB(disp)) parameters
+static inline _glptr_GetnTexImageARB GET_GetnTexImageARB(struct _glapi_table *disp) {
+ return (_glptr_GetnTexImageARB) (GET_by_offset(disp, _gloffset_GetnTexImageARB));
+}
+
+static inline void SET_GetnTexImageARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetnTexImageARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformdvARB)(GLuint, GLint, GLsizei, GLdouble *);
+#define CALL_GetnUniformdvARB(disp, parameters) \
+ (* GET_GetnUniformdvARB(disp)) parameters
+static inline _glptr_GetnUniformdvARB GET_GetnUniformdvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformdvARB) (GET_by_offset(disp, _gloffset_GetnUniformdvARB));
+}
+
+static inline void SET_GetnUniformdvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformdvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformfvARB)(GLuint, GLint, GLsizei, GLfloat *);
+#define CALL_GetnUniformfvARB(disp, parameters) \
+ (* GET_GetnUniformfvARB(disp)) parameters
+static inline _glptr_GetnUniformfvARB GET_GetnUniformfvARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformfvARB) (GET_by_offset(disp, _gloffset_GetnUniformfvARB));
+}
+
+static inline void SET_GetnUniformfvARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformfvARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformivARB)(GLuint, GLint, GLsizei, GLint *);
+#define CALL_GetnUniformivARB(disp, parameters) \
+ (* GET_GetnUniformivARB(disp)) parameters
+static inline _glptr_GetnUniformivARB GET_GetnUniformivARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformivARB) (GET_by_offset(disp, _gloffset_GetnUniformivARB));
+}
+
+static inline void SET_GetnUniformivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformivARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformuivARB)(GLuint, GLint, GLsizei, GLuint *);
+#define CALL_GetnUniformuivARB(disp, parameters) \
+ (* GET_GetnUniformuivARB(disp)) parameters
+static inline _glptr_GetnUniformuivARB GET_GetnUniformuivARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformuivARB) (GET_by_offset(disp, _gloffset_GetnUniformuivARB));
+}
+
+static inline void SET_GetnUniformuivARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformuivARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ReadnPixelsARB)(GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_ReadnPixelsARB(disp, parameters) \
+ (* GET_ReadnPixelsARB(disp)) parameters
+static inline _glptr_ReadnPixelsARB GET_ReadnPixelsARB(struct _glapi_table *disp) {
+ return (_glptr_ReadnPixelsARB) (GET_by_offset(disp, _gloffset_ReadnPixelsARB));
+}
+
+static inline void SET_ReadnPixelsARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ReadnPixelsARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawArraysInstancedBaseInstance)(GLenum, GLint, GLsizei, GLsizei, GLuint);
+#define CALL_DrawArraysInstancedBaseInstance(disp, parameters) \
+ (* GET_DrawArraysInstancedBaseInstance(disp)) parameters
+static inline _glptr_DrawArraysInstancedBaseInstance GET_DrawArraysInstancedBaseInstance(struct _glapi_table *disp) {
+ return (_glptr_DrawArraysInstancedBaseInstance) (GET_by_offset(disp, _gloffset_DrawArraysInstancedBaseInstance));
+}
+
+static inline void SET_DrawArraysInstancedBaseInstance(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint, GLsizei, GLsizei, GLuint)) {
+ SET_by_offset(disp, _gloffset_DrawArraysInstancedBaseInstance, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsInstancedBaseInstance)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLuint);
+#define CALL_DrawElementsInstancedBaseInstance(disp, parameters) \
+ (* GET_DrawElementsInstancedBaseInstance(disp)) parameters
+static inline _glptr_DrawElementsInstancedBaseInstance GET_DrawElementsInstancedBaseInstance(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsInstancedBaseInstance) (GET_by_offset(disp, _gloffset_DrawElementsInstancedBaseInstance));
+}
+
+static inline void SET_DrawElementsInstancedBaseInstance(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLuint)) {
+ SET_by_offset(disp, _gloffset_DrawElementsInstancedBaseInstance, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawElementsInstancedBaseVertexBaseInstance)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLint, GLuint);
+#define CALL_DrawElementsInstancedBaseVertexBaseInstance(disp, parameters) \
+ (* GET_DrawElementsInstancedBaseVertexBaseInstance(disp)) parameters
+static inline _glptr_DrawElementsInstancedBaseVertexBaseInstance GET_DrawElementsInstancedBaseVertexBaseInstance(struct _glapi_table *disp) {
+ return (_glptr_DrawElementsInstancedBaseVertexBaseInstance) (GET_by_offset(disp, _gloffset_DrawElementsInstancedBaseVertexBaseInstance));
+}
+
+static inline void SET_DrawElementsInstancedBaseVertexBaseInstance(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, const GLvoid *, GLsizei, GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DrawElementsInstancedBaseVertexBaseInstance, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTransformFeedbackInstanced)(GLenum, GLuint, GLsizei);
+#define CALL_DrawTransformFeedbackInstanced(disp, parameters) \
+ (* GET_DrawTransformFeedbackInstanced(disp)) parameters
+static inline _glptr_DrawTransformFeedbackInstanced GET_DrawTransformFeedbackInstanced(struct _glapi_table *disp) {
+ return (_glptr_DrawTransformFeedbackInstanced) (GET_by_offset(disp, _gloffset_DrawTransformFeedbackInstanced));
+}
+
+static inline void SET_DrawTransformFeedbackInstanced(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DrawTransformFeedbackInstanced, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTransformFeedbackStreamInstanced)(GLenum, GLuint, GLuint, GLsizei);
+#define CALL_DrawTransformFeedbackStreamInstanced(disp, parameters) \
+ (* GET_DrawTransformFeedbackStreamInstanced(disp)) parameters
+static inline _glptr_DrawTransformFeedbackStreamInstanced GET_DrawTransformFeedbackStreamInstanced(struct _glapi_table *disp) {
+ return (_glptr_DrawTransformFeedbackStreamInstanced) (GET_by_offset(disp, _gloffset_DrawTransformFeedbackStreamInstanced));
+}
+
+static inline void SET_DrawTransformFeedbackStreamInstanced(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_DrawTransformFeedbackStreamInstanced, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetInternalformativ)(GLenum, GLenum, GLenum, GLsizei, GLint *);
+#define CALL_GetInternalformativ(disp, parameters) \
+ (* GET_GetInternalformativ(disp)) parameters
+static inline _glptr_GetInternalformativ GET_GetInternalformativ(struct _glapi_table *disp) {
+ return (_glptr_GetInternalformativ) (GET_by_offset(disp, _gloffset_GetInternalformativ));
+}
+
+static inline void SET_GetInternalformativ(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetInternalformativ, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetActiveAtomicCounterBufferiv)(GLuint, GLuint, GLenum, GLint *);
+#define CALL_GetActiveAtomicCounterBufferiv(disp, parameters) \
+ (* GET_GetActiveAtomicCounterBufferiv(disp)) parameters
+static inline _glptr_GetActiveAtomicCounterBufferiv GET_GetActiveAtomicCounterBufferiv(struct _glapi_table *disp) {
+ return (_glptr_GetActiveAtomicCounterBufferiv) (GET_by_offset(disp, _gloffset_GetActiveAtomicCounterBufferiv));
+}
+
+static inline void SET_GetActiveAtomicCounterBufferiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetActiveAtomicCounterBufferiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindImageTexture)(GLuint, GLuint, GLint, GLboolean, GLint, GLenum, GLenum);
+#define CALL_BindImageTexture(disp, parameters) \
+ (* GET_BindImageTexture(disp)) parameters
+static inline _glptr_BindImageTexture GET_BindImageTexture(struct _glapi_table *disp) {
+ return (_glptr_BindImageTexture) (GET_by_offset(disp, _gloffset_BindImageTexture));
+}
+
+static inline void SET_BindImageTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLint, GLboolean, GLint, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_BindImageTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MemoryBarrier)(GLbitfield);
+#define CALL_MemoryBarrier(disp, parameters) \
+ (* GET_MemoryBarrier(disp)) parameters
+static inline _glptr_MemoryBarrier GET_MemoryBarrier(struct _glapi_table *disp) {
+ return (_glptr_MemoryBarrier) (GET_by_offset(disp, _gloffset_MemoryBarrier));
+}
+
+static inline void SET_MemoryBarrier(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLbitfield)) {
+ SET_by_offset(disp, _gloffset_MemoryBarrier, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorage1D)(GLenum, GLsizei, GLenum, GLsizei);
+#define CALL_TexStorage1D(disp, parameters) \
+ (* GET_TexStorage1D(disp)) parameters
+static inline _glptr_TexStorage1D GET_TexStorage1D(struct _glapi_table *disp) {
+ return (_glptr_TexStorage1D) (GET_by_offset(disp, _gloffset_TexStorage1D));
+}
+
+static inline void SET_TexStorage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TexStorage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorage2D)(GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+#define CALL_TexStorage2D(disp, parameters) \
+ (* GET_TexStorage2D(disp)) parameters
+static inline _glptr_TexStorage2D GET_TexStorage2D(struct _glapi_table *disp) {
+ return (_glptr_TexStorage2D) (GET_by_offset(disp, _gloffset_TexStorage2D));
+}
+
+static inline void SET_TexStorage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TexStorage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorage3D)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei);
+#define CALL_TexStorage3D(disp, parameters) \
+ (* GET_TexStorage3D(disp)) parameters
+static inline _glptr_TexStorage3D GET_TexStorage3D(struct _glapi_table *disp) {
+ return (_glptr_TexStorage3D) (GET_by_offset(disp, _gloffset_TexStorage3D));
+}
+
+static inline void SET_TexStorage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TexStorage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage1DEXT)(GLuint, GLenum, GLsizei, GLenum, GLsizei);
+#define CALL_TextureStorage1DEXT(disp, parameters) \
+ (* GET_TextureStorage1DEXT(disp)) parameters
+static inline _glptr_TextureStorage1DEXT GET_TextureStorage1DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage1DEXT) (GET_by_offset(disp, _gloffset_TextureStorage1DEXT));
+}
+
+static inline void SET_TextureStorage1DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLsizei, GLenum, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage1DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage2DEXT)(GLuint, GLenum, GLsizei, GLenum, GLsizei, GLsizei);
+#define CALL_TextureStorage2DEXT(disp, parameters) \
+ (* GET_TextureStorage2DEXT(disp)) parameters
+static inline _glptr_TextureStorage2DEXT GET_TextureStorage2DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage2DEXT) (GET_by_offset(disp, _gloffset_TextureStorage2DEXT));
+}
+
+static inline void SET_TextureStorage2DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLsizei, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage2DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage3DEXT)(GLuint, GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei);
+#define CALL_TextureStorage3DEXT(disp, parameters) \
+ (* GET_TextureStorage3DEXT(disp)) parameters
+static inline _glptr_TextureStorage3DEXT GET_TextureStorage3DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage3DEXT) (GET_by_offset(disp, _gloffset_TextureStorage3DEXT));
+}
+
+static inline void SET_TextureStorage3DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage3DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferData)(GLenum, GLenum, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearBufferData(disp, parameters) \
+ (* GET_ClearBufferData(disp)) parameters
+static inline _glptr_ClearBufferData GET_ClearBufferData(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferData) (GET_by_offset(disp, _gloffset_ClearBufferData));
+}
+
+static inline void SET_ClearBufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearBufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearBufferSubData)(GLenum, GLenum, GLintptr, GLsizeiptr, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearBufferSubData(disp, parameters) \
+ (* GET_ClearBufferSubData(disp)) parameters
+static inline _glptr_ClearBufferSubData GET_ClearBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_ClearBufferSubData) (GET_by_offset(disp, _gloffset_ClearBufferSubData));
+}
+
+static inline void SET_ClearBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLintptr, GLsizeiptr, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DispatchCompute)(GLuint, GLuint, GLuint);
+#define CALL_DispatchCompute(disp, parameters) \
+ (* GET_DispatchCompute(disp)) parameters
+static inline _glptr_DispatchCompute GET_DispatchCompute(struct _glapi_table *disp) {
+ return (_glptr_DispatchCompute) (GET_by_offset(disp, _gloffset_DispatchCompute));
+}
+
+static inline void SET_DispatchCompute(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DispatchCompute, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DispatchComputeIndirect)(GLintptr);
+#define CALL_DispatchComputeIndirect(disp, parameters) \
+ (* GET_DispatchComputeIndirect(disp)) parameters
+static inline _glptr_DispatchComputeIndirect GET_DispatchComputeIndirect(struct _glapi_table *disp) {
+ return (_glptr_DispatchComputeIndirect) (GET_by_offset(disp, _gloffset_DispatchComputeIndirect));
+}
+
+static inline void SET_DispatchComputeIndirect(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLintptr)) {
+ SET_by_offset(disp, _gloffset_DispatchComputeIndirect, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyImageSubData)(GLuint, GLenum, GLint, GLint, GLint, GLint, GLuint, GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei);
+#define CALL_CopyImageSubData(disp, parameters) \
+ (* GET_CopyImageSubData(disp)) parameters
+static inline _glptr_CopyImageSubData GET_CopyImageSubData(struct _glapi_table *disp) {
+ return (_glptr_CopyImageSubData) (GET_by_offset(disp, _gloffset_CopyImageSubData));
+}
+
+static inline void SET_CopyImageSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint, GLint, GLint, GLint, GLuint, GLenum, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyImageSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureView)(GLuint, GLenum, GLuint, GLenum, GLuint, GLuint, GLuint, GLuint);
+#define CALL_TextureView(disp, parameters) \
+ (* GET_TextureView(disp)) parameters
+static inline _glptr_TextureView GET_TextureView(struct _glapi_table *disp) {
+ return (_glptr_TextureView) (GET_by_offset(disp, _gloffset_TextureView));
+}
+
+static inline void SET_TextureView(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLenum, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_TextureView, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindVertexBuffer)(GLuint, GLuint, GLintptr, GLsizei);
+#define CALL_BindVertexBuffer(disp, parameters) \
+ (* GET_BindVertexBuffer(disp)) parameters
+static inline _glptr_BindVertexBuffer GET_BindVertexBuffer(struct _glapi_table *disp) {
+ return (_glptr_BindVertexBuffer) (GET_by_offset(disp, _gloffset_BindVertexBuffer));
+}
+
+static inline void SET_BindVertexBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLintptr, GLsizei)) {
+ SET_by_offset(disp, _gloffset_BindVertexBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribBinding)(GLuint, GLuint);
+#define CALL_VertexAttribBinding(disp, parameters) \
+ (* GET_VertexAttribBinding(disp)) parameters
+static inline _glptr_VertexAttribBinding GET_VertexAttribBinding(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribBinding) (GET_by_offset(disp, _gloffset_VertexAttribBinding));
+}
+
+static inline void SET_VertexAttribBinding(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribBinding, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribFormat)(GLuint, GLint, GLenum, GLboolean, GLuint);
+#define CALL_VertexAttribFormat(disp, parameters) \
+ (* GET_VertexAttribFormat(disp)) parameters
+static inline _glptr_VertexAttribFormat GET_VertexAttribFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribFormat) (GET_by_offset(disp, _gloffset_VertexAttribFormat));
+}
+
+static inline void SET_VertexAttribFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribIFormat)(GLuint, GLint, GLenum, GLuint);
+#define CALL_VertexAttribIFormat(disp, parameters) \
+ (* GET_VertexAttribIFormat(disp)) parameters
+static inline _glptr_VertexAttribIFormat GET_VertexAttribIFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribIFormat) (GET_by_offset(disp, _gloffset_VertexAttribIFormat));
+}
+
+static inline void SET_VertexAttribIFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribIFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribLFormat)(GLuint, GLint, GLenum, GLuint);
+#define CALL_VertexAttribLFormat(disp, parameters) \
+ (* GET_VertexAttribLFormat(disp)) parameters
+static inline _glptr_VertexAttribLFormat GET_VertexAttribLFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribLFormat) (GET_by_offset(disp, _gloffset_VertexAttribLFormat));
+}
+
+static inline void SET_VertexAttribLFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribLFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexBindingDivisor)(GLuint, GLuint);
+#define CALL_VertexBindingDivisor(disp, parameters) \
+ (* GET_VertexBindingDivisor(disp)) parameters
+static inline _glptr_VertexBindingDivisor GET_VertexBindingDivisor(struct _glapi_table *disp) {
+ return (_glptr_VertexBindingDivisor) (GET_by_offset(disp, _gloffset_VertexBindingDivisor));
+}
+
+static inline void SET_VertexBindingDivisor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexBindingDivisor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FramebufferParameteri)(GLenum, GLenum, GLint);
+#define CALL_FramebufferParameteri(disp, parameters) \
+ (* GET_FramebufferParameteri(disp)) parameters
+static inline _glptr_FramebufferParameteri GET_FramebufferParameteri(struct _glapi_table *disp) {
+ return (_glptr_FramebufferParameteri) (GET_by_offset(disp, _gloffset_FramebufferParameteri));
+}
+
+static inline void SET_FramebufferParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_FramebufferParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFramebufferParameteriv)(GLenum, GLenum, GLint *);
+#define CALL_GetFramebufferParameteriv(disp, parameters) \
+ (* GET_GetFramebufferParameteriv(disp)) parameters
+static inline _glptr_GetFramebufferParameteriv GET_GetFramebufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetFramebufferParameteriv) (GET_by_offset(disp, _gloffset_GetFramebufferParameteriv));
+}
+
+static inline void SET_GetFramebufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetFramebufferParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetInternalformati64v)(GLenum, GLenum, GLenum, GLsizei, GLint64 *);
+#define CALL_GetInternalformati64v(disp, parameters) \
+ (* GET_GetInternalformati64v(disp)) parameters
+static inline _glptr_GetInternalformati64v GET_GetInternalformati64v(struct _glapi_table *disp) {
+ return (_glptr_GetInternalformati64v) (GET_by_offset(disp, _gloffset_GetInternalformati64v));
+}
+
+static inline void SET_GetInternalformati64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetInternalformati64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawArraysIndirect)(GLenum, const GLvoid *, GLsizei, GLsizei);
+#define CALL_MultiDrawArraysIndirect(disp, parameters) \
+ (* GET_MultiDrawArraysIndirect(disp)) parameters
+static inline _glptr_MultiDrawArraysIndirect GET_MultiDrawArraysIndirect(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawArraysIndirect) (GET_by_offset(disp, _gloffset_MultiDrawArraysIndirect));
+}
+
+static inline void SET_MultiDrawArraysIndirect(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLvoid *, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawArraysIndirect, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawElementsIndirect)(GLenum, GLenum, const GLvoid *, GLsizei, GLsizei);
+#define CALL_MultiDrawElementsIndirect(disp, parameters) \
+ (* GET_MultiDrawElementsIndirect(disp)) parameters
+static inline _glptr_MultiDrawElementsIndirect GET_MultiDrawElementsIndirect(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawElementsIndirect) (GET_by_offset(disp, _gloffset_MultiDrawElementsIndirect));
+}
+
+static inline void SET_MultiDrawElementsIndirect(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLvoid *, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawElementsIndirect, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramInterfaceiv)(GLuint, GLenum, GLenum, GLint *);
+#define CALL_GetProgramInterfaceiv(disp, parameters) \
+ (* GET_GetProgramInterfaceiv(disp)) parameters
+static inline _glptr_GetProgramInterfaceiv GET_GetProgramInterfaceiv(struct _glapi_table *disp) {
+ return (_glptr_GetProgramInterfaceiv) (GET_by_offset(disp, _gloffset_GetProgramInterfaceiv));
+}
+
+static inline void SET_GetProgramInterfaceiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramInterfaceiv, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GetProgramResourceIndex)(GLuint, GLenum, const GLchar *);
+#define CALL_GetProgramResourceIndex(disp, parameters) \
+ (* GET_GetProgramResourceIndex(disp)) parameters
+static inline _glptr_GetProgramResourceIndex GET_GetProgramResourceIndex(struct _glapi_table *disp) {
+ return (_glptr_GetProgramResourceIndex) (GET_by_offset(disp, _gloffset_GetProgramResourceIndex));
+}
+
+static inline void SET_GetProgramResourceIndex(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLuint, GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramResourceIndex, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetProgramResourceLocation)(GLuint, GLenum, const GLchar *);
+#define CALL_GetProgramResourceLocation(disp, parameters) \
+ (* GET_GetProgramResourceLocation(disp)) parameters
+static inline _glptr_GetProgramResourceLocation GET_GetProgramResourceLocation(struct _glapi_table *disp) {
+ return (_glptr_GetProgramResourceLocation) (GET_by_offset(disp, _gloffset_GetProgramResourceLocation));
+}
+
+static inline void SET_GetProgramResourceLocation(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramResourceLocation, fn);
+}
+
+typedef GLint (GLAPIENTRYP _glptr_GetProgramResourceLocationIndex)(GLuint, GLenum, const GLchar *);
+#define CALL_GetProgramResourceLocationIndex(disp, parameters) \
+ (* GET_GetProgramResourceLocationIndex(disp)) parameters
+static inline _glptr_GetProgramResourceLocationIndex GET_GetProgramResourceLocationIndex(struct _glapi_table *disp) {
+ return (_glptr_GetProgramResourceLocationIndex) (GET_by_offset(disp, _gloffset_GetProgramResourceLocationIndex));
+}
+
+static inline void SET_GetProgramResourceLocationIndex(struct _glapi_table *disp, GLint (GLAPIENTRYP fn)(GLuint, GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramResourceLocationIndex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramResourceName)(GLuint, GLenum, GLuint, GLsizei , GLsizei *, GLchar *);
+#define CALL_GetProgramResourceName(disp, parameters) \
+ (* GET_GetProgramResourceName(disp)) parameters
+static inline _glptr_GetProgramResourceName GET_GetProgramResourceName(struct _glapi_table *disp) {
+ return (_glptr_GetProgramResourceName) (GET_by_offset(disp, _gloffset_GetProgramResourceName));
+}
+
+static inline void SET_GetProgramResourceName(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLsizei , GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramResourceName, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramResourceiv)(GLuint, GLenum, GLuint, GLsizei , const GLenum *, GLsizei , GLsizei *, GLint *);
+#define CALL_GetProgramResourceiv(disp, parameters) \
+ (* GET_GetProgramResourceiv(disp)) parameters
+static inline _glptr_GetProgramResourceiv GET_GetProgramResourceiv(struct _glapi_table *disp) {
+ return (_glptr_GetProgramResourceiv) (GET_by_offset(disp, _gloffset_GetProgramResourceiv));
+}
+
+static inline void SET_GetProgramResourceiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLsizei , const GLenum *, GLsizei , GLsizei *, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramResourceiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ShaderStorageBlockBinding)(GLuint, GLuint, GLuint);
+#define CALL_ShaderStorageBlockBinding(disp, parameters) \
+ (* GET_ShaderStorageBlockBinding(disp)) parameters
+static inline _glptr_ShaderStorageBlockBinding GET_ShaderStorageBlockBinding(struct _glapi_table *disp) {
+ return (_glptr_ShaderStorageBlockBinding) (GET_by_offset(disp, _gloffset_ShaderStorageBlockBinding));
+}
+
+static inline void SET_ShaderStorageBlockBinding(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ShaderStorageBlockBinding, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexBufferRange)(GLenum, GLenum, GLuint, GLintptr, GLsizeiptr);
+#define CALL_TexBufferRange(disp, parameters) \
+ (* GET_TexBufferRange(disp)) parameters
+static inline _glptr_TexBufferRange GET_TexBufferRange(struct _glapi_table *disp) {
+ return (_glptr_TexBufferRange) (GET_by_offset(disp, _gloffset_TexBufferRange));
+}
+
+static inline void SET_TexBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_TexBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorage2DMultisample)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean);
+#define CALL_TexStorage2DMultisample(disp, parameters) \
+ (* GET_TexStorage2DMultisample(disp)) parameters
+static inline _glptr_TexStorage2DMultisample GET_TexStorage2DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TexStorage2DMultisample) (GET_by_offset(disp, _gloffset_TexStorage2DMultisample));
+}
+
+static inline void SET_TexStorage2DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TexStorage2DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorage3DMultisample)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean);
+#define CALL_TexStorage3DMultisample(disp, parameters) \
+ (* GET_TexStorage3DMultisample(disp)) parameters
+static inline _glptr_TexStorage3DMultisample GET_TexStorage3DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TexStorage3DMultisample) (GET_by_offset(disp, _gloffset_TexStorage3DMultisample));
+}
+
+static inline void SET_TexStorage3DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TexStorage3DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferStorage)(GLenum, GLsizeiptr, const GLvoid *, GLbitfield);
+#define CALL_BufferStorage(disp, parameters) \
+ (* GET_BufferStorage(disp)) parameters
+static inline _glptr_BufferStorage GET_BufferStorage(struct _glapi_table *disp) {
+ return (_glptr_BufferStorage) (GET_by_offset(disp, _gloffset_BufferStorage));
+}
+
+static inline void SET_BufferStorage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizeiptr, const GLvoid *, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_BufferStorage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearTexImage)(GLuint, GLint, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearTexImage(disp, parameters) \
+ (* GET_ClearTexImage(disp)) parameters
+static inline _glptr_ClearTexImage GET_ClearTexImage(struct _glapi_table *disp) {
+ return (_glptr_ClearTexImage) (GET_by_offset(disp, _gloffset_ClearTexImage));
+}
+
+static inline void SET_ClearTexImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearTexImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearTexSubImage)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearTexSubImage(disp, parameters) \
+ (* GET_ClearTexSubImage(disp)) parameters
+static inline _glptr_ClearTexSubImage GET_ClearTexSubImage(struct _glapi_table *disp) {
+ return (_glptr_ClearTexSubImage) (GET_by_offset(disp, _gloffset_ClearTexSubImage));
+}
+
+static inline void SET_ClearTexSubImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearTexSubImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBuffersBase)(GLenum, GLuint, GLsizei, const GLuint *);
+#define CALL_BindBuffersBase(disp, parameters) \
+ (* GET_BindBuffersBase(disp)) parameters
+static inline _glptr_BindBuffersBase GET_BindBuffersBase(struct _glapi_table *disp) {
+ return (_glptr_BindBuffersBase) (GET_by_offset(disp, _gloffset_BindBuffersBase));
+}
+
+static inline void SET_BindBuffersBase(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_BindBuffersBase, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBuffersRange)(GLenum, GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizeiptr *);
+#define CALL_BindBuffersRange(disp, parameters) \
+ (* GET_BindBuffersRange(disp)) parameters
+static inline _glptr_BindBuffersRange GET_BindBuffersRange(struct _glapi_table *disp) {
+ return (_glptr_BindBuffersRange) (GET_by_offset(disp, _gloffset_BindBuffersRange));
+}
+
+static inline void SET_BindBuffersRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizeiptr *)) {
+ SET_by_offset(disp, _gloffset_BindBuffersRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindImageTextures)(GLuint, GLsizei, const GLuint *);
+#define CALL_BindImageTextures(disp, parameters) \
+ (* GET_BindImageTextures(disp)) parameters
+static inline _glptr_BindImageTextures GET_BindImageTextures(struct _glapi_table *disp) {
+ return (_glptr_BindImageTextures) (GET_by_offset(disp, _gloffset_BindImageTextures));
+}
+
+static inline void SET_BindImageTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_BindImageTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindSamplers)(GLuint, GLsizei, const GLuint *);
+#define CALL_BindSamplers(disp, parameters) \
+ (* GET_BindSamplers(disp)) parameters
+static inline _glptr_BindSamplers GET_BindSamplers(struct _glapi_table *disp) {
+ return (_glptr_BindSamplers) (GET_by_offset(disp, _gloffset_BindSamplers));
+}
+
+static inline void SET_BindSamplers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_BindSamplers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindTextures)(GLuint, GLsizei, const GLuint *);
+#define CALL_BindTextures(disp, parameters) \
+ (* GET_BindTextures(disp)) parameters
+static inline _glptr_BindTextures GET_BindTextures(struct _glapi_table *disp) {
+ return (_glptr_BindTextures) (GET_by_offset(disp, _gloffset_BindTextures));
+}
+
+static inline void SET_BindTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_BindTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindVertexBuffers)(GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizei *);
+#define CALL_BindVertexBuffers(disp, parameters) \
+ (* GET_BindVertexBuffers(disp)) parameters
+static inline _glptr_BindVertexBuffers GET_BindVertexBuffers(struct _glapi_table *disp) {
+ return (_glptr_BindVertexBuffers) (GET_by_offset(disp, _gloffset_BindVertexBuffers));
+}
+
+static inline void SET_BindVertexBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizei *)) {
+ SET_by_offset(disp, _gloffset_BindVertexBuffers, fn);
+}
+
+typedef GLuint64 (GLAPIENTRYP _glptr_GetImageHandleARB)(GLuint, GLint, GLboolean, GLint, GLenum);
+#define CALL_GetImageHandleARB(disp, parameters) \
+ (* GET_GetImageHandleARB(disp)) parameters
+static inline _glptr_GetImageHandleARB GET_GetImageHandleARB(struct _glapi_table *disp) {
+ return (_glptr_GetImageHandleARB) (GET_by_offset(disp, _gloffset_GetImageHandleARB));
+}
+
+static inline void SET_GetImageHandleARB(struct _glapi_table *disp, GLuint64 (GLAPIENTRYP fn)(GLuint, GLint, GLboolean, GLint, GLenum)) {
+ SET_by_offset(disp, _gloffset_GetImageHandleARB, fn);
+}
+
+typedef GLuint64 (GLAPIENTRYP _glptr_GetTextureHandleARB)(GLuint);
+#define CALL_GetTextureHandleARB(disp, parameters) \
+ (* GET_GetTextureHandleARB(disp)) parameters
+static inline _glptr_GetTextureHandleARB GET_GetTextureHandleARB(struct _glapi_table *disp) {
+ return (_glptr_GetTextureHandleARB) (GET_by_offset(disp, _gloffset_GetTextureHandleARB));
+}
+
+static inline void SET_GetTextureHandleARB(struct _glapi_table *disp, GLuint64 (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_GetTextureHandleARB, fn);
+}
+
+typedef GLuint64 (GLAPIENTRYP _glptr_GetTextureSamplerHandleARB)(GLuint, GLuint);
+#define CALL_GetTextureSamplerHandleARB(disp, parameters) \
+ (* GET_GetTextureSamplerHandleARB(disp)) parameters
+static inline _glptr_GetTextureSamplerHandleARB GET_GetTextureSamplerHandleARB(struct _glapi_table *disp) {
+ return (_glptr_GetTextureSamplerHandleARB) (GET_by_offset(disp, _gloffset_GetTextureSamplerHandleARB));
+}
+
+static inline void SET_GetTextureSamplerHandleARB(struct _glapi_table *disp, GLuint64 (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_GetTextureSamplerHandleARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribLui64vARB)(GLuint, GLenum, GLuint64EXT *);
+#define CALL_GetVertexAttribLui64vARB(disp, parameters) \
+ (* GET_GetVertexAttribLui64vARB(disp)) parameters
+static inline _glptr_GetVertexAttribLui64vARB GET_GetVertexAttribLui64vARB(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribLui64vARB) (GET_by_offset(disp, _gloffset_GetVertexAttribLui64vARB));
+}
+
+static inline void SET_GetVertexAttribLui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint64EXT *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribLui64vARB, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsImageHandleResidentARB)(GLuint64);
+#define CALL_IsImageHandleResidentARB(disp, parameters) \
+ (* GET_IsImageHandleResidentARB(disp)) parameters
+static inline _glptr_IsImageHandleResidentARB GET_IsImageHandleResidentARB(struct _glapi_table *disp) {
+ return (_glptr_IsImageHandleResidentARB) (GET_by_offset(disp, _gloffset_IsImageHandleResidentARB));
+}
+
+static inline void SET_IsImageHandleResidentARB(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint64)) {
+ SET_by_offset(disp, _gloffset_IsImageHandleResidentARB, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsTextureHandleResidentARB)(GLuint64);
+#define CALL_IsTextureHandleResidentARB(disp, parameters) \
+ (* GET_IsTextureHandleResidentARB(disp)) parameters
+static inline _glptr_IsTextureHandleResidentARB GET_IsTextureHandleResidentARB(struct _glapi_table *disp) {
+ return (_glptr_IsTextureHandleResidentARB) (GET_by_offset(disp, _gloffset_IsTextureHandleResidentARB));
+}
+
+static inline void SET_IsTextureHandleResidentARB(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint64)) {
+ SET_by_offset(disp, _gloffset_IsTextureHandleResidentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MakeImageHandleNonResidentARB)(GLuint64);
+#define CALL_MakeImageHandleNonResidentARB(disp, parameters) \
+ (* GET_MakeImageHandleNonResidentARB(disp)) parameters
+static inline _glptr_MakeImageHandleNonResidentARB GET_MakeImageHandleNonResidentARB(struct _glapi_table *disp) {
+ return (_glptr_MakeImageHandleNonResidentARB) (GET_by_offset(disp, _gloffset_MakeImageHandleNonResidentARB));
+}
+
+static inline void SET_MakeImageHandleNonResidentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint64)) {
+ SET_by_offset(disp, _gloffset_MakeImageHandleNonResidentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MakeImageHandleResidentARB)(GLuint64, GLenum);
+#define CALL_MakeImageHandleResidentARB(disp, parameters) \
+ (* GET_MakeImageHandleResidentARB(disp)) parameters
+static inline _glptr_MakeImageHandleResidentARB GET_MakeImageHandleResidentARB(struct _glapi_table *disp) {
+ return (_glptr_MakeImageHandleResidentARB) (GET_by_offset(disp, _gloffset_MakeImageHandleResidentARB));
+}
+
+static inline void SET_MakeImageHandleResidentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint64, GLenum)) {
+ SET_by_offset(disp, _gloffset_MakeImageHandleResidentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MakeTextureHandleNonResidentARB)(GLuint64);
+#define CALL_MakeTextureHandleNonResidentARB(disp, parameters) \
+ (* GET_MakeTextureHandleNonResidentARB(disp)) parameters
+static inline _glptr_MakeTextureHandleNonResidentARB GET_MakeTextureHandleNonResidentARB(struct _glapi_table *disp) {
+ return (_glptr_MakeTextureHandleNonResidentARB) (GET_by_offset(disp, _gloffset_MakeTextureHandleNonResidentARB));
+}
+
+static inline void SET_MakeTextureHandleNonResidentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint64)) {
+ SET_by_offset(disp, _gloffset_MakeTextureHandleNonResidentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MakeTextureHandleResidentARB)(GLuint64);
+#define CALL_MakeTextureHandleResidentARB(disp, parameters) \
+ (* GET_MakeTextureHandleResidentARB(disp)) parameters
+static inline _glptr_MakeTextureHandleResidentARB GET_MakeTextureHandleResidentARB(struct _glapi_table *disp) {
+ return (_glptr_MakeTextureHandleResidentARB) (GET_by_offset(disp, _gloffset_MakeTextureHandleResidentARB));
+}
+
+static inline void SET_MakeTextureHandleResidentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint64)) {
+ SET_by_offset(disp, _gloffset_MakeTextureHandleResidentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformHandleui64ARB)(GLuint, GLint, GLuint64);
+#define CALL_ProgramUniformHandleui64ARB(disp, parameters) \
+ (* GET_ProgramUniformHandleui64ARB(disp)) parameters
+static inline _glptr_ProgramUniformHandleui64ARB GET_ProgramUniformHandleui64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformHandleui64ARB) (GET_by_offset(disp, _gloffset_ProgramUniformHandleui64ARB));
+}
+
+static inline void SET_ProgramUniformHandleui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformHandleui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformHandleui64vARB)(GLuint, GLint, GLsizei, const GLuint64 *);
+#define CALL_ProgramUniformHandleui64vARB(disp, parameters) \
+ (* GET_ProgramUniformHandleui64vARB(disp)) parameters
+static inline _glptr_ProgramUniformHandleui64vARB GET_ProgramUniformHandleui64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformHandleui64vARB) (GET_by_offset(disp, _gloffset_ProgramUniformHandleui64vARB));
+}
+
+static inline void SET_ProgramUniformHandleui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformHandleui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformHandleui64ARB)(GLint, GLuint64);
+#define CALL_UniformHandleui64ARB(disp, parameters) \
+ (* GET_UniformHandleui64ARB(disp)) parameters
+static inline _glptr_UniformHandleui64ARB GET_UniformHandleui64ARB(struct _glapi_table *disp) {
+ return (_glptr_UniformHandleui64ARB) (GET_by_offset(disp, _gloffset_UniformHandleui64ARB));
+}
+
+static inline void SET_UniformHandleui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_UniformHandleui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UniformHandleui64vARB)(GLint, GLsizei, const GLuint64 *);
+#define CALL_UniformHandleui64vARB(disp, parameters) \
+ (* GET_UniformHandleui64vARB(disp)) parameters
+static inline _glptr_UniformHandleui64vARB GET_UniformHandleui64vARB(struct _glapi_table *disp) {
+ return (_glptr_UniformHandleui64vARB) (GET_by_offset(disp, _gloffset_UniformHandleui64vARB));
+}
+
+static inline void SET_UniformHandleui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_UniformHandleui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL1ui64ARB)(GLuint, GLuint64EXT);
+#define CALL_VertexAttribL1ui64ARB(disp, parameters) \
+ (* GET_VertexAttribL1ui64ARB(disp)) parameters
+static inline _glptr_VertexAttribL1ui64ARB GET_VertexAttribL1ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL1ui64ARB) (GET_by_offset(disp, _gloffset_VertexAttribL1ui64ARB));
+}
+
+static inline void SET_VertexAttribL1ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint64EXT)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL1ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribL1ui64vARB)(GLuint, const GLuint64EXT *);
+#define CALL_VertexAttribL1ui64vARB(disp, parameters) \
+ (* GET_VertexAttribL1ui64vARB(disp)) parameters
+static inline _glptr_VertexAttribL1ui64vARB GET_VertexAttribL1ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribL1ui64vARB) (GET_by_offset(disp, _gloffset_VertexAttribL1ui64vARB));
+}
+
+static inline void SET_VertexAttribL1ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint64EXT *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribL1ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DispatchComputeGroupSizeARB)(GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_DispatchComputeGroupSizeARB(disp, parameters) \
+ (* GET_DispatchComputeGroupSizeARB(disp)) parameters
+static inline _glptr_DispatchComputeGroupSizeARB GET_DispatchComputeGroupSizeARB(struct _glapi_table *disp) {
+ return (_glptr_DispatchComputeGroupSizeARB) (GET_by_offset(disp, _gloffset_DispatchComputeGroupSizeARB));
+}
+
+static inline void SET_DispatchComputeGroupSizeARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DispatchComputeGroupSizeARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawArraysIndirectCountARB)(GLenum, GLintptr, GLintptr, GLsizei, GLsizei);
+#define CALL_MultiDrawArraysIndirectCountARB(disp, parameters) \
+ (* GET_MultiDrawArraysIndirectCountARB(disp)) parameters
+static inline _glptr_MultiDrawArraysIndirectCountARB GET_MultiDrawArraysIndirectCountARB(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawArraysIndirectCountARB) (GET_by_offset(disp, _gloffset_MultiDrawArraysIndirectCountARB));
+}
+
+static inline void SET_MultiDrawArraysIndirectCountARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLintptr, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawArraysIndirectCountARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawElementsIndirectCountARB)(GLenum, GLenum, GLintptr, GLintptr, GLsizei, GLsizei);
+#define CALL_MultiDrawElementsIndirectCountARB(disp, parameters) \
+ (* GET_MultiDrawElementsIndirectCountARB(disp)) parameters
+static inline _glptr_MultiDrawElementsIndirectCountARB GET_MultiDrawElementsIndirectCountARB(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawElementsIndirectCountARB) (GET_by_offset(disp, _gloffset_MultiDrawElementsIndirectCountARB));
+}
+
+static inline void SET_MultiDrawElementsIndirectCountARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLintptr, GLintptr, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawElementsIndirectCountARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClipControl)(GLenum, GLenum);
+#define CALL_ClipControl(disp, parameters) \
+ (* GET_ClipControl(disp)) parameters
+static inline _glptr_ClipControl GET_ClipControl(struct _glapi_table *disp) {
+ return (_glptr_ClipControl) (GET_by_offset(disp, _gloffset_ClipControl));
+}
+
+static inline void SET_ClipControl(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_ClipControl, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindTextureUnit)(GLuint, GLuint);
+#define CALL_BindTextureUnit(disp, parameters) \
+ (* GET_BindTextureUnit(disp)) parameters
+static inline _glptr_BindTextureUnit GET_BindTextureUnit(struct _glapi_table *disp) {
+ return (_glptr_BindTextureUnit) (GET_by_offset(disp, _gloffset_BindTextureUnit));
+}
+
+static inline void SET_BindTextureUnit(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindTextureUnit, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlitNamedFramebuffer)(GLuint, GLuint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLbitfield, GLenum);
+#define CALL_BlitNamedFramebuffer(disp, parameters) \
+ (* GET_BlitNamedFramebuffer(disp)) parameters
+static inline _glptr_BlitNamedFramebuffer GET_BlitNamedFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_BlitNamedFramebuffer) (GET_by_offset(disp, _gloffset_BlitNamedFramebuffer));
+}
+
+static inline void SET_BlitNamedFramebuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLint, GLbitfield, GLenum)) {
+ SET_by_offset(disp, _gloffset_BlitNamedFramebuffer, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_CheckNamedFramebufferStatus)(GLuint, GLenum);
+#define CALL_CheckNamedFramebufferStatus(disp, parameters) \
+ (* GET_CheckNamedFramebufferStatus(disp)) parameters
+static inline _glptr_CheckNamedFramebufferStatus GET_CheckNamedFramebufferStatus(struct _glapi_table *disp) {
+ return (_glptr_CheckNamedFramebufferStatus) (GET_by_offset(disp, _gloffset_CheckNamedFramebufferStatus));
+}
+
+static inline void SET_CheckNamedFramebufferStatus(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_CheckNamedFramebufferStatus, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedBufferData)(GLuint, GLenum, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearNamedBufferData(disp, parameters) \
+ (* GET_ClearNamedBufferData(disp)) parameters
+static inline _glptr_ClearNamedBufferData GET_ClearNamedBufferData(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedBufferData) (GET_by_offset(disp, _gloffset_ClearNamedBufferData));
+}
+
+static inline void SET_ClearNamedBufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearNamedBufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedBufferSubData)(GLuint, GLenum, GLintptr, GLsizeiptr, GLenum, GLenum, const GLvoid *);
+#define CALL_ClearNamedBufferSubData(disp, parameters) \
+ (* GET_ClearNamedBufferSubData(disp)) parameters
+static inline _glptr_ClearNamedBufferSubData GET_ClearNamedBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedBufferSubData) (GET_by_offset(disp, _gloffset_ClearNamedBufferSubData));
+}
+
+static inline void SET_ClearNamedBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLintptr, GLsizeiptr, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ClearNamedBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedFramebufferfi)(GLuint, GLenum, GLint, GLfloat, GLint);
+#define CALL_ClearNamedFramebufferfi(disp, parameters) \
+ (* GET_ClearNamedFramebufferfi(disp)) parameters
+static inline _glptr_ClearNamedFramebufferfi GET_ClearNamedFramebufferfi(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedFramebufferfi) (GET_by_offset(disp, _gloffset_ClearNamedFramebufferfi));
+}
+
+static inline void SET_ClearNamedFramebufferfi(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint, GLfloat, GLint)) {
+ SET_by_offset(disp, _gloffset_ClearNamedFramebufferfi, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedFramebufferfv)(GLuint, GLenum, GLint, const GLfloat *);
+#define CALL_ClearNamedFramebufferfv(disp, parameters) \
+ (* GET_ClearNamedFramebufferfv(disp)) parameters
+static inline _glptr_ClearNamedFramebufferfv GET_ClearNamedFramebufferfv(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedFramebufferfv) (GET_by_offset(disp, _gloffset_ClearNamedFramebufferfv));
+}
+
+static inline void SET_ClearNamedFramebufferfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ClearNamedFramebufferfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedFramebufferiv)(GLuint, GLenum, GLint, const GLint *);
+#define CALL_ClearNamedFramebufferiv(disp, parameters) \
+ (* GET_ClearNamedFramebufferiv(disp)) parameters
+static inline _glptr_ClearNamedFramebufferiv GET_ClearNamedFramebufferiv(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedFramebufferiv) (GET_by_offset(disp, _gloffset_ClearNamedFramebufferiv));
+}
+
+static inline void SET_ClearNamedFramebufferiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ClearNamedFramebufferiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearNamedFramebufferuiv)(GLuint, GLenum, GLint, const GLuint *);
+#define CALL_ClearNamedFramebufferuiv(disp, parameters) \
+ (* GET_ClearNamedFramebufferuiv(disp)) parameters
+static inline _glptr_ClearNamedFramebufferuiv GET_ClearNamedFramebufferuiv(struct _glapi_table *disp) {
+ return (_glptr_ClearNamedFramebufferuiv) (GET_by_offset(disp, _gloffset_ClearNamedFramebufferuiv));
+}
+
+static inline void SET_ClearNamedFramebufferuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ClearNamedFramebufferuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTextureSubImage1D)(GLuint, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTextureSubImage1D(disp, parameters) \
+ (* GET_CompressedTextureSubImage1D(disp)) parameters
+static inline _glptr_CompressedTextureSubImage1D GET_CompressedTextureSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTextureSubImage1D) (GET_by_offset(disp, _gloffset_CompressedTextureSubImage1D));
+}
+
+static inline void SET_CompressedTextureSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTextureSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTextureSubImage2D)(GLuint, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTextureSubImage2D(disp, parameters) \
+ (* GET_CompressedTextureSubImage2D(disp)) parameters
+static inline _glptr_CompressedTextureSubImage2D GET_CompressedTextureSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTextureSubImage2D) (GET_by_offset(disp, _gloffset_CompressedTextureSubImage2D));
+}
+
+static inline void SET_CompressedTextureSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTextureSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CompressedTextureSubImage3D)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *);
+#define CALL_CompressedTextureSubImage3D(disp, parameters) \
+ (* GET_CompressedTextureSubImage3D(disp)) parameters
+static inline _glptr_CompressedTextureSubImage3D GET_CompressedTextureSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_CompressedTextureSubImage3D) (GET_by_offset(disp, _gloffset_CompressedTextureSubImage3D));
+}
+
+static inline void SET_CompressedTextureSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_CompressedTextureSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyNamedBufferSubData)(GLuint, GLuint, GLintptr, GLintptr, GLsizeiptr);
+#define CALL_CopyNamedBufferSubData(disp, parameters) \
+ (* GET_CopyNamedBufferSubData(disp)) parameters
+static inline _glptr_CopyNamedBufferSubData GET_CopyNamedBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_CopyNamedBufferSubData) (GET_by_offset(disp, _gloffset_CopyNamedBufferSubData));
+}
+
+static inline void SET_CopyNamedBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLintptr, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_CopyNamedBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTextureSubImage1D)(GLuint, GLint, GLint, GLint, GLint, GLsizei);
+#define CALL_CopyTextureSubImage1D(disp, parameters) \
+ (* GET_CopyTextureSubImage1D(disp)) parameters
+static inline _glptr_CopyTextureSubImage1D GET_CopyTextureSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_CopyTextureSubImage1D) (GET_by_offset(disp, _gloffset_CopyTextureSubImage1D));
+}
+
+static inline void SET_CopyTextureSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTextureSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTextureSubImage2D)(GLuint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#define CALL_CopyTextureSubImage2D(disp, parameters) \
+ (* GET_CopyTextureSubImage2D(disp)) parameters
+static inline _glptr_CopyTextureSubImage2D GET_CopyTextureSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_CopyTextureSubImage2D) (GET_by_offset(disp, _gloffset_CopyTextureSubImage2D));
+}
+
+static inline void SET_CopyTextureSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTextureSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CopyTextureSubImage3D)(GLuint, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei);
+#define CALL_CopyTextureSubImage3D(disp, parameters) \
+ (* GET_CopyTextureSubImage3D(disp)) parameters
+static inline _glptr_CopyTextureSubImage3D GET_CopyTextureSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_CopyTextureSubImage3D) (GET_by_offset(disp, _gloffset_CopyTextureSubImage3D));
+}
+
+static inline void SET_CopyTextureSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_CopyTextureSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateBuffers)(GLsizei, GLuint *);
+#define CALL_CreateBuffers(disp, parameters) \
+ (* GET_CreateBuffers(disp)) parameters
+static inline _glptr_CreateBuffers GET_CreateBuffers(struct _glapi_table *disp) {
+ return (_glptr_CreateBuffers) (GET_by_offset(disp, _gloffset_CreateBuffers));
+}
+
+static inline void SET_CreateBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateFramebuffers)(GLsizei, GLuint *);
+#define CALL_CreateFramebuffers(disp, parameters) \
+ (* GET_CreateFramebuffers(disp)) parameters
+static inline _glptr_CreateFramebuffers GET_CreateFramebuffers(struct _glapi_table *disp) {
+ return (_glptr_CreateFramebuffers) (GET_by_offset(disp, _gloffset_CreateFramebuffers));
+}
+
+static inline void SET_CreateFramebuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateFramebuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateProgramPipelines)(GLsizei, GLuint *);
+#define CALL_CreateProgramPipelines(disp, parameters) \
+ (* GET_CreateProgramPipelines(disp)) parameters
+static inline _glptr_CreateProgramPipelines GET_CreateProgramPipelines(struct _glapi_table *disp) {
+ return (_glptr_CreateProgramPipelines) (GET_by_offset(disp, _gloffset_CreateProgramPipelines));
+}
+
+static inline void SET_CreateProgramPipelines(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateProgramPipelines, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateQueries)(GLenum, GLsizei, GLuint *);
+#define CALL_CreateQueries(disp, parameters) \
+ (* GET_CreateQueries(disp)) parameters
+static inline _glptr_CreateQueries GET_CreateQueries(struct _glapi_table *disp) {
+ return (_glptr_CreateQueries) (GET_by_offset(disp, _gloffset_CreateQueries));
+}
+
+static inline void SET_CreateQueries(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateQueries, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateRenderbuffers)(GLsizei, GLuint *);
+#define CALL_CreateRenderbuffers(disp, parameters) \
+ (* GET_CreateRenderbuffers(disp)) parameters
+static inline _glptr_CreateRenderbuffers GET_CreateRenderbuffers(struct _glapi_table *disp) {
+ return (_glptr_CreateRenderbuffers) (GET_by_offset(disp, _gloffset_CreateRenderbuffers));
+}
+
+static inline void SET_CreateRenderbuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateRenderbuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateSamplers)(GLsizei, GLuint *);
+#define CALL_CreateSamplers(disp, parameters) \
+ (* GET_CreateSamplers(disp)) parameters
+static inline _glptr_CreateSamplers GET_CreateSamplers(struct _glapi_table *disp) {
+ return (_glptr_CreateSamplers) (GET_by_offset(disp, _gloffset_CreateSamplers));
+}
+
+static inline void SET_CreateSamplers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateSamplers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateTextures)(GLenum, GLsizei, GLuint *);
+#define CALL_CreateTextures(disp, parameters) \
+ (* GET_CreateTextures(disp)) parameters
+static inline _glptr_CreateTextures GET_CreateTextures(struct _glapi_table *disp) {
+ return (_glptr_CreateTextures) (GET_by_offset(disp, _gloffset_CreateTextures));
+}
+
+static inline void SET_CreateTextures(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateTextures, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateTransformFeedbacks)(GLsizei, GLuint *);
+#define CALL_CreateTransformFeedbacks(disp, parameters) \
+ (* GET_CreateTransformFeedbacks(disp)) parameters
+static inline _glptr_CreateTransformFeedbacks GET_CreateTransformFeedbacks(struct _glapi_table *disp) {
+ return (_glptr_CreateTransformFeedbacks) (GET_by_offset(disp, _gloffset_CreateTransformFeedbacks));
+}
+
+static inline void SET_CreateTransformFeedbacks(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateTransformFeedbacks, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateVertexArrays)(GLsizei, GLuint *);
+#define CALL_CreateVertexArrays(disp, parameters) \
+ (* GET_CreateVertexArrays(disp)) parameters
+static inline _glptr_CreateVertexArrays GET_CreateVertexArrays(struct _glapi_table *disp) {
+ return (_glptr_CreateVertexArrays) (GET_by_offset(disp, _gloffset_CreateVertexArrays));
+}
+
+static inline void SET_CreateVertexArrays(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateVertexArrays, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DisableVertexArrayAttrib)(GLuint, GLuint);
+#define CALL_DisableVertexArrayAttrib(disp, parameters) \
+ (* GET_DisableVertexArrayAttrib(disp)) parameters
+static inline _glptr_DisableVertexArrayAttrib GET_DisableVertexArrayAttrib(struct _glapi_table *disp) {
+ return (_glptr_DisableVertexArrayAttrib) (GET_by_offset(disp, _gloffset_DisableVertexArrayAttrib));
+}
+
+static inline void SET_DisableVertexArrayAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_DisableVertexArrayAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EnableVertexArrayAttrib)(GLuint, GLuint);
+#define CALL_EnableVertexArrayAttrib(disp, parameters) \
+ (* GET_EnableVertexArrayAttrib(disp)) parameters
+static inline _glptr_EnableVertexArrayAttrib GET_EnableVertexArrayAttrib(struct _glapi_table *disp) {
+ return (_glptr_EnableVertexArrayAttrib) (GET_by_offset(disp, _gloffset_EnableVertexArrayAttrib));
+}
+
+static inline void SET_EnableVertexArrayAttrib(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_EnableVertexArrayAttrib, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FlushMappedNamedBufferRange)(GLuint, GLintptr, GLsizeiptr);
+#define CALL_FlushMappedNamedBufferRange(disp, parameters) \
+ (* GET_FlushMappedNamedBufferRange(disp)) parameters
+static inline _glptr_FlushMappedNamedBufferRange GET_FlushMappedNamedBufferRange(struct _glapi_table *disp) {
+ return (_glptr_FlushMappedNamedBufferRange) (GET_by_offset(disp, _gloffset_FlushMappedNamedBufferRange));
+}
+
+static inline void SET_FlushMappedNamedBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_FlushMappedNamedBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenerateTextureMipmap)(GLuint);
+#define CALL_GenerateTextureMipmap(disp, parameters) \
+ (* GET_GenerateTextureMipmap(disp)) parameters
+static inline _glptr_GenerateTextureMipmap GET_GenerateTextureMipmap(struct _glapi_table *disp) {
+ return (_glptr_GenerateTextureMipmap) (GET_by_offset(disp, _gloffset_GenerateTextureMipmap));
+}
+
+static inline void SET_GenerateTextureMipmap(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_GenerateTextureMipmap, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetCompressedTextureImage)(GLuint, GLint, GLsizei, GLvoid *);
+#define CALL_GetCompressedTextureImage(disp, parameters) \
+ (* GET_GetCompressedTextureImage(disp)) parameters
+static inline _glptr_GetCompressedTextureImage GET_GetCompressedTextureImage(struct _glapi_table *disp) {
+ return (_glptr_GetCompressedTextureImage) (GET_by_offset(disp, _gloffset_GetCompressedTextureImage));
+}
+
+static inline void SET_GetCompressedTextureImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetCompressedTextureImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedBufferParameteri64v)(GLuint, GLenum, GLint64 *);
+#define CALL_GetNamedBufferParameteri64v(disp, parameters) \
+ (* GET_GetNamedBufferParameteri64v(disp)) parameters
+static inline _glptr_GetNamedBufferParameteri64v GET_GetNamedBufferParameteri64v(struct _glapi_table *disp) {
+ return (_glptr_GetNamedBufferParameteri64v) (GET_by_offset(disp, _gloffset_GetNamedBufferParameteri64v));
+}
+
+static inline void SET_GetNamedBufferParameteri64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetNamedBufferParameteri64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedBufferParameteriv)(GLuint, GLenum, GLint *);
+#define CALL_GetNamedBufferParameteriv(disp, parameters) \
+ (* GET_GetNamedBufferParameteriv(disp)) parameters
+static inline _glptr_GetNamedBufferParameteriv GET_GetNamedBufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetNamedBufferParameteriv) (GET_by_offset(disp, _gloffset_GetNamedBufferParameteriv));
+}
+
+static inline void SET_GetNamedBufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetNamedBufferParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedBufferPointerv)(GLuint, GLenum, GLvoid **);
+#define CALL_GetNamedBufferPointerv(disp, parameters) \
+ (* GET_GetNamedBufferPointerv(disp)) parameters
+static inline _glptr_GetNamedBufferPointerv GET_GetNamedBufferPointerv(struct _glapi_table *disp) {
+ return (_glptr_GetNamedBufferPointerv) (GET_by_offset(disp, _gloffset_GetNamedBufferPointerv));
+}
+
+static inline void SET_GetNamedBufferPointerv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLvoid **)) {
+ SET_by_offset(disp, _gloffset_GetNamedBufferPointerv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedBufferSubData)(GLuint, GLintptr, GLsizeiptr, GLvoid *);
+#define CALL_GetNamedBufferSubData(disp, parameters) \
+ (* GET_GetNamedBufferSubData(disp)) parameters
+static inline _glptr_GetNamedBufferSubData GET_GetNamedBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_GetNamedBufferSubData) (GET_by_offset(disp, _gloffset_GetNamedBufferSubData));
+}
+
+static inline void SET_GetNamedBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetNamedBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedFramebufferAttachmentParameteriv)(GLuint, GLenum, GLenum, GLint *);
+#define CALL_GetNamedFramebufferAttachmentParameteriv(disp, parameters) \
+ (* GET_GetNamedFramebufferAttachmentParameteriv(disp)) parameters
+static inline _glptr_GetNamedFramebufferAttachmentParameteriv GET_GetNamedFramebufferAttachmentParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetNamedFramebufferAttachmentParameteriv) (GET_by_offset(disp, _gloffset_GetNamedFramebufferAttachmentParameteriv));
+}
+
+static inline void SET_GetNamedFramebufferAttachmentParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetNamedFramebufferAttachmentParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedFramebufferParameteriv)(GLuint, GLenum, GLint *);
+#define CALL_GetNamedFramebufferParameteriv(disp, parameters) \
+ (* GET_GetNamedFramebufferParameteriv(disp)) parameters
+static inline _glptr_GetNamedFramebufferParameteriv GET_GetNamedFramebufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetNamedFramebufferParameteriv) (GET_by_offset(disp, _gloffset_GetNamedFramebufferParameteriv));
+}
+
+static inline void SET_GetNamedFramebufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetNamedFramebufferParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNamedRenderbufferParameteriv)(GLuint, GLenum, GLint *);
+#define CALL_GetNamedRenderbufferParameteriv(disp, parameters) \
+ (* GET_GetNamedRenderbufferParameteriv(disp)) parameters
+static inline _glptr_GetNamedRenderbufferParameteriv GET_GetNamedRenderbufferParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetNamedRenderbufferParameteriv) (GET_by_offset(disp, _gloffset_GetNamedRenderbufferParameteriv));
+}
+
+static inline void SET_GetNamedRenderbufferParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetNamedRenderbufferParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryBufferObjecti64v)(GLuint, GLuint, GLenum, GLintptr);
+#define CALL_GetQueryBufferObjecti64v(disp, parameters) \
+ (* GET_GetQueryBufferObjecti64v(disp)) parameters
+static inline _glptr_GetQueryBufferObjecti64v GET_GetQueryBufferObjecti64v(struct _glapi_table *disp) {
+ return (_glptr_GetQueryBufferObjecti64v) (GET_by_offset(disp, _gloffset_GetQueryBufferObjecti64v));
+}
+
+static inline void SET_GetQueryBufferObjecti64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLintptr)) {
+ SET_by_offset(disp, _gloffset_GetQueryBufferObjecti64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryBufferObjectiv)(GLuint, GLuint, GLenum, GLintptr);
+#define CALL_GetQueryBufferObjectiv(disp, parameters) \
+ (* GET_GetQueryBufferObjectiv(disp)) parameters
+static inline _glptr_GetQueryBufferObjectiv GET_GetQueryBufferObjectiv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryBufferObjectiv) (GET_by_offset(disp, _gloffset_GetQueryBufferObjectiv));
+}
+
+static inline void SET_GetQueryBufferObjectiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLintptr)) {
+ SET_by_offset(disp, _gloffset_GetQueryBufferObjectiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryBufferObjectui64v)(GLuint, GLuint, GLenum, GLintptr);
+#define CALL_GetQueryBufferObjectui64v(disp, parameters) \
+ (* GET_GetQueryBufferObjectui64v(disp)) parameters
+static inline _glptr_GetQueryBufferObjectui64v GET_GetQueryBufferObjectui64v(struct _glapi_table *disp) {
+ return (_glptr_GetQueryBufferObjectui64v) (GET_by_offset(disp, _gloffset_GetQueryBufferObjectui64v));
+}
+
+static inline void SET_GetQueryBufferObjectui64v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLintptr)) {
+ SET_by_offset(disp, _gloffset_GetQueryBufferObjectui64v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetQueryBufferObjectuiv)(GLuint, GLuint, GLenum, GLintptr);
+#define CALL_GetQueryBufferObjectuiv(disp, parameters) \
+ (* GET_GetQueryBufferObjectuiv(disp)) parameters
+static inline _glptr_GetQueryBufferObjectuiv GET_GetQueryBufferObjectuiv(struct _glapi_table *disp) {
+ return (_glptr_GetQueryBufferObjectuiv) (GET_by_offset(disp, _gloffset_GetQueryBufferObjectuiv));
+}
+
+static inline void SET_GetQueryBufferObjectuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLintptr)) {
+ SET_by_offset(disp, _gloffset_GetQueryBufferObjectuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureImage)(GLuint, GLint, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetTextureImage(disp, parameters) \
+ (* GET_GetTextureImage(disp)) parameters
+static inline _glptr_GetTextureImage GET_GetTextureImage(struct _glapi_table *disp) {
+ return (_glptr_GetTextureImage) (GET_by_offset(disp, _gloffset_GetTextureImage));
+}
+
+static inline void SET_GetTextureImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetTextureImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureLevelParameterfv)(GLuint, GLint, GLenum, GLfloat *);
+#define CALL_GetTextureLevelParameterfv(disp, parameters) \
+ (* GET_GetTextureLevelParameterfv(disp)) parameters
+static inline _glptr_GetTextureLevelParameterfv GET_GetTextureLevelParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureLevelParameterfv) (GET_by_offset(disp, _gloffset_GetTextureLevelParameterfv));
+}
+
+static inline void SET_GetTextureLevelParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTextureLevelParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureLevelParameteriv)(GLuint, GLint, GLenum, GLint *);
+#define CALL_GetTextureLevelParameteriv(disp, parameters) \
+ (* GET_GetTextureLevelParameteriv(disp)) parameters
+static inline _glptr_GetTextureLevelParameteriv GET_GetTextureLevelParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureLevelParameteriv) (GET_by_offset(disp, _gloffset_GetTextureLevelParameteriv));
+}
+
+static inline void SET_GetTextureLevelParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTextureLevelParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureParameterIiv)(GLuint, GLenum, GLint *);
+#define CALL_GetTextureParameterIiv(disp, parameters) \
+ (* GET_GetTextureParameterIiv(disp)) parameters
+static inline _glptr_GetTextureParameterIiv GET_GetTextureParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureParameterIiv) (GET_by_offset(disp, _gloffset_GetTextureParameterIiv));
+}
+
+static inline void SET_GetTextureParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTextureParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureParameterIuiv)(GLuint, GLenum, GLuint *);
+#define CALL_GetTextureParameterIuiv(disp, parameters) \
+ (* GET_GetTextureParameterIuiv(disp)) parameters
+static inline _glptr_GetTextureParameterIuiv GET_GetTextureParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureParameterIuiv) (GET_by_offset(disp, _gloffset_GetTextureParameterIuiv));
+}
+
+static inline void SET_GetTextureParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetTextureParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureParameterfv)(GLuint, GLenum, GLfloat *);
+#define CALL_GetTextureParameterfv(disp, parameters) \
+ (* GET_GetTextureParameterfv(disp)) parameters
+static inline _glptr_GetTextureParameterfv GET_GetTextureParameterfv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureParameterfv) (GET_by_offset(disp, _gloffset_GetTextureParameterfv));
+}
+
+static inline void SET_GetTextureParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTextureParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureParameteriv)(GLuint, GLenum, GLint *);
+#define CALL_GetTextureParameteriv(disp, parameters) \
+ (* GET_GetTextureParameteriv(disp)) parameters
+static inline _glptr_GetTextureParameteriv GET_GetTextureParameteriv(struct _glapi_table *disp) {
+ return (_glptr_GetTextureParameteriv) (GET_by_offset(disp, _gloffset_GetTextureParameteriv));
+}
+
+static inline void SET_GetTextureParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTextureParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTransformFeedbacki64_v)(GLuint, GLenum, GLuint, GLint64 *);
+#define CALL_GetTransformFeedbacki64_v(disp, parameters) \
+ (* GET_GetTransformFeedbacki64_v(disp)) parameters
+static inline _glptr_GetTransformFeedbacki64_v GET_GetTransformFeedbacki64_v(struct _glapi_table *disp) {
+ return (_glptr_GetTransformFeedbacki64_v) (GET_by_offset(disp, _gloffset_GetTransformFeedbacki64_v));
+}
+
+static inline void SET_GetTransformFeedbacki64_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetTransformFeedbacki64_v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTransformFeedbacki_v)(GLuint, GLenum, GLuint, GLint *);
+#define CALL_GetTransformFeedbacki_v(disp, parameters) \
+ (* GET_GetTransformFeedbacki_v(disp)) parameters
+static inline _glptr_GetTransformFeedbacki_v GET_GetTransformFeedbacki_v(struct _glapi_table *disp) {
+ return (_glptr_GetTransformFeedbacki_v) (GET_by_offset(disp, _gloffset_GetTransformFeedbacki_v));
+}
+
+static inline void SET_GetTransformFeedbacki_v(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTransformFeedbacki_v, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTransformFeedbackiv)(GLuint, GLenum, GLint *);
+#define CALL_GetTransformFeedbackiv(disp, parameters) \
+ (* GET_GetTransformFeedbackiv(disp)) parameters
+static inline _glptr_GetTransformFeedbackiv GET_GetTransformFeedbackiv(struct _glapi_table *disp) {
+ return (_glptr_GetTransformFeedbackiv) (GET_by_offset(disp, _gloffset_GetTransformFeedbackiv));
+}
+
+static inline void SET_GetTransformFeedbackiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTransformFeedbackiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexArrayIndexed64iv)(GLuint, GLuint, GLenum, GLint64 *);
+#define CALL_GetVertexArrayIndexed64iv(disp, parameters) \
+ (* GET_GetVertexArrayIndexed64iv(disp)) parameters
+static inline _glptr_GetVertexArrayIndexed64iv GET_GetVertexArrayIndexed64iv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexArrayIndexed64iv) (GET_by_offset(disp, _gloffset_GetVertexArrayIndexed64iv));
+}
+
+static inline void SET_GetVertexArrayIndexed64iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetVertexArrayIndexed64iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexArrayIndexediv)(GLuint, GLuint, GLenum, GLint *);
+#define CALL_GetVertexArrayIndexediv(disp, parameters) \
+ (* GET_GetVertexArrayIndexediv(disp)) parameters
+static inline _glptr_GetVertexArrayIndexediv GET_GetVertexArrayIndexediv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexArrayIndexediv) (GET_by_offset(disp, _gloffset_GetVertexArrayIndexediv));
+}
+
+static inline void SET_GetVertexArrayIndexediv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexArrayIndexediv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexArrayiv)(GLuint, GLenum, GLint *);
+#define CALL_GetVertexArrayiv(disp, parameters) \
+ (* GET_GetVertexArrayiv(disp)) parameters
+static inline _glptr_GetVertexArrayiv GET_GetVertexArrayiv(struct _glapi_table *disp) {
+ return (_glptr_GetVertexArrayiv) (GET_by_offset(disp, _gloffset_GetVertexArrayiv));
+}
+
+static inline void SET_GetVertexArrayiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexArrayiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateNamedFramebufferData)(GLuint, GLsizei, const GLenum *);
+#define CALL_InvalidateNamedFramebufferData(disp, parameters) \
+ (* GET_InvalidateNamedFramebufferData(disp)) parameters
+static inline _glptr_InvalidateNamedFramebufferData GET_InvalidateNamedFramebufferData(struct _glapi_table *disp) {
+ return (_glptr_InvalidateNamedFramebufferData) (GET_by_offset(disp, _gloffset_InvalidateNamedFramebufferData));
+}
+
+static inline void SET_InvalidateNamedFramebufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_InvalidateNamedFramebufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateNamedFramebufferSubData)(GLuint, GLsizei, const GLenum *, GLint, GLint, GLsizei, GLsizei);
+#define CALL_InvalidateNamedFramebufferSubData(disp, parameters) \
+ (* GET_InvalidateNamedFramebufferSubData(disp)) parameters
+static inline _glptr_InvalidateNamedFramebufferSubData GET_InvalidateNamedFramebufferSubData(struct _glapi_table *disp) {
+ return (_glptr_InvalidateNamedFramebufferSubData) (GET_by_offset(disp, _gloffset_InvalidateNamedFramebufferSubData));
+}
+
+static inline void SET_InvalidateNamedFramebufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLenum *, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_InvalidateNamedFramebufferSubData, fn);
+}
+
+typedef GLvoid * (GLAPIENTRYP _glptr_MapNamedBuffer)(GLuint, GLenum);
+#define CALL_MapNamedBuffer(disp, parameters) \
+ (* GET_MapNamedBuffer(disp)) parameters
+static inline _glptr_MapNamedBuffer GET_MapNamedBuffer(struct _glapi_table *disp) {
+ return (_glptr_MapNamedBuffer) (GET_by_offset(disp, _gloffset_MapNamedBuffer));
+}
+
+static inline void SET_MapNamedBuffer(struct _glapi_table *disp, GLvoid * (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_MapNamedBuffer, fn);
+}
+
+typedef GLvoid * (GLAPIENTRYP _glptr_MapNamedBufferRange)(GLuint, GLintptr, GLsizeiptr, GLbitfield);
+#define CALL_MapNamedBufferRange(disp, parameters) \
+ (* GET_MapNamedBufferRange(disp)) parameters
+static inline _glptr_MapNamedBufferRange GET_MapNamedBufferRange(struct _glapi_table *disp) {
+ return (_glptr_MapNamedBufferRange) (GET_by_offset(disp, _gloffset_MapNamedBufferRange));
+}
+
+static inline void SET_MapNamedBufferRange(struct _glapi_table *disp, GLvoid * (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_MapNamedBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedBufferData)(GLuint, GLsizeiptr, const GLvoid *, GLenum);
+#define CALL_NamedBufferData(disp, parameters) \
+ (* GET_NamedBufferData(disp)) parameters
+static inline _glptr_NamedBufferData GET_NamedBufferData(struct _glapi_table *disp) {
+ return (_glptr_NamedBufferData) (GET_by_offset(disp, _gloffset_NamedBufferData));
+}
+
+static inline void SET_NamedBufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizeiptr, const GLvoid *, GLenum)) {
+ SET_by_offset(disp, _gloffset_NamedBufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedBufferStorage)(GLuint, GLsizeiptr, const GLvoid *, GLbitfield);
+#define CALL_NamedBufferStorage(disp, parameters) \
+ (* GET_NamedBufferStorage(disp)) parameters
+static inline _glptr_NamedBufferStorage GET_NamedBufferStorage(struct _glapi_table *disp) {
+ return (_glptr_NamedBufferStorage) (GET_by_offset(disp, _gloffset_NamedBufferStorage));
+}
+
+static inline void SET_NamedBufferStorage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizeiptr, const GLvoid *, GLbitfield)) {
+ SET_by_offset(disp, _gloffset_NamedBufferStorage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedBufferSubData)(GLuint, GLintptr, GLsizeiptr, const GLvoid *);
+#define CALL_NamedBufferSubData(disp, parameters) \
+ (* GET_NamedBufferSubData(disp)) parameters
+static inline _glptr_NamedBufferSubData GET_NamedBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_NamedBufferSubData) (GET_by_offset(disp, _gloffset_NamedBufferSubData));
+}
+
+static inline void SET_NamedBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_NamedBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferDrawBuffer)(GLuint, GLenum);
+#define CALL_NamedFramebufferDrawBuffer(disp, parameters) \
+ (* GET_NamedFramebufferDrawBuffer(disp)) parameters
+static inline _glptr_NamedFramebufferDrawBuffer GET_NamedFramebufferDrawBuffer(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferDrawBuffer) (GET_by_offset(disp, _gloffset_NamedFramebufferDrawBuffer));
+}
+
+static inline void SET_NamedFramebufferDrawBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferDrawBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferDrawBuffers)(GLuint, GLsizei, const GLenum *);
+#define CALL_NamedFramebufferDrawBuffers(disp, parameters) \
+ (* GET_NamedFramebufferDrawBuffers(disp)) parameters
+static inline _glptr_NamedFramebufferDrawBuffers GET_NamedFramebufferDrawBuffers(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferDrawBuffers) (GET_by_offset(disp, _gloffset_NamedFramebufferDrawBuffers));
+}
+
+static inline void SET_NamedFramebufferDrawBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferDrawBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferParameteri)(GLuint, GLenum, GLint);
+#define CALL_NamedFramebufferParameteri(disp, parameters) \
+ (* GET_NamedFramebufferParameteri(disp)) parameters
+static inline _glptr_NamedFramebufferParameteri GET_NamedFramebufferParameteri(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferParameteri) (GET_by_offset(disp, _gloffset_NamedFramebufferParameteri));
+}
+
+static inline void SET_NamedFramebufferParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferReadBuffer)(GLuint, GLenum);
+#define CALL_NamedFramebufferReadBuffer(disp, parameters) \
+ (* GET_NamedFramebufferReadBuffer(disp)) parameters
+static inline _glptr_NamedFramebufferReadBuffer GET_NamedFramebufferReadBuffer(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferReadBuffer) (GET_by_offset(disp, _gloffset_NamedFramebufferReadBuffer));
+}
+
+static inline void SET_NamedFramebufferReadBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferReadBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferRenderbuffer)(GLuint, GLenum, GLenum, GLuint);
+#define CALL_NamedFramebufferRenderbuffer(disp, parameters) \
+ (* GET_NamedFramebufferRenderbuffer(disp)) parameters
+static inline _glptr_NamedFramebufferRenderbuffer GET_NamedFramebufferRenderbuffer(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferRenderbuffer) (GET_by_offset(disp, _gloffset_NamedFramebufferRenderbuffer));
+}
+
+static inline void SET_NamedFramebufferRenderbuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferRenderbuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferTexture)(GLuint, GLenum, GLuint, GLint);
+#define CALL_NamedFramebufferTexture(disp, parameters) \
+ (* GET_NamedFramebufferTexture(disp)) parameters
+static inline _glptr_NamedFramebufferTexture GET_NamedFramebufferTexture(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferTexture) (GET_by_offset(disp, _gloffset_NamedFramebufferTexture));
+}
+
+static inline void SET_NamedFramebufferTexture(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferTexture, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedFramebufferTextureLayer)(GLuint, GLenum, GLuint, GLint, GLint);
+#define CALL_NamedFramebufferTextureLayer(disp, parameters) \
+ (* GET_NamedFramebufferTextureLayer(disp)) parameters
+static inline _glptr_NamedFramebufferTextureLayer GET_NamedFramebufferTextureLayer(struct _glapi_table *disp) {
+ return (_glptr_NamedFramebufferTextureLayer) (GET_by_offset(disp, _gloffset_NamedFramebufferTextureLayer));
+}
+
+static inline void SET_NamedFramebufferTextureLayer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_NamedFramebufferTextureLayer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedRenderbufferStorage)(GLuint, GLenum, GLsizei, GLsizei);
+#define CALL_NamedRenderbufferStorage(disp, parameters) \
+ (* GET_NamedRenderbufferStorage(disp)) parameters
+static inline _glptr_NamedRenderbufferStorage GET_NamedRenderbufferStorage(struct _glapi_table *disp) {
+ return (_glptr_NamedRenderbufferStorage) (GET_by_offset(disp, _gloffset_NamedRenderbufferStorage));
+}
+
+static inline void SET_NamedRenderbufferStorage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_NamedRenderbufferStorage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedRenderbufferStorageMultisample)(GLuint, GLsizei, GLenum, GLsizei, GLsizei);
+#define CALL_NamedRenderbufferStorageMultisample(disp, parameters) \
+ (* GET_NamedRenderbufferStorageMultisample(disp)) parameters
+static inline _glptr_NamedRenderbufferStorageMultisample GET_NamedRenderbufferStorageMultisample(struct _glapi_table *disp) {
+ return (_glptr_NamedRenderbufferStorageMultisample) (GET_by_offset(disp, _gloffset_NamedRenderbufferStorageMultisample));
+}
+
+static inline void SET_NamedRenderbufferStorageMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_NamedRenderbufferStorageMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureBuffer)(GLuint, GLenum, GLuint);
+#define CALL_TextureBuffer(disp, parameters) \
+ (* GET_TextureBuffer(disp)) parameters
+static inline _glptr_TextureBuffer GET_TextureBuffer(struct _glapi_table *disp) {
+ return (_glptr_TextureBuffer) (GET_by_offset(disp, _gloffset_TextureBuffer));
+}
+
+static inline void SET_TextureBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_TextureBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureBufferRange)(GLuint, GLenum, GLuint, GLintptr, GLsizeiptr);
+#define CALL_TextureBufferRange(disp, parameters) \
+ (* GET_TextureBufferRange(disp)) parameters
+static inline _glptr_TextureBufferRange GET_TextureBufferRange(struct _glapi_table *disp) {
+ return (_glptr_TextureBufferRange) (GET_by_offset(disp, _gloffset_TextureBufferRange));
+}
+
+static inline void SET_TextureBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_TextureBufferRange, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameterIiv)(GLuint, GLenum, const GLint *);
+#define CALL_TextureParameterIiv(disp, parameters) \
+ (* GET_TextureParameterIiv(disp)) parameters
+static inline _glptr_TextureParameterIiv GET_TextureParameterIiv(struct _glapi_table *disp) {
+ return (_glptr_TextureParameterIiv) (GET_by_offset(disp, _gloffset_TextureParameterIiv));
+}
+
+static inline void SET_TextureParameterIiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TextureParameterIiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameterIuiv)(GLuint, GLenum, const GLuint *);
+#define CALL_TextureParameterIuiv(disp, parameters) \
+ (* GET_TextureParameterIuiv(disp)) parameters
+static inline _glptr_TextureParameterIuiv GET_TextureParameterIuiv(struct _glapi_table *disp) {
+ return (_glptr_TextureParameterIuiv) (GET_by_offset(disp, _gloffset_TextureParameterIuiv));
+}
+
+static inline void SET_TextureParameterIuiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_TextureParameterIuiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameterf)(GLuint, GLenum, GLfloat);
+#define CALL_TextureParameterf(disp, parameters) \
+ (* GET_TextureParameterf(disp)) parameters
+static inline _glptr_TextureParameterf GET_TextureParameterf(struct _glapi_table *disp) {
+ return (_glptr_TextureParameterf) (GET_by_offset(disp, _gloffset_TextureParameterf));
+}
+
+static inline void SET_TextureParameterf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat)) {
+ SET_by_offset(disp, _gloffset_TextureParameterf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameterfv)(GLuint, GLenum, const GLfloat *);
+#define CALL_TextureParameterfv(disp, parameters) \
+ (* GET_TextureParameterfv(disp)) parameters
+static inline _glptr_TextureParameterfv GET_TextureParameterfv(struct _glapi_table *disp) {
+ return (_glptr_TextureParameterfv) (GET_by_offset(disp, _gloffset_TextureParameterfv));
+}
+
+static inline void SET_TextureParameterfv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TextureParameterfv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameteri)(GLuint, GLenum, GLint);
+#define CALL_TextureParameteri(disp, parameters) \
+ (* GET_TextureParameteri(disp)) parameters
+static inline _glptr_TextureParameteri GET_TextureParameteri(struct _glapi_table *disp) {
+ return (_glptr_TextureParameteri) (GET_by_offset(disp, _gloffset_TextureParameteri));
+}
+
+static inline void SET_TextureParameteri(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_TextureParameteri, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureParameteriv)(GLuint, GLenum, const GLint *);
+#define CALL_TextureParameteriv(disp, parameters) \
+ (* GET_TextureParameteriv(disp)) parameters
+static inline _glptr_TextureParameteriv GET_TextureParameteriv(struct _glapi_table *disp) {
+ return (_glptr_TextureParameteriv) (GET_by_offset(disp, _gloffset_TextureParameteriv));
+}
+
+static inline void SET_TextureParameteriv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TextureParameteriv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage1D)(GLuint, GLsizei, GLenum, GLsizei);
+#define CALL_TextureStorage1D(disp, parameters) \
+ (* GET_TextureStorage1D(disp)) parameters
+static inline _glptr_TextureStorage1D GET_TextureStorage1D(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage1D) (GET_by_offset(disp, _gloffset_TextureStorage1D));
+}
+
+static inline void SET_TextureStorage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage2D)(GLuint, GLsizei, GLenum, GLsizei, GLsizei);
+#define CALL_TextureStorage2D(disp, parameters) \
+ (* GET_TextureStorage2D(disp)) parameters
+static inline _glptr_TextureStorage2D GET_TextureStorage2D(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage2D) (GET_by_offset(disp, _gloffset_TextureStorage2D));
+}
+
+static inline void SET_TextureStorage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage2DMultisample)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLboolean);
+#define CALL_TextureStorage2DMultisample(disp, parameters) \
+ (* GET_TextureStorage2DMultisample(disp)) parameters
+static inline _glptr_TextureStorage2DMultisample GET_TextureStorage2DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage2DMultisample) (GET_by_offset(disp, _gloffset_TextureStorage2DMultisample));
+}
+
+static inline void SET_TextureStorage2DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TextureStorage2DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage3D)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei);
+#define CALL_TextureStorage3D(disp, parameters) \
+ (* GET_TextureStorage3D(disp)) parameters
+static inline _glptr_TextureStorage3D GET_TextureStorage3D(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage3D) (GET_by_offset(disp, _gloffset_TextureStorage3D));
+}
+
+static inline void SET_TextureStorage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_TextureStorage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorage3DMultisample)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean);
+#define CALL_TextureStorage3DMultisample(disp, parameters) \
+ (* GET_TextureStorage3DMultisample(disp)) parameters
+static inline _glptr_TextureStorage3DMultisample GET_TextureStorage3DMultisample(struct _glapi_table *disp) {
+ return (_glptr_TextureStorage3DMultisample) (GET_by_offset(disp, _gloffset_TextureStorage3DMultisample));
+}
+
+static inline void SET_TextureStorage3DMultisample(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean)) {
+ SET_by_offset(disp, _gloffset_TextureStorage3DMultisample, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureSubImage1D)(GLuint, GLint, GLint, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TextureSubImage1D(disp, parameters) \
+ (* GET_TextureSubImage1D(disp)) parameters
+static inline _glptr_TextureSubImage1D GET_TextureSubImage1D(struct _glapi_table *disp) {
+ return (_glptr_TextureSubImage1D) (GET_by_offset(disp, _gloffset_TextureSubImage1D));
+}
+
+static inline void SET_TextureSubImage1D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TextureSubImage1D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureSubImage2D)(GLuint, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TextureSubImage2D(disp, parameters) \
+ (* GET_TextureSubImage2D(disp)) parameters
+static inline _glptr_TextureSubImage2D GET_TextureSubImage2D(struct _glapi_table *disp) {
+ return (_glptr_TextureSubImage2D) (GET_by_offset(disp, _gloffset_TextureSubImage2D));
+}
+
+static inline void SET_TextureSubImage2D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TextureSubImage2D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureSubImage3D)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *);
+#define CALL_TextureSubImage3D(disp, parameters) \
+ (* GET_TextureSubImage3D(disp)) parameters
+static inline _glptr_TextureSubImage3D GET_TextureSubImage3D(struct _glapi_table *disp) {
+ return (_glptr_TextureSubImage3D) (GET_by_offset(disp, _gloffset_TextureSubImage3D));
+}
+
+static inline void SET_TextureSubImage3D(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TextureSubImage3D, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TransformFeedbackBufferBase)(GLuint, GLuint, GLuint);
+#define CALL_TransformFeedbackBufferBase(disp, parameters) \
+ (* GET_TransformFeedbackBufferBase(disp)) parameters
+static inline _glptr_TransformFeedbackBufferBase GET_TransformFeedbackBufferBase(struct _glapi_table *disp) {
+ return (_glptr_TransformFeedbackBufferBase) (GET_by_offset(disp, _gloffset_TransformFeedbackBufferBase));
+}
+
+static inline void SET_TransformFeedbackBufferBase(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_TransformFeedbackBufferBase, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TransformFeedbackBufferRange)(GLuint, GLuint, GLuint, GLintptr, GLsizeiptr);
+#define CALL_TransformFeedbackBufferRange(disp, parameters) \
+ (* GET_TransformFeedbackBufferRange(disp)) parameters
+static inline _glptr_TransformFeedbackBufferRange GET_TransformFeedbackBufferRange(struct _glapi_table *disp) {
+ return (_glptr_TransformFeedbackBufferRange) (GET_by_offset(disp, _gloffset_TransformFeedbackBufferRange));
+}
+
+static inline void SET_TransformFeedbackBufferRange(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_TransformFeedbackBufferRange, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_UnmapNamedBuffer)(GLuint);
+#define CALL_UnmapNamedBuffer(disp, parameters) \
+ (* GET_UnmapNamedBuffer(disp)) parameters
+static inline _glptr_UnmapNamedBuffer GET_UnmapNamedBuffer(struct _glapi_table *disp) {
+ return (_glptr_UnmapNamedBuffer) (GET_by_offset(disp, _gloffset_UnmapNamedBuffer));
+}
+
+static inline void SET_UnmapNamedBuffer(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_UnmapNamedBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayAttribBinding)(GLuint, GLuint, GLuint);
+#define CALL_VertexArrayAttribBinding(disp, parameters) \
+ (* GET_VertexArrayAttribBinding(disp)) parameters
+static inline _glptr_VertexArrayAttribBinding GET_VertexArrayAttribBinding(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayAttribBinding) (GET_by_offset(disp, _gloffset_VertexArrayAttribBinding));
+}
+
+static inline void SET_VertexArrayAttribBinding(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayAttribBinding, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayAttribFormat)(GLuint, GLuint, GLint, GLenum, GLboolean, GLuint);
+#define CALL_VertexArrayAttribFormat(disp, parameters) \
+ (* GET_VertexArrayAttribFormat(disp)) parameters
+static inline _glptr_VertexArrayAttribFormat GET_VertexArrayAttribFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayAttribFormat) (GET_by_offset(disp, _gloffset_VertexArrayAttribFormat));
+}
+
+static inline void SET_VertexArrayAttribFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLint, GLenum, GLboolean, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayAttribFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayAttribIFormat)(GLuint, GLuint, GLint, GLenum, GLuint);
+#define CALL_VertexArrayAttribIFormat(disp, parameters) \
+ (* GET_VertexArrayAttribIFormat(disp)) parameters
+static inline _glptr_VertexArrayAttribIFormat GET_VertexArrayAttribIFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayAttribIFormat) (GET_by_offset(disp, _gloffset_VertexArrayAttribIFormat));
+}
+
+static inline void SET_VertexArrayAttribIFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLint, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayAttribIFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayAttribLFormat)(GLuint, GLuint, GLint, GLenum, GLuint);
+#define CALL_VertexArrayAttribLFormat(disp, parameters) \
+ (* GET_VertexArrayAttribLFormat(disp)) parameters
+static inline _glptr_VertexArrayAttribLFormat GET_VertexArrayAttribLFormat(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayAttribLFormat) (GET_by_offset(disp, _gloffset_VertexArrayAttribLFormat));
+}
+
+static inline void SET_VertexArrayAttribLFormat(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLint, GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayAttribLFormat, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayBindingDivisor)(GLuint, GLuint, GLuint);
+#define CALL_VertexArrayBindingDivisor(disp, parameters) \
+ (* GET_VertexArrayBindingDivisor(disp)) parameters
+static inline _glptr_VertexArrayBindingDivisor GET_VertexArrayBindingDivisor(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayBindingDivisor) (GET_by_offset(disp, _gloffset_VertexArrayBindingDivisor));
+}
+
+static inline void SET_VertexArrayBindingDivisor(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayBindingDivisor, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayElementBuffer)(GLuint, GLuint);
+#define CALL_VertexArrayElementBuffer(disp, parameters) \
+ (* GET_VertexArrayElementBuffer(disp)) parameters
+static inline _glptr_VertexArrayElementBuffer GET_VertexArrayElementBuffer(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayElementBuffer) (GET_by_offset(disp, _gloffset_VertexArrayElementBuffer));
+}
+
+static inline void SET_VertexArrayElementBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexArrayElementBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayVertexBuffer)(GLuint, GLuint, GLuint, GLintptr, GLsizei);
+#define CALL_VertexArrayVertexBuffer(disp, parameters) \
+ (* GET_VertexArrayVertexBuffer(disp)) parameters
+static inline _glptr_VertexArrayVertexBuffer GET_VertexArrayVertexBuffer(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayVertexBuffer) (GET_by_offset(disp, _gloffset_VertexArrayVertexBuffer));
+}
+
+static inline void SET_VertexArrayVertexBuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLintptr, GLsizei)) {
+ SET_by_offset(disp, _gloffset_VertexArrayVertexBuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexArrayVertexBuffers)(GLuint, GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizei *);
+#define CALL_VertexArrayVertexBuffers(disp, parameters) \
+ (* GET_VertexArrayVertexBuffers(disp)) parameters
+static inline _glptr_VertexArrayVertexBuffers GET_VertexArrayVertexBuffers(struct _glapi_table *disp) {
+ return (_glptr_VertexArrayVertexBuffers) (GET_by_offset(disp, _gloffset_VertexArrayVertexBuffers));
+}
+
+static inline void SET_VertexArrayVertexBuffers(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, const GLuint *, const GLintptr *, const GLsizei *)) {
+ SET_by_offset(disp, _gloffset_VertexArrayVertexBuffers, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetCompressedTextureSubImage)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLsizei, GLvoid *);
+#define CALL_GetCompressedTextureSubImage(disp, parameters) \
+ (* GET_GetCompressedTextureSubImage(disp)) parameters
+static inline _glptr_GetCompressedTextureSubImage GET_GetCompressedTextureSubImage(struct _glapi_table *disp) {
+ return (_glptr_GetCompressedTextureSubImage) (GET_by_offset(disp, _gloffset_GetCompressedTextureSubImage));
+}
+
+static inline void SET_GetCompressedTextureSubImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetCompressedTextureSubImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTextureSubImage)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, GLsizei, GLvoid *);
+#define CALL_GetTextureSubImage(disp, parameters) \
+ (* GET_GetTextureSubImage(disp)) parameters
+static inline _glptr_GetTextureSubImage GET_GetTextureSubImage(struct _glapi_table *disp) {
+ return (_glptr_GetTextureSubImage) (GET_by_offset(disp, _gloffset_GetTextureSubImage));
+}
+
+static inline void SET_GetTextureSubImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei, GLenum, GLenum, GLsizei, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetTextureSubImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferPageCommitmentARB)(GLenum, GLintptr, GLsizeiptr, GLboolean);
+#define CALL_BufferPageCommitmentARB(disp, parameters) \
+ (* GET_BufferPageCommitmentARB(disp)) parameters
+static inline _glptr_BufferPageCommitmentARB GET_BufferPageCommitmentARB(struct _glapi_table *disp) {
+ return (_glptr_BufferPageCommitmentARB) (GET_by_offset(disp, _gloffset_BufferPageCommitmentARB));
+}
+
+static inline void SET_BufferPageCommitmentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr, GLboolean)) {
+ SET_by_offset(disp, _gloffset_BufferPageCommitmentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedBufferPageCommitmentARB)(GLuint, GLintptr, GLsizeiptr, GLboolean);
+#define CALL_NamedBufferPageCommitmentARB(disp, parameters) \
+ (* GET_NamedBufferPageCommitmentARB(disp)) parameters
+static inline _glptr_NamedBufferPageCommitmentARB GET_NamedBufferPageCommitmentARB(struct _glapi_table *disp) {
+ return (_glptr_NamedBufferPageCommitmentARB) (GET_by_offset(disp, _gloffset_NamedBufferPageCommitmentARB));
+}
+
+static inline void SET_NamedBufferPageCommitmentARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr, GLboolean)) {
+ SET_by_offset(disp, _gloffset_NamedBufferPageCommitmentARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformi64vARB)(GLuint, GLint, GLint64 *);
+#define CALL_GetUniformi64vARB(disp, parameters) \
+ (* GET_GetUniformi64vARB(disp)) parameters
+static inline _glptr_GetUniformi64vARB GET_GetUniformi64vARB(struct _glapi_table *disp) {
+ return (_glptr_GetUniformi64vARB) (GET_by_offset(disp, _gloffset_GetUniformi64vARB));
+}
+
+static inline void SET_GetUniformi64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetUniformi64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUniformui64vARB)(GLuint, GLint, GLuint64 *);
+#define CALL_GetUniformui64vARB(disp, parameters) \
+ (* GET_GetUniformui64vARB(disp)) parameters
+static inline _glptr_GetUniformui64vARB GET_GetUniformui64vARB(struct _glapi_table *disp) {
+ return (_glptr_GetUniformui64vARB) (GET_by_offset(disp, _gloffset_GetUniformui64vARB));
+}
+
+static inline void SET_GetUniformui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_GetUniformui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformi64vARB)(GLuint, GLint, GLsizei, GLint64 *);
+#define CALL_GetnUniformi64vARB(disp, parameters) \
+ (* GET_GetnUniformi64vARB(disp)) parameters
+static inline _glptr_GetnUniformi64vARB GET_GetnUniformi64vARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformi64vARB) (GET_by_offset(disp, _gloffset_GetnUniformi64vARB));
+}
+
+static inline void SET_GetnUniformi64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLint64 *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformi64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetnUniformui64vARB)(GLuint, GLint, GLsizei, GLuint64 *);
+#define CALL_GetnUniformui64vARB(disp, parameters) \
+ (* GET_GetnUniformui64vARB(disp)) parameters
+static inline _glptr_GetnUniformui64vARB GET_GetnUniformui64vARB(struct _glapi_table *disp) {
+ return (_glptr_GetnUniformui64vARB) (GET_by_offset(disp, _gloffset_GetnUniformui64vARB));
+}
+
+static inline void SET_GetnUniformui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_GetnUniformui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1i64ARB)(GLuint, GLint, GLint64);
+#define CALL_ProgramUniform1i64ARB(disp, parameters) \
+ (* GET_ProgramUniform1i64ARB(disp)) parameters
+static inline _glptr_ProgramUniform1i64ARB GET_ProgramUniform1i64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1i64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform1i64ARB));
+}
+
+static inline void SET_ProgramUniform1i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1i64vARB)(GLuint, GLint, GLsizei, const GLint64 *);
+#define CALL_ProgramUniform1i64vARB(disp, parameters) \
+ (* GET_ProgramUniform1i64vARB(disp)) parameters
+static inline _glptr_ProgramUniform1i64vARB GET_ProgramUniform1i64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1i64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform1i64vARB));
+}
+
+static inline void SET_ProgramUniform1i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1ui64ARB)(GLuint, GLint, GLuint64);
+#define CALL_ProgramUniform1ui64ARB(disp, parameters) \
+ (* GET_ProgramUniform1ui64ARB(disp)) parameters
+static inline _glptr_ProgramUniform1ui64ARB GET_ProgramUniform1ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1ui64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform1ui64ARB));
+}
+
+static inline void SET_ProgramUniform1ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1ui64vARB)(GLuint, GLint, GLsizei, const GLuint64 *);
+#define CALL_ProgramUniform1ui64vARB(disp, parameters) \
+ (* GET_ProgramUniform1ui64vARB(disp)) parameters
+static inline _glptr_ProgramUniform1ui64vARB GET_ProgramUniform1ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1ui64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform1ui64vARB));
+}
+
+static inline void SET_ProgramUniform1ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2i64ARB)(GLuint, GLint, GLint64, GLint64);
+#define CALL_ProgramUniform2i64ARB(disp, parameters) \
+ (* GET_ProgramUniform2i64ARB(disp)) parameters
+static inline _glptr_ProgramUniform2i64ARB GET_ProgramUniform2i64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2i64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform2i64ARB));
+}
+
+static inline void SET_ProgramUniform2i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2i64vARB)(GLuint, GLint, GLsizei, const GLint64 *);
+#define CALL_ProgramUniform2i64vARB(disp, parameters) \
+ (* GET_ProgramUniform2i64vARB(disp)) parameters
+static inline _glptr_ProgramUniform2i64vARB GET_ProgramUniform2i64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2i64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform2i64vARB));
+}
+
+static inline void SET_ProgramUniform2i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2ui64ARB)(GLuint, GLint, GLuint64, GLuint64);
+#define CALL_ProgramUniform2ui64ARB(disp, parameters) \
+ (* GET_ProgramUniform2ui64ARB(disp)) parameters
+static inline _glptr_ProgramUniform2ui64ARB GET_ProgramUniform2ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2ui64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform2ui64ARB));
+}
+
+static inline void SET_ProgramUniform2ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2ui64vARB)(GLuint, GLint, GLsizei, const GLuint64 *);
+#define CALL_ProgramUniform2ui64vARB(disp, parameters) \
+ (* GET_ProgramUniform2ui64vARB(disp)) parameters
+static inline _glptr_ProgramUniform2ui64vARB GET_ProgramUniform2ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2ui64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform2ui64vARB));
+}
+
+static inline void SET_ProgramUniform2ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3i64ARB)(GLuint, GLint, GLint64, GLint64, GLint64);
+#define CALL_ProgramUniform3i64ARB(disp, parameters) \
+ (* GET_ProgramUniform3i64ARB(disp)) parameters
+static inline _glptr_ProgramUniform3i64ARB GET_ProgramUniform3i64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3i64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform3i64ARB));
+}
+
+static inline void SET_ProgramUniform3i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint64, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3i64vARB)(GLuint, GLint, GLsizei, const GLint64 *);
+#define CALL_ProgramUniform3i64vARB(disp, parameters) \
+ (* GET_ProgramUniform3i64vARB(disp)) parameters
+static inline _glptr_ProgramUniform3i64vARB GET_ProgramUniform3i64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3i64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform3i64vARB));
+}
+
+static inline void SET_ProgramUniform3i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3ui64ARB)(GLuint, GLint, GLuint64, GLuint64, GLuint64);
+#define CALL_ProgramUniform3ui64ARB(disp, parameters) \
+ (* GET_ProgramUniform3ui64ARB(disp)) parameters
+static inline _glptr_ProgramUniform3ui64ARB GET_ProgramUniform3ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3ui64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform3ui64ARB));
+}
+
+static inline void SET_ProgramUniform3ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3ui64vARB)(GLuint, GLint, GLsizei, const GLuint64 *);
+#define CALL_ProgramUniform3ui64vARB(disp, parameters) \
+ (* GET_ProgramUniform3ui64vARB(disp)) parameters
+static inline _glptr_ProgramUniform3ui64vARB GET_ProgramUniform3ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3ui64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform3ui64vARB));
+}
+
+static inline void SET_ProgramUniform3ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4i64ARB)(GLuint, GLint, GLint64, GLint64, GLint64, GLint64);
+#define CALL_ProgramUniform4i64ARB(disp, parameters) \
+ (* GET_ProgramUniform4i64ARB(disp)) parameters
+static inline _glptr_ProgramUniform4i64ARB GET_ProgramUniform4i64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4i64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform4i64ARB));
+}
+
+static inline void SET_ProgramUniform4i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint64, GLint64, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4i64vARB)(GLuint, GLint, GLsizei, const GLint64 *);
+#define CALL_ProgramUniform4i64vARB(disp, parameters) \
+ (* GET_ProgramUniform4i64vARB(disp)) parameters
+static inline _glptr_ProgramUniform4i64vARB GET_ProgramUniform4i64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4i64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform4i64vARB));
+}
+
+static inline void SET_ProgramUniform4i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4ui64ARB)(GLuint, GLint, GLuint64, GLuint64, GLuint64, GLuint64);
+#define CALL_ProgramUniform4ui64ARB(disp, parameters) \
+ (* GET_ProgramUniform4ui64ARB(disp)) parameters
+static inline _glptr_ProgramUniform4ui64ARB GET_ProgramUniform4ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4ui64ARB) (GET_by_offset(disp, _gloffset_ProgramUniform4ui64ARB));
+}
+
+static inline void SET_ProgramUniform4ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint64, GLuint64, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4ui64vARB)(GLuint, GLint, GLsizei, const GLuint64 *);
+#define CALL_ProgramUniform4ui64vARB(disp, parameters) \
+ (* GET_ProgramUniform4ui64vARB(disp)) parameters
+static inline _glptr_ProgramUniform4ui64vARB GET_ProgramUniform4ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4ui64vARB) (GET_by_offset(disp, _gloffset_ProgramUniform4ui64vARB));
+}
+
+static inline void SET_ProgramUniform4ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1i64ARB)(GLint, GLint64);
+#define CALL_Uniform1i64ARB(disp, parameters) \
+ (* GET_Uniform1i64ARB(disp)) parameters
+static inline _glptr_Uniform1i64ARB GET_Uniform1i64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform1i64ARB) (GET_by_offset(disp, _gloffset_Uniform1i64ARB));
+}
+
+static inline void SET_Uniform1i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint64)) {
+ SET_by_offset(disp, _gloffset_Uniform1i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1i64vARB)(GLint, GLsizei, const GLint64 *);
+#define CALL_Uniform1i64vARB(disp, parameters) \
+ (* GET_Uniform1i64vARB(disp)) parameters
+static inline _glptr_Uniform1i64vARB GET_Uniform1i64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform1i64vARB) (GET_by_offset(disp, _gloffset_Uniform1i64vARB));
+}
+
+static inline void SET_Uniform1i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform1i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1ui64ARB)(GLint, GLuint64);
+#define CALL_Uniform1ui64ARB(disp, parameters) \
+ (* GET_Uniform1ui64ARB(disp)) parameters
+static inline _glptr_Uniform1ui64ARB GET_Uniform1ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform1ui64ARB) (GET_by_offset(disp, _gloffset_Uniform1ui64ARB));
+}
+
+static inline void SET_Uniform1ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_Uniform1ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform1ui64vARB)(GLint, GLsizei, const GLuint64 *);
+#define CALL_Uniform1ui64vARB(disp, parameters) \
+ (* GET_Uniform1ui64vARB(disp)) parameters
+static inline _glptr_Uniform1ui64vARB GET_Uniform1ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform1ui64vARB) (GET_by_offset(disp, _gloffset_Uniform1ui64vARB));
+}
+
+static inline void SET_Uniform1ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform1ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2i64ARB)(GLint, GLint64, GLint64);
+#define CALL_Uniform2i64ARB(disp, parameters) \
+ (* GET_Uniform2i64ARB(disp)) parameters
+static inline _glptr_Uniform2i64ARB GET_Uniform2i64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform2i64ARB) (GET_by_offset(disp, _gloffset_Uniform2i64ARB));
+}
+
+static inline void SET_Uniform2i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_Uniform2i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2i64vARB)(GLint, GLsizei, const GLint64 *);
+#define CALL_Uniform2i64vARB(disp, parameters) \
+ (* GET_Uniform2i64vARB(disp)) parameters
+static inline _glptr_Uniform2i64vARB GET_Uniform2i64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform2i64vARB) (GET_by_offset(disp, _gloffset_Uniform2i64vARB));
+}
+
+static inline void SET_Uniform2i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform2i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2ui64ARB)(GLint, GLuint64, GLuint64);
+#define CALL_Uniform2ui64ARB(disp, parameters) \
+ (* GET_Uniform2ui64ARB(disp)) parameters
+static inline _glptr_Uniform2ui64ARB GET_Uniform2ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform2ui64ARB) (GET_by_offset(disp, _gloffset_Uniform2ui64ARB));
+}
+
+static inline void SET_Uniform2ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_Uniform2ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform2ui64vARB)(GLint, GLsizei, const GLuint64 *);
+#define CALL_Uniform2ui64vARB(disp, parameters) \
+ (* GET_Uniform2ui64vARB(disp)) parameters
+static inline _glptr_Uniform2ui64vARB GET_Uniform2ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform2ui64vARB) (GET_by_offset(disp, _gloffset_Uniform2ui64vARB));
+}
+
+static inline void SET_Uniform2ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform2ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3i64ARB)(GLint, GLint64, GLint64, GLint64);
+#define CALL_Uniform3i64ARB(disp, parameters) \
+ (* GET_Uniform3i64ARB(disp)) parameters
+static inline _glptr_Uniform3i64ARB GET_Uniform3i64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform3i64ARB) (GET_by_offset(disp, _gloffset_Uniform3i64ARB));
+}
+
+static inline void SET_Uniform3i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint64, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_Uniform3i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3i64vARB)(GLint, GLsizei, const GLint64 *);
+#define CALL_Uniform3i64vARB(disp, parameters) \
+ (* GET_Uniform3i64vARB(disp)) parameters
+static inline _glptr_Uniform3i64vARB GET_Uniform3i64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform3i64vARB) (GET_by_offset(disp, _gloffset_Uniform3i64vARB));
+}
+
+static inline void SET_Uniform3i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform3i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3ui64ARB)(GLint, GLuint64, GLuint64, GLuint64);
+#define CALL_Uniform3ui64ARB(disp, parameters) \
+ (* GET_Uniform3ui64ARB(disp)) parameters
+static inline _glptr_Uniform3ui64ARB GET_Uniform3ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform3ui64ARB) (GET_by_offset(disp, _gloffset_Uniform3ui64ARB));
+}
+
+static inline void SET_Uniform3ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint64, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_Uniform3ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform3ui64vARB)(GLint, GLsizei, const GLuint64 *);
+#define CALL_Uniform3ui64vARB(disp, parameters) \
+ (* GET_Uniform3ui64vARB(disp)) parameters
+static inline _glptr_Uniform3ui64vARB GET_Uniform3ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform3ui64vARB) (GET_by_offset(disp, _gloffset_Uniform3ui64vARB));
+}
+
+static inline void SET_Uniform3ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform3ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4i64ARB)(GLint, GLint64, GLint64, GLint64, GLint64);
+#define CALL_Uniform4i64ARB(disp, parameters) \
+ (* GET_Uniform4i64ARB(disp)) parameters
+static inline _glptr_Uniform4i64ARB GET_Uniform4i64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform4i64ARB) (GET_by_offset(disp, _gloffset_Uniform4i64ARB));
+}
+
+static inline void SET_Uniform4i64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint64, GLint64, GLint64, GLint64)) {
+ SET_by_offset(disp, _gloffset_Uniform4i64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4i64vARB)(GLint, GLsizei, const GLint64 *);
+#define CALL_Uniform4i64vARB(disp, parameters) \
+ (* GET_Uniform4i64vARB(disp)) parameters
+static inline _glptr_Uniform4i64vARB GET_Uniform4i64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform4i64vARB) (GET_by_offset(disp, _gloffset_Uniform4i64vARB));
+}
+
+static inline void SET_Uniform4i64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform4i64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4ui64ARB)(GLint, GLuint64, GLuint64, GLuint64, GLuint64);
+#define CALL_Uniform4ui64ARB(disp, parameters) \
+ (* GET_Uniform4ui64ARB(disp)) parameters
+static inline _glptr_Uniform4ui64ARB GET_Uniform4ui64ARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform4ui64ARB) (GET_by_offset(disp, _gloffset_Uniform4ui64ARB));
+}
+
+static inline void SET_Uniform4ui64ARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLuint64, GLuint64, GLuint64, GLuint64)) {
+ SET_by_offset(disp, _gloffset_Uniform4ui64ARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Uniform4ui64vARB)(GLint, GLsizei, const GLuint64 *);
+#define CALL_Uniform4ui64vARB(disp, parameters) \
+ (* GET_Uniform4ui64vARB(disp)) parameters
+static inline _glptr_Uniform4ui64vARB GET_Uniform4ui64vARB(struct _glapi_table *disp) {
+ return (_glptr_Uniform4ui64vARB) (GET_by_offset(disp, _gloffset_Uniform4ui64vARB));
+}
+
+static inline void SET_Uniform4ui64vARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_Uniform4ui64vARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SpecializeShaderARB)(GLuint, const GLchar *, GLuint, const GLuint *, const GLuint *);
+#define CALL_SpecializeShaderARB(disp, parameters) \
+ (* GET_SpecializeShaderARB(disp)) parameters
+static inline _glptr_SpecializeShaderARB GET_SpecializeShaderARB(struct _glapi_table *disp) {
+ return (_glptr_SpecializeShaderARB) (GET_by_offset(disp, _gloffset_SpecializeShaderARB));
+}
+
+static inline void SET_SpecializeShaderARB(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLchar *, GLuint, const GLuint *, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_SpecializeShaderARB, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateBufferData)(GLuint);
+#define CALL_InvalidateBufferData(disp, parameters) \
+ (* GET_InvalidateBufferData(disp)) parameters
+static inline _glptr_InvalidateBufferData GET_InvalidateBufferData(struct _glapi_table *disp) {
+ return (_glptr_InvalidateBufferData) (GET_by_offset(disp, _gloffset_InvalidateBufferData));
+}
+
+static inline void SET_InvalidateBufferData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_InvalidateBufferData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateBufferSubData)(GLuint, GLintptr, GLsizeiptr);
+#define CALL_InvalidateBufferSubData(disp, parameters) \
+ (* GET_InvalidateBufferSubData(disp)) parameters
+static inline _glptr_InvalidateBufferSubData GET_InvalidateBufferSubData(struct _glapi_table *disp) {
+ return (_glptr_InvalidateBufferSubData) (GET_by_offset(disp, _gloffset_InvalidateBufferSubData));
+}
+
+static inline void SET_InvalidateBufferSubData(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_InvalidateBufferSubData, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateFramebuffer)(GLenum, GLsizei, const GLenum *);
+#define CALL_InvalidateFramebuffer(disp, parameters) \
+ (* GET_InvalidateFramebuffer(disp)) parameters
+static inline _glptr_InvalidateFramebuffer GET_InvalidateFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_InvalidateFramebuffer) (GET_by_offset(disp, _gloffset_InvalidateFramebuffer));
+}
+
+static inline void SET_InvalidateFramebuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_InvalidateFramebuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateSubFramebuffer)(GLenum, GLsizei, const GLenum *, GLint, GLint, GLsizei, GLsizei);
+#define CALL_InvalidateSubFramebuffer(disp, parameters) \
+ (* GET_InvalidateSubFramebuffer(disp)) parameters
+static inline _glptr_InvalidateSubFramebuffer GET_InvalidateSubFramebuffer(struct _glapi_table *disp) {
+ return (_glptr_InvalidateSubFramebuffer) (GET_by_offset(disp, _gloffset_InvalidateSubFramebuffer));
+}
+
+static inline void SET_InvalidateSubFramebuffer(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLenum *, GLint, GLint, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_InvalidateSubFramebuffer, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateTexImage)(GLuint, GLint);
+#define CALL_InvalidateTexImage(disp, parameters) \
+ (* GET_InvalidateTexImage(disp)) parameters
+static inline _glptr_InvalidateTexImage GET_InvalidateTexImage(struct _glapi_table *disp) {
+ return (_glptr_InvalidateTexImage) (GET_by_offset(disp, _gloffset_InvalidateTexImage));
+}
+
+static inline void SET_InvalidateTexImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_InvalidateTexImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_InvalidateTexSubImage)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei);
+#define CALL_InvalidateTexSubImage(disp, parameters) \
+ (* GET_InvalidateTexSubImage(disp)) parameters
+static inline _glptr_InvalidateTexSubImage GET_InvalidateTexSubImage(struct _glapi_table *disp) {
+ return (_glptr_InvalidateTexSubImage) (GET_by_offset(disp, _gloffset_InvalidateTexSubImage));
+}
+
+static inline void SET_InvalidateTexSubImage(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLsizei, GLsizei, GLsizei)) {
+ SET_by_offset(disp, _gloffset_InvalidateTexSubImage, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonOffsetEXT)(GLfloat, GLfloat);
+#define CALL_PolygonOffsetEXT(disp, parameters) \
+ (* GET_PolygonOffsetEXT(disp)) parameters
+static inline _glptr_PolygonOffsetEXT GET_PolygonOffsetEXT(struct _glapi_table *disp) {
+ return (_glptr_PolygonOffsetEXT) (GET_by_offset(disp, _gloffset_PolygonOffsetEXT));
+}
+
+static inline void SET_PolygonOffsetEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PolygonOffsetEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexfOES)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_DrawTexfOES(disp, parameters) \
+ (* GET_DrawTexfOES(disp)) parameters
+static inline _glptr_DrawTexfOES GET_DrawTexfOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexfOES) (GET_by_offset(disp, _gloffset_DrawTexfOES));
+}
+
+static inline void SET_DrawTexfOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_DrawTexfOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexfvOES)(const GLfloat *);
+#define CALL_DrawTexfvOES(disp, parameters) \
+ (* GET_DrawTexfvOES(disp)) parameters
+static inline _glptr_DrawTexfvOES GET_DrawTexfvOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexfvOES) (GET_by_offset(disp, _gloffset_DrawTexfvOES));
+}
+
+static inline void SET_DrawTexfvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_DrawTexfvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexiOES)(GLint, GLint, GLint, GLint, GLint);
+#define CALL_DrawTexiOES(disp, parameters) \
+ (* GET_DrawTexiOES(disp)) parameters
+static inline _glptr_DrawTexiOES GET_DrawTexiOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexiOES) (GET_by_offset(disp, _gloffset_DrawTexiOES));
+}
+
+static inline void SET_DrawTexiOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_DrawTexiOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexivOES)(const GLint *);
+#define CALL_DrawTexivOES(disp, parameters) \
+ (* GET_DrawTexivOES(disp)) parameters
+static inline _glptr_DrawTexivOES GET_DrawTexivOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexivOES) (GET_by_offset(disp, _gloffset_DrawTexivOES));
+}
+
+static inline void SET_DrawTexivOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_DrawTexivOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexsOES)(GLshort, GLshort, GLshort, GLshort, GLshort);
+#define CALL_DrawTexsOES(disp, parameters) \
+ (* GET_DrawTexsOES(disp)) parameters
+static inline _glptr_DrawTexsOES GET_DrawTexsOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexsOES) (GET_by_offset(disp, _gloffset_DrawTexsOES));
+}
+
+static inline void SET_DrawTexsOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_DrawTexsOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexsvOES)(const GLshort *);
+#define CALL_DrawTexsvOES(disp, parameters) \
+ (* GET_DrawTexsvOES(disp)) parameters
+static inline _glptr_DrawTexsvOES GET_DrawTexsvOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexsvOES) (GET_by_offset(disp, _gloffset_DrawTexsvOES));
+}
+
+static inline void SET_DrawTexsvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_DrawTexsvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexxOES)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_DrawTexxOES(disp, parameters) \
+ (* GET_DrawTexxOES(disp)) parameters
+static inline _glptr_DrawTexxOES GET_DrawTexxOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexxOES) (GET_by_offset(disp, _gloffset_DrawTexxOES));
+}
+
+static inline void SET_DrawTexxOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_DrawTexxOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DrawTexxvOES)(const GLfixed *);
+#define CALL_DrawTexxvOES(disp, parameters) \
+ (* GET_DrawTexxvOES(disp)) parameters
+static inline _glptr_DrawTexxvOES GET_DrawTexxvOES(struct _glapi_table *disp) {
+ return (_glptr_DrawTexxvOES) (GET_by_offset(disp, _gloffset_DrawTexxvOES));
+}
+
+static inline void SET_DrawTexxvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_DrawTexxvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointSizePointerOES)(GLenum, GLsizei, const GLvoid *);
+#define CALL_PointSizePointerOES(disp, parameters) \
+ (* GET_PointSizePointerOES(disp)) parameters
+static inline _glptr_PointSizePointerOES GET_PointSizePointerOES(struct _glapi_table *disp) {
+ return (_glptr_PointSizePointerOES) (GET_by_offset(disp, _gloffset_PointSizePointerOES));
+}
+
+static inline void SET_PointSizePointerOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_PointSizePointerOES, fn);
+}
+
+typedef GLbitfield (GLAPIENTRYP _glptr_QueryMatrixxOES)(GLfixed *, GLint *);
+#define CALL_QueryMatrixxOES(disp, parameters) \
+ (* GET_QueryMatrixxOES(disp)) parameters
+static inline _glptr_QueryMatrixxOES GET_QueryMatrixxOES(struct _glapi_table *disp) {
+ return (_glptr_QueryMatrixxOES) (GET_by_offset(disp, _gloffset_QueryMatrixxOES));
+}
+
+static inline void SET_QueryMatrixxOES(struct _glapi_table *disp, GLbitfield (GLAPIENTRYP fn)(GLfixed *, GLint *)) {
+ SET_by_offset(disp, _gloffset_QueryMatrixxOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SampleMaskSGIS)(GLclampf, GLboolean);
+#define CALL_SampleMaskSGIS(disp, parameters) \
+ (* GET_SampleMaskSGIS(disp)) parameters
+static inline _glptr_SampleMaskSGIS GET_SampleMaskSGIS(struct _glapi_table *disp) {
+ return (_glptr_SampleMaskSGIS) (GET_by_offset(disp, _gloffset_SampleMaskSGIS));
+}
+
+static inline void SET_SampleMaskSGIS(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampf, GLboolean)) {
+ SET_by_offset(disp, _gloffset_SampleMaskSGIS, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SamplePatternSGIS)(GLenum);
+#define CALL_SamplePatternSGIS(disp, parameters) \
+ (* GET_SamplePatternSGIS(disp)) parameters
+static inline _glptr_SamplePatternSGIS GET_SamplePatternSGIS(struct _glapi_table *disp) {
+ return (_glptr_SamplePatternSGIS) (GET_by_offset(disp, _gloffset_SamplePatternSGIS));
+}
+
+static inline void SET_SamplePatternSGIS(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_SamplePatternSGIS, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorPointerEXT)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+#define CALL_ColorPointerEXT(disp, parameters) \
+ (* GET_ColorPointerEXT(disp)) parameters
+static inline _glptr_ColorPointerEXT GET_ColorPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_ColorPointerEXT) (GET_by_offset(disp, _gloffset_ColorPointerEXT));
+}
+
+static inline void SET_ColorPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_ColorPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EdgeFlagPointerEXT)(GLsizei, GLsizei, const GLboolean *);
+#define CALL_EdgeFlagPointerEXT(disp, parameters) \
+ (* GET_EdgeFlagPointerEXT(disp)) parameters
+static inline _glptr_EdgeFlagPointerEXT GET_EdgeFlagPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_EdgeFlagPointerEXT) (GET_by_offset(disp, _gloffset_EdgeFlagPointerEXT));
+}
+
+static inline void SET_EdgeFlagPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLsizei, const GLboolean *)) {
+ SET_by_offset(disp, _gloffset_EdgeFlagPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_IndexPointerEXT)(GLenum, GLsizei, GLsizei, const GLvoid *);
+#define CALL_IndexPointerEXT(disp, parameters) \
+ (* GET_IndexPointerEXT(disp)) parameters
+static inline _glptr_IndexPointerEXT GET_IndexPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_IndexPointerEXT) (GET_by_offset(disp, _gloffset_IndexPointerEXT));
+}
+
+static inline void SET_IndexPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_IndexPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NormalPointerEXT)(GLenum, GLsizei, GLsizei, const GLvoid *);
+#define CALL_NormalPointerEXT(disp, parameters) \
+ (* GET_NormalPointerEXT(disp)) parameters
+static inline _glptr_NormalPointerEXT GET_NormalPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_NormalPointerEXT) (GET_by_offset(disp, _gloffset_NormalPointerEXT));
+}
+
+static inline void SET_NormalPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_NormalPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexCoordPointerEXT)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+#define CALL_TexCoordPointerEXT(disp, parameters) \
+ (* GET_TexCoordPointerEXT(disp)) parameters
+static inline _glptr_TexCoordPointerEXT GET_TexCoordPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_TexCoordPointerEXT) (GET_by_offset(disp, _gloffset_TexCoordPointerEXT));
+}
+
+static inline void SET_TexCoordPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_TexCoordPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexPointerEXT)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *);
+#define CALL_VertexPointerEXT(disp, parameters) \
+ (* GET_VertexPointerEXT(disp)) parameters
+static inline _glptr_VertexPointerEXT GET_VertexPointerEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexPointerEXT) (GET_by_offset(disp, _gloffset_VertexPointerEXT));
+}
+
+static inline void SET_VertexPointerEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLenum, GLsizei, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexPointerEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DiscardFramebufferEXT)(GLenum, GLsizei, const GLenum *);
+#define CALL_DiscardFramebufferEXT(disp, parameters) \
+ (* GET_DiscardFramebufferEXT(disp)) parameters
+static inline _glptr_DiscardFramebufferEXT GET_DiscardFramebufferEXT(struct _glapi_table *disp) {
+ return (_glptr_DiscardFramebufferEXT) (GET_by_offset(disp, _gloffset_DiscardFramebufferEXT));
+}
+
+static inline void SET_DiscardFramebufferEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_DiscardFramebufferEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ActiveShaderProgram)(GLuint, GLuint);
+#define CALL_ActiveShaderProgram(disp, parameters) \
+ (* GET_ActiveShaderProgram(disp)) parameters
+static inline _glptr_ActiveShaderProgram GET_ActiveShaderProgram(struct _glapi_table *disp) {
+ return (_glptr_ActiveShaderProgram) (GET_by_offset(disp, _gloffset_ActiveShaderProgram));
+}
+
+static inline void SET_ActiveShaderProgram(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ActiveShaderProgram, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindProgramPipeline)(GLuint);
+#define CALL_BindProgramPipeline(disp, parameters) \
+ (* GET_BindProgramPipeline(disp)) parameters
+static inline _glptr_BindProgramPipeline GET_BindProgramPipeline(struct _glapi_table *disp) {
+ return (_glptr_BindProgramPipeline) (GET_by_offset(disp, _gloffset_BindProgramPipeline));
+}
+
+static inline void SET_BindProgramPipeline(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_BindProgramPipeline, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_CreateShaderProgramv)(GLenum, GLsizei, const GLchar * const *);
+#define CALL_CreateShaderProgramv(disp, parameters) \
+ (* GET_CreateShaderProgramv(disp)) parameters
+static inline _glptr_CreateShaderProgramv GET_CreateShaderProgramv(struct _glapi_table *disp) {
+ return (_glptr_CreateShaderProgramv) (GET_by_offset(disp, _gloffset_CreateShaderProgramv));
+}
+
+static inline void SET_CreateShaderProgramv(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLenum, GLsizei, const GLchar * const *)) {
+ SET_by_offset(disp, _gloffset_CreateShaderProgramv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteProgramPipelines)(GLsizei, const GLuint *);
+#define CALL_DeleteProgramPipelines(disp, parameters) \
+ (* GET_DeleteProgramPipelines(disp)) parameters
+static inline _glptr_DeleteProgramPipelines GET_DeleteProgramPipelines(struct _glapi_table *disp) {
+ return (_glptr_DeleteProgramPipelines) (GET_by_offset(disp, _gloffset_DeleteProgramPipelines));
+}
+
+static inline void SET_DeleteProgramPipelines(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteProgramPipelines, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenProgramPipelines)(GLsizei, GLuint *);
+#define CALL_GenProgramPipelines(disp, parameters) \
+ (* GET_GenProgramPipelines(disp)) parameters
+static inline _glptr_GenProgramPipelines GET_GenProgramPipelines(struct _glapi_table *disp) {
+ return (_glptr_GenProgramPipelines) (GET_by_offset(disp, _gloffset_GenProgramPipelines));
+}
+
+static inline void SET_GenProgramPipelines(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenProgramPipelines, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramPipelineInfoLog)(GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetProgramPipelineInfoLog(disp, parameters) \
+ (* GET_GetProgramPipelineInfoLog(disp)) parameters
+static inline _glptr_GetProgramPipelineInfoLog GET_GetProgramPipelineInfoLog(struct _glapi_table *disp) {
+ return (_glptr_GetProgramPipelineInfoLog) (GET_by_offset(disp, _gloffset_GetProgramPipelineInfoLog));
+}
+
+static inline void SET_GetProgramPipelineInfoLog(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetProgramPipelineInfoLog, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramPipelineiv)(GLuint, GLenum, GLint *);
+#define CALL_GetProgramPipelineiv(disp, parameters) \
+ (* GET_GetProgramPipelineiv(disp)) parameters
+static inline _glptr_GetProgramPipelineiv GET_GetProgramPipelineiv(struct _glapi_table *disp) {
+ return (_glptr_GetProgramPipelineiv) (GET_by_offset(disp, _gloffset_GetProgramPipelineiv));
+}
+
+static inline void SET_GetProgramPipelineiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramPipelineiv, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsProgramPipeline)(GLuint);
+#define CALL_IsProgramPipeline(disp, parameters) \
+ (* GET_IsProgramPipeline(disp)) parameters
+static inline _glptr_IsProgramPipeline GET_IsProgramPipeline(struct _glapi_table *disp) {
+ return (_glptr_IsProgramPipeline) (GET_by_offset(disp, _gloffset_IsProgramPipeline));
+}
+
+static inline void SET_IsProgramPipeline(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsProgramPipeline, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LockArraysEXT)(GLint, GLsizei);
+#define CALL_LockArraysEXT(disp, parameters) \
+ (* GET_LockArraysEXT(disp)) parameters
+static inline _glptr_LockArraysEXT GET_LockArraysEXT(struct _glapi_table *disp) {
+ return (_glptr_LockArraysEXT) (GET_by_offset(disp, _gloffset_LockArraysEXT));
+}
+
+static inline void SET_LockArraysEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLsizei)) {
+ SET_by_offset(disp, _gloffset_LockArraysEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1d)(GLuint, GLint, GLdouble);
+#define CALL_ProgramUniform1d(disp, parameters) \
+ (* GET_ProgramUniform1d(disp)) parameters
+static inline _glptr_ProgramUniform1d GET_ProgramUniform1d(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1d) (GET_by_offset(disp, _gloffset_ProgramUniform1d));
+}
+
+static inline void SET_ProgramUniform1d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1dv)(GLuint, GLint, GLsizei, const GLdouble *);
+#define CALL_ProgramUniform1dv(disp, parameters) \
+ (* GET_ProgramUniform1dv(disp)) parameters
+static inline _glptr_ProgramUniform1dv GET_ProgramUniform1dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1dv) (GET_by_offset(disp, _gloffset_ProgramUniform1dv));
+}
+
+static inline void SET_ProgramUniform1dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1f)(GLuint, GLint, GLfloat);
+#define CALL_ProgramUniform1f(disp, parameters) \
+ (* GET_ProgramUniform1f(disp)) parameters
+static inline _glptr_ProgramUniform1f GET_ProgramUniform1f(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1f) (GET_by_offset(disp, _gloffset_ProgramUniform1f));
+}
+
+static inline void SET_ProgramUniform1f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1fv)(GLuint, GLint, GLsizei, const GLfloat *);
+#define CALL_ProgramUniform1fv(disp, parameters) \
+ (* GET_ProgramUniform1fv(disp)) parameters
+static inline _glptr_ProgramUniform1fv GET_ProgramUniform1fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1fv) (GET_by_offset(disp, _gloffset_ProgramUniform1fv));
+}
+
+static inline void SET_ProgramUniform1fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1i)(GLuint, GLint, GLint);
+#define CALL_ProgramUniform1i(disp, parameters) \
+ (* GET_ProgramUniform1i(disp)) parameters
+static inline _glptr_ProgramUniform1i GET_ProgramUniform1i(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1i) (GET_by_offset(disp, _gloffset_ProgramUniform1i));
+}
+
+static inline void SET_ProgramUniform1i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1iv)(GLuint, GLint, GLsizei, const GLint *);
+#define CALL_ProgramUniform1iv(disp, parameters) \
+ (* GET_ProgramUniform1iv(disp)) parameters
+static inline _glptr_ProgramUniform1iv GET_ProgramUniform1iv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1iv) (GET_by_offset(disp, _gloffset_ProgramUniform1iv));
+}
+
+static inline void SET_ProgramUniform1iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1ui)(GLuint, GLint, GLuint);
+#define CALL_ProgramUniform1ui(disp, parameters) \
+ (* GET_ProgramUniform1ui(disp)) parameters
+static inline _glptr_ProgramUniform1ui GET_ProgramUniform1ui(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1ui) (GET_by_offset(disp, _gloffset_ProgramUniform1ui));
+}
+
+static inline void SET_ProgramUniform1ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform1uiv)(GLuint, GLint, GLsizei, const GLuint *);
+#define CALL_ProgramUniform1uiv(disp, parameters) \
+ (* GET_ProgramUniform1uiv(disp)) parameters
+static inline _glptr_ProgramUniform1uiv GET_ProgramUniform1uiv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform1uiv) (GET_by_offset(disp, _gloffset_ProgramUniform1uiv));
+}
+
+static inline void SET_ProgramUniform1uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform1uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2d)(GLuint, GLint, GLdouble, GLdouble);
+#define CALL_ProgramUniform2d(disp, parameters) \
+ (* GET_ProgramUniform2d(disp)) parameters
+static inline _glptr_ProgramUniform2d GET_ProgramUniform2d(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2d) (GET_by_offset(disp, _gloffset_ProgramUniform2d));
+}
+
+static inline void SET_ProgramUniform2d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2dv)(GLuint, GLint, GLsizei, const GLdouble *);
+#define CALL_ProgramUniform2dv(disp, parameters) \
+ (* GET_ProgramUniform2dv(disp)) parameters
+static inline _glptr_ProgramUniform2dv GET_ProgramUniform2dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2dv) (GET_by_offset(disp, _gloffset_ProgramUniform2dv));
+}
+
+static inline void SET_ProgramUniform2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2f)(GLuint, GLint, GLfloat, GLfloat);
+#define CALL_ProgramUniform2f(disp, parameters) \
+ (* GET_ProgramUniform2f(disp)) parameters
+static inline _glptr_ProgramUniform2f GET_ProgramUniform2f(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2f) (GET_by_offset(disp, _gloffset_ProgramUniform2f));
+}
+
+static inline void SET_ProgramUniform2f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2fv)(GLuint, GLint, GLsizei, const GLfloat *);
+#define CALL_ProgramUniform2fv(disp, parameters) \
+ (* GET_ProgramUniform2fv(disp)) parameters
+static inline _glptr_ProgramUniform2fv GET_ProgramUniform2fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2fv) (GET_by_offset(disp, _gloffset_ProgramUniform2fv));
+}
+
+static inline void SET_ProgramUniform2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2i)(GLuint, GLint, GLint, GLint);
+#define CALL_ProgramUniform2i(disp, parameters) \
+ (* GET_ProgramUniform2i(disp)) parameters
+static inline _glptr_ProgramUniform2i GET_ProgramUniform2i(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2i) (GET_by_offset(disp, _gloffset_ProgramUniform2i));
+}
+
+static inline void SET_ProgramUniform2i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2iv)(GLuint, GLint, GLsizei, const GLint *);
+#define CALL_ProgramUniform2iv(disp, parameters) \
+ (* GET_ProgramUniform2iv(disp)) parameters
+static inline _glptr_ProgramUniform2iv GET_ProgramUniform2iv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2iv) (GET_by_offset(disp, _gloffset_ProgramUniform2iv));
+}
+
+static inline void SET_ProgramUniform2iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2ui)(GLuint, GLint, GLuint, GLuint);
+#define CALL_ProgramUniform2ui(disp, parameters) \
+ (* GET_ProgramUniform2ui(disp)) parameters
+static inline _glptr_ProgramUniform2ui GET_ProgramUniform2ui(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2ui) (GET_by_offset(disp, _gloffset_ProgramUniform2ui));
+}
+
+static inline void SET_ProgramUniform2ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform2uiv)(GLuint, GLint, GLsizei, const GLuint *);
+#define CALL_ProgramUniform2uiv(disp, parameters) \
+ (* GET_ProgramUniform2uiv(disp)) parameters
+static inline _glptr_ProgramUniform2uiv GET_ProgramUniform2uiv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform2uiv) (GET_by_offset(disp, _gloffset_ProgramUniform2uiv));
+}
+
+static inline void SET_ProgramUniform2uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform2uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3d)(GLuint, GLint, GLdouble, GLdouble, GLdouble);
+#define CALL_ProgramUniform3d(disp, parameters) \
+ (* GET_ProgramUniform3d(disp)) parameters
+static inline _glptr_ProgramUniform3d GET_ProgramUniform3d(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3d) (GET_by_offset(disp, _gloffset_ProgramUniform3d));
+}
+
+static inline void SET_ProgramUniform3d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3dv)(GLuint, GLint, GLsizei, const GLdouble *);
+#define CALL_ProgramUniform3dv(disp, parameters) \
+ (* GET_ProgramUniform3dv(disp)) parameters
+static inline _glptr_ProgramUniform3dv GET_ProgramUniform3dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3dv) (GET_by_offset(disp, _gloffset_ProgramUniform3dv));
+}
+
+static inline void SET_ProgramUniform3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3f)(GLuint, GLint, GLfloat, GLfloat, GLfloat);
+#define CALL_ProgramUniform3f(disp, parameters) \
+ (* GET_ProgramUniform3f(disp)) parameters
+static inline _glptr_ProgramUniform3f GET_ProgramUniform3f(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3f) (GET_by_offset(disp, _gloffset_ProgramUniform3f));
+}
+
+static inline void SET_ProgramUniform3f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3fv)(GLuint, GLint, GLsizei, const GLfloat *);
+#define CALL_ProgramUniform3fv(disp, parameters) \
+ (* GET_ProgramUniform3fv(disp)) parameters
+static inline _glptr_ProgramUniform3fv GET_ProgramUniform3fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3fv) (GET_by_offset(disp, _gloffset_ProgramUniform3fv));
+}
+
+static inline void SET_ProgramUniform3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3i)(GLuint, GLint, GLint, GLint, GLint);
+#define CALL_ProgramUniform3i(disp, parameters) \
+ (* GET_ProgramUniform3i(disp)) parameters
+static inline _glptr_ProgramUniform3i GET_ProgramUniform3i(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3i) (GET_by_offset(disp, _gloffset_ProgramUniform3i));
+}
+
+static inline void SET_ProgramUniform3i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3iv)(GLuint, GLint, GLsizei, const GLint *);
+#define CALL_ProgramUniform3iv(disp, parameters) \
+ (* GET_ProgramUniform3iv(disp)) parameters
+static inline _glptr_ProgramUniform3iv GET_ProgramUniform3iv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3iv) (GET_by_offset(disp, _gloffset_ProgramUniform3iv));
+}
+
+static inline void SET_ProgramUniform3iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3ui)(GLuint, GLint, GLuint, GLuint, GLuint);
+#define CALL_ProgramUniform3ui(disp, parameters) \
+ (* GET_ProgramUniform3ui(disp)) parameters
+static inline _glptr_ProgramUniform3ui GET_ProgramUniform3ui(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3ui) (GET_by_offset(disp, _gloffset_ProgramUniform3ui));
+}
+
+static inline void SET_ProgramUniform3ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform3uiv)(GLuint, GLint, GLsizei, const GLuint *);
+#define CALL_ProgramUniform3uiv(disp, parameters) \
+ (* GET_ProgramUniform3uiv(disp)) parameters
+static inline _glptr_ProgramUniform3uiv GET_ProgramUniform3uiv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform3uiv) (GET_by_offset(disp, _gloffset_ProgramUniform3uiv));
+}
+
+static inline void SET_ProgramUniform3uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform3uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4d)(GLuint, GLint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_ProgramUniform4d(disp, parameters) \
+ (* GET_ProgramUniform4d(disp)) parameters
+static inline _glptr_ProgramUniform4d GET_ProgramUniform4d(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4d) (GET_by_offset(disp, _gloffset_ProgramUniform4d));
+}
+
+static inline void SET_ProgramUniform4d(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4d, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4dv)(GLuint, GLint, GLsizei, const GLdouble *);
+#define CALL_ProgramUniform4dv(disp, parameters) \
+ (* GET_ProgramUniform4dv(disp)) parameters
+static inline _glptr_ProgramUniform4dv GET_ProgramUniform4dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4dv) (GET_by_offset(disp, _gloffset_ProgramUniform4dv));
+}
+
+static inline void SET_ProgramUniform4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4f)(GLuint, GLint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ProgramUniform4f(disp, parameters) \
+ (* GET_ProgramUniform4f(disp)) parameters
+static inline _glptr_ProgramUniform4f GET_ProgramUniform4f(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4f) (GET_by_offset(disp, _gloffset_ProgramUniform4f));
+}
+
+static inline void SET_ProgramUniform4f(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4f, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4fv)(GLuint, GLint, GLsizei, const GLfloat *);
+#define CALL_ProgramUniform4fv(disp, parameters) \
+ (* GET_ProgramUniform4fv(disp)) parameters
+static inline _glptr_ProgramUniform4fv GET_ProgramUniform4fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4fv) (GET_by_offset(disp, _gloffset_ProgramUniform4fv));
+}
+
+static inline void SET_ProgramUniform4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4i)(GLuint, GLint, GLint, GLint, GLint, GLint);
+#define CALL_ProgramUniform4i(disp, parameters) \
+ (* GET_ProgramUniform4i(disp)) parameters
+static inline _glptr_ProgramUniform4i GET_ProgramUniform4i(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4i) (GET_by_offset(disp, _gloffset_ProgramUniform4i));
+}
+
+static inline void SET_ProgramUniform4i(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4i, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4iv)(GLuint, GLint, GLsizei, const GLint *);
+#define CALL_ProgramUniform4iv(disp, parameters) \
+ (* GET_ProgramUniform4iv(disp)) parameters
+static inline _glptr_ProgramUniform4iv GET_ProgramUniform4iv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4iv) (GET_by_offset(disp, _gloffset_ProgramUniform4iv));
+}
+
+static inline void SET_ProgramUniform4iv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4iv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4ui)(GLuint, GLint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_ProgramUniform4ui(disp, parameters) \
+ (* GET_ProgramUniform4ui(disp)) parameters
+static inline _glptr_ProgramUniform4ui GET_ProgramUniform4ui(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4ui) (GET_by_offset(disp, _gloffset_ProgramUniform4ui));
+}
+
+static inline void SET_ProgramUniform4ui(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4ui, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniform4uiv)(GLuint, GLint, GLsizei, const GLuint *);
+#define CALL_ProgramUniform4uiv(disp, parameters) \
+ (* GET_ProgramUniform4uiv(disp)) parameters
+static inline _glptr_ProgramUniform4uiv GET_ProgramUniform4uiv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniform4uiv) (GET_by_offset(disp, _gloffset_ProgramUniform4uiv));
+}
+
+static inline void SET_ProgramUniform4uiv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniform4uiv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix2dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2dv GET_ProgramUniformMatrix2dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2dv));
+}
+
+static inline void SET_ProgramUniformMatrix2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix2fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2fv GET_ProgramUniformMatrix2fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2fv));
+}
+
+static inline void SET_ProgramUniformMatrix2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2x3dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix2x3dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2x3dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2x3dv GET_ProgramUniformMatrix2x3dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2x3dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2x3dv));
+}
+
+static inline void SET_ProgramUniformMatrix2x3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2x3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2x3fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix2x3fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2x3fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2x3fv GET_ProgramUniformMatrix2x3fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2x3fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2x3fv));
+}
+
+static inline void SET_ProgramUniformMatrix2x3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2x3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2x4dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix2x4dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2x4dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2x4dv GET_ProgramUniformMatrix2x4dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2x4dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2x4dv));
+}
+
+static inline void SET_ProgramUniformMatrix2x4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2x4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix2x4fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix2x4fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix2x4fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix2x4fv GET_ProgramUniformMatrix2x4fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix2x4fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix2x4fv));
+}
+
+static inline void SET_ProgramUniformMatrix2x4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix2x4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix3dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3dv GET_ProgramUniformMatrix3dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3dv));
+}
+
+static inline void SET_ProgramUniformMatrix3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix3fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3fv GET_ProgramUniformMatrix3fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3fv));
+}
+
+static inline void SET_ProgramUniformMatrix3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3x2dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix3x2dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3x2dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3x2dv GET_ProgramUniformMatrix3x2dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3x2dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3x2dv));
+}
+
+static inline void SET_ProgramUniformMatrix3x2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3x2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3x2fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix3x2fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3x2fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3x2fv GET_ProgramUniformMatrix3x2fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3x2fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3x2fv));
+}
+
+static inline void SET_ProgramUniformMatrix3x2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3x2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3x4dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix3x4dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3x4dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3x4dv GET_ProgramUniformMatrix3x4dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3x4dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3x4dv));
+}
+
+static inline void SET_ProgramUniformMatrix3x4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3x4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix3x4fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix3x4fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix3x4fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix3x4fv GET_ProgramUniformMatrix3x4fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix3x4fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix3x4fv));
+}
+
+static inline void SET_ProgramUniformMatrix3x4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix3x4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix4dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4dv GET_ProgramUniformMatrix4dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4dv));
+}
+
+static inline void SET_ProgramUniformMatrix4dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix4fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4fv GET_ProgramUniformMatrix4fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4fv));
+}
+
+static inline void SET_ProgramUniformMatrix4fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4x2dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix4x2dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4x2dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4x2dv GET_ProgramUniformMatrix4x2dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4x2dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4x2dv));
+}
+
+static inline void SET_ProgramUniformMatrix4x2dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4x2dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4x2fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix4x2fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4x2fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4x2fv GET_ProgramUniformMatrix4x2fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4x2fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4x2fv));
+}
+
+static inline void SET_ProgramUniformMatrix4x2fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4x2fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4x3dv)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *);
+#define CALL_ProgramUniformMatrix4x3dv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4x3dv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4x3dv GET_ProgramUniformMatrix4x3dv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4x3dv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4x3dv));
+}
+
+static inline void SET_ProgramUniformMatrix4x3dv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4x3dv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramUniformMatrix4x3fv)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *);
+#define CALL_ProgramUniformMatrix4x3fv(disp, parameters) \
+ (* GET_ProgramUniformMatrix4x3fv(disp)) parameters
+static inline _glptr_ProgramUniformMatrix4x3fv GET_ProgramUniformMatrix4x3fv(struct _glapi_table *disp) {
+ return (_glptr_ProgramUniformMatrix4x3fv) (GET_by_offset(disp, _gloffset_ProgramUniformMatrix4x3fv));
+}
+
+static inline void SET_ProgramUniformMatrix4x3fv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLsizei, GLboolean, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramUniformMatrix4x3fv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UnlockArraysEXT)(void);
+#define CALL_UnlockArraysEXT(disp, parameters) \
+ (* GET_UnlockArraysEXT(disp)) parameters
+static inline _glptr_UnlockArraysEXT GET_UnlockArraysEXT(struct _glapi_table *disp) {
+ return (_glptr_UnlockArraysEXT) (GET_by_offset(disp, _gloffset_UnlockArraysEXT));
+}
+
+static inline void SET_UnlockArraysEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_UnlockArraysEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UseProgramStages)(GLuint, GLbitfield, GLuint);
+#define CALL_UseProgramStages(disp, parameters) \
+ (* GET_UseProgramStages(disp)) parameters
+static inline _glptr_UseProgramStages GET_UseProgramStages(struct _glapi_table *disp) {
+ return (_glptr_UseProgramStages) (GET_by_offset(disp, _gloffset_UseProgramStages));
+}
+
+static inline void SET_UseProgramStages(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLbitfield, GLuint)) {
+ SET_by_offset(disp, _gloffset_UseProgramStages, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ValidateProgramPipeline)(GLuint);
+#define CALL_ValidateProgramPipeline(disp, parameters) \
+ (* GET_ValidateProgramPipeline(disp)) parameters
+static inline _glptr_ValidateProgramPipeline GET_ValidateProgramPipeline(struct _glapi_table *disp) {
+ return (_glptr_ValidateProgramPipeline) (GET_by_offset(disp, _gloffset_ValidateProgramPipeline));
+}
+
+static inline void SET_ValidateProgramPipeline(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_ValidateProgramPipeline, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DebugMessageCallback)(GLDEBUGPROC, const GLvoid *);
+#define CALL_DebugMessageCallback(disp, parameters) \
+ (* GET_DebugMessageCallback(disp)) parameters
+static inline _glptr_DebugMessageCallback GET_DebugMessageCallback(struct _glapi_table *disp) {
+ return (_glptr_DebugMessageCallback) (GET_by_offset(disp, _gloffset_DebugMessageCallback));
+}
+
+static inline void SET_DebugMessageCallback(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLDEBUGPROC, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_DebugMessageCallback, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DebugMessageControl)(GLenum, GLenum, GLenum, GLsizei, const GLuint *, GLboolean);
+#define CALL_DebugMessageControl(disp, parameters) \
+ (* GET_DebugMessageControl(disp)) parameters
+static inline _glptr_DebugMessageControl GET_DebugMessageControl(struct _glapi_table *disp) {
+ return (_glptr_DebugMessageControl) (GET_by_offset(disp, _gloffset_DebugMessageControl));
+}
+
+static inline void SET_DebugMessageControl(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLenum, GLsizei, const GLuint *, GLboolean)) {
+ SET_by_offset(disp, _gloffset_DebugMessageControl, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DebugMessageInsert)(GLenum, GLenum, GLuint, GLenum, GLsizei, const GLchar *);
+#define CALL_DebugMessageInsert(disp, parameters) \
+ (* GET_DebugMessageInsert(disp)) parameters
+static inline _glptr_DebugMessageInsert GET_DebugMessageInsert(struct _glapi_table *disp) {
+ return (_glptr_DebugMessageInsert) (GET_by_offset(disp, _gloffset_DebugMessageInsert));
+}
+
+static inline void SET_DebugMessageInsert(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLuint, GLenum, GLsizei, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_DebugMessageInsert, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GetDebugMessageLog)(GLuint, GLsizei, GLenum *, GLenum *, GLuint *, GLenum *, GLsizei *, GLchar *);
+#define CALL_GetDebugMessageLog(disp, parameters) \
+ (* GET_GetDebugMessageLog(disp)) parameters
+static inline _glptr_GetDebugMessageLog GET_GetDebugMessageLog(struct _glapi_table *disp) {
+ return (_glptr_GetDebugMessageLog) (GET_by_offset(disp, _gloffset_GetDebugMessageLog));
+}
+
+static inline void SET_GetDebugMessageLog(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum *, GLenum *, GLuint *, GLenum *, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetDebugMessageLog, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetObjectLabel)(GLenum, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetObjectLabel(disp, parameters) \
+ (* GET_GetObjectLabel(disp)) parameters
+static inline _glptr_GetObjectLabel GET_GetObjectLabel(struct _glapi_table *disp) {
+ return (_glptr_GetObjectLabel) (GET_by_offset(disp, _gloffset_GetObjectLabel));
+}
+
+static inline void SET_GetObjectLabel(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetObjectLabel, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetObjectPtrLabel)(const GLvoid *, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetObjectPtrLabel(disp, parameters) \
+ (* GET_GetObjectPtrLabel(disp)) parameters
+static inline _glptr_GetObjectPtrLabel GET_GetObjectPtrLabel(struct _glapi_table *disp) {
+ return (_glptr_GetObjectPtrLabel) (GET_by_offset(disp, _gloffset_GetObjectPtrLabel));
+}
+
+static inline void SET_GetObjectPtrLabel(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLvoid *, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetObjectPtrLabel, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ObjectLabel)(GLenum, GLuint, GLsizei, const GLchar *);
+#define CALL_ObjectLabel(disp, parameters) \
+ (* GET_ObjectLabel(disp)) parameters
+static inline _glptr_ObjectLabel GET_ObjectLabel(struct _glapi_table *disp) {
+ return (_glptr_ObjectLabel) (GET_by_offset(disp, _gloffset_ObjectLabel));
+}
+
+static inline void SET_ObjectLabel(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_ObjectLabel, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ObjectPtrLabel)(const GLvoid *, GLsizei, const GLchar *);
+#define CALL_ObjectPtrLabel(disp, parameters) \
+ (* GET_ObjectPtrLabel(disp)) parameters
+static inline _glptr_ObjectPtrLabel GET_ObjectPtrLabel(struct _glapi_table *disp) {
+ return (_glptr_ObjectPtrLabel) (GET_by_offset(disp, _gloffset_ObjectPtrLabel));
+}
+
+static inline void SET_ObjectPtrLabel(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLvoid *, GLsizei, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_ObjectPtrLabel, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PopDebugGroup)(void);
+#define CALL_PopDebugGroup(disp, parameters) \
+ (* GET_PopDebugGroup(disp)) parameters
+static inline _glptr_PopDebugGroup GET_PopDebugGroup(struct _glapi_table *disp) {
+ return (_glptr_PopDebugGroup) (GET_by_offset(disp, _gloffset_PopDebugGroup));
+}
+
+static inline void SET_PopDebugGroup(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PopDebugGroup, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PushDebugGroup)(GLenum, GLuint, GLsizei, const GLchar *);
+#define CALL_PushDebugGroup(disp, parameters) \
+ (* GET_PushDebugGroup(disp)) parameters
+static inline _glptr_PushDebugGroup GET_PushDebugGroup(struct _glapi_table *disp) {
+ return (_glptr_PushDebugGroup) (GET_by_offset(disp, _gloffset_PushDebugGroup));
+}
+
+static inline void SET_PushDebugGroup(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_PushDebugGroup, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3fEXT)(GLfloat, GLfloat, GLfloat);
+#define CALL_SecondaryColor3fEXT(disp, parameters) \
+ (* GET_SecondaryColor3fEXT(disp)) parameters
+static inline _glptr_SecondaryColor3fEXT GET_SecondaryColor3fEXT(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3fEXT) (GET_by_offset(disp, _gloffset_SecondaryColor3fEXT));
+}
+
+static inline void SET_SecondaryColor3fEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3fEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SecondaryColor3fvEXT)(const GLfloat *);
+#define CALL_SecondaryColor3fvEXT(disp, parameters) \
+ (* GET_SecondaryColor3fvEXT(disp)) parameters
+static inline _glptr_SecondaryColor3fvEXT GET_SecondaryColor3fvEXT(struct _glapi_table *disp) {
+ return (_glptr_SecondaryColor3fvEXT) (GET_by_offset(disp, _gloffset_SecondaryColor3fvEXT));
+}
+
+static inline void SET_SecondaryColor3fvEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_SecondaryColor3fvEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiDrawElementsEXT)(GLenum, const GLsizei *, GLenum, const GLvoid * const *, GLsizei);
+#define CALL_MultiDrawElementsEXT(disp, parameters) \
+ (* GET_MultiDrawElementsEXT(disp)) parameters
+static inline _glptr_MultiDrawElementsEXT GET_MultiDrawElementsEXT(struct _glapi_table *disp) {
+ return (_glptr_MultiDrawElementsEXT) (GET_by_offset(disp, _gloffset_MultiDrawElementsEXT));
+}
+
+static inline void SET_MultiDrawElementsEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLsizei *, GLenum, const GLvoid * const *, GLsizei)) {
+ SET_by_offset(disp, _gloffset_MultiDrawElementsEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FogCoordfEXT)(GLfloat);
+#define CALL_FogCoordfEXT(disp, parameters) \
+ (* GET_FogCoordfEXT(disp)) parameters
+static inline _glptr_FogCoordfEXT GET_FogCoordfEXT(struct _glapi_table *disp) {
+ return (_glptr_FogCoordfEXT) (GET_by_offset(disp, _gloffset_FogCoordfEXT));
+}
+
+static inline void SET_FogCoordfEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat)) {
+ SET_by_offset(disp, _gloffset_FogCoordfEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FogCoordfvEXT)(const GLfloat *);
+#define CALL_FogCoordfvEXT(disp, parameters) \
+ (* GET_FogCoordfvEXT(disp)) parameters
+static inline _glptr_FogCoordfvEXT GET_FogCoordfvEXT(struct _glapi_table *disp) {
+ return (_glptr_FogCoordfvEXT) (GET_by_offset(disp, _gloffset_FogCoordfvEXT));
+}
+
+static inline void SET_FogCoordfvEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_FogCoordfvEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ResizeBuffersMESA)(void);
+#define CALL_ResizeBuffersMESA(disp, parameters) \
+ (* GET_ResizeBuffersMESA(disp)) parameters
+static inline _glptr_ResizeBuffersMESA GET_ResizeBuffersMESA(struct _glapi_table *disp) {
+ return (_glptr_ResizeBuffersMESA) (GET_by_offset(disp, _gloffset_ResizeBuffersMESA));
+}
+
+static inline void SET_ResizeBuffersMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_ResizeBuffersMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4dMESA)(GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_WindowPos4dMESA(disp, parameters) \
+ (* GET_WindowPos4dMESA(disp)) parameters
+static inline _glptr_WindowPos4dMESA GET_WindowPos4dMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4dMESA) (GET_by_offset(disp, _gloffset_WindowPos4dMESA));
+}
+
+static inline void SET_WindowPos4dMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_WindowPos4dMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4dvMESA)(const GLdouble *);
+#define CALL_WindowPos4dvMESA(disp, parameters) \
+ (* GET_WindowPos4dvMESA(disp)) parameters
+static inline _glptr_WindowPos4dvMESA GET_WindowPos4dvMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4dvMESA) (GET_by_offset(disp, _gloffset_WindowPos4dvMESA));
+}
+
+static inline void SET_WindowPos4dvMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_WindowPos4dvMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4fMESA)(GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_WindowPos4fMESA(disp, parameters) \
+ (* GET_WindowPos4fMESA(disp)) parameters
+static inline _glptr_WindowPos4fMESA GET_WindowPos4fMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4fMESA) (GET_by_offset(disp, _gloffset_WindowPos4fMESA));
+}
+
+static inline void SET_WindowPos4fMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_WindowPos4fMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4fvMESA)(const GLfloat *);
+#define CALL_WindowPos4fvMESA(disp, parameters) \
+ (* GET_WindowPos4fvMESA(disp)) parameters
+static inline _glptr_WindowPos4fvMESA GET_WindowPos4fvMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4fvMESA) (GET_by_offset(disp, _gloffset_WindowPos4fvMESA));
+}
+
+static inline void SET_WindowPos4fvMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_WindowPos4fvMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4iMESA)(GLint, GLint, GLint, GLint);
+#define CALL_WindowPos4iMESA(disp, parameters) \
+ (* GET_WindowPos4iMESA(disp)) parameters
+static inline _glptr_WindowPos4iMESA GET_WindowPos4iMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4iMESA) (GET_by_offset(disp, _gloffset_WindowPos4iMESA));
+}
+
+static inline void SET_WindowPos4iMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_WindowPos4iMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4ivMESA)(const GLint *);
+#define CALL_WindowPos4ivMESA(disp, parameters) \
+ (* GET_WindowPos4ivMESA(disp)) parameters
+static inline _glptr_WindowPos4ivMESA GET_WindowPos4ivMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4ivMESA) (GET_by_offset(disp, _gloffset_WindowPos4ivMESA));
+}
+
+static inline void SET_WindowPos4ivMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLint *)) {
+ SET_by_offset(disp, _gloffset_WindowPos4ivMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4sMESA)(GLshort, GLshort, GLshort, GLshort);
+#define CALL_WindowPos4sMESA(disp, parameters) \
+ (* GET_WindowPos4sMESA(disp)) parameters
+static inline _glptr_WindowPos4sMESA GET_WindowPos4sMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4sMESA) (GET_by_offset(disp, _gloffset_WindowPos4sMESA));
+}
+
+static inline void SET_WindowPos4sMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_WindowPos4sMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowPos4svMESA)(const GLshort *);
+#define CALL_WindowPos4svMESA(disp, parameters) \
+ (* GET_WindowPos4svMESA(disp)) parameters
+static inline _glptr_WindowPos4svMESA GET_WindowPos4svMESA(struct _glapi_table *disp) {
+ return (_glptr_WindowPos4svMESA) (GET_by_offset(disp, _gloffset_WindowPos4svMESA));
+}
+
+static inline void SET_WindowPos4svMESA(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLshort *)) {
+ SET_by_offset(disp, _gloffset_WindowPos4svMESA, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiModeDrawArraysIBM)(const GLenum *, const GLint *, const GLsizei *, GLsizei, GLint);
+#define CALL_MultiModeDrawArraysIBM(disp, parameters) \
+ (* GET_MultiModeDrawArraysIBM(disp)) parameters
+static inline _glptr_MultiModeDrawArraysIBM GET_MultiModeDrawArraysIBM(struct _glapi_table *disp) {
+ return (_glptr_MultiModeDrawArraysIBM) (GET_by_offset(disp, _gloffset_MultiModeDrawArraysIBM));
+}
+
+static inline void SET_MultiModeDrawArraysIBM(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLenum *, const GLint *, const GLsizei *, GLsizei, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiModeDrawArraysIBM, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiModeDrawElementsIBM)(const GLenum *, const GLsizei *, GLenum, const GLvoid * const *, GLsizei, GLint);
+#define CALL_MultiModeDrawElementsIBM(disp, parameters) \
+ (* GET_MultiModeDrawElementsIBM(disp)) parameters
+static inline _glptr_MultiModeDrawElementsIBM GET_MultiModeDrawElementsIBM(struct _glapi_table *disp) {
+ return (_glptr_MultiModeDrawElementsIBM) (GET_by_offset(disp, _gloffset_MultiModeDrawElementsIBM));
+}
+
+static inline void SET_MultiModeDrawElementsIBM(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLenum *, const GLsizei *, GLenum, const GLvoid * const *, GLsizei, GLint)) {
+ SET_by_offset(disp, _gloffset_MultiModeDrawElementsIBM, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_AreProgramsResidentNV)(GLsizei, const GLuint *, GLboolean *);
+#define CALL_AreProgramsResidentNV(disp, parameters) \
+ (* GET_AreProgramsResidentNV(disp)) parameters
+static inline _glptr_AreProgramsResidentNV GET_AreProgramsResidentNV(struct _glapi_table *disp) {
+ return (_glptr_AreProgramsResidentNV) (GET_by_offset(disp, _gloffset_AreProgramsResidentNV));
+}
+
+static inline void SET_AreProgramsResidentNV(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLsizei, const GLuint *, GLboolean *)) {
+ SET_by_offset(disp, _gloffset_AreProgramsResidentNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ExecuteProgramNV)(GLenum, GLuint, const GLfloat *);
+#define CALL_ExecuteProgramNV(disp, parameters) \
+ (* GET_ExecuteProgramNV(disp)) parameters
+static inline _glptr_ExecuteProgramNV GET_ExecuteProgramNV(struct _glapi_table *disp) {
+ return (_glptr_ExecuteProgramNV) (GET_by_offset(disp, _gloffset_ExecuteProgramNV));
+}
+
+static inline void SET_ExecuteProgramNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ExecuteProgramNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramParameterdvNV)(GLenum, GLuint, GLenum, GLdouble *);
+#define CALL_GetProgramParameterdvNV(disp, parameters) \
+ (* GET_GetProgramParameterdvNV(disp)) parameters
+static inline _glptr_GetProgramParameterdvNV GET_GetProgramParameterdvNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramParameterdvNV) (GET_by_offset(disp, _gloffset_GetProgramParameterdvNV));
+}
+
+static inline void SET_GetProgramParameterdvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetProgramParameterdvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramParameterfvNV)(GLenum, GLuint, GLenum, GLfloat *);
+#define CALL_GetProgramParameterfvNV(disp, parameters) \
+ (* GET_GetProgramParameterfvNV(disp)) parameters
+static inline _glptr_GetProgramParameterfvNV GET_GetProgramParameterfvNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramParameterfvNV) (GET_by_offset(disp, _gloffset_GetProgramParameterfvNV));
+}
+
+static inline void SET_GetProgramParameterfvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetProgramParameterfvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramStringNV)(GLuint, GLenum, GLubyte *);
+#define CALL_GetProgramStringNV(disp, parameters) \
+ (* GET_GetProgramStringNV(disp)) parameters
+static inline _glptr_GetProgramStringNV GET_GetProgramStringNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramStringNV) (GET_by_offset(disp, _gloffset_GetProgramStringNV));
+}
+
+static inline void SET_GetProgramStringNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLubyte *)) {
+ SET_by_offset(disp, _gloffset_GetProgramStringNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramivNV)(GLuint, GLenum, GLint *);
+#define CALL_GetProgramivNV(disp, parameters) \
+ (* GET_GetProgramivNV(disp)) parameters
+static inline _glptr_GetProgramivNV GET_GetProgramivNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramivNV) (GET_by_offset(disp, _gloffset_GetProgramivNV));
+}
+
+static inline void SET_GetProgramivNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetProgramivNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTrackMatrixivNV)(GLenum, GLuint, GLenum, GLint *);
+#define CALL_GetTrackMatrixivNV(disp, parameters) \
+ (* GET_GetTrackMatrixivNV(disp)) parameters
+static inline _glptr_GetTrackMatrixivNV GET_GetTrackMatrixivNV(struct _glapi_table *disp) {
+ return (_glptr_GetTrackMatrixivNV) (GET_by_offset(disp, _gloffset_GetTrackMatrixivNV));
+}
+
+static inline void SET_GetTrackMatrixivNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTrackMatrixivNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribdvNV)(GLuint, GLenum, GLdouble *);
+#define CALL_GetVertexAttribdvNV(disp, parameters) \
+ (* GET_GetVertexAttribdvNV(disp)) parameters
+static inline _glptr_GetVertexAttribdvNV GET_GetVertexAttribdvNV(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribdvNV) (GET_by_offset(disp, _gloffset_GetVertexAttribdvNV));
+}
+
+static inline void SET_GetVertexAttribdvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribdvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribfvNV)(GLuint, GLenum, GLfloat *);
+#define CALL_GetVertexAttribfvNV(disp, parameters) \
+ (* GET_GetVertexAttribfvNV(disp)) parameters
+static inline _glptr_GetVertexAttribfvNV GET_GetVertexAttribfvNV(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribfvNV) (GET_by_offset(disp, _gloffset_GetVertexAttribfvNV));
+}
+
+static inline void SET_GetVertexAttribfvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribfvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetVertexAttribivNV)(GLuint, GLenum, GLint *);
+#define CALL_GetVertexAttribivNV(disp, parameters) \
+ (* GET_GetVertexAttribivNV(disp)) parameters
+static inline _glptr_GetVertexAttribivNV GET_GetVertexAttribivNV(struct _glapi_table *disp) {
+ return (_glptr_GetVertexAttribivNV) (GET_by_offset(disp, _gloffset_GetVertexAttribivNV));
+}
+
+static inline void SET_GetVertexAttribivNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetVertexAttribivNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadProgramNV)(GLenum, GLuint, GLsizei, const GLubyte *);
+#define CALL_LoadProgramNV(disp, parameters) \
+ (* GET_LoadProgramNV(disp)) parameters
+static inline _glptr_LoadProgramNV GET_LoadProgramNV(struct _glapi_table *disp) {
+ return (_glptr_LoadProgramNV) (GET_by_offset(disp, _gloffset_LoadProgramNV));
+}
+
+static inline void SET_LoadProgramNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_LoadProgramNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramParameters4dvNV)(GLenum, GLuint, GLsizei, const GLdouble *);
+#define CALL_ProgramParameters4dvNV(disp, parameters) \
+ (* GET_ProgramParameters4dvNV(disp)) parameters
+static inline _glptr_ProgramParameters4dvNV GET_ProgramParameters4dvNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramParameters4dvNV) (GET_by_offset(disp, _gloffset_ProgramParameters4dvNV));
+}
+
+static inline void SET_ProgramParameters4dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramParameters4dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramParameters4fvNV)(GLenum, GLuint, GLsizei, const GLfloat *);
+#define CALL_ProgramParameters4fvNV(disp, parameters) \
+ (* GET_ProgramParameters4fvNV(disp)) parameters
+static inline _glptr_ProgramParameters4fvNV GET_ProgramParameters4fvNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramParameters4fvNV) (GET_by_offset(disp, _gloffset_ProgramParameters4fvNV));
+}
+
+static inline void SET_ProgramParameters4fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramParameters4fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_RequestResidentProgramsNV)(GLsizei, const GLuint *);
+#define CALL_RequestResidentProgramsNV(disp, parameters) \
+ (* GET_RequestResidentProgramsNV(disp)) parameters
+static inline _glptr_RequestResidentProgramsNV GET_RequestResidentProgramsNV(struct _glapi_table *disp) {
+ return (_glptr_RequestResidentProgramsNV) (GET_by_offset(disp, _gloffset_RequestResidentProgramsNV));
+}
+
+static inline void SET_RequestResidentProgramsNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_RequestResidentProgramsNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TrackMatrixNV)(GLenum, GLuint, GLenum, GLenum);
+#define CALL_TrackMatrixNV(disp, parameters) \
+ (* GET_TrackMatrixNV(disp)) parameters
+static inline _glptr_TrackMatrixNV GET_TrackMatrixNV(struct _glapi_table *disp) {
+ return (_glptr_TrackMatrixNV) (GET_by_offset(disp, _gloffset_TrackMatrixNV));
+}
+
+static inline void SET_TrackMatrixNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLenum)) {
+ SET_by_offset(disp, _gloffset_TrackMatrixNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1dNV)(GLuint, GLdouble);
+#define CALL_VertexAttrib1dNV(disp, parameters) \
+ (* GET_VertexAttrib1dNV(disp)) parameters
+static inline _glptr_VertexAttrib1dNV GET_VertexAttrib1dNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1dNV) (GET_by_offset(disp, _gloffset_VertexAttrib1dNV));
+}
+
+static inline void SET_VertexAttrib1dNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1dNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1dvNV)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib1dvNV(disp, parameters) \
+ (* GET_VertexAttrib1dvNV(disp)) parameters
+static inline _glptr_VertexAttrib1dvNV GET_VertexAttrib1dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1dvNV) (GET_by_offset(disp, _gloffset_VertexAttrib1dvNV));
+}
+
+static inline void SET_VertexAttrib1dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1fNV)(GLuint, GLfloat);
+#define CALL_VertexAttrib1fNV(disp, parameters) \
+ (* GET_VertexAttrib1fNV(disp)) parameters
+static inline _glptr_VertexAttrib1fNV GET_VertexAttrib1fNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1fNV) (GET_by_offset(disp, _gloffset_VertexAttrib1fNV));
+}
+
+static inline void SET_VertexAttrib1fNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1fNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1fvNV)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib1fvNV(disp, parameters) \
+ (* GET_VertexAttrib1fvNV(disp)) parameters
+static inline _glptr_VertexAttrib1fvNV GET_VertexAttrib1fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1fvNV) (GET_by_offset(disp, _gloffset_VertexAttrib1fvNV));
+}
+
+static inline void SET_VertexAttrib1fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1sNV)(GLuint, GLshort);
+#define CALL_VertexAttrib1sNV(disp, parameters) \
+ (* GET_VertexAttrib1sNV(disp)) parameters
+static inline _glptr_VertexAttrib1sNV GET_VertexAttrib1sNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1sNV) (GET_by_offset(disp, _gloffset_VertexAttrib1sNV));
+}
+
+static inline void SET_VertexAttrib1sNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1sNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib1svNV)(GLuint, const GLshort *);
+#define CALL_VertexAttrib1svNV(disp, parameters) \
+ (* GET_VertexAttrib1svNV(disp)) parameters
+static inline _glptr_VertexAttrib1svNV GET_VertexAttrib1svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib1svNV) (GET_by_offset(disp, _gloffset_VertexAttrib1svNV));
+}
+
+static inline void SET_VertexAttrib1svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib1svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2dNV)(GLuint, GLdouble, GLdouble);
+#define CALL_VertexAttrib2dNV(disp, parameters) \
+ (* GET_VertexAttrib2dNV(disp)) parameters
+static inline _glptr_VertexAttrib2dNV GET_VertexAttrib2dNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2dNV) (GET_by_offset(disp, _gloffset_VertexAttrib2dNV));
+}
+
+static inline void SET_VertexAttrib2dNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2dNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2dvNV)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib2dvNV(disp, parameters) \
+ (* GET_VertexAttrib2dvNV(disp)) parameters
+static inline _glptr_VertexAttrib2dvNV GET_VertexAttrib2dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2dvNV) (GET_by_offset(disp, _gloffset_VertexAttrib2dvNV));
+}
+
+static inline void SET_VertexAttrib2dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2fNV)(GLuint, GLfloat, GLfloat);
+#define CALL_VertexAttrib2fNV(disp, parameters) \
+ (* GET_VertexAttrib2fNV(disp)) parameters
+static inline _glptr_VertexAttrib2fNV GET_VertexAttrib2fNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2fNV) (GET_by_offset(disp, _gloffset_VertexAttrib2fNV));
+}
+
+static inline void SET_VertexAttrib2fNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2fNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2fvNV)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib2fvNV(disp, parameters) \
+ (* GET_VertexAttrib2fvNV(disp)) parameters
+static inline _glptr_VertexAttrib2fvNV GET_VertexAttrib2fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2fvNV) (GET_by_offset(disp, _gloffset_VertexAttrib2fvNV));
+}
+
+static inline void SET_VertexAttrib2fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2sNV)(GLuint, GLshort, GLshort);
+#define CALL_VertexAttrib2sNV(disp, parameters) \
+ (* GET_VertexAttrib2sNV(disp)) parameters
+static inline _glptr_VertexAttrib2sNV GET_VertexAttrib2sNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2sNV) (GET_by_offset(disp, _gloffset_VertexAttrib2sNV));
+}
+
+static inline void SET_VertexAttrib2sNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2sNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib2svNV)(GLuint, const GLshort *);
+#define CALL_VertexAttrib2svNV(disp, parameters) \
+ (* GET_VertexAttrib2svNV(disp)) parameters
+static inline _glptr_VertexAttrib2svNV GET_VertexAttrib2svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib2svNV) (GET_by_offset(disp, _gloffset_VertexAttrib2svNV));
+}
+
+static inline void SET_VertexAttrib2svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib2svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3dNV)(GLuint, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttrib3dNV(disp, parameters) \
+ (* GET_VertexAttrib3dNV(disp)) parameters
+static inline _glptr_VertexAttrib3dNV GET_VertexAttrib3dNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3dNV) (GET_by_offset(disp, _gloffset_VertexAttrib3dNV));
+}
+
+static inline void SET_VertexAttrib3dNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3dNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3dvNV)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib3dvNV(disp, parameters) \
+ (* GET_VertexAttrib3dvNV(disp)) parameters
+static inline _glptr_VertexAttrib3dvNV GET_VertexAttrib3dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3dvNV) (GET_by_offset(disp, _gloffset_VertexAttrib3dvNV));
+}
+
+static inline void SET_VertexAttrib3dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3fNV)(GLuint, GLfloat, GLfloat, GLfloat);
+#define CALL_VertexAttrib3fNV(disp, parameters) \
+ (* GET_VertexAttrib3fNV(disp)) parameters
+static inline _glptr_VertexAttrib3fNV GET_VertexAttrib3fNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3fNV) (GET_by_offset(disp, _gloffset_VertexAttrib3fNV));
+}
+
+static inline void SET_VertexAttrib3fNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3fNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3fvNV)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib3fvNV(disp, parameters) \
+ (* GET_VertexAttrib3fvNV(disp)) parameters
+static inline _glptr_VertexAttrib3fvNV GET_VertexAttrib3fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3fvNV) (GET_by_offset(disp, _gloffset_VertexAttrib3fvNV));
+}
+
+static inline void SET_VertexAttrib3fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3sNV)(GLuint, GLshort, GLshort, GLshort);
+#define CALL_VertexAttrib3sNV(disp, parameters) \
+ (* GET_VertexAttrib3sNV(disp)) parameters
+static inline _glptr_VertexAttrib3sNV GET_VertexAttrib3sNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3sNV) (GET_by_offset(disp, _gloffset_VertexAttrib3sNV));
+}
+
+static inline void SET_VertexAttrib3sNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3sNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib3svNV)(GLuint, const GLshort *);
+#define CALL_VertexAttrib3svNV(disp, parameters) \
+ (* GET_VertexAttrib3svNV(disp)) parameters
+static inline _glptr_VertexAttrib3svNV GET_VertexAttrib3svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib3svNV) (GET_by_offset(disp, _gloffset_VertexAttrib3svNV));
+}
+
+static inline void SET_VertexAttrib3svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib3svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4dNV)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_VertexAttrib4dNV(disp, parameters) \
+ (* GET_VertexAttrib4dNV(disp)) parameters
+static inline _glptr_VertexAttrib4dNV GET_VertexAttrib4dNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4dNV) (GET_by_offset(disp, _gloffset_VertexAttrib4dNV));
+}
+
+static inline void SET_VertexAttrib4dNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4dNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4dvNV)(GLuint, const GLdouble *);
+#define CALL_VertexAttrib4dvNV(disp, parameters) \
+ (* GET_VertexAttrib4dvNV(disp)) parameters
+static inline _glptr_VertexAttrib4dvNV GET_VertexAttrib4dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4dvNV) (GET_by_offset(disp, _gloffset_VertexAttrib4dvNV));
+}
+
+static inline void SET_VertexAttrib4dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4fNV)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_VertexAttrib4fNV(disp, parameters) \
+ (* GET_VertexAttrib4fNV(disp)) parameters
+static inline _glptr_VertexAttrib4fNV GET_VertexAttrib4fNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4fNV) (GET_by_offset(disp, _gloffset_VertexAttrib4fNV));
+}
+
+static inline void SET_VertexAttrib4fNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4fNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4fvNV)(GLuint, const GLfloat *);
+#define CALL_VertexAttrib4fvNV(disp, parameters) \
+ (* GET_VertexAttrib4fvNV(disp)) parameters
+static inline _glptr_VertexAttrib4fvNV GET_VertexAttrib4fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4fvNV) (GET_by_offset(disp, _gloffset_VertexAttrib4fvNV));
+}
+
+static inline void SET_VertexAttrib4fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4sNV)(GLuint, GLshort, GLshort, GLshort, GLshort);
+#define CALL_VertexAttrib4sNV(disp, parameters) \
+ (* GET_VertexAttrib4sNV(disp)) parameters
+static inline _glptr_VertexAttrib4sNV GET_VertexAttrib4sNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4sNV) (GET_by_offset(disp, _gloffset_VertexAttrib4sNV));
+}
+
+static inline void SET_VertexAttrib4sNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLshort, GLshort, GLshort, GLshort)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4sNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4svNV)(GLuint, const GLshort *);
+#define CALL_VertexAttrib4svNV(disp, parameters) \
+ (* GET_VertexAttrib4svNV(disp)) parameters
+static inline _glptr_VertexAttrib4svNV GET_VertexAttrib4svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4svNV) (GET_by_offset(disp, _gloffset_VertexAttrib4svNV));
+}
+
+static inline void SET_VertexAttrib4svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4ubNV)(GLuint, GLubyte, GLubyte, GLubyte, GLubyte);
+#define CALL_VertexAttrib4ubNV(disp, parameters) \
+ (* GET_VertexAttrib4ubNV(disp)) parameters
+static inline _glptr_VertexAttrib4ubNV GET_VertexAttrib4ubNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4ubNV) (GET_by_offset(disp, _gloffset_VertexAttrib4ubNV));
+}
+
+static inline void SET_VertexAttrib4ubNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLubyte, GLubyte, GLubyte, GLubyte)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4ubNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttrib4ubvNV)(GLuint, const GLubyte *);
+#define CALL_VertexAttrib4ubvNV(disp, parameters) \
+ (* GET_VertexAttrib4ubvNV(disp)) parameters
+static inline _glptr_VertexAttrib4ubvNV GET_VertexAttrib4ubvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttrib4ubvNV) (GET_by_offset(disp, _gloffset_VertexAttrib4ubvNV));
+}
+
+static inline void SET_VertexAttrib4ubvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttrib4ubvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribPointerNV)(GLuint, GLint, GLenum, GLsizei, const GLvoid *);
+#define CALL_VertexAttribPointerNV(disp, parameters) \
+ (* GET_VertexAttribPointerNV(disp)) parameters
+static inline _glptr_VertexAttribPointerNV GET_VertexAttribPointerNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribPointerNV) (GET_by_offset(disp, _gloffset_VertexAttribPointerNV));
+}
+
+static inline void SET_VertexAttribPointerNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLenum, GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribPointerNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs1dvNV)(GLuint, GLsizei, const GLdouble *);
+#define CALL_VertexAttribs1dvNV(disp, parameters) \
+ (* GET_VertexAttribs1dvNV(disp)) parameters
+static inline _glptr_VertexAttribs1dvNV GET_VertexAttribs1dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs1dvNV) (GET_by_offset(disp, _gloffset_VertexAttribs1dvNV));
+}
+
+static inline void SET_VertexAttribs1dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs1dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs1fvNV)(GLuint, GLsizei, const GLfloat *);
+#define CALL_VertexAttribs1fvNV(disp, parameters) \
+ (* GET_VertexAttribs1fvNV(disp)) parameters
+static inline _glptr_VertexAttribs1fvNV GET_VertexAttribs1fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs1fvNV) (GET_by_offset(disp, _gloffset_VertexAttribs1fvNV));
+}
+
+static inline void SET_VertexAttribs1fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs1fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs1svNV)(GLuint, GLsizei, const GLshort *);
+#define CALL_VertexAttribs1svNV(disp, parameters) \
+ (* GET_VertexAttribs1svNV(disp)) parameters
+static inline _glptr_VertexAttribs1svNV GET_VertexAttribs1svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs1svNV) (GET_by_offset(disp, _gloffset_VertexAttribs1svNV));
+}
+
+static inline void SET_VertexAttribs1svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs1svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs2dvNV)(GLuint, GLsizei, const GLdouble *);
+#define CALL_VertexAttribs2dvNV(disp, parameters) \
+ (* GET_VertexAttribs2dvNV(disp)) parameters
+static inline _glptr_VertexAttribs2dvNV GET_VertexAttribs2dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs2dvNV) (GET_by_offset(disp, _gloffset_VertexAttribs2dvNV));
+}
+
+static inline void SET_VertexAttribs2dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs2dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs2fvNV)(GLuint, GLsizei, const GLfloat *);
+#define CALL_VertexAttribs2fvNV(disp, parameters) \
+ (* GET_VertexAttribs2fvNV(disp)) parameters
+static inline _glptr_VertexAttribs2fvNV GET_VertexAttribs2fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs2fvNV) (GET_by_offset(disp, _gloffset_VertexAttribs2fvNV));
+}
+
+static inline void SET_VertexAttribs2fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs2fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs2svNV)(GLuint, GLsizei, const GLshort *);
+#define CALL_VertexAttribs2svNV(disp, parameters) \
+ (* GET_VertexAttribs2svNV(disp)) parameters
+static inline _glptr_VertexAttribs2svNV GET_VertexAttribs2svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs2svNV) (GET_by_offset(disp, _gloffset_VertexAttribs2svNV));
+}
+
+static inline void SET_VertexAttribs2svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs2svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs3dvNV)(GLuint, GLsizei, const GLdouble *);
+#define CALL_VertexAttribs3dvNV(disp, parameters) \
+ (* GET_VertexAttribs3dvNV(disp)) parameters
+static inline _glptr_VertexAttribs3dvNV GET_VertexAttribs3dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs3dvNV) (GET_by_offset(disp, _gloffset_VertexAttribs3dvNV));
+}
+
+static inline void SET_VertexAttribs3dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs3dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs3fvNV)(GLuint, GLsizei, const GLfloat *);
+#define CALL_VertexAttribs3fvNV(disp, parameters) \
+ (* GET_VertexAttribs3fvNV(disp)) parameters
+static inline _glptr_VertexAttribs3fvNV GET_VertexAttribs3fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs3fvNV) (GET_by_offset(disp, _gloffset_VertexAttribs3fvNV));
+}
+
+static inline void SET_VertexAttribs3fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs3fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs3svNV)(GLuint, GLsizei, const GLshort *);
+#define CALL_VertexAttribs3svNV(disp, parameters) \
+ (* GET_VertexAttribs3svNV(disp)) parameters
+static inline _glptr_VertexAttribs3svNV GET_VertexAttribs3svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs3svNV) (GET_by_offset(disp, _gloffset_VertexAttribs3svNV));
+}
+
+static inline void SET_VertexAttribs3svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs3svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs4dvNV)(GLuint, GLsizei, const GLdouble *);
+#define CALL_VertexAttribs4dvNV(disp, parameters) \
+ (* GET_VertexAttribs4dvNV(disp)) parameters
+static inline _glptr_VertexAttribs4dvNV GET_VertexAttribs4dvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs4dvNV) (GET_by_offset(disp, _gloffset_VertexAttribs4dvNV));
+}
+
+static inline void SET_VertexAttribs4dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs4dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs4fvNV)(GLuint, GLsizei, const GLfloat *);
+#define CALL_VertexAttribs4fvNV(disp, parameters) \
+ (* GET_VertexAttribs4fvNV(disp)) parameters
+static inline _glptr_VertexAttribs4fvNV GET_VertexAttribs4fvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs4fvNV) (GET_by_offset(disp, _gloffset_VertexAttribs4fvNV));
+}
+
+static inline void SET_VertexAttribs4fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs4fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs4svNV)(GLuint, GLsizei, const GLshort *);
+#define CALL_VertexAttribs4svNV(disp, parameters) \
+ (* GET_VertexAttribs4svNV(disp)) parameters
+static inline _glptr_VertexAttribs4svNV GET_VertexAttribs4svNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs4svNV) (GET_by_offset(disp, _gloffset_VertexAttribs4svNV));
+}
+
+static inline void SET_VertexAttribs4svNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLshort *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs4svNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribs4ubvNV)(GLuint, GLsizei, const GLubyte *);
+#define CALL_VertexAttribs4ubvNV(disp, parameters) \
+ (* GET_VertexAttribs4ubvNV(disp)) parameters
+static inline _glptr_VertexAttribs4ubvNV GET_VertexAttribs4ubvNV(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribs4ubvNV) (GET_by_offset(disp, _gloffset_VertexAttribs4ubvNV));
+}
+
+static inline void SET_VertexAttribs4ubvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribs4ubvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexBumpParameterfvATI)(GLenum, GLfloat *);
+#define CALL_GetTexBumpParameterfvATI(disp, parameters) \
+ (* GET_GetTexBumpParameterfvATI(disp)) parameters
+static inline _glptr_GetTexBumpParameterfvATI GET_GetTexBumpParameterfvATI(struct _glapi_table *disp) {
+ return (_glptr_GetTexBumpParameterfvATI) (GET_by_offset(disp, _gloffset_GetTexBumpParameterfvATI));
+}
+
+static inline void SET_GetTexBumpParameterfvATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetTexBumpParameterfvATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexBumpParameterivATI)(GLenum, GLint *);
+#define CALL_GetTexBumpParameterivATI(disp, parameters) \
+ (* GET_GetTexBumpParameterivATI(disp)) parameters
+static inline _glptr_GetTexBumpParameterivATI GET_GetTexBumpParameterivATI(struct _glapi_table *disp) {
+ return (_glptr_GetTexBumpParameterivATI) (GET_by_offset(disp, _gloffset_GetTexBumpParameterivATI));
+}
+
+static inline void SET_GetTexBumpParameterivATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetTexBumpParameterivATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexBumpParameterfvATI)(GLenum, const GLfloat *);
+#define CALL_TexBumpParameterfvATI(disp, parameters) \
+ (* GET_TexBumpParameterfvATI(disp)) parameters
+static inline _glptr_TexBumpParameterfvATI GET_TexBumpParameterfvATI(struct _glapi_table *disp) {
+ return (_glptr_TexBumpParameterfvATI) (GET_by_offset(disp, _gloffset_TexBumpParameterfvATI));
+}
+
+static inline void SET_TexBumpParameterfvATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_TexBumpParameterfvATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexBumpParameterivATI)(GLenum, const GLint *);
+#define CALL_TexBumpParameterivATI(disp, parameters) \
+ (* GET_TexBumpParameterivATI(disp)) parameters
+static inline _glptr_TexBumpParameterivATI GET_TexBumpParameterivATI(struct _glapi_table *disp) {
+ return (_glptr_TexBumpParameterivATI) (GET_by_offset(disp, _gloffset_TexBumpParameterivATI));
+}
+
+static inline void SET_TexBumpParameterivATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_TexBumpParameterivATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AlphaFragmentOp1ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_AlphaFragmentOp1ATI(disp, parameters) \
+ (* GET_AlphaFragmentOp1ATI(disp)) parameters
+static inline _glptr_AlphaFragmentOp1ATI GET_AlphaFragmentOp1ATI(struct _glapi_table *disp) {
+ return (_glptr_AlphaFragmentOp1ATI) (GET_by_offset(disp, _gloffset_AlphaFragmentOp1ATI));
+}
+
+static inline void SET_AlphaFragmentOp1ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_AlphaFragmentOp1ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AlphaFragmentOp2ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_AlphaFragmentOp2ATI(disp, parameters) \
+ (* GET_AlphaFragmentOp2ATI(disp)) parameters
+static inline _glptr_AlphaFragmentOp2ATI GET_AlphaFragmentOp2ATI(struct _glapi_table *disp) {
+ return (_glptr_AlphaFragmentOp2ATI) (GET_by_offset(disp, _gloffset_AlphaFragmentOp2ATI));
+}
+
+static inline void SET_AlphaFragmentOp2ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_AlphaFragmentOp2ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AlphaFragmentOp3ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_AlphaFragmentOp3ATI(disp, parameters) \
+ (* GET_AlphaFragmentOp3ATI(disp)) parameters
+static inline _glptr_AlphaFragmentOp3ATI GET_AlphaFragmentOp3ATI(struct _glapi_table *disp) {
+ return (_glptr_AlphaFragmentOp3ATI) (GET_by_offset(disp, _gloffset_AlphaFragmentOp3ATI));
+}
+
+static inline void SET_AlphaFragmentOp3ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_AlphaFragmentOp3ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginFragmentShaderATI)(void);
+#define CALL_BeginFragmentShaderATI(disp, parameters) \
+ (* GET_BeginFragmentShaderATI(disp)) parameters
+static inline _glptr_BeginFragmentShaderATI GET_BeginFragmentShaderATI(struct _glapi_table *disp) {
+ return (_glptr_BeginFragmentShaderATI) (GET_by_offset(disp, _gloffset_BeginFragmentShaderATI));
+}
+
+static inline void SET_BeginFragmentShaderATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_BeginFragmentShaderATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindFragmentShaderATI)(GLuint);
+#define CALL_BindFragmentShaderATI(disp, parameters) \
+ (* GET_BindFragmentShaderATI(disp)) parameters
+static inline _glptr_BindFragmentShaderATI GET_BindFragmentShaderATI(struct _glapi_table *disp) {
+ return (_glptr_BindFragmentShaderATI) (GET_by_offset(disp, _gloffset_BindFragmentShaderATI));
+}
+
+static inline void SET_BindFragmentShaderATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_BindFragmentShaderATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorFragmentOp1ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_ColorFragmentOp1ATI(disp, parameters) \
+ (* GET_ColorFragmentOp1ATI(disp)) parameters
+static inline _glptr_ColorFragmentOp1ATI GET_ColorFragmentOp1ATI(struct _glapi_table *disp) {
+ return (_glptr_ColorFragmentOp1ATI) (GET_by_offset(disp, _gloffset_ColorFragmentOp1ATI));
+}
+
+static inline void SET_ColorFragmentOp1ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ColorFragmentOp1ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorFragmentOp2ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_ColorFragmentOp2ATI(disp, parameters) \
+ (* GET_ColorFragmentOp2ATI(disp)) parameters
+static inline _glptr_ColorFragmentOp2ATI GET_ColorFragmentOp2ATI(struct _glapi_table *disp) {
+ return (_glptr_ColorFragmentOp2ATI) (GET_by_offset(disp, _gloffset_ColorFragmentOp2ATI));
+}
+
+static inline void SET_ColorFragmentOp2ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ColorFragmentOp2ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ColorFragmentOp3ATI)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_ColorFragmentOp3ATI(disp, parameters) \
+ (* GET_ColorFragmentOp3ATI(disp)) parameters
+static inline _glptr_ColorFragmentOp3ATI GET_ColorFragmentOp3ATI(struct _glapi_table *disp) {
+ return (_glptr_ColorFragmentOp3ATI) (GET_by_offset(disp, _gloffset_ColorFragmentOp3ATI));
+}
+
+static inline void SET_ColorFragmentOp3ATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ColorFragmentOp3ATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteFragmentShaderATI)(GLuint);
+#define CALL_DeleteFragmentShaderATI(disp, parameters) \
+ (* GET_DeleteFragmentShaderATI(disp)) parameters
+static inline _glptr_DeleteFragmentShaderATI GET_DeleteFragmentShaderATI(struct _glapi_table *disp) {
+ return (_glptr_DeleteFragmentShaderATI) (GET_by_offset(disp, _gloffset_DeleteFragmentShaderATI));
+}
+
+static inline void SET_DeleteFragmentShaderATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_DeleteFragmentShaderATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndFragmentShaderATI)(void);
+#define CALL_EndFragmentShaderATI(disp, parameters) \
+ (* GET_EndFragmentShaderATI(disp)) parameters
+static inline _glptr_EndFragmentShaderATI GET_EndFragmentShaderATI(struct _glapi_table *disp) {
+ return (_glptr_EndFragmentShaderATI) (GET_by_offset(disp, _gloffset_EndFragmentShaderATI));
+}
+
+static inline void SET_EndFragmentShaderATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_EndFragmentShaderATI, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_GenFragmentShadersATI)(GLuint);
+#define CALL_GenFragmentShadersATI(disp, parameters) \
+ (* GET_GenFragmentShadersATI(disp)) parameters
+static inline _glptr_GenFragmentShadersATI GET_GenFragmentShadersATI(struct _glapi_table *disp) {
+ return (_glptr_GenFragmentShadersATI) (GET_by_offset(disp, _gloffset_GenFragmentShadersATI));
+}
+
+static inline void SET_GenFragmentShadersATI(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_GenFragmentShadersATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PassTexCoordATI)(GLuint, GLuint, GLenum);
+#define CALL_PassTexCoordATI(disp, parameters) \
+ (* GET_PassTexCoordATI(disp)) parameters
+static inline _glptr_PassTexCoordATI GET_PassTexCoordATI(struct _glapi_table *disp) {
+ return (_glptr_PassTexCoordATI) (GET_by_offset(disp, _gloffset_PassTexCoordATI));
+}
+
+static inline void SET_PassTexCoordATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_PassTexCoordATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SampleMapATI)(GLuint, GLuint, GLenum);
+#define CALL_SampleMapATI(disp, parameters) \
+ (* GET_SampleMapATI(disp)) parameters
+static inline _glptr_SampleMapATI GET_SampleMapATI(struct _glapi_table *disp) {
+ return (_glptr_SampleMapATI) (GET_by_offset(disp, _gloffset_SampleMapATI));
+}
+
+static inline void SET_SampleMapATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_SampleMapATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SetFragmentShaderConstantATI)(GLuint, const GLfloat *);
+#define CALL_SetFragmentShaderConstantATI(disp, parameters) \
+ (* GET_SetFragmentShaderConstantATI(disp)) parameters
+static inline _glptr_SetFragmentShaderConstantATI GET_SetFragmentShaderConstantATI(struct _glapi_table *disp) {
+ return (_glptr_SetFragmentShaderConstantATI) (GET_by_offset(disp, _gloffset_SetFragmentShaderConstantATI));
+}
+
+static inline void SET_SetFragmentShaderConstantATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_SetFragmentShaderConstantATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangeArrayfvOES)(GLuint, GLsizei, const GLfloat *);
+#define CALL_DepthRangeArrayfvOES(disp, parameters) \
+ (* GET_DepthRangeArrayfvOES(disp)) parameters
+static inline _glptr_DepthRangeArrayfvOES GET_DepthRangeArrayfvOES(struct _glapi_table *disp) {
+ return (_glptr_DepthRangeArrayfvOES) (GET_by_offset(disp, _gloffset_DepthRangeArrayfvOES));
+}
+
+static inline void SET_DepthRangeArrayfvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_DepthRangeArrayfvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangeIndexedfOES)(GLuint, GLfloat, GLfloat);
+#define CALL_DepthRangeIndexedfOES(disp, parameters) \
+ (* GET_DepthRangeIndexedfOES(disp)) parameters
+static inline _glptr_DepthRangeIndexedfOES GET_DepthRangeIndexedfOES(struct _glapi_table *disp) {
+ return (_glptr_DepthRangeIndexedfOES) (GET_by_offset(disp, _gloffset_DepthRangeIndexedfOES));
+}
+
+static inline void SET_DepthRangeIndexedfOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_DepthRangeIndexedfOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ActiveStencilFaceEXT)(GLenum);
+#define CALL_ActiveStencilFaceEXT(disp, parameters) \
+ (* GET_ActiveStencilFaceEXT(disp)) parameters
+static inline _glptr_ActiveStencilFaceEXT GET_ActiveStencilFaceEXT(struct _glapi_table *disp) {
+ return (_glptr_ActiveStencilFaceEXT) (GET_by_offset(disp, _gloffset_ActiveStencilFaceEXT));
+}
+
+static inline void SET_ActiveStencilFaceEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum)) {
+ SET_by_offset(disp, _gloffset_ActiveStencilFaceEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramNamedParameterdvNV)(GLuint, GLsizei, const GLubyte *, GLdouble *);
+#define CALL_GetProgramNamedParameterdvNV(disp, parameters) \
+ (* GET_GetProgramNamedParameterdvNV(disp)) parameters
+static inline _glptr_GetProgramNamedParameterdvNV GET_GetProgramNamedParameterdvNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramNamedParameterdvNV) (GET_by_offset(disp, _gloffset_GetProgramNamedParameterdvNV));
+}
+
+static inline void SET_GetProgramNamedParameterdvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, GLdouble *)) {
+ SET_by_offset(disp, _gloffset_GetProgramNamedParameterdvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetProgramNamedParameterfvNV)(GLuint, GLsizei, const GLubyte *, GLfloat *);
+#define CALL_GetProgramNamedParameterfvNV(disp, parameters) \
+ (* GET_GetProgramNamedParameterfvNV(disp)) parameters
+static inline _glptr_GetProgramNamedParameterfvNV GET_GetProgramNamedParameterfvNV(struct _glapi_table *disp) {
+ return (_glptr_GetProgramNamedParameterfvNV) (GET_by_offset(disp, _gloffset_GetProgramNamedParameterfvNV));
+}
+
+static inline void SET_GetProgramNamedParameterfvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetProgramNamedParameterfvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramNamedParameter4dNV)(GLuint, GLsizei, const GLubyte *, GLdouble, GLdouble, GLdouble, GLdouble);
+#define CALL_ProgramNamedParameter4dNV(disp, parameters) \
+ (* GET_ProgramNamedParameter4dNV(disp)) parameters
+static inline _glptr_ProgramNamedParameter4dNV GET_ProgramNamedParameter4dNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramNamedParameter4dNV) (GET_by_offset(disp, _gloffset_ProgramNamedParameter4dNV));
+}
+
+static inline void SET_ProgramNamedParameter4dNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, GLdouble, GLdouble, GLdouble, GLdouble)) {
+ SET_by_offset(disp, _gloffset_ProgramNamedParameter4dNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramNamedParameter4dvNV)(GLuint, GLsizei, const GLubyte *, const GLdouble *);
+#define CALL_ProgramNamedParameter4dvNV(disp, parameters) \
+ (* GET_ProgramNamedParameter4dvNV(disp)) parameters
+static inline _glptr_ProgramNamedParameter4dvNV GET_ProgramNamedParameter4dvNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramNamedParameter4dvNV) (GET_by_offset(disp, _gloffset_ProgramNamedParameter4dvNV));
+}
+
+static inline void SET_ProgramNamedParameter4dvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, const GLdouble *)) {
+ SET_by_offset(disp, _gloffset_ProgramNamedParameter4dvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramNamedParameter4fNV)(GLuint, GLsizei, const GLubyte *, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_ProgramNamedParameter4fNV(disp, parameters) \
+ (* GET_ProgramNamedParameter4fNV(disp)) parameters
+static inline _glptr_ProgramNamedParameter4fNV GET_ProgramNamedParameter4fNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramNamedParameter4fNV) (GET_by_offset(disp, _gloffset_ProgramNamedParameter4fNV));
+}
+
+static inline void SET_ProgramNamedParameter4fNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_ProgramNamedParameter4fNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramNamedParameter4fvNV)(GLuint, GLsizei, const GLubyte *, const GLfloat *);
+#define CALL_ProgramNamedParameter4fvNV(disp, parameters) \
+ (* GET_ProgramNamedParameter4fvNV(disp)) parameters
+static inline _glptr_ProgramNamedParameter4fvNV GET_ProgramNamedParameter4fvNV(struct _glapi_table *disp) {
+ return (_glptr_ProgramNamedParameter4fvNV) (GET_by_offset(disp, _gloffset_ProgramNamedParameter4fvNV));
+}
+
+static inline void SET_ProgramNamedParameter4fvNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, const GLubyte *, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramNamedParameter4fvNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PrimitiveRestartNV)(void);
+#define CALL_PrimitiveRestartNV(disp, parameters) \
+ (* GET_PrimitiveRestartNV(disp)) parameters
+static inline _glptr_PrimitiveRestartNV GET_PrimitiveRestartNV(struct _glapi_table *disp) {
+ return (_glptr_PrimitiveRestartNV) (GET_by_offset(disp, _gloffset_PrimitiveRestartNV));
+}
+
+static inline void SET_PrimitiveRestartNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_PrimitiveRestartNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexGenxvOES)(GLenum, GLenum, GLfixed *);
+#define CALL_GetTexGenxvOES(disp, parameters) \
+ (* GET_GetTexGenxvOES(disp)) parameters
+static inline _glptr_GetTexGenxvOES GET_GetTexGenxvOES(struct _glapi_table *disp) {
+ return (_glptr_GetTexGenxvOES) (GET_by_offset(disp, _gloffset_GetTexGenxvOES));
+}
+
+static inline void SET_GetTexGenxvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetTexGenxvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGenxOES)(GLenum, GLenum, GLint);
+#define CALL_TexGenxOES(disp, parameters) \
+ (* GET_TexGenxOES(disp)) parameters
+static inline _glptr_TexGenxOES GET_TexGenxOES(struct _glapi_table *disp) {
+ return (_glptr_TexGenxOES) (GET_by_offset(disp, _gloffset_TexGenxOES));
+}
+
+static inline void SET_TexGenxOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_TexGenxOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexGenxvOES)(GLenum, GLenum, const GLfixed *);
+#define CALL_TexGenxvOES(disp, parameters) \
+ (* GET_TexGenxvOES(disp)) parameters
+static inline _glptr_TexGenxvOES GET_TexGenxvOES(struct _glapi_table *disp) {
+ return (_glptr_TexGenxvOES) (GET_by_offset(disp, _gloffset_TexGenxvOES));
+}
+
+static inline void SET_TexGenxvOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_TexGenxvOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthBoundsEXT)(GLclampd, GLclampd);
+#define CALL_DepthBoundsEXT(disp, parameters) \
+ (* GET_DepthBoundsEXT(disp)) parameters
+static inline _glptr_DepthBoundsEXT GET_DepthBoundsEXT(struct _glapi_table *disp) {
+ return (_glptr_DepthBoundsEXT) (GET_by_offset(disp, _gloffset_DepthBoundsEXT));
+}
+
+static inline void SET_DepthBoundsEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampd, GLclampd)) {
+ SET_by_offset(disp, _gloffset_DepthBoundsEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindFramebufferEXT)(GLenum, GLuint);
+#define CALL_BindFramebufferEXT(disp, parameters) \
+ (* GET_BindFramebufferEXT(disp)) parameters
+static inline _glptr_BindFramebufferEXT GET_BindFramebufferEXT(struct _glapi_table *disp) {
+ return (_glptr_BindFramebufferEXT) (GET_by_offset(disp, _gloffset_BindFramebufferEXT));
+}
+
+static inline void SET_BindFramebufferEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindFramebufferEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindRenderbufferEXT)(GLenum, GLuint);
+#define CALL_BindRenderbufferEXT(disp, parameters) \
+ (* GET_BindRenderbufferEXT(disp)) parameters
+static inline _glptr_BindRenderbufferEXT GET_BindRenderbufferEXT(struct _glapi_table *disp) {
+ return (_glptr_BindRenderbufferEXT) (GET_by_offset(disp, _gloffset_BindRenderbufferEXT));
+}
+
+static inline void SET_BindRenderbufferEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_BindRenderbufferEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StringMarkerGREMEDY)(GLsizei, const GLvoid *);
+#define CALL_StringMarkerGREMEDY(disp, parameters) \
+ (* GET_StringMarkerGREMEDY(disp)) parameters
+static inline _glptr_StringMarkerGREMEDY GET_StringMarkerGREMEDY(struct _glapi_table *disp) {
+ return (_glptr_StringMarkerGREMEDY) (GET_by_offset(disp, _gloffset_StringMarkerGREMEDY));
+}
+
+static inline void SET_StringMarkerGREMEDY(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_StringMarkerGREMEDY, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferParameteriAPPLE)(GLenum, GLenum, GLint);
+#define CALL_BufferParameteriAPPLE(disp, parameters) \
+ (* GET_BufferParameteriAPPLE(disp)) parameters
+static inline _glptr_BufferParameteriAPPLE GET_BufferParameteriAPPLE(struct _glapi_table *disp) {
+ return (_glptr_BufferParameteriAPPLE) (GET_by_offset(disp, _gloffset_BufferParameteriAPPLE));
+}
+
+static inline void SET_BufferParameteriAPPLE(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_BufferParameteriAPPLE, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_FlushMappedBufferRangeAPPLE)(GLenum, GLintptr, GLsizeiptr);
+#define CALL_FlushMappedBufferRangeAPPLE(disp, parameters) \
+ (* GET_FlushMappedBufferRangeAPPLE(disp)) parameters
+static inline _glptr_FlushMappedBufferRangeAPPLE GET_FlushMappedBufferRangeAPPLE(struct _glapi_table *disp) {
+ return (_glptr_FlushMappedBufferRangeAPPLE) (GET_by_offset(disp, _gloffset_FlushMappedBufferRangeAPPLE));
+}
+
+static inline void SET_FlushMappedBufferRangeAPPLE(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLintptr, GLsizeiptr)) {
+ SET_by_offset(disp, _gloffset_FlushMappedBufferRangeAPPLE, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI1iEXT)(GLuint, GLint);
+#define CALL_VertexAttribI1iEXT(disp, parameters) \
+ (* GET_VertexAttribI1iEXT(disp)) parameters
+static inline _glptr_VertexAttribI1iEXT GET_VertexAttribI1iEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI1iEXT) (GET_by_offset(disp, _gloffset_VertexAttribI1iEXT));
+}
+
+static inline void SET_VertexAttribI1iEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI1iEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI1uiEXT)(GLuint, GLuint);
+#define CALL_VertexAttribI1uiEXT(disp, parameters) \
+ (* GET_VertexAttribI1uiEXT(disp)) parameters
+static inline _glptr_VertexAttribI1uiEXT GET_VertexAttribI1uiEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI1uiEXT) (GET_by_offset(disp, _gloffset_VertexAttribI1uiEXT));
+}
+
+static inline void SET_VertexAttribI1uiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI1uiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI2iEXT)(GLuint, GLint, GLint);
+#define CALL_VertexAttribI2iEXT(disp, parameters) \
+ (* GET_VertexAttribI2iEXT(disp)) parameters
+static inline _glptr_VertexAttribI2iEXT GET_VertexAttribI2iEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI2iEXT) (GET_by_offset(disp, _gloffset_VertexAttribI2iEXT));
+}
+
+static inline void SET_VertexAttribI2iEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI2iEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI2ivEXT)(GLuint, const GLint *);
+#define CALL_VertexAttribI2ivEXT(disp, parameters) \
+ (* GET_VertexAttribI2ivEXT(disp)) parameters
+static inline _glptr_VertexAttribI2ivEXT GET_VertexAttribI2ivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI2ivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI2ivEXT));
+}
+
+static inline void SET_VertexAttribI2ivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI2ivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI2uiEXT)(GLuint, GLuint, GLuint);
+#define CALL_VertexAttribI2uiEXT(disp, parameters) \
+ (* GET_VertexAttribI2uiEXT(disp)) parameters
+static inline _glptr_VertexAttribI2uiEXT GET_VertexAttribI2uiEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI2uiEXT) (GET_by_offset(disp, _gloffset_VertexAttribI2uiEXT));
+}
+
+static inline void SET_VertexAttribI2uiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI2uiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI2uivEXT)(GLuint, const GLuint *);
+#define CALL_VertexAttribI2uivEXT(disp, parameters) \
+ (* GET_VertexAttribI2uivEXT(disp)) parameters
+static inline _glptr_VertexAttribI2uivEXT GET_VertexAttribI2uivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI2uivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI2uivEXT));
+}
+
+static inline void SET_VertexAttribI2uivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI2uivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI3iEXT)(GLuint, GLint, GLint, GLint);
+#define CALL_VertexAttribI3iEXT(disp, parameters) \
+ (* GET_VertexAttribI3iEXT(disp)) parameters
+static inline _glptr_VertexAttribI3iEXT GET_VertexAttribI3iEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI3iEXT) (GET_by_offset(disp, _gloffset_VertexAttribI3iEXT));
+}
+
+static inline void SET_VertexAttribI3iEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI3iEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI3ivEXT)(GLuint, const GLint *);
+#define CALL_VertexAttribI3ivEXT(disp, parameters) \
+ (* GET_VertexAttribI3ivEXT(disp)) parameters
+static inline _glptr_VertexAttribI3ivEXT GET_VertexAttribI3ivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI3ivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI3ivEXT));
+}
+
+static inline void SET_VertexAttribI3ivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI3ivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI3uiEXT)(GLuint, GLuint, GLuint, GLuint);
+#define CALL_VertexAttribI3uiEXT(disp, parameters) \
+ (* GET_VertexAttribI3uiEXT(disp)) parameters
+static inline _glptr_VertexAttribI3uiEXT GET_VertexAttribI3uiEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI3uiEXT) (GET_by_offset(disp, _gloffset_VertexAttribI3uiEXT));
+}
+
+static inline void SET_VertexAttribI3uiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI3uiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI3uivEXT)(GLuint, const GLuint *);
+#define CALL_VertexAttribI3uivEXT(disp, parameters) \
+ (* GET_VertexAttribI3uivEXT(disp)) parameters
+static inline _glptr_VertexAttribI3uivEXT GET_VertexAttribI3uivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI3uivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI3uivEXT));
+}
+
+static inline void SET_VertexAttribI3uivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI3uivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4iEXT)(GLuint, GLint, GLint, GLint, GLint);
+#define CALL_VertexAttribI4iEXT(disp, parameters) \
+ (* GET_VertexAttribI4iEXT(disp)) parameters
+static inline _glptr_VertexAttribI4iEXT GET_VertexAttribI4iEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4iEXT) (GET_by_offset(disp, _gloffset_VertexAttribI4iEXT));
+}
+
+static inline void SET_VertexAttribI4iEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4iEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4ivEXT)(GLuint, const GLint *);
+#define CALL_VertexAttribI4ivEXT(disp, parameters) \
+ (* GET_VertexAttribI4ivEXT(disp)) parameters
+static inline _glptr_VertexAttribI4ivEXT GET_VertexAttribI4ivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4ivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI4ivEXT));
+}
+
+static inline void SET_VertexAttribI4ivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4ivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4uiEXT)(GLuint, GLuint, GLuint, GLuint, GLuint);
+#define CALL_VertexAttribI4uiEXT(disp, parameters) \
+ (* GET_VertexAttribI4uiEXT(disp)) parameters
+static inline _glptr_VertexAttribI4uiEXT GET_VertexAttribI4uiEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4uiEXT) (GET_by_offset(disp, _gloffset_VertexAttribI4uiEXT));
+}
+
+static inline void SET_VertexAttribI4uiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4uiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VertexAttribI4uivEXT)(GLuint, const GLuint *);
+#define CALL_VertexAttribI4uivEXT(disp, parameters) \
+ (* GET_VertexAttribI4uivEXT(disp)) parameters
+static inline _glptr_VertexAttribI4uivEXT GET_VertexAttribI4uivEXT(struct _glapi_table *disp) {
+ return (_glptr_VertexAttribI4uivEXT) (GET_by_offset(disp, _gloffset_VertexAttribI4uivEXT));
+}
+
+static inline void SET_VertexAttribI4uivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VertexAttribI4uivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearColorIiEXT)(GLint, GLint, GLint, GLint);
+#define CALL_ClearColorIiEXT(disp, parameters) \
+ (* GET_ClearColorIiEXT(disp)) parameters
+static inline _glptr_ClearColorIiEXT GET_ClearColorIiEXT(struct _glapi_table *disp) {
+ return (_glptr_ClearColorIiEXT) (GET_by_offset(disp, _gloffset_ClearColorIiEXT));
+}
+
+static inline void SET_ClearColorIiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint, GLint, GLint, GLint)) {
+ SET_by_offset(disp, _gloffset_ClearColorIiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearColorIuiEXT)(GLuint, GLuint, GLuint, GLuint);
+#define CALL_ClearColorIuiEXT(disp, parameters) \
+ (* GET_ClearColorIuiEXT(disp)) parameters
+static inline _glptr_ClearColorIuiEXT GET_ClearColorIuiEXT(struct _glapi_table *disp) {
+ return (_glptr_ClearColorIuiEXT) (GET_by_offset(disp, _gloffset_ClearColorIuiEXT));
+}
+
+static inline void SET_ClearColorIuiEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLuint)) {
+ SET_by_offset(disp, _gloffset_ClearColorIuiEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BindBufferOffsetEXT)(GLenum, GLuint, GLuint, GLintptr);
+#define CALL_BindBufferOffsetEXT(disp, parameters) \
+ (* GET_BindBufferOffsetEXT(disp)) parameters
+static inline _glptr_BindBufferOffsetEXT GET_BindBufferOffsetEXT(struct _glapi_table *disp) {
+ return (_glptr_BindBufferOffsetEXT) (GET_by_offset(disp, _gloffset_BindBufferOffsetEXT));
+}
+
+static inline void SET_BindBufferOffsetEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLuint, GLintptr)) {
+ SET_by_offset(disp, _gloffset_BindBufferOffsetEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginPerfMonitorAMD)(GLuint);
+#define CALL_BeginPerfMonitorAMD(disp, parameters) \
+ (* GET_BeginPerfMonitorAMD(disp)) parameters
+static inline _glptr_BeginPerfMonitorAMD GET_BeginPerfMonitorAMD(struct _glapi_table *disp) {
+ return (_glptr_BeginPerfMonitorAMD) (GET_by_offset(disp, _gloffset_BeginPerfMonitorAMD));
+}
+
+static inline void SET_BeginPerfMonitorAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_BeginPerfMonitorAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeletePerfMonitorsAMD)(GLsizei, GLuint *);
+#define CALL_DeletePerfMonitorsAMD(disp, parameters) \
+ (* GET_DeletePerfMonitorsAMD(disp)) parameters
+static inline _glptr_DeletePerfMonitorsAMD GET_DeletePerfMonitorsAMD(struct _glapi_table *disp) {
+ return (_glptr_DeletePerfMonitorsAMD) (GET_by_offset(disp, _gloffset_DeletePerfMonitorsAMD));
+}
+
+static inline void SET_DeletePerfMonitorsAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeletePerfMonitorsAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndPerfMonitorAMD)(GLuint);
+#define CALL_EndPerfMonitorAMD(disp, parameters) \
+ (* GET_EndPerfMonitorAMD(disp)) parameters
+static inline _glptr_EndPerfMonitorAMD GET_EndPerfMonitorAMD(struct _glapi_table *disp) {
+ return (_glptr_EndPerfMonitorAMD) (GET_by_offset(disp, _gloffset_EndPerfMonitorAMD));
+}
+
+static inline void SET_EndPerfMonitorAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_EndPerfMonitorAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenPerfMonitorsAMD)(GLsizei, GLuint *);
+#define CALL_GenPerfMonitorsAMD(disp, parameters) \
+ (* GET_GenPerfMonitorsAMD(disp)) parameters
+static inline _glptr_GenPerfMonitorsAMD GET_GenPerfMonitorsAMD(struct _glapi_table *disp) {
+ return (_glptr_GenPerfMonitorsAMD) (GET_by_offset(disp, _gloffset_GenPerfMonitorsAMD));
+}
+
+static inline void SET_GenPerfMonitorsAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenPerfMonitorsAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorCounterDataAMD)(GLuint, GLenum, GLsizei, GLuint *, GLint *);
+#define CALL_GetPerfMonitorCounterDataAMD(disp, parameters) \
+ (* GET_GetPerfMonitorCounterDataAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorCounterDataAMD GET_GetPerfMonitorCounterDataAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorCounterDataAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorCounterDataAMD));
+}
+
+static inline void SET_GetPerfMonitorCounterDataAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLsizei, GLuint *, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorCounterDataAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorCounterInfoAMD)(GLuint, GLuint, GLenum, GLvoid *);
+#define CALL_GetPerfMonitorCounterInfoAMD(disp, parameters) \
+ (* GET_GetPerfMonitorCounterInfoAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorCounterInfoAMD GET_GetPerfMonitorCounterInfoAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorCounterInfoAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorCounterInfoAMD));
+}
+
+static inline void SET_GetPerfMonitorCounterInfoAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorCounterInfoAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorCounterStringAMD)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetPerfMonitorCounterStringAMD(disp, parameters) \
+ (* GET_GetPerfMonitorCounterStringAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorCounterStringAMD GET_GetPerfMonitorCounterStringAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorCounterStringAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorCounterStringAMD));
+}
+
+static inline void SET_GetPerfMonitorCounterStringAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorCounterStringAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorCountersAMD)(GLuint, GLint *, GLint *, GLsizei, GLuint *);
+#define CALL_GetPerfMonitorCountersAMD(disp, parameters) \
+ (* GET_GetPerfMonitorCountersAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorCountersAMD GET_GetPerfMonitorCountersAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorCountersAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorCountersAMD));
+}
+
+static inline void SET_GetPerfMonitorCountersAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLint *, GLint *, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorCountersAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorGroupStringAMD)(GLuint, GLsizei, GLsizei *, GLchar *);
+#define CALL_GetPerfMonitorGroupStringAMD(disp, parameters) \
+ (* GET_GetPerfMonitorGroupStringAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorGroupStringAMD GET_GetPerfMonitorGroupStringAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorGroupStringAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorGroupStringAMD));
+}
+
+static inline void SET_GetPerfMonitorGroupStringAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLsizei *, GLchar *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorGroupStringAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfMonitorGroupsAMD)(GLint *, GLsizei, GLuint *);
+#define CALL_GetPerfMonitorGroupsAMD(disp, parameters) \
+ (* GET_GetPerfMonitorGroupsAMD(disp)) parameters
+static inline _glptr_GetPerfMonitorGroupsAMD GET_GetPerfMonitorGroupsAMD(struct _glapi_table *disp) {
+ return (_glptr_GetPerfMonitorGroupsAMD) (GET_by_offset(disp, _gloffset_GetPerfMonitorGroupsAMD));
+}
+
+static inline void SET_GetPerfMonitorGroupsAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLint *, GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfMonitorGroupsAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SelectPerfMonitorCountersAMD)(GLuint, GLboolean, GLuint, GLint, GLuint *);
+#define CALL_SelectPerfMonitorCountersAMD(disp, parameters) \
+ (* GET_SelectPerfMonitorCountersAMD(disp)) parameters
+static inline _glptr_SelectPerfMonitorCountersAMD GET_SelectPerfMonitorCountersAMD(struct _glapi_table *disp) {
+ return (_glptr_SelectPerfMonitorCountersAMD) (GET_by_offset(disp, _gloffset_SelectPerfMonitorCountersAMD));
+}
+
+static inline void SET_SelectPerfMonitorCountersAMD(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLboolean, GLuint, GLint, GLuint *)) {
+ SET_by_offset(disp, _gloffset_SelectPerfMonitorCountersAMD, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetObjectParameterivAPPLE)(GLenum, GLuint, GLenum, GLint *);
+#define CALL_GetObjectParameterivAPPLE(disp, parameters) \
+ (* GET_GetObjectParameterivAPPLE(disp)) parameters
+static inline _glptr_GetObjectParameterivAPPLE GET_GetObjectParameterivAPPLE(struct _glapi_table *disp) {
+ return (_glptr_GetObjectParameterivAPPLE) (GET_by_offset(disp, _gloffset_GetObjectParameterivAPPLE));
+}
+
+static inline void SET_GetObjectParameterivAPPLE(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetObjectParameterivAPPLE, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_ObjectPurgeableAPPLE)(GLenum, GLuint, GLenum);
+#define CALL_ObjectPurgeableAPPLE(disp, parameters) \
+ (* GET_ObjectPurgeableAPPLE(disp)) parameters
+static inline _glptr_ObjectPurgeableAPPLE GET_ObjectPurgeableAPPLE(struct _glapi_table *disp) {
+ return (_glptr_ObjectPurgeableAPPLE) (GET_by_offset(disp, _gloffset_ObjectPurgeableAPPLE));
+}
+
+static inline void SET_ObjectPurgeableAPPLE(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(GLenum, GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_ObjectPurgeableAPPLE, fn);
+}
+
+typedef GLenum (GLAPIENTRYP _glptr_ObjectUnpurgeableAPPLE)(GLenum, GLuint, GLenum);
+#define CALL_ObjectUnpurgeableAPPLE(disp, parameters) \
+ (* GET_ObjectUnpurgeableAPPLE(disp)) parameters
+static inline _glptr_ObjectUnpurgeableAPPLE GET_ObjectUnpurgeableAPPLE(struct _glapi_table *disp) {
+ return (_glptr_ObjectUnpurgeableAPPLE) (GET_by_offset(disp, _gloffset_ObjectUnpurgeableAPPLE));
+}
+
+static inline void SET_ObjectUnpurgeableAPPLE(struct _glapi_table *disp, GLenum (GLAPIENTRYP fn)(GLenum, GLuint, GLenum)) {
+ SET_by_offset(disp, _gloffset_ObjectUnpurgeableAPPLE, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ActiveProgramEXT)(GLuint);
+#define CALL_ActiveProgramEXT(disp, parameters) \
+ (* GET_ActiveProgramEXT(disp)) parameters
+static inline _glptr_ActiveProgramEXT GET_ActiveProgramEXT(struct _glapi_table *disp) {
+ return (_glptr_ActiveProgramEXT) (GET_by_offset(disp, _gloffset_ActiveProgramEXT));
+}
+
+static inline void SET_ActiveProgramEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_ActiveProgramEXT, fn);
+}
+
+typedef GLuint (GLAPIENTRYP _glptr_CreateShaderProgramEXT)(GLenum, const GLchar *);
+#define CALL_CreateShaderProgramEXT(disp, parameters) \
+ (* GET_CreateShaderProgramEXT(disp)) parameters
+static inline _glptr_CreateShaderProgramEXT GET_CreateShaderProgramEXT(struct _glapi_table *disp) {
+ return (_glptr_CreateShaderProgramEXT) (GET_by_offset(disp, _gloffset_CreateShaderProgramEXT));
+}
+
+static inline void SET_CreateShaderProgramEXT(struct _glapi_table *disp, GLuint (GLAPIENTRYP fn)(GLenum, const GLchar *)) {
+ SET_by_offset(disp, _gloffset_CreateShaderProgramEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_UseShaderProgramEXT)(GLenum, GLuint);
+#define CALL_UseShaderProgramEXT(disp, parameters) \
+ (* GET_UseShaderProgramEXT(disp)) parameters
+static inline _glptr_UseShaderProgramEXT GET_UseShaderProgramEXT(struct _glapi_table *disp) {
+ return (_glptr_UseShaderProgramEXT) (GET_by_offset(disp, _gloffset_UseShaderProgramEXT));
+}
+
+static inline void SET_UseShaderProgramEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint)) {
+ SET_by_offset(disp, _gloffset_UseShaderProgramEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureBarrierNV)(void);
+#define CALL_TextureBarrierNV(disp, parameters) \
+ (* GET_TextureBarrierNV(disp)) parameters
+static inline _glptr_TextureBarrierNV GET_TextureBarrierNV(struct _glapi_table *disp) {
+ return (_glptr_TextureBarrierNV) (GET_by_offset(disp, _gloffset_TextureBarrierNV));
+}
+
+static inline void SET_TextureBarrierNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_TextureBarrierNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUFiniNV)(void);
+#define CALL_VDPAUFiniNV(disp, parameters) \
+ (* GET_VDPAUFiniNV(disp)) parameters
+static inline _glptr_VDPAUFiniNV GET_VDPAUFiniNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUFiniNV) (GET_by_offset(disp, _gloffset_VDPAUFiniNV));
+}
+
+static inline void SET_VDPAUFiniNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_VDPAUFiniNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUGetSurfaceivNV)(GLintptr, GLenum, GLsizei, GLsizei *, GLint *);
+#define CALL_VDPAUGetSurfaceivNV(disp, parameters) \
+ (* GET_VDPAUGetSurfaceivNV(disp)) parameters
+static inline _glptr_VDPAUGetSurfaceivNV GET_VDPAUGetSurfaceivNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUGetSurfaceivNV) (GET_by_offset(disp, _gloffset_VDPAUGetSurfaceivNV));
+}
+
+static inline void SET_VDPAUGetSurfaceivNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLintptr, GLenum, GLsizei, GLsizei *, GLint *)) {
+ SET_by_offset(disp, _gloffset_VDPAUGetSurfaceivNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUInitNV)(const GLvoid *, const GLvoid *);
+#define CALL_VDPAUInitNV(disp, parameters) \
+ (* GET_VDPAUInitNV(disp)) parameters
+static inline _glptr_VDPAUInitNV GET_VDPAUInitNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUInitNV) (GET_by_offset(disp, _gloffset_VDPAUInitNV));
+}
+
+static inline void SET_VDPAUInitNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLvoid *, const GLvoid *)) {
+ SET_by_offset(disp, _gloffset_VDPAUInitNV, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_VDPAUIsSurfaceNV)(GLintptr);
+#define CALL_VDPAUIsSurfaceNV(disp, parameters) \
+ (* GET_VDPAUIsSurfaceNV(disp)) parameters
+static inline _glptr_VDPAUIsSurfaceNV GET_VDPAUIsSurfaceNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUIsSurfaceNV) (GET_by_offset(disp, _gloffset_VDPAUIsSurfaceNV));
+}
+
+static inline void SET_VDPAUIsSurfaceNV(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLintptr)) {
+ SET_by_offset(disp, _gloffset_VDPAUIsSurfaceNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUMapSurfacesNV)(GLsizei, const GLintptr *);
+#define CALL_VDPAUMapSurfacesNV(disp, parameters) \
+ (* GET_VDPAUMapSurfacesNV(disp)) parameters
+static inline _glptr_VDPAUMapSurfacesNV GET_VDPAUMapSurfacesNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUMapSurfacesNV) (GET_by_offset(disp, _gloffset_VDPAUMapSurfacesNV));
+}
+
+static inline void SET_VDPAUMapSurfacesNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLintptr *)) {
+ SET_by_offset(disp, _gloffset_VDPAUMapSurfacesNV, fn);
+}
+
+typedef GLintptr (GLAPIENTRYP _glptr_VDPAURegisterOutputSurfaceNV)(const GLvoid *, GLenum, GLsizei, const GLuint *);
+#define CALL_VDPAURegisterOutputSurfaceNV(disp, parameters) \
+ (* GET_VDPAURegisterOutputSurfaceNV(disp)) parameters
+static inline _glptr_VDPAURegisterOutputSurfaceNV GET_VDPAURegisterOutputSurfaceNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAURegisterOutputSurfaceNV) (GET_by_offset(disp, _gloffset_VDPAURegisterOutputSurfaceNV));
+}
+
+static inline void SET_VDPAURegisterOutputSurfaceNV(struct _glapi_table *disp, GLintptr (GLAPIENTRYP fn)(const GLvoid *, GLenum, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VDPAURegisterOutputSurfaceNV, fn);
+}
+
+typedef GLintptr (GLAPIENTRYP _glptr_VDPAURegisterVideoSurfaceNV)(const GLvoid *, GLenum, GLsizei, const GLuint *);
+#define CALL_VDPAURegisterVideoSurfaceNV(disp, parameters) \
+ (* GET_VDPAURegisterVideoSurfaceNV(disp)) parameters
+static inline _glptr_VDPAURegisterVideoSurfaceNV GET_VDPAURegisterVideoSurfaceNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAURegisterVideoSurfaceNV) (GET_by_offset(disp, _gloffset_VDPAURegisterVideoSurfaceNV));
+}
+
+static inline void SET_VDPAURegisterVideoSurfaceNV(struct _glapi_table *disp, GLintptr (GLAPIENTRYP fn)(const GLvoid *, GLenum, GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_VDPAURegisterVideoSurfaceNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUSurfaceAccessNV)(GLintptr, GLenum);
+#define CALL_VDPAUSurfaceAccessNV(disp, parameters) \
+ (* GET_VDPAUSurfaceAccessNV(disp)) parameters
+static inline _glptr_VDPAUSurfaceAccessNV GET_VDPAUSurfaceAccessNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUSurfaceAccessNV) (GET_by_offset(disp, _gloffset_VDPAUSurfaceAccessNV));
+}
+
+static inline void SET_VDPAUSurfaceAccessNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLintptr, GLenum)) {
+ SET_by_offset(disp, _gloffset_VDPAUSurfaceAccessNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUUnmapSurfacesNV)(GLsizei, const GLintptr *);
+#define CALL_VDPAUUnmapSurfacesNV(disp, parameters) \
+ (* GET_VDPAUUnmapSurfacesNV(disp)) parameters
+static inline _glptr_VDPAUUnmapSurfacesNV GET_VDPAUUnmapSurfacesNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUUnmapSurfacesNV) (GET_by_offset(disp, _gloffset_VDPAUUnmapSurfacesNV));
+}
+
+static inline void SET_VDPAUUnmapSurfacesNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLintptr *)) {
+ SET_by_offset(disp, _gloffset_VDPAUUnmapSurfacesNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_VDPAUUnregisterSurfaceNV)(GLintptr);
+#define CALL_VDPAUUnregisterSurfaceNV(disp, parameters) \
+ (* GET_VDPAUUnregisterSurfaceNV(disp)) parameters
+static inline _glptr_VDPAUUnregisterSurfaceNV GET_VDPAUUnregisterSurfaceNV(struct _glapi_table *disp) {
+ return (_glptr_VDPAUUnregisterSurfaceNV) (GET_by_offset(disp, _gloffset_VDPAUUnregisterSurfaceNV));
+}
+
+static inline void SET_VDPAUUnregisterSurfaceNV(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLintptr)) {
+ SET_by_offset(disp, _gloffset_VDPAUUnregisterSurfaceNV, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BeginPerfQueryINTEL)(GLuint);
+#define CALL_BeginPerfQueryINTEL(disp, parameters) \
+ (* GET_BeginPerfQueryINTEL(disp)) parameters
+static inline _glptr_BeginPerfQueryINTEL GET_BeginPerfQueryINTEL(struct _glapi_table *disp) {
+ return (_glptr_BeginPerfQueryINTEL) (GET_by_offset(disp, _gloffset_BeginPerfQueryINTEL));
+}
+
+static inline void SET_BeginPerfQueryINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_BeginPerfQueryINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreatePerfQueryINTEL)(GLuint, GLuint *);
+#define CALL_CreatePerfQueryINTEL(disp, parameters) \
+ (* GET_CreatePerfQueryINTEL(disp)) parameters
+static inline _glptr_CreatePerfQueryINTEL GET_CreatePerfQueryINTEL(struct _glapi_table *disp) {
+ return (_glptr_CreatePerfQueryINTEL) (GET_by_offset(disp, _gloffset_CreatePerfQueryINTEL));
+}
+
+static inline void SET_CreatePerfQueryINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreatePerfQueryINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeletePerfQueryINTEL)(GLuint);
+#define CALL_DeletePerfQueryINTEL(disp, parameters) \
+ (* GET_DeletePerfQueryINTEL(disp)) parameters
+static inline _glptr_DeletePerfQueryINTEL GET_DeletePerfQueryINTEL(struct _glapi_table *disp) {
+ return (_glptr_DeletePerfQueryINTEL) (GET_by_offset(disp, _gloffset_DeletePerfQueryINTEL));
+}
+
+static inline void SET_DeletePerfQueryINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_DeletePerfQueryINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EndPerfQueryINTEL)(GLuint);
+#define CALL_EndPerfQueryINTEL(disp, parameters) \
+ (* GET_EndPerfQueryINTEL(disp)) parameters
+static inline _glptr_EndPerfQueryINTEL GET_EndPerfQueryINTEL(struct _glapi_table *disp) {
+ return (_glptr_EndPerfQueryINTEL) (GET_by_offset(disp, _gloffset_EndPerfQueryINTEL));
+}
+
+static inline void SET_EndPerfQueryINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_EndPerfQueryINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFirstPerfQueryIdINTEL)(GLuint *);
+#define CALL_GetFirstPerfQueryIdINTEL(disp, parameters) \
+ (* GET_GetFirstPerfQueryIdINTEL(disp)) parameters
+static inline _glptr_GetFirstPerfQueryIdINTEL GET_GetFirstPerfQueryIdINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetFirstPerfQueryIdINTEL) (GET_by_offset(disp, _gloffset_GetFirstPerfQueryIdINTEL));
+}
+
+static inline void SET_GetFirstPerfQueryIdINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetFirstPerfQueryIdINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetNextPerfQueryIdINTEL)(GLuint, GLuint *);
+#define CALL_GetNextPerfQueryIdINTEL(disp, parameters) \
+ (* GET_GetNextPerfQueryIdINTEL(disp)) parameters
+static inline _glptr_GetNextPerfQueryIdINTEL GET_GetNextPerfQueryIdINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetNextPerfQueryIdINTEL) (GET_by_offset(disp, _gloffset_GetNextPerfQueryIdINTEL));
+}
+
+static inline void SET_GetNextPerfQueryIdINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetNextPerfQueryIdINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfCounterInfoINTEL)(GLuint, GLuint, GLuint, GLchar *, GLuint, GLchar *, GLuint *, GLuint *, GLuint *, GLuint *, GLuint64 *);
+#define CALL_GetPerfCounterInfoINTEL(disp, parameters) \
+ (* GET_GetPerfCounterInfoINTEL(disp)) parameters
+static inline _glptr_GetPerfCounterInfoINTEL GET_GetPerfCounterInfoINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetPerfCounterInfoINTEL) (GET_by_offset(disp, _gloffset_GetPerfCounterInfoINTEL));
+}
+
+static inline void SET_GetPerfCounterInfoINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLuint, GLchar *, GLuint, GLchar *, GLuint *, GLuint *, GLuint *, GLuint *, GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_GetPerfCounterInfoINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfQueryDataINTEL)(GLuint, GLuint, GLsizei, GLvoid *, GLuint *);
+#define CALL_GetPerfQueryDataINTEL(disp, parameters) \
+ (* GET_GetPerfQueryDataINTEL(disp)) parameters
+static inline _glptr_GetPerfQueryDataINTEL GET_GetPerfQueryDataINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetPerfQueryDataINTEL) (GET_by_offset(disp, _gloffset_GetPerfQueryDataINTEL));
+}
+
+static inline void SET_GetPerfQueryDataINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLsizei, GLvoid *, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfQueryDataINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfQueryIdByNameINTEL)(GLchar *, GLuint *);
+#define CALL_GetPerfQueryIdByNameINTEL(disp, parameters) \
+ (* GET_GetPerfQueryIdByNameINTEL(disp)) parameters
+static inline _glptr_GetPerfQueryIdByNameINTEL GET_GetPerfQueryIdByNameINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetPerfQueryIdByNameINTEL) (GET_by_offset(disp, _gloffset_GetPerfQueryIdByNameINTEL));
+}
+
+static inline void SET_GetPerfQueryIdByNameINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLchar *, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfQueryIdByNameINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetPerfQueryInfoINTEL)(GLuint, GLuint, GLchar *, GLuint *, GLuint *, GLuint *, GLuint *);
+#define CALL_GetPerfQueryInfoINTEL(disp, parameters) \
+ (* GET_GetPerfQueryInfoINTEL(disp)) parameters
+static inline _glptr_GetPerfQueryInfoINTEL GET_GetPerfQueryInfoINTEL(struct _glapi_table *disp) {
+ return (_glptr_GetPerfQueryInfoINTEL) (GET_by_offset(disp, _gloffset_GetPerfQueryInfoINTEL));
+}
+
+static inline void SET_GetPerfQueryInfoINTEL(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, GLchar *, GLuint *, GLuint *, GLuint *, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GetPerfQueryInfoINTEL, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonOffsetClampEXT)(GLfloat, GLfloat, GLfloat);
+#define CALL_PolygonOffsetClampEXT(disp, parameters) \
+ (* GET_PolygonOffsetClampEXT(disp)) parameters
+static inline _glptr_PolygonOffsetClampEXT GET_PolygonOffsetClampEXT(struct _glapi_table *disp) {
+ return (_glptr_PolygonOffsetClampEXT) (GET_by_offset(disp, _gloffset_PolygonOffsetClampEXT));
+}
+
+static inline void SET_PolygonOffsetClampEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PolygonOffsetClampEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WindowRectanglesEXT)(GLenum, GLsizei, const GLint *);
+#define CALL_WindowRectanglesEXT(disp, parameters) \
+ (* GET_WindowRectanglesEXT(disp)) parameters
+static inline _glptr_WindowRectanglesEXT GET_WindowRectanglesEXT(struct _glapi_table *disp) {
+ return (_glptr_WindowRectanglesEXT) (GET_by_offset(disp, _gloffset_WindowRectanglesEXT));
+}
+
+static inline void SET_WindowRectanglesEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, const GLint *)) {
+ SET_by_offset(disp, _gloffset_WindowRectanglesEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BufferStorageMemEXT)(GLenum, GLsizeiptr, GLuint, GLuint64);
+#define CALL_BufferStorageMemEXT(disp, parameters) \
+ (* GET_BufferStorageMemEXT(disp)) parameters
+static inline _glptr_BufferStorageMemEXT GET_BufferStorageMemEXT(struct _glapi_table *disp) {
+ return (_glptr_BufferStorageMemEXT) (GET_by_offset(disp, _gloffset_BufferStorageMemEXT));
+}
+
+static inline void SET_BufferStorageMemEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizeiptr, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_BufferStorageMemEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_CreateMemoryObjectsEXT)(GLsizei, GLuint *);
+#define CALL_CreateMemoryObjectsEXT(disp, parameters) \
+ (* GET_CreateMemoryObjectsEXT(disp)) parameters
+static inline _glptr_CreateMemoryObjectsEXT GET_CreateMemoryObjectsEXT(struct _glapi_table *disp) {
+ return (_glptr_CreateMemoryObjectsEXT) (GET_by_offset(disp, _gloffset_CreateMemoryObjectsEXT));
+}
+
+static inline void SET_CreateMemoryObjectsEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_CreateMemoryObjectsEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteMemoryObjectsEXT)(GLsizei, const GLuint *);
+#define CALL_DeleteMemoryObjectsEXT(disp, parameters) \
+ (* GET_DeleteMemoryObjectsEXT(disp)) parameters
+static inline _glptr_DeleteMemoryObjectsEXT GET_DeleteMemoryObjectsEXT(struct _glapi_table *disp) {
+ return (_glptr_DeleteMemoryObjectsEXT) (GET_by_offset(disp, _gloffset_DeleteMemoryObjectsEXT));
+}
+
+static inline void SET_DeleteMemoryObjectsEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteMemoryObjectsEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DeleteSemaphoresEXT)(GLsizei, const GLuint *);
+#define CALL_DeleteSemaphoresEXT(disp, parameters) \
+ (* GET_DeleteSemaphoresEXT(disp)) parameters
+static inline _glptr_DeleteSemaphoresEXT GET_DeleteSemaphoresEXT(struct _glapi_table *disp) {
+ return (_glptr_DeleteSemaphoresEXT) (GET_by_offset(disp, _gloffset_DeleteSemaphoresEXT));
+}
+
+static inline void SET_DeleteSemaphoresEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, const GLuint *)) {
+ SET_by_offset(disp, _gloffset_DeleteSemaphoresEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GenSemaphoresEXT)(GLsizei, GLuint *);
+#define CALL_GenSemaphoresEXT(disp, parameters) \
+ (* GET_GenSemaphoresEXT(disp)) parameters
+static inline _glptr_GenSemaphoresEXT GET_GenSemaphoresEXT(struct _glapi_table *disp) {
+ return (_glptr_GenSemaphoresEXT) (GET_by_offset(disp, _gloffset_GenSemaphoresEXT));
+}
+
+static inline void SET_GenSemaphoresEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLsizei, GLuint *)) {
+ SET_by_offset(disp, _gloffset_GenSemaphoresEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMemoryObjectParameterivEXT)(GLuint, GLenum, GLint *);
+#define CALL_GetMemoryObjectParameterivEXT(disp, parameters) \
+ (* GET_GetMemoryObjectParameterivEXT(disp)) parameters
+static inline _glptr_GetMemoryObjectParameterivEXT GET_GetMemoryObjectParameterivEXT(struct _glapi_table *disp) {
+ return (_glptr_GetMemoryObjectParameterivEXT) (GET_by_offset(disp, _gloffset_GetMemoryObjectParameterivEXT));
+}
+
+static inline void SET_GetMemoryObjectParameterivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint *)) {
+ SET_by_offset(disp, _gloffset_GetMemoryObjectParameterivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetSemaphoreParameterui64vEXT)(GLuint, GLenum, GLuint64 *);
+#define CALL_GetSemaphoreParameterui64vEXT(disp, parameters) \
+ (* GET_GetSemaphoreParameterui64vEXT(disp)) parameters
+static inline _glptr_GetSemaphoreParameterui64vEXT GET_GetSemaphoreParameterui64vEXT(struct _glapi_table *disp) {
+ return (_glptr_GetSemaphoreParameterui64vEXT) (GET_by_offset(disp, _gloffset_GetSemaphoreParameterui64vEXT));
+}
+
+static inline void SET_GetSemaphoreParameterui64vEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_GetSemaphoreParameterui64vEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUnsignedBytei_vEXT)(GLenum, GLuint, GLubyte *);
+#define CALL_GetUnsignedBytei_vEXT(disp, parameters) \
+ (* GET_GetUnsignedBytei_vEXT(disp)) parameters
+static inline _glptr_GetUnsignedBytei_vEXT GET_GetUnsignedBytei_vEXT(struct _glapi_table *disp) {
+ return (_glptr_GetUnsignedBytei_vEXT) (GET_by_offset(disp, _gloffset_GetUnsignedBytei_vEXT));
+}
+
+static inline void SET_GetUnsignedBytei_vEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLubyte *)) {
+ SET_by_offset(disp, _gloffset_GetUnsignedBytei_vEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetUnsignedBytevEXT)(GLenum, GLubyte *);
+#define CALL_GetUnsignedBytevEXT(disp, parameters) \
+ (* GET_GetUnsignedBytevEXT(disp)) parameters
+static inline _glptr_GetUnsignedBytevEXT GET_GetUnsignedBytevEXT(struct _glapi_table *disp) {
+ return (_glptr_GetUnsignedBytevEXT) (GET_by_offset(disp, _gloffset_GetUnsignedBytevEXT));
+}
+
+static inline void SET_GetUnsignedBytevEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLubyte *)) {
+ SET_by_offset(disp, _gloffset_GetUnsignedBytevEXT, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsMemoryObjectEXT)(GLuint);
+#define CALL_IsMemoryObjectEXT(disp, parameters) \
+ (* GET_IsMemoryObjectEXT(disp)) parameters
+static inline _glptr_IsMemoryObjectEXT GET_IsMemoryObjectEXT(struct _glapi_table *disp) {
+ return (_glptr_IsMemoryObjectEXT) (GET_by_offset(disp, _gloffset_IsMemoryObjectEXT));
+}
+
+static inline void SET_IsMemoryObjectEXT(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsMemoryObjectEXT, fn);
+}
+
+typedef GLboolean (GLAPIENTRYP _glptr_IsSemaphoreEXT)(GLuint);
+#define CALL_IsSemaphoreEXT(disp, parameters) \
+ (* GET_IsSemaphoreEXT(disp)) parameters
+static inline _glptr_IsSemaphoreEXT GET_IsSemaphoreEXT(struct _glapi_table *disp) {
+ return (_glptr_IsSemaphoreEXT) (GET_by_offset(disp, _gloffset_IsSemaphoreEXT));
+}
+
+static inline void SET_IsSemaphoreEXT(struct _glapi_table *disp, GLboolean (GLAPIENTRYP fn)(GLuint)) {
+ SET_by_offset(disp, _gloffset_IsSemaphoreEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MemoryObjectParameterivEXT)(GLuint, GLenum, const GLint *);
+#define CALL_MemoryObjectParameterivEXT(disp, parameters) \
+ (* GET_MemoryObjectParameterivEXT(disp)) parameters
+static inline _glptr_MemoryObjectParameterivEXT GET_MemoryObjectParameterivEXT(struct _glapi_table *disp) {
+ return (_glptr_MemoryObjectParameterivEXT) (GET_by_offset(disp, _gloffset_MemoryObjectParameterivEXT));
+}
+
+static inline void SET_MemoryObjectParameterivEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLint *)) {
+ SET_by_offset(disp, _gloffset_MemoryObjectParameterivEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_NamedBufferStorageMemEXT)(GLuint, GLsizeiptr, GLuint, GLuint64);
+#define CALL_NamedBufferStorageMemEXT(disp, parameters) \
+ (* GET_NamedBufferStorageMemEXT(disp)) parameters
+static inline _glptr_NamedBufferStorageMemEXT GET_NamedBufferStorageMemEXT(struct _glapi_table *disp) {
+ return (_glptr_NamedBufferStorageMemEXT) (GET_by_offset(disp, _gloffset_NamedBufferStorageMemEXT));
+}
+
+static inline void SET_NamedBufferStorageMemEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizeiptr, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_NamedBufferStorageMemEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SemaphoreParameterui64vEXT)(GLuint, GLenum, const GLuint64 *);
+#define CALL_SemaphoreParameterui64vEXT(disp, parameters) \
+ (* GET_SemaphoreParameterui64vEXT(disp)) parameters
+static inline _glptr_SemaphoreParameterui64vEXT GET_SemaphoreParameterui64vEXT(struct _glapi_table *disp) {
+ return (_glptr_SemaphoreParameterui64vEXT) (GET_by_offset(disp, _gloffset_SemaphoreParameterui64vEXT));
+}
+
+static inline void SET_SemaphoreParameterui64vEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, const GLuint64 *)) {
+ SET_by_offset(disp, _gloffset_SemaphoreParameterui64vEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SignalSemaphoreEXT)(GLuint, GLuint, const GLuint *, GLuint, const GLuint *, const GLenum *);
+#define CALL_SignalSemaphoreEXT(disp, parameters) \
+ (* GET_SignalSemaphoreEXT(disp)) parameters
+static inline _glptr_SignalSemaphoreEXT GET_SignalSemaphoreEXT(struct _glapi_table *disp) {
+ return (_glptr_SignalSemaphoreEXT) (GET_by_offset(disp, _gloffset_SignalSemaphoreEXT));
+}
+
+static inline void SET_SignalSemaphoreEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, const GLuint *, GLuint, const GLuint *, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_SignalSemaphoreEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorageMem1DEXT)(GLenum, GLsizei, GLenum, GLsizei, GLuint, GLuint64);
+#define CALL_TexStorageMem1DEXT(disp, parameters) \
+ (* GET_TexStorageMem1DEXT(disp)) parameters
+static inline _glptr_TexStorageMem1DEXT GET_TexStorageMem1DEXT(struct _glapi_table *disp) {
+ return (_glptr_TexStorageMem1DEXT) (GET_by_offset(disp, _gloffset_TexStorageMem1DEXT));
+}
+
+static inline void SET_TexStorageMem1DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TexStorageMem1DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorageMem2DEXT)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLuint, GLuint64);
+#define CALL_TexStorageMem2DEXT(disp, parameters) \
+ (* GET_TexStorageMem2DEXT(disp)) parameters
+static inline _glptr_TexStorageMem2DEXT GET_TexStorageMem2DEXT(struct _glapi_table *disp) {
+ return (_glptr_TexStorageMem2DEXT) (GET_by_offset(disp, _gloffset_TexStorageMem2DEXT));
+}
+
+static inline void SET_TexStorageMem2DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TexStorageMem2DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorageMem2DMultisampleEXT)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean, GLuint, GLuint64);
+#define CALL_TexStorageMem2DMultisampleEXT(disp, parameters) \
+ (* GET_TexStorageMem2DMultisampleEXT(disp)) parameters
+static inline _glptr_TexStorageMem2DMultisampleEXT GET_TexStorageMem2DMultisampleEXT(struct _glapi_table *disp) {
+ return (_glptr_TexStorageMem2DMultisampleEXT) (GET_by_offset(disp, _gloffset_TexStorageMem2DMultisampleEXT));
+}
+
+static inline void SET_TexStorageMem2DMultisampleEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLboolean, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TexStorageMem2DMultisampleEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorageMem3DEXT)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLuint, GLuint64);
+#define CALL_TexStorageMem3DEXT(disp, parameters) \
+ (* GET_TexStorageMem3DEXT(disp)) parameters
+static inline _glptr_TexStorageMem3DEXT GET_TexStorageMem3DEXT(struct _glapi_table *disp) {
+ return (_glptr_TexStorageMem3DEXT) (GET_by_offset(disp, _gloffset_TexStorageMem3DEXT));
+}
+
+static inline void SET_TexStorageMem3DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TexStorageMem3DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexStorageMem3DMultisampleEXT)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean, GLuint, GLuint64);
+#define CALL_TexStorageMem3DMultisampleEXT(disp, parameters) \
+ (* GET_TexStorageMem3DMultisampleEXT(disp)) parameters
+static inline _glptr_TexStorageMem3DMultisampleEXT GET_TexStorageMem3DMultisampleEXT(struct _glapi_table *disp) {
+ return (_glptr_TexStorageMem3DMultisampleEXT) (GET_by_offset(disp, _gloffset_TexStorageMem3DMultisampleEXT));
+}
+
+static inline void SET_TexStorageMem3DMultisampleEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TexStorageMem3DMultisampleEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorageMem1DEXT)(GLuint, GLsizei, GLenum, GLsizei, GLuint, GLuint64);
+#define CALL_TextureStorageMem1DEXT(disp, parameters) \
+ (* GET_TextureStorageMem1DEXT(disp)) parameters
+static inline _glptr_TextureStorageMem1DEXT GET_TextureStorageMem1DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorageMem1DEXT) (GET_by_offset(disp, _gloffset_TextureStorageMem1DEXT));
+}
+
+static inline void SET_TextureStorageMem1DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TextureStorageMem1DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorageMem2DEXT)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLuint, GLuint64);
+#define CALL_TextureStorageMem2DEXT(disp, parameters) \
+ (* GET_TextureStorageMem2DEXT(disp)) parameters
+static inline _glptr_TextureStorageMem2DEXT GET_TextureStorageMem2DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorageMem2DEXT) (GET_by_offset(disp, _gloffset_TextureStorageMem2DEXT));
+}
+
+static inline void SET_TextureStorageMem2DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLsizei, GLenum, GLsizei, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TextureStorageMem2DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorageMem2DMultisampleEXT)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLboolean, GLuint, GLuint64);
+#define CALL_TextureStorageMem2DMultisampleEXT(disp, parameters) \
+ (* GET_TextureStorageMem2DMultisampleEXT(disp)) parameters
+static inline _glptr_TextureStorageMem2DMultisampleEXT GET_TextureStorageMem2DMultisampleEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorageMem2DMultisampleEXT) (GET_by_offset(disp, _gloffset_TextureStorageMem2DMultisampleEXT));
+}
+
+static inline void SET_TextureStorageMem2DMultisampleEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLboolean, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TextureStorageMem2DMultisampleEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorageMem3DEXT)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLuint, GLuint64);
+#define CALL_TextureStorageMem3DEXT(disp, parameters) \
+ (* GET_TextureStorageMem3DEXT(disp)) parameters
+static inline _glptr_TextureStorageMem3DEXT GET_TextureStorageMem3DEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorageMem3DEXT) (GET_by_offset(disp, _gloffset_TextureStorageMem3DEXT));
+}
+
+static inline void SET_TextureStorageMem3DEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TextureStorageMem3DEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TextureStorageMem3DMultisampleEXT)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean, GLuint, GLuint64);
+#define CALL_TextureStorageMem3DMultisampleEXT(disp, parameters) \
+ (* GET_TextureStorageMem3DMultisampleEXT(disp)) parameters
+static inline _glptr_TextureStorageMem3DMultisampleEXT GET_TextureStorageMem3DMultisampleEXT(struct _glapi_table *disp) {
+ return (_glptr_TextureStorageMem3DMultisampleEXT) (GET_by_offset(disp, _gloffset_TextureStorageMem3DMultisampleEXT));
+}
+
+static inline void SET_TextureStorageMem3DMultisampleEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLsizei, GLenum, GLsizei, GLsizei, GLsizei, GLboolean, GLuint, GLuint64)) {
+ SET_by_offset(disp, _gloffset_TextureStorageMem3DMultisampleEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_WaitSemaphoreEXT)(GLuint, GLuint, const GLuint *, GLuint, const GLuint *, const GLenum *);
+#define CALL_WaitSemaphoreEXT(disp, parameters) \
+ (* GET_WaitSemaphoreEXT(disp)) parameters
+static inline _glptr_WaitSemaphoreEXT GET_WaitSemaphoreEXT(struct _glapi_table *disp) {
+ return (_glptr_WaitSemaphoreEXT) (GET_by_offset(disp, _gloffset_WaitSemaphoreEXT));
+}
+
+static inline void SET_WaitSemaphoreEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint, const GLuint *, GLuint, const GLuint *, const GLenum *)) {
+ SET_by_offset(disp, _gloffset_WaitSemaphoreEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ImportMemoryFdEXT)(GLuint, GLuint64, GLenum, GLint);
+#define CALL_ImportMemoryFdEXT(disp, parameters) \
+ (* GET_ImportMemoryFdEXT(disp)) parameters
+static inline _glptr_ImportMemoryFdEXT GET_ImportMemoryFdEXT(struct _glapi_table *disp) {
+ return (_glptr_ImportMemoryFdEXT) (GET_by_offset(disp, _gloffset_ImportMemoryFdEXT));
+}
+
+static inline void SET_ImportMemoryFdEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLuint64, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_ImportMemoryFdEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ImportSemaphoreFdEXT)(GLuint, GLenum, GLint);
+#define CALL_ImportSemaphoreFdEXT(disp, parameters) \
+ (* GET_ImportSemaphoreFdEXT(disp)) parameters
+static inline _glptr_ImportSemaphoreFdEXT GET_ImportSemaphoreFdEXT(struct _glapi_table *disp) {
+ return (_glptr_ImportSemaphoreFdEXT) (GET_by_offset(disp, _gloffset_ImportSemaphoreFdEXT));
+}
+
+static inline void SET_ImportSemaphoreFdEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLuint, GLenum, GLint)) {
+ SET_by_offset(disp, _gloffset_ImportSemaphoreFdEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_StencilFuncSeparateATI)(GLenum, GLenum, GLint, GLuint);
+#define CALL_StencilFuncSeparateATI(disp, parameters) \
+ (* GET_StencilFuncSeparateATI(disp)) parameters
+static inline _glptr_StencilFuncSeparateATI GET_StencilFuncSeparateATI(struct _glapi_table *disp) {
+ return (_glptr_StencilFuncSeparateATI) (GET_by_offset(disp, _gloffset_StencilFuncSeparateATI));
+}
+
+static inline void SET_StencilFuncSeparateATI(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLint, GLuint)) {
+ SET_by_offset(disp, _gloffset_StencilFuncSeparateATI, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramEnvParameters4fvEXT)(GLenum, GLuint, GLsizei, const GLfloat *);
+#define CALL_ProgramEnvParameters4fvEXT(disp, parameters) \
+ (* GET_ProgramEnvParameters4fvEXT(disp)) parameters
+static inline _glptr_ProgramEnvParameters4fvEXT GET_ProgramEnvParameters4fvEXT(struct _glapi_table *disp) {
+ return (_glptr_ProgramEnvParameters4fvEXT) (GET_by_offset(disp, _gloffset_ProgramEnvParameters4fvEXT));
+}
+
+static inline void SET_ProgramEnvParameters4fvEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramEnvParameters4fvEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ProgramLocalParameters4fvEXT)(GLenum, GLuint, GLsizei, const GLfloat *);
+#define CALL_ProgramLocalParameters4fvEXT(disp, parameters) \
+ (* GET_ProgramLocalParameters4fvEXT(disp)) parameters
+static inline _glptr_ProgramLocalParameters4fvEXT GET_ProgramLocalParameters4fvEXT(struct _glapi_table *disp) {
+ return (_glptr_ProgramLocalParameters4fvEXT) (GET_by_offset(disp, _gloffset_ProgramLocalParameters4fvEXT));
+}
+
+static inline void SET_ProgramLocalParameters4fvEXT(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLuint, GLsizei, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ProgramLocalParameters4fvEXT, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EGLImageTargetRenderbufferStorageOES)(GLenum, GLvoid *);
+#define CALL_EGLImageTargetRenderbufferStorageOES(disp, parameters) \
+ (* GET_EGLImageTargetRenderbufferStorageOES(disp)) parameters
+static inline _glptr_EGLImageTargetRenderbufferStorageOES GET_EGLImageTargetRenderbufferStorageOES(struct _glapi_table *disp) {
+ return (_glptr_EGLImageTargetRenderbufferStorageOES) (GET_by_offset(disp, _gloffset_EGLImageTargetRenderbufferStorageOES));
+}
+
+static inline void SET_EGLImageTargetRenderbufferStorageOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_EGLImageTargetRenderbufferStorageOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_EGLImageTargetTexture2DOES)(GLenum, GLvoid *);
+#define CALL_EGLImageTargetTexture2DOES(disp, parameters) \
+ (* GET_EGLImageTargetTexture2DOES(disp)) parameters
+static inline _glptr_EGLImageTargetTexture2DOES GET_EGLImageTargetTexture2DOES(struct _glapi_table *disp) {
+ return (_glptr_EGLImageTargetTexture2DOES) (GET_by_offset(disp, _gloffset_EGLImageTargetTexture2DOES));
+}
+
+static inline void SET_EGLImageTargetTexture2DOES(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLvoid *)) {
+ SET_by_offset(disp, _gloffset_EGLImageTargetTexture2DOES, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_AlphaFuncx)(GLenum, GLclampx);
+#define CALL_AlphaFuncx(disp, parameters) \
+ (* GET_AlphaFuncx(disp)) parameters
+static inline _glptr_AlphaFuncx GET_AlphaFuncx(struct _glapi_table *disp) {
+ return (_glptr_AlphaFuncx) (GET_by_offset(disp, _gloffset_AlphaFuncx));
+}
+
+static inline void SET_AlphaFuncx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLclampx)) {
+ SET_by_offset(disp, _gloffset_AlphaFuncx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearColorx)(GLclampx, GLclampx, GLclampx, GLclampx);
+#define CALL_ClearColorx(disp, parameters) \
+ (* GET_ClearColorx(disp)) parameters
+static inline _glptr_ClearColorx GET_ClearColorx(struct _glapi_table *disp) {
+ return (_glptr_ClearColorx) (GET_by_offset(disp, _gloffset_ClearColorx));
+}
+
+static inline void SET_ClearColorx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampx, GLclampx, GLclampx, GLclampx)) {
+ SET_by_offset(disp, _gloffset_ClearColorx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClearDepthx)(GLclampx);
+#define CALL_ClearDepthx(disp, parameters) \
+ (* GET_ClearDepthx(disp)) parameters
+static inline _glptr_ClearDepthx GET_ClearDepthx(struct _glapi_table *disp) {
+ return (_glptr_ClearDepthx) (GET_by_offset(disp, _gloffset_ClearDepthx));
+}
+
+static inline void SET_ClearDepthx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampx)) {
+ SET_by_offset(disp, _gloffset_ClearDepthx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Color4x)(GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_Color4x(disp, parameters) \
+ (* GET_Color4x(disp)) parameters
+static inline _glptr_Color4x GET_Color4x(struct _glapi_table *disp) {
+ return (_glptr_Color4x) (GET_by_offset(disp, _gloffset_Color4x));
+}
+
+static inline void SET_Color4x(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Color4x, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_DepthRangex)(GLclampx, GLclampx);
+#define CALL_DepthRangex(disp, parameters) \
+ (* GET_DepthRangex(disp)) parameters
+static inline _glptr_DepthRangex GET_DepthRangex(struct _glapi_table *disp) {
+ return (_glptr_DepthRangex) (GET_by_offset(disp, _gloffset_DepthRangex));
+}
+
+static inline void SET_DepthRangex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampx, GLclampx)) {
+ SET_by_offset(disp, _gloffset_DepthRangex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogx)(GLenum, GLfixed);
+#define CALL_Fogx(disp, parameters) \
+ (* GET_Fogx(disp)) parameters
+static inline _glptr_Fogx GET_Fogx(struct _glapi_table *disp) {
+ return (_glptr_Fogx) (GET_by_offset(disp, _gloffset_Fogx));
+}
+
+static inline void SET_Fogx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Fogx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Fogxv)(GLenum, const GLfixed *);
+#define CALL_Fogxv(disp, parameters) \
+ (* GET_Fogxv(disp)) parameters
+static inline _glptr_Fogxv GET_Fogxv(struct _glapi_table *disp) {
+ return (_glptr_Fogxv) (GET_by_offset(disp, _gloffset_Fogxv));
+}
+
+static inline void SET_Fogxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_Fogxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Frustumf)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Frustumf(disp, parameters) \
+ (* GET_Frustumf(disp)) parameters
+static inline _glptr_Frustumf GET_Frustumf(struct _glapi_table *disp) {
+ return (_glptr_Frustumf) (GET_by_offset(disp, _gloffset_Frustumf));
+}
+
+static inline void SET_Frustumf(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Frustumf, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Frustumx)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_Frustumx(disp, parameters) \
+ (* GET_Frustumx(disp)) parameters
+static inline _glptr_Frustumx GET_Frustumx(struct _glapi_table *disp) {
+ return (_glptr_Frustumx) (GET_by_offset(disp, _gloffset_Frustumx));
+}
+
+static inline void SET_Frustumx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Frustumx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModelx)(GLenum, GLfixed);
+#define CALL_LightModelx(disp, parameters) \
+ (* GET_LightModelx(disp)) parameters
+static inline _glptr_LightModelx GET_LightModelx(struct _glapi_table *disp) {
+ return (_glptr_LightModelx) (GET_by_offset(disp, _gloffset_LightModelx));
+}
+
+static inline void SET_LightModelx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_LightModelx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LightModelxv)(GLenum, const GLfixed *);
+#define CALL_LightModelxv(disp, parameters) \
+ (* GET_LightModelxv(disp)) parameters
+static inline _glptr_LightModelxv GET_LightModelxv(struct _glapi_table *disp) {
+ return (_glptr_LightModelxv) (GET_by_offset(disp, _gloffset_LightModelxv));
+}
+
+static inline void SET_LightModelxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_LightModelxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lightx)(GLenum, GLenum, GLfixed);
+#define CALL_Lightx(disp, parameters) \
+ (* GET_Lightx(disp)) parameters
+static inline _glptr_Lightx GET_Lightx(struct _glapi_table *disp) {
+ return (_glptr_Lightx) (GET_by_offset(disp, _gloffset_Lightx));
+}
+
+static inline void SET_Lightx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Lightx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Lightxv)(GLenum, GLenum, const GLfixed *);
+#define CALL_Lightxv(disp, parameters) \
+ (* GET_Lightxv(disp)) parameters
+static inline _glptr_Lightxv GET_Lightxv(struct _glapi_table *disp) {
+ return (_glptr_Lightxv) (GET_by_offset(disp, _gloffset_Lightxv));
+}
+
+static inline void SET_Lightxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_Lightxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LineWidthx)(GLfixed);
+#define CALL_LineWidthx(disp, parameters) \
+ (* GET_LineWidthx(disp)) parameters
+static inline _glptr_LineWidthx GET_LineWidthx(struct _glapi_table *disp) {
+ return (_glptr_LineWidthx) (GET_by_offset(disp, _gloffset_LineWidthx));
+}
+
+static inline void SET_LineWidthx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed)) {
+ SET_by_offset(disp, _gloffset_LineWidthx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_LoadMatrixx)(const GLfixed *);
+#define CALL_LoadMatrixx(disp, parameters) \
+ (* GET_LoadMatrixx(disp)) parameters
+static inline _glptr_LoadMatrixx GET_LoadMatrixx(struct _glapi_table *disp) {
+ return (_glptr_LoadMatrixx) (GET_by_offset(disp, _gloffset_LoadMatrixx));
+}
+
+static inline void SET_LoadMatrixx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_LoadMatrixx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materialx)(GLenum, GLenum, GLfixed);
+#define CALL_Materialx(disp, parameters) \
+ (* GET_Materialx(disp)) parameters
+static inline _glptr_Materialx GET_Materialx(struct _glapi_table *disp) {
+ return (_glptr_Materialx) (GET_by_offset(disp, _gloffset_Materialx));
+}
+
+static inline void SET_Materialx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Materialx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Materialxv)(GLenum, GLenum, const GLfixed *);
+#define CALL_Materialxv(disp, parameters) \
+ (* GET_Materialxv(disp)) parameters
+static inline _glptr_Materialxv GET_Materialxv(struct _glapi_table *disp) {
+ return (_glptr_Materialxv) (GET_by_offset(disp, _gloffset_Materialxv));
+}
+
+static inline void SET_Materialxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_Materialxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultMatrixx)(const GLfixed *);
+#define CALL_MultMatrixx(disp, parameters) \
+ (* GET_MultMatrixx(disp)) parameters
+static inline _glptr_MultMatrixx GET_MultMatrixx(struct _glapi_table *disp) {
+ return (_glptr_MultMatrixx) (GET_by_offset(disp, _gloffset_MultMatrixx));
+}
+
+static inline void SET_MultMatrixx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_MultMatrixx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_MultiTexCoord4x)(GLenum, GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_MultiTexCoord4x(disp, parameters) \
+ (* GET_MultiTexCoord4x(disp)) parameters
+static inline _glptr_MultiTexCoord4x GET_MultiTexCoord4x(struct _glapi_table *disp) {
+ return (_glptr_MultiTexCoord4x) (GET_by_offset(disp, _gloffset_MultiTexCoord4x));
+}
+
+static inline void SET_MultiTexCoord4x(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_MultiTexCoord4x, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Normal3x)(GLfixed, GLfixed, GLfixed);
+#define CALL_Normal3x(disp, parameters) \
+ (* GET_Normal3x(disp)) parameters
+static inline _glptr_Normal3x GET_Normal3x(struct _glapi_table *disp) {
+ return (_glptr_Normal3x) (GET_by_offset(disp, _gloffset_Normal3x));
+}
+
+static inline void SET_Normal3x(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Normal3x, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Orthof)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_Orthof(disp, parameters) \
+ (* GET_Orthof(disp)) parameters
+static inline _glptr_Orthof GET_Orthof(struct _glapi_table *disp) {
+ return (_glptr_Orthof) (GET_by_offset(disp, _gloffset_Orthof));
+}
+
+static inline void SET_Orthof(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_Orthof, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Orthox)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_Orthox(disp, parameters) \
+ (* GET_Orthox(disp)) parameters
+static inline _glptr_Orthox GET_Orthox(struct _glapi_table *disp) {
+ return (_glptr_Orthox) (GET_by_offset(disp, _gloffset_Orthox));
+}
+
+static inline void SET_Orthox(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Orthox, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointSizex)(GLfixed);
+#define CALL_PointSizex(disp, parameters) \
+ (* GET_PointSizex(disp)) parameters
+static inline _glptr_PointSizex GET_PointSizex(struct _glapi_table *disp) {
+ return (_glptr_PointSizex) (GET_by_offset(disp, _gloffset_PointSizex));
+}
+
+static inline void SET_PointSizex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed)) {
+ SET_by_offset(disp, _gloffset_PointSizex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PolygonOffsetx)(GLfixed, GLfixed);
+#define CALL_PolygonOffsetx(disp, parameters) \
+ (* GET_PolygonOffsetx(disp)) parameters
+static inline _glptr_PolygonOffsetx GET_PolygonOffsetx(struct _glapi_table *disp) {
+ return (_glptr_PolygonOffsetx) (GET_by_offset(disp, _gloffset_PolygonOffsetx));
+}
+
+static inline void SET_PolygonOffsetx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_PolygonOffsetx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Rotatex)(GLfixed, GLfixed, GLfixed, GLfixed);
+#define CALL_Rotatex(disp, parameters) \
+ (* GET_Rotatex(disp)) parameters
+static inline _glptr_Rotatex GET_Rotatex(struct _glapi_table *disp) {
+ return (_glptr_Rotatex) (GET_by_offset(disp, _gloffset_Rotatex));
+}
+
+static inline void SET_Rotatex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Rotatex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_SampleCoveragex)(GLclampx, GLboolean);
+#define CALL_SampleCoveragex(disp, parameters) \
+ (* GET_SampleCoveragex(disp)) parameters
+static inline _glptr_SampleCoveragex GET_SampleCoveragex(struct _glapi_table *disp) {
+ return (_glptr_SampleCoveragex) (GET_by_offset(disp, _gloffset_SampleCoveragex));
+}
+
+static inline void SET_SampleCoveragex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLclampx, GLboolean)) {
+ SET_by_offset(disp, _gloffset_SampleCoveragex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Scalex)(GLfixed, GLfixed, GLfixed);
+#define CALL_Scalex(disp, parameters) \
+ (* GET_Scalex(disp)) parameters
+static inline _glptr_Scalex GET_Scalex(struct _glapi_table *disp) {
+ return (_glptr_Scalex) (GET_by_offset(disp, _gloffset_Scalex));
+}
+
+static inline void SET_Scalex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Scalex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnvx)(GLenum, GLenum, GLfixed);
+#define CALL_TexEnvx(disp, parameters) \
+ (* GET_TexEnvx(disp)) parameters
+static inline _glptr_TexEnvx GET_TexEnvx(struct _glapi_table *disp) {
+ return (_glptr_TexEnvx) (GET_by_offset(disp, _gloffset_TexEnvx));
+}
+
+static inline void SET_TexEnvx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_TexEnvx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexEnvxv)(GLenum, GLenum, const GLfixed *);
+#define CALL_TexEnvxv(disp, parameters) \
+ (* GET_TexEnvxv(disp)) parameters
+static inline _glptr_TexEnvxv GET_TexEnvxv(struct _glapi_table *disp) {
+ return (_glptr_TexEnvxv) (GET_by_offset(disp, _gloffset_TexEnvxv));
+}
+
+static inline void SET_TexEnvxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_TexEnvxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterx)(GLenum, GLenum, GLfixed);
+#define CALL_TexParameterx(disp, parameters) \
+ (* GET_TexParameterx(disp)) parameters
+static inline _glptr_TexParameterx GET_TexParameterx(struct _glapi_table *disp) {
+ return (_glptr_TexParameterx) (GET_by_offset(disp, _gloffset_TexParameterx));
+}
+
+static inline void SET_TexParameterx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_TexParameterx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_Translatex)(GLfixed, GLfixed, GLfixed);
+#define CALL_Translatex(disp, parameters) \
+ (* GET_Translatex(disp)) parameters
+static inline _glptr_Translatex GET_Translatex(struct _glapi_table *disp) {
+ return (_glptr_Translatex) (GET_by_offset(disp, _gloffset_Translatex));
+}
+
+static inline void SET_Translatex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfixed, GLfixed, GLfixed)) {
+ SET_by_offset(disp, _gloffset_Translatex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClipPlanef)(GLenum, const GLfloat *);
+#define CALL_ClipPlanef(disp, parameters) \
+ (* GET_ClipPlanef(disp)) parameters
+static inline _glptr_ClipPlanef GET_ClipPlanef(struct _glapi_table *disp) {
+ return (_glptr_ClipPlanef) (GET_by_offset(disp, _gloffset_ClipPlanef));
+}
+
+static inline void SET_ClipPlanef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfloat *)) {
+ SET_by_offset(disp, _gloffset_ClipPlanef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_ClipPlanex)(GLenum, const GLfixed *);
+#define CALL_ClipPlanex(disp, parameters) \
+ (* GET_ClipPlanex(disp)) parameters
+static inline _glptr_ClipPlanex GET_ClipPlanex(struct _glapi_table *disp) {
+ return (_glptr_ClipPlanex) (GET_by_offset(disp, _gloffset_ClipPlanex));
+}
+
+static inline void SET_ClipPlanex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_ClipPlanex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetClipPlanef)(GLenum, GLfloat *);
+#define CALL_GetClipPlanef(disp, parameters) \
+ (* GET_GetClipPlanef(disp)) parameters
+static inline _glptr_GetClipPlanef GET_GetClipPlanef(struct _glapi_table *disp) {
+ return (_glptr_GetClipPlanef) (GET_by_offset(disp, _gloffset_GetClipPlanef));
+}
+
+static inline void SET_GetClipPlanef(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfloat *)) {
+ SET_by_offset(disp, _gloffset_GetClipPlanef, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetClipPlanex)(GLenum, GLfixed *);
+#define CALL_GetClipPlanex(disp, parameters) \
+ (* GET_GetClipPlanex(disp)) parameters
+static inline _glptr_GetClipPlanex GET_GetClipPlanex(struct _glapi_table *disp) {
+ return (_glptr_GetClipPlanex) (GET_by_offset(disp, _gloffset_GetClipPlanex));
+}
+
+static inline void SET_GetClipPlanex(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetClipPlanex, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetFixedv)(GLenum, GLfixed *);
+#define CALL_GetFixedv(disp, parameters) \
+ (* GET_GetFixedv(disp)) parameters
+static inline _glptr_GetFixedv GET_GetFixedv(struct _glapi_table *disp) {
+ return (_glptr_GetFixedv) (GET_by_offset(disp, _gloffset_GetFixedv));
+}
+
+static inline void SET_GetFixedv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetFixedv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetLightxv)(GLenum, GLenum, GLfixed *);
+#define CALL_GetLightxv(disp, parameters) \
+ (* GET_GetLightxv(disp)) parameters
+static inline _glptr_GetLightxv GET_GetLightxv(struct _glapi_table *disp) {
+ return (_glptr_GetLightxv) (GET_by_offset(disp, _gloffset_GetLightxv));
+}
+
+static inline void SET_GetLightxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetLightxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetMaterialxv)(GLenum, GLenum, GLfixed *);
+#define CALL_GetMaterialxv(disp, parameters) \
+ (* GET_GetMaterialxv(disp)) parameters
+static inline _glptr_GetMaterialxv GET_GetMaterialxv(struct _glapi_table *disp) {
+ return (_glptr_GetMaterialxv) (GET_by_offset(disp, _gloffset_GetMaterialxv));
+}
+
+static inline void SET_GetMaterialxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetMaterialxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexEnvxv)(GLenum, GLenum, GLfixed *);
+#define CALL_GetTexEnvxv(disp, parameters) \
+ (* GET_GetTexEnvxv(disp)) parameters
+static inline _glptr_GetTexEnvxv GET_GetTexEnvxv(struct _glapi_table *disp) {
+ return (_glptr_GetTexEnvxv) (GET_by_offset(disp, _gloffset_GetTexEnvxv));
+}
+
+static inline void SET_GetTexEnvxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetTexEnvxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_GetTexParameterxv)(GLenum, GLenum, GLfixed *);
+#define CALL_GetTexParameterxv(disp, parameters) \
+ (* GET_GetTexParameterxv(disp)) parameters
+static inline _glptr_GetTexParameterxv GET_GetTexParameterxv(struct _glapi_table *disp) {
+ return (_glptr_GetTexParameterxv) (GET_by_offset(disp, _gloffset_GetTexParameterxv));
+}
+
+static inline void SET_GetTexParameterxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, GLfixed *)) {
+ SET_by_offset(disp, _gloffset_GetTexParameterxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameterx)(GLenum, GLfixed);
+#define CALL_PointParameterx(disp, parameters) \
+ (* GET_PointParameterx(disp)) parameters
+static inline _glptr_PointParameterx GET_PointParameterx(struct _glapi_table *disp) {
+ return (_glptr_PointParameterx) (GET_by_offset(disp, _gloffset_PointParameterx));
+}
+
+static inline void SET_PointParameterx(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLfixed)) {
+ SET_by_offset(disp, _gloffset_PointParameterx, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PointParameterxv)(GLenum, const GLfixed *);
+#define CALL_PointParameterxv(disp, parameters) \
+ (* GET_PointParameterxv(disp)) parameters
+static inline _glptr_PointParameterxv GET_PointParameterxv(struct _glapi_table *disp) {
+ return (_glptr_PointParameterxv) (GET_by_offset(disp, _gloffset_PointParameterxv));
+}
+
+static inline void SET_PointParameterxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_PointParameterxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_TexParameterxv)(GLenum, GLenum, const GLfixed *);
+#define CALL_TexParameterxv(disp, parameters) \
+ (* GET_TexParameterxv(disp)) parameters
+static inline _glptr_TexParameterxv GET_TexParameterxv(struct _glapi_table *disp) {
+ return (_glptr_TexParameterxv) (GET_by_offset(disp, _gloffset_TexParameterxv));
+}
+
+static inline void SET_TexParameterxv(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLenum, GLenum, const GLfixed *)) {
+ SET_by_offset(disp, _gloffset_TexParameterxv, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_BlendBarrier)(void);
+#define CALL_BlendBarrier(disp, parameters) \
+ (* GET_BlendBarrier(disp)) parameters
+static inline _glptr_BlendBarrier GET_BlendBarrier(struct _glapi_table *disp) {
+ return (_glptr_BlendBarrier) (GET_by_offset(disp, _gloffset_BlendBarrier));
+}
+
+static inline void SET_BlendBarrier(struct _glapi_table *disp, void (GLAPIENTRYP fn)(void)) {
+ SET_by_offset(disp, _gloffset_BlendBarrier, fn);
+}
+
+typedef void (GLAPIENTRYP _glptr_PrimitiveBoundingBox)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat);
+#define CALL_PrimitiveBoundingBox(disp, parameters) \
+ (* GET_PrimitiveBoundingBox(disp)) parameters
+static inline _glptr_PrimitiveBoundingBox GET_PrimitiveBoundingBox(struct _glapi_table *disp) {
+ return (_glptr_PrimitiveBoundingBox) (GET_by_offset(disp, _gloffset_PrimitiveBoundingBox));
+}
+
+static inline void SET_PrimitiveBoundingBox(struct _glapi_table *disp, void (GLAPIENTRYP fn)(GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat, GLfloat)) {
+ SET_by_offset(disp, _gloffset_PrimitiveBoundingBox, fn);
+}
+
+
+#endif /* !defined( _DISPATCH_H_ ) */
diff --git a/prebuilt-intermediates/main/enums.c b/prebuilt-intermediates/main/enums.c
new file mode 100644
index 0000000..70a3f76
--- /dev/null
+++ b/prebuilt-intermediates/main/enums.c
@@ -0,0 +1,7448 @@
+/* DO NOT EDIT - This file generated automatically by gl_enums.py (from Mesa) script */
+
+/*
+ * Copyright (C) 1999-2005 Brian Paul All Rights Reserved.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * BRIAN PAUL,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "main/glheader.h"
+#include "main/enums.h"
+#include "main/imports.h"
+#include "main/mtypes.h"
+
+typedef struct PACKED {
+ uint32_t offset;
+ int n;
+} enum_elt;
+
+#if defined(__GNUC__)
+# define LONGSTRING __extension__
+#else
+# define LONGSTRING
+#endif
+
+LONGSTRING static const char enum_string_table[] = {
+ 'G', 'L', '_', 'N', 'O', 'N', 'E', '\0',
+ 'G', 'L', '_', 'T', 'R', 'U', 'E', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', '_', 'L', 'O', 'O', 'P', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', '_', 'S', 'T', 'R', 'I', 'P', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', '_', 'S', 'T', 'R', 'I', 'P', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', '_', 'F', 'A', 'N', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'S', 'T', 'R', 'I', 'P', '\0',
+ 'G', 'L', '_', 'P', 'O', 'L', 'Y', 'G', 'O', 'N', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'S', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'C', 'Y', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', '_', 'S', 'T', 'R', 'I', 'P', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'C', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'C', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', '_', 'S', 'T', 'R', 'I', 'P', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'C', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'C', 'H', 'E', 'S', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'R', 'E', 'F', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'C', 'I', 'S', 'S', 'O', 'R', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'O', 'N', 'T', '_', 'F', 'A', 'C', 'E', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'S', 'M', 'A', 'L', 'L', '_', 'C', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'M', 'A', 'L', 'L', '_', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'S', 'M', 'A', 'L', 'L', '_', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'U', 'I', 'D', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'L', 'A', 'R', 'G', 'E', '_', 'C', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'L', 'A', 'R', 'G', 'E', '_', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'L', 'A', 'R', 'G', 'E', '_', 'C', 'W', '_', 'A', 'R', 'C', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'I', 'C', '_', 'C', 'U', 'R', 'V', 'E', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'C', 'O', 'N', 'I', 'C', '_', 'C', 'U', 'R', 'V', 'E', '_', 'T', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'E', 'D', 'G', 'E', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '\0',
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+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'E', 'S', 'T', '\0',
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+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'F', 'U', 'N', 'C', '\0',
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+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'F', 'A', 'I', 'L', '\0',
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+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'R', 'E', 'F', '\0',
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+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
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+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'S', 'W', 'A', 'P', '_', 'B', 'Y', 'T', 'E', 'S', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'D', 'I', 'M', 'S', '\0',
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+ 'G', 'L', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'B', 'I', 'T', 'S', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', '3', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', '4', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'N', 'O', 'R', 'M', 'A', 'L', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', '3', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', '4', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', '3', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', '4', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'G', 'R', 'I', 'D', '_', 'D', 'O', 'M', 'A', 'I', 'N', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'G', 'R', 'I', 'D', '_', 'D', 'O', 'M', 'A', 'I', 'N', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'G', 'R', 'I', 'D', '_', 'S', 'E', 'G', 'M', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '\0',
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+ 'G', 'L', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'S', 'E', 'L', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'S', 'E', 'L', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'A', 'L', 'P', 'H', 'A', '\0',
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+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'F', 'U', 'N', 'C', '_', 'A', 'D', 'D', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '\0',
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+ 'G', 'L', '_', 'F', 'U', 'N', 'C', '_', 'S', 'U', 'B', 'T', 'R', 'A', 'C', 'T', '\0',
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+ 'G', 'L', '_', 'C', 'M', 'Y', 'K', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'M', 'Y', 'K', 'A', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'C', 'M', 'Y', 'K', '_', 'H', 'I', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'M', 'Y', 'K', '_', 'H', 'I', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'B', 'L', 'E', '_', '2', 'D', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'D', 'U', 'C', 'E', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'W', 'I', 'D', 'T', 'H', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'R', 'E', 'D', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'B', 'L', 'U', 'E', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'R', 'E', 'D', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'G', 'R', 'E', 'E', 'N', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'B', 'L', 'U', 'E', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'A', 'L', 'P', 'H', 'A', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'I', 'N', 'K', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', 'M', 'A', 'X', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', 'M', 'A', 'X', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', 'M', 'A', 'X', '_', 'S', 'I', 'N', 'K', '\0',
+ 'G', 'L', '_', 'T', 'A', 'B', 'L', 'E', '_', 'T', 'O', 'O', '_', 'L', 'A', 'R', 'G', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'B', 'Y', 'T', 'E', '_', '3', '_', '3', '_', '2', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '4', '_', '4', '_', '4', '_', '4', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '5', '_', '5', '_', '5', '_', '1', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '8', '_', '8', '_', '8', '_', '8', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', '2', '\0',
+ 'G', 'L', '_', 'P', 'O', 'L', 'Y', 'G', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'F', 'I', 'L', 'L', '\0',
+ 'G', 'L', '_', 'P', 'O', 'L', 'Y', 'G', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'F', 'A', 'C', 'T', 'O', 'R', '\0',
+ 'G', 'L', '_', 'P', 'O', 'L', 'Y', 'G', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'B', 'I', 'A', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'O', 'R', 'M', 'A', 'L', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '4', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '8', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '2', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '4', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '2', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '4', '_', 'A', 'L', 'P', 'H', 'A', '4', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '6', '_', 'A', 'L', 'P', 'H', 'A', '2', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '2', '_', 'A', 'L', 'P', 'H', 'A', '4', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '2', '_', 'A', 'L', 'P', 'H', 'A', '1', '2', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '4', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '2', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '6', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '4', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '5', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '8', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '0', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '2', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '6', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '2', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '4', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '5', '_', 'A', '1', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '8', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '0', '_', 'A', '2', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '2', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '6', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'T', 'O', 'O', '_', 'L', 'A', 'R', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'R', 'I', 'O', 'R', 'I', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'S', 'I', 'D', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'S', 'K', 'I', 'P', '_', 'I', 'M', 'A', 'G', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'I', 'M', 'A', 'G', 'E', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'S', 'K', 'I', 'P', '_', 'I', 'M', 'A', 'G', 'E', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'I', 'M', 'A', 'G', 'E', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'R', 'A', 'P', '_', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', '3', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'A', 'C', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'E', 'V', 'E', 'L', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'O', 'D', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'T', 'A', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'U', 'N', 'C', '_', 'P', 'O', 'I', 'N', 'T', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'O', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'O', '_', 'O', 'N', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '\0',
+ 'G', 'L', '_', '1', 'P', 'A', 'S', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '2', 'P', 'A', 'S', 'S', '_', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '2', 'P', 'A', 'S', 'S', '_', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', 'P', 'A', 'S', 'S', '_', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', 'P', 'A', 'S', 'S', '_', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', 'P', 'A', 'S', 'S', '_', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', 'P', 'A', 'S', 'S', '_', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'V', 'A', 'L', 'U', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'I', 'N', 'V', 'E', 'R', 'T', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'P', 'A', 'T', 'T', 'E', 'R', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'S', 'H', 'A', 'R', 'P', 'E', 'N', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'S', 'H', 'A', 'R', 'P', 'E', 'N', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'S', 'H', 'A', 'R', 'P', 'E', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'R', 'P', 'E', 'N', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'U', 'N', 'C', '_', 'P', 'O', 'I', 'N', 'T', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'R', 'E', 'D', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'B', 'L', 'U', 'E', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'R', 'E', 'D', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'G', 'R', 'E', 'E', 'N', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'B', 'L', 'U', 'E', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'L', 'P', 'H', 'A', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'G', 'I', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'G', 'I', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'E', 'N', 'V', '_', 'B', 'I', 'A', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'F', 'A', 'I', 'L', '_', 'V', 'A', 'L', 'U', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'D', 'S', 'T', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'S', 'R', 'C', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'D', 'S', 'T', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'S', 'R', 'C', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', '4', '2', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', '2', '2', '_', 'R', 'E', 'V', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', '2', '2', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', '4', '2', '2', '_', 'R', 'E', 'V', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'P', 'O', 'S', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'B', 'G', 'R', '\0',
+ 'G', 'L', '_', 'B', 'G', 'R', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '4', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '1', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'N', 'D', 'E', 'X', '1', '6', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', 'S', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', 'S', '_', 'I', 'N', 'D', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'H', 'O', 'N', 'G', '_', 'W', 'I', 'N', '\0',
+ 'G', 'L', '_', 'P', 'H', 'O', 'N', 'G', '_', 'H', 'I', 'N', 'T', '_', 'W', 'I', 'N', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'S', 'P', 'E', 'C', 'U', 'L', 'A', 'R', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'I', 'N', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'N', 'D', 'E', 'X', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'V', 'O', 'L', 'U', 'M', 'E', '_', 'C', 'L', 'I', 'P', 'P', 'I', 'N', 'G', '_', 'H', 'I', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '2', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '2', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '2', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '6', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'A', 'L', 'P', 'H', 'A', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'D', 'U', 'A', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'E', 'L', 'E', 'C', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'M', 'I', 'N', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'M', 'A', 'X', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'F', 'A', 'D', 'E', '_', 'T', 'H', 'R', 'E', 'S', 'H', 'O', 'L', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'A', 'T', 'T', 'E', 'N', 'U', 'A', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'F', 'U', 'N', 'C', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'F', 'U', 'N', 'C', '_', 'P', 'O', 'I', 'N', 'T', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'O', 'G', '_', 'F', 'U', 'N', 'C', '_', 'P', 'O', 'I', 'N', 'T', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'C', 'L', 'A', 'M', 'P', '_', 'T', 'O', '_', 'B', 'O', 'R', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'U', 'L', 'T', 'I', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'H', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'C', 'L', 'A', 'M', 'P', '_', 'T', 'O', '_', 'E', 'D', 'G', 'E', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'S', 'K', 'I', 'P', '_', 'V', 'O', 'L', 'U', 'M', 'E', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'I', 'M', 'A', 'G', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'S', 'K', 'I', 'P', '_', 'V', 'O', 'L', 'U', 'M', 'E', 'S', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'I', 'M', 'A', 'G', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '4', 'D', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '4', 'D', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '4', 'D', 'S', 'I', 'Z', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'R', 'A', 'P', '_', 'Q', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', '4', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'E', 'X', '_', 'G', 'E', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'I', 'N', '_', 'L', 'O', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'L', 'O', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'A', 'S', 'E', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'B', 'E', 'S', 'T', '_', 'A', 'L', 'I', 'G', 'N', 'M', 'E', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'C', 'A', 'C', 'H', 'E', '_', 'I', 'N', 'C', 'R', 'E', 'M', 'E', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'G', 'R', 'I', 'D', '_', 'W', 'I', 'D', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'G', 'R', 'I', 'D', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'G', 'R', 'I', 'D', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'I', 'L', 'E', '_', 'C', 'A', 'C', 'H', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'I', 'L', 'T', 'E', 'R', '4', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '4', '_', 'S', 'I', 'Z', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'M', 'O', 'D', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'A', 'X', 'I', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'A', 'X', 'I', 'A', 'L', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'L', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'E', 'Y', 'E', '_', 'A', 'L', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '4', 'D', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'I', 'G', 'N', 'O', 'R', 'E', '_', 'B', 'O', 'R', 'D', 'E', 'R', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'B', 'O', 'R', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'I', 'C', 'A', 'T', 'E', '_', 'B', 'O', 'R', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'B', 'O', 'R', 'D', 'E', 'R', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'X', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'Y', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', 'X', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', 'Y', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'R', 'O', 'T', 'A', 'T', 'E', '_', 'A', 'N', 'G', 'L', 'E', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'R', 'O', 'T', 'A', 'T', 'E', '_', 'O', 'R', 'I', 'G', 'I', 'N', '_', 'X', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'R', 'O', 'T', 'A', 'T', 'E', '_', 'O', 'R', 'I', 'G', 'I', 'N', '_', 'Y', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'M', 'A', 'G', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'M', 'I', 'N', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'U', 'B', 'I', 'C', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', '2', 'D', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'P', 'O', 'S', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'A', 'B', 'L', 'E', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'O', 'C', 'C', 'L', 'U', 'S', 'I', 'O', 'N', '_', 'T', 'E', 'S', 'T', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'O', 'C', 'C', 'L', 'U', 'S', 'I', 'O', 'N', '_', 'T', 'E', 'S', 'T', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'I', 'G', 'H', 'T', 'I', 'N', 'G', '_', 'M', 'O', 'D', 'E', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'O', 'S', 'T', '_', 'S', 'P', 'E', 'C', 'U', 'L', 'A', 'R', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'R', 'E', '_', 'S', 'P', 'E', 'C', 'U', 'L', 'A', 'R', '_', 'H', 'P', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'C', 'E', 'N', 'T', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'F', 'R', 'A', 'M', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'L', 'O', 'D', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'B', 'I', 'A', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'S', 'C', 'A', 'L', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'B', 'I', 'A', 'S', '_', 'R', 'A', 'N', 'G', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'O', 'S', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'S', 'C', 'A', 'L', 'E', '_', 'R', 'A', 'N', 'G', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', '_', 'P', 'L', 'A', 'N', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', '_', 'P', 'L', 'A', 'N', 'E', '_', 'E', 'Q', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'I', 'R', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'M', 'E', 'N', 'T', '1', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'M', 'E', 'N', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'M', 'E', 'N', 'T', '_', 'M', 'E', 'A', 'S', 'U', 'R', 'E', 'M', 'E', 'N', 'T', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'L', 'I', 'S', 'T', '_', 'P', 'R', 'I', 'O', 'R', 'I', 'T', 'Y', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'C', 'A', 'L', 'L', 'I', 'G', 'R', 'A', 'P', 'H', 'I', 'C', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'Z', 'O', 'O', 'M', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'Z', 'O', 'O', 'M', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'M', 'E', 'Z', 'O', 'O', 'M', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', 'D', '_', 'B', 'I', 'A', 'S', '_', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', 'D', '_', 'B', 'I', 'A', 'S', '_', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', 'D', '_', 'B', 'I', 'A', 'S', '_', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'T', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'T', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', '_', 'H', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'D', 'E', 'F', 'O', 'R', 'M', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'F', 'O', 'R', 'M', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'D', 'E', 'F', 'O', 'R', 'M', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'M', 'A', 'S', 'K', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'F', 'O', 'R', 'M', 'A', 'T', 'I', 'O', 'N', '_', 'O', 'R', 'D', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'V', 'A', 'L', 'U', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'O', 'P', 'E', 'R', 'A', 'T', 'O', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'E', 'Q', 'U', 'A', 'L', '_', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'E', 'Q', 'U', 'A', 'L', '_', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '1', '6', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '2', '4', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '3', '2', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'L', 'O', 'C', 'K', '_', 'F', 'I', 'R', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'L', 'O', 'C', 'K', '_', 'C', 'O', 'U', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'E', 'Y', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'U', 'I', '_', 'V', '2', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'U', 'I', '_', 'V', '3', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'U', 'I', '_', 'N', '3', 'F', '_', 'V', '2', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'U', 'I', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', '2', 'F', '_', 'I', 'U', 'I', '_', 'V', '2', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', '2', 'F', '_', 'I', 'U', 'I', '_', 'V', '3', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', '2', 'F', '_', 'I', 'U', 'I', '_', 'N', '3', 'F', '_', 'V', '2', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', '2', 'F', '_', 'I', 'U', 'I', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'T', 'E', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'T', 'E', 'S', 'T', '_', 'F', 'U', 'N', 'C', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'T', 'E', 'S', 'T', '_', 'R', 'E', 'F', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'F', 'A', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'R', 'C', 'B', '_', '4', '2', '2', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'R', 'C', 'B', '_', '4', '4', '4', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'W', 'R', 'A', 'P', '_', 'B', 'O', 'R', 'D', 'E', 'R', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'D', 'A', 'T', 'A', '_', 'S', 'U', 'N', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'D', 'A', 'T', 'A', '_', 'S', 'U', 'N', 'X', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', '_', 'L', 'I', 'S', 'T', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'D', 'E', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'W', 'R', 'I', 'T', 'E', 'M', 'A', 'S', 'K', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'T', 'O', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'T', 'O', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'T', 'O', '_', 'L', 'I', 'N', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'T', 'O', '_', 'L', 'I', 'N', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'L', 'I', 'N', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'L', 'I', 'N', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '\0',
+ 'G', 'L', '_', 'S', 'I', 'N', 'G', 'L', 'E', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'T', 'E', '_', 'S', 'P', 'E', 'C', 'U', 'L', 'A', 'R', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'E', 'N', 'C', 'O', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'U', 'N', 'D', 'E', 'F', 'I', 'N', 'E', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'J', 'O', 'R', '_', 'V', 'E', 'R', 'S', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', 'O', 'R', '_', 'V', 'E', 'R', 'S', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'E', 'X', 'T', 'E', 'N', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'F', 'L', 'A', 'G', 'S', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'M', 'M', 'U', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'F', 'L', 'A', 'G', 'S', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '_', 'F', 'O', 'R', '_', 'P', 'A', 'T', 'C', 'H', 'E', 'S', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', '\0',
+ 'G', 'L', '_', 'R', 'G', '\0',
+ 'G', 'L', '_', 'R', 'G', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', '8', '\0',
+ 'G', 'L', '_', 'R', '1', '6', '\0',
+ 'G', 'L', '_', 'R', 'G', '8', '\0',
+ 'G', 'L', '_', 'R', 'G', '1', '6', '\0',
+ 'G', 'L', '_', 'R', '1', '6', 'F', '\0',
+ 'G', 'L', '_', 'R', '3', '2', 'F', '\0',
+ 'G', 'L', '_', 'R', 'G', '1', '6', 'F', '\0',
+ 'G', 'L', '_', 'R', 'G', '3', '2', 'F', '\0',
+ 'G', 'L', '_', 'R', '8', 'I', '\0',
+ 'G', 'L', '_', 'R', '8', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', '1', '6', 'I', '\0',
+ 'G', 'L', '_', 'R', '1', '6', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', '3', '2', 'I', '\0',
+ 'G', 'L', '_', 'R', '3', '2', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '8', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '8', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '1', '6', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '1', '6', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '3', '2', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', '3', '2', 'U', 'I', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'C', 'L', '_', 'E', 'V', 'E', 'N', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'C', 'L', '_', 'E', 'V', 'E', 'N', 'T', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'S', 'Y', 'N', 'C', 'H', 'R', 'O', 'N', 'O', 'U', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'N', 'E', 'X', 'T', '_', 'L', 'O', 'G', 'G', 'E', 'D', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'L', 'L', 'B', 'A', 'C', 'K', '_', 'F', 'U', 'N', 'C', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'L', 'L', 'B', 'A', 'C', 'K', '_', 'U', 'S', 'E', 'R', '_', 'P', 'A', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'A', 'P', 'I', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'S', 'Y', 'S', 'T', 'E', 'M', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'T', 'H', 'I', 'R', 'D', '_', 'P', 'A', 'R', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'A', 'P', 'P', 'L', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'O', 'T', 'H', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'E', 'R', 'R', 'O', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'D', 'E', 'P', 'R', 'E', 'C', 'A', 'T', 'E', 'D', '_', 'B', 'E', 'H', 'A', 'V', 'I', 'O', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'U', 'N', 'D', 'E', 'F', 'I', 'N', 'E', 'D', '_', 'B', 'E', 'H', 'A', 'V', 'I', 'O', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'P', 'O', 'R', 'T', 'A', 'B', 'I', 'L', 'I', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'P', 'E', 'R', 'F', 'O', 'R', 'M', 'A', 'N', 'C', 'E', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'O', 'T', 'H', 'E', 'R', '\0',
+ 'G', 'L', '_', 'L', 'O', 'S', 'E', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'O', 'N', '_', 'R', 'E', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'G', 'U', 'I', 'L', 'T', 'Y', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'N', 'O', 'C', 'E', 'N', 'T', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'K', 'N', 'O', 'W', 'N', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'E', 'T', '_', 'N', 'O', 'T', 'I', 'F', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'T', 'R', 'A', 'T', 'E', 'G', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'R', 'E', 'T', 'R', 'I', 'E', 'V', 'A', 'B', 'L', 'E', '_', 'H', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'I', 'P', 'E', 'L', 'I', 'N', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'B', 'O', 'U', 'N', 'D', 'S', '_', 'R', 'A', 'N', 'G', 'E', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'E', 'R', '_', 'P', 'R', 'O', 'V', 'O', 'K', 'I', 'N', 'G', '_', 'V', 'E', 'R', 'T', 'E', 'X', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'I', 'N', 'D', 'E', 'X', '_', 'P', 'R', 'O', 'V', 'O', 'K', 'I', 'N', 'G', '_', 'V', 'E', 'R', 'T', 'E', 'X', '\0',
+ 'G', 'L', '_', 'U', 'N', 'D', 'E', 'F', 'I', 'N', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '\0',
+ 'G', 'L', '_', 'N', 'O', '_', 'R', 'E', 'S', 'E', 'T', '_', 'N', 'O', 'T', 'I', 'F', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'W', 'O', 'R', 'K', '_', 'G', 'R', 'O', 'U', 'P', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'M', 'A', 'R', 'K', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'P', 'U', 'S', 'H', '_', 'G', 'R', 'O', 'U', 'P', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'P', 'O', 'P', '_', 'G', 'R', 'O', 'U', 'P', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'E', 'V', 'E', 'R', 'I', 'T', 'Y', '_', 'N', 'O', 'T', 'I', 'F', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'B', 'U', 'G', '_', 'G', 'R', 'O', 'U', 'P', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'G', 'R', 'O', 'U', 'P', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'P', 'R', 'E', 'F', 'E', 'R', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'R', 'E', 'D', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'G', 'R', 'E', 'E', 'N', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'B', 'L', 'U', 'E', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'L', 'A', 'Y', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'D', 'I', 'M', 'E', 'N', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'A', 'B', 'L', 'E', '_', 'L', 'A', 'Y', 'E', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'L', 'E', 'N', 'D', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'G', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'G', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'M', 'I', 'P', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'M', 'A', 'N', 'U', 'A', 'L', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'T', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'A', 'U', 'T', 'O', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'T', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'E', 'N', 'C', 'O', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '_', 'R', 'E', 'A', 'D', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '_', 'W', 'R', 'I', 'T', 'E', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '_', 'D', 'E', 'C', 'O', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'F', 'I', 'L', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'A', 'T', 'H', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'A', 'T', 'H', 'E', 'R', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'M', 'A', 'G', 'E', '_', 'L', 'O', 'A', 'D', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'T', 'O', 'R', 'E', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'M', 'A', 'G', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'T', 'E', 'X', 'E', 'L', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'I', 'L', 'I', 'T', 'Y', '_', 'C', 'L', 'A', 'S', 'S', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'P', 'I', 'X', 'E', 'L', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'S', 'I', 'M', 'U', 'L', 'T', 'A', 'N', 'E', 'O', 'U', 'S', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'N', 'D', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'E', 'S', 'T', '\0',
+ 'G', 'L', '_', 'S', 'I', 'M', 'U', 'L', 'T', 'A', 'N', 'E', 'O', 'U', 'S', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'N', 'D', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'T', 'E', 'S', 'T', '\0',
+ 'G', 'L', '_', 'S', 'I', 'M', 'U', 'L', 'T', 'A', 'N', 'E', 'O', 'U', 'S', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'N', 'D', '_', 'D', 'E', 'P', 'T', 'H', '_', 'W', 'R', 'I', 'T', 'E', '\0',
+ 'G', 'L', '_', 'S', 'I', 'M', 'U', 'L', 'T', 'A', 'N', 'E', 'O', 'U', 'S', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'N', 'D', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'W', 'R', 'I', 'T', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'L', 'E', 'A', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'V', 'I', 'E', 'W', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'I', 'L', 'I', 'T', 'Y', '_', 'C', 'L', 'A', 'S', 'S', '\0',
+ 'G', 'L', '_', 'F', 'U', 'L', 'L', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', '\0',
+ 'G', 'L', '_', 'C', 'A', 'V', 'E', 'A', 'T', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '4', '_', 'X', '_', '3', '2', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '2', '_', 'X', '_', '3', '2', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '_', 'X', '_', '3', '2', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '4', '_', 'X', '_', '1', '6', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '2', '_', 'X', '_', '1', '6', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '_', 'X', '_', '1', '6', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '4', '_', 'X', '_', '8', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '2', '_', 'X', '_', '8', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '_', 'X', '_', '8', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '1', '_', '1', '1', '_', '1', '0', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', '2', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '2', '8', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '9', '6', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '6', '4', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '4', '8', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '3', '2', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '2', '4', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '1', '6', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', '8', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '3', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '5', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'R', 'G', 'T', 'C', '1', '_', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'R', 'G', 'T', 'C', '2', '_', 'R', 'G', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'B', 'P', 'T', 'C', '_', 'U', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', '_', 'C', 'L', 'A', 'S', 'S', '_', 'B', 'P', 'T', 'C', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'D', 'I', 'V', 'I', 'S', 'O', 'R', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'R', 'E', 'L', 'A', 'T', 'I', 'V', 'E', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'V', 'I', 'E', 'W', '_', 'M', 'I', 'N', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'V', 'I', 'E', 'W', '_', 'N', 'U', 'M', '_', 'L', 'E', 'V', 'E', 'L', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'V', 'I', 'E', 'W', '_', 'M', 'I', 'N', '_', 'L', 'A', 'Y', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'V', 'I', 'E', 'W', '_', 'N', 'U', 'M', '_', 'L', 'A', 'Y', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'M', 'U', 'T', 'A', 'B', 'L', 'E', '_', 'L', 'E', 'V', 'E', 'L', 'S', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'I', 'P', 'E', 'L', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'P', 'L', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'L', 'A', 'B', 'E', 'L', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'H', 'A', 'D', 'I', 'N', 'G', '_', 'L', 'A', 'N', 'G', 'U', 'A', 'G', 'E', '_', 'V', 'E', 'R', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'T', 'A', 'R', 'G', 'E', 'T', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'O', 'V', 'E', 'R', 'F', 'L', 'O', 'W', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'S', 'T', 'R', 'E', 'A', 'M', '_', 'O', 'V', 'E', 'R', 'F', 'L', 'O', 'W', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '_', 'S', 'U', 'B', 'M', 'I', 'T', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '_', 'S', 'U', 'B', 'M', 'I', 'T', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'P', 'A', 'T', 'C', 'H', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '_', 'E', 'M', 'I', 'T', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', 'P', 'I', 'N', 'G', '_', 'I', 'N', 'P', 'U', 'T', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', 'P', 'I', 'N', 'G', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '\0',
+ 'G', 'L', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'U', 'L', 'L', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'C', 'L', 'I', 'P', '_', 'A', 'N', 'D', '_', 'C', 'U', 'L', 'L', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'B', 'E', 'H', 'A', 'V', 'I', 'O', 'R', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'E', 'L', 'E', 'A', 'S', 'E', '_', 'B', 'E', 'H', 'A', 'V', 'I', 'O', 'R', '_', 'F', 'L', 'U', 'S', 'H', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'O', 'L', 'U', 'T', 'I', 'O', 'N', '_', 'H', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'R', 'C', 'B', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'R', 'C', 'B', 'A', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'I', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'A', 'X', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', 'B', 'I', 'A', 'S', '_', 'H', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'M', 'A', 'R', 'K', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'E', 'X', '_', 'G', 'E', 'N', '_', 'M', 'O', 'D', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'H', 'I', 'S', 'T', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', '2', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'M', 'A', 'G', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'M', 'I', 'N', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', '2', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', '2', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', '2', 'D', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'T', 'T', 'E', 'N', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'O', 'W', '_', 'A', 'T', 'T', 'E', 'N', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'P', 'P', 'L', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'M', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'I', 'G', 'H', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'F', 'A', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'R', 'G', 'B', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'O', 'U', 'P', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'G', 'I', 'S', '\0',
+ 'G', 'L', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'T', 'E', 'X', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'D', 'R', 'A', 'W', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'T', 'E', 'X', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'D', 'R', 'A', 'W', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'S', 'Y', 'N', 'C', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'B', 'Y', 'T', 'E', '_', '2', '_', '3', '_', '3', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '5', '_', '6', '_', '5', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '5', '_', '6', '_', '5', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '4', '_', '4', '_', '4', '_', '4', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '1', '_', '5', '_', '5', '_', '5', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '8', '_', '8', '_', '8', '_', '8', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '2', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'I', 'R', 'R', 'O', 'R', 'E', 'D', '_', 'R', 'E', 'P', 'E', 'A', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '4', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '4', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'D', 'X', 'T', '5', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '4', '_', 'D', 'X', 'T', '5', '_', 'S', '3', 'T', 'C', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'E', 'C', 'L', 'I', 'P', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'E', 'C', 'L', 'I', 'P', '_', 'H', 'I', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '5', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'A', 'R', 'A', 'L', 'L', 'E', 'L', '_', 'A', 'R', 'R', 'A', 'Y', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'A', 'R', 'A', 'L', 'L', 'E', 'L', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'A', 'R', 'A', 'L', 'L', 'E', 'L', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'A', 'R', 'A', 'L', 'L', 'E', 'L', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'A', 'R', 'A', 'L', 'L', 'E', 'L', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'D', 'O', 'N', 'O', 'T', '_', 'F', 'L', 'U', 'S', 'H', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'F', 'L', 'U', 'S', 'H', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', 'I', 'N', 'G', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'F', 'A', 'C', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'L', 'I', 'G', 'H', 'T', 'S', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'L', 'I', 'G', 'H', 'T', '_', 'E', 'N', 'V', '_', 'M', 'O', 'D', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'V', 'I', 'E', 'W', 'E', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'T', 'W', 'O', '_', 'S', 'I', 'D', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'A', 'M', 'B', 'I', 'E', 'N', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '0', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '1', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '2', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '3', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '4', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '5', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '6', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'L', 'I', 'G', 'H', 'T', '7', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'D', 'E', 'C', 'I', 'M', 'A', 'T', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'R', 'E', 'P', 'L', 'I', 'C', 'A', 'T', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'Z', 'E', 'R', 'O', '_', 'F', 'I', 'L', 'L', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'T', 'A', 'N', 'G', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'B', 'I', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'C', 'L', 'I', 'P', 'M', 'A', 'P', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'S', 'R', 'C', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'U', 'M', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'A', 'L', 'I', 'A', 'S', 'E', 'D', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'R', 'A', 'N', 'G', 'E', '\0',
+ 'G', 'L', '_', 'A', 'L', 'I', 'A', 'S', 'E', 'D', '_', 'L', 'I', 'N', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'R', 'A', 'N', 'G', 'E', '\0',
+ 'G', 'L', '_', 'S', 'C', 'R', 'E', 'E', 'N', '_', 'C', 'O', 'O', 'R', 'D', 'I', 'N', 'A', 'T', 'E', 'S', '_', 'R', 'E', 'N', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'E', 'R', 'T', 'E', 'D', '_', 'S', 'C', 'R', 'E', 'E', 'N', '_', 'W', '_', 'R', 'E', 'N', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '0', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '3', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '4', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '5', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '6', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '7', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '8', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '9', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '0', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '1', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '2', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '3', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '4', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '5', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '6', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '7', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '8', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '1', '9', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '0', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '1', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '2', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '3', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '4', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '5', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '6', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '7', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '8', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '2', '9', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '3', '0', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '3', '1', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'E', 'N', 'T', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'M', 'A', 'T', 'R', 'I', 'X', '\0',
+ 'G', 'L', '_', 'S', 'U', 'B', 'T', 'R', 'A', 'C', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'I', 'O', 'N', '_', 'H', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'E', 'N', 'C', 'E', '_', 'S', 'T', 'A', 'T', 'U', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'E', 'N', 'C', 'E', '_', 'C', 'O', 'N', 'D', 'I', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '2', '4', '_', '8', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', 'D', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'A', 'N', 'I', 'S', 'O', 'T', 'R', 'O', 'P', 'Y', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'X', '_', 'A', 'N', 'I', 'S', 'O', 'T', 'R', 'O', 'P', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', 'D', '_', 'B', 'I', 'A', 'S', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'I', 'N', 'I', 'N', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'P', 'O', 'T', '_', 'E', 'X', 'P', 'O', 'N', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'C', 'R', '_', 'W', 'R', 'A', 'P', '\0',
+ 'G', 'L', '_', 'D', 'E', 'C', 'R', '_', 'W', 'R', 'A', 'P', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'L', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Z', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Z', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'R', 'A', 'N', 'G', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'R', 'A', 'N', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'H', 'I', 'N', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'R', 'A', 'N', 'G', 'E', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'R', 'A', 'N', 'G', 'E', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'C', 'O', 'L', 'O', 'R', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'P', 'A', 'R', 'E', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'P', 'A', 'R', 'E', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'C', 'A', 'R', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', '_', 'T', 'I', 'M', 'E', 'S', '_', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'P', 'A', 'R', 'E', '0', '_', 'P', 'L', 'U', 'S', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'R', 'A', 'N', 'G', 'E', '_', 'W', 'I', 'T', 'H', 'O', 'U', 'T', '_', 'F', 'L', 'U', 'S', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'F', 'I', 'L', 'T', 'E', 'R', '_', 'H', 'I', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', '_', 'S', 'T', 'A', 'G', 'E', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'D', 'E', 'N', 'T', 'I', 'T', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'V', 'E', 'R', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'X', 'P', 'A', 'N', 'D', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'X', 'P', 'A', 'N', 'D', '_', 'N', 'E', 'G', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'A', 'L', 'F', '_', 'B', 'I', 'A', 'S', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'A', 'L', 'F', '_', 'B', 'I', 'A', 'S', '_', 'N', 'E', 'G', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'D', 'E', 'N', 'T', 'I', 'T', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'N', 'E', 'G', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', '_', 'B', 'Y', '_', 'T', 'W', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', '_', 'B', 'Y', '_', 'F', 'O', 'U', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', '_', 'B', 'Y', '_', 'O', 'N', 'E', '_', 'H', 'A', 'L', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'B', 'I', 'A', 'S', '_', 'B', 'Y', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'O', 'N', 'E', '_', 'H', 'A', 'L', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'I', 'N', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'M', 'A', 'P', 'P', 'I', 'N', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '_', 'U', 'S', 'A', 'G', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'A', 'B', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'C', 'D', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'M', 'U', 'X', '_', 'S', 'U', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'A', 'B', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'C', 'D', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '_', 'S', 'U', 'M', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'U', 'M', '_', 'C', 'L', 'A', 'M', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'R', '7', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '_', 'I', 'N', 'D', 'E', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'R', 'A', 'D', 'I', 'A', 'L', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'Y', 'E', '_', 'P', 'L', 'A', 'N', 'E', '_', 'A', 'B', 'S', 'O', 'L', 'U', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'M', 'B', 'O', 'S', 'S', '_', 'L', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'M', 'B', 'O', 'S', 'S', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'M', 'B', 'O', 'S', 'S', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'D', '_', 'M', 'I', 'N', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'G', 'R', 'E', 'E', 'N', '_', 'M', 'I', 'N', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'B', 'L', 'U', 'E', '_', 'M', 'I', 'N', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'I', 'N', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'D', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'G', 'R', 'E', 'E', 'N', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'B', 'L', 'U', 'E', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'A', 'X', '_', 'C', 'L', 'A', 'M', 'P', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'A', 'C', 'E', '_', 'R', 'E', 'A', 'D', '_', 'I', 'N', 'G', 'R', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', 'S', 'C', 'A', 'L', 'E', '\0',
+ 'G', 'L', '_', 'A', 'D', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'V', 'I', 'O', 'U', 'S', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '0', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '1', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '2', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'S', 'O', 'U', 'R', 'C', 'E', '3', '_', 'R', 'G', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '0', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '1', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'R', 'C', '2', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'O', 'U', 'R', 'C', 'E', '3', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '0', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '1', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '2', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '3', '_', 'R', 'G', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '0', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '1', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '2', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'O', 'P', 'E', 'R', 'A', 'N', 'D', '3', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'R', 'A', 'T', 'E', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', '4', '4', '4', '4', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', '2', '4', '2', '4', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', '4', '2', '4', '2', '_', 'S', 'G', 'I', 'X', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'T', 'U', 'R', 'B', '_', 'E', 'X', 'T', '\0',
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+ 'G', 'L', '_', 'L', 'I', 'G', 'H', 'T', '_', 'M', 'O', 'D', 'E', 'L', '_', 'S', 'P', 'E', 'C', 'U', 'L', 'A', 'R', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'H', 'I', 'N', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'L', 'I', 'E', 'N', 'T', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'C', 'L', 'I', 'E', 'N', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'A', 'N', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'A', 'N', 'G', 'E', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'B', 'C', 'R', '_', '4', '2', '2', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '8', '_', '8', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'S', 'H', 'O', 'R', 'T', '_', '8', '_', '8', '_', 'R', 'E', 'V', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'H', 'I', 'N', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'P', 'R', 'I', 'V', 'A', 'T', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'C', 'A', 'C', 'H', 'E', 'D', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'D', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'D', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'D', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'D', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'C', '4', 'U', 'B', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'C', '3', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'C', '4', 'F', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'T', '2', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'T', '2', 'F', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'R', '1', 'U', 'I', '_', 'T', '2', 'F', '_', 'C', '4', 'F', '_', 'N', '3', 'F', '_', 'V', '3', 'F', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'S', 'L', 'I', 'C', 'E', '_', 'A', 'C', 'C', 'U', 'M', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', '_', 'M', 'E', 'S', 'H', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', '_', 'M', 'E', 'S', 'H', '_', 'S', 'U', 'N', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'A', 'T', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'N', 'A', 'B', 'L', 'E', 'D', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'T', 'R', 'I', 'N', 'G', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'D', 'E', 'N', 'T', 'I', 'T', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'E', 'R', 'S', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'E', 'R', 'S', 'E', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'C', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '7', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'W', 'O', '_', 'S', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'A', 'R', 'G', 'E', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'R', 'E', 'S', 'I', 'D', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'C', 'K', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'C', 'K', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'E', 'R', 'R', 'O', 'R', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'L', 'A', 'M', 'P', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '7', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '9', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '1', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '0', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '2', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '3', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '4', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '5', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '6', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '7', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '8', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '9', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '0', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '1', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '2', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '3', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '4', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '1', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '5', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '0', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '2', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '3', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '4', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '5', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '6', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '8', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '9', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '0', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '1', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '2', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '3', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '4', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '2', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '5', '_', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'S', 'U', 'M', '_', 'U', 'N', 'I', 'T', 'Y', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'L', 'E', 'N', 'D', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '3', '_', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '3', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'F', 'X', 'T', '1', '_', '3', 'D', 'F', 'X', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'F', 'X', 'T', '1', '_', '3', 'D', 'F', 'X', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', '3', 'D', 'F', 'X', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '_', '3', 'D', 'F', 'X', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', '3', 'D', 'F', 'X', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'U', 'L', 'A', 'R', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'U', '_', 'O', 'R', 'D', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'P', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'V', '_', 'O', 'R', 'D', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'F', 'R', 'A', 'C', 'T', 'I', 'O', 'N', 'A', 'L', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '7', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '9', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '0', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '1', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'V', 'A', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '1', '5', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'M', 'A', 'P', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'R', 'A', 'T', 'I', 'O', 'N', 'A', 'L', '_', 'E', 'V', 'A', 'L', '_', 'O', 'R', 'D', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'T', 'C', 'H', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'M', 'A', 'P', 'P', 'I', 'N', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', '8', '_', 'S', '8', '_', '8', '_', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '8', '_', '8', '_', 'S', '8', '_', 'S', '8', '_', 'R', 'E', 'V', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '_', 'M', 'A', 'G', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'N', 'S', 'I', 'S', 'T', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'O', 'P', 'E', 'R', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'M', 'O', 'D', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'V', 'I', 'O', 'U', 'S', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'N', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'T', '_', 'E', 'Y', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'S', 'S', '_', 'T', 'H', 'R', 'O', 'U', 'G', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'E', 'N', 'D', 'E', 'N', 'T', '_', 'A', 'R', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'E', 'N', 'D', 'E', 'N', 'T', '_', 'G', 'B', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'R', 'F', 'A', 'C', 'E', '_', 'S', 'T', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '3', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'D', 'I', 'F', 'F', 'U', 'S', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'R', 'E', 'F', 'L', 'E', 'C', 'T', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'C', 'O', 'N', 'S', 'T', '_', 'E', 'Y', 'E', '_', 'R', 'E', 'F', 'L', 'E', 'C', 'T', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'I', 'L', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '_', 'M', 'A', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '_', 'M', 'A', 'G', '_', 'V', 'I', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'I', 'L', 'O', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'H', 'I', 'L', 'O', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'H', 'I', 'L', 'O', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', 'A', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'R', 'F', 'A', 'C', 'E', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'R', 'F', 'A', 'C', 'E', '_', 'M', 'A', 'P', 'P', 'E', 'D', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'D', 'T', '8', '_', 'M', 'A', 'G', '8', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', 'B', '8', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'I', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'L', 'O', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'T', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'G', 'N', 'I', 'T', 'U', 'D', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'B', 'R', 'A', 'N', 'C', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'I', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'L', 'O', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'T', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'G', 'N', 'I', 'T', 'U', 'D', 'E', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'B', 'R', 'A', 'N', 'C', 'E', '_', 'B', 'I', 'A', 'S', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'H', 'I', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'O', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'S', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'G', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '5', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '6', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '7', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '8', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '9', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '0', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '1', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '5', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '6', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '7', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '8', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '1', '9', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '0', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '1', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '5', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '6', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '7', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '8', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '2', '9', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '3', '0', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '3', '1', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '3', '_', 'R', 'G', 'B', '_', 'E', 'X', 'T', '\0',
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+ 'G', 'L', '_', 'M', 'I', 'R', 'R', 'O', 'R', '_', 'C', 'L', 'A', 'M', 'P', '_', 'E', 'X', 'T', '\0',
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+ 'G', 'L', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'A', 'D', 'D', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'D', 'D', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'S', 'U', 'B', 'T', 'R', 'A', 'C', 'T', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'E', 'T', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', '_', 'V', 'A', 'L', 'U', 'E', '_', 'A', 'M', 'D', '\0',
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+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'O', 'P', '_', 'V', 'A', 'L', 'U', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'O', 'N', 'G', '\0',
+ 'G', 'L', '_', 'O', 'C', 'C', 'L', 'U', 'S', 'I', 'O', 'N', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'E', 'V', 'E', 'N', 'T', '_', 'M', 'A', 'S', 'K', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'Y', 'C', 'B', 'C', 'R', '_', 'M', 'E', 'S', 'A', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'I', 'N', 'V', 'E', 'R', 'T', '_', 'M', 'E', 'S', 'A', '\0',
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+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'M', 'E', 'S', 'A', 'X', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'M', 'E', 'S', 'A', 'X', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'M', 'E', 'S', 'A', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'M', 'E', 'S', 'A', 'X', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'S', 'T', 'A', 'C', 'K', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'M', 'E', 'S', 'A', 'X', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'M', 'E', 'S', 'A', '\0',
+ 'G', 'L', '_', 'S', 'T', 'A', 'T', 'I', 'C', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'D', 'Y', 'N', 'A', 'M', 'I', 'C', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'S', 'E', 'R', 'V', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'C', 'A', 'R', 'D', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'U', 'S', 'A', 'G', 'E', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '0', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '1', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '2', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '3', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '4', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '5', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '6', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', '7', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'R', 'O', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'R', 'O', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'N', 'U', 'M', '_', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'T', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'T', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'D', 'U', 'D', 'V', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'D', 'U', '8', 'D', 'V', '8', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'E', 'N', 'V', 'M', 'A', 'P', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'B', 'U', 'M', 'P', '_', 'T', 'A', 'R', 'G', 'E', 'T', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'I', 'N', 'D', 'E', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'N', 'E', 'G', 'A', 'T', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'D', 'O', 'T', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'D', 'O', 'T', '4', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'U', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'A', 'D', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'A', 'D', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'F', 'R', 'A', 'C', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'A', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'I', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'S', 'E', 'T', '_', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'S', 'E', 'T', '_', 'L', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'C', 'L', 'A', 'M', 'P', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'F', 'L', 'O', 'O', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'R', 'O', 'U', 'N', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'E', 'X', 'P', '_', 'B', 'A', 'S', 'E', '_', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'L', 'O', 'G', '_', 'B', 'A', 'S', 'E', '_', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'P', 'O', 'W', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'R', 'E', 'C', 'I', 'P', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'R', 'E', 'C', 'I', 'P', '_', 'S', 'Q', 'R', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'S', 'U', 'B', '_', 'E', 'X', 'T', '\0',
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+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'U', 'L', 'T', 'I', 'P', 'L', 'Y', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', '_', 'M', 'O', 'V', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'L', 'O', 'R', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'L', 'O', 'R', '1', '_', 'E', 'X', 'T', '\0',
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+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '4', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '5', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '6', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '7', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '9', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '4', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '5', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '6', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '7', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '1', '9', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '4', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '5', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '6', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '7', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '2', '9', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '3', '0', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '3', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'F', 'O', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'A', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'C', 'T', 'O', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'L', 'O', 'C', 'A', 'L', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'Z', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'W', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Z', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'W', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'Z', 'E', 'R', 'O', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'N', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'O', 'N', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', 'I', 'Z', 'E', 'D', '_', 'R', 'A', 'N', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'U', 'L', 'L', '_', 'R', 'A', 'N', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'V', 'P', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'V', 'A', 'L', 'U', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'D', 'A', 'T', 'A', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'V', 'A', 'L', 'U', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'V', 'A', 'R', 'I', 'A', 'N', 'T', '_', 'D', 'A', 'T', 'A', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'V', 'A', 'L', 'U', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', '_', 'D', 'A', 'T', 'A', 'T', 'Y', 'P', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'T', 'C', '_', 'R', 'G', 'B', 'A', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'E', 'V', 'E', 'L', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'P', 'O', 'I', 'N', 'T', '_', 'M', 'O', 'D', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'M', 'O', 'D', 'E', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'L', 'E', 'V', 'E', 'L', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'P', 'O', 'I', 'N', 'T', '_', 'M', 'O', 'D', 'E', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'P', 'O', 'I', 'N', 'T', '_', 'M', 'O', 'D', 'E', '_', 'C', 'U', 'B', 'I', 'C', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'M', 'O', 'D', 'E', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'P', 'N', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'M', 'O', 'D', 'E', '_', 'Q', 'U', 'A', 'D', 'R', 'A', 'T', 'I', 'C', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', '3', 'D', 'C', '_', 'X', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', '3', 'D', 'C', '_', 'X', 'Y', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'V', 'B', 'O', '_', 'F', 'R', 'E', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'R', 'E', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'R', 'E', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'F', 'U', 'N', 'C', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'F', 'A', 'I', 'L', '\0',
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+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'P', 'A', 'S', 'S', '_', 'D', 'E', 'P', 'T', 'H', '_', 'P', 'A', 'S', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'L', 'U', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'L', 'U', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'L', 'U', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'L', 'U', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '3', '2', 'F', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '3', '2', 'F', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '3', '2', 'F', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '3', '2', 'F', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '3', '2', 'F', '_', 'A', 'R', 'B', '\0',
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+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '6', 'F', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '6', 'F', '\0',
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+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '6', 'F', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', 'F', '_', 'A', 'R', 'B', '\0',
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+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'O', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', 'O', 'N', 'L', 'Y', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'I', 'N', 'G', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '0', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '1', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '2', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '3', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '4', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '5', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '6', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '7', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '8', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '9', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '1', '0', '\0',
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+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '1', '5', '\0',
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+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'E', 'Q', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '_', 'M', 'A', 'T', 'R', 'I', 'C', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'F', 'U', 'N', 'C', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'A', 'R', 'E', '_', 'R', 'E', 'F', '_', 'T', 'O', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'S', 'E', 'A', 'M', 'L', 'E', 'S', 'S', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'H', 'I', 'L', 'O', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'H', 'I', 'L', 'O', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'H', 'I', 'L', 'O', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'H', 'I', 'L', 'O', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'E', 'N', 'D', 'E', 'N', 'T', '_', 'H', 'I', 'L', 'O', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'E', 'N', 'D', 'E', 'N', 'T', '_', 'R', 'G', 'B', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '3', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'E', 'N', 'D', 'E', 'N', 'T', '_', 'R', 'G', 'B', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'P', 'A', 'S', 'S', '_', 'T', 'H', 'R', 'O', 'U', 'G', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'T', '_', 'P', 'R', 'O', 'D', 'U', 'C', 'T', '_', 'A', 'F', 'F', 'I', 'N', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'I', 'L', 'O', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'H', 'I', 'L', 'O', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'R', 'C', 'E', '_', 'B', 'L', 'U', 'E', '_', 'T', 'O', '_', 'O', 'N', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'P', 'R', 'I', 'T', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'O', 'R', 'D', '_', 'R', 'E', 'P', 'L', 'A', 'C', 'E', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'R', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'Q', 'U', 'E', 'R', 'Y', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'R', 'E', 'S', 'U', 'L', 'T', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'A', 'V', 'A', 'I', 'L', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'L', 'O', 'C', 'A', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'N', 'O', 'R', 'M', 'A', 'L', 'I', 'Z', 'E', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'I', 'N', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'I', 'N', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'T', 'O', '_', 'R', 'G', 'B', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'T', 'O', '_', 'B', 'G', 'R', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'E', 'R', 'R', 'O', 'R', '_', 'S', 'T', 'R', 'I', 'N', 'G', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'A', 'S', 'C', 'I', 'I', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'P', 'I', 'X', 'E', 'L', '_', 'D', 'A', 'T', 'A', '_', 'R', 'A', 'N', 'G', 'E', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', 'A', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', '3', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', '3', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', '3', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', 'A', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', 'A', '3', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'L', 'O', 'A', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'C', 'L', 'E', 'A', 'R', '_', 'C', 'O', 'L', 'O', 'R', '_', 'V', 'A', 'L', 'U', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'R', 'G', 'B', 'A', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'E', 'M', 'A', 'P', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'B', 'O', 'U', 'N', 'D', 'S', '_', 'T', 'E', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'B', 'O', 'U', 'N', 'D', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', 'I', 'N', 'A', 'T', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'M', 'P', 'O', 'R', 'A', 'R', 'I', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'M', 'P', 'O', 'R', 'A', 'R', 'I', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'M', 'P', 'O', 'R', 'A', 'R', 'I', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'T', 'E', 'M', 'P', 'O', 'R', 'A', 'R', 'I', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'R', 'E', 'G', 'I', 'S', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'L', 'O', 'C', 'A', 'L', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'E', 'N', 'V', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'U', 'N', 'D', 'E', 'R', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'L', 'I', 'M', 'I', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'O', 'N', 'L', 'Y', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', '_', 'O', 'N', 'L', 'Y', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'W', 'R', 'I', 'T', 'E', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'C', 'C', 'E', 'S', 'S', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'M', 'A', 'P', 'P', 'E', 'D', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'M', 'A', 'P', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'W', 'R', 'I', 'T', 'E', '_', 'D', 'I', 'S', 'C', 'A', 'R', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'I', 'M', 'E', '_', 'E', 'L', 'A', 'P', 'S', 'E', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '0', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '1', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '5', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '6', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '7', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '8', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '9', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '1', '0', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '1', '1', '_', 'A', 'R', 'B', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', '_', '2', '3', '_', 'A', 'T', 'I', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', '_', '2', '5', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', '_', '2', '6', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', '_', '2', '7', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', '_', '2', '8', '_', 'A', 'T', 'I', '\0',
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+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'N', 'S', 'T', 'A', 'N', 'T', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'P', 'A', 'S', 'S', 'E', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'P', 'E', 'R', '_', 'P', 'A', 'S', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'I', 'N', 'S', 'T', 'R', 'U', 'C', 'T', 'I', 'O', 'N', 'S', '_', 'T', 'O', 'T', 'A', 'L', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'I', 'N', 'P', 'U', 'T', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'O', 'R', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'L', 'O', 'O', 'P', 'B', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'L', 'P', 'H', 'A', '_', 'P', 'A', 'I', 'R', 'I', 'N', 'G', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'Q', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'R', '_', 'D', 'R', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'Q', '_', 'D', 'Q', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'R', 'Q', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'S', 'T', 'R', 'Q', '_', 'D', 'Q', '_', 'A', 'T', 'I', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'A', 'C', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'A', 'C', 'E', '_', 'R', 'E', 'A', 'D', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', '2', '4', '_', '2', '4', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'U', 'B', 'S', 'A', 'M', 'P', 'L', 'E', '_', '2', '4', '4', '_', '2', '4', '4', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'R', 'E', 'P', 'L', 'I', 'C', 'A', 'T', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'Z', 'E', 'R', 'O', '_', 'F', 'I', 'L', 'L', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'R', 'E', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'D', 'E', 'C', 'I', 'M', 'A', 'T', 'E', '_', 'O', 'M', 'L', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'E', 'L', 'V', 'I', 'E', 'W', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'F', 'L', 'O', 'A', 'T', '_', 'A', 'S', '_', 'I', 'N', 'T', '_', 'B', 'I', 'T', 'S', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'J', 'E', 'C', 'T', 'I', 'O', 'N', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'F', 'L', 'O', 'A', 'T', '_', 'A', 'S', '_', 'I', 'N', 'T', '_', 'B', 'I', 'T', 'S', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'F', 'L', 'O', 'A', 'T', '_', 'A', 'S', '_', 'I', 'N', 'T', '_', 'B', 'I', 'T', 'S', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '1', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '2', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '1', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '1', '_', 'C', 'O', 'E', 'F', 'F', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '1', '_', 'O', 'R', 'D', 'E', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '1', '_', 'D', 'O', 'M', 'A', 'I', 'N', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '2', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '2', '_', 'C', 'O', 'E', 'F', 'F', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '2', '_', 'O', 'R', 'D', 'E', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'M', 'A', 'P', '2', '_', 'D', 'O', 'M', 'A', 'I', 'N', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'F', 'E', 'N', 'C', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'P', 'O', 'I', 'N', 'T', 'E', 'R', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'F', 'L', 'O', 'A', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'E', 'R', 'I', 'A', 'L', 'I', 'Z', 'E', 'D', '_', 'M', 'O', 'D', 'I', 'F', 'Y', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'L', 'U', 'S', 'H', 'I', 'N', 'G', '_', 'U', 'N', 'M', 'A', 'P', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'A', 'U', 'X', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'R', 'O', 'W', '_', 'B', 'Y', 'T', 'E', 'S', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'R', 'O', 'W', '_', 'B', 'Y', 'T', 'E', 'S', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'L', 'E', 'A', 'S', 'E', 'D', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'V', 'O', 'L', 'A', 'T', 'I', 'L', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'T', 'A', 'I', 'N', 'E', 'D', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'D', 'E', 'F', 'I', 'N', 'E', 'D', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'U', 'R', 'G', 'E', 'A', 'B', 'L', 'E', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', '4', '2', '2', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'A', 'R', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'A', 'L', 'I', 'G', 'N', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'M', 'A', 'X', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'I', 'S', '_', 'R', 'O', 'W', '_', 'M', 'A', 'J', 'O', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'D', 'A', 'T', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'I', 'N', 'D', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'R', 'G', 'B', '_', 'D', 'E', 'C', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'C', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'K', 'I', 'P', '_', 'D', 'E', 'C', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'I', 'P', 'E', 'L', 'I', 'N', 'E', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', 'R', 'A', 'W', '_', '4', '2', '2', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'D', 'I', 'S', 'C', 'A', 'R', 'D', 'S', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'P', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'V', 'E', 'C', '2', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'V', 'E', 'C', '3', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'V', 'E', 'C', '4', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '2', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '3', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '4', '\0',
+ 'G', 'L', '_', 'B', 'O', 'O', 'L', '\0',
+ 'G', 'L', '_', 'B', 'O', 'O', 'L', '_', 'V', 'E', 'C', '2', '\0',
+ 'G', 'L', '_', 'B', 'O', 'O', 'L', '_', 'V', 'E', 'C', '3', '\0',
+ 'G', 'L', '_', 'B', 'O', 'O', 'L', '_', 'V', 'E', 'C', '4', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '2', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '3', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '4', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'R', 'E', 'C', 'T', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'R', 'E', 'C', 'T', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '2', 'x', '3', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '2', 'x', '4', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '3', 'x', '2', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '3', 'x', '4', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '4', 'x', '2', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'A', 'T', '4', 'x', '3', '\0',
+ 'G', 'L', '_', 'D', 'E', 'L', 'E', 'T', 'E', '_', 'S', 'T', 'A', 'T', 'U', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', '_', 'S', 'T', 'A', 'T', 'U', 'S', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'K', '_', 'S', 'T', 'A', 'T', 'U', 'S', '\0',
+ 'G', 'L', '_', 'V', 'A', 'L', 'I', 'D', 'A', 'T', 'E', '_', 'S', 'T', 'A', 'T', 'U', 'S', '\0',
+ 'G', 'L', '_', 'I', 'N', 'F', 'O', '_', 'L', 'O', 'G', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'E', 'D', '_', 'S', 'H', 'A', 'D', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'U', 'T', 'E', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'U', 'T', 'E', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'D', 'E', 'R', 'I', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'H', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'I', 'N', 'G', '_', 'L', 'A', 'N', 'G', 'U', 'A', 'G', 'E', '_', 'V', 'E', 'R', 'S', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'C', 'U', 'R', 'R', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '4', '_', 'R', 'G', 'B', '8', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '4', '_', 'R', 'G', 'B', 'A', '8', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '4', '_', 'R', '5', '_', 'G', '6', '_', 'B', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '4', '_', 'R', 'G', 'B', 'A', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '4', '_', 'R', 'G', 'B', '5', '_', 'A', '1', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '8', '_', 'R', 'G', 'B', '8', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '8', '_', 'R', 'G', 'B', 'A', '8', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '8', '_', 'R', '5', '_', 'G', '6', '_', 'B', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '8', '_', 'R', 'G', 'B', 'A', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'L', 'E', 'T', 'T', 'E', '8', '_', 'R', 'G', 'B', '5', '_', 'A', '1', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'I', 'M', 'P', 'L', 'E', 'M', 'E', 'N', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'R', 'E', 'A', 'D', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'M', 'P', 'L', 'E', 'M', 'E', 'N', 'T', 'A', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'R', 'E', 'A', 'D', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'R', 'O', 'P', '_', 'R', 'E', 'C', 'T', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'R', 'A', 'N', 'G', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'C', 'E', 'N', 'T', 'A', 'G', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'M', 'O', 'N', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'A', 'V', 'A', 'I', 'L', 'A', 'B', 'L', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'M', 'O', 'N', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'M', 'O', 'N', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'V', 'A', 'L', 'I', 'D', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'N', 'U', 'M', '_', 'L', 'E', 'V', 'E', 'L', 'S', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'T', 'A', 'R', 'G', 'E', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'V', 'A', 'L', 'I', 'D', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'S', 'T', 'A', 'T', 'E', '_', 'R', 'E', 'S', 'T', 'O', 'R', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', '2', 'D', '_', 'Y', '2', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'P', 'R', 'O', 'T', 'E', 'C', 'T', 'E', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '1', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'R', 'E', 'C', 'I', 'P', '_', 'A', 'D', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'A', 'L', 'P', 'H', 'A', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'A', 'D', 'D', '_', 'B', 'L', 'E', 'N', 'D', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'S', 'G', 'X', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'D', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'R', 'E', 'E', 'N', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'L', 'U', 'E', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'N', 'O', 'R', 'M', 'A', 'L', 'I', 'Z', 'E', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'O', 'T', 'A', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'S', 'T', 'O', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'A', 'N', 'Y', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'P', 'A', 'S', 'S', 'E', 'D', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'H', 'A', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'H', 'A', 'D', 'I', 'N', 'G', '_', 'V', 'A', 'L', 'U', 'E', '\0',
+ 'G', 'L', '_', 'R', '1', '1', 'F', '_', 'G', '1', '1', 'F', '_', 'B', '1', '0', 'F', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '1', '0', 'F', '_', '1', '1', 'F', '_', '1', '1', 'F', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '9', '_', 'E', '5', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '5', '_', '9', '_', '9', '_', '9', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'H', 'A', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '8', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '\0',
+ 'G', 'L', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '\0',
+ 'G', 'L', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '\0',
+ 'G', 'L', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '3', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', '3', 'T', 'C', '_', 'D', 'X', 'T', '5', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'L', 'A', 'T', 'C', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'L', 'A', 'T', 'C', '1', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'L', 'A', 'T', 'C', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'L', 'A', 'T', 'C', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'B', 'A', 'C', 'K', '_', 'P', 'R', 'I', 'M', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'B', 'A', 'C', 'K', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'D', 'I', 'S', 'T', 'A', 'N', 'C', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'I', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'I', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'G', 'E', 'N', 'E', 'R', 'I', 'C', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'T', 'E', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', 'S', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'A', 'R', 'T', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'R', 'E', 'C', 'O', 'R', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', 'S', '_', 'W', 'R', 'I', 'T', 'T', 'E', 'N', '\0',
+ 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'E', 'R', '_', 'D', 'I', 'S', 'C', 'A', 'R', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'E', 'A', 'V', 'E', 'D', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'T', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'R', 'L', 'E', 'A', 'V', 'E', 'D', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '\0',
+ 'G', 'L', '_', 'S', 'E', 'P', 'A', 'R', 'A', 'T', 'E', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'A', 'T', 'C', '_', 'R', 'G', 'B', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'A', 'T', 'C', '_', 'R', 'G', 'B', 'A', '_', 'E', 'X', 'P', 'L', 'I', 'C', 'I', 'T', '_', 'A', 'L', 'P', 'H', 'A', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'O', 'I', 'N', 'T', '_', 'S', 'P', 'R', 'I', 'T', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'O', 'R', 'I', 'G', 'I', 'N', '\0',
+ 'G', 'L', '_', 'L', 'O', 'W', 'E', 'R', '_', 'L', 'E', 'F', 'T', '\0',
+ 'G', 'L', '_', 'U', 'P', 'P', 'E', 'R', '_', 'L', 'E', 'F', 'T', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'R', 'E', 'F', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'V', 'A', 'L', 'U', 'E', '_', 'M', 'A', 'S', 'K', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'B', 'A', 'C', 'K', '_', 'W', 'R', 'I', 'T', 'E', 'M', 'A', 'S', 'K', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'A', 'D', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '3', '2', 'F', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '3', '2', 'F', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '8', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'N', 'A', 'M', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'F', 'A', 'C', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'A', 'Y', 'E', 'R', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'M', 'I', 'S', 'S', 'I', 'N', 'G', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'D', 'I', 'M', 'E', 'N', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'D', 'R', 'A', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'R', 'E', 'A', 'D', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'U', 'N', 'S', 'U', 'P', 'P', 'O', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '3', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '7', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '9', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '1', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '3', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '7', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '1', '9', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '1', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '3', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '7', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '2', '9', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '3', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '3', '1', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'I', 'N', 'D', 'E', 'X', '1', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'I', 'N', 'D', 'E', 'X', '4', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'I', 'N', 'D', 'E', 'X', '8', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'I', 'N', 'D', 'E', 'X', '1', '6', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'D', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'G', 'R', 'E', 'E', 'N', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'L', 'U', 'E', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'E', 'N', '_', 'S', 'T', 'R', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'H', 'A', 'L', 'F', '_', 'F', 'L', 'O', 'A', 'T', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '5', '6', '5', '\0',
+ 'G', 'L', '_', 'E', 'T', 'C', '1', '_', 'R', 'G', 'B', '8', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'Q', 'U', 'I', 'R', 'E', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '_', 'F', 'I', 'X', 'E', 'D', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'A', 'N', 'Y', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'P', 'A', 'S', 'S', 'E', 'D', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '3', '2', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '3', '2', 'U', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '3', '2', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '3', '2', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '3', '2', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '3', '2', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '6', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '6', 'U', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '6', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '8', 'U', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '8', 'U', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '8', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '8', 'U', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '3', '2', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '3', '2', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '3', '2', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '3', '2', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '3', '2', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '3', '2', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '6', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '6', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '1', '6', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '1', '6', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '1', '6', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '8', 'I', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '8', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '8', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', 'E', 'N', 'S', 'I', 'T', 'Y', '8', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '8', 'I', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'D', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'G', 'R', 'E', 'E', 'N', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'B', 'L', 'U', 'E', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'B', 'G', 'R', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'B', 'G', 'R', 'A', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'A', 'L', 'P', 'H', 'A', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', '2', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'G', 'E', 'N', 'E', 'R', 'I', 'C', '_', 'A', 'T', 'T', 'R', 'I', 'B', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'G', 'E', 'N', 'E', 'R', 'I', 'C', '_', 'R', 'E', 'S', 'U', 'L', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'L', 'A', 'Y', 'E', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'L', 'A', 'Y', 'E', 'R', '_', 'T', 'A', 'R', 'G', 'E', 'T', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'L', 'A', 'Y', 'E', 'R', '_', 'C', 'O', 'U', 'N', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '3', '2', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '3', '2', 'F', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '_', '3', '2', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '2', '4', '_', '8', '_', 'R', 'E', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'C', 'L', 'U', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'L', 'O', 'A', 'T', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'R', 'G', 'B', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'R', 'G', 'B', '_', 'C', 'A', 'P', 'A', 'B', 'L', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'E', 'D', '_', 'R', 'G', 'T', 'C', '1', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'E', 'D', '_', 'R', 'G', 'T', 'C', '1', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', '_', 'R', 'G', 'T', 'C', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'R', 'G', '_', 'R', 'G', 'T', 'C', '2', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '2', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '3', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'V', 'E', 'C', '4', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'R', 'E', 'C', 'T', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'R', 'E', 'C', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '_', 'O', 'U', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'I', 'N', 'P', 'U', 'T', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'T', 'O', 'T', 'A', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'I', 'N', 'D', 'A', 'B', 'L', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'B', 'I', 'N', 'D', 'A', 'B', 'L', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'B', 'I', 'N', 'D', 'A', 'B', 'L', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'N', 'A', 'M', 'E', 'D', '_', 'S', 'T', 'R', 'I', 'N', 'G', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'N', 'A', 'M', 'E', 'D', '_', 'S', 'T', 'R', 'I', 'N', 'G', '_', 'T', 'Y', 'P', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'B', 'I', 'N', 'D', 'A', 'B', 'L', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'W', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'M', 'E', 'D', 'I', 'U', 'M', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'H', 'I', 'G', 'H', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'L', 'O', 'W', '_', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'M', 'E', 'D', 'I', 'U', 'M', '_', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'H', 'I', 'G', 'H', '_', 'I', 'N', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', '2', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', '1', '0', '_', '1', '0', '_', '1', '0', '_', '2', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', 'S', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'V', 'E', 'C', 'T', 'O', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '_', 'V', 'E', 'C', 'T', 'O', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'V', 'E', 'C', 'T', 'O', 'R', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'M', 'O', 'D', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'M', 'O', 'D', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'W', 'A', 'I', 'T', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'N', 'O', '_', 'W', 'A', 'I', 'T', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'Y', '_', 'R', 'E', 'G', 'I', 'O', 'N', '_', 'W', 'A', 'I', 'T', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'Y', '_', 'R', 'E', 'G', 'I', 'O', 'N', '_', 'N', 'O', '_', 'W', 'A', 'I', 'T', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'V', 'E', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'N', 'O', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'V', 'E', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'Y', '_', 'R', 'E', 'G', 'I', 'O', 'N', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'V', 'E', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'Y', '_', 'R', 'E', 'G', 'I', 'O', 'N', '_', 'N', 'O', '_', 'W', 'A', 'I', 'T', '_', 'I', 'N', 'V', 'E', 'R', 'T', 'E', 'D', '\0',
+ 'G', 'L', '_', 'P', 'O', 'L', 'Y', 'G', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'C', 'L', 'A', 'M', 'P', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'P', 'A', 'U', 'S', 'E', 'D', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'A', 'C', 'T', 'I', 'V', 'E', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'I', 'E', 'L', 'D', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'I', 'M', 'E', 'S', 'T', 'A', 'M', 'P', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'F', 'I', 'L', 'L', '_', 'S', 'T', 'R', 'E', 'A', 'M', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'S', 'E', 'N', 'T', '_', 'T', 'I', 'M', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'S', 'E', 'N', 'T', '_', 'D', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '1', '6', '_', 'N', 'O', 'N', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'A', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'B', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'A', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'R', 'G', 'B', 'A', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'M', 'A', 'X', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'L', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'L', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'A', 'D', 'S', '_', 'F', 'O', 'L', 'L', 'O', 'W', '_', 'P', 'R', 'O', 'V', 'O', 'K', 'I', 'N', 'G', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'C', 'O', 'N', 'V', 'E', 'N', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'F', 'I', 'R', 'S', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'C', 'O', 'N', 'V', 'E', 'N', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'L', 'A', 'S', 'T', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'C', 'O', 'N', 'V', 'E', 'N', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'V', 'O', 'K', 'I', 'N', 'G', '_', 'V', 'E', 'R', 'T', 'E', 'X', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'M', 'A', 'S', 'K', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'M', 'A', 'S', 'K', '_', 'V', 'A', 'L', 'U', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'S', 'T', 'O', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'M', 'A', 'S', 'K', '_', 'W', 'O', 'R', 'D', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'T', 'E', 'R', 'P', 'O', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'B', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'A', 'T', 'H', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'A', 'T', 'H', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'T', 'R', 'E', 'A', 'M', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'C', 'H', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'C', 'H', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'I', 'N', 'N', 'E', 'R', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'C', 'H', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'O', 'U', 'T', 'E', 'R', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'G', 'E', 'N', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'G', 'E', 'N', '_', 'S', 'P', 'A', 'C', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'G', 'E', 'N', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'O', 'R', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'G', 'E', 'N', '_', 'P', 'O', 'I', 'N', 'T', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'I', 'S', 'O', 'L', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'C', 'T', 'I', 'O', 'N', 'A', 'L', '_', 'O', 'D', 'D', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'C', 'T', 'I', 'O', 'N', 'A', 'L', '_', 'E', 'V', 'E', 'N', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'A', 'T', 'C', 'H', '_', 'V', 'E', 'R', 'T', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'G', 'E', 'N', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'P', 'A', 'T', 'C', 'H', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'T', 'O', 'T', 'A', 'L', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'B', 'P', 'T', 'C', '_', 'U', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'B', 'P', 'T', 'C', '_', 'U', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'B', 'P', 'T', 'C', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', '_', 'B', 'P', 'T', 'C', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'F', 'L', 'O', 'A', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'L', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'E', 'D', 'G', 'E', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'U', 'T', 'O', 'M', 'A', 'T', 'I', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'C', 'L', 'U', 'S', 'I', 'V', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'E', 'X', 'C', 'L', 'U', 'S', 'I', 'V', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'M', 'O', 'D', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'G', 'P', 'U', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'T', 'R', 'I', 'B', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'G', 'P', 'U', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'P', 'Y', '_', 'R', 'E', 'A', 'D', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'P', 'Y', '_', 'W', 'R', 'I', 'T', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'R', 'E', 'S', 'O', 'U', 'R', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'N', 'A', 'M', 'E', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'L', 'E', 'V', 'E', 'L', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'L', 'A', 'Y', 'E', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'L', 'A', 'Y', 'E', 'R', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'A', 'C', 'C', 'E', 'S', 'S', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'R', 'A', 'W', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'N', 'U', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '2', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '3', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '4', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '2', 'x', '3', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '2', 'x', '4', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '3', 'x', '2', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '3', 'x', '4', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '4', 'x', '2', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'M', 'A', 'T', '4', 'x', '3', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'L', 'I', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'A', 'R', 'M', '\0',
+ 'G', 'L', '_', 'M', 'A', 'L', 'I', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'A', 'R', 'M', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'P', 'I', 'X', 'E', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'F', 'A', 'S', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'P', 'I', 'X', 'E', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'E', 'T', 'C', 'H', '_', 'P', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'M', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'E', 'T', 'C', 'H', '_', 'M', 'R', 'T', '_', 'A', 'R', 'M', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'P', 'I', 'X', 'E', 'L', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'A', 'S', 'T', 'C', '_', 'D', 'E', 'C', 'O', 'D', 'E', '_', 'P', 'R', 'E', 'C', 'I', 'S', 'I', 'O', 'N', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'E', 'D', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', '1', '6', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', '1', '6', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '6', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', 'A', '1', '6', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'N', 'O', 'R', 'M', 'A', 'L', 'I', 'Z', 'E', 'D', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'T', 'A', 'R', 'T', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'G', 'A', 'T', 'H', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'M', 'O', 'N', '_', 'G', 'L', 'O', 'B', 'A', 'L', '_', 'M', 'O', 'D', 'E', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'B', 'I', 'N', 'N', 'I', 'N', 'G', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'H', 'I', 'N', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'C', 'P', 'U', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'G', 'P', 'U', '_', 'O', 'P', 'T', 'I', 'M', 'I', 'Z', 'E', 'D', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', '_', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'T', 'O', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'G', 'P', 'U', '_', 'D', 'I', 'S', 'J', 'O', 'I', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'R', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'R', 'G', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'V', 'I', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '8', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '1', '6', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '2', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '3', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '6', '4', '_', 'V', 'E', 'C', '4', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'V', 'E', 'C', '2', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'V', 'E', 'C', '3', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'V', 'E', 'C', '4', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'V', 'E', 'C', '2', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'V', 'E', 'C', '3', '\0',
+ 'G', 'L', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'V', 'E', 'C', '4', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'M', 'O', 'D', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', 'E', 'L', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'C', 'R', 'E', 'T', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'I', 'N', 'U', 'O', 'U', 'S', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'H', 'A', 'D', 'O', 'W', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '_', 'S', 'N', 'O', 'R', 'M', '\0',
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+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'L', 'U', 'M', 'I', 'N', 'A', 'N', 'C', 'E', '8', '_', 'S', 'N', 'O', 'R', 'M', '\0',
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+ 'G', 'L', '_', 'S', 'U', 'C', 'C', 'E', 'S', 'S', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'Z', '4', 'Y', '1', '2', 'Z', '4', 'C', 'B', '1', '2', 'Z', '4', 'A', '1', '2', 'Z', '4', 'Y', '1', '2', 'Z', '4', 'C', 'R', '1', '2', 'Z', '4', 'A', '1', '2', '_', '4', '2', '2', '4', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'V', 'I', 'D', 'E', 'O', '_', 'C', 'A', 'P', 'T', 'U', 'R', 'E', '_', 'F', 'R', 'A', 'M', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'V', 'I', 'D', 'E', 'O', '_', 'C', 'A', 'P', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'E', 'L', 'D', '_', 'L', 'O', 'W', 'E', 'R', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', '3', 'D', '\0',
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+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'U', 'B', 'E', '\0',
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+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '1', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '3', 'D', '\0',
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+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
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+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '1', 'D', '\0',
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+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '3', 'D', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'R', 'E', 'C', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'U', 'B', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '1', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'C', 'U', 'B', 'E', '_', 'M', 'A', 'P', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'I', 'M', 'A', 'G', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'R', 'G', 'B', '1', '0', '_', 'A', '2', 'U', 'I', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'V', 'G', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'P', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'T', 'A', 'N', 'D', 'A', 'R', 'D', '_', 'F', 'O', 'N', 'T', '_', 'N', 'A', 'M', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'S', 'T', 'E', 'M', '_', 'F', 'O', 'N', 'T', '_', 'N', 'A', 'M', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'I', 'L', 'E', '_', 'N', 'A', 'M', 'E', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'E', 'N', 'D', '_', 'C', 'A', 'P', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'I', 'N', 'I', 'T', 'I', 'A', 'L', '_', 'E', 'N', 'D', '_', 'C', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'T', 'E', 'R', 'M', 'I', 'N', 'A', 'L', '_', 'E', 'N', 'D', '_', 'C', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'J', 'O', 'I', 'N', '_', 'S', 'T', 'Y', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'M', 'I', 'T', 'E', 'R', '_', 'L', 'I', 'M', 'I', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'D', 'A', 'S', 'H', '_', 'C', 'A', 'P', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'I', 'N', 'I', 'T', 'I', 'A', 'L', '_', 'D', 'A', 'S', 'H', '_', 'C', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'T', 'E', 'R', 'M', 'I', 'N', 'A', 'L', '_', 'D', 'A', 'S', 'H', '_', 'C', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'D', 'A', 'S', 'H', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'C', 'L', 'I', 'E', 'N', 'T', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'I', 'L', 'L', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'I', 'L', 'L', '_', 'M', 'A', 'S', 'K', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'I', 'L', 'L', '_', 'C', 'O', 'V', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'R', 'O', 'K', 'E', '_', 'C', 'O', 'V', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'R', 'O', 'K', 'E', '_', 'M', 'A', 'S', 'K', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'U', 'N', 'T', '_', 'U', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'U', 'N', 'T', '_', 'D', 'O', 'W', 'N', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'N', 'V', 'E', 'X', '_', 'H', 'U', 'L', 'L', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', '_', '3', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'F', 'F', 'I', 'N', 'E', '_', '2', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'F', 'F', 'I', 'N', 'E', '_', '3', 'D', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'P', 'O', 'S', 'E', '_', 'A', 'F', 'F', 'I', 'N', 'E', '_', '3', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'T', 'F', '8', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'T', 'F', '1', '6', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', '_', 'C', 'O', 'U', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'C', 'O', 'O', 'R', 'D', '_', 'C', 'O', 'U', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'D', 'A', 'S', 'H', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'O', 'U', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', 'D', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'I', 'L', 'L', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'R', 'O', 'K', 'E', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'Q', 'U', 'A', 'R', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'R', 'O', 'U', 'N', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'U', 'L', 'A', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'B', 'E', 'V', 'E', 'L', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'I', 'T', 'E', 'R', '_', 'R', 'E', 'V', 'E', 'R', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'I', 'T', 'E', 'R', '_', 'T', 'R', 'U', 'N', 'C', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'K', 'I', 'P', '_', 'M', 'I', 'S', 'S', 'I', 'N', 'G', '_', 'G', 'L', 'Y', 'P', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'S', 'E', '_', 'M', 'I', 'S', 'S', 'I', 'N', 'G', '_', 'G', 'L', 'Y', 'P', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'E', 'R', 'R', 'O', 'R', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'F', 'O', 'G', '_', 'G', 'E', 'N', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'C', 'C', 'U', 'M', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'T', '_', 'P', 'A', 'I', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'D', 'J', 'A', 'C', 'E', 'N', 'T', '_', 'P', 'A', 'I', 'R', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'I', 'R', 'S', 'T', '_', 'T', 'O', '_', 'R', 'E', 'S', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'G', 'E', 'N', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'G', 'E', 'N', '_', 'C', 'O', 'E', 'F', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'G', 'E', 'N', '_', 'C', 'O', 'L', 'O', 'R', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'G', 'E', 'N', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'D', 'A', 'S', 'H', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'R', 'E', 'S', 'E', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'O', 'V', 'E', '_', 'T', 'O', '_', 'R', 'E', 'S', 'E', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'O', 'V', 'E', '_', 'T', 'O', '_', 'C', 'O', 'N', 'T', 'I', 'N', 'U', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'F', 'U', 'N', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'R', 'E', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'V', 'A', 'L', 'U', 'E', '_', 'M', 'A', 'S', 'K', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', 'D', '_', 'R', 'E', 'S', 'O', 'L', 'V', 'E', '_', 'F', 'A', 'S', 'T', 'E', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'C', 'A', 'L', 'E', 'D', '_', 'R', 'E', 'S', 'O', 'L', 'V', 'E', '_', 'N', 'I', 'C', 'E', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'M', 'A', 'P', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'L', 'I', 'G', 'N', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'F', 'A', 'C', 'T', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'U', 'N', 'I', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'P', 'A', 'T', 'H', '_', 'C', 'O', 'V', 'E', 'R', '_', 'D', 'E', 'P', 'T', 'H', '_', 'F', 'U', 'N', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'I', 'L', 'I', 'T', 'Y', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'I', 'L', 'I', 'T', 'Y', '_', 'B', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'I', 'L', 'I', 'T', 'Y', '_', 'B', 'Y', '_', 'C', 'L', 'A', 'S', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'E', 'P', '_', '3', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'E', 'P', '_', '3', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'D', 'E', 'P', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'A', 'R', 'T', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'A', 'L', 'I', 'G', 'N', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'X', '1', '1', '_', 'F', 'E', 'N', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'W', 'O', 'R', 'K', '_', 'G', 'R', 'O', 'U', 'P', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'P', 'A', 'T', 'C', 'H', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'P', 'A', 'T', 'C', 'H', '_', 'I', 'N', 'D', 'I', 'R', 'E', 'C', 'T', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'V', 'I', 'E', 'W', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'M', 'U', 'L', 'T', 'I', 'V', 'I', 'E', 'W', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'R', 'O', 'B', 'U', 'S', 'T', '_', 'A', 'C', 'C', 'E', 'S', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'P', 'A', 'R', 'A', 'M', 'E', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'X', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'I', 'X', 'E', 'D', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', '2', 'D', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'L', 'O', 'R', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'P', 'T', 'H', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'G', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'E', 'R', 'V', 'E', 'R', '_', 'W', 'A', 'I', 'T', '_', 'T', 'I', 'M', 'E', 'O', 'U', 'T', '\0',
+ 'G', 'L', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'C', 'O', 'N', 'D', 'I', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'S', 'T', 'A', 'T', 'U', 'S', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'F', 'L', 'A', 'G', 'S', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'F', 'E', 'N', 'C', 'E', '\0',
+ 'G', 'L', '_', 'S', 'Y', 'N', 'C', '_', 'G', 'P', 'U', '_', 'C', 'O', 'M', 'M', 'A', 'N', 'D', 'S', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'A', 'L', 'E', 'D', '\0',
+ 'G', 'L', '_', 'S', 'I', 'G', 'N', 'A', 'L', 'E', 'D', '\0',
+ 'G', 'L', '_', 'A', 'L', 'R', 'E', 'A', 'D', 'Y', '_', 'S', 'I', 'G', 'N', 'A', 'L', 'E', 'D', '\0',
+ 'G', 'L', '_', 'T', 'I', 'M', 'E', 'O', 'U', 'T', '_', 'E', 'X', 'P', 'I', 'R', 'E', 'D', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'D', 'I', 'T', 'I', 'O', 'N', '_', 'S', 'A', 'T', 'I', 'S', 'F', 'I', 'E', 'D', '\0',
+ 'G', 'L', '_', 'W', 'A', 'I', 'T', '_', 'F', 'A', 'I', 'L', 'E', 'D', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'C', 'C', 'E', 'S', 'S', '_', 'F', 'L', 'A', 'G', 'S', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'M', 'A', 'P', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'M', 'A', 'P', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'I', 'N', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'O', 'U', 'T', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'P', 'U', 'T', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'T', 'E', 'X', 'T', '_', 'P', 'R', 'O', 'F', 'I', 'L', 'E', '_', 'M', 'A', 'S', 'K', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'U', 'N', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'D', 'E', 'P', 'T', 'H', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'B', 'L', 'O', 'C', 'K', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'M', 'U', 'T', 'A', 'B', 'L', 'E', '_', 'F', 'O', 'R', 'M', 'A', 'T', '\0',
+ 'G', 'L', '_', 'S', 'G', 'X', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'M', 'I', 'P', 'M', 'A', 'P', '_', 'N', 'E', 'A', 'R', 'E', 'S', 'T', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'U', 'B', 'I', 'C', '_', 'M', 'I', 'P', 'M', 'A', 'P', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'A', 'N', 'D', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'D', 'O', 'W', 'N', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', 'S', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'B', 'U', 'G', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'D', 'E', 'B', 'U', 'G', '_', 'L', 'O', 'G', 'G', 'E', 'D', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'L', 'O', 'G', 'G', 'E', 'D', '_', 'M', 'E', 'S', 'S', 'A', 'G', 'E', 'S', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'E', 'V', 'E', 'R', 'I', 'T', 'Y', '_', 'H', 'I', 'G', 'H', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'E', 'V', 'E', 'R', 'I', 'T', 'Y', '_', 'M', 'E', 'D', 'I', 'U', 'M', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'S', 'E', 'V', 'E', 'R', 'I', 'T', 'Y', '_', 'L', 'O', 'W', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'A', 'P', 'I', '_', 'E', 'R', 'R', 'O', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'W', 'I', 'N', 'D', 'O', 'W', '_', 'S', 'Y', 'S', 'T', 'E', 'M', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'D', 'E', 'P', 'R', 'E', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'U', 'N', 'D', 'E', 'F', 'I', 'N', 'E', 'D', '_', 'B', 'E', 'H', 'A', 'V', 'I', 'O', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'P', 'E', 'R', 'F', 'O', 'R', 'M', 'A', 'N', 'C', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'A', 'P', 'P', 'L', 'I', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'C', 'A', 'T', 'E', 'G', 'O', 'R', 'Y', '_', 'O', 'T', 'H', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'O', 'R', 'M', 'A', 'N', 'C', 'E', '_', 'M', 'O', 'N', 'I', 'T', 'O', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'R', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'E', 'X', 'T', 'E', 'R', 'N', 'A', 'L', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'R', 'E', 'S', 'U', 'L', 'T', '_', 'N', 'O', '_', 'W', 'A', 'I', 'T', '\0',
+ 'G', 'L', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'Y', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'Z', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', '3', 'D', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'L', 'A', 'Y', 'E', 'R', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'L', 'E', 'V', 'E', 'L', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'M', 'I', 'N', '_', 'L', 'O', 'D', '_', 'W', 'A', 'R', 'N', 'I', 'N', 'G', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'O', 'F', 'F', 'S', 'E', 'T', '_', 'A', 'L', 'I', 'G', 'N', 'M', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'S', 'T', 'R', 'E', 'A', 'M', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'E', 'L', 'E', 'M', 'E', 'N', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'I', 'D', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'V', 'I', 'R', 'T', 'U', 'A', 'L', '_', 'P', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'F', 'U', 'L', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'C', 'U', 'B', 'E', '_', 'M', 'I', 'P', 'M', 'A', 'P', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'P', 'A', 'R', 'S', 'E', '_', 'L', 'E', 'V', 'E', 'L', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'P', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'P', 'A', 'T', 'T', 'E', 'R', 'N', '_', 'X', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'P', 'I', 'X', 'E', 'L', 'S', '_', 'P', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'P', 'A', 'T', 'T', 'E', 'R', 'N', '_', 'Y', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'P', 'I', 'L', 'E', 'R', '_', 'T', 'H', 'R', 'E', 'A', 'D', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'I', 'O', 'N', '_', 'S', 'T', 'A', 'T', 'U', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'I', 'M', 'A', 'G', 'E', '_', 'U', 'N', 'I', 'T', 'S', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'W', 'O', 'R', 'K', '_', 'G', 'R', 'O', 'U', 'P', '_', 'C', 'O', 'U', 'N', 'T', '\0',
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+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '2', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '3', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '4', '_', 'A', 'M', 'D', '\0',
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+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '2', 'x', '4', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '3', 'x', '2', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '3', 'x', '4', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '4', 'x', '2', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'F', 'L', 'O', 'A', 'T', '1', '6', '_', 'M', 'A', 'T', '4', 'x', '3', '_', 'A', 'M', 'D', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'D', 'M', 'P', '\0',
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+ 'G', 'L', '_', 'S', 'M', 'A', 'P', 'H', 'S', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'D', 'M', 'P', '\0',
+ 'G', 'L', '_', 'D', 'M', 'P', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'D', 'M', 'P', '\0',
+ 'G', 'L', '_', 'G', 'C', 'C', 'S', 'O', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'J', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', '1', '1', '_', 'E', 'A', 'C', '\0',
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+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '8', '_', 'E', 'T', 'C', '2', '_', 'E', 'A', 'C', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'E', 'T', 'C', '2', '_', 'E', 'A', 'C', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'P', 'R', 'E', 'M', 'U', 'L', 'T', 'I', 'P', 'L', 'I', 'E', 'D', '_', 'S', 'R', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'B', 'L', 'E', 'N', 'D', '_', 'O', 'V', 'E', 'R', 'L', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'C', 'O', 'R', 'R', 'E', 'L', 'A', 'T', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'I', 'S', 'J', 'O', 'I', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'J', 'O', 'I', 'N', 'T', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'S', 'R', 'C', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'T', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'S', 'R', 'C', '_', 'O', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'S', 'T', '_', 'O', 'U', 'T', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'H', 'A', 'R', 'D', 'M', 'I', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'H', 'S', 'L', '_', 'H', 'U', 'E', '\0',
+ 'G', 'L', '_', 'H', 'S', 'L', '_', 'S', 'A', 'T', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '\0',
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+ 'G', 'L', '_', 'P', 'L', 'U', 'S', '_', 'C', 'L', 'A', 'M', 'P', 'E', 'D', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'M', 'I', 'N', 'U', 'S', '_', 'C', 'L', 'A', 'M', 'P', 'E', 'D', '_', 'N', 'V', '\0',
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+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'L', 'G', 'P', 'U', '_', 'G', 'P', 'U', 'S', '_', 'N', 'V', 'X', '\0',
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+ 'G', 'L', '_', 'P', 'R', 'I', 'M', 'I', 'T', 'I', 'V', 'E', '_', 'B', 'O', 'U', 'N', 'D', 'I', 'N', 'G', '_', 'B', 'O', 'X', '\0',
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+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'A', 'R', 'T', '\0',
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+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'I', 'N', 'D', 'I', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'U', 'N', 'S', 'I', 'G', 'N', 'E', 'D', '_', 'I', 'N', 'T', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'T', 'O', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'C', 'O', 'L', 'O', 'R', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'D', 'E', 'B', 'U', 'G', '_', 'O', 'U', 'T', 'P', 'U', 'T', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'L', 'O', 'C', 'K', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'I', 'N', 'P', 'U', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'O', 'U', 'T', 'P', 'U', 'T', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'B', 'L', 'O', 'C', 'K', '\0',
+ 'G', 'L', '_', 'I', 'S', '_', 'P', 'E', 'R', '_', 'P', 'A', 'T', 'C', 'H', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'V', 'A', 'R', 'Y', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'R', 'E', 'S', 'O', 'U', 'R', 'C', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'N', 'U', 'M', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'N', 'U', 'M', '_', 'C', 'O', 'M', 'P', 'A', 'T', 'I', 'B', 'L', 'E', '_', 'S', 'U', 'B', 'R', 'O', 'U', 'T', 'I', 'N', 'E', 'S', '\0',
+ 'G', 'L', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '\0',
+ 'G', 'L', '_', 'T', 'Y', 'P', 'E', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'O', 'F', 'F', 'S', 'E', 'T', '\0',
+ 'G', 'L', '_', 'B', 'L', 'O', 'C', 'K', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'R', 'I', 'X', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'I', 'S', '_', 'R', 'O', 'W', '_', 'M', 'A', 'J', 'O', 'R', '\0',
+ 'G', 'L', '_', 'A', 'T', 'O', 'M', 'I', 'C', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'B', 'I', 'N', 'D', 'I', 'N', 'G', '\0',
+ 'G', 'L', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'A', 'C', 'T', 'I', 'V', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'C', 'O', 'N', 'T', 'R', 'O', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'T', 'E', 'S', 'S', '_', 'E', 'V', 'A', 'L', 'U', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'G', 'E', 'O', 'M', 'E', 'T', 'R', 'Y', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'R', 'E', 'F', 'E', 'R', 'E', 'N', 'C', 'E', 'D', '_', 'B', 'Y', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'S', 'H', 'A', 'D', 'E', 'R', '\0',
+ 'G', 'L', '_', 'T', 'O', 'P', '_', 'L', 'E', 'V', 'E', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'I', 'Z', 'E', '\0',
+ 'G', 'L', '_', 'T', 'O', 'P', '_', 'L', 'E', 'V', 'E', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'L', 'A', 'Y', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'F', 'I', 'X', 'E', 'D', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'W', 'I', 'D', 'T', 'H', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'H', 'E', 'I', 'G', 'H', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'L', 'A', 'Y', 'E', 'R', 'S', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '\0',
+ 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'F', 'I', 'X', 'E', 'D', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'L', 'L', 'O', 'W', 'E', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'E', 'F', 'F', 'E', 'C', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'I', 'X', 'E', 'D', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'I', 'X', 'E', 'D', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'S', 'U', 'P', 'P', 'O', 'R', 'T', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'M', 'O', 'D', 'U', 'L', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'W', 'A', 'R', 'P', '_', 'S', 'I', 'Z', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'W', 'A', 'R', 'P', 'S', '_', 'P', 'E', 'R', '_', 'S', 'M', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'M', '_', 'C', 'O', 'U', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'I', 'L', 'L', '_', 'R', 'E', 'C', 'T', 'A', 'N', 'G', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'B', 'I', 'T', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'W', 'I', 'D', 'T', 'H', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'H', 'E', 'I', 'G', 'H', 'T', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'T', 'A', 'B', 'L', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'P', 'I', 'X', 'E', 'L', '_', 'G', 'R', 'I', 'D', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'G', 'R', 'O', 'U', 'P', '_', 'I', 'N', 'V', 'O', 'C', 'A', 'T', 'I', 'O', 'N', 'S', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'C', 'O', 'M', 'P', 'U', 'T', 'E', '_', 'V', 'A', 'R', 'I', 'A', 'B', 'L', 'E', '_', 'G', 'R', 'O', 'U', 'P', '_', 'S', 'I', 'Z', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', 'I', 'Z', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'P', 'R', 'E', 'C', 'I', 'S', 'I', 'O', 'N', '_', 'B', 'I', 'A', 'S', '_', 'X', '_', 'B', 'I', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'P', 'R', 'E', 'C', 'I', 'S', 'I', 'O', 'N', '_', 'B', 'I', 'A', 'S', '_', 'Y', '_', 'B', 'I', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'U', 'B', 'P', 'I', 'X', 'E', 'L', '_', 'P', 'R', 'E', 'C', 'I', 'S', 'I', 'O', 'N', '_', 'B', 'I', 'A', 'S', '_', 'B', 'I', 'T', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'C', 'O', 'M', 'P', 'O', 'N', 'E', 'N', 'T', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'D', 'E', 'X', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'O', 'R', 'M', '_', 'F', 'E', 'E', 'D', 'B', 'A', 'C', 'K', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'S', 'T', 'R', 'I', 'D', 'E', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'O', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'D', 'I', 'T', 'H', 'E', 'R', '_', 'D', 'E', 'F', 'A', 'U', 'L', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'O', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'D', 'I', 'T', 'H', 'E', 'R', '_', 'E', 'N', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'A', 'L', 'P', 'H', 'A', '_', 'T', 'O', '_', 'C', 'O', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'D', 'I', 'T', 'H', 'E', 'R', '_', 'D', 'I', 'S', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'Z', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'Z', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'V', 'E', '_', 'W', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'W', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'Z', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'S', 'W', 'I', 'Z', 'Z', 'L', 'E', '_', 'W', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'O', 'R', 'I', 'G', 'I', 'N', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'D', 'E', 'P', 'T', 'H', '_', 'M', 'O', 'D', 'E', '\0',
+ 'G', 'L', '_', 'N', 'E', 'G', 'A', 'T', 'I', 'V', 'E', '_', 'O', 'N', 'E', '_', 'T', 'O', '_', 'O', 'N', 'E', '\0',
+ 'G', 'L', '_', 'Z', 'E', 'R', 'O', '_', 'T', 'O', '_', 'O', 'N', 'E', '\0',
+ 'G', 'L', '_', 'C', 'L', 'E', 'A', 'R', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'R', 'E', 'D', 'U', 'C', 'T', 'I', 'O', 'N', '_', 'M', 'O', 'D', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'W', 'E', 'I', 'G', 'H', 'T', 'E', 'D', '_', 'A', 'V', 'E', 'R', 'A', 'G', 'E', '_', 'A', 'R', 'B', '\0',
+ 'G', 'L', '_', 'F', 'O', 'N', 'T', '_', 'G', 'L', 'Y', 'P', 'H', 'S', '_', 'A', 'V', 'A', 'I', 'L', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'N', 'T', '_', 'T', 'A', 'R', 'G', 'E', 'T', '_', 'U', 'N', 'A', 'V', 'A', 'I', 'L', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'N', 'T', '_', 'U', 'N', 'A', 'V', 'A', 'I', 'L', 'A', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'O', 'N', 'T', '_', 'U', 'N', 'I', 'N', 'T', 'E', 'L', 'L', 'I', 'G', 'I', 'B', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'T', 'A', 'N', 'D', 'A', 'R', 'D', '_', 'F', 'O', 'N', 'T', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'G', 'M', 'E', 'N', 'T', '_', 'I', 'N', 'P', 'U', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'U', 'N', 'I', 'F', 'I', 'E', 'D', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'D', 'D', 'R', 'E', 'S', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'U', 'N', 'I', 'F', 'O', 'R', 'M', '_', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'P', 'E', 'R', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'X', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'U', 'P', 'E', 'R', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'S', 'C', 'A', 'L', 'E', '_', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'F', 'O', 'R', 'M', 'A', 'N', 'T', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'D', 'I', 'L', 'A', 'T', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'D', 'I', 'L', 'A', 'T', 'E', '_', 'R', 'A', 'N', 'G', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'D', 'I', 'L', 'A', 'T', 'E', '_', 'G', 'R', 'A', 'N', 'U', 'L', 'A', 'R', 'I', 'T', 'Y', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'W', '_', 'S', 'C', 'A', 'L', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'W', '_', 'S', 'C', 'A', 'L', 'E', '_', 'X', '_', 'C', 'O', 'E', 'F', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'V', 'I', 'E', 'W', 'P', 'O', 'R', 'T', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'W', '_', 'S', 'C', 'A', 'L', 'E', '_', 'Y', '_', 'C', 'O', 'E', 'F', 'F', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'C', 'O', 'U', 'N', 'T', 'S', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'I', 'N', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'R', 'A', 'N', 'G', 'E', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'I', 'N', 'E', '_', 'W', 'I', 'D', 'T', 'H', '_', 'G', 'R', 'A', 'N', 'U', 'L', 'A', 'R', 'I', 'T', 'Y', '\0',
+ 'G', 'L', '_', 'T', 'R', 'A', 'N', 'S', 'L', 'A', 'T', 'E', 'D', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'B', 'G', 'R', 'A', '8', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'U', 'S', 'A', 'G', 'E', '_', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'A', 'C', 'K', '_', 'R', 'E', 'V', 'E', 'R', 'S', 'E', '_', 'R', 'O', 'W', '_', 'O', 'R', 'D', 'E', 'R', '_', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'A', 'N', 'G', 'L', 'E', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '1', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '3', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '4', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '5', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'R', 'G', 'B', 'A', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', 'x', '6', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '4', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '8', 'x', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '5', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '6', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '8', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '0', 'x', '1', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '0', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '1', '2', 'x', '1', '2', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '3', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '3', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', 'x', '3', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '4', 'x', '4', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '4', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', 'x', '4', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '5', 'x', '5', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '5', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', 'x', '5', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '8', '_', 'A', 'L', 'P', 'H', 'A', '8', '_', 'A', 'S', 'T', 'C', '_', '6', 'x', '6', 'x', '6', '_', 'O', 'E', 'S', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '2', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'C', 'O', 'M', 'P', 'R', 'E', 'S', 'S', 'E', 'D', '_', 'S', 'R', 'G', 'B', '_', 'A', 'L', 'P', 'H', 'A', '_', 'P', 'V', 'R', 'T', 'C', '_', '4', 'B', 'P', 'P', 'V', '2', '_', 'I', 'M', 'G', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'E', 'V', 'E', 'N', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'O', 'R', 'M', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'U', 'R', 'A', 'T', 'I', 'O', 'N', '_', 'R', 'A', 'W', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'T', 'H', 'R', 'O', 'U', 'G', 'H', 'P', 'U', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'R', 'A', 'W', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'T', 'I', 'M', 'E', 'S', 'T', 'A', 'M', 'P', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'U', 'I', 'N', 'T', '3', '2', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'U', 'I', 'N', 'T', '6', '4', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'F', 'L', 'O', 'A', 'T', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'D', 'O', 'U', 'B', 'L', 'E', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'A', 'T', 'A', '_', 'B', 'O', 'O', 'L', '3', '2', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'Q', 'U', 'E', 'R', 'Y', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'N', 'A', 'M', 'E', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', '_', 'D', 'E', 'S', 'C', '_', 'L', 'E', 'N', 'G', 'T', 'H', '_', 'M', 'A', 'X', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', 'F', 'Q', 'U', 'E', 'R', 'Y', '_', 'G', 'P', 'A', '_', 'E', 'X', 'T', 'E', 'N', 'D', 'E', 'D', '_', 'C', 'O', 'U', 'N', 'T', 'E', 'R', 'S', '_', 'I', 'N', 'T', 'E', 'L', '\0',
+ 'G', 'L', '_', 'P', 'E', 'R', '_', 'G', 'P', 'U', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'M', 'U', 'L', 'T', 'I', 'C', 'A', 'S', 'T', '_', 'P', 'R', 'O', 'G', 'R', 'A', 'M', 'M', 'A', 'B', 'L', 'E', '_', 'S', 'A', 'M', 'P', 'L', 'E', '_', 'L', 'O', 'C', 'A', 'T', 'I', 'O', 'N', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'P', 'O', 'S', 'T', '_', 'S', 'N', 'A', 'P', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'A', 'T', 'I', 'V', 'E', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'M', 'O', 'D', 'E', '_', 'P', 'R', 'E', '_', 'S', 'N', 'A', 'P', '_', 'T', 'R', 'I', 'A', 'N', 'G', 'L', 'E', 'S', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '_', 'F', 'O', 'R', 'M', 'A', 'T', '_', 'S', 'P', 'I', 'R', '_', 'V', '\0',
+ 'G', 'L', '_', 'S', 'P', 'I', 'R', '_', 'V', '_', 'B', 'I', 'N', 'A', 'R', 'Y', '\0',
+ 'G', 'L', '_', 'S', 'P', 'I', 'R', '_', 'V', '_', 'E', 'X', 'T', 'E', 'N', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'S', 'P', 'I', 'R', '_', 'V', '_', 'E', 'X', 'T', 'E', 'N', 'S', 'I', 'O', 'N', 'S', '\0',
+ 'G', 'L', '_', 'R', 'E', 'N', 'D', 'E', 'R', '_', 'G', 'P', 'U', '_', 'M', 'A', 'S', 'K', '_', 'N', 'V', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'T', 'I', 'L', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'D', 'I', 'C', 'A', 'T', 'E', 'D', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'T', 'I', 'L', 'I', 'N', 'G', '_', 'T', 'Y', 'P', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'T', 'I', 'L', 'I', 'N', 'G', '_', 'T', 'Y', 'P', 'E', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'O', 'P', 'T', 'I', 'M', 'A', 'L', '_', 'T', 'I', 'L', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'I', 'N', 'E', 'A', 'R', '_', 'T', 'I', 'L', 'I', 'N', 'G', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'O', 'P', 'A', 'Q', 'U', 'E', '_', 'F', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'O', 'P', 'A', 'Q', 'U', 'E', '_', 'W', 'I', 'N', '3', '2', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'O', 'P', 'A', 'Q', 'U', 'E', '_', 'W', 'I', 'N', '3', '2', '_', 'K', 'M', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'D', '3', 'D', '1', '2', '_', 'T', 'I', 'L', 'E', 'P', 'O', 'O', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'D', '3', 'D', '1', '2', '_', 'R', 'E', 'S', 'O', 'U', 'R', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'D', '3', 'D', '1', '1', '_', 'I', 'M', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'D', '3', 'D', '1', '1', '_', 'I', 'M', 'A', 'G', 'E', '_', 'K', 'M', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'G', 'E', 'N', 'E', 'R', 'A', 'L', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'D', 'E', 'P', 'T', 'H', '_', 'S', 'T', 'E', 'N', 'C', 'I', 'L', '_', 'R', 'E', 'A', 'D', '_', 'O', 'N', 'L', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'R', 'E', 'A', 'D', '_', 'O', 'N', 'L', 'Y', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'E', 'R', '_', 'S', 'R', 'C', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'L', 'A', 'Y', 'O', 'U', 'T', '_', 'T', 'R', 'A', 'N', 'S', 'F', 'E', 'R', '_', 'D', 'S', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'T', 'Y', 'P', 'E', '_', 'D', '3', 'D', '1', '2', '_', 'F', 'E', 'N', 'C', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', '3', 'D', '1', '2', '_', 'F', 'E', 'N', 'C', 'E', '_', 'V', 'A', 'L', 'U', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'N', 'U', 'M', '_', 'D', 'E', 'V', 'I', 'C', 'E', '_', 'U', 'U', 'I', 'D', 'S', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'V', 'I', 'C', 'E', '_', 'U', 'U', 'I', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'R', 'I', 'V', 'E', 'R', '_', 'U', 'U', 'I', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'V', 'I', 'C', 'E', '_', 'L', 'U', 'I', 'D', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'D', 'E', 'V', 'I', 'C', 'E', '_', 'N', 'O', 'D', 'E', '_', 'M', 'A', 'S', 'K', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'P', 'R', 'O', 'T', 'E', 'C', 'T', 'E', 'D', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'O', 'B', 'J', 'E', 'C', 'T', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'N', 'U', 'M', '_', 'V', 'I', 'E', 'W', 'S', '_', 'O', 'V', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'I', 'E', 'W', 'S', '_', 'O', 'V', 'R', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'A', 'T', 'T', 'A', 'C', 'H', 'M', 'E', 'N', 'T', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'B', 'A', 'S', 'E', '_', 'V', 'I', 'E', 'W', '_', 'I', 'N', 'D', 'E', 'X', '_', 'O', 'V', 'R', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'V', 'I', 'E', 'W', '_', 'T', 'A', 'R', 'G', 'E', 'T', 'S', '_', 'O', 'V', 'R', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'F', 'A', 'S', 'T', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'S', 'I', 'Z', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'I', 'N', 'C', 'O', 'M', 'P', 'L', 'E', 'T', 'E', '_', 'I', 'N', 'S', 'U', 'F', 'F', 'I', 'C', 'I', 'E', 'N', 'T', '_', 'S', 'H', 'A', 'D', 'E', 'R', '_', 'C', 'O', 'M', 'B', 'I', 'N', 'E', 'D', '_', 'L', 'O', 'C', 'A', 'L', '_', 'S', 'T', 'O', 'R', 'A', 'G', 'E', '_', 'E', 'X', 'T', '\0',
+ 'G', 'L', '_', 'F', 'R', 'A', 'M', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'F', 'E', 'T', 'C', 'H', '_', 'N', 'O', 'N', 'C', 'O', 'H', 'E', 'R', 'E', 'N', 'T', '_', 'Q', 'C', 'O', 'M', '\0',
+ 'G', 'L', '_', 'R', 'A', 'S', 'T', 'E', 'R', '_', 'P', 'O', 'S', 'I', 'T', 'I', 'O', 'N', '_', 'U', 'N', 'C', 'L', 'I', 'P', 'P', 'E', 'D', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'P', 'R', 'E', 'F', 'E', 'R', '_', 'D', 'O', 'U', 'B', 'L', 'E', 'B', 'U', 'F', 'F', 'E', 'R', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'C', 'O', 'N', 'S', 'E', 'R', 'V', 'E', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'R', 'E', 'C', 'L', 'A', 'I', 'M', '_', 'M', 'E', 'M', 'O', 'R', 'Y', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'G', 'R', 'A', 'P', 'H', 'I', 'C', 'S', '_', 'H', 'A', 'N', 'D', 'L', 'E', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'G', 'R', 'A', 'P', 'H', 'I', 'C', 'S', '_', 'B', 'E', 'G', 'I', 'N', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'N', 'A', 'T', 'I', 'V', 'E', '_', 'G', 'R', 'A', 'P', 'H', 'I', 'C', 'S', '_', 'E', 'N', 'D', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'W', 'A', 'Y', 'S', '_', 'F', 'A', 'S', 'T', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'W', 'A', 'Y', 'S', '_', 'S', 'O', 'F', 'T', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', 'O', 'W', '_', 'D', 'R', 'A', 'W', '_', 'O', 'B', 'J', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', 'O', 'W', '_', 'D', 'R', 'A', 'W', '_', 'W', 'I', 'N', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', 'O', 'W', '_', 'D', 'R', 'A', 'W', '_', 'F', 'R', 'G', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', 'O', 'W', '_', 'D', 'R', 'A', 'W', '_', 'M', 'E', 'M', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'S', 'T', 'R', 'I', 'C', 'T', '_', 'D', 'E', 'P', 'T', 'H', 'F', 'U', 'N', 'C', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'S', 'T', 'R', 'I', 'C', 'T', '_', 'L', 'I', 'G', 'H', 'T', 'I', 'N', 'G', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'S', 'T', 'R', 'I', 'C', 'T', '_', 'S', 'C', 'I', 'S', 'S', 'O', 'R', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'F', 'U', 'L', 'L', '_', 'S', 'T', 'I', 'P', 'P', 'L', 'E', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'N', 'E', 'A', 'R', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'C', 'L', 'I', 'P', '_', 'F', 'A', 'R', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'W', 'I', 'D', 'E', '_', 'L', 'I', 'N', 'E', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'B', 'A', 'C', 'K', '_', 'N', 'O', 'R', 'M', 'A', 'L', 'S', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'D', 'A', 'T', 'A', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'C', 'O', 'N', 'S', 'I', 'S', 'T', 'E', 'N', 'T', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'M', 'A', 'T', 'E', 'R', 'I', 'A', 'L', '_', 'S', 'I', 'D', 'E', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'M', 'A', 'X', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'H', 'I', 'N', 'T', '_', 'P', 'G', 'I', '\0',
+ 'G', 'L', '_', 'C', 'U', 'L', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'A', 'L', 'L', '_', 'S', 'T', 'A', 'T', 'I', 'C', '_', 'D', 'A', 'T', 'A', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'S', 'T', 'A', 'T', 'I', 'C', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', 'I', 'N', 'A', 'T', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'V', 'E', 'R', 'T', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'N', 'O', 'R', 'M', 'A', 'L', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'I', 'N', 'D', 'E', 'X', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'T', 'E', 'X', 'T', 'U', 'R', 'E', '_', 'C', 'O', 'O', 'R', 'D', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'E', 'D', 'G', 'E', '_', 'F', 'L', 'A', 'G', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'F', 'O', 'G', '_', 'C', 'O', 'O', 'R', 'D', 'I', 'N', 'A', 'T', 'E', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+ 'G', 'L', '_', 'S', 'E', 'C', 'O', 'N', 'D', 'A', 'R', 'Y', '_', 'C', 'O', 'L', 'O', 'R', '_', 'A', 'R', 'R', 'A', 'Y', '_', 'L', 'I', 'S', 'T', '_', 'S', 'T', 'R', 'I', 'D', 'E', '_', 'I', 'B', 'M', '\0',
+};
+
+static const enum_elt enum_string_table_offsets[3657] =
+{
+ { 0, 0x00000000 }, /* GL_NONE */
+ { 8, 0x00000001 }, /* GL_TRUE */
+ { 16, 0x00000002 }, /* GL_LINE_LOOP */
+ { 29, 0x00000003 }, /* GL_LINE_STRIP */
+ { 43, 0x00000004 }, /* GL_TRIANGLES */
+ { 56, 0x00000005 }, /* GL_TRIANGLE_STRIP */
+ { 74, 0x00000006 }, /* GL_TRIANGLE_FAN */
+ { 90, 0x00000007 }, /* GL_QUADS */
+ { 99, 0x00000008 }, /* GL_QUAD_STRIP */
+ { 113, 0x00000009 }, /* GL_POLYGON */
+ { 124, 0x0000000A }, /* GL_LINES_ADJACENCY */
+ { 143, 0x0000000B }, /* GL_LINE_STRIP_ADJACENCY */
+ { 167, 0x0000000C }, /* GL_TRIANGLES_ADJACENCY */
+ { 190, 0x0000000D }, /* GL_TRIANGLE_STRIP_ADJACENCY */
+ { 218, 0x0000000E }, /* GL_PATCHES */
+ { 229, 0x0000000F }, /* GL_ALPHA_REF_COMMAND_NV */
+ { 253, 0x00000010 }, /* GL_VIEWPORT_COMMAND_NV */
+ { 276, 0x00000011 }, /* GL_SCISSOR_COMMAND_NV */
+ { 298, 0x00000012 }, /* GL_FRONT_FACE_COMMAND_NV */
+ { 323, 0x00000013 }, /* GL_RELATIVE_SMALL_CCW_ARC_TO_NV */
+ { 355, 0x00000014 }, /* GL_SMALL_CW_ARC_TO_NV */
+ { 377, 0x00000015 }, /* GL_RELATIVE_SMALL_CW_ARC_TO_NV */
+ { 408, 0x00000016 }, /* GL_UUID_SIZE_EXT */
+ { 425, 0x00000017 }, /* GL_RELATIVE_LARGE_CCW_ARC_TO_NV */
+ { 457, 0x00000018 }, /* GL_LARGE_CW_ARC_TO_NV */
+ { 479, 0x00000019 }, /* GL_RELATIVE_LARGE_CW_ARC_TO_NV */
+ { 510, 0x0000001A }, /* GL_CONIC_CURVE_TO_NV */
+ { 531, 0x0000001B }, /* GL_RELATIVE_CONIC_CURVE_TO_NV */
+ { 561, 0x000000C0 }, /* GL_SHARED_EDGE_NV */
+ { 579, 0x000000E8 }, /* GL_ROUNDED_RECT_NV */
+ { 598, 0x000000E9 }, /* GL_RELATIVE_ROUNDED_RECT_NV */
+ { 626, 0x000000EA }, /* GL_ROUNDED_RECT2_NV */
+ { 646, 0x000000EB }, /* GL_RELATIVE_ROUNDED_RECT2_NV */
+ { 675, 0x000000EC }, /* GL_ROUNDED_RECT4_NV */
+ { 695, 0x000000ED }, /* GL_RELATIVE_ROUNDED_RECT4_NV */
+ { 724, 0x000000EE }, /* GL_ROUNDED_RECT8_NV */
+ { 744, 0x000000EF }, /* GL_RELATIVE_ROUNDED_RECT8_NV */
+ { 773, 0x000000F0 }, /* GL_RESTART_PATH_NV */
+ { 792, 0x000000F2 }, /* GL_DUP_FIRST_CUBIC_CURVE_TO_NV */
+ { 823, 0x000000F4 }, /* GL_DUP_LAST_CUBIC_CURVE_TO_NV */
+ { 853, 0x000000F6 }, /* GL_RECT_NV */
+ { 864, 0x000000F7 }, /* GL_RELATIVE_RECT_NV */
+ { 884, 0x000000F8 }, /* GL_CIRCULAR_CCW_ARC_TO_NV */
+ { 910, 0x000000FA }, /* GL_CIRCULAR_CW_ARC_TO_NV */
+ { 935, 0x000000FC }, /* GL_CIRCULAR_TANGENT_ARC_TO_NV */
+ { 965, 0x000000FE }, /* GL_ARC_TO_NV */
+ { 978, 0x000000FF }, /* GL_RELATIVE_ARC_TO_NV */
+ { 1000, 0x00000100 }, /* GL_ACCUM */
+ { 1009, 0x00000101 }, /* GL_LOAD */
+ { 1017, 0x00000102 }, /* GL_RETURN */
+ { 1027, 0x00000103 }, /* GL_MULT */
+ { 1035, 0x00000104 }, /* GL_ADD */
+ { 1042, 0x00000200 }, /* GL_NEVER */
+ { 1051, 0x00000201 }, /* GL_LESS */
+ { 1059, 0x00000202 }, /* GL_EQUAL */
+ { 1068, 0x00000203 }, /* GL_LEQUAL */
+ { 1078, 0x00000204 }, /* GL_GREATER */
+ { 1089, 0x00000205 }, /* GL_NOTEQUAL */
+ { 1101, 0x00000206 }, /* GL_GEQUAL */
+ { 1111, 0x00000207 }, /* GL_ALWAYS */
+ { 1121, 0x00000300 }, /* GL_SRC_COLOR */
+ { 1134, 0x00000301 }, /* GL_ONE_MINUS_SRC_COLOR */
+ { 1157, 0x00000302 }, /* GL_SRC_ALPHA */
+ { 1170, 0x00000303 }, /* GL_ONE_MINUS_SRC_ALPHA */
+ { 1193, 0x00000304 }, /* GL_DST_ALPHA */
+ { 1206, 0x00000305 }, /* GL_ONE_MINUS_DST_ALPHA */
+ { 1229, 0x00000306 }, /* GL_DST_COLOR */
+ { 1242, 0x00000307 }, /* GL_ONE_MINUS_DST_COLOR */
+ { 1265, 0x00000308 }, /* GL_SRC_ALPHA_SATURATE */
+ { 1287, 0x00000400 }, /* GL_FRONT_LEFT */
+ { 1301, 0x00000401 }, /* GL_FRONT_RIGHT */
+ { 1316, 0x00000402 }, /* GL_BACK_LEFT */
+ { 1329, 0x00000403 }, /* GL_BACK_RIGHT */
+ { 1343, 0x00000404 }, /* GL_FRONT */
+ { 1352, 0x00000405 }, /* GL_BACK */
+ { 1360, 0x00000406 }, /* GL_LEFT */
+ { 1368, 0x00000407 }, /* GL_RIGHT */
+ { 1377, 0x00000408 }, /* GL_FRONT_AND_BACK */
+ { 1395, 0x00000409 }, /* GL_AUX0 */
+ { 1403, 0x0000040A }, /* GL_AUX1 */
+ { 1411, 0x0000040B }, /* GL_AUX2 */
+ { 1419, 0x0000040C }, /* GL_AUX3 */
+ { 1427, 0x00000500 }, /* GL_INVALID_ENUM */
+ { 1443, 0x00000501 }, /* GL_INVALID_VALUE */
+ { 1460, 0x00000502 }, /* GL_INVALID_OPERATION */
+ { 1481, 0x00000503 }, /* GL_STACK_OVERFLOW */
+ { 1499, 0x00000504 }, /* GL_STACK_UNDERFLOW */
+ { 1518, 0x00000505 }, /* GL_OUT_OF_MEMORY */
+ { 1535, 0x00000506 }, /* GL_INVALID_FRAMEBUFFER_OPERATION */
+ { 1568, 0x00000507 }, /* GL_CONTEXT_LOST */
+ { 1584, 0x00000600 }, /* GL_2D */
+ { 1590, 0x00000601 }, /* GL_3D */
+ { 1596, 0x00000602 }, /* GL_3D_COLOR */
+ { 1608, 0x00000603 }, /* GL_3D_COLOR_TEXTURE */
+ { 1628, 0x00000604 }, /* GL_4D_COLOR_TEXTURE */
+ { 1648, 0x00000700 }, /* GL_PASS_THROUGH_TOKEN */
+ { 1670, 0x00000701 }, /* GL_POINT_TOKEN */
+ { 1685, 0x00000702 }, /* GL_LINE_TOKEN */
+ { 1699, 0x00000703 }, /* GL_POLYGON_TOKEN */
+ { 1716, 0x00000704 }, /* GL_BITMAP_TOKEN */
+ { 1732, 0x00000705 }, /* GL_DRAW_PIXEL_TOKEN */
+ { 1752, 0x00000706 }, /* GL_COPY_PIXEL_TOKEN */
+ { 1772, 0x00000707 }, /* GL_LINE_RESET_TOKEN */
+ { 1792, 0x00000800 }, /* GL_EXP */
+ { 1799, 0x00000801 }, /* GL_EXP2 */
+ { 1807, 0x00000900 }, /* GL_CW */
+ { 1813, 0x00000901 }, /* GL_CCW */
+ { 1820, 0x00000A00 }, /* GL_COEFF */
+ { 1829, 0x00000A01 }, /* GL_ORDER */
+ { 1838, 0x00000A02 }, /* GL_DOMAIN */
+ { 1848, 0x00000B00 }, /* GL_CURRENT_COLOR */
+ { 1865, 0x00000B01 }, /* GL_CURRENT_INDEX */
+ { 1882, 0x00000B02 }, /* GL_CURRENT_NORMAL */
+ { 1900, 0x00000B03 }, /* GL_CURRENT_TEXTURE_COORDS */
+ { 1926, 0x00000B04 }, /* GL_CURRENT_RASTER_COLOR */
+ { 1950, 0x00000B05 }, /* GL_CURRENT_RASTER_INDEX */
+ { 1974, 0x00000B06 }, /* GL_CURRENT_RASTER_TEXTURE_COORDS */
+ { 2007, 0x00000B07 }, /* GL_CURRENT_RASTER_POSITION */
+ { 2034, 0x00000B08 }, /* GL_CURRENT_RASTER_POSITION_VALID */
+ { 2067, 0x00000B09 }, /* GL_CURRENT_RASTER_DISTANCE */
+ { 2094, 0x00000B10 }, /* GL_POINT_SMOOTH */
+ { 2110, 0x00000B11 }, /* GL_POINT_SIZE */
+ { 2124, 0x00000B12 }, /* GL_SMOOTH_POINT_SIZE_RANGE */
+ { 2151, 0x00000B13 }, /* GL_SMOOTH_POINT_SIZE_GRANULARITY */
+ { 2184, 0x00000B20 }, /* GL_LINE_SMOOTH */
+ { 2199, 0x00000B21 }, /* GL_LINE_WIDTH */
+ { 2213, 0x00000B22 }, /* GL_SMOOTH_LINE_WIDTH_RANGE */
+ { 2240, 0x00000B23 }, /* GL_SMOOTH_LINE_WIDTH_GRANULARITY */
+ { 2273, 0x00000B24 }, /* GL_LINE_STIPPLE */
+ { 2289, 0x00000B25 }, /* GL_LINE_STIPPLE_PATTERN */
+ { 2313, 0x00000B26 }, /* GL_LINE_STIPPLE_REPEAT */
+ { 2336, 0x00000B30 }, /* GL_LIST_MODE */
+ { 2349, 0x00000B31 }, /* GL_MAX_LIST_NESTING */
+ { 2369, 0x00000B32 }, /* GL_LIST_BASE */
+ { 2382, 0x00000B33 }, /* GL_LIST_INDEX */
+ { 2396, 0x00000B40 }, /* GL_POLYGON_MODE */
+ { 2412, 0x00000B41 }, /* GL_POLYGON_SMOOTH */
+ { 2430, 0x00000B42 }, /* GL_POLYGON_STIPPLE */
+ { 2449, 0x00000B43 }, /* GL_EDGE_FLAG */
+ { 2462, 0x00000B44 }, /* GL_CULL_FACE */
+ { 2475, 0x00000B45 }, /* GL_CULL_FACE_MODE */
+ { 2493, 0x00000B46 }, /* GL_FRONT_FACE */
+ { 2507, 0x00000B50 }, /* GL_LIGHTING */
+ { 2519, 0x00000B51 }, /* GL_LIGHT_MODEL_LOCAL_VIEWER */
+ { 2547, 0x00000B52 }, /* GL_LIGHT_MODEL_TWO_SIDE */
+ { 2571, 0x00000B53 }, /* GL_LIGHT_MODEL_AMBIENT */
+ { 2594, 0x00000B54 }, /* GL_SHADE_MODEL */
+ { 2609, 0x00000B55 }, /* GL_COLOR_MATERIAL_FACE */
+ { 2632, 0x00000B56 }, /* GL_COLOR_MATERIAL_PARAMETER */
+ { 2660, 0x00000B57 }, /* GL_COLOR_MATERIAL */
+ { 2678, 0x00000B60 }, /* GL_FOG */
+ { 2685, 0x00000B61 }, /* GL_FOG_INDEX */
+ { 2698, 0x00000B62 }, /* GL_FOG_DENSITY */
+ { 2713, 0x00000B63 }, /* GL_FOG_START */
+ { 2726, 0x00000B64 }, /* GL_FOG_END */
+ { 2737, 0x00000B65 }, /* GL_FOG_MODE */
+ { 2749, 0x00000B66 }, /* GL_FOG_COLOR */
+ { 2762, 0x00000B70 }, /* GL_DEPTH_RANGE */
+ { 2777, 0x00000B71 }, /* GL_DEPTH_TEST */
+ { 2791, 0x00000B72 }, /* GL_DEPTH_WRITEMASK */
+ { 2810, 0x00000B73 }, /* GL_DEPTH_CLEAR_VALUE */
+ { 2831, 0x00000B74 }, /* GL_DEPTH_FUNC */
+ { 2845, 0x00000B80 }, /* GL_ACCUM_CLEAR_VALUE */
+ { 2866, 0x00000B90 }, /* GL_STENCIL_TEST */
+ { 2882, 0x00000B91 }, /* GL_STENCIL_CLEAR_VALUE */
+ { 2905, 0x00000B92 }, /* GL_STENCIL_FUNC */
+ { 2921, 0x00000B93 }, /* GL_STENCIL_VALUE_MASK */
+ { 2943, 0x00000B94 }, /* GL_STENCIL_FAIL */
+ { 2959, 0x00000B95 }, /* GL_STENCIL_PASS_DEPTH_FAIL */
+ { 2986, 0x00000B96 }, /* GL_STENCIL_PASS_DEPTH_PASS */
+ { 3013, 0x00000B97 }, /* GL_STENCIL_REF */
+ { 3028, 0x00000B98 }, /* GL_STENCIL_WRITEMASK */
+ { 3049, 0x00000BA0 }, /* GL_MATRIX_MODE */
+ { 3064, 0x00000BA1 }, /* GL_NORMALIZE */
+ { 3077, 0x00000BA2 }, /* GL_VIEWPORT */
+ { 3089, 0x00000BA3 }, /* GL_MODELVIEW_STACK_DEPTH */
+ { 3114, 0x00000BA4 }, /* GL_PROJECTION_STACK_DEPTH */
+ { 3140, 0x00000BA5 }, /* GL_TEXTURE_STACK_DEPTH */
+ { 3163, 0x00000BA6 }, /* GL_MODELVIEW_MATRIX */
+ { 3183, 0x00000BA7 }, /* GL_PROJECTION_MATRIX */
+ { 3204, 0x00000BA8 }, /* GL_TEXTURE_MATRIX */
+ { 3222, 0x00000BB0 }, /* GL_ATTRIB_STACK_DEPTH */
+ { 3244, 0x00000BB1 }, /* GL_CLIENT_ATTRIB_STACK_DEPTH */
+ { 3273, 0x00000BC0 }, /* GL_ALPHA_TEST */
+ { 3287, 0x00000BC1 }, /* GL_ALPHA_TEST_FUNC */
+ { 3306, 0x00000BC2 }, /* GL_ALPHA_TEST_REF */
+ { 3324, 0x00000BD0 }, /* GL_DITHER */
+ { 3334, 0x00000BE0 }, /* GL_BLEND_DST */
+ { 3347, 0x00000BE1 }, /* GL_BLEND_SRC */
+ { 3360, 0x00000BE2 }, /* GL_BLEND */
+ { 3369, 0x00000BF0 }, /* GL_LOGIC_OP_MODE */
+ { 3386, 0x00000BF1 }, /* GL_INDEX_LOGIC_OP */
+ { 3404, 0x00000BF2 }, /* GL_COLOR_LOGIC_OP */
+ { 3422, 0x00000C00 }, /* GL_AUX_BUFFERS */
+ { 3437, 0x00000C01 }, /* GL_DRAW_BUFFER */
+ { 3452, 0x00000C02 }, /* GL_READ_BUFFER */
+ { 3467, 0x00000C10 }, /* GL_SCISSOR_BOX */
+ { 3482, 0x00000C11 }, /* GL_SCISSOR_TEST */
+ { 3498, 0x00000C20 }, /* GL_INDEX_CLEAR_VALUE */
+ { 3519, 0x00000C21 }, /* GL_INDEX_WRITEMASK */
+ { 3538, 0x00000C22 }, /* GL_COLOR_CLEAR_VALUE */
+ { 3559, 0x00000C23 }, /* GL_COLOR_WRITEMASK */
+ { 3578, 0x00000C30 }, /* GL_INDEX_MODE */
+ { 3592, 0x00000C31 }, /* GL_RGBA_MODE */
+ { 3605, 0x00000C32 }, /* GL_DOUBLEBUFFER */
+ { 3621, 0x00000C33 }, /* GL_STEREO */
+ { 3631, 0x00000C40 }, /* GL_RENDER_MODE */
+ { 3646, 0x00000C50 }, /* GL_PERSPECTIVE_CORRECTION_HINT */
+ { 3677, 0x00000C51 }, /* GL_POINT_SMOOTH_HINT */
+ { 3698, 0x00000C52 }, /* GL_LINE_SMOOTH_HINT */
+ { 3718, 0x00000C53 }, /* GL_POLYGON_SMOOTH_HINT */
+ { 3741, 0x00000C54 }, /* GL_FOG_HINT */
+ { 3753, 0x00000C60 }, /* GL_TEXTURE_GEN_S */
+ { 3770, 0x00000C61 }, /* GL_TEXTURE_GEN_T */
+ { 3787, 0x00000C62 }, /* GL_TEXTURE_GEN_R */
+ { 3804, 0x00000C63 }, /* GL_TEXTURE_GEN_Q */
+ { 3821, 0x00000C70 }, /* GL_PIXEL_MAP_I_TO_I */
+ { 3841, 0x00000C71 }, /* GL_PIXEL_MAP_S_TO_S */
+ { 3861, 0x00000C72 }, /* GL_PIXEL_MAP_I_TO_R */
+ { 3881, 0x00000C73 }, /* GL_PIXEL_MAP_I_TO_G */
+ { 3901, 0x00000C74 }, /* GL_PIXEL_MAP_I_TO_B */
+ { 3921, 0x00000C75 }, /* GL_PIXEL_MAP_I_TO_A */
+ { 3941, 0x00000C76 }, /* GL_PIXEL_MAP_R_TO_R */
+ { 3961, 0x00000C77 }, /* GL_PIXEL_MAP_G_TO_G */
+ { 3981, 0x00000C78 }, /* GL_PIXEL_MAP_B_TO_B */
+ { 4001, 0x00000C79 }, /* GL_PIXEL_MAP_A_TO_A */
+ { 4021, 0x00000CB0 }, /* GL_PIXEL_MAP_I_TO_I_SIZE */
+ { 4046, 0x00000CB1 }, /* GL_PIXEL_MAP_S_TO_S_SIZE */
+ { 4071, 0x00000CB2 }, /* GL_PIXEL_MAP_I_TO_R_SIZE */
+ { 4096, 0x00000CB3 }, /* GL_PIXEL_MAP_I_TO_G_SIZE */
+ { 4121, 0x00000CB4 }, /* GL_PIXEL_MAP_I_TO_B_SIZE */
+ { 4146, 0x00000CB5 }, /* GL_PIXEL_MAP_I_TO_A_SIZE */
+ { 4171, 0x00000CB6 }, /* GL_PIXEL_MAP_R_TO_R_SIZE */
+ { 4196, 0x00000CB7 }, /* GL_PIXEL_MAP_G_TO_G_SIZE */
+ { 4221, 0x00000CB8 }, /* GL_PIXEL_MAP_B_TO_B_SIZE */
+ { 4246, 0x00000CB9 }, /* GL_PIXEL_MAP_A_TO_A_SIZE */
+ { 4271, 0x00000CF0 }, /* GL_UNPACK_SWAP_BYTES */
+ { 4292, 0x00000CF1 }, /* GL_UNPACK_LSB_FIRST */
+ { 4312, 0x00000CF2 }, /* GL_UNPACK_ROW_LENGTH */
+ { 4333, 0x00000CF3 }, /* GL_UNPACK_SKIP_ROWS */
+ { 4353, 0x00000CF4 }, /* GL_UNPACK_SKIP_PIXELS */
+ { 4375, 0x00000CF5 }, /* GL_UNPACK_ALIGNMENT */
+ { 4395, 0x00000D00 }, /* GL_PACK_SWAP_BYTES */
+ { 4414, 0x00000D01 }, /* GL_PACK_LSB_FIRST */
+ { 4432, 0x00000D02 }, /* GL_PACK_ROW_LENGTH */
+ { 4451, 0x00000D03 }, /* GL_PACK_SKIP_ROWS */
+ { 4469, 0x00000D04 }, /* GL_PACK_SKIP_PIXELS */
+ { 4489, 0x00000D05 }, /* GL_PACK_ALIGNMENT */
+ { 4507, 0x00000D10 }, /* GL_MAP_COLOR */
+ { 4520, 0x00000D11 }, /* GL_MAP_STENCIL */
+ { 4535, 0x00000D12 }, /* GL_INDEX_SHIFT */
+ { 4550, 0x00000D13 }, /* GL_INDEX_OFFSET */
+ { 4566, 0x00000D14 }, /* GL_RED_SCALE */
+ { 4579, 0x00000D15 }, /* GL_RED_BIAS */
+ { 4591, 0x00000D16 }, /* GL_ZOOM_X */
+ { 4601, 0x00000D17 }, /* GL_ZOOM_Y */
+ { 4611, 0x00000D18 }, /* GL_GREEN_SCALE */
+ { 4626, 0x00000D19 }, /* GL_GREEN_BIAS */
+ { 4640, 0x00000D1A }, /* GL_BLUE_SCALE */
+ { 4654, 0x00000D1B }, /* GL_BLUE_BIAS */
+ { 4667, 0x00000D1C }, /* GL_ALPHA_SCALE */
+ { 4682, 0x00000D1D }, /* GL_ALPHA_BIAS */
+ { 4696, 0x00000D1E }, /* GL_DEPTH_SCALE */
+ { 4711, 0x00000D1F }, /* GL_DEPTH_BIAS */
+ { 4725, 0x00000D30 }, /* GL_MAX_EVAL_ORDER */
+ { 4743, 0x00000D31 }, /* GL_MAX_LIGHTS */
+ { 4757, 0x00000D32 }, /* GL_MAX_CLIP_DISTANCES */
+ { 4779, 0x00000D33 }, /* GL_MAX_TEXTURE_SIZE */
+ { 4799, 0x00000D34 }, /* GL_MAX_PIXEL_MAP_TABLE */
+ { 4822, 0x00000D35 }, /* GL_MAX_ATTRIB_STACK_DEPTH */
+ { 4848, 0x00000D36 }, /* GL_MAX_MODELVIEW_STACK_DEPTH */
+ { 4877, 0x00000D37 }, /* GL_MAX_NAME_STACK_DEPTH */
+ { 4901, 0x00000D38 }, /* GL_MAX_PROJECTION_STACK_DEPTH */
+ { 4931, 0x00000D39 }, /* GL_MAX_TEXTURE_STACK_DEPTH */
+ { 4958, 0x00000D3A }, /* GL_MAX_VIEWPORT_DIMS */
+ { 4979, 0x00000D3B }, /* GL_MAX_CLIENT_ATTRIB_STACK_DEPTH */
+ { 5012, 0x00000D50 }, /* GL_SUBPIXEL_BITS */
+ { 5029, 0x00000D51 }, /* GL_INDEX_BITS */
+ { 5043, 0x00000D52 }, /* GL_RED_BITS */
+ { 5055, 0x00000D53 }, /* GL_GREEN_BITS */
+ { 5069, 0x00000D54 }, /* GL_BLUE_BITS */
+ { 5082, 0x00000D55 }, /* GL_ALPHA_BITS */
+ { 5096, 0x00000D56 }, /* GL_DEPTH_BITS */
+ { 5110, 0x00000D57 }, /* GL_STENCIL_BITS */
+ { 5126, 0x00000D58 }, /* GL_ACCUM_RED_BITS */
+ { 5144, 0x00000D59 }, /* GL_ACCUM_GREEN_BITS */
+ { 5164, 0x00000D5A }, /* GL_ACCUM_BLUE_BITS */
+ { 5183, 0x00000D5B }, /* GL_ACCUM_ALPHA_BITS */
+ { 5203, 0x00000D70 }, /* GL_NAME_STACK_DEPTH */
+ { 5223, 0x00000D80 }, /* GL_AUTO_NORMAL */
+ { 5238, 0x00000D90 }, /* GL_MAP1_COLOR_4 */
+ { 5254, 0x00000D91 }, /* GL_MAP1_INDEX */
+ { 5268, 0x00000D92 }, /* GL_MAP1_NORMAL */
+ { 5283, 0x00000D93 }, /* GL_MAP1_TEXTURE_COORD_1 */
+ { 5307, 0x00000D94 }, /* GL_MAP1_TEXTURE_COORD_2 */
+ { 5331, 0x00000D95 }, /* GL_MAP1_TEXTURE_COORD_3 */
+ { 5355, 0x00000D96 }, /* GL_MAP1_TEXTURE_COORD_4 */
+ { 5379, 0x00000D97 }, /* GL_MAP1_VERTEX_3 */
+ { 5396, 0x00000D98 }, /* GL_MAP1_VERTEX_4 */
+ { 5413, 0x00000DB0 }, /* GL_MAP2_COLOR_4 */
+ { 5429, 0x00000DB1 }, /* GL_MAP2_INDEX */
+ { 5443, 0x00000DB2 }, /* GL_MAP2_NORMAL */
+ { 5458, 0x00000DB3 }, /* GL_MAP2_TEXTURE_COORD_1 */
+ { 5482, 0x00000DB4 }, /* GL_MAP2_TEXTURE_COORD_2 */
+ { 5506, 0x00000DB5 }, /* GL_MAP2_TEXTURE_COORD_3 */
+ { 5530, 0x00000DB6 }, /* GL_MAP2_TEXTURE_COORD_4 */
+ { 5554, 0x00000DB7 }, /* GL_MAP2_VERTEX_3 */
+ { 5571, 0x00000DB8 }, /* GL_MAP2_VERTEX_4 */
+ { 5588, 0x00000DD0 }, /* GL_MAP1_GRID_DOMAIN */
+ { 5608, 0x00000DD1 }, /* GL_MAP1_GRID_SEGMENTS */
+ { 5630, 0x00000DD2 }, /* GL_MAP2_GRID_DOMAIN */
+ { 5650, 0x00000DD3 }, /* GL_MAP2_GRID_SEGMENTS */
+ { 5672, 0x00000DE0 }, /* GL_TEXTURE_1D */
+ { 5686, 0x00000DE1 }, /* GL_TEXTURE_2D */
+ { 5700, 0x00000DF0 }, /* GL_FEEDBACK_BUFFER_POINTER */
+ { 5727, 0x00000DF1 }, /* GL_FEEDBACK_BUFFER_SIZE */
+ { 5751, 0x00000DF2 }, /* GL_FEEDBACK_BUFFER_TYPE */
+ { 5775, 0x00000DF3 }, /* GL_SELECTION_BUFFER_POINTER */
+ { 5803, 0x00000DF4 }, /* GL_SELECTION_BUFFER_SIZE */
+ { 5828, 0x00001000 }, /* GL_TEXTURE_WIDTH */
+ { 5845, 0x00001001 }, /* GL_TEXTURE_HEIGHT */
+ { 5863, 0x00001003 }, /* GL_TEXTURE_INTERNAL_FORMAT */
+ { 5890, 0x00001004 }, /* GL_TEXTURE_BORDER_COLOR */
+ { 5914, 0x00001005 }, /* GL_TEXTURE_BORDER */
+ { 5932, 0x00001006 }, /* GL_TEXTURE_TARGET */
+ { 5950, 0x00001100 }, /* GL_DONT_CARE */
+ { 5963, 0x00001101 }, /* GL_FASTEST */
+ { 5974, 0x00001102 }, /* GL_NICEST */
+ { 5984, 0x00001200 }, /* GL_AMBIENT */
+ { 5995, 0x00001201 }, /* GL_DIFFUSE */
+ { 6006, 0x00001202 }, /* GL_SPECULAR */
+ { 6018, 0x00001203 }, /* GL_POSITION */
+ { 6030, 0x00001204 }, /* GL_SPOT_DIRECTION */
+ { 6048, 0x00001205 }, /* GL_SPOT_EXPONENT */
+ { 6065, 0x00001206 }, /* GL_SPOT_CUTOFF */
+ { 6080, 0x00001207 }, /* GL_CONSTANT_ATTENUATION */
+ { 6104, 0x00001208 }, /* GL_LINEAR_ATTENUATION */
+ { 6126, 0x00001209 }, /* GL_QUADRATIC_ATTENUATION */
+ { 6151, 0x00001300 }, /* GL_COMPILE */
+ { 6162, 0x00001301 }, /* GL_COMPILE_AND_EXECUTE */
+ { 6185, 0x00001400 }, /* GL_BYTE */
+ { 6193, 0x00001401 }, /* GL_UNSIGNED_BYTE */
+ { 6210, 0x00001402 }, /* GL_SHORT */
+ { 6219, 0x00001403 }, /* GL_UNSIGNED_SHORT */
+ { 6237, 0x00001404 }, /* GL_INT */
+ { 6244, 0x00001405 }, /* GL_UNSIGNED_INT */
+ { 6260, 0x00001406 }, /* GL_FLOAT */
+ { 6269, 0x00001407 }, /* GL_2_BYTES */
+ { 6280, 0x00001408 }, /* GL_3_BYTES */
+ { 6291, 0x00001409 }, /* GL_4_BYTES */
+ { 6302, 0x0000140A }, /* GL_DOUBLE */
+ { 6312, 0x0000140B }, /* GL_HALF_FLOAT */
+ { 6326, 0x0000140C }, /* GL_FIXED */
+ { 6335, 0x0000140E }, /* GL_INT64_ARB */
+ { 6348, 0x0000140F }, /* GL_UNSIGNED_INT64_ARB */
+ { 6370, 0x00001500 }, /* GL_CLEAR */
+ { 6379, 0x00001501 }, /* GL_AND */
+ { 6386, 0x00001502 }, /* GL_AND_REVERSE */
+ { 6401, 0x00001503 }, /* GL_COPY */
+ { 6409, 0x00001504 }, /* GL_AND_INVERTED */
+ { 6425, 0x00001505 }, /* GL_NOOP */
+ { 6433, 0x00001506 }, /* GL_XOR */
+ { 6440, 0x00001507 }, /* GL_OR */
+ { 6446, 0x00001508 }, /* GL_NOR */
+ { 6453, 0x00001509 }, /* GL_EQUIV */
+ { 6462, 0x0000150A }, /* GL_INVERT */
+ { 6472, 0x0000150B }, /* GL_OR_REVERSE */
+ { 6486, 0x0000150C }, /* GL_COPY_INVERTED */
+ { 6503, 0x0000150D }, /* GL_OR_INVERTED */
+ { 6518, 0x0000150E }, /* GL_NAND */
+ { 6526, 0x0000150F }, /* GL_SET */
+ { 6533, 0x00001600 }, /* GL_EMISSION */
+ { 6545, 0x00001601 }, /* GL_SHININESS */
+ { 6558, 0x00001602 }, /* GL_AMBIENT_AND_DIFFUSE */
+ { 6581, 0x00001603 }, /* GL_COLOR_INDEXES */
+ { 6598, 0x00001700 }, /* GL_MODELVIEW */
+ { 6611, 0x00001701 }, /* GL_PROJECTION */
+ { 6625, 0x00001702 }, /* GL_TEXTURE */
+ { 6636, 0x00001800 }, /* GL_COLOR */
+ { 6645, 0x00001801 }, /* GL_DEPTH */
+ { 6654, 0x00001802 }, /* GL_STENCIL */
+ { 6665, 0x00001900 }, /* GL_COLOR_INDEX */
+ { 6680, 0x00001901 }, /* GL_STENCIL_INDEX */
+ { 6697, 0x00001902 }, /* GL_DEPTH_COMPONENT */
+ { 6716, 0x00001903 }, /* GL_RED */
+ { 6723, 0x00001904 }, /* GL_GREEN */
+ { 6732, 0x00001905 }, /* GL_BLUE */
+ { 6740, 0x00001906 }, /* GL_ALPHA */
+ { 6749, 0x00001907 }, /* GL_RGB */
+ { 6756, 0x00001908 }, /* GL_RGBA */
+ { 6764, 0x00001909 }, /* GL_LUMINANCE */
+ { 6777, 0x0000190A }, /* GL_LUMINANCE_ALPHA */
+ { 6796, 0x00001A00 }, /* GL_BITMAP */
+ { 6806, 0x00001B00 }, /* GL_POINT */
+ { 6815, 0x00001B01 }, /* GL_LINE */
+ { 6823, 0x00001B02 }, /* GL_FILL */
+ { 6831, 0x00001C00 }, /* GL_RENDER */
+ { 6841, 0x00001C01 }, /* GL_FEEDBACK */
+ { 6853, 0x00001C02 }, /* GL_SELECT */
+ { 6863, 0x00001D00 }, /* GL_FLAT */
+ { 6871, 0x00001D01 }, /* GL_SMOOTH */
+ { 6881, 0x00001E00 }, /* GL_KEEP */
+ { 6889, 0x00001E01 }, /* GL_REPLACE */
+ { 6900, 0x00001E02 }, /* GL_INCR */
+ { 6908, 0x00001E03 }, /* GL_DECR */
+ { 6916, 0x00001F00 }, /* GL_VENDOR */
+ { 6926, 0x00001F01 }, /* GL_RENDERER */
+ { 6938, 0x00001F02 }, /* GL_VERSION */
+ { 6949, 0x00001F03 }, /* GL_EXTENSIONS */
+ { 6963, 0x00002000 }, /* GL_S */
+ { 6968, 0x00002001 }, /* GL_T */
+ { 6973, 0x00002002 }, /* GL_R */
+ { 6978, 0x00002003 }, /* GL_Q */
+ { 6983, 0x00002100 }, /* GL_MODULATE */
+ { 6995, 0x00002101 }, /* GL_DECAL */
+ { 7004, 0x00002200 }, /* GL_TEXTURE_ENV_MODE */
+ { 7024, 0x00002201 }, /* GL_TEXTURE_ENV_COLOR */
+ { 7045, 0x00002300 }, /* GL_TEXTURE_ENV */
+ { 7060, 0x00002400 }, /* GL_EYE_LINEAR */
+ { 7074, 0x00002401 }, /* GL_OBJECT_LINEAR */
+ { 7091, 0x00002402 }, /* GL_SPHERE_MAP */
+ { 7105, 0x00002500 }, /* GL_TEXTURE_GEN_MODE */
+ { 7125, 0x00002501 }, /* GL_OBJECT_PLANE */
+ { 7141, 0x00002502 }, /* GL_EYE_PLANE */
+ { 7154, 0x00002600 }, /* GL_NEAREST */
+ { 7165, 0x00002601 }, /* GL_LINEAR */
+ { 7175, 0x00002700 }, /* GL_NEAREST_MIPMAP_NEAREST */
+ { 7201, 0x00002701 }, /* GL_LINEAR_MIPMAP_NEAREST */
+ { 7226, 0x00002702 }, /* GL_NEAREST_MIPMAP_LINEAR */
+ { 7251, 0x00002703 }, /* GL_LINEAR_MIPMAP_LINEAR */
+ { 7275, 0x00002800 }, /* GL_TEXTURE_MAG_FILTER */
+ { 7297, 0x00002801 }, /* GL_TEXTURE_MIN_FILTER */
+ { 7319, 0x00002802 }, /* GL_TEXTURE_WRAP_S */
+ { 7337, 0x00002803 }, /* GL_TEXTURE_WRAP_T */
+ { 7355, 0x00002900 }, /* GL_CLAMP */
+ { 7364, 0x00002901 }, /* GL_REPEAT */
+ { 7374, 0x00002A00 }, /* GL_POLYGON_OFFSET_UNITS */
+ { 7398, 0x00002A01 }, /* GL_POLYGON_OFFSET_POINT */
+ { 7422, 0x00002A02 }, /* GL_POLYGON_OFFSET_LINE */
+ { 7445, 0x00002A10 }, /* GL_R3_G3_B2 */
+ { 7457, 0x00002A20 }, /* GL_V2F */
+ { 7464, 0x00002A21 }, /* GL_V3F */
+ { 7471, 0x00002A22 }, /* GL_C4UB_V2F */
+ { 7483, 0x00002A23 }, /* GL_C4UB_V3F */
+ { 7495, 0x00002A24 }, /* GL_C3F_V3F */
+ { 7506, 0x00002A25 }, /* GL_N3F_V3F */
+ { 7517, 0x00002A26 }, /* GL_C4F_N3F_V3F */
+ { 7532, 0x00002A27 }, /* GL_T2F_V3F */
+ { 7543, 0x00002A28 }, /* GL_T4F_V4F */
+ { 7554, 0x00002A29 }, /* GL_T2F_C4UB_V3F */
+ { 7570, 0x00002A2A }, /* GL_T2F_C3F_V3F */
+ { 7585, 0x00002A2B }, /* GL_T2F_N3F_V3F */
+ { 7600, 0x00002A2C }, /* GL_T2F_C4F_N3F_V3F */
+ { 7619, 0x00002A2D }, /* GL_T4F_C4F_N3F_V4F */
+ { 7638, 0x00003000 }, /* GL_CLIP_DISTANCE0 */
+ { 7656, 0x00003001 }, /* GL_CLIP_DISTANCE1 */
+ { 7674, 0x00003002 }, /* GL_CLIP_DISTANCE2 */
+ { 7692, 0x00003003 }, /* GL_CLIP_DISTANCE3 */
+ { 7710, 0x00003004 }, /* GL_CLIP_DISTANCE4 */
+ { 7728, 0x00003005 }, /* GL_CLIP_DISTANCE5 */
+ { 7746, 0x00003006 }, /* GL_CLIP_DISTANCE6 */
+ { 7764, 0x00003007 }, /* GL_CLIP_DISTANCE7 */
+ { 7782, 0x00004000 }, /* GL_LIGHT0 */
+ { 7792, 0x00004001 }, /* GL_LIGHT1 */
+ { 7802, 0x00004002 }, /* GL_LIGHT2 */
+ { 7812, 0x00004003 }, /* GL_LIGHT3 */
+ { 7822, 0x00004004 }, /* GL_LIGHT4 */
+ { 7832, 0x00004005 }, /* GL_LIGHT5 */
+ { 7842, 0x00004006 }, /* GL_LIGHT6 */
+ { 7852, 0x00004007 }, /* GL_LIGHT7 */
+ { 7862, 0x00008000 }, /* GL_ABGR_EXT */
+ { 7874, 0x00008001 }, /* GL_CONSTANT_COLOR */
+ { 7892, 0x00008002 }, /* GL_ONE_MINUS_CONSTANT_COLOR */
+ { 7920, 0x00008003 }, /* GL_CONSTANT_ALPHA */
+ { 7938, 0x00008004 }, /* GL_ONE_MINUS_CONSTANT_ALPHA */
+ { 7966, 0x00008005 }, /* GL_BLEND_COLOR */
+ { 7981, 0x00008006 }, /* GL_FUNC_ADD */
+ { 7993, 0x00008007 }, /* GL_MIN */
+ { 8000, 0x00008008 }, /* GL_MAX */
+ { 8007, 0x00008009 }, /* GL_BLEND_EQUATION_RGB */
+ { 8029, 0x0000800A }, /* GL_FUNC_SUBTRACT */
+ { 8046, 0x0000800B }, /* GL_FUNC_REVERSE_SUBTRACT */
+ { 8071, 0x0000800C }, /* GL_CMYK_EXT */
+ { 8083, 0x0000800D }, /* GL_CMYKA_EXT */
+ { 8096, 0x0000800E }, /* GL_PACK_CMYK_HINT_EXT */
+ { 8118, 0x0000800F }, /* GL_UNPACK_CMYK_HINT_EXT */
+ { 8142, 0x00008010 }, /* GL_CONVOLUTION_1D */
+ { 8160, 0x00008011 }, /* GL_CONVOLUTION_2D */
+ { 8178, 0x00008012 }, /* GL_SEPARABLE_2D */
+ { 8194, 0x00008013 }, /* GL_CONVOLUTION_BORDER_MODE */
+ { 8221, 0x00008014 }, /* GL_CONVOLUTION_FILTER_SCALE */
+ { 8249, 0x00008015 }, /* GL_CONVOLUTION_FILTER_BIAS */
+ { 8276, 0x00008016 }, /* GL_REDUCE */
+ { 8286, 0x00008017 }, /* GL_CONVOLUTION_FORMAT */
+ { 8308, 0x00008018 }, /* GL_CONVOLUTION_WIDTH */
+ { 8329, 0x00008019 }, /* GL_CONVOLUTION_HEIGHT */
+ { 8351, 0x0000801A }, /* GL_MAX_CONVOLUTION_WIDTH */
+ { 8376, 0x0000801B }, /* GL_MAX_CONVOLUTION_HEIGHT */
+ { 8402, 0x0000801C }, /* GL_POST_CONVOLUTION_RED_SCALE */
+ { 8432, 0x0000801D }, /* GL_POST_CONVOLUTION_GREEN_SCALE */
+ { 8464, 0x0000801E }, /* GL_POST_CONVOLUTION_BLUE_SCALE */
+ { 8495, 0x0000801F }, /* GL_POST_CONVOLUTION_ALPHA_SCALE */
+ { 8527, 0x00008020 }, /* GL_POST_CONVOLUTION_RED_BIAS */
+ { 8556, 0x00008021 }, /* GL_POST_CONVOLUTION_GREEN_BIAS */
+ { 8587, 0x00008022 }, /* GL_POST_CONVOLUTION_BLUE_BIAS */
+ { 8617, 0x00008023 }, /* GL_POST_CONVOLUTION_ALPHA_BIAS */
+ { 8648, 0x00008024 }, /* GL_HISTOGRAM */
+ { 8661, 0x00008025 }, /* GL_PROXY_HISTOGRAM */
+ { 8680, 0x00008026 }, /* GL_HISTOGRAM_WIDTH */
+ { 8699, 0x00008027 }, /* GL_HISTOGRAM_FORMAT */
+ { 8719, 0x00008028 }, /* GL_HISTOGRAM_RED_SIZE */
+ { 8741, 0x00008029 }, /* GL_HISTOGRAM_GREEN_SIZE */
+ { 8765, 0x0000802A }, /* GL_HISTOGRAM_BLUE_SIZE */
+ { 8788, 0x0000802B }, /* GL_HISTOGRAM_ALPHA_SIZE */
+ { 8812, 0x0000802C }, /* GL_HISTOGRAM_LUMINANCE_SIZE */
+ { 8840, 0x0000802D }, /* GL_HISTOGRAM_SINK */
+ { 8858, 0x0000802E }, /* GL_MINMAX */
+ { 8868, 0x0000802F }, /* GL_MINMAX_FORMAT */
+ { 8885, 0x00008030 }, /* GL_MINMAX_SINK */
+ { 8900, 0x00008031 }, /* GL_TABLE_TOO_LARGE */
+ { 8919, 0x00008032 }, /* GL_UNSIGNED_BYTE_3_3_2 */
+ { 8942, 0x00008033 }, /* GL_UNSIGNED_SHORT_4_4_4_4 */
+ { 8968, 0x00008034 }, /* GL_UNSIGNED_SHORT_5_5_5_1 */
+ { 8994, 0x00008035 }, /* GL_UNSIGNED_INT_8_8_8_8 */
+ { 9018, 0x00008036 }, /* GL_UNSIGNED_INT_10_10_10_2 */
+ { 9045, 0x00008037 }, /* GL_POLYGON_OFFSET_FILL */
+ { 9068, 0x00008038 }, /* GL_POLYGON_OFFSET_FACTOR */
+ { 9093, 0x00008039 }, /* GL_POLYGON_OFFSET_BIAS_EXT */
+ { 9120, 0x0000803A }, /* GL_RESCALE_NORMAL */
+ { 9138, 0x0000803B }, /* GL_ALPHA4 */
+ { 9148, 0x0000803C }, /* GL_ALPHA8 */
+ { 9158, 0x0000803D }, /* GL_ALPHA12 */
+ { 9169, 0x0000803E }, /* GL_ALPHA16 */
+ { 9180, 0x0000803F }, /* GL_LUMINANCE4 */
+ { 9194, 0x00008040 }, /* GL_LUMINANCE8 */
+ { 9208, 0x00008041 }, /* GL_LUMINANCE12 */
+ { 9223, 0x00008042 }, /* GL_LUMINANCE16 */
+ { 9238, 0x00008043 }, /* GL_LUMINANCE4_ALPHA4 */
+ { 9259, 0x00008044 }, /* GL_LUMINANCE6_ALPHA2 */
+ { 9280, 0x00008045 }, /* GL_LUMINANCE8_ALPHA8 */
+ { 9301, 0x00008046 }, /* GL_LUMINANCE12_ALPHA4 */
+ { 9323, 0x00008047 }, /* GL_LUMINANCE12_ALPHA12 */
+ { 9346, 0x00008048 }, /* GL_LUMINANCE16_ALPHA16 */
+ { 9369, 0x00008049 }, /* GL_INTENSITY */
+ { 9382, 0x0000804A }, /* GL_INTENSITY4 */
+ { 9396, 0x0000804B }, /* GL_INTENSITY8 */
+ { 9410, 0x0000804C }, /* GL_INTENSITY12 */
+ { 9425, 0x0000804D }, /* GL_INTENSITY16 */
+ { 9440, 0x0000804E }, /* GL_RGB2_EXT */
+ { 9452, 0x0000804F }, /* GL_RGB4 */
+ { 9460, 0x00008050 }, /* GL_RGB5 */
+ { 9468, 0x00008051 }, /* GL_RGB8 */
+ { 9476, 0x00008052 }, /* GL_RGB10 */
+ { 9485, 0x00008053 }, /* GL_RGB12 */
+ { 9494, 0x00008054 }, /* GL_RGB16 */
+ { 9503, 0x00008055 }, /* GL_RGBA2 */
+ { 9512, 0x00008056 }, /* GL_RGBA4 */
+ { 9521, 0x00008057 }, /* GL_RGB5_A1 */
+ { 9532, 0x00008058 }, /* GL_RGBA8 */
+ { 9541, 0x00008059 }, /* GL_RGB10_A2 */
+ { 9553, 0x0000805A }, /* GL_RGBA12 */
+ { 9563, 0x0000805B }, /* GL_RGBA16 */
+ { 9573, 0x0000805C }, /* GL_TEXTURE_RED_SIZE */
+ { 9593, 0x0000805D }, /* GL_TEXTURE_GREEN_SIZE */
+ { 9615, 0x0000805E }, /* GL_TEXTURE_BLUE_SIZE */
+ { 9636, 0x0000805F }, /* GL_TEXTURE_ALPHA_SIZE */
+ { 9658, 0x00008060 }, /* GL_TEXTURE_LUMINANCE_SIZE */
+ { 9684, 0x00008061 }, /* GL_TEXTURE_INTENSITY_SIZE */
+ { 9710, 0x00008062 }, /* GL_REPLACE_EXT */
+ { 9725, 0x00008063 }, /* GL_PROXY_TEXTURE_1D */
+ { 9745, 0x00008064 }, /* GL_PROXY_TEXTURE_2D */
+ { 9765, 0x00008065 }, /* GL_TEXTURE_TOO_LARGE_EXT */
+ { 9790, 0x00008066 }, /* GL_TEXTURE_PRIORITY */
+ { 9810, 0x00008067 }, /* GL_TEXTURE_RESIDENT */
+ { 9830, 0x00008068 }, /* GL_TEXTURE_BINDING_1D */
+ { 9852, 0x00008069 }, /* GL_TEXTURE_BINDING_2D */
+ { 9874, 0x0000806A }, /* GL_TEXTURE_BINDING_3D */
+ { 9896, 0x0000806B }, /* GL_PACK_SKIP_IMAGES */
+ { 9916, 0x0000806C }, /* GL_PACK_IMAGE_HEIGHT */
+ { 9937, 0x0000806D }, /* GL_UNPACK_SKIP_IMAGES */
+ { 9959, 0x0000806E }, /* GL_UNPACK_IMAGE_HEIGHT */
+ { 9982, 0x0000806F }, /* GL_TEXTURE_3D */
+ { 9996, 0x00008070 }, /* GL_PROXY_TEXTURE_3D */
+ { 10016, 0x00008071 }, /* GL_TEXTURE_DEPTH */
+ { 10033, 0x00008072 }, /* GL_TEXTURE_WRAP_R */
+ { 10051, 0x00008073 }, /* GL_MAX_3D_TEXTURE_SIZE */
+ { 10074, 0x00008074 }, /* GL_VERTEX_ARRAY */
+ { 10090, 0x00008075 }, /* GL_NORMAL_ARRAY */
+ { 10106, 0x00008076 }, /* GL_COLOR_ARRAY */
+ { 10121, 0x00008077 }, /* GL_INDEX_ARRAY */
+ { 10136, 0x00008078 }, /* GL_TEXTURE_COORD_ARRAY */
+ { 10159, 0x00008079 }, /* GL_EDGE_FLAG_ARRAY */
+ { 10178, 0x0000807A }, /* GL_VERTEX_ARRAY_SIZE */
+ { 10199, 0x0000807B }, /* GL_VERTEX_ARRAY_TYPE */
+ { 10220, 0x0000807C }, /* GL_VERTEX_ARRAY_STRIDE */
+ { 10243, 0x0000807D }, /* GL_VERTEX_ARRAY_COUNT_EXT */
+ { 10269, 0x0000807E }, /* GL_NORMAL_ARRAY_TYPE */
+ { 10290, 0x0000807F }, /* GL_NORMAL_ARRAY_STRIDE */
+ { 10313, 0x00008080 }, /* GL_NORMAL_ARRAY_COUNT_EXT */
+ { 10339, 0x00008081 }, /* GL_COLOR_ARRAY_SIZE */
+ { 10359, 0x00008082 }, /* GL_COLOR_ARRAY_TYPE */
+ { 10379, 0x00008083 }, /* GL_COLOR_ARRAY_STRIDE */
+ { 10401, 0x00008084 }, /* GL_COLOR_ARRAY_COUNT_EXT */
+ { 10426, 0x00008085 }, /* GL_INDEX_ARRAY_TYPE */
+ { 10446, 0x00008086 }, /* GL_INDEX_ARRAY_STRIDE */
+ { 10468, 0x00008087 }, /* GL_INDEX_ARRAY_COUNT_EXT */
+ { 10493, 0x00008088 }, /* GL_TEXTURE_COORD_ARRAY_SIZE */
+ { 10521, 0x00008089 }, /* GL_TEXTURE_COORD_ARRAY_TYPE */
+ { 10549, 0x0000808A }, /* GL_TEXTURE_COORD_ARRAY_STRIDE */
+ { 10579, 0x0000808B }, /* GL_TEXTURE_COORD_ARRAY_COUNT_EXT */
+ { 10612, 0x0000808C }, /* GL_EDGE_FLAG_ARRAY_STRIDE */
+ { 10638, 0x0000808D }, /* GL_EDGE_FLAG_ARRAY_COUNT_EXT */
+ { 10667, 0x0000808E }, /* GL_VERTEX_ARRAY_POINTER */
+ { 10691, 0x0000808F }, /* GL_NORMAL_ARRAY_POINTER */
+ { 10715, 0x00008090 }, /* GL_COLOR_ARRAY_POINTER */
+ { 10738, 0x00008091 }, /* GL_INDEX_ARRAY_POINTER */
+ { 10761, 0x00008092 }, /* GL_TEXTURE_COORD_ARRAY_POINTER */
+ { 10792, 0x00008093 }, /* GL_EDGE_FLAG_ARRAY_POINTER */
+ { 10819, 0x00008094 }, /* GL_INTERLACE_SGIX */
+ { 10837, 0x00008095 }, /* GL_DETAIL_TEXTURE_2D_SGIS */
+ { 10863, 0x00008096 }, /* GL_DETAIL_TEXTURE_2D_BINDING_SGIS */
+ { 10897, 0x00008097 }, /* GL_LINEAR_DETAIL_SGIS */
+ { 10919, 0x00008098 }, /* GL_LINEAR_DETAIL_ALPHA_SGIS */
+ { 10947, 0x00008099 }, /* GL_LINEAR_DETAIL_COLOR_SGIS */
+ { 10975, 0x0000809A }, /* GL_DETAIL_TEXTURE_LEVEL_SGIS */
+ { 11004, 0x0000809B }, /* GL_DETAIL_TEXTURE_MODE_SGIS */
+ { 11032, 0x0000809C }, /* GL_DETAIL_TEXTURE_FUNC_POINTS_SGIS */
+ { 11067, 0x0000809D }, /* GL_MULTISAMPLE */
+ { 11082, 0x0000809E }, /* GL_SAMPLE_ALPHA_TO_COVERAGE */
+ { 11110, 0x0000809F }, /* GL_SAMPLE_ALPHA_TO_ONE */
+ { 11133, 0x000080A0 }, /* GL_SAMPLE_COVERAGE */
+ { 11152, 0x000080A1 }, /* GL_1PASS_EXT */
+ { 11165, 0x000080A2 }, /* GL_2PASS_0_EXT */
+ { 11180, 0x000080A3 }, /* GL_2PASS_1_EXT */
+ { 11195, 0x000080A4 }, /* GL_4PASS_0_EXT */
+ { 11210, 0x000080A5 }, /* GL_4PASS_1_EXT */
+ { 11225, 0x000080A6 }, /* GL_4PASS_2_EXT */
+ { 11240, 0x000080A7 }, /* GL_4PASS_3_EXT */
+ { 11255, 0x000080A8 }, /* GL_SAMPLE_BUFFERS */
+ { 11273, 0x000080A9 }, /* GL_SAMPLES */
+ { 11284, 0x000080AA }, /* GL_SAMPLE_COVERAGE_VALUE */
+ { 11309, 0x000080AB }, /* GL_SAMPLE_COVERAGE_INVERT */
+ { 11335, 0x000080AC }, /* GL_SAMPLE_PATTERN_EXT */
+ { 11357, 0x000080AD }, /* GL_LINEAR_SHARPEN_SGIS */
+ { 11380, 0x000080AE }, /* GL_LINEAR_SHARPEN_ALPHA_SGIS */
+ { 11409, 0x000080AF }, /* GL_LINEAR_SHARPEN_COLOR_SGIS */
+ { 11438, 0x000080B0 }, /* GL_SHARPEN_TEXTURE_FUNC_POINTS_SGIS */
+ { 11474, 0x000080B1 }, /* GL_COLOR_MATRIX */
+ { 11490, 0x000080B2 }, /* GL_COLOR_MATRIX_STACK_DEPTH */
+ { 11518, 0x000080B3 }, /* GL_MAX_COLOR_MATRIX_STACK_DEPTH */
+ { 11550, 0x000080B4 }, /* GL_POST_COLOR_MATRIX_RED_SCALE */
+ { 11581, 0x000080B5 }, /* GL_POST_COLOR_MATRIX_GREEN_SCALE */
+ { 11614, 0x000080B6 }, /* GL_POST_COLOR_MATRIX_BLUE_SCALE */
+ { 11646, 0x000080B7 }, /* GL_POST_COLOR_MATRIX_ALPHA_SCALE */
+ { 11679, 0x000080B8 }, /* GL_POST_COLOR_MATRIX_RED_BIAS */
+ { 11709, 0x000080B9 }, /* GL_POST_COLOR_MATRIX_GREEN_BIAS */
+ { 11741, 0x000080BA }, /* GL_POST_COLOR_MATRIX_BLUE_BIAS */
+ { 11772, 0x000080BB }, /* GL_POST_COLOR_MATRIX_ALPHA_BIAS */
+ { 11804, 0x000080BC }, /* GL_TEXTURE_COLOR_TABLE_SGI */
+ { 11831, 0x000080BD }, /* GL_PROXY_TEXTURE_COLOR_TABLE_SGI */
+ { 11864, 0x000080BE }, /* GL_TEXTURE_ENV_BIAS_SGIX */
+ { 11889, 0x000080BF }, /* GL_TEXTURE_COMPARE_FAIL_VALUE_ARB */
+ { 11923, 0x000080C8 }, /* GL_BLEND_DST_RGB */
+ { 11940, 0x000080C9 }, /* GL_BLEND_SRC_RGB */
+ { 11957, 0x000080CA }, /* GL_BLEND_DST_ALPHA */
+ { 11976, 0x000080CB }, /* GL_BLEND_SRC_ALPHA */
+ { 11995, 0x000080CC }, /* GL_422_EXT */
+ { 12006, 0x000080CD }, /* GL_422_REV_EXT */
+ { 12021, 0x000080CE }, /* GL_422_AVERAGE_EXT */
+ { 12040, 0x000080CF }, /* GL_422_REV_AVERAGE_EXT */
+ { 12063, 0x000080D0 }, /* GL_COLOR_TABLE */
+ { 12078, 0x000080D1 }, /* GL_POST_CONVOLUTION_COLOR_TABLE */
+ { 12110, 0x000080D2 }, /* GL_POST_COLOR_MATRIX_COLOR_TABLE */
+ { 12143, 0x000080D3 }, /* GL_PROXY_COLOR_TABLE */
+ { 12164, 0x000080D4 }, /* GL_PROXY_POST_CONVOLUTION_COLOR_TABLE */
+ { 12202, 0x000080D5 }, /* GL_PROXY_POST_COLOR_MATRIX_COLOR_TABLE */
+ { 12241, 0x000080D6 }, /* GL_COLOR_TABLE_SCALE */
+ { 12262, 0x000080D7 }, /* GL_COLOR_TABLE_BIAS */
+ { 12282, 0x000080D8 }, /* GL_COLOR_TABLE_FORMAT */
+ { 12304, 0x000080D9 }, /* GL_COLOR_TABLE_WIDTH */
+ { 12325, 0x000080DA }, /* GL_COLOR_TABLE_RED_SIZE */
+ { 12349, 0x000080DB }, /* GL_COLOR_TABLE_GREEN_SIZE */
+ { 12375, 0x000080DC }, /* GL_COLOR_TABLE_BLUE_SIZE */
+ { 12400, 0x000080DD }, /* GL_COLOR_TABLE_ALPHA_SIZE */
+ { 12426, 0x000080DE }, /* GL_COLOR_TABLE_LUMINANCE_SIZE */
+ { 12456, 0x000080DF }, /* GL_COLOR_TABLE_INTENSITY_SIZE */
+ { 12486, 0x000080E0 }, /* GL_BGR */
+ { 12493, 0x000080E1 }, /* GL_BGRA */
+ { 12501, 0x000080E2 }, /* GL_COLOR_INDEX1_EXT */
+ { 12521, 0x000080E3 }, /* GL_COLOR_INDEX2_EXT */
+ { 12541, 0x000080E4 }, /* GL_COLOR_INDEX4_EXT */
+ { 12561, 0x000080E5 }, /* GL_COLOR_INDEX8_EXT */
+ { 12581, 0x000080E6 }, /* GL_COLOR_INDEX12_EXT */
+ { 12602, 0x000080E7 }, /* GL_COLOR_INDEX16_EXT */
+ { 12623, 0x000080E8 }, /* GL_MAX_ELEMENTS_VERTICES */
+ { 12648, 0x000080E9 }, /* GL_MAX_ELEMENTS_INDICES */
+ { 12672, 0x000080EA }, /* GL_PHONG_WIN */
+ { 12685, 0x000080EB }, /* GL_PHONG_HINT_WIN */
+ { 12703, 0x000080EC }, /* GL_FOG_SPECULAR_TEXTURE_WIN */
+ { 12731, 0x000080ED }, /* GL_TEXTURE_INDEX_SIZE_EXT */
+ { 12757, 0x000080EE }, /* GL_PARAMETER_BUFFER */
+ { 12777, 0x000080EF }, /* GL_PARAMETER_BUFFER_BINDING */
+ { 12805, 0x000080F0 }, /* GL_CLIP_VOLUME_CLIPPING_HINT_EXT */
+ { 12838, 0x00008110 }, /* GL_DUAL_ALPHA4_SGIS */
+ { 12858, 0x00008111 }, /* GL_DUAL_ALPHA8_SGIS */
+ { 12878, 0x00008112 }, /* GL_DUAL_ALPHA12_SGIS */
+ { 12899, 0x00008113 }, /* GL_DUAL_ALPHA16_SGIS */
+ { 12920, 0x00008114 }, /* GL_DUAL_LUMINANCE4_SGIS */
+ { 12944, 0x00008115 }, /* GL_DUAL_LUMINANCE8_SGIS */
+ { 12968, 0x00008116 }, /* GL_DUAL_LUMINANCE12_SGIS */
+ { 12993, 0x00008117 }, /* GL_DUAL_LUMINANCE16_SGIS */
+ { 13018, 0x00008118 }, /* GL_DUAL_INTENSITY4_SGIS */
+ { 13042, 0x00008119 }, /* GL_DUAL_INTENSITY8_SGIS */
+ { 13066, 0x0000811A }, /* GL_DUAL_INTENSITY12_SGIS */
+ { 13091, 0x0000811B }, /* GL_DUAL_INTENSITY16_SGIS */
+ { 13116, 0x0000811C }, /* GL_DUAL_LUMINANCE_ALPHA4_SGIS */
+ { 13146, 0x0000811D }, /* GL_DUAL_LUMINANCE_ALPHA8_SGIS */
+ { 13176, 0x0000811E }, /* GL_QUAD_ALPHA4_SGIS */
+ { 13196, 0x0000811F }, /* GL_QUAD_ALPHA8_SGIS */
+ { 13216, 0x00008120 }, /* GL_QUAD_LUMINANCE4_SGIS */
+ { 13240, 0x00008121 }, /* GL_QUAD_LUMINANCE8_SGIS */
+ { 13264, 0x00008122 }, /* GL_QUAD_INTENSITY4_SGIS */
+ { 13288, 0x00008123 }, /* GL_QUAD_INTENSITY8_SGIS */
+ { 13312, 0x00008124 }, /* GL_DUAL_TEXTURE_SELECT_SGIS */
+ { 13340, 0x00008125 }, /* GL_QUAD_TEXTURE_SELECT_SGIS */
+ { 13368, 0x00008126 }, /* GL_POINT_SIZE_MIN */
+ { 13386, 0x00008127 }, /* GL_POINT_SIZE_MAX */
+ { 13404, 0x00008128 }, /* GL_POINT_FADE_THRESHOLD_SIZE */
+ { 13433, 0x00008129 }, /* GL_POINT_DISTANCE_ATTENUATION */
+ { 13463, 0x0000812A }, /* GL_FOG_FUNC_SGIS */
+ { 13480, 0x0000812B }, /* GL_FOG_FUNC_POINTS_SGIS */
+ { 13504, 0x0000812C }, /* GL_MAX_FOG_FUNC_POINTS_SGIS */
+ { 13532, 0x0000812D }, /* GL_CLAMP_TO_BORDER */
+ { 13551, 0x0000812E }, /* GL_TEXTURE_MULTI_BUFFER_HINT_SGIX */
+ { 13585, 0x0000812F }, /* GL_CLAMP_TO_EDGE */
+ { 13602, 0x00008130 }, /* GL_PACK_SKIP_VOLUMES_SGIS */
+ { 13628, 0x00008131 }, /* GL_PACK_IMAGE_DEPTH_SGIS */
+ { 13653, 0x00008132 }, /* GL_UNPACK_SKIP_VOLUMES_SGIS */
+ { 13681, 0x00008133 }, /* GL_UNPACK_IMAGE_DEPTH_SGIS */
+ { 13708, 0x00008134 }, /* GL_TEXTURE_4D_SGIS */
+ { 13727, 0x00008135 }, /* GL_PROXY_TEXTURE_4D_SGIS */
+ { 13752, 0x00008136 }, /* GL_TEXTURE_4DSIZE_SGIS */
+ { 13775, 0x00008137 }, /* GL_TEXTURE_WRAP_Q_SGIS */
+ { 13798, 0x00008138 }, /* GL_MAX_4D_TEXTURE_SIZE_SGIS */
+ { 13826, 0x00008139 }, /* GL_PIXEL_TEX_GEN_SGIX */
+ { 13848, 0x0000813A }, /* GL_TEXTURE_MIN_LOD */
+ { 13867, 0x0000813B }, /* GL_TEXTURE_MAX_LOD */
+ { 13886, 0x0000813C }, /* GL_TEXTURE_BASE_LEVEL */
+ { 13908, 0x0000813D }, /* GL_TEXTURE_MAX_LEVEL */
+ { 13929, 0x0000813E }, /* GL_PIXEL_TILE_BEST_ALIGNMENT_SGIX */
+ { 13963, 0x0000813F }, /* GL_PIXEL_TILE_CACHE_INCREMENT_SGIX */
+ { 13998, 0x00008140 }, /* GL_PIXEL_TILE_WIDTH_SGIX */
+ { 14023, 0x00008141 }, /* GL_PIXEL_TILE_HEIGHT_SGIX */
+ { 14049, 0x00008142 }, /* GL_PIXEL_TILE_GRID_WIDTH_SGIX */
+ { 14079, 0x00008143 }, /* GL_PIXEL_TILE_GRID_HEIGHT_SGIX */
+ { 14110, 0x00008144 }, /* GL_PIXEL_TILE_GRID_DEPTH_SGIX */
+ { 14140, 0x00008145 }, /* GL_PIXEL_TILE_CACHE_SIZE_SGIX */
+ { 14170, 0x00008146 }, /* GL_FILTER4_SGIS */
+ { 14186, 0x00008147 }, /* GL_TEXTURE_FILTER4_SIZE_SGIS */
+ { 14215, 0x00008148 }, /* GL_SPRITE_SGIX */
+ { 14230, 0x00008149 }, /* GL_SPRITE_MODE_SGIX */
+ { 14250, 0x0000814A }, /* GL_SPRITE_AXIS_SGIX */
+ { 14270, 0x0000814B }, /* GL_SPRITE_TRANSLATION_SGIX */
+ { 14297, 0x0000814C }, /* GL_SPRITE_AXIAL_SGIX */
+ { 14318, 0x0000814D }, /* GL_SPRITE_OBJECT_ALIGNED_SGIX */
+ { 14348, 0x0000814E }, /* GL_SPRITE_EYE_ALIGNED_SGIX */
+ { 14375, 0x0000814F }, /* GL_TEXTURE_4D_BINDING_SGIS */
+ { 14402, 0x00008150 }, /* GL_IGNORE_BORDER_HP */
+ { 14422, 0x00008151 }, /* GL_CONSTANT_BORDER */
+ { 14441, 0x00008153 }, /* GL_REPLICATE_BORDER */
+ { 14461, 0x00008154 }, /* GL_CONVOLUTION_BORDER_COLOR */
+ { 14489, 0x00008155 }, /* GL_IMAGE_SCALE_X_HP */
+ { 14509, 0x00008156 }, /* GL_IMAGE_SCALE_Y_HP */
+ { 14529, 0x00008157 }, /* GL_IMAGE_TRANSLATE_X_HP */
+ { 14553, 0x00008158 }, /* GL_IMAGE_TRANSLATE_Y_HP */
+ { 14577, 0x00008159 }, /* GL_IMAGE_ROTATE_ANGLE_HP */
+ { 14602, 0x0000815A }, /* GL_IMAGE_ROTATE_ORIGIN_X_HP */
+ { 14630, 0x0000815B }, /* GL_IMAGE_ROTATE_ORIGIN_Y_HP */
+ { 14658, 0x0000815C }, /* GL_IMAGE_MAG_FILTER_HP */
+ { 14681, 0x0000815D }, /* GL_IMAGE_MIN_FILTER_HP */
+ { 14704, 0x0000815E }, /* GL_IMAGE_CUBIC_WEIGHT_HP */
+ { 14729, 0x0000815F }, /* GL_CUBIC_HP */
+ { 14741, 0x00008160 }, /* GL_AVERAGE_HP */
+ { 14755, 0x00008161 }, /* GL_IMAGE_TRANSFORM_2D_HP */
+ { 14780, 0x00008162 }, /* GL_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */
+ { 14819, 0x00008163 }, /* GL_PROXY_POST_IMAGE_TRANSFORM_COLOR_TABLE_HP */
+ { 14864, 0x00008165 }, /* GL_OCCLUSION_TEST_HP */
+ { 14885, 0x00008166 }, /* GL_OCCLUSION_TEST_RESULT_HP */
+ { 14913, 0x00008167 }, /* GL_TEXTURE_LIGHTING_MODE_HP */
+ { 14941, 0x00008168 }, /* GL_TEXTURE_POST_SPECULAR_HP */
+ { 14969, 0x00008169 }, /* GL_TEXTURE_PRE_SPECULAR_HP */
+ { 14996, 0x00008170 }, /* GL_LINEAR_CLIPMAP_LINEAR_SGIX */
+ { 15026, 0x00008171 }, /* GL_TEXTURE_CLIPMAP_CENTER_SGIX */
+ { 15057, 0x00008172 }, /* GL_TEXTURE_CLIPMAP_FRAME_SGIX */
+ { 15087, 0x00008173 }, /* GL_TEXTURE_CLIPMAP_OFFSET_SGIX */
+ { 15118, 0x00008174 }, /* GL_TEXTURE_CLIPMAP_VIRTUAL_DEPTH_SGIX */
+ { 15156, 0x00008175 }, /* GL_TEXTURE_CLIPMAP_LOD_OFFSET_SGIX */
+ { 15191, 0x00008176 }, /* GL_TEXTURE_CLIPMAP_DEPTH_SGIX */
+ { 15221, 0x00008177 }, /* GL_MAX_CLIPMAP_DEPTH_SGIX */
+ { 15247, 0x00008178 }, /* GL_MAX_CLIPMAP_VIRTUAL_DEPTH_SGIX */
+ { 15281, 0x00008179 }, /* GL_POST_TEXTURE_FILTER_BIAS_SGIX */
+ { 15314, 0x0000817A }, /* GL_POST_TEXTURE_FILTER_SCALE_SGIX */
+ { 15348, 0x0000817B }, /* GL_POST_TEXTURE_FILTER_BIAS_RANGE_SGIX */
+ { 15387, 0x0000817C }, /* GL_POST_TEXTURE_FILTER_SCALE_RANGE_SGIX */
+ { 15427, 0x0000817D }, /* GL_REFERENCE_PLANE_SGIX */
+ { 15451, 0x0000817E }, /* GL_REFERENCE_PLANE_EQUATION_SGIX */
+ { 15484, 0x0000817F }, /* GL_IR_INSTRUMENT1_SGIX */
+ { 15507, 0x00008180 }, /* GL_INSTRUMENT_BUFFER_POINTER_SGIX */
+ { 15541, 0x00008181 }, /* GL_INSTRUMENT_MEASUREMENTS_SGIX */
+ { 15573, 0x00008182 }, /* GL_LIST_PRIORITY_SGIX */
+ { 15595, 0x00008183 }, /* GL_CALLIGRAPHIC_FRAGMENT_SGIX */
+ { 15625, 0x0000818B }, /* GL_FRAMEZOOM_SGIX */
+ { 15643, 0x0000818C }, /* GL_FRAMEZOOM_FACTOR_SGIX */
+ { 15668, 0x0000818D }, /* GL_MAX_FRAMEZOOM_FACTOR_SGIX */
+ { 15697, 0x0000818E }, /* GL_TEXTURE_LOD_BIAS_S_SGIX */
+ { 15724, 0x0000818F }, /* GL_TEXTURE_LOD_BIAS_T_SGIX */
+ { 15751, 0x00008190 }, /* GL_TEXTURE_LOD_BIAS_R_SGIX */
+ { 15778, 0x00008191 }, /* GL_GENERATE_MIPMAP */
+ { 15797, 0x00008192 }, /* GL_GENERATE_MIPMAP_HINT */
+ { 15821, 0x00008194 }, /* GL_GEOMETRY_DEFORMATION_SGIX */
+ { 15850, 0x00008195 }, /* GL_TEXTURE_DEFORMATION_SGIX */
+ { 15878, 0x00008196 }, /* GL_DEFORMATIONS_MASK_SGIX */
+ { 15904, 0x00008197 }, /* GL_MAX_DEFORMATION_ORDER_SGIX */
+ { 15934, 0x00008198 }, /* GL_FOG_OFFSET_SGIX */
+ { 15953, 0x00008199 }, /* GL_FOG_OFFSET_VALUE_SGIX */
+ { 15978, 0x0000819A }, /* GL_TEXTURE_COMPARE_SGIX */
+ { 16002, 0x0000819B }, /* GL_TEXTURE_COMPARE_OPERATOR_SGIX */
+ { 16035, 0x0000819C }, /* GL_TEXTURE_LEQUAL_R_SGIX */
+ { 16060, 0x0000819D }, /* GL_TEXTURE_GEQUAL_R_SGIX */
+ { 16085, 0x000081A5 }, /* GL_DEPTH_COMPONENT16 */
+ { 16106, 0x000081A6 }, /* GL_DEPTH_COMPONENT24 */
+ { 16127, 0x000081A7 }, /* GL_DEPTH_COMPONENT32 */
+ { 16148, 0x000081A8 }, /* GL_ARRAY_ELEMENT_LOCK_FIRST_EXT */
+ { 16180, 0x000081A9 }, /* GL_ARRAY_ELEMENT_LOCK_COUNT_EXT */
+ { 16212, 0x000081AA }, /* GL_CULL_VERTEX_EXT */
+ { 16231, 0x000081AB }, /* GL_CULL_VERTEX_EYE_POSITION_EXT */
+ { 16263, 0x000081AC }, /* GL_CULL_VERTEX_OBJECT_POSITION_EXT */
+ { 16298, 0x000081AD }, /* GL_IUI_V2F_EXT */
+ { 16313, 0x000081AE }, /* GL_IUI_V3F_EXT */
+ { 16328, 0x000081AF }, /* GL_IUI_N3F_V2F_EXT */
+ { 16347, 0x000081B0 }, /* GL_IUI_N3F_V3F_EXT */
+ { 16366, 0x000081B1 }, /* GL_T2F_IUI_V2F_EXT */
+ { 16385, 0x000081B2 }, /* GL_T2F_IUI_V3F_EXT */
+ { 16404, 0x000081B3 }, /* GL_T2F_IUI_N3F_V2F_EXT */
+ { 16427, 0x000081B4 }, /* GL_T2F_IUI_N3F_V3F_EXT */
+ { 16450, 0x000081B5 }, /* GL_INDEX_TEST_EXT */
+ { 16468, 0x000081B6 }, /* GL_INDEX_TEST_FUNC_EXT */
+ { 16491, 0x000081B7 }, /* GL_INDEX_TEST_REF_EXT */
+ { 16513, 0x000081B8 }, /* GL_INDEX_MATERIAL_EXT */
+ { 16535, 0x000081B9 }, /* GL_INDEX_MATERIAL_PARAMETER_EXT */
+ { 16567, 0x000081BA }, /* GL_INDEX_MATERIAL_FACE_EXT */
+ { 16594, 0x000081BB }, /* GL_YCRCB_422_SGIX */
+ { 16612, 0x000081BC }, /* GL_YCRCB_444_SGIX */
+ { 16630, 0x000081D4 }, /* GL_WRAP_BORDER_SUN */
+ { 16649, 0x000081D5 }, /* GL_UNPACK_CONSTANT_DATA_SUNX */
+ { 16678, 0x000081D6 }, /* GL_TEXTURE_CONSTANT_DATA_SUNX */
+ { 16708, 0x000081D7 }, /* GL_TRIANGLE_LIST_SUN */
+ { 16729, 0x000081D8 }, /* GL_REPLACEMENT_CODE_SUN */
+ { 16753, 0x000081D9 }, /* GL_GLOBAL_ALPHA_SUN */
+ { 16773, 0x000081DA }, /* GL_GLOBAL_ALPHA_FACTOR_SUN */
+ { 16800, 0x000081EF }, /* GL_TEXTURE_COLOR_WRITEMASK_SGIS */
+ { 16832, 0x000081F0 }, /* GL_EYE_DISTANCE_TO_POINT_SGIS */
+ { 16862, 0x000081F1 }, /* GL_OBJECT_DISTANCE_TO_POINT_SGIS */
+ { 16895, 0x000081F2 }, /* GL_EYE_DISTANCE_TO_LINE_SGIS */
+ { 16924, 0x000081F3 }, /* GL_OBJECT_DISTANCE_TO_LINE_SGIS */
+ { 16956, 0x000081F4 }, /* GL_EYE_POINT_SGIS */
+ { 16974, 0x000081F5 }, /* GL_OBJECT_POINT_SGIS */
+ { 16995, 0x000081F6 }, /* GL_EYE_LINE_SGIS */
+ { 17012, 0x000081F7 }, /* GL_OBJECT_LINE_SGIS */
+ { 17032, 0x000081F8 }, /* GL_LIGHT_MODEL_COLOR_CONTROL */
+ { 17061, 0x000081F9 }, /* GL_SINGLE_COLOR */
+ { 17077, 0x000081FA }, /* GL_SEPARATE_SPECULAR_COLOR */
+ { 17104, 0x000081FB }, /* GL_SHARED_TEXTURE_PALETTE_EXT */
+ { 17134, 0x00008200 }, /* GL_TEXT_FRAGMENT_SHADER_ATI */
+ { 17162, 0x00008210 }, /* GL_FRAMEBUFFER_ATTACHMENT_COLOR_ENCODING */
+ { 17203, 0x00008211 }, /* GL_FRAMEBUFFER_ATTACHMENT_COMPONENT_TYPE */
+ { 17244, 0x00008212 }, /* GL_FRAMEBUFFER_ATTACHMENT_RED_SIZE */
+ { 17279, 0x00008213 }, /* GL_FRAMEBUFFER_ATTACHMENT_GREEN_SIZE */
+ { 17316, 0x00008214 }, /* GL_FRAMEBUFFER_ATTACHMENT_BLUE_SIZE */
+ { 17352, 0x00008215 }, /* GL_FRAMEBUFFER_ATTACHMENT_ALPHA_SIZE */
+ { 17389, 0x00008216 }, /* GL_FRAMEBUFFER_ATTACHMENT_DEPTH_SIZE */
+ { 17426, 0x00008217 }, /* GL_FRAMEBUFFER_ATTACHMENT_STENCIL_SIZE */
+ { 17465, 0x00008218 }, /* GL_FRAMEBUFFER_DEFAULT */
+ { 17488, 0x00008219 }, /* GL_FRAMEBUFFER_UNDEFINED */
+ { 17513, 0x0000821A }, /* GL_DEPTH_STENCIL_ATTACHMENT */
+ { 17541, 0x0000821B }, /* GL_MAJOR_VERSION */
+ { 17558, 0x0000821C }, /* GL_MINOR_VERSION */
+ { 17575, 0x0000821D }, /* GL_NUM_EXTENSIONS */
+ { 17593, 0x0000821E }, /* GL_CONTEXT_FLAGS */
+ { 17610, 0x0000821F }, /* GL_BUFFER_IMMUTABLE_STORAGE */
+ { 17638, 0x00008220 }, /* GL_BUFFER_STORAGE_FLAGS */
+ { 17662, 0x00008221 }, /* GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED */
+ { 17705, 0x00008222 }, /* GL_INDEX */
+ { 17714, 0x00008225 }, /* GL_COMPRESSED_RED */
+ { 17732, 0x00008226 }, /* GL_COMPRESSED_RG */
+ { 17749, 0x00008227 }, /* GL_RG */
+ { 17755, 0x00008228 }, /* GL_RG_INTEGER */
+ { 17769, 0x00008229 }, /* GL_R8 */
+ { 17775, 0x0000822A }, /* GL_R16 */
+ { 17782, 0x0000822B }, /* GL_RG8 */
+ { 17789, 0x0000822C }, /* GL_RG16 */
+ { 17797, 0x0000822D }, /* GL_R16F */
+ { 17805, 0x0000822E }, /* GL_R32F */
+ { 17813, 0x0000822F }, /* GL_RG16F */
+ { 17822, 0x00008230 }, /* GL_RG32F */
+ { 17831, 0x00008231 }, /* GL_R8I */
+ { 17838, 0x00008232 }, /* GL_R8UI */
+ { 17846, 0x00008233 }, /* GL_R16I */
+ { 17854, 0x00008234 }, /* GL_R16UI */
+ { 17863, 0x00008235 }, /* GL_R32I */
+ { 17871, 0x00008236 }, /* GL_R32UI */
+ { 17880, 0x00008237 }, /* GL_RG8I */
+ { 17888, 0x00008238 }, /* GL_RG8UI */
+ { 17897, 0x00008239 }, /* GL_RG16I */
+ { 17906, 0x0000823A }, /* GL_RG16UI */
+ { 17916, 0x0000823B }, /* GL_RG32I */
+ { 17925, 0x0000823C }, /* GL_RG32UI */
+ { 17935, 0x00008240 }, /* GL_SYNC_CL_EVENT_ARB */
+ { 17956, 0x00008241 }, /* GL_SYNC_CL_EVENT_COMPLETE_ARB */
+ { 17986, 0x00008242 }, /* GL_DEBUG_OUTPUT_SYNCHRONOUS */
+ { 18014, 0x00008243 }, /* GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH */
+ { 18050, 0x00008244 }, /* GL_DEBUG_CALLBACK_FUNCTION */
+ { 18077, 0x00008245 }, /* GL_DEBUG_CALLBACK_USER_PARAM */
+ { 18106, 0x00008246 }, /* GL_DEBUG_SOURCE_API */
+ { 18126, 0x00008247 }, /* GL_DEBUG_SOURCE_WINDOW_SYSTEM */
+ { 18156, 0x00008248 }, /* GL_DEBUG_SOURCE_SHADER_COMPILER */
+ { 18188, 0x00008249 }, /* GL_DEBUG_SOURCE_THIRD_PARTY */
+ { 18216, 0x0000824A }, /* GL_DEBUG_SOURCE_APPLICATION */
+ { 18244, 0x0000824B }, /* GL_DEBUG_SOURCE_OTHER */
+ { 18266, 0x0000824C }, /* GL_DEBUG_TYPE_ERROR */
+ { 18286, 0x0000824D }, /* GL_DEBUG_TYPE_DEPRECATED_BEHAVIOR */
+ { 18320, 0x0000824E }, /* GL_DEBUG_TYPE_UNDEFINED_BEHAVIOR */
+ { 18353, 0x0000824F }, /* GL_DEBUG_TYPE_PORTABILITY */
+ { 18379, 0x00008250 }, /* GL_DEBUG_TYPE_PERFORMANCE */
+ { 18405, 0x00008251 }, /* GL_DEBUG_TYPE_OTHER */
+ { 18425, 0x00008252 }, /* GL_LOSE_CONTEXT_ON_RESET */
+ { 18450, 0x00008253 }, /* GL_GUILTY_CONTEXT_RESET */
+ { 18474, 0x00008254 }, /* GL_INNOCENT_CONTEXT_RESET */
+ { 18500, 0x00008255 }, /* GL_UNKNOWN_CONTEXT_RESET */
+ { 18525, 0x00008256 }, /* GL_RESET_NOTIFICATION_STRATEGY */
+ { 18556, 0x00008257 }, /* GL_PROGRAM_BINARY_RETRIEVABLE_HINT */
+ { 18591, 0x00008258 }, /* GL_PROGRAM_SEPARABLE */
+ { 18612, 0x00008259 }, /* GL_ACTIVE_PROGRAM */
+ { 18630, 0x0000825A }, /* GL_PROGRAM_PIPELINE_BINDING */
+ { 18658, 0x0000825B }, /* GL_MAX_VIEWPORTS */
+ { 18675, 0x0000825C }, /* GL_VIEWPORT_SUBPIXEL_BITS */
+ { 18701, 0x0000825D }, /* GL_VIEWPORT_BOUNDS_RANGE */
+ { 18726, 0x0000825E }, /* GL_LAYER_PROVOKING_VERTEX */
+ { 18752, 0x0000825F }, /* GL_VIEWPORT_INDEX_PROVOKING_VERTEX */
+ { 18787, 0x00008260 }, /* GL_UNDEFINED_VERTEX */
+ { 18807, 0x00008261 }, /* GL_NO_RESET_NOTIFICATION */
+ { 18832, 0x00008262 }, /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
+ { 18866, 0x00008263 }, /* GL_MAX_COMPUTE_UNIFORM_COMPONENTS */
+ { 18900, 0x00008264 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS */
+ { 18938, 0x00008265 }, /* GL_MAX_COMPUTE_ATOMIC_COUNTERS */
+ { 18969, 0x00008266 }, /* GL_MAX_COMBINED_COMPUTE_UNIFORM_COMPONENTS */
+ { 19012, 0x00008267 }, /* GL_COMPUTE_WORK_GROUP_SIZE */
+ { 19039, 0x00008268 }, /* GL_DEBUG_TYPE_MARKER */
+ { 19060, 0x00008269 }, /* GL_DEBUG_TYPE_PUSH_GROUP */
+ { 19085, 0x0000826A }, /* GL_DEBUG_TYPE_POP_GROUP */
+ { 19109, 0x0000826B }, /* GL_DEBUG_SEVERITY_NOTIFICATION */
+ { 19140, 0x0000826C }, /* GL_MAX_DEBUG_GROUP_STACK_DEPTH */
+ { 19171, 0x0000826D }, /* GL_DEBUG_GROUP_STACK_DEPTH */
+ { 19198, 0x0000826E }, /* GL_MAX_UNIFORM_LOCATIONS */
+ { 19223, 0x0000826F }, /* GL_INTERNALFORMAT_SUPPORTED */
+ { 19251, 0x00008270 }, /* GL_INTERNALFORMAT_PREFERRED */
+ { 19279, 0x00008271 }, /* GL_INTERNALFORMAT_RED_SIZE */
+ { 19306, 0x00008272 }, /* GL_INTERNALFORMAT_GREEN_SIZE */
+ { 19335, 0x00008273 }, /* GL_INTERNALFORMAT_BLUE_SIZE */
+ { 19363, 0x00008274 }, /* GL_INTERNALFORMAT_ALPHA_SIZE */
+ { 19392, 0x00008275 }, /* GL_INTERNALFORMAT_DEPTH_SIZE */
+ { 19421, 0x00008276 }, /* GL_INTERNALFORMAT_STENCIL_SIZE */
+ { 19452, 0x00008277 }, /* GL_INTERNALFORMAT_SHARED_SIZE */
+ { 19482, 0x00008278 }, /* GL_INTERNALFORMAT_RED_TYPE */
+ { 19509, 0x00008279 }, /* GL_INTERNALFORMAT_GREEN_TYPE */
+ { 19538, 0x0000827A }, /* GL_INTERNALFORMAT_BLUE_TYPE */
+ { 19566, 0x0000827B }, /* GL_INTERNALFORMAT_ALPHA_TYPE */
+ { 19595, 0x0000827C }, /* GL_INTERNALFORMAT_DEPTH_TYPE */
+ { 19624, 0x0000827D }, /* GL_INTERNALFORMAT_STENCIL_TYPE */
+ { 19655, 0x0000827E }, /* GL_MAX_WIDTH */
+ { 19668, 0x0000827F }, /* GL_MAX_HEIGHT */
+ { 19682, 0x00008280 }, /* GL_MAX_DEPTH */
+ { 19695, 0x00008281 }, /* GL_MAX_LAYERS */
+ { 19709, 0x00008282 }, /* GL_MAX_COMBINED_DIMENSIONS */
+ { 19736, 0x00008283 }, /* GL_COLOR_COMPONENTS */
+ { 19756, 0x00008284 }, /* GL_DEPTH_COMPONENTS */
+ { 19776, 0x00008285 }, /* GL_STENCIL_COMPONENTS */
+ { 19798, 0x00008286 }, /* GL_COLOR_RENDERABLE */
+ { 19818, 0x00008287 }, /* GL_DEPTH_RENDERABLE */
+ { 19838, 0x00008288 }, /* GL_STENCIL_RENDERABLE */
+ { 19860, 0x00008289 }, /* GL_FRAMEBUFFER_RENDERABLE */
+ { 19886, 0x0000828A }, /* GL_FRAMEBUFFER_RENDERABLE_LAYERED */
+ { 19920, 0x0000828B }, /* GL_FRAMEBUFFER_BLEND */
+ { 19941, 0x0000828C }, /* GL_READ_PIXELS */
+ { 19956, 0x0000828D }, /* GL_READ_PIXELS_FORMAT */
+ { 19978, 0x0000828E }, /* GL_READ_PIXELS_TYPE */
+ { 19998, 0x0000828F }, /* GL_TEXTURE_IMAGE_FORMAT */
+ { 20022, 0x00008290 }, /* GL_TEXTURE_IMAGE_TYPE */
+ { 20044, 0x00008291 }, /* GL_GET_TEXTURE_IMAGE_FORMAT */
+ { 20072, 0x00008292 }, /* GL_GET_TEXTURE_IMAGE_TYPE */
+ { 20098, 0x00008293 }, /* GL_MIPMAP */
+ { 20108, 0x00008294 }, /* GL_MANUAL_GENERATE_MIPMAP */
+ { 20134, 0x00008295 }, /* GL_AUTO_GENERATE_MIPMAP */
+ { 20158, 0x00008296 }, /* GL_COLOR_ENCODING */
+ { 20176, 0x00008297 }, /* GL_SRGB_READ */
+ { 20189, 0x00008298 }, /* GL_SRGB_WRITE */
+ { 20203, 0x00008299 }, /* GL_SRGB_DECODE_ARB */
+ { 20222, 0x0000829A }, /* GL_FILTER */
+ { 20232, 0x0000829B }, /* GL_VERTEX_TEXTURE */
+ { 20250, 0x0000829C }, /* GL_TESS_CONTROL_TEXTURE */
+ { 20274, 0x0000829D }, /* GL_TESS_EVALUATION_TEXTURE */
+ { 20301, 0x0000829E }, /* GL_GEOMETRY_TEXTURE */
+ { 20321, 0x0000829F }, /* GL_FRAGMENT_TEXTURE */
+ { 20341, 0x000082A0 }, /* GL_COMPUTE_TEXTURE */
+ { 20360, 0x000082A1 }, /* GL_TEXTURE_SHADOW */
+ { 20378, 0x000082A2 }, /* GL_TEXTURE_GATHER */
+ { 20396, 0x000082A3 }, /* GL_TEXTURE_GATHER_SHADOW */
+ { 20421, 0x000082A4 }, /* GL_SHADER_IMAGE_LOAD */
+ { 20442, 0x000082A5 }, /* GL_SHADER_IMAGE_STORE */
+ { 20464, 0x000082A6 }, /* GL_SHADER_IMAGE_ATOMIC */
+ { 20487, 0x000082A7 }, /* GL_IMAGE_TEXEL_SIZE */
+ { 20507, 0x000082A8 }, /* GL_IMAGE_COMPATIBILITY_CLASS */
+ { 20536, 0x000082A9 }, /* GL_IMAGE_PIXEL_FORMAT */
+ { 20558, 0x000082AA }, /* GL_IMAGE_PIXEL_TYPE */
+ { 20578, 0x000082AC }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_TEST */
+ { 20617, 0x000082AD }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_TEST */
+ { 20658, 0x000082AE }, /* GL_SIMULTANEOUS_TEXTURE_AND_DEPTH_WRITE */
+ { 20698, 0x000082AF }, /* GL_SIMULTANEOUS_TEXTURE_AND_STENCIL_WRITE */
+ { 20740, 0x000082B1 }, /* GL_TEXTURE_COMPRESSED_BLOCK_WIDTH */
+ { 20774, 0x000082B2 }, /* GL_TEXTURE_COMPRESSED_BLOCK_HEIGHT */
+ { 20809, 0x000082B3 }, /* GL_TEXTURE_COMPRESSED_BLOCK_SIZE */
+ { 20842, 0x000082B4 }, /* GL_CLEAR_BUFFER */
+ { 20858, 0x000082B5 }, /* GL_TEXTURE_VIEW */
+ { 20874, 0x000082B6 }, /* GL_VIEW_COMPATIBILITY_CLASS */
+ { 20902, 0x000082B7 }, /* GL_FULL_SUPPORT */
+ { 20918, 0x000082B8 }, /* GL_CAVEAT_SUPPORT */
+ { 20936, 0x000082B9 }, /* GL_IMAGE_CLASS_4_X_32 */
+ { 20958, 0x000082BA }, /* GL_IMAGE_CLASS_2_X_32 */
+ { 20980, 0x000082BB }, /* GL_IMAGE_CLASS_1_X_32 */
+ { 21002, 0x000082BC }, /* GL_IMAGE_CLASS_4_X_16 */
+ { 21024, 0x000082BD }, /* GL_IMAGE_CLASS_2_X_16 */
+ { 21046, 0x000082BE }, /* GL_IMAGE_CLASS_1_X_16 */
+ { 21068, 0x000082BF }, /* GL_IMAGE_CLASS_4_X_8 */
+ { 21089, 0x000082C0 }, /* GL_IMAGE_CLASS_2_X_8 */
+ { 21110, 0x000082C1 }, /* GL_IMAGE_CLASS_1_X_8 */
+ { 21131, 0x000082C2 }, /* GL_IMAGE_CLASS_11_11_10 */
+ { 21155, 0x000082C3 }, /* GL_IMAGE_CLASS_10_10_10_2 */
+ { 21181, 0x000082C4 }, /* GL_VIEW_CLASS_128_BITS */
+ { 21204, 0x000082C5 }, /* GL_VIEW_CLASS_96_BITS */
+ { 21226, 0x000082C6 }, /* GL_VIEW_CLASS_64_BITS */
+ { 21248, 0x000082C7 }, /* GL_VIEW_CLASS_48_BITS */
+ { 21270, 0x000082C8 }, /* GL_VIEW_CLASS_32_BITS */
+ { 21292, 0x000082C9 }, /* GL_VIEW_CLASS_24_BITS */
+ { 21314, 0x000082CA }, /* GL_VIEW_CLASS_16_BITS */
+ { 21336, 0x000082CB }, /* GL_VIEW_CLASS_8_BITS */
+ { 21357, 0x000082CC }, /* GL_VIEW_CLASS_S3TC_DXT1_RGB */
+ { 21385, 0x000082CD }, /* GL_VIEW_CLASS_S3TC_DXT1_RGBA */
+ { 21414, 0x000082CE }, /* GL_VIEW_CLASS_S3TC_DXT3_RGBA */
+ { 21443, 0x000082CF }, /* GL_VIEW_CLASS_S3TC_DXT5_RGBA */
+ { 21472, 0x000082D0 }, /* GL_VIEW_CLASS_RGTC1_RED */
+ { 21496, 0x000082D1 }, /* GL_VIEW_CLASS_RGTC2_RG */
+ { 21519, 0x000082D2 }, /* GL_VIEW_CLASS_BPTC_UNORM */
+ { 21544, 0x000082D3 }, /* GL_VIEW_CLASS_BPTC_FLOAT */
+ { 21569, 0x000082D4 }, /* GL_VERTEX_ATTRIB_BINDING */
+ { 21594, 0x000082D5 }, /* GL_VERTEX_ATTRIB_RELATIVE_OFFSET */
+ { 21627, 0x000082D6 }, /* GL_VERTEX_BINDING_DIVISOR */
+ { 21653, 0x000082D7 }, /* GL_VERTEX_BINDING_OFFSET */
+ { 21678, 0x000082D8 }, /* GL_VERTEX_BINDING_STRIDE */
+ { 21703, 0x000082D9 }, /* GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET */
+ { 21740, 0x000082DA }, /* GL_MAX_VERTEX_ATTRIB_BINDINGS */
+ { 21770, 0x000082DB }, /* GL_TEXTURE_VIEW_MIN_LEVEL */
+ { 21796, 0x000082DC }, /* GL_TEXTURE_VIEW_NUM_LEVELS */
+ { 21823, 0x000082DD }, /* GL_TEXTURE_VIEW_MIN_LAYER */
+ { 21849, 0x000082DE }, /* GL_TEXTURE_VIEW_NUM_LAYERS */
+ { 21876, 0x000082DF }, /* GL_TEXTURE_IMMUTABLE_LEVELS */
+ { 21904, 0x000082E0 }, /* GL_BUFFER */
+ { 21914, 0x000082E1 }, /* GL_SHADER */
+ { 21924, 0x000082E2 }, /* GL_PROGRAM */
+ { 21935, 0x000082E3 }, /* GL_QUERY */
+ { 21944, 0x000082E4 }, /* GL_PROGRAM_PIPELINE */
+ { 21964, 0x000082E5 }, /* GL_MAX_VERTEX_ATTRIB_STRIDE */
+ { 21992, 0x000082E6 }, /* GL_SAMPLER */
+ { 22003, 0x000082E7 }, /* GL_DISPLAY_LIST */
+ { 22019, 0x000082E8 }, /* GL_MAX_LABEL_LENGTH */
+ { 22039, 0x000082E9 }, /* GL_NUM_SHADING_LANGUAGE_VERSIONS */
+ { 22072, 0x000082EA }, /* GL_QUERY_TARGET */
+ { 22088, 0x000082EC }, /* GL_TRANSFORM_FEEDBACK_OVERFLOW */
+ { 22119, 0x000082ED }, /* GL_TRANSFORM_FEEDBACK_STREAM_OVERFLOW */
+ { 22157, 0x000082EE }, /* GL_VERTICES_SUBMITTED */
+ { 22179, 0x000082EF }, /* GL_PRIMITIVES_SUBMITTED */
+ { 22203, 0x000082F0 }, /* GL_VERTEX_SHADER_INVOCATIONS */
+ { 22232, 0x000082F1 }, /* GL_TESS_CONTROL_SHADER_PATCHES */
+ { 22263, 0x000082F2 }, /* GL_TESS_EVALUATION_SHADER_INVOCATIONS */
+ { 22301, 0x000082F3 }, /* GL_GEOMETRY_SHADER_PRIMITIVES_EMITTED */
+ { 22339, 0x000082F4 }, /* GL_FRAGMENT_SHADER_INVOCATIONS */
+ { 22370, 0x000082F5 }, /* GL_COMPUTE_SHADER_INVOCATIONS */
+ { 22400, 0x000082F6 }, /* GL_CLIPPING_INPUT_PRIMITIVES */
+ { 22429, 0x000082F7 }, /* GL_CLIPPING_OUTPUT_PRIMITIVES */
+ { 22459, 0x000082F8 }, /* GL_SPARSE_BUFFER_PAGE_SIZE_ARB */
+ { 22490, 0x000082F9 }, /* GL_MAX_CULL_DISTANCES */
+ { 22512, 0x000082FA }, /* GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES */
+ { 22552, 0x000082FB }, /* GL_CONTEXT_RELEASE_BEHAVIOR */
+ { 22580, 0x000082FC }, /* GL_CONTEXT_RELEASE_BEHAVIOR_FLUSH */
+ { 22614, 0x00008316 }, /* GL_CONVOLUTION_HINT_SGIX */
+ { 22639, 0x00008318 }, /* GL_YCRCB_SGIX */
+ { 22653, 0x00008319 }, /* GL_YCRCBA_SGIX */
+ { 22668, 0x00008320 }, /* GL_ALPHA_MIN_SGIX */
+ { 22686, 0x00008321 }, /* GL_ALPHA_MAX_SGIX */
+ { 22704, 0x00008322 }, /* GL_SCALEBIAS_HINT_SGIX */
+ { 22727, 0x00008329 }, /* GL_ASYNC_MARKER_SGIX */
+ { 22748, 0x0000832B }, /* GL_PIXEL_TEX_GEN_MODE_SGIX */
+ { 22775, 0x0000832C }, /* GL_ASYNC_HISTOGRAM_SGIX */
+ { 22799, 0x0000832D }, /* GL_MAX_ASYNC_HISTOGRAM_SGIX */
+ { 22827, 0x00008330 }, /* GL_PIXEL_TRANSFORM_2D_EXT */
+ { 22853, 0x00008331 }, /* GL_PIXEL_MAG_FILTER_EXT */
+ { 22877, 0x00008332 }, /* GL_PIXEL_MIN_FILTER_EXT */
+ { 22901, 0x00008333 }, /* GL_PIXEL_CUBIC_WEIGHT_EXT */
+ { 22927, 0x00008334 }, /* GL_CUBIC_EXT */
+ { 22940, 0x00008335 }, /* GL_AVERAGE_EXT */
+ { 22955, 0x00008336 }, /* GL_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */
+ { 22993, 0x00008337 }, /* GL_MAX_PIXEL_TRANSFORM_2D_STACK_DEPTH_EXT */
+ { 23035, 0x00008338 }, /* GL_PIXEL_TRANSFORM_2D_MATRIX_EXT */
+ { 23068, 0x00008349 }, /* GL_FRAGMENT_MATERIAL_EXT */
+ { 23093, 0x0000834A }, /* GL_FRAGMENT_NORMAL_EXT */
+ { 23116, 0x0000834C }, /* GL_FRAGMENT_COLOR_EXT */
+ { 23138, 0x0000834D }, /* GL_ATTENUATION_EXT */
+ { 23157, 0x0000834E }, /* GL_SHADOW_ATTENUATION_EXT */
+ { 23183, 0x0000834F }, /* GL_TEXTURE_APPLICATION_MODE_EXT */
+ { 23215, 0x00008350 }, /* GL_TEXTURE_LIGHT_EXT */
+ { 23236, 0x00008351 }, /* GL_TEXTURE_MATERIAL_FACE_EXT */
+ { 23265, 0x00008352 }, /* GL_TEXTURE_MATERIAL_PARAMETER_EXT */
+ { 23299, 0x00008353 }, /* GL_PIXEL_TEXTURE_SGIS */
+ { 23321, 0x00008354 }, /* GL_PIXEL_FRAGMENT_RGB_SOURCE_SGIS */
+ { 23355, 0x00008355 }, /* GL_PIXEL_FRAGMENT_ALPHA_SOURCE_SGIS */
+ { 23391, 0x00008356 }, /* GL_PIXEL_GROUP_COLOR_SGIS */
+ { 23417, 0x0000835C }, /* GL_ASYNC_TEX_IMAGE_SGIX */
+ { 23441, 0x0000835D }, /* GL_ASYNC_DRAW_PIXELS_SGIX */
+ { 23467, 0x0000835E }, /* GL_ASYNC_READ_PIXELS_SGIX */
+ { 23493, 0x0000835F }, /* GL_MAX_ASYNC_TEX_IMAGE_SGIX */
+ { 23521, 0x00008360 }, /* GL_MAX_ASYNC_DRAW_PIXELS_SGIX */
+ { 23551, 0x00008361 }, /* GL_MAX_ASYNC_READ_PIXELS_SGIX */
+ { 23581, 0x00008362 }, /* GL_UNSIGNED_BYTE_2_3_3_REV */
+ { 23608, 0x00008363 }, /* GL_UNSIGNED_SHORT_5_6_5 */
+ { 23632, 0x00008364 }, /* GL_UNSIGNED_SHORT_5_6_5_REV */
+ { 23660, 0x00008365 }, /* GL_UNSIGNED_SHORT_4_4_4_4_REV */
+ { 23690, 0x00008366 }, /* GL_UNSIGNED_SHORT_1_5_5_5_REV */
+ { 23720, 0x00008367 }, /* GL_UNSIGNED_INT_8_8_8_8_REV */
+ { 23748, 0x00008368 }, /* GL_UNSIGNED_INT_2_10_10_10_REV */
+ { 23779, 0x00008369 }, /* GL_TEXTURE_MAX_CLAMP_S_SGIX */
+ { 23807, 0x0000836A }, /* GL_TEXTURE_MAX_CLAMP_T_SGIX */
+ { 23835, 0x0000836B }, /* GL_TEXTURE_MAX_CLAMP_R_SGIX */
+ { 23863, 0x00008370 }, /* GL_MIRRORED_REPEAT */
+ { 23882, 0x000083A0 }, /* GL_RGB_S3TC */
+ { 23894, 0x000083A1 }, /* GL_RGB4_S3TC */
+ { 23907, 0x000083A2 }, /* GL_RGBA_S3TC */
+ { 23920, 0x000083A3 }, /* GL_RGBA4_S3TC */
+ { 23934, 0x000083A4 }, /* GL_RGBA_DXT5_S3TC */
+ { 23952, 0x000083A5 }, /* GL_RGBA4_DXT5_S3TC */
+ { 23971, 0x000083EE }, /* GL_VERTEX_PRECLIP_SGIX */
+ { 23994, 0x000083EF }, /* GL_VERTEX_PRECLIP_HINT_SGIX */
+ { 24022, 0x000083F0 }, /* GL_COMPRESSED_RGB_S3TC_DXT1_EXT */
+ { 24054, 0x000083F1 }, /* GL_COMPRESSED_RGBA_S3TC_DXT1_EXT */
+ { 24087, 0x000083F2 }, /* GL_COMPRESSED_RGBA_S3TC_DXT3_EXT */
+ { 24120, 0x000083F3 }, /* GL_COMPRESSED_RGBA_S3TC_DXT5_EXT */
+ { 24153, 0x000083F4 }, /* GL_PARALLEL_ARRAYS_INTEL */
+ { 24178, 0x000083F5 }, /* GL_VERTEX_ARRAY_PARALLEL_POINTERS_INTEL */
+ { 24218, 0x000083F6 }, /* GL_NORMAL_ARRAY_PARALLEL_POINTERS_INTEL */
+ { 24258, 0x000083F7 }, /* GL_COLOR_ARRAY_PARALLEL_POINTERS_INTEL */
+ { 24297, 0x000083F8 }, /* GL_TEXTURE_COORD_ARRAY_PARALLEL_POINTERS_INTEL */
+ { 24344, 0x000083F9 }, /* GL_PERFQUERY_DONOT_FLUSH_INTEL */
+ { 24375, 0x000083FA }, /* GL_PERFQUERY_FLUSH_INTEL */
+ { 24400, 0x000083FB }, /* GL_PERFQUERY_WAIT_INTEL */
+ { 24424, 0x000083FE }, /* GL_CONSERVATIVE_RASTERIZATION_INTEL */
+ { 24460, 0x000083FF }, /* GL_TEXTURE_MEMORY_LAYOUT_INTEL */
+ { 24491, 0x00008400 }, /* GL_FRAGMENT_LIGHTING_SGIX */
+ { 24517, 0x00008401 }, /* GL_FRAGMENT_COLOR_MATERIAL_SGIX */
+ { 24549, 0x00008402 }, /* GL_FRAGMENT_COLOR_MATERIAL_FACE_SGIX */
+ { 24586, 0x00008403 }, /* GL_FRAGMENT_COLOR_MATERIAL_PARAMETER_SGIX */
+ { 24628, 0x00008404 }, /* GL_MAX_FRAGMENT_LIGHTS_SGIX */
+ { 24656, 0x00008405 }, /* GL_MAX_ACTIVE_LIGHTS_SGIX */
+ { 24682, 0x00008406 }, /* GL_CURRENT_RASTER_NORMAL_SGIX */
+ { 24712, 0x00008407 }, /* GL_LIGHT_ENV_MODE_SGIX */
+ { 24735, 0x00008408 }, /* GL_FRAGMENT_LIGHT_MODEL_LOCAL_VIEWER_SGIX */
+ { 24777, 0x00008409 }, /* GL_FRAGMENT_LIGHT_MODEL_TWO_SIDE_SGIX */
+ { 24815, 0x0000840A }, /* GL_FRAGMENT_LIGHT_MODEL_AMBIENT_SGIX */
+ { 24852, 0x0000840B }, /* GL_FRAGMENT_LIGHT_MODEL_NORMAL_INTERPOLATION_SGIX */
+ { 24902, 0x0000840C }, /* GL_FRAGMENT_LIGHT0_SGIX */
+ { 24926, 0x0000840D }, /* GL_FRAGMENT_LIGHT1_SGIX */
+ { 24950, 0x0000840E }, /* GL_FRAGMENT_LIGHT2_SGIX */
+ { 24974, 0x0000840F }, /* GL_FRAGMENT_LIGHT3_SGIX */
+ { 24998, 0x00008410 }, /* GL_FRAGMENT_LIGHT4_SGIX */
+ { 25022, 0x00008411 }, /* GL_FRAGMENT_LIGHT5_SGIX */
+ { 25046, 0x00008412 }, /* GL_FRAGMENT_LIGHT6_SGIX */
+ { 25070, 0x00008413 }, /* GL_FRAGMENT_LIGHT7_SGIX */
+ { 25094, 0x0000842E }, /* GL_PACK_RESAMPLE_SGIX */
+ { 25116, 0x0000842F }, /* GL_UNPACK_RESAMPLE_SGIX */
+ { 25140, 0x00008430 }, /* GL_RESAMPLE_DECIMATE_SGIX */
+ { 25166, 0x00008433 }, /* GL_RESAMPLE_REPLICATE_SGIX */
+ { 25193, 0x00008434 }, /* GL_RESAMPLE_ZERO_FILL_SGIX */
+ { 25220, 0x00008439 }, /* GL_TANGENT_ARRAY_EXT */
+ { 25241, 0x0000843A }, /* GL_BINORMAL_ARRAY_EXT */
+ { 25263, 0x0000843B }, /* GL_CURRENT_TANGENT_EXT */
+ { 25286, 0x0000843C }, /* GL_CURRENT_BINORMAL_EXT */
+ { 25310, 0x0000843E }, /* GL_TANGENT_ARRAY_TYPE_EXT */
+ { 25336, 0x0000843F }, /* GL_TANGENT_ARRAY_STRIDE_EXT */
+ { 25364, 0x00008440 }, /* GL_BINORMAL_ARRAY_TYPE_EXT */
+ { 25391, 0x00008441 }, /* GL_BINORMAL_ARRAY_STRIDE_EXT */
+ { 25420, 0x00008442 }, /* GL_TANGENT_ARRAY_POINTER_EXT */
+ { 25449, 0x00008443 }, /* GL_BINORMAL_ARRAY_POINTER_EXT */
+ { 25479, 0x00008444 }, /* GL_MAP1_TANGENT_EXT */
+ { 25499, 0x00008445 }, /* GL_MAP2_TANGENT_EXT */
+ { 25519, 0x00008446 }, /* GL_MAP1_BINORMAL_EXT */
+ { 25540, 0x00008447 }, /* GL_MAP2_BINORMAL_EXT */
+ { 25561, 0x0000844D }, /* GL_NEAREST_CLIPMAP_NEAREST_SGIX */
+ { 25593, 0x0000844E }, /* GL_NEAREST_CLIPMAP_LINEAR_SGIX */
+ { 25624, 0x0000844F }, /* GL_LINEAR_CLIPMAP_NEAREST_SGIX */
+ { 25655, 0x00008450 }, /* GL_FOG_COORD_SRC */
+ { 25672, 0x00008451 }, /* GL_FOG_COORD */
+ { 25685, 0x00008452 }, /* GL_FRAGMENT_DEPTH */
+ { 25703, 0x00008453 }, /* GL_CURRENT_FOG_COORD */
+ { 25724, 0x00008454 }, /* GL_FOG_COORD_ARRAY_TYPE */
+ { 25748, 0x00008455 }, /* GL_FOG_COORD_ARRAY_STRIDE */
+ { 25774, 0x00008456 }, /* GL_FOG_COORD_ARRAY_POINTER */
+ { 25801, 0x00008457 }, /* GL_FOG_COORD_ARRAY */
+ { 25820, 0x00008458 }, /* GL_COLOR_SUM */
+ { 25833, 0x00008459 }, /* GL_CURRENT_SECONDARY_COLOR */
+ { 25860, 0x0000845A }, /* GL_SECONDARY_COLOR_ARRAY_SIZE */
+ { 25890, 0x0000845B }, /* GL_SECONDARY_COLOR_ARRAY_TYPE */
+ { 25920, 0x0000845C }, /* GL_SECONDARY_COLOR_ARRAY_STRIDE */
+ { 25952, 0x0000845D }, /* GL_SECONDARY_COLOR_ARRAY_POINTER */
+ { 25985, 0x0000845E }, /* GL_SECONDARY_COLOR_ARRAY */
+ { 26010, 0x0000845F }, /* GL_CURRENT_RASTER_SECONDARY_COLOR */
+ { 26044, 0x0000846D }, /* GL_ALIASED_POINT_SIZE_RANGE */
+ { 26072, 0x0000846E }, /* GL_ALIASED_LINE_WIDTH_RANGE */
+ { 26100, 0x00008490 }, /* GL_SCREEN_COORDINATES_REND */
+ { 26127, 0x00008491 }, /* GL_INVERTED_SCREEN_W_REND */
+ { 26153, 0x000084C0 }, /* GL_TEXTURE0 */
+ { 26165, 0x000084C1 }, /* GL_TEXTURE1 */
+ { 26177, 0x000084C2 }, /* GL_TEXTURE2 */
+ { 26189, 0x000084C3 }, /* GL_TEXTURE3 */
+ { 26201, 0x000084C4 }, /* GL_TEXTURE4 */
+ { 26213, 0x000084C5 }, /* GL_TEXTURE5 */
+ { 26225, 0x000084C6 }, /* GL_TEXTURE6 */
+ { 26237, 0x000084C7 }, /* GL_TEXTURE7 */
+ { 26249, 0x000084C8 }, /* GL_TEXTURE8 */
+ { 26261, 0x000084C9 }, /* GL_TEXTURE9 */
+ { 26273, 0x000084CA }, /* GL_TEXTURE10 */
+ { 26286, 0x000084CB }, /* GL_TEXTURE11 */
+ { 26299, 0x000084CC }, /* GL_TEXTURE12 */
+ { 26312, 0x000084CD }, /* GL_TEXTURE13 */
+ { 26325, 0x000084CE }, /* GL_TEXTURE14 */
+ { 26338, 0x000084CF }, /* GL_TEXTURE15 */
+ { 26351, 0x000084D0 }, /* GL_TEXTURE16 */
+ { 26364, 0x000084D1 }, /* GL_TEXTURE17 */
+ { 26377, 0x000084D2 }, /* GL_TEXTURE18 */
+ { 26390, 0x000084D3 }, /* GL_TEXTURE19 */
+ { 26403, 0x000084D4 }, /* GL_TEXTURE20 */
+ { 26416, 0x000084D5 }, /* GL_TEXTURE21 */
+ { 26429, 0x000084D6 }, /* GL_TEXTURE22 */
+ { 26442, 0x000084D7 }, /* GL_TEXTURE23 */
+ { 26455, 0x000084D8 }, /* GL_TEXTURE24 */
+ { 26468, 0x000084D9 }, /* GL_TEXTURE25 */
+ { 26481, 0x000084DA }, /* GL_TEXTURE26 */
+ { 26494, 0x000084DB }, /* GL_TEXTURE27 */
+ { 26507, 0x000084DC }, /* GL_TEXTURE28 */
+ { 26520, 0x000084DD }, /* GL_TEXTURE29 */
+ { 26533, 0x000084DE }, /* GL_TEXTURE30 */
+ { 26546, 0x000084DF }, /* GL_TEXTURE31 */
+ { 26559, 0x000084E0 }, /* GL_ACTIVE_TEXTURE */
+ { 26577, 0x000084E1 }, /* GL_CLIENT_ACTIVE_TEXTURE */
+ { 26602, 0x000084E2 }, /* GL_MAX_TEXTURE_UNITS */
+ { 26623, 0x000084E3 }, /* GL_TRANSPOSE_MODELVIEW_MATRIX */
+ { 26653, 0x000084E4 }, /* GL_TRANSPOSE_PROJECTION_MATRIX */
+ { 26684, 0x000084E5 }, /* GL_TRANSPOSE_TEXTURE_MATRIX */
+ { 26712, 0x000084E6 }, /* GL_TRANSPOSE_COLOR_MATRIX */
+ { 26738, 0x000084E7 }, /* GL_SUBTRACT */
+ { 26750, 0x000084E8 }, /* GL_MAX_RENDERBUFFER_SIZE */
+ { 26775, 0x000084E9 }, /* GL_COMPRESSED_ALPHA */
+ { 26795, 0x000084EA }, /* GL_COMPRESSED_LUMINANCE */
+ { 26819, 0x000084EB }, /* GL_COMPRESSED_LUMINANCE_ALPHA */
+ { 26849, 0x000084EC }, /* GL_COMPRESSED_INTENSITY */
+ { 26873, 0x000084ED }, /* GL_COMPRESSED_RGB */
+ { 26891, 0x000084EE }, /* GL_COMPRESSED_RGBA */
+ { 26910, 0x000084EF }, /* GL_TEXTURE_COMPRESSION_HINT */
+ { 26938, 0x000084F0 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_CONTROL_SHADER */
+ { 26989, 0x000084F1 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_TESS_EVALUATION_SHADER */
+ { 27043, 0x000084F2 }, /* GL_ALL_COMPLETED_NV */
+ { 27063, 0x000084F3 }, /* GL_FENCE_STATUS_NV */
+ { 27082, 0x000084F4 }, /* GL_FENCE_CONDITION_NV */
+ { 27104, 0x000084F5 }, /* GL_TEXTURE_RECTANGLE */
+ { 27125, 0x000084F6 }, /* GL_TEXTURE_BINDING_RECTANGLE */
+ { 27154, 0x000084F7 }, /* GL_PROXY_TEXTURE_RECTANGLE */
+ { 27181, 0x000084F8 }, /* GL_MAX_RECTANGLE_TEXTURE_SIZE */
+ { 27211, 0x000084F9 }, /* GL_DEPTH_STENCIL */
+ { 27228, 0x000084FA }, /* GL_UNSIGNED_INT_24_8 */
+ { 27249, 0x000084FD }, /* GL_MAX_TEXTURE_LOD_BIAS */
+ { 27273, 0x000084FE }, /* GL_TEXTURE_MAX_ANISOTROPY */
+ { 27299, 0x000084FF }, /* GL_MAX_TEXTURE_MAX_ANISOTROPY */
+ { 27329, 0x00008500 }, /* GL_TEXTURE_FILTER_CONTROL */
+ { 27355, 0x00008501 }, /* GL_TEXTURE_LOD_BIAS */
+ { 27375, 0x00008502 }, /* GL_MODELVIEW1_STACK_DEPTH_EXT */
+ { 27405, 0x00008503 }, /* GL_COMBINE4_NV */
+ { 27420, 0x00008504 }, /* GL_MAX_SHININESS_NV */
+ { 27440, 0x00008505 }, /* GL_MAX_SPOT_EXPONENT_NV */
+ { 27464, 0x00008506 }, /* GL_MODELVIEW1_MATRIX_EXT */
+ { 27489, 0x00008507 }, /* GL_INCR_WRAP */
+ { 27502, 0x00008508 }, /* GL_DECR_WRAP */
+ { 27515, 0x00008509 }, /* GL_VERTEX_WEIGHTING_EXT */
+ { 27539, 0x0000850A }, /* GL_MODELVIEW1_ARB */
+ { 27557, 0x0000850B }, /* GL_CURRENT_VERTEX_WEIGHT_EXT */
+ { 27586, 0x0000850C }, /* GL_VERTEX_WEIGHT_ARRAY_EXT */
+ { 27613, 0x0000850D }, /* GL_VERTEX_WEIGHT_ARRAY_SIZE_EXT */
+ { 27645, 0x0000850E }, /* GL_VERTEX_WEIGHT_ARRAY_TYPE_EXT */
+ { 27677, 0x0000850F }, /* GL_VERTEX_WEIGHT_ARRAY_STRIDE_EXT */
+ { 27711, 0x00008510 }, /* GL_VERTEX_WEIGHT_ARRAY_POINTER_EXT */
+ { 27746, 0x00008511 }, /* GL_NORMAL_MAP */
+ { 27760, 0x00008512 }, /* GL_REFLECTION_MAP */
+ { 27778, 0x00008513 }, /* GL_TEXTURE_CUBE_MAP */
+ { 27798, 0x00008514 }, /* GL_TEXTURE_BINDING_CUBE_MAP */
+ { 27826, 0x00008515 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_X */
+ { 27857, 0x00008516 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_X */
+ { 27888, 0x00008517 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Y */
+ { 27919, 0x00008518 }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Y */
+ { 27950, 0x00008519 }, /* GL_TEXTURE_CUBE_MAP_POSITIVE_Z */
+ { 27981, 0x0000851A }, /* GL_TEXTURE_CUBE_MAP_NEGATIVE_Z */
+ { 28012, 0x0000851B }, /* GL_PROXY_TEXTURE_CUBE_MAP */
+ { 28038, 0x0000851C }, /* GL_MAX_CUBE_MAP_TEXTURE_SIZE */
+ { 28067, 0x0000851D }, /* GL_VERTEX_ARRAY_RANGE_APPLE */
+ { 28095, 0x0000851E }, /* GL_VERTEX_ARRAY_RANGE_LENGTH_APPLE */
+ { 28130, 0x0000851F }, /* GL_VERTEX_ARRAY_STORAGE_HINT_APPLE */
+ { 28165, 0x00008520 }, /* GL_MAX_VERTEX_ARRAY_RANGE_ELEMENT_NV */
+ { 28202, 0x00008521 }, /* GL_VERTEX_ARRAY_RANGE_POINTER_APPLE */
+ { 28238, 0x00008522 }, /* GL_REGISTER_COMBINERS_NV */
+ { 28263, 0x00008523 }, /* GL_VARIABLE_A_NV */
+ { 28280, 0x00008524 }, /* GL_VARIABLE_B_NV */
+ { 28297, 0x00008525 }, /* GL_VARIABLE_C_NV */
+ { 28314, 0x00008526 }, /* GL_VARIABLE_D_NV */
+ { 28331, 0x00008527 }, /* GL_VARIABLE_E_NV */
+ { 28348, 0x00008528 }, /* GL_VARIABLE_F_NV */
+ { 28365, 0x00008529 }, /* GL_VARIABLE_G_NV */
+ { 28382, 0x0000852A }, /* GL_CONSTANT_COLOR0_NV */
+ { 28404, 0x0000852B }, /* GL_CONSTANT_COLOR1_NV */
+ { 28426, 0x0000852C }, /* GL_PRIMARY_COLOR_NV */
+ { 28446, 0x0000852D }, /* GL_SECONDARY_COLOR_NV */
+ { 28468, 0x0000852E }, /* GL_SPARE0_NV */
+ { 28481, 0x0000852F }, /* GL_SPARE1_NV */
+ { 28494, 0x00008530 }, /* GL_DISCARD_NV */
+ { 28508, 0x00008531 }, /* GL_E_TIMES_F_NV */
+ { 28524, 0x00008532 }, /* GL_SPARE0_PLUS_SECONDARY_COLOR_NV */
+ { 28558, 0x00008533 }, /* GL_VERTEX_ARRAY_RANGE_WITHOUT_FLUSH_NV */
+ { 28597, 0x00008534 }, /* GL_MULTISAMPLE_FILTER_HINT_NV */
+ { 28627, 0x00008535 }, /* GL_PER_STAGE_CONSTANTS_NV */
+ { 28653, 0x00008536 }, /* GL_UNSIGNED_IDENTITY_NV */
+ { 28677, 0x00008537 }, /* GL_UNSIGNED_INVERT_NV */
+ { 28699, 0x00008538 }, /* GL_EXPAND_NORMAL_NV */
+ { 28719, 0x00008539 }, /* GL_EXPAND_NEGATE_NV */
+ { 28739, 0x0000853A }, /* GL_HALF_BIAS_NORMAL_NV */
+ { 28762, 0x0000853B }, /* GL_HALF_BIAS_NEGATE_NV */
+ { 28785, 0x0000853C }, /* GL_SIGNED_IDENTITY_NV */
+ { 28807, 0x0000853D }, /* GL_SIGNED_NEGATE_NV */
+ { 28827, 0x0000853E }, /* GL_SCALE_BY_TWO_NV */
+ { 28846, 0x0000853F }, /* GL_SCALE_BY_FOUR_NV */
+ { 28866, 0x00008540 }, /* GL_SCALE_BY_ONE_HALF_NV */
+ { 28890, 0x00008541 }, /* GL_BIAS_BY_NEGATIVE_ONE_HALF_NV */
+ { 28922, 0x00008542 }, /* GL_COMBINER_INPUT_NV */
+ { 28943, 0x00008543 }, /* GL_COMBINER_MAPPING_NV */
+ { 28966, 0x00008544 }, /* GL_COMBINER_COMPONENT_USAGE_NV */
+ { 28997, 0x00008545 }, /* GL_COMBINER_AB_DOT_PRODUCT_NV */
+ { 29027, 0x00008546 }, /* GL_COMBINER_CD_DOT_PRODUCT_NV */
+ { 29057, 0x00008547 }, /* GL_COMBINER_MUX_SUM_NV */
+ { 29080, 0x00008548 }, /* GL_COMBINER_SCALE_NV */
+ { 29101, 0x00008549 }, /* GL_COMBINER_BIAS_NV */
+ { 29121, 0x0000854A }, /* GL_COMBINER_AB_OUTPUT_NV */
+ { 29146, 0x0000854B }, /* GL_COMBINER_CD_OUTPUT_NV */
+ { 29171, 0x0000854C }, /* GL_COMBINER_SUM_OUTPUT_NV */
+ { 29197, 0x0000854D }, /* GL_MAX_GENERAL_COMBINERS_NV */
+ { 29225, 0x0000854E }, /* GL_NUM_GENERAL_COMBINERS_NV */
+ { 29253, 0x0000854F }, /* GL_COLOR_SUM_CLAMP_NV */
+ { 29275, 0x00008550 }, /* GL_COMBINER0_NV */
+ { 29291, 0x00008551 }, /* GL_COMBINER1_NV */
+ { 29307, 0x00008552 }, /* GL_COMBINER2_NV */
+ { 29323, 0x00008553 }, /* GL_COMBINER3_NV */
+ { 29339, 0x00008554 }, /* GL_COMBINER4_NV */
+ { 29355, 0x00008555 }, /* GL_COMBINER5_NV */
+ { 29371, 0x00008556 }, /* GL_COMBINER6_NV */
+ { 29387, 0x00008557 }, /* GL_COMBINER7_NV */
+ { 29403, 0x00008558 }, /* GL_PRIMITIVE_RESTART_NV */
+ { 29427, 0x00008559 }, /* GL_PRIMITIVE_RESTART_INDEX_NV */
+ { 29457, 0x0000855A }, /* GL_FOG_DISTANCE_MODE_NV */
+ { 29481, 0x0000855B }, /* GL_EYE_RADIAL_NV */
+ { 29498, 0x0000855C }, /* GL_EYE_PLANE_ABSOLUTE_NV */
+ { 29523, 0x0000855D }, /* GL_EMBOSS_LIGHT_NV */
+ { 29542, 0x0000855E }, /* GL_EMBOSS_CONSTANT_NV */
+ { 29564, 0x0000855F }, /* GL_EMBOSS_MAP_NV */
+ { 29581, 0x00008560 }, /* GL_RED_MIN_CLAMP_INGR */
+ { 29603, 0x00008561 }, /* GL_GREEN_MIN_CLAMP_INGR */
+ { 29627, 0x00008562 }, /* GL_BLUE_MIN_CLAMP_INGR */
+ { 29650, 0x00008563 }, /* GL_ALPHA_MIN_CLAMP_INGR */
+ { 29674, 0x00008564 }, /* GL_RED_MAX_CLAMP_INGR */
+ { 29696, 0x00008565 }, /* GL_GREEN_MAX_CLAMP_INGR */
+ { 29720, 0x00008566 }, /* GL_BLUE_MAX_CLAMP_INGR */
+ { 29743, 0x00008567 }, /* GL_ALPHA_MAX_CLAMP_INGR */
+ { 29767, 0x00008568 }, /* GL_INTERLACE_READ_INGR */
+ { 29790, 0x00008570 }, /* GL_COMBINE */
+ { 29801, 0x00008571 }, /* GL_COMBINE_RGB */
+ { 29816, 0x00008572 }, /* GL_COMBINE_ALPHA */
+ { 29833, 0x00008573 }, /* GL_RGB_SCALE */
+ { 29846, 0x00008574 }, /* GL_ADD_SIGNED */
+ { 29860, 0x00008575 }, /* GL_INTERPOLATE */
+ { 29875, 0x00008576 }, /* GL_CONSTANT */
+ { 29887, 0x00008577 }, /* GL_PRIMARY_COLOR */
+ { 29904, 0x00008578 }, /* GL_PREVIOUS */
+ { 29916, 0x00008580 }, /* GL_SRC0_RGB */
+ { 29928, 0x00008581 }, /* GL_SRC1_RGB */
+ { 29940, 0x00008582 }, /* GL_SRC2_RGB */
+ { 29952, 0x00008583 }, /* GL_SOURCE3_RGB_NV */
+ { 29970, 0x00008588 }, /* GL_SRC0_ALPHA */
+ { 29984, 0x00008589 }, /* GL_SRC1_ALPHA */
+ { 29998, 0x0000858A }, /* GL_SRC2_ALPHA */
+ { 30012, 0x0000858B }, /* GL_SOURCE3_ALPHA_NV */
+ { 30032, 0x00008590 }, /* GL_OPERAND0_RGB */
+ { 30048, 0x00008591 }, /* GL_OPERAND1_RGB */
+ { 30064, 0x00008592 }, /* GL_OPERAND2_RGB */
+ { 30080, 0x00008593 }, /* GL_OPERAND3_RGB_NV */
+ { 30099, 0x00008598 }, /* GL_OPERAND0_ALPHA */
+ { 30117, 0x00008599 }, /* GL_OPERAND1_ALPHA */
+ { 30135, 0x0000859A }, /* GL_OPERAND2_ALPHA */
+ { 30153, 0x0000859B }, /* GL_OPERAND3_ALPHA_NV */
+ { 30174, 0x000085A0 }, /* GL_PACK_SUBSAMPLE_RATE_SGIX */
+ { 30202, 0x000085A1 }, /* GL_UNPACK_SUBSAMPLE_RATE_SGIX */
+ { 30232, 0x000085A2 }, /* GL_PIXEL_SUBSAMPLE_4444_SGIX */
+ { 30261, 0x000085A3 }, /* GL_PIXEL_SUBSAMPLE_2424_SGIX */
+ { 30290, 0x000085A4 }, /* GL_PIXEL_SUBSAMPLE_4242_SGIX */
+ { 30319, 0x000085AE }, /* GL_PERTURB_EXT */
+ { 30334, 0x000085AF }, /* GL_TEXTURE_NORMAL_EXT */
+ { 30356, 0x000085B0 }, /* GL_LIGHT_MODEL_SPECULAR_VECTOR_APPLE */
+ { 30393, 0x000085B1 }, /* GL_TRANSFORM_HINT_APPLE */
+ { 30417, 0x000085B2 }, /* GL_UNPACK_CLIENT_STORAGE_APPLE */
+ { 30448, 0x000085B3 }, /* GL_BUFFER_OBJECT_APPLE */
+ { 30471, 0x000085B4 }, /* GL_STORAGE_CLIENT_APPLE */
+ { 30495, 0x000085B5 }, /* GL_VERTEX_ARRAY_BINDING */
+ { 30519, 0x000085B7 }, /* GL_TEXTURE_RANGE_LENGTH_APPLE */
+ { 30549, 0x000085B8 }, /* GL_TEXTURE_RANGE_POINTER_APPLE */
+ { 30580, 0x000085B9 }, /* GL_YCBCR_422_APPLE */
+ { 30599, 0x000085BA }, /* GL_UNSIGNED_SHORT_8_8_APPLE */
+ { 30627, 0x000085BB }, /* GL_UNSIGNED_SHORT_8_8_REV_APPLE */
+ { 30659, 0x000085BC }, /* GL_TEXTURE_STORAGE_HINT_APPLE */
+ { 30689, 0x000085BD }, /* GL_STORAGE_PRIVATE_APPLE */
+ { 30714, 0x000085BE }, /* GL_STORAGE_CACHED_APPLE */
+ { 30738, 0x000085BF }, /* GL_STORAGE_SHARED_APPLE */
+ { 30762, 0x000085C0 }, /* GL_REPLACEMENT_CODE_ARRAY_SUN */
+ { 30792, 0x000085C1 }, /* GL_REPLACEMENT_CODE_ARRAY_TYPE_SUN */
+ { 30827, 0x000085C2 }, /* GL_REPLACEMENT_CODE_ARRAY_STRIDE_SUN */
+ { 30864, 0x000085C3 }, /* GL_REPLACEMENT_CODE_ARRAY_POINTER_SUN */
+ { 30902, 0x000085C4 }, /* GL_R1UI_V3F_SUN */
+ { 30918, 0x000085C5 }, /* GL_R1UI_C4UB_V3F_SUN */
+ { 30939, 0x000085C6 }, /* GL_R1UI_C3F_V3F_SUN */
+ { 30959, 0x000085C7 }, /* GL_R1UI_N3F_V3F_SUN */
+ { 30979, 0x000085C8 }, /* GL_R1UI_C4F_N3F_V3F_SUN */
+ { 31003, 0x000085C9 }, /* GL_R1UI_T2F_V3F_SUN */
+ { 31023, 0x000085CA }, /* GL_R1UI_T2F_N3F_V3F_SUN */
+ { 31047, 0x000085CB }, /* GL_R1UI_T2F_C4F_N3F_V3F_SUN */
+ { 31075, 0x000085CC }, /* GL_SLICE_ACCUM_SUN */
+ { 31094, 0x00008614 }, /* GL_QUAD_MESH_SUN */
+ { 31111, 0x00008615 }, /* GL_TRIANGLE_MESH_SUN */
+ { 31132, 0x00008620 }, /* GL_VERTEX_PROGRAM_ARB */
+ { 31154, 0x00008621 }, /* GL_VERTEX_STATE_PROGRAM_NV */
+ { 31181, 0x00008622 }, /* GL_VERTEX_ATTRIB_ARRAY_ENABLED */
+ { 31212, 0x00008623 }, /* GL_VERTEX_ATTRIB_ARRAY_SIZE */
+ { 31240, 0x00008624 }, /* GL_VERTEX_ATTRIB_ARRAY_STRIDE */
+ { 31270, 0x00008625 }, /* GL_VERTEX_ATTRIB_ARRAY_TYPE */
+ { 31298, 0x00008626 }, /* GL_CURRENT_VERTEX_ATTRIB */
+ { 31323, 0x00008627 }, /* GL_PROGRAM_LENGTH_ARB */
+ { 31345, 0x00008628 }, /* GL_PROGRAM_STRING_ARB */
+ { 31367, 0x00008629 }, /* GL_MODELVIEW_PROJECTION_NV */
+ { 31394, 0x0000862A }, /* GL_IDENTITY_NV */
+ { 31409, 0x0000862B }, /* GL_INVERSE_NV */
+ { 31423, 0x0000862C }, /* GL_TRANSPOSE_NV */
+ { 31439, 0x0000862D }, /* GL_INVERSE_TRANSPOSE_NV */
+ { 31463, 0x0000862E }, /* GL_MAX_PROGRAM_MATRIX_STACK_DEPTH_ARB */
+ { 31501, 0x0000862F }, /* GL_MAX_PROGRAM_MATRICES_ARB */
+ { 31529, 0x00008630 }, /* GL_MATRIX0_NV */
+ { 31543, 0x00008631 }, /* GL_MATRIX1_NV */
+ { 31557, 0x00008632 }, /* GL_MATRIX2_NV */
+ { 31571, 0x00008633 }, /* GL_MATRIX3_NV */
+ { 31585, 0x00008634 }, /* GL_MATRIX4_NV */
+ { 31599, 0x00008635 }, /* GL_MATRIX5_NV */
+ { 31613, 0x00008636 }, /* GL_MATRIX6_NV */
+ { 31627, 0x00008637 }, /* GL_MATRIX7_NV */
+ { 31641, 0x00008640 }, /* GL_CURRENT_MATRIX_STACK_DEPTH_ARB */
+ { 31675, 0x00008641 }, /* GL_CURRENT_MATRIX_ARB */
+ { 31697, 0x00008642 }, /* GL_PROGRAM_POINT_SIZE */
+ { 31719, 0x00008643 }, /* GL_VERTEX_PROGRAM_TWO_SIDE */
+ { 31746, 0x00008644 }, /* GL_PROGRAM_PARAMETER_NV */
+ { 31770, 0x00008645 }, /* GL_VERTEX_ATTRIB_ARRAY_POINTER */
+ { 31801, 0x00008646 }, /* GL_PROGRAM_TARGET_NV */
+ { 31822, 0x00008647 }, /* GL_PROGRAM_RESIDENT_NV */
+ { 31845, 0x00008648 }, /* GL_TRACK_MATRIX_NV */
+ { 31864, 0x00008649 }, /* GL_TRACK_MATRIX_TRANSFORM_NV */
+ { 31893, 0x0000864A }, /* GL_VERTEX_PROGRAM_BINDING_NV */
+ { 31922, 0x0000864B }, /* GL_PROGRAM_ERROR_POSITION_ARB */
+ { 31952, 0x0000864C }, /* GL_OFFSET_TEXTURE_RECTANGLE_NV */
+ { 31983, 0x0000864D }, /* GL_OFFSET_TEXTURE_RECTANGLE_SCALE_NV */
+ { 32020, 0x0000864E }, /* GL_DOT_PRODUCT_TEXTURE_RECTANGLE_NV */
+ { 32056, 0x0000864F }, /* GL_DEPTH_CLAMP */
+ { 32071, 0x00008650 }, /* GL_VERTEX_ATTRIB_ARRAY0_NV */
+ { 32098, 0x00008651 }, /* GL_VERTEX_ATTRIB_ARRAY1_NV */
+ { 32125, 0x00008652 }, /* GL_VERTEX_ATTRIB_ARRAY2_NV */
+ { 32152, 0x00008653 }, /* GL_VERTEX_ATTRIB_ARRAY3_NV */
+ { 32179, 0x00008654 }, /* GL_VERTEX_ATTRIB_ARRAY4_NV */
+ { 32206, 0x00008655 }, /* GL_VERTEX_ATTRIB_ARRAY5_NV */
+ { 32233, 0x00008656 }, /* GL_VERTEX_ATTRIB_ARRAY6_NV */
+ { 32260, 0x00008657 }, /* GL_VERTEX_ATTRIB_ARRAY7_NV */
+ { 32287, 0x00008658 }, /* GL_VERTEX_ATTRIB_ARRAY8_NV */
+ { 32314, 0x00008659 }, /* GL_VERTEX_ATTRIB_ARRAY9_NV */
+ { 32341, 0x0000865A }, /* GL_VERTEX_ATTRIB_ARRAY10_NV */
+ { 32369, 0x0000865B }, /* GL_VERTEX_ATTRIB_ARRAY11_NV */
+ { 32397, 0x0000865C }, /* GL_VERTEX_ATTRIB_ARRAY12_NV */
+ { 32425, 0x0000865D }, /* GL_VERTEX_ATTRIB_ARRAY13_NV */
+ { 32453, 0x0000865E }, /* GL_VERTEX_ATTRIB_ARRAY14_NV */
+ { 32481, 0x0000865F }, /* GL_VERTEX_ATTRIB_ARRAY15_NV */
+ { 32509, 0x00008660 }, /* GL_MAP1_VERTEX_ATTRIB0_4_NV */
+ { 32537, 0x00008661 }, /* GL_MAP1_VERTEX_ATTRIB1_4_NV */
+ { 32565, 0x00008662 }, /* GL_MAP1_VERTEX_ATTRIB2_4_NV */
+ { 32593, 0x00008663 }, /* GL_MAP1_VERTEX_ATTRIB3_4_NV */
+ { 32621, 0x00008664 }, /* GL_MAP1_VERTEX_ATTRIB4_4_NV */
+ { 32649, 0x00008665 }, /* GL_MAP1_VERTEX_ATTRIB5_4_NV */
+ { 32677, 0x00008666 }, /* GL_MAP1_VERTEX_ATTRIB6_4_NV */
+ { 32705, 0x00008667 }, /* GL_MAP1_VERTEX_ATTRIB7_4_NV */
+ { 32733, 0x00008668 }, /* GL_MAP1_VERTEX_ATTRIB8_4_NV */
+ { 32761, 0x00008669 }, /* GL_MAP1_VERTEX_ATTRIB9_4_NV */
+ { 32789, 0x0000866A }, /* GL_MAP1_VERTEX_ATTRIB10_4_NV */
+ { 32818, 0x0000866B }, /* GL_MAP1_VERTEX_ATTRIB11_4_NV */
+ { 32847, 0x0000866C }, /* GL_MAP1_VERTEX_ATTRIB12_4_NV */
+ { 32876, 0x0000866D }, /* GL_MAP1_VERTEX_ATTRIB13_4_NV */
+ { 32905, 0x0000866E }, /* GL_MAP1_VERTEX_ATTRIB14_4_NV */
+ { 32934, 0x0000866F }, /* GL_MAP1_VERTEX_ATTRIB15_4_NV */
+ { 32963, 0x00008670 }, /* GL_MAP2_VERTEX_ATTRIB0_4_NV */
+ { 32991, 0x00008671 }, /* GL_MAP2_VERTEX_ATTRIB1_4_NV */
+ { 33019, 0x00008672 }, /* GL_MAP2_VERTEX_ATTRIB2_4_NV */
+ { 33047, 0x00008673 }, /* GL_MAP2_VERTEX_ATTRIB3_4_NV */
+ { 33075, 0x00008674 }, /* GL_MAP2_VERTEX_ATTRIB4_4_NV */
+ { 33103, 0x00008675 }, /* GL_MAP2_VERTEX_ATTRIB5_4_NV */
+ { 33131, 0x00008676 }, /* GL_MAP2_VERTEX_ATTRIB6_4_NV */
+ { 33159, 0x00008677 }, /* GL_PROGRAM_BINDING_ARB */
+ { 33182, 0x00008678 }, /* GL_MAP2_VERTEX_ATTRIB8_4_NV */
+ { 33210, 0x00008679 }, /* GL_MAP2_VERTEX_ATTRIB9_4_NV */
+ { 33238, 0x0000867A }, /* GL_MAP2_VERTEX_ATTRIB10_4_NV */
+ { 33267, 0x0000867B }, /* GL_MAP2_VERTEX_ATTRIB11_4_NV */
+ { 33296, 0x0000867C }, /* GL_MAP2_VERTEX_ATTRIB12_4_NV */
+ { 33325, 0x0000867D }, /* GL_MAP2_VERTEX_ATTRIB13_4_NV */
+ { 33354, 0x0000867E }, /* GL_MAP2_VERTEX_ATTRIB14_4_NV */
+ { 33383, 0x0000867F }, /* GL_MAP2_VERTEX_ATTRIB15_4_NV */
+ { 33412, 0x000086A0 }, /* GL_TEXTURE_COMPRESSED_IMAGE_SIZE */
+ { 33445, 0x000086A1 }, /* GL_TEXTURE_COMPRESSED */
+ { 33467, 0x000086A2 }, /* GL_NUM_COMPRESSED_TEXTURE_FORMATS */
+ { 33501, 0x000086A3 }, /* GL_COMPRESSED_TEXTURE_FORMATS */
+ { 33531, 0x000086A4 }, /* GL_MAX_VERTEX_UNITS_ARB */
+ { 33555, 0x000086A5 }, /* GL_ACTIVE_VERTEX_UNITS_ARB */
+ { 33582, 0x000086A6 }, /* GL_WEIGHT_SUM_UNITY_ARB */
+ { 33606, 0x000086A7 }, /* GL_VERTEX_BLEND_ARB */
+ { 33626, 0x000086A8 }, /* GL_CURRENT_WEIGHT_ARB */
+ { 33648, 0x000086A9 }, /* GL_WEIGHT_ARRAY_TYPE_ARB */
+ { 33673, 0x000086AA }, /* GL_WEIGHT_ARRAY_STRIDE_ARB */
+ { 33700, 0x000086AB }, /* GL_WEIGHT_ARRAY_SIZE_ARB */
+ { 33725, 0x000086AC }, /* GL_WEIGHT_ARRAY_POINTER_ARB */
+ { 33753, 0x000086AD }, /* GL_WEIGHT_ARRAY_ARB */
+ { 33773, 0x000086AE }, /* GL_DOT3_RGB */
+ { 33785, 0x000086AF }, /* GL_DOT3_RGBA */
+ { 33798, 0x000086B0 }, /* GL_COMPRESSED_RGB_FXT1_3DFX */
+ { 33826, 0x000086B1 }, /* GL_COMPRESSED_RGBA_FXT1_3DFX */
+ { 33855, 0x000086B2 }, /* GL_MULTISAMPLE_3DFX */
+ { 33875, 0x000086B3 }, /* GL_SAMPLE_BUFFERS_3DFX */
+ { 33898, 0x000086B4 }, /* GL_SAMPLES_3DFX */
+ { 33914, 0x000086C0 }, /* GL_EVAL_2D_NV */
+ { 33928, 0x000086C1 }, /* GL_EVAL_TRIANGULAR_2D_NV */
+ { 33953, 0x000086C2 }, /* GL_MAP_TESSELLATION_NV */
+ { 33976, 0x000086C3 }, /* GL_MAP_ATTRIB_U_ORDER_NV */
+ { 34001, 0x000086C4 }, /* GL_MAP_ATTRIB_V_ORDER_NV */
+ { 34026, 0x000086C5 }, /* GL_EVAL_FRACTIONAL_TESSELLATION_NV */
+ { 34061, 0x000086C6 }, /* GL_EVAL_VERTEX_ATTRIB0_NV */
+ { 34087, 0x000086C7 }, /* GL_EVAL_VERTEX_ATTRIB1_NV */
+ { 34113, 0x000086C8 }, /* GL_EVAL_VERTEX_ATTRIB2_NV */
+ { 34139, 0x000086C9 }, /* GL_EVAL_VERTEX_ATTRIB3_NV */
+ { 34165, 0x000086CA }, /* GL_EVAL_VERTEX_ATTRIB4_NV */
+ { 34191, 0x000086CB }, /* GL_EVAL_VERTEX_ATTRIB5_NV */
+ { 34217, 0x000086CC }, /* GL_EVAL_VERTEX_ATTRIB6_NV */
+ { 34243, 0x000086CD }, /* GL_EVAL_VERTEX_ATTRIB7_NV */
+ { 34269, 0x000086CE }, /* GL_EVAL_VERTEX_ATTRIB8_NV */
+ { 34295, 0x000086CF }, /* GL_EVAL_VERTEX_ATTRIB9_NV */
+ { 34321, 0x000086D0 }, /* GL_EVAL_VERTEX_ATTRIB10_NV */
+ { 34348, 0x000086D1 }, /* GL_EVAL_VERTEX_ATTRIB11_NV */
+ { 34375, 0x000086D2 }, /* GL_EVAL_VERTEX_ATTRIB12_NV */
+ { 34402, 0x000086D3 }, /* GL_EVAL_VERTEX_ATTRIB13_NV */
+ { 34429, 0x000086D4 }, /* GL_EVAL_VERTEX_ATTRIB14_NV */
+ { 34456, 0x000086D5 }, /* GL_EVAL_VERTEX_ATTRIB15_NV */
+ { 34483, 0x000086D6 }, /* GL_MAX_MAP_TESSELLATION_NV */
+ { 34510, 0x000086D7 }, /* GL_MAX_RATIONAL_EVAL_ORDER_NV */
+ { 34540, 0x000086D8 }, /* GL_MAX_PROGRAM_PATCH_ATTRIBS_NV */
+ { 34572, 0x000086D9 }, /* GL_RGBA_UNSIGNED_DOT_PRODUCT_MAPPING_NV */
+ { 34612, 0x000086DA }, /* GL_UNSIGNED_INT_S8_S8_8_8_NV */
+ { 34641, 0x000086DB }, /* GL_UNSIGNED_INT_8_8_S8_S8_REV_NV */
+ { 34674, 0x000086DC }, /* GL_DSDT_MAG_INTENSITY_NV */
+ { 34699, 0x000086DD }, /* GL_SHADER_CONSISTENT_NV */
+ { 34723, 0x000086DE }, /* GL_TEXTURE_SHADER_NV */
+ { 34744, 0x000086DF }, /* GL_SHADER_OPERATION_NV */
+ { 34767, 0x000086E0 }, /* GL_CULL_MODES_NV */
+ { 34784, 0x000086E1 }, /* GL_OFFSET_TEXTURE_MATRIX_NV */
+ { 34812, 0x000086E2 }, /* GL_OFFSET_TEXTURE_SCALE_NV */
+ { 34839, 0x000086E3 }, /* GL_OFFSET_TEXTURE_BIAS_NV */
+ { 34865, 0x000086E4 }, /* GL_PREVIOUS_TEXTURE_INPUT_NV */
+ { 34894, 0x000086E5 }, /* GL_CONST_EYE_NV */
+ { 34910, 0x000086E6 }, /* GL_PASS_THROUGH_NV */
+ { 34929, 0x000086E7 }, /* GL_CULL_FRAGMENT_NV */
+ { 34949, 0x000086E8 }, /* GL_OFFSET_TEXTURE_2D_NV */
+ { 34973, 0x000086E9 }, /* GL_DEPENDENT_AR_TEXTURE_2D_NV */
+ { 35003, 0x000086EA }, /* GL_DEPENDENT_GB_TEXTURE_2D_NV */
+ { 35033, 0x000086EB }, /* GL_SURFACE_STATE_NV */
+ { 35053, 0x000086EC }, /* GL_DOT_PRODUCT_NV */
+ { 35071, 0x000086ED }, /* GL_DOT_PRODUCT_DEPTH_REPLACE_NV */
+ { 35103, 0x000086EE }, /* GL_DOT_PRODUCT_TEXTURE_2D_NV */
+ { 35132, 0x000086EF }, /* GL_DOT_PRODUCT_TEXTURE_3D_NV */
+ { 35161, 0x000086F0 }, /* GL_DOT_PRODUCT_TEXTURE_CUBE_MAP_NV */
+ { 35196, 0x000086F1 }, /* GL_DOT_PRODUCT_DIFFUSE_CUBE_MAP_NV */
+ { 35231, 0x000086F2 }, /* GL_DOT_PRODUCT_REFLECT_CUBE_MAP_NV */
+ { 35266, 0x000086F3 }, /* GL_DOT_PRODUCT_CONST_EYE_REFLECT_CUBE_MAP_NV */
+ { 35311, 0x000086F4 }, /* GL_HILO_NV */
+ { 35322, 0x000086F5 }, /* GL_DSDT_NV */
+ { 35333, 0x000086F6 }, /* GL_DSDT_MAG_NV */
+ { 35348, 0x000086F7 }, /* GL_DSDT_MAG_VIB_NV */
+ { 35367, 0x000086F8 }, /* GL_HILO16_NV */
+ { 35380, 0x000086F9 }, /* GL_SIGNED_HILO_NV */
+ { 35398, 0x000086FA }, /* GL_SIGNED_HILO16_NV */
+ { 35418, 0x000086FB }, /* GL_SIGNED_RGBA_NV */
+ { 35436, 0x000086FC }, /* GL_SIGNED_RGBA8_NV */
+ { 35455, 0x000086FD }, /* GL_SURFACE_REGISTERED_NV */
+ { 35480, 0x000086FE }, /* GL_SIGNED_RGB_NV */
+ { 35497, 0x000086FF }, /* GL_SIGNED_RGB8_NV */
+ { 35515, 0x00008700 }, /* GL_SURFACE_MAPPED_NV */
+ { 35536, 0x00008701 }, /* GL_SIGNED_LUMINANCE_NV */
+ { 35559, 0x00008702 }, /* GL_SIGNED_LUMINANCE8_NV */
+ { 35583, 0x00008703 }, /* GL_SIGNED_LUMINANCE_ALPHA_NV */
+ { 35612, 0x00008704 }, /* GL_SIGNED_LUMINANCE8_ALPHA8_NV */
+ { 35643, 0x00008705 }, /* GL_SIGNED_ALPHA_NV */
+ { 35662, 0x00008706 }, /* GL_SIGNED_ALPHA8_NV */
+ { 35682, 0x00008707 }, /* GL_SIGNED_INTENSITY_NV */
+ { 35705, 0x00008708 }, /* GL_SIGNED_INTENSITY8_NV */
+ { 35729, 0x00008709 }, /* GL_DSDT8_NV */
+ { 35741, 0x0000870A }, /* GL_DSDT8_MAG8_NV */
+ { 35758, 0x0000870B }, /* GL_DSDT8_MAG8_INTENSITY8_NV */
+ { 35786, 0x0000870C }, /* GL_SIGNED_RGB_UNSIGNED_ALPHA_NV */
+ { 35818, 0x0000870D }, /* GL_SIGNED_RGB8_UNSIGNED_ALPHA8_NV */
+ { 35852, 0x0000870E }, /* GL_HI_SCALE_NV */
+ { 35867, 0x0000870F }, /* GL_LO_SCALE_NV */
+ { 35882, 0x00008710 }, /* GL_DS_SCALE_NV */
+ { 35897, 0x00008711 }, /* GL_DT_SCALE_NV */
+ { 35912, 0x00008712 }, /* GL_MAGNITUDE_SCALE_NV */
+ { 35934, 0x00008713 }, /* GL_VIBRANCE_SCALE_NV */
+ { 35955, 0x00008714 }, /* GL_HI_BIAS_NV */
+ { 35969, 0x00008715 }, /* GL_LO_BIAS_NV */
+ { 35983, 0x00008716 }, /* GL_DS_BIAS_NV */
+ { 35997, 0x00008717 }, /* GL_DT_BIAS_NV */
+ { 36011, 0x00008718 }, /* GL_MAGNITUDE_BIAS_NV */
+ { 36032, 0x00008719 }, /* GL_VIBRANCE_BIAS_NV */
+ { 36052, 0x0000871A }, /* GL_TEXTURE_BORDER_VALUES_NV */
+ { 36080, 0x0000871B }, /* GL_TEXTURE_HI_SIZE_NV */
+ { 36102, 0x0000871C }, /* GL_TEXTURE_LO_SIZE_NV */
+ { 36124, 0x0000871D }, /* GL_TEXTURE_DS_SIZE_NV */
+ { 36146, 0x0000871E }, /* GL_TEXTURE_DT_SIZE_NV */
+ { 36168, 0x0000871F }, /* GL_TEXTURE_MAG_SIZE_NV */
+ { 36191, 0x00008722 }, /* GL_MODELVIEW2_ARB */
+ { 36209, 0x00008723 }, /* GL_MODELVIEW3_ARB */
+ { 36227, 0x00008724 }, /* GL_MODELVIEW4_ARB */
+ { 36245, 0x00008725 }, /* GL_MODELVIEW5_ARB */
+ { 36263, 0x00008726 }, /* GL_MODELVIEW6_ARB */
+ { 36281, 0x00008727 }, /* GL_MODELVIEW7_ARB */
+ { 36299, 0x00008728 }, /* GL_MODELVIEW8_ARB */
+ { 36317, 0x00008729 }, /* GL_MODELVIEW9_ARB */
+ { 36335, 0x0000872A }, /* GL_MODELVIEW10_ARB */
+ { 36354, 0x0000872B }, /* GL_MODELVIEW11_ARB */
+ { 36373, 0x0000872C }, /* GL_MODELVIEW12_ARB */
+ { 36392, 0x0000872D }, /* GL_MODELVIEW13_ARB */
+ { 36411, 0x0000872E }, /* GL_MODELVIEW14_ARB */
+ { 36430, 0x0000872F }, /* GL_MODELVIEW15_ARB */
+ { 36449, 0x00008730 }, /* GL_MODELVIEW16_ARB */
+ { 36468, 0x00008731 }, /* GL_MODELVIEW17_ARB */
+ { 36487, 0x00008732 }, /* GL_MODELVIEW18_ARB */
+ { 36506, 0x00008733 }, /* GL_MODELVIEW19_ARB */
+ { 36525, 0x00008734 }, /* GL_MODELVIEW20_ARB */
+ { 36544, 0x00008735 }, /* GL_MODELVIEW21_ARB */
+ { 36563, 0x00008736 }, /* GL_MODELVIEW22_ARB */
+ { 36582, 0x00008737 }, /* GL_MODELVIEW23_ARB */
+ { 36601, 0x00008738 }, /* GL_MODELVIEW24_ARB */
+ { 36620, 0x00008739 }, /* GL_MODELVIEW25_ARB */
+ { 36639, 0x0000873A }, /* GL_MODELVIEW26_ARB */
+ { 36658, 0x0000873B }, /* GL_MODELVIEW27_ARB */
+ { 36677, 0x0000873C }, /* GL_MODELVIEW28_ARB */
+ { 36696, 0x0000873D }, /* GL_MODELVIEW29_ARB */
+ { 36715, 0x0000873E }, /* GL_MODELVIEW30_ARB */
+ { 36734, 0x0000873F }, /* GL_MODELVIEW31_ARB */
+ { 36753, 0x00008740 }, /* GL_DOT3_RGB_EXT */
+ { 36769, 0x00008741 }, /* GL_PROGRAM_BINARY_LENGTH */
+ { 36794, 0x00008742 }, /* GL_MIRROR_CLAMP_EXT */
+ { 36814, 0x00008743 }, /* GL_MIRROR_CLAMP_TO_EDGE */
+ { 36838, 0x00008744 }, /* GL_MODULATE_ADD_ATI */
+ { 36858, 0x00008745 }, /* GL_MODULATE_SIGNED_ADD_ATI */
+ { 36885, 0x00008746 }, /* GL_MODULATE_SUBTRACT_ATI */
+ { 36910, 0x0000874A }, /* GL_SET_AMD */
+ { 36921, 0x0000874B }, /* GL_REPLACE_VALUE_AMD */
+ { 36942, 0x0000874C }, /* GL_STENCIL_OP_VALUE_AMD */
+ { 36966, 0x0000874D }, /* GL_STENCIL_BACK_OP_VALUE_AMD */
+ { 36995, 0x0000874E }, /* GL_VERTEX_ATTRIB_ARRAY_LONG */
+ { 37023, 0x0000874F }, /* GL_OCCLUSION_QUERY_EVENT_MASK_AMD */
+ { 37057, 0x00008757 }, /* GL_YCBCR_MESA */
+ { 37071, 0x00008758 }, /* GL_PACK_INVERT_MESA */
+ { 37091, 0x00008759 }, /* GL_TEXTURE_1D_STACK_MESAX */
+ { 37117, 0x0000875A }, /* GL_TEXTURE_2D_STACK_MESAX */
+ { 37143, 0x0000875B }, /* GL_PROXY_TEXTURE_1D_STACK_MESAX */
+ { 37175, 0x0000875C }, /* GL_PROXY_TEXTURE_2D_STACK_MESAX */
+ { 37207, 0x0000875D }, /* GL_TEXTURE_1D_STACK_BINDING_MESAX */
+ { 37241, 0x0000875E }, /* GL_TEXTURE_2D_STACK_BINDING_MESAX */
+ { 37275, 0x0000875F }, /* GL_PROGRAM_BINARY_FORMAT_MESA */
+ { 37305, 0x00008760 }, /* GL_STATIC_ATI */
+ { 37319, 0x00008761 }, /* GL_DYNAMIC_ATI */
+ { 37334, 0x00008762 }, /* GL_PRESERVE_ATI */
+ { 37350, 0x00008763 }, /* GL_DISCARD_ATI */
+ { 37365, 0x00008764 }, /* GL_BUFFER_SIZE */
+ { 37380, 0x00008765 }, /* GL_BUFFER_USAGE */
+ { 37396, 0x00008766 }, /* GL_ARRAY_OBJECT_BUFFER_ATI */
+ { 37423, 0x00008767 }, /* GL_ARRAY_OBJECT_OFFSET_ATI */
+ { 37450, 0x00008768 }, /* GL_ELEMENT_ARRAY_ATI */
+ { 37471, 0x00008769 }, /* GL_ELEMENT_ARRAY_TYPE_ATI */
+ { 37497, 0x0000876A }, /* GL_ELEMENT_ARRAY_POINTER_ATI */
+ { 37526, 0x0000876B }, /* GL_MAX_VERTEX_STREAMS_ATI */
+ { 37552, 0x0000876C }, /* GL_VERTEX_STREAM0_ATI */
+ { 37574, 0x0000876D }, /* GL_VERTEX_STREAM1_ATI */
+ { 37596, 0x0000876E }, /* GL_VERTEX_STREAM2_ATI */
+ { 37618, 0x0000876F }, /* GL_VERTEX_STREAM3_ATI */
+ { 37640, 0x00008770 }, /* GL_VERTEX_STREAM4_ATI */
+ { 37662, 0x00008771 }, /* GL_VERTEX_STREAM5_ATI */
+ { 37684, 0x00008772 }, /* GL_VERTEX_STREAM6_ATI */
+ { 37706, 0x00008773 }, /* GL_VERTEX_STREAM7_ATI */
+ { 37728, 0x00008774 }, /* GL_VERTEX_SOURCE_ATI */
+ { 37749, 0x00008775 }, /* GL_BUMP_ROT_MATRIX_ATI */
+ { 37772, 0x00008776 }, /* GL_BUMP_ROT_MATRIX_SIZE_ATI */
+ { 37800, 0x00008777 }, /* GL_BUMP_NUM_TEX_UNITS_ATI */
+ { 37826, 0x00008778 }, /* GL_BUMP_TEX_UNITS_ATI */
+ { 37848, 0x00008779 }, /* GL_DUDV_ATI */
+ { 37860, 0x0000877A }, /* GL_DU8DV8_ATI */
+ { 37874, 0x0000877B }, /* GL_BUMP_ENVMAP_ATI */
+ { 37893, 0x0000877C }, /* GL_BUMP_TARGET_ATI */
+ { 37912, 0x00008780 }, /* GL_VERTEX_SHADER_EXT */
+ { 37933, 0x00008781 }, /* GL_VERTEX_SHADER_BINDING_EXT */
+ { 37962, 0x00008782 }, /* GL_OP_INDEX_EXT */
+ { 37978, 0x00008783 }, /* GL_OP_NEGATE_EXT */
+ { 37995, 0x00008784 }, /* GL_OP_DOT3_EXT */
+ { 38010, 0x00008785 }, /* GL_OP_DOT4_EXT */
+ { 38025, 0x00008786 }, /* GL_OP_MUL_EXT */
+ { 38039, 0x00008787 }, /* GL_OP_ADD_EXT */
+ { 38053, 0x00008788 }, /* GL_OP_MADD_EXT */
+ { 38068, 0x00008789 }, /* GL_OP_FRAC_EXT */
+ { 38083, 0x0000878A }, /* GL_OP_MAX_EXT */
+ { 38097, 0x0000878B }, /* GL_OP_MIN_EXT */
+ { 38111, 0x0000878C }, /* GL_OP_SET_GE_EXT */
+ { 38128, 0x0000878D }, /* GL_OP_SET_LT_EXT */
+ { 38145, 0x0000878E }, /* GL_OP_CLAMP_EXT */
+ { 38161, 0x0000878F }, /* GL_OP_FLOOR_EXT */
+ { 38177, 0x00008790 }, /* GL_OP_ROUND_EXT */
+ { 38193, 0x00008791 }, /* GL_OP_EXP_BASE_2_EXT */
+ { 38214, 0x00008792 }, /* GL_OP_LOG_BASE_2_EXT */
+ { 38235, 0x00008793 }, /* GL_OP_POWER_EXT */
+ { 38251, 0x00008794 }, /* GL_OP_RECIP_EXT */
+ { 38267, 0x00008795 }, /* GL_OP_RECIP_SQRT_EXT */
+ { 38288, 0x00008796 }, /* GL_OP_SUB_EXT */
+ { 38302, 0x00008797 }, /* GL_OP_CROSS_PRODUCT_EXT */
+ { 38326, 0x00008798 }, /* GL_OP_MULTIPLY_MATRIX_EXT */
+ { 38352, 0x00008799 }, /* GL_OP_MOV_EXT */
+ { 38366, 0x0000879A }, /* GL_OUTPUT_VERTEX_EXT */
+ { 38387, 0x0000879B }, /* GL_OUTPUT_COLOR0_EXT */
+ { 38408, 0x0000879C }, /* GL_OUTPUT_COLOR1_EXT */
+ { 38429, 0x0000879D }, /* GL_OUTPUT_TEXTURE_COORD0_EXT */
+ { 38458, 0x0000879E }, /* GL_OUTPUT_TEXTURE_COORD1_EXT */
+ { 38487, 0x0000879F }, /* GL_OUTPUT_TEXTURE_COORD2_EXT */
+ { 38516, 0x000087A0 }, /* GL_OUTPUT_TEXTURE_COORD3_EXT */
+ { 38545, 0x000087A1 }, /* GL_OUTPUT_TEXTURE_COORD4_EXT */
+ { 38574, 0x000087A2 }, /* GL_OUTPUT_TEXTURE_COORD5_EXT */
+ { 38603, 0x000087A3 }, /* GL_OUTPUT_TEXTURE_COORD6_EXT */
+ { 38632, 0x000087A4 }, /* GL_OUTPUT_TEXTURE_COORD7_EXT */
+ { 38661, 0x000087A5 }, /* GL_OUTPUT_TEXTURE_COORD8_EXT */
+ { 38690, 0x000087A6 }, /* GL_OUTPUT_TEXTURE_COORD9_EXT */
+ { 38719, 0x000087A7 }, /* GL_OUTPUT_TEXTURE_COORD10_EXT */
+ { 38749, 0x000087A8 }, /* GL_OUTPUT_TEXTURE_COORD11_EXT */
+ { 38779, 0x000087A9 }, /* GL_OUTPUT_TEXTURE_COORD12_EXT */
+ { 38809, 0x000087AA }, /* GL_OUTPUT_TEXTURE_COORD13_EXT */
+ { 38839, 0x000087AB }, /* GL_OUTPUT_TEXTURE_COORD14_EXT */
+ { 38869, 0x000087AC }, /* GL_OUTPUT_TEXTURE_COORD15_EXT */
+ { 38899, 0x000087AD }, /* GL_OUTPUT_TEXTURE_COORD16_EXT */
+ { 38929, 0x000087AE }, /* GL_OUTPUT_TEXTURE_COORD17_EXT */
+ { 38959, 0x000087AF }, /* GL_OUTPUT_TEXTURE_COORD18_EXT */
+ { 38989, 0x000087B0 }, /* GL_OUTPUT_TEXTURE_COORD19_EXT */
+ { 39019, 0x000087B1 }, /* GL_OUTPUT_TEXTURE_COORD20_EXT */
+ { 39049, 0x000087B2 }, /* GL_OUTPUT_TEXTURE_COORD21_EXT */
+ { 39079, 0x000087B3 }, /* GL_OUTPUT_TEXTURE_COORD22_EXT */
+ { 39109, 0x000087B4 }, /* GL_OUTPUT_TEXTURE_COORD23_EXT */
+ { 39139, 0x000087B5 }, /* GL_OUTPUT_TEXTURE_COORD24_EXT */
+ { 39169, 0x000087B6 }, /* GL_OUTPUT_TEXTURE_COORD25_EXT */
+ { 39199, 0x000087B7 }, /* GL_OUTPUT_TEXTURE_COORD26_EXT */
+ { 39229, 0x000087B8 }, /* GL_OUTPUT_TEXTURE_COORD27_EXT */
+ { 39259, 0x000087B9 }, /* GL_OUTPUT_TEXTURE_COORD28_EXT */
+ { 39289, 0x000087BA }, /* GL_OUTPUT_TEXTURE_COORD29_EXT */
+ { 39319, 0x000087BB }, /* GL_OUTPUT_TEXTURE_COORD30_EXT */
+ { 39349, 0x000087BC }, /* GL_OUTPUT_TEXTURE_COORD31_EXT */
+ { 39379, 0x000087BD }, /* GL_OUTPUT_FOG_EXT */
+ { 39397, 0x000087BE }, /* GL_SCALAR_EXT */
+ { 39411, 0x000087BF }, /* GL_VECTOR_EXT */
+ { 39425, 0x000087C0 }, /* GL_MATRIX_EXT */
+ { 39439, 0x000087C1 }, /* GL_VARIANT_EXT */
+ { 39454, 0x000087C2 }, /* GL_INVARIANT_EXT */
+ { 39471, 0x000087C3 }, /* GL_LOCAL_CONSTANT_EXT */
+ { 39493, 0x000087C4 }, /* GL_LOCAL_EXT */
+ { 39506, 0x000087C5 }, /* GL_MAX_VERTEX_SHADER_INSTRUCTIONS_EXT */
+ { 39544, 0x000087C6 }, /* GL_MAX_VERTEX_SHADER_VARIANTS_EXT */
+ { 39578, 0x000087C7 }, /* GL_MAX_VERTEX_SHADER_INVARIANTS_EXT */
+ { 39614, 0x000087C8 }, /* GL_MAX_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */
+ { 39655, 0x000087C9 }, /* GL_MAX_VERTEX_SHADER_LOCALS_EXT */
+ { 39687, 0x000087CA }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INSTRUCTIONS_EXT */
+ { 39735, 0x000087CB }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_VARIANTS_EXT */
+ { 39779, 0x000087CC }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */
+ { 39830, 0x000087CD }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_INVARIANTS_EXT */
+ { 39876, 0x000087CE }, /* GL_MAX_OPTIMIZED_VERTEX_SHADER_LOCALS_EXT */
+ { 39918, 0x000087CF }, /* GL_VERTEX_SHADER_INSTRUCTIONS_EXT */
+ { 39952, 0x000087D0 }, /* GL_VERTEX_SHADER_VARIANTS_EXT */
+ { 39982, 0x000087D1 }, /* GL_VERTEX_SHADER_INVARIANTS_EXT */
+ { 40014, 0x000087D2 }, /* GL_VERTEX_SHADER_LOCAL_CONSTANTS_EXT */
+ { 40051, 0x000087D3 }, /* GL_VERTEX_SHADER_LOCALS_EXT */
+ { 40079, 0x000087D4 }, /* GL_VERTEX_SHADER_OPTIMIZED_EXT */
+ { 40110, 0x000087D5 }, /* GL_X_EXT */
+ { 40119, 0x000087D6 }, /* GL_Y_EXT */
+ { 40128, 0x000087D7 }, /* GL_Z_EXT */
+ { 40137, 0x000087D8 }, /* GL_W_EXT */
+ { 40146, 0x000087D9 }, /* GL_NEGATIVE_X_EXT */
+ { 40164, 0x000087DA }, /* GL_NEGATIVE_Y_EXT */
+ { 40182, 0x000087DB }, /* GL_NEGATIVE_Z_EXT */
+ { 40200, 0x000087DC }, /* GL_NEGATIVE_W_EXT */
+ { 40218, 0x000087DD }, /* GL_ZERO_EXT */
+ { 40230, 0x000087DE }, /* GL_ONE_EXT */
+ { 40241, 0x000087DF }, /* GL_NEGATIVE_ONE_EXT */
+ { 40261, 0x000087E0 }, /* GL_NORMALIZED_RANGE_EXT */
+ { 40285, 0x000087E1 }, /* GL_FULL_RANGE_EXT */
+ { 40303, 0x000087E2 }, /* GL_CURRENT_VERTEX_EXT */
+ { 40325, 0x000087E3 }, /* GL_MVP_MATRIX_EXT */
+ { 40343, 0x000087E4 }, /* GL_VARIANT_VALUE_EXT */
+ { 40364, 0x000087E5 }, /* GL_VARIANT_DATATYPE_EXT */
+ { 40388, 0x000087E6 }, /* GL_VARIANT_ARRAY_STRIDE_EXT */
+ { 40416, 0x000087E7 }, /* GL_VARIANT_ARRAY_TYPE_EXT */
+ { 40442, 0x000087E8 }, /* GL_VARIANT_ARRAY_EXT */
+ { 40463, 0x000087E9 }, /* GL_VARIANT_ARRAY_POINTER_EXT */
+ { 40492, 0x000087EA }, /* GL_INVARIANT_VALUE_EXT */
+ { 40515, 0x000087EB }, /* GL_INVARIANT_DATATYPE_EXT */
+ { 40541, 0x000087EC }, /* GL_LOCAL_CONSTANT_VALUE_EXT */
+ { 40569, 0x000087ED }, /* GL_LOCAL_CONSTANT_DATATYPE_EXT */
+ { 40600, 0x000087EE }, /* GL_ATC_RGBA_INTERPOLATED_ALPHA_AMD */
+ { 40635, 0x000087F0 }, /* GL_PN_TRIANGLES_ATI */
+ { 40655, 0x000087F1 }, /* GL_MAX_PN_TRIANGLES_TESSELATION_LEVEL_ATI */
+ { 40697, 0x000087F2 }, /* GL_PN_TRIANGLES_POINT_MODE_ATI */
+ { 40728, 0x000087F3 }, /* GL_PN_TRIANGLES_NORMAL_MODE_ATI */
+ { 40760, 0x000087F4 }, /* GL_PN_TRIANGLES_TESSELATION_LEVEL_ATI */
+ { 40798, 0x000087F5 }, /* GL_PN_TRIANGLES_POINT_MODE_LINEAR_ATI */
+ { 40836, 0x000087F6 }, /* GL_PN_TRIANGLES_POINT_MODE_CUBIC_ATI */
+ { 40873, 0x000087F7 }, /* GL_PN_TRIANGLES_NORMAL_MODE_LINEAR_ATI */
+ { 40912, 0x000087F8 }, /* GL_PN_TRIANGLES_NORMAL_MODE_QUADRATIC_ATI */
+ { 40954, 0x000087F9 }, /* GL_3DC_X_AMD */
+ { 40967, 0x000087FA }, /* GL_3DC_XY_AMD */
+ { 40981, 0x000087FB }, /* GL_VBO_FREE_MEMORY_ATI */
+ { 41004, 0x000087FC }, /* GL_TEXTURE_FREE_MEMORY_ATI */
+ { 41031, 0x000087FD }, /* GL_RENDERBUFFER_FREE_MEMORY_ATI */
+ { 41063, 0x000087FE }, /* GL_NUM_PROGRAM_BINARY_FORMATS */
+ { 41093, 0x000087FF }, /* GL_PROGRAM_BINARY_FORMATS */
+ { 41119, 0x00008800 }, /* GL_STENCIL_BACK_FUNC */
+ { 41140, 0x00008801 }, /* GL_STENCIL_BACK_FAIL */
+ { 41161, 0x00008802 }, /* GL_STENCIL_BACK_PASS_DEPTH_FAIL */
+ { 41193, 0x00008803 }, /* GL_STENCIL_BACK_PASS_DEPTH_PASS */
+ { 41225, 0x00008804 }, /* GL_FRAGMENT_PROGRAM_ARB */
+ { 41249, 0x00008805 }, /* GL_PROGRAM_ALU_INSTRUCTIONS_ARB */
+ { 41281, 0x00008806 }, /* GL_PROGRAM_TEX_INSTRUCTIONS_ARB */
+ { 41313, 0x00008807 }, /* GL_PROGRAM_TEX_INDIRECTIONS_ARB */
+ { 41345, 0x00008808 }, /* GL_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */
+ { 41384, 0x00008809 }, /* GL_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */
+ { 41423, 0x0000880A }, /* GL_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */
+ { 41462, 0x0000880B }, /* GL_MAX_PROGRAM_ALU_INSTRUCTIONS_ARB */
+ { 41498, 0x0000880C }, /* GL_MAX_PROGRAM_TEX_INSTRUCTIONS_ARB */
+ { 41534, 0x0000880D }, /* GL_MAX_PROGRAM_TEX_INDIRECTIONS_ARB */
+ { 41570, 0x0000880E }, /* GL_MAX_PROGRAM_NATIVE_ALU_INSTRUCTIONS_ARB */
+ { 41613, 0x0000880F }, /* GL_MAX_PROGRAM_NATIVE_TEX_INSTRUCTIONS_ARB */
+ { 41656, 0x00008810 }, /* GL_MAX_PROGRAM_NATIVE_TEX_INDIRECTIONS_ARB */
+ { 41699, 0x00008814 }, /* GL_RGBA32F */
+ { 41710, 0x00008815 }, /* GL_RGB32F */
+ { 41720, 0x00008816 }, /* GL_ALPHA32F_ARB */
+ { 41736, 0x00008817 }, /* GL_INTENSITY32F_ARB */
+ { 41756, 0x00008818 }, /* GL_LUMINANCE32F_ARB */
+ { 41776, 0x00008819 }, /* GL_LUMINANCE_ALPHA32F_ARB */
+ { 41802, 0x0000881A }, /* GL_RGBA16F */
+ { 41813, 0x0000881B }, /* GL_RGB16F */
+ { 41823, 0x0000881C }, /* GL_ALPHA16F_ARB */
+ { 41839, 0x0000881D }, /* GL_INTENSITY16F_ARB */
+ { 41859, 0x0000881E }, /* GL_LUMINANCE16F_ARB */
+ { 41879, 0x0000881F }, /* GL_LUMINANCE_ALPHA16F_ARB */
+ { 41905, 0x00008820 }, /* GL_RGBA_FLOAT_MODE_ARB */
+ { 41928, 0x00008823 }, /* GL_WRITEONLY_RENDERING_QCOM */
+ { 41956, 0x00008824 }, /* GL_MAX_DRAW_BUFFERS */
+ { 41976, 0x00008825 }, /* GL_DRAW_BUFFER0 */
+ { 41992, 0x00008826 }, /* GL_DRAW_BUFFER1 */
+ { 42008, 0x00008827 }, /* GL_DRAW_BUFFER2 */
+ { 42024, 0x00008828 }, /* GL_DRAW_BUFFER3 */
+ { 42040, 0x00008829 }, /* GL_DRAW_BUFFER4 */
+ { 42056, 0x0000882A }, /* GL_DRAW_BUFFER5 */
+ { 42072, 0x0000882B }, /* GL_DRAW_BUFFER6 */
+ { 42088, 0x0000882C }, /* GL_DRAW_BUFFER7 */
+ { 42104, 0x0000882D }, /* GL_DRAW_BUFFER8 */
+ { 42120, 0x0000882E }, /* GL_DRAW_BUFFER9 */
+ { 42136, 0x0000882F }, /* GL_DRAW_BUFFER10 */
+ { 42153, 0x00008830 }, /* GL_DRAW_BUFFER11 */
+ { 42170, 0x00008831 }, /* GL_DRAW_BUFFER12 */
+ { 42187, 0x00008832 }, /* GL_DRAW_BUFFER13 */
+ { 42204, 0x00008833 }, /* GL_DRAW_BUFFER14 */
+ { 42221, 0x00008834 }, /* GL_DRAW_BUFFER15 */
+ { 42238, 0x00008835 }, /* GL_COLOR_CLEAR_UNCLAMPED_VALUE_ATI */
+ { 42273, 0x0000883D }, /* GL_BLEND_EQUATION_ALPHA */
+ { 42297, 0x0000883F }, /* GL_SUBSAMPLE_DISTANCE_AMD */
+ { 42323, 0x00008840 }, /* GL_MATRIX_PALETTE_ARB */
+ { 42345, 0x00008841 }, /* GL_MAX_MATRIX_PALETTE_STACK_DEPTH_ARB */
+ { 42383, 0x00008842 }, /* GL_MAX_PALETTE_MATRICES_ARB */
+ { 42411, 0x00008843 }, /* GL_CURRENT_PALETTE_MATRIX_ARB */
+ { 42441, 0x00008844 }, /* GL_MATRIX_INDEX_ARRAY_ARB */
+ { 42467, 0x00008845 }, /* GL_CURRENT_MATRIX_INDEX_ARB */
+ { 42495, 0x00008846 }, /* GL_MATRIX_INDEX_ARRAY_SIZE_ARB */
+ { 42526, 0x00008847 }, /* GL_MATRIX_INDEX_ARRAY_TYPE_ARB */
+ { 42557, 0x00008848 }, /* GL_MATRIX_INDEX_ARRAY_STRIDE_ARB */
+ { 42590, 0x00008849 }, /* GL_MATRIX_INDEX_ARRAY_POINTER_ARB */
+ { 42624, 0x0000884A }, /* GL_TEXTURE_DEPTH_SIZE */
+ { 42646, 0x0000884B }, /* GL_DEPTH_TEXTURE_MODE */
+ { 42668, 0x0000884C }, /* GL_TEXTURE_COMPARE_MODE */
+ { 42692, 0x0000884D }, /* GL_TEXTURE_COMPARE_FUNC */
+ { 42716, 0x0000884E }, /* GL_COMPARE_REF_TO_TEXTURE */
+ { 42742, 0x0000884F }, /* GL_TEXTURE_CUBE_MAP_SEAMLESS */
+ { 42771, 0x00008850 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_NV */
+ { 42806, 0x00008851 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_2D_SCALE_NV */
+ { 42847, 0x00008852 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_NV */
+ { 42889, 0x00008853 }, /* GL_OFFSET_PROJECTIVE_TEXTURE_RECTANGLE_SCALE_NV */
+ { 42937, 0x00008854 }, /* GL_OFFSET_HILO_TEXTURE_2D_NV */
+ { 42966, 0x00008855 }, /* GL_OFFSET_HILO_TEXTURE_RECTANGLE_NV */
+ { 43002, 0x00008856 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_2D_NV */
+ { 43042, 0x00008857 }, /* GL_OFFSET_HILO_PROJECTIVE_TEXTURE_RECTANGLE_NV */
+ { 43089, 0x00008858 }, /* GL_DEPENDENT_HILO_TEXTURE_2D_NV */
+ { 43121, 0x00008859 }, /* GL_DEPENDENT_RGB_TEXTURE_3D_NV */
+ { 43152, 0x0000885A }, /* GL_DEPENDENT_RGB_TEXTURE_CUBE_MAP_NV */
+ { 43189, 0x0000885B }, /* GL_DOT_PRODUCT_PASS_THROUGH_NV */
+ { 43220, 0x0000885C }, /* GL_DOT_PRODUCT_TEXTURE_1D_NV */
+ { 43249, 0x0000885D }, /* GL_DOT_PRODUCT_AFFINE_DEPTH_REPLACE_NV */
+ { 43288, 0x0000885E }, /* GL_HILO8_NV */
+ { 43300, 0x0000885F }, /* GL_SIGNED_HILO8_NV */
+ { 43319, 0x00008860 }, /* GL_FORCE_BLUE_TO_ONE_NV */
+ { 43343, 0x00008861 }, /* GL_POINT_SPRITE */
+ { 43359, 0x00008862 }, /* GL_COORD_REPLACE */
+ { 43376, 0x00008863 }, /* GL_POINT_SPRITE_R_MODE_NV */
+ { 43402, 0x00008864 }, /* GL_QUERY_COUNTER_BITS */
+ { 43424, 0x00008865 }, /* GL_CURRENT_QUERY */
+ { 43441, 0x00008866 }, /* GL_QUERY_RESULT */
+ { 43457, 0x00008867 }, /* GL_QUERY_RESULT_AVAILABLE */
+ { 43483, 0x00008868 }, /* GL_MAX_FRAGMENT_PROGRAM_LOCAL_PARAMETERS_NV */
+ { 43527, 0x00008869 }, /* GL_MAX_VERTEX_ATTRIBS */
+ { 43549, 0x0000886A }, /* GL_VERTEX_ATTRIB_ARRAY_NORMALIZED */
+ { 43583, 0x0000886C }, /* GL_MAX_TESS_CONTROL_INPUT_COMPONENTS */
+ { 43620, 0x0000886D }, /* GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS */
+ { 43660, 0x0000886E }, /* GL_DEPTH_STENCIL_TO_RGBA_NV */
+ { 43688, 0x0000886F }, /* GL_DEPTH_STENCIL_TO_BGRA_NV */
+ { 43716, 0x00008870 }, /* GL_FRAGMENT_PROGRAM_NV */
+ { 43739, 0x00008871 }, /* GL_MAX_TEXTURE_COORDS */
+ { 43761, 0x00008872 }, /* GL_MAX_TEXTURE_IMAGE_UNITS */
+ { 43788, 0x00008873 }, /* GL_FRAGMENT_PROGRAM_BINDING_NV */
+ { 43819, 0x00008874 }, /* GL_PROGRAM_ERROR_STRING_ARB */
+ { 43847, 0x00008875 }, /* GL_PROGRAM_FORMAT_ASCII_ARB */
+ { 43875, 0x00008876 }, /* GL_PROGRAM_FORMAT_ARB */
+ { 43897, 0x00008878 }, /* GL_WRITE_PIXEL_DATA_RANGE_NV */
+ { 43926, 0x00008879 }, /* GL_READ_PIXEL_DATA_RANGE_NV */
+ { 43954, 0x0000887A }, /* GL_WRITE_PIXEL_DATA_RANGE_LENGTH_NV */
+ { 43990, 0x0000887B }, /* GL_READ_PIXEL_DATA_RANGE_LENGTH_NV */
+ { 44025, 0x0000887C }, /* GL_WRITE_PIXEL_DATA_RANGE_POINTER_NV */
+ { 44062, 0x0000887D }, /* GL_READ_PIXEL_DATA_RANGE_POINTER_NV */
+ { 44098, 0x0000887F }, /* GL_GEOMETRY_SHADER_INVOCATIONS */
+ { 44129, 0x00008880 }, /* GL_FLOAT_R_NV */
+ { 44143, 0x00008881 }, /* GL_FLOAT_RG_NV */
+ { 44158, 0x00008882 }, /* GL_FLOAT_RGB_NV */
+ { 44174, 0x00008883 }, /* GL_FLOAT_RGBA_NV */
+ { 44191, 0x00008884 }, /* GL_FLOAT_R16_NV */
+ { 44207, 0x00008885 }, /* GL_FLOAT_R32_NV */
+ { 44223, 0x00008886 }, /* GL_FLOAT_RG16_NV */
+ { 44240, 0x00008887 }, /* GL_FLOAT_RG32_NV */
+ { 44257, 0x00008888 }, /* GL_FLOAT_RGB16_NV */
+ { 44275, 0x00008889 }, /* GL_FLOAT_RGB32_NV */
+ { 44293, 0x0000888A }, /* GL_FLOAT_RGBA16_NV */
+ { 44312, 0x0000888B }, /* GL_FLOAT_RGBA32_NV */
+ { 44331, 0x0000888C }, /* GL_TEXTURE_FLOAT_COMPONENTS_NV */
+ { 44362, 0x0000888D }, /* GL_FLOAT_CLEAR_COLOR_VALUE_NV */
+ { 44392, 0x0000888E }, /* GL_FLOAT_RGBA_MODE_NV */
+ { 44414, 0x0000888F }, /* GL_TEXTURE_UNSIGNED_REMAP_MODE_NV */
+ { 44448, 0x00008890 }, /* GL_DEPTH_BOUNDS_TEST_EXT */
+ { 44473, 0x00008891 }, /* GL_DEPTH_BOUNDS_EXT */
+ { 44493, 0x00008892 }, /* GL_ARRAY_BUFFER */
+ { 44509, 0x00008893 }, /* GL_ELEMENT_ARRAY_BUFFER */
+ { 44533, 0x00008894 }, /* GL_ARRAY_BUFFER_BINDING */
+ { 44557, 0x00008895 }, /* GL_ELEMENT_ARRAY_BUFFER_BINDING */
+ { 44589, 0x00008896 }, /* GL_VERTEX_ARRAY_BUFFER_BINDING */
+ { 44620, 0x00008897 }, /* GL_NORMAL_ARRAY_BUFFER_BINDING */
+ { 44651, 0x00008898 }, /* GL_COLOR_ARRAY_BUFFER_BINDING */
+ { 44681, 0x00008899 }, /* GL_INDEX_ARRAY_BUFFER_BINDING */
+ { 44711, 0x0000889A }, /* GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING */
+ { 44749, 0x0000889B }, /* GL_EDGE_FLAG_ARRAY_BUFFER_BINDING */
+ { 44783, 0x0000889C }, /* GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING */
+ { 44823, 0x0000889D }, /* GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING */
+ { 44862, 0x0000889E }, /* GL_WEIGHT_ARRAY_BUFFER_BINDING */
+ { 44893, 0x0000889F }, /* GL_VERTEX_ATTRIB_ARRAY_BUFFER_BINDING */
+ { 44931, 0x000088A0 }, /* GL_PROGRAM_INSTRUCTIONS_ARB */
+ { 44959, 0x000088A1 }, /* GL_MAX_PROGRAM_INSTRUCTIONS_ARB */
+ { 44991, 0x000088A2 }, /* GL_PROGRAM_NATIVE_INSTRUCTIONS_ARB */
+ { 45026, 0x000088A3 }, /* GL_MAX_PROGRAM_NATIVE_INSTRUCTIONS_ARB */
+ { 45065, 0x000088A4 }, /* GL_PROGRAM_TEMPORARIES_ARB */
+ { 45092, 0x000088A5 }, /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
+ { 45123, 0x000088A6 }, /* GL_PROGRAM_NATIVE_TEMPORARIES_ARB */
+ { 45157, 0x000088A7 }, /* GL_MAX_PROGRAM_NATIVE_TEMPORARIES_ARB */
+ { 45195, 0x000088A8 }, /* GL_PROGRAM_PARAMETERS_ARB */
+ { 45221, 0x000088A9 }, /* GL_MAX_PROGRAM_PARAMETERS_ARB */
+ { 45251, 0x000088AA }, /* GL_PROGRAM_NATIVE_PARAMETERS_ARB */
+ { 45284, 0x000088AB }, /* GL_MAX_PROGRAM_NATIVE_PARAMETERS_ARB */
+ { 45321, 0x000088AC }, /* GL_PROGRAM_ATTRIBS_ARB */
+ { 45344, 0x000088AD }, /* GL_MAX_PROGRAM_ATTRIBS_ARB */
+ { 45371, 0x000088AE }, /* GL_PROGRAM_NATIVE_ATTRIBS_ARB */
+ { 45401, 0x000088AF }, /* GL_MAX_PROGRAM_NATIVE_ATTRIBS_ARB */
+ { 45435, 0x000088B0 }, /* GL_PROGRAM_ADDRESS_REGISTERS_ARB */
+ { 45468, 0x000088B1 }, /* GL_MAX_PROGRAM_ADDRESS_REGISTERS_ARB */
+ { 45505, 0x000088B2 }, /* GL_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */
+ { 45545, 0x000088B3 }, /* GL_MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB */
+ { 45589, 0x000088B4 }, /* GL_MAX_PROGRAM_LOCAL_PARAMETERS_ARB */
+ { 45625, 0x000088B5 }, /* GL_MAX_PROGRAM_ENV_PARAMETERS_ARB */
+ { 45659, 0x000088B6 }, /* GL_PROGRAM_UNDER_NATIVE_LIMITS_ARB */
+ { 45694, 0x000088B7 }, /* GL_TRANSPOSE_CURRENT_MATRIX_ARB */
+ { 45726, 0x000088B8 }, /* GL_READ_ONLY */
+ { 45739, 0x000088B9 }, /* GL_WRITE_ONLY */
+ { 45753, 0x000088BA }, /* GL_READ_WRITE */
+ { 45767, 0x000088BB }, /* GL_BUFFER_ACCESS */
+ { 45784, 0x000088BC }, /* GL_BUFFER_MAPPED */
+ { 45801, 0x000088BD }, /* GL_BUFFER_MAP_POINTER */
+ { 45823, 0x000088BE }, /* GL_WRITE_DISCARD_NV */
+ { 45843, 0x000088BF }, /* GL_TIME_ELAPSED */
+ { 45859, 0x000088C0 }, /* GL_MATRIX0_ARB */
+ { 45874, 0x000088C1 }, /* GL_MATRIX1_ARB */
+ { 45889, 0x000088C2 }, /* GL_MATRIX2_ARB */
+ { 45904, 0x000088C3 }, /* GL_MATRIX3_ARB */
+ { 45919, 0x000088C4 }, /* GL_MATRIX4_ARB */
+ { 45934, 0x000088C5 }, /* GL_MATRIX5_ARB */
+ { 45949, 0x000088C6 }, /* GL_MATRIX6_ARB */
+ { 45964, 0x000088C7 }, /* GL_MATRIX7_ARB */
+ { 45979, 0x000088C8 }, /* GL_MATRIX8_ARB */
+ { 45994, 0x000088C9 }, /* GL_MATRIX9_ARB */
+ { 46009, 0x000088CA }, /* GL_MATRIX10_ARB */
+ { 46025, 0x000088CB }, /* GL_MATRIX11_ARB */
+ { 46041, 0x000088CC }, /* GL_MATRIX12_ARB */
+ { 46057, 0x000088CD }, /* GL_MATRIX13_ARB */
+ { 46073, 0x000088CE }, /* GL_MATRIX14_ARB */
+ { 46089, 0x000088CF }, /* GL_MATRIX15_ARB */
+ { 46105, 0x000088D0 }, /* GL_MATRIX16_ARB */
+ { 46121, 0x000088D1 }, /* GL_MATRIX17_ARB */
+ { 46137, 0x000088D2 }, /* GL_MATRIX18_ARB */
+ { 46153, 0x000088D3 }, /* GL_MATRIX19_ARB */
+ { 46169, 0x000088D4 }, /* GL_MATRIX20_ARB */
+ { 46185, 0x000088D5 }, /* GL_MATRIX21_ARB */
+ { 46201, 0x000088D6 }, /* GL_MATRIX22_ARB */
+ { 46217, 0x000088D7 }, /* GL_MATRIX23_ARB */
+ { 46233, 0x000088D8 }, /* GL_MATRIX24_ARB */
+ { 46249, 0x000088D9 }, /* GL_MATRIX25_ARB */
+ { 46265, 0x000088DA }, /* GL_MATRIX26_ARB */
+ { 46281, 0x000088DB }, /* GL_MATRIX27_ARB */
+ { 46297, 0x000088DC }, /* GL_MATRIX28_ARB */
+ { 46313, 0x000088DD }, /* GL_MATRIX29_ARB */
+ { 46329, 0x000088DE }, /* GL_MATRIX30_ARB */
+ { 46345, 0x000088DF }, /* GL_MATRIX31_ARB */
+ { 46361, 0x000088E0 }, /* GL_STREAM_DRAW */
+ { 46376, 0x000088E1 }, /* GL_STREAM_READ */
+ { 46391, 0x000088E2 }, /* GL_STREAM_COPY */
+ { 46406, 0x000088E4 }, /* GL_STATIC_DRAW */
+ { 46421, 0x000088E5 }, /* GL_STATIC_READ */
+ { 46436, 0x000088E6 }, /* GL_STATIC_COPY */
+ { 46451, 0x000088E8 }, /* GL_DYNAMIC_DRAW */
+ { 46467, 0x000088E9 }, /* GL_DYNAMIC_READ */
+ { 46483, 0x000088EA }, /* GL_DYNAMIC_COPY */
+ { 46499, 0x000088EB }, /* GL_PIXEL_PACK_BUFFER */
+ { 46520, 0x000088EC }, /* GL_PIXEL_UNPACK_BUFFER */
+ { 46543, 0x000088ED }, /* GL_PIXEL_PACK_BUFFER_BINDING */
+ { 46572, 0x000088EE }, /* GL_ETC1_SRGB8_NV */
+ { 46589, 0x000088EF }, /* GL_PIXEL_UNPACK_BUFFER_BINDING */
+ { 46620, 0x000088F0 }, /* GL_DEPTH24_STENCIL8 */
+ { 46640, 0x000088F1 }, /* GL_TEXTURE_STENCIL_SIZE */
+ { 46664, 0x000088F2 }, /* GL_STENCIL_TAG_BITS_EXT */
+ { 46688, 0x000088F3 }, /* GL_STENCIL_CLEAR_TAG_VALUE_EXT */
+ { 46719, 0x000088F4 }, /* GL_MAX_PROGRAM_EXEC_INSTRUCTIONS_NV */
+ { 46755, 0x000088F5 }, /* GL_MAX_PROGRAM_CALL_DEPTH_NV */
+ { 46784, 0x000088F6 }, /* GL_MAX_PROGRAM_IF_DEPTH_NV */
+ { 46811, 0x000088F7 }, /* GL_MAX_PROGRAM_LOOP_DEPTH_NV */
+ { 46840, 0x000088F8 }, /* GL_MAX_PROGRAM_LOOP_COUNT_NV */
+ { 46869, 0x000088F9 }, /* GL_SRC1_COLOR */
+ { 46883, 0x000088FA }, /* GL_ONE_MINUS_SRC1_COLOR */
+ { 46907, 0x000088FB }, /* GL_ONE_MINUS_SRC1_ALPHA */
+ { 46931, 0x000088FC }, /* GL_MAX_DUAL_SOURCE_DRAW_BUFFERS */
+ { 46963, 0x000088FD }, /* GL_VERTEX_ATTRIB_ARRAY_INTEGER */
+ { 46994, 0x000088FE }, /* GL_VERTEX_ATTRIB_ARRAY_DIVISOR */
+ { 47025, 0x000088FF }, /* GL_MAX_ARRAY_TEXTURE_LAYERS */
+ { 47053, 0x00008904 }, /* GL_MIN_PROGRAM_TEXEL_OFFSET */
+ { 47081, 0x00008905 }, /* GL_MAX_PROGRAM_TEXEL_OFFSET */
+ { 47109, 0x00008906 }, /* GL_PROGRAM_ATTRIB_COMPONENTS_NV */
+ { 47141, 0x00008907 }, /* GL_PROGRAM_RESULT_COMPONENTS_NV */
+ { 47173, 0x00008908 }, /* GL_MAX_PROGRAM_ATTRIB_COMPONENTS_NV */
+ { 47209, 0x00008909 }, /* GL_MAX_PROGRAM_RESULT_COMPONENTS_NV */
+ { 47245, 0x00008910 }, /* GL_STENCIL_TEST_TWO_SIDE_EXT */
+ { 47274, 0x00008911 }, /* GL_ACTIVE_STENCIL_FACE_EXT */
+ { 47301, 0x00008912 }, /* GL_MIRROR_CLAMP_TO_BORDER_EXT */
+ { 47331, 0x00008914 }, /* GL_SAMPLES_PASSED */
+ { 47349, 0x00008916 }, /* GL_GEOMETRY_VERTICES_OUT */
+ { 47374, 0x00008917 }, /* GL_GEOMETRY_INPUT_TYPE */
+ { 47397, 0x00008918 }, /* GL_GEOMETRY_OUTPUT_TYPE */
+ { 47421, 0x00008919 }, /* GL_SAMPLER_BINDING */
+ { 47440, 0x0000891A }, /* GL_CLAMP_VERTEX_COLOR */
+ { 47462, 0x0000891B }, /* GL_CLAMP_FRAGMENT_COLOR */
+ { 47486, 0x0000891C }, /* GL_CLAMP_READ_COLOR */
+ { 47506, 0x0000891D }, /* GL_FIXED_ONLY */
+ { 47520, 0x0000891E }, /* GL_TESS_CONTROL_PROGRAM_NV */
+ { 47547, 0x0000891F }, /* GL_TESS_EVALUATION_PROGRAM_NV */
+ { 47577, 0x00008920 }, /* GL_FRAGMENT_SHADER_ATI */
+ { 47600, 0x00008921 }, /* GL_REG_0_ATI */
+ { 47613, 0x00008922 }, /* GL_REG_1_ATI */
+ { 47626, 0x00008923 }, /* GL_REG_2_ATI */
+ { 47639, 0x00008924 }, /* GL_REG_3_ATI */
+ { 47652, 0x00008925 }, /* GL_REG_4_ATI */
+ { 47665, 0x00008926 }, /* GL_REG_5_ATI */
+ { 47678, 0x00008927 }, /* GL_REG_6_ATI */
+ { 47691, 0x00008928 }, /* GL_REG_7_ATI */
+ { 47704, 0x00008929 }, /* GL_REG_8_ATI */
+ { 47717, 0x0000892A }, /* GL_REG_9_ATI */
+ { 47730, 0x0000892B }, /* GL_REG_10_ATI */
+ { 47744, 0x0000892C }, /* GL_REG_11_ATI */
+ { 47758, 0x0000892D }, /* GL_REG_12_ATI */
+ { 47772, 0x0000892E }, /* GL_REG_13_ATI */
+ { 47786, 0x0000892F }, /* GL_REG_14_ATI */
+ { 47800, 0x00008930 }, /* GL_REG_15_ATI */
+ { 47814, 0x00008931 }, /* GL_REG_16_ATI */
+ { 47828, 0x00008932 }, /* GL_REG_17_ATI */
+ { 47842, 0x00008933 }, /* GL_REG_18_ATI */
+ { 47856, 0x00008934 }, /* GL_REG_19_ATI */
+ { 47870, 0x00008935 }, /* GL_REG_20_ATI */
+ { 47884, 0x00008936 }, /* GL_REG_21_ATI */
+ { 47898, 0x00008937 }, /* GL_REG_22_ATI */
+ { 47912, 0x00008938 }, /* GL_REG_23_ATI */
+ { 47926, 0x00008939 }, /* GL_REG_24_ATI */
+ { 47940, 0x0000893A }, /* GL_REG_25_ATI */
+ { 47954, 0x0000893B }, /* GL_REG_26_ATI */
+ { 47968, 0x0000893C }, /* GL_REG_27_ATI */
+ { 47982, 0x0000893D }, /* GL_REG_28_ATI */
+ { 47996, 0x0000893E }, /* GL_REG_29_ATI */
+ { 48010, 0x0000893F }, /* GL_REG_30_ATI */
+ { 48024, 0x00008940 }, /* GL_REG_31_ATI */
+ { 48038, 0x00008941 }, /* GL_CON_0_ATI */
+ { 48051, 0x00008942 }, /* GL_CON_1_ATI */
+ { 48064, 0x00008943 }, /* GL_CON_2_ATI */
+ { 48077, 0x00008944 }, /* GL_CON_3_ATI */
+ { 48090, 0x00008945 }, /* GL_CON_4_ATI */
+ { 48103, 0x00008946 }, /* GL_CON_5_ATI */
+ { 48116, 0x00008947 }, /* GL_CON_6_ATI */
+ { 48129, 0x00008948 }, /* GL_CON_7_ATI */
+ { 48142, 0x00008949 }, /* GL_CON_8_ATI */
+ { 48155, 0x0000894A }, /* GL_CON_9_ATI */
+ { 48168, 0x0000894B }, /* GL_CON_10_ATI */
+ { 48182, 0x0000894C }, /* GL_CON_11_ATI */
+ { 48196, 0x0000894D }, /* GL_CON_12_ATI */
+ { 48210, 0x0000894E }, /* GL_CON_13_ATI */
+ { 48224, 0x0000894F }, /* GL_CON_14_ATI */
+ { 48238, 0x00008950 }, /* GL_CON_15_ATI */
+ { 48252, 0x00008951 }, /* GL_CON_16_ATI */
+ { 48266, 0x00008952 }, /* GL_CON_17_ATI */
+ { 48280, 0x00008953 }, /* GL_CON_18_ATI */
+ { 48294, 0x00008954 }, /* GL_CON_19_ATI */
+ { 48308, 0x00008955 }, /* GL_CON_20_ATI */
+ { 48322, 0x00008956 }, /* GL_CON_21_ATI */
+ { 48336, 0x00008957 }, /* GL_CON_22_ATI */
+ { 48350, 0x00008958 }, /* GL_CON_23_ATI */
+ { 48364, 0x00008959 }, /* GL_CON_24_ATI */
+ { 48378, 0x0000895A }, /* GL_CON_25_ATI */
+ { 48392, 0x0000895B }, /* GL_CON_26_ATI */
+ { 48406, 0x0000895C }, /* GL_CON_27_ATI */
+ { 48420, 0x0000895D }, /* GL_CON_28_ATI */
+ { 48434, 0x0000895E }, /* GL_CON_29_ATI */
+ { 48448, 0x0000895F }, /* GL_CON_30_ATI */
+ { 48462, 0x00008960 }, /* GL_CON_31_ATI */
+ { 48476, 0x00008961 }, /* GL_MOV_ATI */
+ { 48487, 0x00008963 }, /* GL_ADD_ATI */
+ { 48498, 0x00008964 }, /* GL_MUL_ATI */
+ { 48509, 0x00008965 }, /* GL_SUB_ATI */
+ { 48520, 0x00008966 }, /* GL_DOT3_ATI */
+ { 48532, 0x00008967 }, /* GL_DOT4_ATI */
+ { 48544, 0x00008968 }, /* GL_MAD_ATI */
+ { 48555, 0x00008969 }, /* GL_LERP_ATI */
+ { 48567, 0x0000896A }, /* GL_CND_ATI */
+ { 48578, 0x0000896B }, /* GL_CND0_ATI */
+ { 48590, 0x0000896C }, /* GL_DOT2_ADD_ATI */
+ { 48606, 0x0000896D }, /* GL_SECONDARY_INTERPOLATOR_ATI */
+ { 48636, 0x0000896E }, /* GL_NUM_FRAGMENT_REGISTERS_ATI */
+ { 48666, 0x0000896F }, /* GL_NUM_FRAGMENT_CONSTANTS_ATI */
+ { 48696, 0x00008970 }, /* GL_NUM_PASSES_ATI */
+ { 48714, 0x00008971 }, /* GL_NUM_INSTRUCTIONS_PER_PASS_ATI */
+ { 48747, 0x00008972 }, /* GL_NUM_INSTRUCTIONS_TOTAL_ATI */
+ { 48777, 0x00008973 }, /* GL_NUM_INPUT_INTERPOLATOR_COMPONENTS_ATI */
+ { 48818, 0x00008974 }, /* GL_NUM_LOOPBACK_COMPONENTS_ATI */
+ { 48849, 0x00008975 }, /* GL_COLOR_ALPHA_PAIRING_ATI */
+ { 48876, 0x00008976 }, /* GL_SWIZZLE_STR_ATI */
+ { 48895, 0x00008977 }, /* GL_SWIZZLE_STQ_ATI */
+ { 48914, 0x00008978 }, /* GL_SWIZZLE_STR_DR_ATI */
+ { 48936, 0x00008979 }, /* GL_SWIZZLE_STQ_DQ_ATI */
+ { 48958, 0x0000897A }, /* GL_SWIZZLE_STRQ_ATI */
+ { 48978, 0x0000897B }, /* GL_SWIZZLE_STRQ_DQ_ATI */
+ { 49001, 0x00008980 }, /* GL_INTERLACE_OML */
+ { 49018, 0x00008981 }, /* GL_INTERLACE_READ_OML */
+ { 49040, 0x00008982 }, /* GL_FORMAT_SUBSAMPLE_24_24_OML */
+ { 49070, 0x00008983 }, /* GL_FORMAT_SUBSAMPLE_244_244_OML */
+ { 49102, 0x00008984 }, /* GL_PACK_RESAMPLE_OML */
+ { 49123, 0x00008985 }, /* GL_UNPACK_RESAMPLE_OML */
+ { 49146, 0x00008986 }, /* GL_RESAMPLE_REPLICATE_OML */
+ { 49172, 0x00008987 }, /* GL_RESAMPLE_ZERO_FILL_OML */
+ { 49198, 0x00008988 }, /* GL_RESAMPLE_AVERAGE_OML */
+ { 49222, 0x00008989 }, /* GL_RESAMPLE_DECIMATE_OML */
+ { 49247, 0x0000898A }, /* GL_POINT_SIZE_ARRAY_TYPE_OES */
+ { 49276, 0x0000898B }, /* GL_POINT_SIZE_ARRAY_STRIDE_OES */
+ { 49307, 0x0000898C }, /* GL_POINT_SIZE_ARRAY_POINTER_OES */
+ { 49339, 0x0000898D }, /* GL_MODELVIEW_MATRIX_FLOAT_AS_INT_BITS_OES */
+ { 49381, 0x0000898E }, /* GL_PROJECTION_MATRIX_FLOAT_AS_INT_BITS_OES */
+ { 49424, 0x0000898F }, /* GL_TEXTURE_MATRIX_FLOAT_AS_INT_BITS_OES */
+ { 49464, 0x00008A00 }, /* GL_VERTEX_ATTRIB_MAP1_APPLE */
+ { 49492, 0x00008A01 }, /* GL_VERTEX_ATTRIB_MAP2_APPLE */
+ { 49520, 0x00008A02 }, /* GL_VERTEX_ATTRIB_MAP1_SIZE_APPLE */
+ { 49553, 0x00008A03 }, /* GL_VERTEX_ATTRIB_MAP1_COEFF_APPLE */
+ { 49587, 0x00008A04 }, /* GL_VERTEX_ATTRIB_MAP1_ORDER_APPLE */
+ { 49621, 0x00008A05 }, /* GL_VERTEX_ATTRIB_MAP1_DOMAIN_APPLE */
+ { 49656, 0x00008A06 }, /* GL_VERTEX_ATTRIB_MAP2_SIZE_APPLE */
+ { 49689, 0x00008A07 }, /* GL_VERTEX_ATTRIB_MAP2_COEFF_APPLE */
+ { 49723, 0x00008A08 }, /* GL_VERTEX_ATTRIB_MAP2_ORDER_APPLE */
+ { 49757, 0x00008A09 }, /* GL_VERTEX_ATTRIB_MAP2_DOMAIN_APPLE */
+ { 49792, 0x00008A0A }, /* GL_DRAW_PIXELS_APPLE */
+ { 49813, 0x00008A0B }, /* GL_FENCE_APPLE */
+ { 49828, 0x00008A0C }, /* GL_ELEMENT_ARRAY_APPLE */
+ { 49851, 0x00008A0D }, /* GL_ELEMENT_ARRAY_TYPE_APPLE */
+ { 49879, 0x00008A0E }, /* GL_ELEMENT_ARRAY_POINTER_APPLE */
+ { 49910, 0x00008A0F }, /* GL_COLOR_FLOAT_APPLE */
+ { 49931, 0x00008A11 }, /* GL_UNIFORM_BUFFER */
+ { 49949, 0x00008A12 }, /* GL_BUFFER_SERIALIZED_MODIFY_APPLE */
+ { 49983, 0x00008A13 }, /* GL_BUFFER_FLUSHING_UNMAP_APPLE */
+ { 50014, 0x00008A14 }, /* GL_AUX_DEPTH_STENCIL_APPLE */
+ { 50041, 0x00008A15 }, /* GL_PACK_ROW_BYTES_APPLE */
+ { 50065, 0x00008A16 }, /* GL_UNPACK_ROW_BYTES_APPLE */
+ { 50091, 0x00008A19 }, /* GL_RELEASED_APPLE */
+ { 50109, 0x00008A1A }, /* GL_VOLATILE_APPLE */
+ { 50127, 0x00008A1B }, /* GL_RETAINED_APPLE */
+ { 50145, 0x00008A1C }, /* GL_UNDEFINED_APPLE */
+ { 50164, 0x00008A1D }, /* GL_PURGEABLE_APPLE */
+ { 50183, 0x00008A1F }, /* GL_RGB_422_APPLE */
+ { 50200, 0x00008A28 }, /* GL_UNIFORM_BUFFER_BINDING */
+ { 50226, 0x00008A29 }, /* GL_UNIFORM_BUFFER_START */
+ { 50250, 0x00008A2A }, /* GL_UNIFORM_BUFFER_SIZE */
+ { 50273, 0x00008A2B }, /* GL_MAX_VERTEX_UNIFORM_BLOCKS */
+ { 50302, 0x00008A2C }, /* GL_MAX_GEOMETRY_UNIFORM_BLOCKS */
+ { 50333, 0x00008A2D }, /* GL_MAX_FRAGMENT_UNIFORM_BLOCKS */
+ { 50364, 0x00008A2E }, /* GL_MAX_COMBINED_UNIFORM_BLOCKS */
+ { 50395, 0x00008A2F }, /* GL_MAX_UNIFORM_BUFFER_BINDINGS */
+ { 50426, 0x00008A30 }, /* GL_MAX_UNIFORM_BLOCK_SIZE */
+ { 50452, 0x00008A31 }, /* GL_MAX_COMBINED_VERTEX_UNIFORM_COMPONENTS */
+ { 50494, 0x00008A32 }, /* GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS */
+ { 50538, 0x00008A33 }, /* GL_MAX_COMBINED_FRAGMENT_UNIFORM_COMPONENTS */
+ { 50582, 0x00008A34 }, /* GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT */
+ { 50617, 0x00008A35 }, /* GL_ACTIVE_UNIFORM_BLOCK_MAX_NAME_LENGTH */
+ { 50657, 0x00008A36 }, /* GL_ACTIVE_UNIFORM_BLOCKS */
+ { 50682, 0x00008A37 }, /* GL_UNIFORM_TYPE */
+ { 50698, 0x00008A38 }, /* GL_UNIFORM_SIZE */
+ { 50714, 0x00008A39 }, /* GL_UNIFORM_NAME_LENGTH */
+ { 50737, 0x00008A3A }, /* GL_UNIFORM_BLOCK_INDEX */
+ { 50760, 0x00008A3B }, /* GL_UNIFORM_OFFSET */
+ { 50778, 0x00008A3C }, /* GL_UNIFORM_ARRAY_STRIDE */
+ { 50802, 0x00008A3D }, /* GL_UNIFORM_MATRIX_STRIDE */
+ { 50827, 0x00008A3E }, /* GL_UNIFORM_IS_ROW_MAJOR */
+ { 50851, 0x00008A3F }, /* GL_UNIFORM_BLOCK_BINDING */
+ { 50876, 0x00008A40 }, /* GL_UNIFORM_BLOCK_DATA_SIZE */
+ { 50903, 0x00008A41 }, /* GL_UNIFORM_BLOCK_NAME_LENGTH */
+ { 50932, 0x00008A42 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORMS */
+ { 50965, 0x00008A43 }, /* GL_UNIFORM_BLOCK_ACTIVE_UNIFORM_INDICES */
+ { 51005, 0x00008A44 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_VERTEX_SHADER */
+ { 51050, 0x00008A45 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_GEOMETRY_SHADER */
+ { 51097, 0x00008A46 }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_FRAGMENT_SHADER */
+ { 51144, 0x00008A48 }, /* GL_TEXTURE_SRGB_DECODE_EXT */
+ { 51171, 0x00008A49 }, /* GL_DECODE_EXT */
+ { 51185, 0x00008A4A }, /* GL_SKIP_DECODE_EXT */
+ { 51204, 0x00008A4F }, /* GL_PROGRAM_PIPELINE_OBJECT_EXT */
+ { 51235, 0x00008A51 }, /* GL_RGB_RAW_422_APPLE */
+ { 51256, 0x00008A52 }, /* GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT */
+ { 51296, 0x00008A53 }, /* GL_SYNC_OBJECT_APPLE */
+ { 51317, 0x00008A54 }, /* GL_COMPRESSED_SRGB_PVRTC_2BPPV1_EXT */
+ { 51353, 0x00008A55 }, /* GL_COMPRESSED_SRGB_PVRTC_4BPPV1_EXT */
+ { 51389, 0x00008A56 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV1_EXT */
+ { 51431, 0x00008A57 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV1_EXT */
+ { 51473, 0x00008B30 }, /* GL_FRAGMENT_SHADER */
+ { 51492, 0x00008B31 }, /* GL_VERTEX_SHADER */
+ { 51509, 0x00008B40 }, /* GL_PROGRAM_OBJECT_ARB */
+ { 51531, 0x00008B48 }, /* GL_SHADER_OBJECT_ARB */
+ { 51552, 0x00008B49 }, /* GL_MAX_FRAGMENT_UNIFORM_COMPONENTS */
+ { 51587, 0x00008B4A }, /* GL_MAX_VERTEX_UNIFORM_COMPONENTS */
+ { 51620, 0x00008B4B }, /* GL_MAX_VARYING_COMPONENTS */
+ { 51646, 0x00008B4C }, /* GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS */
+ { 51680, 0x00008B4D }, /* GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS */
+ { 51716, 0x00008B4E }, /* GL_OBJECT_TYPE_ARB */
+ { 51735, 0x00008B4F }, /* GL_SHADER_TYPE */
+ { 51750, 0x00008B50 }, /* GL_FLOAT_VEC2 */
+ { 51764, 0x00008B51 }, /* GL_FLOAT_VEC3 */
+ { 51778, 0x00008B52 }, /* GL_FLOAT_VEC4 */
+ { 51792, 0x00008B53 }, /* GL_INT_VEC2 */
+ { 51804, 0x00008B54 }, /* GL_INT_VEC3 */
+ { 51816, 0x00008B55 }, /* GL_INT_VEC4 */
+ { 51828, 0x00008B56 }, /* GL_BOOL */
+ { 51836, 0x00008B57 }, /* GL_BOOL_VEC2 */
+ { 51849, 0x00008B58 }, /* GL_BOOL_VEC3 */
+ { 51862, 0x00008B59 }, /* GL_BOOL_VEC4 */
+ { 51875, 0x00008B5A }, /* GL_FLOAT_MAT2 */
+ { 51889, 0x00008B5B }, /* GL_FLOAT_MAT3 */
+ { 51903, 0x00008B5C }, /* GL_FLOAT_MAT4 */
+ { 51917, 0x00008B5D }, /* GL_SAMPLER_1D */
+ { 51931, 0x00008B5E }, /* GL_SAMPLER_2D */
+ { 51945, 0x00008B5F }, /* GL_SAMPLER_3D */
+ { 51959, 0x00008B60 }, /* GL_SAMPLER_CUBE */
+ { 51975, 0x00008B61 }, /* GL_SAMPLER_1D_SHADOW */
+ { 51996, 0x00008B62 }, /* GL_SAMPLER_2D_SHADOW */
+ { 52017, 0x00008B63 }, /* GL_SAMPLER_2D_RECT */
+ { 52036, 0x00008B64 }, /* GL_SAMPLER_2D_RECT_SHADOW */
+ { 52062, 0x00008B65 }, /* GL_FLOAT_MAT2x3 */
+ { 52078, 0x00008B66 }, /* GL_FLOAT_MAT2x4 */
+ { 52094, 0x00008B67 }, /* GL_FLOAT_MAT3x2 */
+ { 52110, 0x00008B68 }, /* GL_FLOAT_MAT3x4 */
+ { 52126, 0x00008B69 }, /* GL_FLOAT_MAT4x2 */
+ { 52142, 0x00008B6A }, /* GL_FLOAT_MAT4x3 */
+ { 52158, 0x00008B80 }, /* GL_DELETE_STATUS */
+ { 52175, 0x00008B81 }, /* GL_COMPILE_STATUS */
+ { 52193, 0x00008B82 }, /* GL_LINK_STATUS */
+ { 52208, 0x00008B83 }, /* GL_VALIDATE_STATUS */
+ { 52227, 0x00008B84 }, /* GL_INFO_LOG_LENGTH */
+ { 52246, 0x00008B85 }, /* GL_ATTACHED_SHADERS */
+ { 52266, 0x00008B86 }, /* GL_ACTIVE_UNIFORMS */
+ { 52285, 0x00008B87 }, /* GL_ACTIVE_UNIFORM_MAX_LENGTH */
+ { 52314, 0x00008B88 }, /* GL_SHADER_SOURCE_LENGTH */
+ { 52338, 0x00008B89 }, /* GL_ACTIVE_ATTRIBUTES */
+ { 52359, 0x00008B8A }, /* GL_ACTIVE_ATTRIBUTE_MAX_LENGTH */
+ { 52390, 0x00008B8B }, /* GL_FRAGMENT_SHADER_DERIVATIVE_HINT */
+ { 52425, 0x00008B8C }, /* GL_SHADING_LANGUAGE_VERSION */
+ { 52453, 0x00008B8D }, /* GL_CURRENT_PROGRAM */
+ { 52472, 0x00008B90 }, /* GL_PALETTE4_RGB8_OES */
+ { 52493, 0x00008B91 }, /* GL_PALETTE4_RGBA8_OES */
+ { 52515, 0x00008B92 }, /* GL_PALETTE4_R5_G6_B5_OES */
+ { 52540, 0x00008B93 }, /* GL_PALETTE4_RGBA4_OES */
+ { 52562, 0x00008B94 }, /* GL_PALETTE4_RGB5_A1_OES */
+ { 52586, 0x00008B95 }, /* GL_PALETTE8_RGB8_OES */
+ { 52607, 0x00008B96 }, /* GL_PALETTE8_RGBA8_OES */
+ { 52629, 0x00008B97 }, /* GL_PALETTE8_R5_G6_B5_OES */
+ { 52654, 0x00008B98 }, /* GL_PALETTE8_RGBA4_OES */
+ { 52676, 0x00008B99 }, /* GL_PALETTE8_RGB5_A1_OES */
+ { 52700, 0x00008B9A }, /* GL_IMPLEMENTATION_COLOR_READ_TYPE */
+ { 52734, 0x00008B9B }, /* GL_IMPLEMENTATION_COLOR_READ_FORMAT */
+ { 52770, 0x00008B9C }, /* GL_POINT_SIZE_ARRAY_OES */
+ { 52794, 0x00008B9D }, /* GL_TEXTURE_CROP_RECT_OES */
+ { 52819, 0x00008B9E }, /* GL_MATRIX_INDEX_ARRAY_BUFFER_BINDING_OES */
+ { 52860, 0x00008B9F }, /* GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES */
+ { 52899, 0x00008BC0 }, /* GL_COUNTER_TYPE_AMD */
+ { 52919, 0x00008BC1 }, /* GL_COUNTER_RANGE_AMD */
+ { 52940, 0x00008BC2 }, /* GL_UNSIGNED_INT64_AMD */
+ { 52962, 0x00008BC3 }, /* GL_PERCENTAGE_AMD */
+ { 52980, 0x00008BC4 }, /* GL_PERFMON_RESULT_AVAILABLE_AMD */
+ { 53012, 0x00008BC5 }, /* GL_PERFMON_RESULT_SIZE_AMD */
+ { 53039, 0x00008BC6 }, /* GL_PERFMON_RESULT_AMD */
+ { 53061, 0x00008BD2 }, /* GL_TEXTURE_WIDTH_QCOM */
+ { 53083, 0x00008BD3 }, /* GL_TEXTURE_HEIGHT_QCOM */
+ { 53106, 0x00008BD4 }, /* GL_TEXTURE_DEPTH_QCOM */
+ { 53128, 0x00008BD5 }, /* GL_TEXTURE_INTERNAL_FORMAT_QCOM */
+ { 53160, 0x00008BD6 }, /* GL_TEXTURE_FORMAT_QCOM */
+ { 53183, 0x00008BD7 }, /* GL_TEXTURE_TYPE_QCOM */
+ { 53204, 0x00008BD8 }, /* GL_TEXTURE_IMAGE_VALID_QCOM */
+ { 53232, 0x00008BD9 }, /* GL_TEXTURE_NUM_LEVELS_QCOM */
+ { 53259, 0x00008BDA }, /* GL_TEXTURE_TARGET_QCOM */
+ { 53282, 0x00008BDB }, /* GL_TEXTURE_OBJECT_VALID_QCOM */
+ { 53311, 0x00008BDC }, /* GL_STATE_RESTORE */
+ { 53328, 0x00008BE7 }, /* GL_SAMPLER_EXTERNAL_2D_Y2Y_EXT */
+ { 53359, 0x00008BFA }, /* GL_TEXTURE_PROTECTED_EXT */
+ { 53384, 0x00008C00 }, /* GL_COMPRESSED_RGB_PVRTC_4BPPV1_IMG */
+ { 53419, 0x00008C01 }, /* GL_COMPRESSED_RGB_PVRTC_2BPPV1_IMG */
+ { 53454, 0x00008C02 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV1_IMG */
+ { 53490, 0x00008C03 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV1_IMG */
+ { 53526, 0x00008C04 }, /* GL_MODULATE_COLOR_IMG */
+ { 53548, 0x00008C05 }, /* GL_RECIP_ADD_SIGNED_ALPHA_IMG */
+ { 53578, 0x00008C06 }, /* GL_TEXTURE_ALPHA_MODULATE_IMG */
+ { 53608, 0x00008C07 }, /* GL_FACTOR_ALPHA_MODULATE_IMG */
+ { 53637, 0x00008C08 }, /* GL_FRAGMENT_ALPHA_MODULATE_IMG */
+ { 53668, 0x00008C09 }, /* GL_ADD_BLEND_IMG */
+ { 53685, 0x00008C0A }, /* GL_SGX_BINARY_IMG */
+ { 53703, 0x00008C10 }, /* GL_TEXTURE_RED_TYPE */
+ { 53723, 0x00008C11 }, /* GL_TEXTURE_GREEN_TYPE */
+ { 53745, 0x00008C12 }, /* GL_TEXTURE_BLUE_TYPE */
+ { 53766, 0x00008C13 }, /* GL_TEXTURE_ALPHA_TYPE */
+ { 53788, 0x00008C14 }, /* GL_TEXTURE_LUMINANCE_TYPE */
+ { 53814, 0x00008C15 }, /* GL_TEXTURE_INTENSITY_TYPE */
+ { 53840, 0x00008C16 }, /* GL_TEXTURE_DEPTH_TYPE */
+ { 53862, 0x00008C17 }, /* GL_UNSIGNED_NORMALIZED */
+ { 53885, 0x00008C18 }, /* GL_TEXTURE_1D_ARRAY */
+ { 53905, 0x00008C19 }, /* GL_PROXY_TEXTURE_1D_ARRAY */
+ { 53931, 0x00008C1A }, /* GL_TEXTURE_2D_ARRAY */
+ { 53951, 0x00008C1B }, /* GL_PROXY_TEXTURE_2D_ARRAY */
+ { 53977, 0x00008C1C }, /* GL_TEXTURE_BINDING_1D_ARRAY */
+ { 54005, 0x00008C1D }, /* GL_TEXTURE_BINDING_2D_ARRAY */
+ { 54033, 0x00008C26 }, /* GL_GEOMETRY_PROGRAM_NV */
+ { 54056, 0x00008C27 }, /* GL_MAX_PROGRAM_OUTPUT_VERTICES_NV */
+ { 54090, 0x00008C28 }, /* GL_MAX_PROGRAM_TOTAL_OUTPUT_COMPONENTS_NV */
+ { 54132, 0x00008C29 }, /* GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS */
+ { 54168, 0x00008C2A }, /* GL_TEXTURE_BUFFER_BINDING */
+ { 54194, 0x00008C2B }, /* GL_MAX_TEXTURE_BUFFER_SIZE */
+ { 54221, 0x00008C2C }, /* GL_TEXTURE_BINDING_BUFFER */
+ { 54247, 0x00008C2D }, /* GL_TEXTURE_BUFFER_DATA_STORE_BINDING */
+ { 54284, 0x00008C2E }, /* GL_TEXTURE_BUFFER_FORMAT_ARB */
+ { 54313, 0x00008C2F }, /* GL_ANY_SAMPLES_PASSED */
+ { 54335, 0x00008C36 }, /* GL_SAMPLE_SHADING */
+ { 54353, 0x00008C37 }, /* GL_MIN_SAMPLE_SHADING_VALUE */
+ { 54381, 0x00008C3A }, /* GL_R11F_G11F_B10F */
+ { 54399, 0x00008C3B }, /* GL_UNSIGNED_INT_10F_11F_11F_REV */
+ { 54431, 0x00008C3C }, /* GL_RGBA_SIGNED_COMPONENTS_EXT */
+ { 54461, 0x00008C3D }, /* GL_RGB9_E5 */
+ { 54472, 0x00008C3E }, /* GL_UNSIGNED_INT_5_9_9_9_REV */
+ { 54500, 0x00008C3F }, /* GL_TEXTURE_SHARED_SIZE */
+ { 54523, 0x00008C40 }, /* GL_SRGB */
+ { 54531, 0x00008C41 }, /* GL_SRGB8 */
+ { 54540, 0x00008C42 }, /* GL_SRGB_ALPHA */
+ { 54554, 0x00008C43 }, /* GL_SRGB8_ALPHA8 */
+ { 54570, 0x00008C44 }, /* GL_SLUMINANCE_ALPHA */
+ { 54590, 0x00008C45 }, /* GL_SLUMINANCE8_ALPHA8 */
+ { 54612, 0x00008C46 }, /* GL_SLUMINANCE */
+ { 54626, 0x00008C47 }, /* GL_SLUMINANCE8 */
+ { 54641, 0x00008C48 }, /* GL_COMPRESSED_SRGB */
+ { 54660, 0x00008C49 }, /* GL_COMPRESSED_SRGB_ALPHA */
+ { 54685, 0x00008C4A }, /* GL_COMPRESSED_SLUMINANCE */
+ { 54710, 0x00008C4B }, /* GL_COMPRESSED_SLUMINANCE_ALPHA */
+ { 54741, 0x00008C4C }, /* GL_COMPRESSED_SRGB_S3TC_DXT1_EXT */
+ { 54774, 0x00008C4D }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT1_EXT */
+ { 54813, 0x00008C4E }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT3_EXT */
+ { 54852, 0x00008C4F }, /* GL_COMPRESSED_SRGB_ALPHA_S3TC_DXT5_EXT */
+ { 54891, 0x00008C70 }, /* GL_COMPRESSED_LUMINANCE_LATC1_EXT */
+ { 54925, 0x00008C71 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_LATC1_EXT */
+ { 54966, 0x00008C72 }, /* GL_COMPRESSED_LUMINANCE_ALPHA_LATC2_EXT */
+ { 55006, 0x00008C73 }, /* GL_COMPRESSED_SIGNED_LUMINANCE_ALPHA_LATC2_EXT */
+ { 55053, 0x00008C74 }, /* GL_TESS_CONTROL_PROGRAM_PARAMETER_BUFFER_NV */
+ { 55097, 0x00008C75 }, /* GL_TESS_EVALUATION_PROGRAM_PARAMETER_BUFFER_NV */
+ { 55144, 0x00008C76 }, /* GL_TRANSFORM_FEEDBACK_VARYING_MAX_LENGTH */
+ { 55185, 0x00008C77 }, /* GL_BACK_PRIMARY_COLOR_NV */
+ { 55210, 0x00008C78 }, /* GL_BACK_SECONDARY_COLOR_NV */
+ { 55237, 0x00008C79 }, /* GL_TEXTURE_COORD_NV */
+ { 55257, 0x00008C7A }, /* GL_CLIP_DISTANCE_NV */
+ { 55277, 0x00008C7B }, /* GL_VERTEX_ID_NV */
+ { 55293, 0x00008C7C }, /* GL_PRIMITIVE_ID_NV */
+ { 55312, 0x00008C7D }, /* GL_GENERIC_ATTRIB_NV */
+ { 55333, 0x00008C7E }, /* GL_TRANSFORM_FEEDBACK_ATTRIBS_NV */
+ { 55366, 0x00008C7F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_MODE */
+ { 55400, 0x00008C80 }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS */
+ { 55446, 0x00008C81 }, /* GL_ACTIVE_VARYINGS_NV */
+ { 55468, 0x00008C82 }, /* GL_ACTIVE_VARYING_MAX_LENGTH_NV */
+ { 55500, 0x00008C83 }, /* GL_TRANSFORM_FEEDBACK_VARYINGS */
+ { 55531, 0x00008C84 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_START */
+ { 55566, 0x00008C85 }, /* GL_TRANSFORM_FEEDBACK_BUFFER_SIZE */
+ { 55600, 0x00008C86 }, /* GL_TRANSFORM_FEEDBACK_RECORD_NV */
+ { 55632, 0x00008C87 }, /* GL_PRIMITIVES_GENERATED */
+ { 55656, 0x00008C88 }, /* GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN */
+ { 55697, 0x00008C89 }, /* GL_RASTERIZER_DISCARD */
+ { 55719, 0x00008C8A }, /* GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS */
+ { 55768, 0x00008C8B }, /* GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS */
+ { 55811, 0x00008C8C }, /* GL_INTERLEAVED_ATTRIBS */
+ { 55834, 0x00008C8D }, /* GL_SEPARATE_ATTRIBS */
+ { 55854, 0x00008C8E }, /* GL_TRANSFORM_FEEDBACK_BUFFER */
+ { 55883, 0x00008C8F }, /* GL_TRANSFORM_FEEDBACK_BUFFER_BINDING */
+ { 55920, 0x00008C92 }, /* GL_ATC_RGB_AMD */
+ { 55935, 0x00008C93 }, /* GL_ATC_RGBA_EXPLICIT_ALPHA_AMD */
+ { 55966, 0x00008CA0 }, /* GL_POINT_SPRITE_COORD_ORIGIN */
+ { 55995, 0x00008CA1 }, /* GL_LOWER_LEFT */
+ { 56009, 0x00008CA2 }, /* GL_UPPER_LEFT */
+ { 56023, 0x00008CA3 }, /* GL_STENCIL_BACK_REF */
+ { 56043, 0x00008CA4 }, /* GL_STENCIL_BACK_VALUE_MASK */
+ { 56070, 0x00008CA5 }, /* GL_STENCIL_BACK_WRITEMASK */
+ { 56096, 0x00008CA6 }, /* GL_FRAMEBUFFER_BINDING */
+ { 56119, 0x00008CA7 }, /* GL_RENDERBUFFER_BINDING */
+ { 56143, 0x00008CA8 }, /* GL_READ_FRAMEBUFFER */
+ { 56163, 0x00008CA9 }, /* GL_DRAW_FRAMEBUFFER */
+ { 56183, 0x00008CAA }, /* GL_READ_FRAMEBUFFER_BINDING */
+ { 56211, 0x00008CAB }, /* GL_RENDERBUFFER_SAMPLES */
+ { 56235, 0x00008CAC }, /* GL_DEPTH_COMPONENT32F */
+ { 56257, 0x00008CAD }, /* GL_DEPTH32F_STENCIL8 */
+ { 56278, 0x00008CD0 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE */
+ { 56316, 0x00008CD1 }, /* GL_FRAMEBUFFER_ATTACHMENT_OBJECT_NAME */
+ { 56354, 0x00008CD2 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LEVEL */
+ { 56394, 0x00008CD3 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_CUBE_MAP_FACE */
+ { 56442, 0x00008CD4 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_LAYER */
+ { 56482, 0x00008CD5 }, /* GL_FRAMEBUFFER_COMPLETE */
+ { 56506, 0x00008CD6 }, /* GL_FRAMEBUFFER_INCOMPLETE_ATTACHMENT */
+ { 56543, 0x00008CD7 }, /* GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT */
+ { 56588, 0x00008CD9 }, /* GL_FRAMEBUFFER_INCOMPLETE_DIMENSIONS */
+ { 56625, 0x00008CDA }, /* GL_FRAMEBUFFER_INCOMPLETE_FORMATS_EXT */
+ { 56663, 0x00008CDB }, /* GL_FRAMEBUFFER_INCOMPLETE_DRAW_BUFFER */
+ { 56701, 0x00008CDC }, /* GL_FRAMEBUFFER_INCOMPLETE_READ_BUFFER */
+ { 56739, 0x00008CDD }, /* GL_FRAMEBUFFER_UNSUPPORTED */
+ { 56766, 0x00008CDF }, /* GL_MAX_COLOR_ATTACHMENTS */
+ { 56791, 0x00008CE0 }, /* GL_COLOR_ATTACHMENT0 */
+ { 56812, 0x00008CE1 }, /* GL_COLOR_ATTACHMENT1 */
+ { 56833, 0x00008CE2 }, /* GL_COLOR_ATTACHMENT2 */
+ { 56854, 0x00008CE3 }, /* GL_COLOR_ATTACHMENT3 */
+ { 56875, 0x00008CE4 }, /* GL_COLOR_ATTACHMENT4 */
+ { 56896, 0x00008CE5 }, /* GL_COLOR_ATTACHMENT5 */
+ { 56917, 0x00008CE6 }, /* GL_COLOR_ATTACHMENT6 */
+ { 56938, 0x00008CE7 }, /* GL_COLOR_ATTACHMENT7 */
+ { 56959, 0x00008CE8 }, /* GL_COLOR_ATTACHMENT8 */
+ { 56980, 0x00008CE9 }, /* GL_COLOR_ATTACHMENT9 */
+ { 57001, 0x00008CEA }, /* GL_COLOR_ATTACHMENT10 */
+ { 57023, 0x00008CEB }, /* GL_COLOR_ATTACHMENT11 */
+ { 57045, 0x00008CEC }, /* GL_COLOR_ATTACHMENT12 */
+ { 57067, 0x00008CED }, /* GL_COLOR_ATTACHMENT13 */
+ { 57089, 0x00008CEE }, /* GL_COLOR_ATTACHMENT14 */
+ { 57111, 0x00008CEF }, /* GL_COLOR_ATTACHMENT15 */
+ { 57133, 0x00008CF0 }, /* GL_COLOR_ATTACHMENT16 */
+ { 57155, 0x00008CF1 }, /* GL_COLOR_ATTACHMENT17 */
+ { 57177, 0x00008CF2 }, /* GL_COLOR_ATTACHMENT18 */
+ { 57199, 0x00008CF3 }, /* GL_COLOR_ATTACHMENT19 */
+ { 57221, 0x00008CF4 }, /* GL_COLOR_ATTACHMENT20 */
+ { 57243, 0x00008CF5 }, /* GL_COLOR_ATTACHMENT21 */
+ { 57265, 0x00008CF6 }, /* GL_COLOR_ATTACHMENT22 */
+ { 57287, 0x00008CF7 }, /* GL_COLOR_ATTACHMENT23 */
+ { 57309, 0x00008CF8 }, /* GL_COLOR_ATTACHMENT24 */
+ { 57331, 0x00008CF9 }, /* GL_COLOR_ATTACHMENT25 */
+ { 57353, 0x00008CFA }, /* GL_COLOR_ATTACHMENT26 */
+ { 57375, 0x00008CFB }, /* GL_COLOR_ATTACHMENT27 */
+ { 57397, 0x00008CFC }, /* GL_COLOR_ATTACHMENT28 */
+ { 57419, 0x00008CFD }, /* GL_COLOR_ATTACHMENT29 */
+ { 57441, 0x00008CFE }, /* GL_COLOR_ATTACHMENT30 */
+ { 57463, 0x00008CFF }, /* GL_COLOR_ATTACHMENT31 */
+ { 57485, 0x00008D00 }, /* GL_DEPTH_ATTACHMENT */
+ { 57505, 0x00008D20 }, /* GL_STENCIL_ATTACHMENT */
+ { 57527, 0x00008D40 }, /* GL_FRAMEBUFFER */
+ { 57542, 0x00008D41 }, /* GL_RENDERBUFFER */
+ { 57558, 0x00008D42 }, /* GL_RENDERBUFFER_WIDTH */
+ { 57580, 0x00008D43 }, /* GL_RENDERBUFFER_HEIGHT */
+ { 57603, 0x00008D44 }, /* GL_RENDERBUFFER_INTERNAL_FORMAT */
+ { 57635, 0x00008D46 }, /* GL_STENCIL_INDEX1 */
+ { 57653, 0x00008D47 }, /* GL_STENCIL_INDEX4 */
+ { 57671, 0x00008D48 }, /* GL_STENCIL_INDEX8 */
+ { 57689, 0x00008D49 }, /* GL_STENCIL_INDEX16 */
+ { 57708, 0x00008D50 }, /* GL_RENDERBUFFER_RED_SIZE */
+ { 57733, 0x00008D51 }, /* GL_RENDERBUFFER_GREEN_SIZE */
+ { 57760, 0x00008D52 }, /* GL_RENDERBUFFER_BLUE_SIZE */
+ { 57786, 0x00008D53 }, /* GL_RENDERBUFFER_ALPHA_SIZE */
+ { 57813, 0x00008D54 }, /* GL_RENDERBUFFER_DEPTH_SIZE */
+ { 57840, 0x00008D55 }, /* GL_RENDERBUFFER_STENCIL_SIZE */
+ { 57869, 0x00008D56 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE */
+ { 57907, 0x00008D57 }, /* GL_MAX_SAMPLES */
+ { 57922, 0x00008D60 }, /* GL_TEXTURE_GEN_STR_OES */
+ { 57945, 0x00008D61 }, /* GL_HALF_FLOAT_OES */
+ { 57963, 0x00008D62 }, /* GL_RGB565 */
+ { 57973, 0x00008D64 }, /* GL_ETC1_RGB8_OES */
+ { 57990, 0x00008D65 }, /* GL_TEXTURE_EXTERNAL_OES */
+ { 58014, 0x00008D66 }, /* GL_SAMPLER_EXTERNAL_OES */
+ { 58038, 0x00008D67 }, /* GL_TEXTURE_BINDING_EXTERNAL_OES */
+ { 58070, 0x00008D68 }, /* GL_REQUIRED_TEXTURE_IMAGE_UNITS_OES */
+ { 58106, 0x00008D69 }, /* GL_PRIMITIVE_RESTART_FIXED_INDEX */
+ { 58139, 0x00008D6A }, /* GL_ANY_SAMPLES_PASSED_CONSERVATIVE */
+ { 58174, 0x00008D6B }, /* GL_MAX_ELEMENT_INDEX */
+ { 58195, 0x00008D6C }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SAMPLES_EXT */
+ { 58241, 0x00008D70 }, /* GL_RGBA32UI */
+ { 58253, 0x00008D71 }, /* GL_RGB32UI */
+ { 58264, 0x00008D72 }, /* GL_ALPHA32UI_EXT */
+ { 58281, 0x00008D73 }, /* GL_INTENSITY32UI_EXT */
+ { 58302, 0x00008D74 }, /* GL_LUMINANCE32UI_EXT */
+ { 58323, 0x00008D75 }, /* GL_LUMINANCE_ALPHA32UI_EXT */
+ { 58350, 0x00008D76 }, /* GL_RGBA16UI */
+ { 58362, 0x00008D77 }, /* GL_RGB16UI */
+ { 58373, 0x00008D78 }, /* GL_ALPHA16UI_EXT */
+ { 58390, 0x00008D79 }, /* GL_INTENSITY16UI_EXT */
+ { 58411, 0x00008D7A }, /* GL_LUMINANCE16UI_EXT */
+ { 58432, 0x00008D7B }, /* GL_LUMINANCE_ALPHA16UI_EXT */
+ { 58459, 0x00008D7C }, /* GL_RGBA8UI */
+ { 58470, 0x00008D7D }, /* GL_RGB8UI */
+ { 58480, 0x00008D7E }, /* GL_ALPHA8UI_EXT */
+ { 58496, 0x00008D7F }, /* GL_INTENSITY8UI_EXT */
+ { 58516, 0x00008D80 }, /* GL_LUMINANCE8UI_EXT */
+ { 58536, 0x00008D81 }, /* GL_LUMINANCE_ALPHA8UI_EXT */
+ { 58562, 0x00008D82 }, /* GL_RGBA32I */
+ { 58573, 0x00008D83 }, /* GL_RGB32I */
+ { 58583, 0x00008D84 }, /* GL_ALPHA32I_EXT */
+ { 58599, 0x00008D85 }, /* GL_INTENSITY32I_EXT */
+ { 58619, 0x00008D86 }, /* GL_LUMINANCE32I_EXT */
+ { 58639, 0x00008D87 }, /* GL_LUMINANCE_ALPHA32I_EXT */
+ { 58665, 0x00008D88 }, /* GL_RGBA16I */
+ { 58676, 0x00008D89 }, /* GL_RGB16I */
+ { 58686, 0x00008D8A }, /* GL_ALPHA16I_EXT */
+ { 58702, 0x00008D8B }, /* GL_INTENSITY16I_EXT */
+ { 58722, 0x00008D8C }, /* GL_LUMINANCE16I_EXT */
+ { 58742, 0x00008D8D }, /* GL_LUMINANCE_ALPHA16I_EXT */
+ { 58768, 0x00008D8E }, /* GL_RGBA8I */
+ { 58778, 0x00008D8F }, /* GL_RGB8I */
+ { 58787, 0x00008D90 }, /* GL_ALPHA8I_EXT */
+ { 58802, 0x00008D91 }, /* GL_INTENSITY8I_EXT */
+ { 58821, 0x00008D92 }, /* GL_LUMINANCE8I_EXT */
+ { 58840, 0x00008D93 }, /* GL_LUMINANCE_ALPHA8I_EXT */
+ { 58865, 0x00008D94 }, /* GL_RED_INTEGER */
+ { 58880, 0x00008D95 }, /* GL_GREEN_INTEGER */
+ { 58897, 0x00008D96 }, /* GL_BLUE_INTEGER */
+ { 58913, 0x00008D97 }, /* GL_ALPHA_INTEGER */
+ { 58930, 0x00008D98 }, /* GL_RGB_INTEGER */
+ { 58945, 0x00008D99 }, /* GL_RGBA_INTEGER */
+ { 58961, 0x00008D9A }, /* GL_BGR_INTEGER */
+ { 58976, 0x00008D9B }, /* GL_BGRA_INTEGER */
+ { 58992, 0x00008D9C }, /* GL_LUMINANCE_INTEGER_EXT */
+ { 59017, 0x00008D9D }, /* GL_LUMINANCE_ALPHA_INTEGER_EXT */
+ { 59048, 0x00008D9E }, /* GL_RGBA_INTEGER_MODE_EXT */
+ { 59073, 0x00008D9F }, /* GL_INT_2_10_10_10_REV */
+ { 59095, 0x00008DA0 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_BINDINGS_NV */
+ { 59139, 0x00008DA1 }, /* GL_MAX_PROGRAM_PARAMETER_BUFFER_SIZE_NV */
+ { 59179, 0x00008DA2 }, /* GL_VERTEX_PROGRAM_PARAMETER_BUFFER_NV */
+ { 59217, 0x00008DA3 }, /* GL_GEOMETRY_PROGRAM_PARAMETER_BUFFER_NV */
+ { 59257, 0x00008DA4 }, /* GL_FRAGMENT_PROGRAM_PARAMETER_BUFFER_NV */
+ { 59297, 0x00008DA5 }, /* GL_MAX_PROGRAM_GENERIC_ATTRIBS_NV */
+ { 59331, 0x00008DA6 }, /* GL_MAX_PROGRAM_GENERIC_RESULTS_NV */
+ { 59365, 0x00008DA7 }, /* GL_FRAMEBUFFER_ATTACHMENT_LAYERED */
+ { 59399, 0x00008DA8 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_TARGETS */
+ { 59439, 0x00008DA9 }, /* GL_FRAMEBUFFER_INCOMPLETE_LAYER_COUNT_ARB */
+ { 59481, 0x00008DAA }, /* GL_LAYER_NV */
+ { 59493, 0x00008DAB }, /* GL_DEPTH_COMPONENT32F_NV */
+ { 59518, 0x00008DAC }, /* GL_DEPTH32F_STENCIL8_NV */
+ { 59542, 0x00008DAD }, /* GL_FLOAT_32_UNSIGNED_INT_24_8_REV */
+ { 59576, 0x00008DAE }, /* GL_SHADER_INCLUDE_ARB */
+ { 59598, 0x00008DAF }, /* GL_DEPTH_BUFFER_FLOAT_MODE_NV */
+ { 59628, 0x00008DB9 }, /* GL_FRAMEBUFFER_SRGB */
+ { 59648, 0x00008DBA }, /* GL_FRAMEBUFFER_SRGB_CAPABLE_EXT */
+ { 59680, 0x00008DBB }, /* GL_COMPRESSED_RED_RGTC1 */
+ { 59704, 0x00008DBC }, /* GL_COMPRESSED_SIGNED_RED_RGTC1 */
+ { 59735, 0x00008DBD }, /* GL_COMPRESSED_RG_RGTC2 */
+ { 59758, 0x00008DBE }, /* GL_COMPRESSED_SIGNED_RG_RGTC2 */
+ { 59788, 0x00008DC0 }, /* GL_SAMPLER_1D_ARRAY */
+ { 59808, 0x00008DC1 }, /* GL_SAMPLER_2D_ARRAY */
+ { 59828, 0x00008DC2 }, /* GL_SAMPLER_BUFFER */
+ { 59846, 0x00008DC3 }, /* GL_SAMPLER_1D_ARRAY_SHADOW */
+ { 59873, 0x00008DC4 }, /* GL_SAMPLER_2D_ARRAY_SHADOW */
+ { 59900, 0x00008DC5 }, /* GL_SAMPLER_CUBE_SHADOW */
+ { 59923, 0x00008DC6 }, /* GL_UNSIGNED_INT_VEC2 */
+ { 59944, 0x00008DC7 }, /* GL_UNSIGNED_INT_VEC3 */
+ { 59965, 0x00008DC8 }, /* GL_UNSIGNED_INT_VEC4 */
+ { 59986, 0x00008DC9 }, /* GL_INT_SAMPLER_1D */
+ { 60004, 0x00008DCA }, /* GL_INT_SAMPLER_2D */
+ { 60022, 0x00008DCB }, /* GL_INT_SAMPLER_3D */
+ { 60040, 0x00008DCC }, /* GL_INT_SAMPLER_CUBE */
+ { 60060, 0x00008DCD }, /* GL_INT_SAMPLER_2D_RECT */
+ { 60083, 0x00008DCE }, /* GL_INT_SAMPLER_1D_ARRAY */
+ { 60107, 0x00008DCF }, /* GL_INT_SAMPLER_2D_ARRAY */
+ { 60131, 0x00008DD0 }, /* GL_INT_SAMPLER_BUFFER */
+ { 60153, 0x00008DD1 }, /* GL_UNSIGNED_INT_SAMPLER_1D */
+ { 60180, 0x00008DD2 }, /* GL_UNSIGNED_INT_SAMPLER_2D */
+ { 60207, 0x00008DD3 }, /* GL_UNSIGNED_INT_SAMPLER_3D */
+ { 60234, 0x00008DD4 }, /* GL_UNSIGNED_INT_SAMPLER_CUBE */
+ { 60263, 0x00008DD5 }, /* GL_UNSIGNED_INT_SAMPLER_2D_RECT */
+ { 60295, 0x00008DD6 }, /* GL_UNSIGNED_INT_SAMPLER_1D_ARRAY */
+ { 60328, 0x00008DD7 }, /* GL_UNSIGNED_INT_SAMPLER_2D_ARRAY */
+ { 60361, 0x00008DD8 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER */
+ { 60392, 0x00008DD9 }, /* GL_GEOMETRY_SHADER */
+ { 60411, 0x00008DDA }, /* GL_GEOMETRY_VERTICES_OUT_ARB */
+ { 60440, 0x00008DDB }, /* GL_GEOMETRY_INPUT_TYPE_ARB */
+ { 60467, 0x00008DDC }, /* GL_GEOMETRY_OUTPUT_TYPE_ARB */
+ { 60495, 0x00008DDD }, /* GL_MAX_GEOMETRY_VARYING_COMPONENTS_ARB */
+ { 60534, 0x00008DDE }, /* GL_MAX_VERTEX_VARYING_COMPONENTS_ARB */
+ { 60571, 0x00008DDF }, /* GL_MAX_GEOMETRY_UNIFORM_COMPONENTS */
+ { 60606, 0x00008DE0 }, /* GL_MAX_GEOMETRY_OUTPUT_VERTICES */
+ { 60638, 0x00008DE1 }, /* GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS */
+ { 60678, 0x00008DE2 }, /* GL_MAX_VERTEX_BINDABLE_UNIFORMS_EXT */
+ { 60714, 0x00008DE3 }, /* GL_MAX_FRAGMENT_BINDABLE_UNIFORMS_EXT */
+ { 60752, 0x00008DE4 }, /* GL_MAX_GEOMETRY_BINDABLE_UNIFORMS_EXT */
+ { 60790, 0x00008DE5 }, /* GL_ACTIVE_SUBROUTINES */
+ { 60812, 0x00008DE6 }, /* GL_ACTIVE_SUBROUTINE_UNIFORMS */
+ { 60842, 0x00008DE7 }, /* GL_MAX_SUBROUTINES */
+ { 60861, 0x00008DE8 }, /* GL_MAX_SUBROUTINE_UNIFORM_LOCATIONS */
+ { 60897, 0x00008DE9 }, /* GL_NAMED_STRING_LENGTH_ARB */
+ { 60924, 0x00008DEA }, /* GL_NAMED_STRING_TYPE_ARB */
+ { 60949, 0x00008DED }, /* GL_MAX_BINDABLE_UNIFORM_SIZE_EXT */
+ { 60982, 0x00008DEE }, /* GL_UNIFORM_BUFFER_EXT */
+ { 61004, 0x00008DEF }, /* GL_UNIFORM_BUFFER_BINDING_EXT */
+ { 61034, 0x00008DF0 }, /* GL_LOW_FLOAT */
+ { 61047, 0x00008DF1 }, /* GL_MEDIUM_FLOAT */
+ { 61063, 0x00008DF2 }, /* GL_HIGH_FLOAT */
+ { 61077, 0x00008DF3 }, /* GL_LOW_INT */
+ { 61088, 0x00008DF4 }, /* GL_MEDIUM_INT */
+ { 61102, 0x00008DF5 }, /* GL_HIGH_INT */
+ { 61114, 0x00008DF6 }, /* GL_UNSIGNED_INT_10_10_10_2_OES */
+ { 61145, 0x00008DF7 }, /* GL_INT_10_10_10_2_OES */
+ { 61167, 0x00008DF8 }, /* GL_SHADER_BINARY_FORMATS */
+ { 61192, 0x00008DF9 }, /* GL_NUM_SHADER_BINARY_FORMATS */
+ { 61221, 0x00008DFA }, /* GL_SHADER_COMPILER */
+ { 61240, 0x00008DFB }, /* GL_MAX_VERTEX_UNIFORM_VECTORS */
+ { 61270, 0x00008DFC }, /* GL_MAX_VARYING_VECTORS */
+ { 61293, 0x00008DFD }, /* GL_MAX_FRAGMENT_UNIFORM_VECTORS */
+ { 61325, 0x00008E10 }, /* GL_RENDERBUFFER_COLOR_SAMPLES_NV */
+ { 61358, 0x00008E11 }, /* GL_MAX_MULTISAMPLE_COVERAGE_MODES_NV */
+ { 61395, 0x00008E12 }, /* GL_MULTISAMPLE_COVERAGE_MODES_NV */
+ { 61428, 0x00008E13 }, /* GL_QUERY_WAIT */
+ { 61442, 0x00008E14 }, /* GL_QUERY_NO_WAIT */
+ { 61459, 0x00008E15 }, /* GL_QUERY_BY_REGION_WAIT */
+ { 61483, 0x00008E16 }, /* GL_QUERY_BY_REGION_NO_WAIT */
+ { 61510, 0x00008E17 }, /* GL_QUERY_WAIT_INVERTED */
+ { 61533, 0x00008E18 }, /* GL_QUERY_NO_WAIT_INVERTED */
+ { 61559, 0x00008E19 }, /* GL_QUERY_BY_REGION_WAIT_INVERTED */
+ { 61592, 0x00008E1A }, /* GL_QUERY_BY_REGION_NO_WAIT_INVERTED */
+ { 61628, 0x00008E1B }, /* GL_POLYGON_OFFSET_CLAMP */
+ { 61652, 0x00008E1E }, /* GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS */
+ { 61700, 0x00008E1F }, /* GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS */
+ { 61751, 0x00008E20 }, /* GL_COLOR_SAMPLES_NV */
+ { 61771, 0x00008E22 }, /* GL_TRANSFORM_FEEDBACK */
+ { 61793, 0x00008E23 }, /* GL_TRANSFORM_FEEDBACK_PAUSED */
+ { 61822, 0x00008E24 }, /* GL_TRANSFORM_FEEDBACK_ACTIVE */
+ { 61851, 0x00008E25 }, /* GL_TRANSFORM_FEEDBACK_BINDING */
+ { 61881, 0x00008E26 }, /* GL_FRAME_NV */
+ { 61893, 0x00008E27 }, /* GL_FIELDS_NV */
+ { 61906, 0x00008E28 }, /* GL_TIMESTAMP */
+ { 61919, 0x00008E29 }, /* GL_NUM_FILL_STREAMS_NV */
+ { 61942, 0x00008E2A }, /* GL_PRESENT_TIME_NV */
+ { 61961, 0x00008E2B }, /* GL_PRESENT_DURATION_NV */
+ { 61984, 0x00008E2C }, /* GL_DEPTH_COMPONENT16_NONLINEAR_NV */
+ { 62018, 0x00008E2D }, /* GL_PROGRAM_MATRIX_EXT */
+ { 62040, 0x00008E2E }, /* GL_TRANSPOSE_PROGRAM_MATRIX_EXT */
+ { 62072, 0x00008E2F }, /* GL_PROGRAM_MATRIX_STACK_DEPTH_EXT */
+ { 62106, 0x00008E42 }, /* GL_TEXTURE_SWIZZLE_R */
+ { 62127, 0x00008E43 }, /* GL_TEXTURE_SWIZZLE_G */
+ { 62148, 0x00008E44 }, /* GL_TEXTURE_SWIZZLE_B */
+ { 62169, 0x00008E45 }, /* GL_TEXTURE_SWIZZLE_A */
+ { 62190, 0x00008E46 }, /* GL_TEXTURE_SWIZZLE_RGBA */
+ { 62214, 0x00008E47 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_LOCATIONS */
+ { 62253, 0x00008E48 }, /* GL_ACTIVE_SUBROUTINE_MAX_LENGTH */
+ { 62285, 0x00008E49 }, /* GL_ACTIVE_SUBROUTINE_UNIFORM_MAX_LENGTH */
+ { 62325, 0x00008E4A }, /* GL_NUM_COMPATIBLE_SUBROUTINES */
+ { 62355, 0x00008E4B }, /* GL_COMPATIBLE_SUBROUTINES */
+ { 62381, 0x00008E4C }, /* GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION */
+ { 62425, 0x00008E4D }, /* GL_FIRST_VERTEX_CONVENTION */
+ { 62452, 0x00008E4E }, /* GL_LAST_VERTEX_CONVENTION */
+ { 62478, 0x00008E4F }, /* GL_PROVOKING_VERTEX */
+ { 62498, 0x00008E50 }, /* GL_SAMPLE_POSITION */
+ { 62517, 0x00008E51 }, /* GL_SAMPLE_MASK */
+ { 62532, 0x00008E52 }, /* GL_SAMPLE_MASK_VALUE */
+ { 62553, 0x00008E53 }, /* GL_TEXTURE_BINDING_RENDERBUFFER_NV */
+ { 62588, 0x00008E54 }, /* GL_TEXTURE_RENDERBUFFER_DATA_STORE_BINDING_NV */
+ { 62634, 0x00008E55 }, /* GL_TEXTURE_RENDERBUFFER_NV */
+ { 62661, 0x00008E56 }, /* GL_SAMPLER_RENDERBUFFER_NV */
+ { 62688, 0x00008E57 }, /* GL_INT_SAMPLER_RENDERBUFFER_NV */
+ { 62719, 0x00008E58 }, /* GL_UNSIGNED_INT_SAMPLER_RENDERBUFFER_NV */
+ { 62759, 0x00008E59 }, /* GL_MAX_SAMPLE_MASK_WORDS */
+ { 62784, 0x00008E5A }, /* GL_MAX_GEOMETRY_SHADER_INVOCATIONS */
+ { 62819, 0x00008E5B }, /* GL_MIN_FRAGMENT_INTERPOLATION_OFFSET */
+ { 62856, 0x00008E5C }, /* GL_MAX_FRAGMENT_INTERPOLATION_OFFSET */
+ { 62893, 0x00008E5D }, /* GL_FRAGMENT_INTERPOLATION_OFFSET_BITS */
+ { 62931, 0x00008E5E }, /* GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET */
+ { 62968, 0x00008E5F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET */
+ { 63005, 0x00008E70 }, /* GL_MAX_TRANSFORM_FEEDBACK_BUFFERS */
+ { 63039, 0x00008E71 }, /* GL_MAX_VERTEX_STREAMS */
+ { 63061, 0x00008E72 }, /* GL_PATCH_VERTICES */
+ { 63079, 0x00008E73 }, /* GL_PATCH_DEFAULT_INNER_LEVEL */
+ { 63108, 0x00008E74 }, /* GL_PATCH_DEFAULT_OUTER_LEVEL */
+ { 63137, 0x00008E75 }, /* GL_TESS_CONTROL_OUTPUT_VERTICES */
+ { 63169, 0x00008E76 }, /* GL_TESS_GEN_MODE */
+ { 63186, 0x00008E77 }, /* GL_TESS_GEN_SPACING */
+ { 63206, 0x00008E78 }, /* GL_TESS_GEN_VERTEX_ORDER */
+ { 63231, 0x00008E79 }, /* GL_TESS_GEN_POINT_MODE */
+ { 63254, 0x00008E7A }, /* GL_ISOLINES */
+ { 63266, 0x00008E7B }, /* GL_FRACTIONAL_ODD */
+ { 63284, 0x00008E7C }, /* GL_FRACTIONAL_EVEN */
+ { 63303, 0x00008E7D }, /* GL_MAX_PATCH_VERTICES */
+ { 63325, 0x00008E7E }, /* GL_MAX_TESS_GEN_LEVEL */
+ { 63347, 0x00008E7F }, /* GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS */
+ { 63386, 0x00008E80 }, /* GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS */
+ { 63428, 0x00008E81 }, /* GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS */
+ { 63468, 0x00008E82 }, /* GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS */
+ { 63511, 0x00008E83 }, /* GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS */
+ { 63549, 0x00008E84 }, /* GL_MAX_TESS_PATCH_COMPONENTS */
+ { 63578, 0x00008E85 }, /* GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS */
+ { 63622, 0x00008E86 }, /* GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS */
+ { 63663, 0x00008E87 }, /* GL_TESS_EVALUATION_SHADER */
+ { 63689, 0x00008E88 }, /* GL_TESS_CONTROL_SHADER */
+ { 63712, 0x00008E89 }, /* GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS */
+ { 63747, 0x00008E8A }, /* GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS */
+ { 63785, 0x00008E8C }, /* GL_COMPRESSED_RGBA_BPTC_UNORM */
+ { 63815, 0x00008E8D }, /* GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM */
+ { 63851, 0x00008E8E }, /* GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT */
+ { 63887, 0x00008E8F }, /* GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT */
+ { 63925, 0x00008ED0 }, /* GL_COVERAGE_COMPONENT_NV */
+ { 63950, 0x00008ED1 }, /* GL_COVERAGE_COMPONENT4_NV */
+ { 63976, 0x00008ED2 }, /* GL_COVERAGE_ATTACHMENT_NV */
+ { 64002, 0x00008ED3 }, /* GL_COVERAGE_BUFFERS_NV */
+ { 64025, 0x00008ED4 }, /* GL_COVERAGE_SAMPLES_NV */
+ { 64048, 0x00008ED5 }, /* GL_COVERAGE_ALL_FRAGMENTS_NV */
+ { 64077, 0x00008ED6 }, /* GL_COVERAGE_EDGE_FRAGMENTS_NV */
+ { 64107, 0x00008ED7 }, /* GL_COVERAGE_AUTOMATIC_NV */
+ { 64132, 0x00008F10 }, /* GL_INCLUSIVE_EXT */
+ { 64149, 0x00008F11 }, /* GL_EXCLUSIVE_EXT */
+ { 64166, 0x00008F12 }, /* GL_WINDOW_RECTANGLE_EXT */
+ { 64190, 0x00008F13 }, /* GL_WINDOW_RECTANGLE_MODE_EXT */
+ { 64219, 0x00008F14 }, /* GL_MAX_WINDOW_RECTANGLES_EXT */
+ { 64248, 0x00008F15 }, /* GL_NUM_WINDOW_RECTANGLES_EXT */
+ { 64277, 0x00008F1D }, /* GL_BUFFER_GPU_ADDRESS_NV */
+ { 64302, 0x00008F1E }, /* GL_VERTEX_ATTRIB_ARRAY_UNIFIED_NV */
+ { 64336, 0x00008F1F }, /* GL_ELEMENT_ARRAY_UNIFIED_NV */
+ { 64364, 0x00008F20 }, /* GL_VERTEX_ATTRIB_ARRAY_ADDRESS_NV */
+ { 64398, 0x00008F21 }, /* GL_VERTEX_ARRAY_ADDRESS_NV */
+ { 64425, 0x00008F22 }, /* GL_NORMAL_ARRAY_ADDRESS_NV */
+ { 64452, 0x00008F23 }, /* GL_COLOR_ARRAY_ADDRESS_NV */
+ { 64478, 0x00008F24 }, /* GL_INDEX_ARRAY_ADDRESS_NV */
+ { 64504, 0x00008F25 }, /* GL_TEXTURE_COORD_ARRAY_ADDRESS_NV */
+ { 64538, 0x00008F26 }, /* GL_EDGE_FLAG_ARRAY_ADDRESS_NV */
+ { 64568, 0x00008F27 }, /* GL_SECONDARY_COLOR_ARRAY_ADDRESS_NV */
+ { 64604, 0x00008F28 }, /* GL_FOG_COORD_ARRAY_ADDRESS_NV */
+ { 64634, 0x00008F29 }, /* GL_ELEMENT_ARRAY_ADDRESS_NV */
+ { 64662, 0x00008F2A }, /* GL_VERTEX_ATTRIB_ARRAY_LENGTH_NV */
+ { 64695, 0x00008F2B }, /* GL_VERTEX_ARRAY_LENGTH_NV */
+ { 64721, 0x00008F2C }, /* GL_NORMAL_ARRAY_LENGTH_NV */
+ { 64747, 0x00008F2D }, /* GL_COLOR_ARRAY_LENGTH_NV */
+ { 64772, 0x00008F2E }, /* GL_INDEX_ARRAY_LENGTH_NV */
+ { 64797, 0x00008F2F }, /* GL_TEXTURE_COORD_ARRAY_LENGTH_NV */
+ { 64830, 0x00008F30 }, /* GL_EDGE_FLAG_ARRAY_LENGTH_NV */
+ { 64859, 0x00008F31 }, /* GL_SECONDARY_COLOR_ARRAY_LENGTH_NV */
+ { 64894, 0x00008F32 }, /* GL_FOG_COORD_ARRAY_LENGTH_NV */
+ { 64923, 0x00008F33 }, /* GL_ELEMENT_ARRAY_LENGTH_NV */
+ { 64950, 0x00008F34 }, /* GL_GPU_ADDRESS_NV */
+ { 64968, 0x00008F35 }, /* GL_MAX_SHADER_BUFFER_ADDRESS_NV */
+ { 65000, 0x00008F36 }, /* GL_COPY_READ_BUFFER_BINDING */
+ { 65028, 0x00008F37 }, /* GL_COPY_WRITE_BUFFER_BINDING */
+ { 65057, 0x00008F38 }, /* GL_MAX_IMAGE_UNITS */
+ { 65076, 0x00008F39 }, /* GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES */
+ { 65116, 0x00008F3A }, /* GL_IMAGE_BINDING_NAME */
+ { 65138, 0x00008F3B }, /* GL_IMAGE_BINDING_LEVEL */
+ { 65161, 0x00008F3C }, /* GL_IMAGE_BINDING_LAYERED */
+ { 65186, 0x00008F3D }, /* GL_IMAGE_BINDING_LAYER */
+ { 65209, 0x00008F3E }, /* GL_IMAGE_BINDING_ACCESS */
+ { 65233, 0x00008F3F }, /* GL_DRAW_INDIRECT_BUFFER */
+ { 65257, 0x00008F40 }, /* GL_DRAW_INDIRECT_UNIFIED_NV */
+ { 65285, 0x00008F41 }, /* GL_DRAW_INDIRECT_ADDRESS_NV */
+ { 65313, 0x00008F42 }, /* GL_DRAW_INDIRECT_LENGTH_NV */
+ { 65340, 0x00008F43 }, /* GL_DRAW_INDIRECT_BUFFER_BINDING */
+ { 65372, 0x00008F44 }, /* GL_MAX_PROGRAM_SUBROUTINE_PARAMETERS_NV */
+ { 65412, 0x00008F45 }, /* GL_MAX_PROGRAM_SUBROUTINE_NUM_NV */
+ { 65445, 0x00008F46 }, /* GL_DOUBLE_MAT2 */
+ { 65460, 0x00008F47 }, /* GL_DOUBLE_MAT3 */
+ { 65475, 0x00008F48 }, /* GL_DOUBLE_MAT4 */
+ { 65490, 0x00008F49 }, /* GL_DOUBLE_MAT2x3 */
+ { 65507, 0x00008F4A }, /* GL_DOUBLE_MAT2x4 */
+ { 65524, 0x00008F4B }, /* GL_DOUBLE_MAT3x2 */
+ { 65541, 0x00008F4C }, /* GL_DOUBLE_MAT3x4 */
+ { 65558, 0x00008F4D }, /* GL_DOUBLE_MAT4x2 */
+ { 65575, 0x00008F4E }, /* GL_DOUBLE_MAT4x3 */
+ { 65592, 0x00008F4F }, /* GL_VERTEX_BINDING_BUFFER */
+ { 65617, 0x00008F60 }, /* GL_MALI_SHADER_BINARY_ARM */
+ { 65643, 0x00008F61 }, /* GL_MALI_PROGRAM_BINARY_ARM */
+ { 65670, 0x00008F63 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_FAST_SIZE_EXT */
+ { 65718, 0x00008F64 }, /* GL_SHADER_PIXEL_LOCAL_STORAGE_EXT */
+ { 65752, 0x00008F65 }, /* GL_FETCH_PER_SAMPLE_ARM */
+ { 65776, 0x00008F66 }, /* GL_FRAGMENT_SHADER_FRAMEBUFFER_FETCH_MRT_ARM */
+ { 65821, 0x00008F67 }, /* GL_MAX_SHADER_PIXEL_LOCAL_STORAGE_SIZE_EXT */
+ { 65864, 0x00008F69 }, /* GL_TEXTURE_ASTC_DECODE_PRECISION_EXT */
+ { 65901, 0x00008F90 }, /* GL_RED_SNORM */
+ { 65914, 0x00008F91 }, /* GL_RG_SNORM */
+ { 65926, 0x00008F92 }, /* GL_RGB_SNORM */
+ { 65939, 0x00008F93 }, /* GL_RGBA_SNORM */
+ { 65953, 0x00008F94 }, /* GL_R8_SNORM */
+ { 65965, 0x00008F95 }, /* GL_RG8_SNORM */
+ { 65978, 0x00008F96 }, /* GL_RGB8_SNORM */
+ { 65992, 0x00008F97 }, /* GL_RGBA8_SNORM */
+ { 66007, 0x00008F98 }, /* GL_R16_SNORM */
+ { 66020, 0x00008F99 }, /* GL_RG16_SNORM */
+ { 66034, 0x00008F9A }, /* GL_RGB16_SNORM */
+ { 66049, 0x00008F9B }, /* GL_RGBA16_SNORM */
+ { 66065, 0x00008F9C }, /* GL_SIGNED_NORMALIZED */
+ { 66086, 0x00008F9D }, /* GL_PRIMITIVE_RESTART */
+ { 66107, 0x00008F9E }, /* GL_PRIMITIVE_RESTART_INDEX */
+ { 66134, 0x00008F9F }, /* GL_MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB */
+ { 66179, 0x00008FA0 }, /* GL_PERFMON_GLOBAL_MODE_QCOM */
+ { 66207, 0x00008FB0 }, /* GL_BINNING_CONTROL_HINT_QCOM */
+ { 66236, 0x00008FB1 }, /* GL_CPU_OPTIMIZED_QCOM */
+ { 66258, 0x00008FB2 }, /* GL_GPU_OPTIMIZED_QCOM */
+ { 66280, 0x00008FB3 }, /* GL_RENDER_DIRECT_TO_FRAMEBUFFER_QCOM */
+ { 66317, 0x00008FBB }, /* GL_GPU_DISJOINT_EXT */
+ { 66337, 0x00008FBD }, /* GL_SR8_EXT */
+ { 66348, 0x00008FBE }, /* GL_SRG8_EXT */
+ { 66360, 0x00008FC4 }, /* GL_SHADER_BINARY_VIV */
+ { 66381, 0x00008FE0 }, /* GL_INT8_NV */
+ { 66392, 0x00008FE1 }, /* GL_INT8_VEC2_NV */
+ { 66408, 0x00008FE2 }, /* GL_INT8_VEC3_NV */
+ { 66424, 0x00008FE3 }, /* GL_INT8_VEC4_NV */
+ { 66440, 0x00008FE4 }, /* GL_INT16_NV */
+ { 66452, 0x00008FE5 }, /* GL_INT16_VEC2_NV */
+ { 66469, 0x00008FE6 }, /* GL_INT16_VEC3_NV */
+ { 66486, 0x00008FE7 }, /* GL_INT16_VEC4_NV */
+ { 66503, 0x00008FE9 }, /* GL_INT64_VEC2_ARB */
+ { 66521, 0x00008FEA }, /* GL_INT64_VEC3_ARB */
+ { 66539, 0x00008FEB }, /* GL_INT64_VEC4_ARB */
+ { 66557, 0x00008FEC }, /* GL_UNSIGNED_INT8_NV */
+ { 66577, 0x00008FED }, /* GL_UNSIGNED_INT8_VEC2_NV */
+ { 66602, 0x00008FEE }, /* GL_UNSIGNED_INT8_VEC3_NV */
+ { 66627, 0x00008FEF }, /* GL_UNSIGNED_INT8_VEC4_NV */
+ { 66652, 0x00008FF0 }, /* GL_UNSIGNED_INT16_NV */
+ { 66673, 0x00008FF1 }, /* GL_UNSIGNED_INT16_VEC2_NV */
+ { 66699, 0x00008FF2 }, /* GL_UNSIGNED_INT16_VEC3_NV */
+ { 66725, 0x00008FF3 }, /* GL_UNSIGNED_INT16_VEC4_NV */
+ { 66751, 0x00008FF5 }, /* GL_UNSIGNED_INT64_VEC2_ARB */
+ { 66778, 0x00008FF6 }, /* GL_UNSIGNED_INT64_VEC3_ARB */
+ { 66805, 0x00008FF7 }, /* GL_UNSIGNED_INT64_VEC4_ARB */
+ { 66832, 0x00008FF8 }, /* GL_FLOAT16_NV */
+ { 66846, 0x00008FF9 }, /* GL_FLOAT16_VEC2_NV */
+ { 66865, 0x00008FFA }, /* GL_FLOAT16_VEC3_NV */
+ { 66884, 0x00008FFB }, /* GL_FLOAT16_VEC4_NV */
+ { 66903, 0x00008FFC }, /* GL_DOUBLE_VEC2 */
+ { 66918, 0x00008FFD }, /* GL_DOUBLE_VEC3 */
+ { 66933, 0x00008FFE }, /* GL_DOUBLE_VEC4 */
+ { 66948, 0x00009001 }, /* GL_SAMPLER_BUFFER_AMD */
+ { 66970, 0x00009002 }, /* GL_INT_SAMPLER_BUFFER_AMD */
+ { 66996, 0x00009003 }, /* GL_UNSIGNED_INT_SAMPLER_BUFFER_AMD */
+ { 67031, 0x00009004 }, /* GL_TESSELLATION_MODE_AMD */
+ { 67056, 0x00009005 }, /* GL_TESSELLATION_FACTOR_AMD */
+ { 67083, 0x00009006 }, /* GL_DISCRETE_AMD */
+ { 67099, 0x00009007 }, /* GL_CONTINUOUS_AMD */
+ { 67117, 0x00009009 }, /* GL_TEXTURE_CUBE_MAP_ARRAY */
+ { 67143, 0x0000900A }, /* GL_TEXTURE_BINDING_CUBE_MAP_ARRAY */
+ { 67177, 0x0000900B }, /* GL_PROXY_TEXTURE_CUBE_MAP_ARRAY */
+ { 67209, 0x0000900C }, /* GL_SAMPLER_CUBE_MAP_ARRAY */
+ { 67235, 0x0000900D }, /* GL_SAMPLER_CUBE_MAP_ARRAY_SHADOW */
+ { 67268, 0x0000900E }, /* GL_INT_SAMPLER_CUBE_MAP_ARRAY */
+ { 67298, 0x0000900F }, /* GL_UNSIGNED_INT_SAMPLER_CUBE_MAP_ARRAY */
+ { 67337, 0x00009010 }, /* GL_ALPHA_SNORM */
+ { 67352, 0x00009011 }, /* GL_LUMINANCE_SNORM */
+ { 67371, 0x00009012 }, /* GL_LUMINANCE_ALPHA_SNORM */
+ { 67396, 0x00009013 }, /* GL_INTENSITY_SNORM */
+ { 67415, 0x00009014 }, /* GL_ALPHA8_SNORM */
+ { 67431, 0x00009015 }, /* GL_LUMINANCE8_SNORM */
+ { 67451, 0x00009016 }, /* GL_LUMINANCE8_ALPHA8_SNORM */
+ { 67478, 0x00009017 }, /* GL_INTENSITY8_SNORM */
+ { 67498, 0x00009018 }, /* GL_ALPHA16_SNORM */
+ { 67515, 0x00009019 }, /* GL_LUMINANCE16_SNORM */
+ { 67536, 0x0000901A }, /* GL_LUMINANCE16_ALPHA16_SNORM */
+ { 67565, 0x0000901B }, /* GL_INTENSITY16_SNORM */
+ { 67586, 0x0000901C }, /* GL_FACTOR_MIN_AMD */
+ { 67604, 0x0000901D }, /* GL_FACTOR_MAX_AMD */
+ { 67622, 0x0000901E }, /* GL_DEPTH_CLAMP_NEAR_AMD */
+ { 67646, 0x0000901F }, /* GL_DEPTH_CLAMP_FAR_AMD */
+ { 67669, 0x00009020 }, /* GL_VIDEO_BUFFER_NV */
+ { 67688, 0x00009021 }, /* GL_VIDEO_BUFFER_BINDING_NV */
+ { 67715, 0x00009022 }, /* GL_FIELD_UPPER_NV */
+ { 67733, 0x00009023 }, /* GL_FIELD_LOWER_NV */
+ { 67751, 0x00009024 }, /* GL_NUM_VIDEO_CAPTURE_STREAMS_NV */
+ { 67783, 0x00009025 }, /* GL_NEXT_VIDEO_CAPTURE_BUFFER_STATUS_NV */
+ { 67822, 0x00009026 }, /* GL_VIDEO_CAPTURE_TO_422_SUPPORTED_NV */
+ { 67859, 0x00009027 }, /* GL_LAST_VIDEO_CAPTURE_STATUS_NV */
+ { 67891, 0x00009028 }, /* GL_VIDEO_BUFFER_PITCH_NV */
+ { 67916, 0x00009029 }, /* GL_VIDEO_COLOR_CONVERSION_MATRIX_NV */
+ { 67952, 0x0000902A }, /* GL_VIDEO_COLOR_CONVERSION_MAX_NV */
+ { 67985, 0x0000902B }, /* GL_VIDEO_COLOR_CONVERSION_MIN_NV */
+ { 68018, 0x0000902C }, /* GL_VIDEO_COLOR_CONVERSION_OFFSET_NV */
+ { 68054, 0x0000902D }, /* GL_VIDEO_BUFFER_INTERNAL_FORMAT_NV */
+ { 68089, 0x0000902E }, /* GL_PARTIAL_SUCCESS_NV */
+ { 68111, 0x0000902F }, /* GL_SUCCESS_NV */
+ { 68125, 0x00009030 }, /* GL_FAILURE_NV */
+ { 68139, 0x00009031 }, /* GL_YCBYCR8_422_NV */
+ { 68157, 0x00009032 }, /* GL_YCBAYCR8A_4224_NV */
+ { 68178, 0x00009033 }, /* GL_Z6Y10Z6CB10Z6Y10Z6CR10_422_NV */
+ { 68211, 0x00009034 }, /* GL_Z6Y10Z6CB10Z6A10Z6Y10Z6CR10Z6A10_4224_NV */
+ { 68255, 0x00009035 }, /* GL_Z4Y12Z4CB12Z4Y12Z4CR12_422_NV */
+ { 68288, 0x00009036 }, /* GL_Z4Y12Z4CB12Z4A12Z4Y12Z4CR12Z4A12_4224_NV */
+ { 68332, 0x00009037 }, /* GL_Z4Y12Z4CB12Z4CR12_444_NV */
+ { 68360, 0x00009038 }, /* GL_VIDEO_CAPTURE_FRAME_WIDTH_NV */
+ { 68392, 0x00009039 }, /* GL_VIDEO_CAPTURE_FRAME_HEIGHT_NV */
+ { 68425, 0x0000903A }, /* GL_VIDEO_CAPTURE_FIELD_UPPER_HEIGHT_NV */
+ { 68464, 0x0000903B }, /* GL_VIDEO_CAPTURE_FIELD_LOWER_HEIGHT_NV */
+ { 68503, 0x0000903C }, /* GL_VIDEO_CAPTURE_SURFACE_ORIGIN_NV */
+ { 68538, 0x00009045 }, /* GL_TEXTURE_COVERAGE_SAMPLES_NV */
+ { 68569, 0x00009046 }, /* GL_TEXTURE_COLOR_SAMPLES_NV */
+ { 68597, 0x00009047 }, /* GL_GPU_MEMORY_INFO_DEDICATED_VIDMEM_NVX */
+ { 68637, 0x00009048 }, /* GL_GPU_MEMORY_INFO_TOTAL_AVAILABLE_MEMORY_NVX */
+ { 68683, 0x00009049 }, /* GL_GPU_MEMORY_INFO_CURRENT_AVAILABLE_VIDMEM_NVX */
+ { 68731, 0x0000904A }, /* GL_GPU_MEMORY_INFO_EVICTION_COUNT_NVX */
+ { 68769, 0x0000904B }, /* GL_GPU_MEMORY_INFO_EVICTED_MEMORY_NVX */
+ { 68807, 0x0000904C }, /* GL_IMAGE_1D */
+ { 68819, 0x0000904D }, /* GL_IMAGE_2D */
+ { 68831, 0x0000904E }, /* GL_IMAGE_3D */
+ { 68843, 0x0000904F }, /* GL_IMAGE_2D_RECT */
+ { 68860, 0x00009050 }, /* GL_IMAGE_CUBE */
+ { 68874, 0x00009051 }, /* GL_IMAGE_BUFFER */
+ { 68890, 0x00009052 }, /* GL_IMAGE_1D_ARRAY */
+ { 68908, 0x00009053 }, /* GL_IMAGE_2D_ARRAY */
+ { 68926, 0x00009054 }, /* GL_IMAGE_CUBE_MAP_ARRAY */
+ { 68950, 0x00009055 }, /* GL_IMAGE_2D_MULTISAMPLE */
+ { 68974, 0x00009056 }, /* GL_IMAGE_2D_MULTISAMPLE_ARRAY */
+ { 69004, 0x00009057 }, /* GL_INT_IMAGE_1D */
+ { 69020, 0x00009058 }, /* GL_INT_IMAGE_2D */
+ { 69036, 0x00009059 }, /* GL_INT_IMAGE_3D */
+ { 69052, 0x0000905A }, /* GL_INT_IMAGE_2D_RECT */
+ { 69073, 0x0000905B }, /* GL_INT_IMAGE_CUBE */
+ { 69091, 0x0000905C }, /* GL_INT_IMAGE_BUFFER */
+ { 69111, 0x0000905D }, /* GL_INT_IMAGE_1D_ARRAY */
+ { 69133, 0x0000905E }, /* GL_INT_IMAGE_2D_ARRAY */
+ { 69155, 0x0000905F }, /* GL_INT_IMAGE_CUBE_MAP_ARRAY */
+ { 69183, 0x00009060 }, /* GL_INT_IMAGE_2D_MULTISAMPLE */
+ { 69211, 0x00009061 }, /* GL_INT_IMAGE_2D_MULTISAMPLE_ARRAY */
+ { 69245, 0x00009062 }, /* GL_UNSIGNED_INT_IMAGE_1D */
+ { 69270, 0x00009063 }, /* GL_UNSIGNED_INT_IMAGE_2D */
+ { 69295, 0x00009064 }, /* GL_UNSIGNED_INT_IMAGE_3D */
+ { 69320, 0x00009065 }, /* GL_UNSIGNED_INT_IMAGE_2D_RECT */
+ { 69350, 0x00009066 }, /* GL_UNSIGNED_INT_IMAGE_CUBE */
+ { 69377, 0x00009067 }, /* GL_UNSIGNED_INT_IMAGE_BUFFER */
+ { 69406, 0x00009068 }, /* GL_UNSIGNED_INT_IMAGE_1D_ARRAY */
+ { 69437, 0x00009069 }, /* GL_UNSIGNED_INT_IMAGE_2D_ARRAY */
+ { 69468, 0x0000906A }, /* GL_UNSIGNED_INT_IMAGE_CUBE_MAP_ARRAY */
+ { 69505, 0x0000906B }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE */
+ { 69542, 0x0000906C }, /* GL_UNSIGNED_INT_IMAGE_2D_MULTISAMPLE_ARRAY */
+ { 69585, 0x0000906D }, /* GL_MAX_IMAGE_SAMPLES */
+ { 69606, 0x0000906E }, /* GL_IMAGE_BINDING_FORMAT */
+ { 69630, 0x0000906F }, /* GL_RGB10_A2UI */
+ { 69644, 0x00009070 }, /* GL_PATH_FORMAT_SVG_NV */
+ { 69666, 0x00009071 }, /* GL_PATH_FORMAT_PS_NV */
+ { 69687, 0x00009072 }, /* GL_STANDARD_FONT_NAME_NV */
+ { 69712, 0x00009073 }, /* GL_SYSTEM_FONT_NAME_NV */
+ { 69735, 0x00009074 }, /* GL_FILE_NAME_NV */
+ { 69751, 0x00009075 }, /* GL_PATH_STROKE_WIDTH_NV */
+ { 69775, 0x00009076 }, /* GL_PATH_END_CAPS_NV */
+ { 69795, 0x00009077 }, /* GL_PATH_INITIAL_END_CAP_NV */
+ { 69822, 0x00009078 }, /* GL_PATH_TERMINAL_END_CAP_NV */
+ { 69850, 0x00009079 }, /* GL_PATH_JOIN_STYLE_NV */
+ { 69872, 0x0000907A }, /* GL_PATH_MITER_LIMIT_NV */
+ { 69895, 0x0000907B }, /* GL_PATH_DASH_CAPS_NV */
+ { 69916, 0x0000907C }, /* GL_PATH_INITIAL_DASH_CAP_NV */
+ { 69944, 0x0000907D }, /* GL_PATH_TERMINAL_DASH_CAP_NV */
+ { 69973, 0x0000907E }, /* GL_PATH_DASH_OFFSET_NV */
+ { 69996, 0x0000907F }, /* GL_PATH_CLIENT_LENGTH_NV */
+ { 70021, 0x00009080 }, /* GL_PATH_FILL_MODE_NV */
+ { 70042, 0x00009081 }, /* GL_PATH_FILL_MASK_NV */
+ { 70063, 0x00009082 }, /* GL_PATH_FILL_COVER_MODE_NV */
+ { 70090, 0x00009083 }, /* GL_PATH_STROKE_COVER_MODE_NV */
+ { 70119, 0x00009084 }, /* GL_PATH_STROKE_MASK_NV */
+ { 70142, 0x00009088 }, /* GL_COUNT_UP_NV */
+ { 70157, 0x00009089 }, /* GL_COUNT_DOWN_NV */
+ { 70174, 0x0000908A }, /* GL_PATH_OBJECT_BOUNDING_BOX_NV */
+ { 70205, 0x0000908B }, /* GL_CONVEX_HULL_NV */
+ { 70223, 0x0000908D }, /* GL_BOUNDING_BOX_NV */
+ { 70242, 0x0000908E }, /* GL_TRANSLATE_X_NV */
+ { 70260, 0x0000908F }, /* GL_TRANSLATE_Y_NV */
+ { 70278, 0x00009090 }, /* GL_TRANSLATE_2D_NV */
+ { 70297, 0x00009091 }, /* GL_TRANSLATE_3D_NV */
+ { 70316, 0x00009092 }, /* GL_AFFINE_2D_NV */
+ { 70332, 0x00009094 }, /* GL_AFFINE_3D_NV */
+ { 70348, 0x00009096 }, /* GL_TRANSPOSE_AFFINE_2D_NV */
+ { 70374, 0x00009098 }, /* GL_TRANSPOSE_AFFINE_3D_NV */
+ { 70400, 0x0000909A }, /* GL_UTF8_NV */
+ { 70411, 0x0000909B }, /* GL_UTF16_NV */
+ { 70423, 0x0000909C }, /* GL_BOUNDING_BOX_OF_BOUNDING_BOXES_NV */
+ { 70460, 0x0000909D }, /* GL_PATH_COMMAND_COUNT_NV */
+ { 70485, 0x0000909E }, /* GL_PATH_COORD_COUNT_NV */
+ { 70508, 0x0000909F }, /* GL_PATH_DASH_ARRAY_COUNT_NV */
+ { 70536, 0x000090A0 }, /* GL_PATH_COMPUTED_LENGTH_NV */
+ { 70563, 0x000090A1 }, /* GL_PATH_FILL_BOUNDING_BOX_NV */
+ { 70592, 0x000090A2 }, /* GL_PATH_STROKE_BOUNDING_BOX_NV */
+ { 70623, 0x000090A3 }, /* GL_SQUARE_NV */
+ { 70636, 0x000090A4 }, /* GL_ROUND_NV */
+ { 70648, 0x000090A5 }, /* GL_TRIANGULAR_NV */
+ { 70665, 0x000090A6 }, /* GL_BEVEL_NV */
+ { 70677, 0x000090A7 }, /* GL_MITER_REVERT_NV */
+ { 70696, 0x000090A8 }, /* GL_MITER_TRUNCATE_NV */
+ { 70717, 0x000090A9 }, /* GL_SKIP_MISSING_GLYPH_NV */
+ { 70742, 0x000090AA }, /* GL_USE_MISSING_GLYPH_NV */
+ { 70766, 0x000090AB }, /* GL_PATH_ERROR_POSITION_NV */
+ { 70792, 0x000090AC }, /* GL_PATH_FOG_GEN_MODE_NV */
+ { 70816, 0x000090AD }, /* GL_ACCUM_ADJACENT_PAIRS_NV */
+ { 70843, 0x000090AE }, /* GL_ADJACENT_PAIRS_NV */
+ { 70864, 0x000090AF }, /* GL_FIRST_TO_REST_NV */
+ { 70884, 0x000090B0 }, /* GL_PATH_GEN_MODE_NV */
+ { 70904, 0x000090B1 }, /* GL_PATH_GEN_COEFF_NV */
+ { 70925, 0x000090B2 }, /* GL_PATH_GEN_COLOR_FORMAT_NV */
+ { 70953, 0x000090B3 }, /* GL_PATH_GEN_COMPONENTS_NV */
+ { 70979, 0x000090B4 }, /* GL_PATH_DASH_OFFSET_RESET_NV */
+ { 71008, 0x000090B5 }, /* GL_MOVE_TO_RESETS_NV */
+ { 71029, 0x000090B6 }, /* GL_MOVE_TO_CONTINUES_NV */
+ { 71053, 0x000090B7 }, /* GL_PATH_STENCIL_FUNC_NV */
+ { 71077, 0x000090B8 }, /* GL_PATH_STENCIL_REF_NV */
+ { 71100, 0x000090B9 }, /* GL_PATH_STENCIL_VALUE_MASK_NV */
+ { 71130, 0x000090BA }, /* GL_SCALED_RESOLVE_FASTEST_EXT */
+ { 71160, 0x000090BB }, /* GL_SCALED_RESOLVE_NICEST_EXT */
+ { 71189, 0x000090BC }, /* GL_MIN_MAP_BUFFER_ALIGNMENT */
+ { 71217, 0x000090BD }, /* GL_PATH_STENCIL_DEPTH_OFFSET_FACTOR_NV */
+ { 71256, 0x000090BE }, /* GL_PATH_STENCIL_DEPTH_OFFSET_UNITS_NV */
+ { 71294, 0x000090BF }, /* GL_PATH_COVER_DEPTH_FUNC_NV */
+ { 71322, 0x000090C7 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_TYPE */
+ { 71357, 0x000090C8 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_SIZE */
+ { 71395, 0x000090C9 }, /* GL_IMAGE_FORMAT_COMPATIBILITY_BY_CLASS */
+ { 71434, 0x000090CA }, /* GL_MAX_VERTEX_IMAGE_UNIFORMS */
+ { 71463, 0x000090CB }, /* GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS */
+ { 71498, 0x000090CC }, /* GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS */
+ { 71536, 0x000090CD }, /* GL_MAX_GEOMETRY_IMAGE_UNIFORMS */
+ { 71567, 0x000090CE }, /* GL_MAX_FRAGMENT_IMAGE_UNIFORMS */
+ { 71598, 0x000090CF }, /* GL_MAX_COMBINED_IMAGE_UNIFORMS */
+ { 71629, 0x000090D0 }, /* GL_MAX_DEEP_3D_TEXTURE_WIDTH_HEIGHT_NV */
+ { 71668, 0x000090D1 }, /* GL_MAX_DEEP_3D_TEXTURE_DEPTH_NV */
+ { 71700, 0x000090D2 }, /* GL_SHADER_STORAGE_BUFFER */
+ { 71725, 0x000090D3 }, /* GL_SHADER_STORAGE_BUFFER_BINDING */
+ { 71758, 0x000090D4 }, /* GL_SHADER_STORAGE_BUFFER_START */
+ { 71789, 0x000090D5 }, /* GL_SHADER_STORAGE_BUFFER_SIZE */
+ { 71819, 0x000090D6 }, /* GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS */
+ { 71855, 0x000090D7 }, /* GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS */
+ { 71893, 0x000090D8 }, /* GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS */
+ { 71935, 0x000090D9 }, /* GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS */
+ { 71980, 0x000090DA }, /* GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS */
+ { 72018, 0x000090DB }, /* GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS */
+ { 72055, 0x000090DC }, /* GL_MAX_COMBINED_SHADER_STORAGE_BLOCKS */
+ { 72093, 0x000090DD }, /* GL_MAX_SHADER_STORAGE_BUFFER_BINDINGS */
+ { 72131, 0x000090DE }, /* GL_MAX_SHADER_STORAGE_BLOCK_SIZE */
+ { 72164, 0x000090DF }, /* GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT */
+ { 72206, 0x000090E1 }, /* GL_SYNC_X11_FENCE_EXT */
+ { 72228, 0x000090EA }, /* GL_DEPTH_STENCIL_TEXTURE_MODE */
+ { 72258, 0x000090EB }, /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS */
+ { 72296, 0x000090EC }, /* GL_UNIFORM_BLOCK_REFERENCED_BY_COMPUTE_SHADER */
+ { 72342, 0x000090ED }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_COMPUTE_SHADER */
+ { 72396, 0x000090EE }, /* GL_DISPATCH_INDIRECT_BUFFER */
+ { 72424, 0x000090EF }, /* GL_DISPATCH_INDIRECT_BUFFER_BINDING */
+ { 72460, 0x000090F0 }, /* GL_COLOR_ATTACHMENT_EXT */
+ { 72484, 0x000090F1 }, /* GL_MULTIVIEW_EXT */
+ { 72501, 0x000090F2 }, /* GL_MAX_MULTIVIEW_BUFFERS_EXT */
+ { 72530, 0x000090F3 }, /* GL_CONTEXT_ROBUST_ACCESS */
+ { 72555, 0x000090FB }, /* GL_COMPUTE_PROGRAM_NV */
+ { 72577, 0x000090FC }, /* GL_COMPUTE_PROGRAM_PARAMETER_BUFFER_NV */
+ { 72616, 0x00009100 }, /* GL_TEXTURE_2D_MULTISAMPLE */
+ { 72642, 0x00009101 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE */
+ { 72674, 0x00009102 }, /* GL_TEXTURE_2D_MULTISAMPLE_ARRAY */
+ { 72706, 0x00009103 }, /* GL_PROXY_TEXTURE_2D_MULTISAMPLE_ARRAY */
+ { 72744, 0x00009104 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE */
+ { 72778, 0x00009105 }, /* GL_TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY */
+ { 72818, 0x00009106 }, /* GL_TEXTURE_SAMPLES */
+ { 72837, 0x00009107 }, /* GL_TEXTURE_FIXED_SAMPLE_LOCATIONS */
+ { 72871, 0x00009108 }, /* GL_SAMPLER_2D_MULTISAMPLE */
+ { 72897, 0x00009109 }, /* GL_INT_SAMPLER_2D_MULTISAMPLE */
+ { 72927, 0x0000910A }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE */
+ { 72966, 0x0000910B }, /* GL_SAMPLER_2D_MULTISAMPLE_ARRAY */
+ { 72998, 0x0000910C }, /* GL_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */
+ { 73034, 0x0000910D }, /* GL_UNSIGNED_INT_SAMPLER_2D_MULTISAMPLE_ARRAY */
+ { 73079, 0x0000910E }, /* GL_MAX_COLOR_TEXTURE_SAMPLES */
+ { 73108, 0x0000910F }, /* GL_MAX_DEPTH_TEXTURE_SAMPLES */
+ { 73137, 0x00009110 }, /* GL_MAX_INTEGER_SAMPLES */
+ { 73160, 0x00009111 }, /* GL_MAX_SERVER_WAIT_TIMEOUT */
+ { 73187, 0x00009112 }, /* GL_OBJECT_TYPE */
+ { 73202, 0x00009113 }, /* GL_SYNC_CONDITION */
+ { 73220, 0x00009114 }, /* GL_SYNC_STATUS */
+ { 73235, 0x00009115 }, /* GL_SYNC_FLAGS */
+ { 73249, 0x00009116 }, /* GL_SYNC_FENCE */
+ { 73263, 0x00009117 }, /* GL_SYNC_GPU_COMMANDS_COMPLETE */
+ { 73293, 0x00009118 }, /* GL_UNSIGNALED */
+ { 73307, 0x00009119 }, /* GL_SIGNALED */
+ { 73319, 0x0000911A }, /* GL_ALREADY_SIGNALED */
+ { 73339, 0x0000911B }, /* GL_TIMEOUT_EXPIRED */
+ { 73358, 0x0000911C }, /* GL_CONDITION_SATISFIED */
+ { 73381, 0x0000911D }, /* GL_WAIT_FAILED */
+ { 73396, 0x0000911F }, /* GL_BUFFER_ACCESS_FLAGS */
+ { 73419, 0x00009120 }, /* GL_BUFFER_MAP_LENGTH */
+ { 73440, 0x00009121 }, /* GL_BUFFER_MAP_OFFSET */
+ { 73461, 0x00009122 }, /* GL_MAX_VERTEX_OUTPUT_COMPONENTS */
+ { 73493, 0x00009123 }, /* GL_MAX_GEOMETRY_INPUT_COMPONENTS */
+ { 73526, 0x00009124 }, /* GL_MAX_GEOMETRY_OUTPUT_COMPONENTS */
+ { 73560, 0x00009125 }, /* GL_MAX_FRAGMENT_INPUT_COMPONENTS */
+ { 73593, 0x00009126 }, /* GL_CONTEXT_PROFILE_MASK */
+ { 73617, 0x00009127 }, /* GL_UNPACK_COMPRESSED_BLOCK_WIDTH */
+ { 73650, 0x00009128 }, /* GL_UNPACK_COMPRESSED_BLOCK_HEIGHT */
+ { 73684, 0x00009129 }, /* GL_UNPACK_COMPRESSED_BLOCK_DEPTH */
+ { 73717, 0x0000912A }, /* GL_UNPACK_COMPRESSED_BLOCK_SIZE */
+ { 73749, 0x0000912B }, /* GL_PACK_COMPRESSED_BLOCK_WIDTH */
+ { 73780, 0x0000912C }, /* GL_PACK_COMPRESSED_BLOCK_HEIGHT */
+ { 73812, 0x0000912D }, /* GL_PACK_COMPRESSED_BLOCK_DEPTH */
+ { 73843, 0x0000912E }, /* GL_PACK_COMPRESSED_BLOCK_SIZE */
+ { 73873, 0x0000912F }, /* GL_TEXTURE_IMMUTABLE_FORMAT */
+ { 73901, 0x00009130 }, /* GL_SGX_PROGRAM_BINARY_IMG */
+ { 73927, 0x00009133 }, /* GL_RENDERBUFFER_SAMPLES_IMG */
+ { 73955, 0x00009134 }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_IMG */
+ { 73997, 0x00009135 }, /* GL_MAX_SAMPLES_IMG */
+ { 74016, 0x00009136 }, /* GL_TEXTURE_SAMPLES_IMG */
+ { 74039, 0x00009137 }, /* GL_COMPRESSED_RGBA_PVRTC_2BPPV2_IMG */
+ { 74075, 0x00009138 }, /* GL_COMPRESSED_RGBA_PVRTC_4BPPV2_IMG */
+ { 74111, 0x00009139 }, /* GL_CUBIC_IMG */
+ { 74124, 0x0000913A }, /* GL_CUBIC_MIPMAP_NEAREST_IMG */
+ { 74152, 0x0000913B }, /* GL_CUBIC_MIPMAP_LINEAR_IMG */
+ { 74179, 0x0000913C }, /* GL_FRAMEBUFFER_INCOMPLETE_MULTISAMPLE_AND_DOWNSAMPLE_IMG */
+ { 74236, 0x0000913D }, /* GL_NUM_DOWNSAMPLE_SCALES_IMG */
+ { 74265, 0x0000913E }, /* GL_DOWNSAMPLE_SCALES_IMG */
+ { 74290, 0x0000913F }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_SCALE_IMG */
+ { 74334, 0x00009143 }, /* GL_MAX_DEBUG_MESSAGE_LENGTH */
+ { 74362, 0x00009144 }, /* GL_MAX_DEBUG_LOGGED_MESSAGES */
+ { 74391, 0x00009145 }, /* GL_DEBUG_LOGGED_MESSAGES */
+ { 74416, 0x00009146 }, /* GL_DEBUG_SEVERITY_HIGH */
+ { 74439, 0x00009147 }, /* GL_DEBUG_SEVERITY_MEDIUM */
+ { 74464, 0x00009148 }, /* GL_DEBUG_SEVERITY_LOW */
+ { 74486, 0x00009149 }, /* GL_DEBUG_CATEGORY_API_ERROR_AMD */
+ { 74518, 0x0000914A }, /* GL_DEBUG_CATEGORY_WINDOW_SYSTEM_AMD */
+ { 74554, 0x0000914B }, /* GL_DEBUG_CATEGORY_DEPRECATION_AMD */
+ { 74588, 0x0000914C }, /* GL_DEBUG_CATEGORY_UNDEFINED_BEHAVIOR_AMD */
+ { 74629, 0x0000914D }, /* GL_DEBUG_CATEGORY_PERFORMANCE_AMD */
+ { 74663, 0x0000914E }, /* GL_DEBUG_CATEGORY_SHADER_COMPILER_AMD */
+ { 74701, 0x0000914F }, /* GL_DEBUG_CATEGORY_APPLICATION_AMD */
+ { 74735, 0x00009150 }, /* GL_DEBUG_CATEGORY_OTHER_AMD */
+ { 74763, 0x00009151 }, /* GL_BUFFER_OBJECT_EXT */
+ { 74784, 0x00009152 }, /* GL_PERFORMANCE_MONITOR_AMD */
+ { 74811, 0x00009153 }, /* GL_QUERY_OBJECT_EXT */
+ { 74831, 0x00009154 }, /* GL_VERTEX_ARRAY_OBJECT_EXT */
+ { 74858, 0x00009155 }, /* GL_SAMPLER_OBJECT_AMD */
+ { 74880, 0x00009160 }, /* GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD */
+ { 74918, 0x00009192 }, /* GL_QUERY_BUFFER */
+ { 74934, 0x00009193 }, /* GL_QUERY_BUFFER_BINDING */
+ { 74958, 0x00009194 }, /* GL_QUERY_RESULT_NO_WAIT */
+ { 74982, 0x00009195 }, /* GL_VIRTUAL_PAGE_SIZE_X_ARB */
+ { 75009, 0x00009196 }, /* GL_VIRTUAL_PAGE_SIZE_Y_ARB */
+ { 75036, 0x00009197 }, /* GL_VIRTUAL_PAGE_SIZE_Z_ARB */
+ { 75063, 0x00009198 }, /* GL_MAX_SPARSE_TEXTURE_SIZE_ARB */
+ { 75094, 0x00009199 }, /* GL_MAX_SPARSE_3D_TEXTURE_SIZE_ARB */
+ { 75128, 0x0000919A }, /* GL_MAX_SPARSE_ARRAY_TEXTURE_LAYERS_ARB */
+ { 75167, 0x0000919B }, /* GL_MIN_SPARSE_LEVEL_AMD */
+ { 75191, 0x0000919C }, /* GL_MIN_LOD_WARNING_AMD */
+ { 75214, 0x0000919D }, /* GL_TEXTURE_BUFFER_OFFSET */
+ { 75239, 0x0000919E }, /* GL_TEXTURE_BUFFER_SIZE */
+ { 75262, 0x0000919F }, /* GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT */
+ { 75297, 0x000091A0 }, /* GL_STREAM_RASTERIZATION_AMD */
+ { 75325, 0x000091A4 }, /* GL_VERTEX_ELEMENT_SWIZZLE_AMD */
+ { 75355, 0x000091A5 }, /* GL_VERTEX_ID_SWIZZLE_AMD */
+ { 75380, 0x000091A6 }, /* GL_TEXTURE_SPARSE_ARB */
+ { 75402, 0x000091A7 }, /* GL_VIRTUAL_PAGE_SIZE_INDEX_ARB */
+ { 75433, 0x000091A8 }, /* GL_NUM_VIRTUAL_PAGE_SIZES_ARB */
+ { 75463, 0x000091A9 }, /* GL_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS_ARB */
+ { 75509, 0x000091AA }, /* GL_NUM_SPARSE_LEVELS_ARB */
+ { 75534, 0x000091AE }, /* GL_PIXELS_PER_SAMPLE_PATTERN_X_AMD */
+ { 75569, 0x000091AF }, /* GL_PIXELS_PER_SAMPLE_PATTERN_Y_AMD */
+ { 75604, 0x000091B0 }, /* GL_MAX_SHADER_COMPILER_THREADS_ARB */
+ { 75639, 0x000091B1 }, /* GL_COMPLETION_STATUS_ARB */
+ { 75664, 0x000091B9 }, /* GL_COMPUTE_SHADER */
+ { 75682, 0x000091BB }, /* GL_MAX_COMPUTE_UNIFORM_BLOCKS */
+ { 75712, 0x000091BC }, /* GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS */
+ { 75747, 0x000091BD }, /* GL_MAX_COMPUTE_IMAGE_UNIFORMS */
+ { 75777, 0x000091BE }, /* GL_MAX_COMPUTE_WORK_GROUP_COUNT */
+ { 75809, 0x000091BF }, /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
+ { 75840, 0x000091C5 }, /* GL_FLOAT16_MAT2_AMD */
+ { 75860, 0x000091C6 }, /* GL_FLOAT16_MAT3_AMD */
+ { 75880, 0x000091C7 }, /* GL_FLOAT16_MAT4_AMD */
+ { 75900, 0x000091C8 }, /* GL_FLOAT16_MAT2x3_AMD */
+ { 75922, 0x000091C9 }, /* GL_FLOAT16_MAT2x4_AMD */
+ { 75944, 0x000091CA }, /* GL_FLOAT16_MAT3x2_AMD */
+ { 75966, 0x000091CB }, /* GL_FLOAT16_MAT3x4_AMD */
+ { 75988, 0x000091CC }, /* GL_FLOAT16_MAT4x2_AMD */
+ { 76010, 0x000091CD }, /* GL_FLOAT16_MAT4x3_AMD */
+ { 76032, 0x00009250 }, /* GL_SHADER_BINARY_DMP */
+ { 76053, 0x00009251 }, /* GL_SMAPHS30_PROGRAM_BINARY_DMP */
+ { 76084, 0x00009252 }, /* GL_SMAPHS_PROGRAM_BINARY_DMP */
+ { 76113, 0x00009253 }, /* GL_DMP_PROGRAM_BINARY_DMP */
+ { 76139, 0x00009260 }, /* GL_GCCSO_SHADER_BINARY_FJ */
+ { 76165, 0x00009270 }, /* GL_COMPRESSED_R11_EAC */
+ { 76187, 0x00009271 }, /* GL_COMPRESSED_SIGNED_R11_EAC */
+ { 76216, 0x00009272 }, /* GL_COMPRESSED_RG11_EAC */
+ { 76239, 0x00009273 }, /* GL_COMPRESSED_SIGNED_RG11_EAC */
+ { 76269, 0x00009274 }, /* GL_COMPRESSED_RGB8_ETC2 */
+ { 76293, 0x00009275 }, /* GL_COMPRESSED_SRGB8_ETC2 */
+ { 76318, 0x00009276 }, /* GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2 */
+ { 76362, 0x00009277 }, /* GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2 */
+ { 76407, 0x00009278 }, /* GL_COMPRESSED_RGBA8_ETC2_EAC */
+ { 76436, 0x00009279 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC */
+ { 76472, 0x00009280 }, /* GL_BLEND_PREMULTIPLIED_SRC_NV */
+ { 76502, 0x00009281 }, /* GL_BLEND_OVERLAP_NV */
+ { 76522, 0x00009282 }, /* GL_UNCORRELATED_NV */
+ { 76541, 0x00009283 }, /* GL_DISJOINT_NV */
+ { 76556, 0x00009284 }, /* GL_CONJOINT_NV */
+ { 76571, 0x00009285 }, /* GL_BLEND_ADVANCED_COHERENT_KHR */
+ { 76602, 0x00009286 }, /* GL_SRC_NV */
+ { 76612, 0x00009287 }, /* GL_DST_NV */
+ { 76622, 0x00009288 }, /* GL_SRC_OVER_NV */
+ { 76637, 0x00009289 }, /* GL_DST_OVER_NV */
+ { 76652, 0x0000928A }, /* GL_SRC_IN_NV */
+ { 76665, 0x0000928B }, /* GL_DST_IN_NV */
+ { 76678, 0x0000928C }, /* GL_SRC_OUT_NV */
+ { 76692, 0x0000928D }, /* GL_DST_OUT_NV */
+ { 76706, 0x0000928E }, /* GL_SRC_ATOP_NV */
+ { 76721, 0x0000928F }, /* GL_DST_ATOP_NV */
+ { 76736, 0x00009291 }, /* GL_PLUS_NV */
+ { 76747, 0x00009292 }, /* GL_PLUS_DARKER_NV */
+ { 76765, 0x00009294 }, /* GL_MULTIPLY */
+ { 76777, 0x00009295 }, /* GL_SCREEN */
+ { 76787, 0x00009296 }, /* GL_OVERLAY */
+ { 76798, 0x00009297 }, /* GL_DARKEN */
+ { 76808, 0x00009298 }, /* GL_LIGHTEN */
+ { 76819, 0x00009299 }, /* GL_COLORDODGE */
+ { 76833, 0x0000929A }, /* GL_COLORBURN */
+ { 76846, 0x0000929B }, /* GL_HARDLIGHT */
+ { 76859, 0x0000929C }, /* GL_SOFTLIGHT */
+ { 76872, 0x0000929E }, /* GL_DIFFERENCE */
+ { 76886, 0x0000929F }, /* GL_MINUS_NV */
+ { 76898, 0x000092A0 }, /* GL_EXCLUSION */
+ { 76911, 0x000092A1 }, /* GL_CONTRAST_NV */
+ { 76926, 0x000092A3 }, /* GL_INVERT_RGB_NV */
+ { 76943, 0x000092A4 }, /* GL_LINEARDODGE_NV */
+ { 76961, 0x000092A5 }, /* GL_LINEARBURN_NV */
+ { 76978, 0x000092A6 }, /* GL_VIVIDLIGHT_NV */
+ { 76995, 0x000092A7 }, /* GL_LINEARLIGHT_NV */
+ { 77013, 0x000092A8 }, /* GL_PINLIGHT_NV */
+ { 77028, 0x000092A9 }, /* GL_HARDMIX_NV */
+ { 77042, 0x000092AD }, /* GL_HSL_HUE */
+ { 77053, 0x000092AE }, /* GL_HSL_SATURATION */
+ { 77071, 0x000092AF }, /* GL_HSL_COLOR */
+ { 77084, 0x000092B0 }, /* GL_HSL_LUMINOSITY */
+ { 77102, 0x000092B1 }, /* GL_PLUS_CLAMPED_NV */
+ { 77121, 0x000092B2 }, /* GL_PLUS_CLAMPED_ALPHA_NV */
+ { 77146, 0x000092B3 }, /* GL_MINUS_CLAMPED_NV */
+ { 77166, 0x000092B4 }, /* GL_INVERT_OVG_NV */
+ { 77183, 0x000092BA }, /* GL_MAX_LGPU_GPUS_NVX */
+ { 77204, 0x000092BB }, /* GL_PURGED_CONTEXT_RESET_NV */
+ { 77231, 0x000092BE }, /* GL_PRIMITIVE_BOUNDING_BOX */
+ { 77257, 0x000092BF }, /* GL_ALPHA_TO_COVERAGE_DITHER_MODE_NV */
+ { 77293, 0x000092C0 }, /* GL_ATOMIC_COUNTER_BUFFER */
+ { 77318, 0x000092C1 }, /* GL_ATOMIC_COUNTER_BUFFER_BINDING */
+ { 77351, 0x000092C2 }, /* GL_ATOMIC_COUNTER_BUFFER_START */
+ { 77382, 0x000092C3 }, /* GL_ATOMIC_COUNTER_BUFFER_SIZE */
+ { 77412, 0x000092C4 }, /* GL_ATOMIC_COUNTER_BUFFER_DATA_SIZE */
+ { 77447, 0x000092C5 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTERS */
+ { 77495, 0x000092C6 }, /* GL_ATOMIC_COUNTER_BUFFER_ACTIVE_ATOMIC_COUNTER_INDICES */
+ { 77550, 0x000092C7 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_VERTEX_SHADER */
+ { 77603, 0x000092C8 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_CONTROL_SHADER */
+ { 77662, 0x000092C9 }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_TESS_EVALUATION_SHADER */
+ { 77724, 0x000092CA }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_GEOMETRY_SHADER */
+ { 77779, 0x000092CB }, /* GL_ATOMIC_COUNTER_BUFFER_REFERENCED_BY_FRAGMENT_SHADER */
+ { 77834, 0x000092CC }, /* GL_MAX_VERTEX_ATOMIC_COUNTER_BUFFERS */
+ { 77871, 0x000092CD }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS */
+ { 77914, 0x000092CE }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS */
+ { 77960, 0x000092CF }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS */
+ { 77999, 0x000092D0 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS */
+ { 78038, 0x000092D1 }, /* GL_MAX_COMBINED_ATOMIC_COUNTER_BUFFERS */
+ { 78077, 0x000092D2 }, /* GL_MAX_VERTEX_ATOMIC_COUNTERS */
+ { 78107, 0x000092D3 }, /* GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS */
+ { 78143, 0x000092D4 }, /* GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS */
+ { 78182, 0x000092D5 }, /* GL_MAX_GEOMETRY_ATOMIC_COUNTERS */
+ { 78214, 0x000092D6 }, /* GL_MAX_FRAGMENT_ATOMIC_COUNTERS */
+ { 78246, 0x000092D7 }, /* GL_MAX_COMBINED_ATOMIC_COUNTERS */
+ { 78278, 0x000092D8 }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_SIZE */
+ { 78312, 0x000092D9 }, /* GL_ACTIVE_ATOMIC_COUNTER_BUFFERS */
+ { 78345, 0x000092DA }, /* GL_UNIFORM_ATOMIC_COUNTER_BUFFER_INDEX */
+ { 78384, 0x000092DB }, /* GL_UNSIGNED_INT_ATOMIC_COUNTER */
+ { 78415, 0x000092DC }, /* GL_MAX_ATOMIC_COUNTER_BUFFER_BINDINGS */
+ { 78453, 0x000092DD }, /* GL_FRAGMENT_COVERAGE_TO_COLOR_NV */
+ { 78486, 0x000092DE }, /* GL_FRAGMENT_COVERAGE_COLOR_NV */
+ { 78516, 0x000092E0 }, /* GL_DEBUG_OUTPUT */
+ { 78532, 0x000092E1 }, /* GL_UNIFORM */
+ { 78543, 0x000092E2 }, /* GL_UNIFORM_BLOCK */
+ { 78560, 0x000092E3 }, /* GL_PROGRAM_INPUT */
+ { 78577, 0x000092E4 }, /* GL_PROGRAM_OUTPUT */
+ { 78595, 0x000092E5 }, /* GL_BUFFER_VARIABLE */
+ { 78614, 0x000092E6 }, /* GL_SHADER_STORAGE_BLOCK */
+ { 78638, 0x000092E7 }, /* GL_IS_PER_PATCH */
+ { 78654, 0x000092E8 }, /* GL_VERTEX_SUBROUTINE */
+ { 78675, 0x000092E9 }, /* GL_TESS_CONTROL_SUBROUTINE */
+ { 78702, 0x000092EA }, /* GL_TESS_EVALUATION_SUBROUTINE */
+ { 78732, 0x000092EB }, /* GL_GEOMETRY_SUBROUTINE */
+ { 78755, 0x000092EC }, /* GL_FRAGMENT_SUBROUTINE */
+ { 78778, 0x000092ED }, /* GL_COMPUTE_SUBROUTINE */
+ { 78800, 0x000092EE }, /* GL_VERTEX_SUBROUTINE_UNIFORM */
+ { 78829, 0x000092EF }, /* GL_TESS_CONTROL_SUBROUTINE_UNIFORM */
+ { 78864, 0x000092F0 }, /* GL_TESS_EVALUATION_SUBROUTINE_UNIFORM */
+ { 78902, 0x000092F1 }, /* GL_GEOMETRY_SUBROUTINE_UNIFORM */
+ { 78933, 0x000092F2 }, /* GL_FRAGMENT_SUBROUTINE_UNIFORM */
+ { 78964, 0x000092F3 }, /* GL_COMPUTE_SUBROUTINE_UNIFORM */
+ { 78994, 0x000092F4 }, /* GL_TRANSFORM_FEEDBACK_VARYING */
+ { 79024, 0x000092F5 }, /* GL_ACTIVE_RESOURCES */
+ { 79044, 0x000092F6 }, /* GL_MAX_NAME_LENGTH */
+ { 79063, 0x000092F7 }, /* GL_MAX_NUM_ACTIVE_VARIABLES */
+ { 79091, 0x000092F8 }, /* GL_MAX_NUM_COMPATIBLE_SUBROUTINES */
+ { 79125, 0x000092F9 }, /* GL_NAME_LENGTH */
+ { 79140, 0x000092FA }, /* GL_TYPE */
+ { 79148, 0x000092FB }, /* GL_ARRAY_SIZE */
+ { 79162, 0x000092FC }, /* GL_OFFSET */
+ { 79172, 0x000092FD }, /* GL_BLOCK_INDEX */
+ { 79187, 0x000092FE }, /* GL_ARRAY_STRIDE */
+ { 79203, 0x000092FF }, /* GL_MATRIX_STRIDE */
+ { 79220, 0x00009300 }, /* GL_IS_ROW_MAJOR */
+ { 79236, 0x00009301 }, /* GL_ATOMIC_COUNTER_BUFFER_INDEX */
+ { 79267, 0x00009302 }, /* GL_BUFFER_BINDING */
+ { 79285, 0x00009303 }, /* GL_BUFFER_DATA_SIZE */
+ { 79305, 0x00009304 }, /* GL_NUM_ACTIVE_VARIABLES */
+ { 79329, 0x00009305 }, /* GL_ACTIVE_VARIABLES */
+ { 79349, 0x00009306 }, /* GL_REFERENCED_BY_VERTEX_SHADER */
+ { 79380, 0x00009307 }, /* GL_REFERENCED_BY_TESS_CONTROL_SHADER */
+ { 79417, 0x00009308 }, /* GL_REFERENCED_BY_TESS_EVALUATION_SHADER */
+ { 79457, 0x00009309 }, /* GL_REFERENCED_BY_GEOMETRY_SHADER */
+ { 79490, 0x0000930A }, /* GL_REFERENCED_BY_FRAGMENT_SHADER */
+ { 79523, 0x0000930B }, /* GL_REFERENCED_BY_COMPUTE_SHADER */
+ { 79555, 0x0000930C }, /* GL_TOP_LEVEL_ARRAY_SIZE */
+ { 79579, 0x0000930D }, /* GL_TOP_LEVEL_ARRAY_STRIDE */
+ { 79605, 0x0000930E }, /* GL_LOCATION */
+ { 79617, 0x0000930F }, /* GL_LOCATION_INDEX */
+ { 79635, 0x00009310 }, /* GL_FRAMEBUFFER_DEFAULT_WIDTH */
+ { 79664, 0x00009311 }, /* GL_FRAMEBUFFER_DEFAULT_HEIGHT */
+ { 79694, 0x00009312 }, /* GL_FRAMEBUFFER_DEFAULT_LAYERS */
+ { 79724, 0x00009313 }, /* GL_FRAMEBUFFER_DEFAULT_SAMPLES */
+ { 79755, 0x00009314 }, /* GL_FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS */
+ { 79801, 0x00009315 }, /* GL_MAX_FRAMEBUFFER_WIDTH */
+ { 79826, 0x00009316 }, /* GL_MAX_FRAMEBUFFER_HEIGHT */
+ { 79852, 0x00009317 }, /* GL_MAX_FRAMEBUFFER_LAYERS */
+ { 79878, 0x00009318 }, /* GL_MAX_FRAMEBUFFER_SAMPLES */
+ { 79905, 0x00009327 }, /* GL_RASTER_MULTISAMPLE_EXT */
+ { 79931, 0x00009328 }, /* GL_RASTER_SAMPLES_EXT */
+ { 79953, 0x00009329 }, /* GL_MAX_RASTER_SAMPLES_EXT */
+ { 79979, 0x0000932A }, /* GL_RASTER_FIXED_SAMPLE_LOCATIONS_EXT */
+ { 80016, 0x0000932B }, /* GL_MULTISAMPLE_RASTERIZATION_ALLOWED_EXT */
+ { 80057, 0x0000932C }, /* GL_EFFECTIVE_RASTER_SAMPLES_EXT */
+ { 80089, 0x0000932D }, /* GL_DEPTH_SAMPLES_NV */
+ { 80109, 0x0000932E }, /* GL_STENCIL_SAMPLES_NV */
+ { 80131, 0x0000932F }, /* GL_MIXED_DEPTH_SAMPLES_SUPPORTED_NV */
+ { 80167, 0x00009330 }, /* GL_MIXED_STENCIL_SAMPLES_SUPPORTED_NV */
+ { 80205, 0x00009331 }, /* GL_COVERAGE_MODULATION_TABLE_NV */
+ { 80237, 0x00009332 }, /* GL_COVERAGE_MODULATION_NV */
+ { 80263, 0x00009333 }, /* GL_COVERAGE_MODULATION_TABLE_SIZE_NV */
+ { 80300, 0x00009339 }, /* GL_WARP_SIZE_NV */
+ { 80316, 0x0000933A }, /* GL_WARPS_PER_SM_NV */
+ { 80335, 0x0000933B }, /* GL_SM_COUNT_NV */
+ { 80350, 0x0000933C }, /* GL_FILL_RECTANGLE_NV */
+ { 80371, 0x0000933D }, /* GL_SAMPLE_LOCATION_SUBPIXEL_BITS_ARB */
+ { 80408, 0x0000933E }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_WIDTH_ARB */
+ { 80448, 0x0000933F }, /* GL_SAMPLE_LOCATION_PIXEL_GRID_HEIGHT_ARB */
+ { 80489, 0x00009340 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_TABLE_SIZE_ARB */
+ { 80536, 0x00009341 }, /* GL_PROGRAMMABLE_SAMPLE_LOCATION_ARB */
+ { 80572, 0x00009342 }, /* GL_FRAMEBUFFER_PROGRAMMABLE_SAMPLE_LOCATIONS_ARB */
+ { 80621, 0x00009343 }, /* GL_FRAMEBUFFER_SAMPLE_LOCATION_PIXEL_GRID_ARB */
+ { 80667, 0x00009344 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB */
+ { 80713, 0x00009345 }, /* GL_MAX_COMPUTE_VARIABLE_GROUP_SIZE_ARB */
+ { 80752, 0x00009346 }, /* GL_CONSERVATIVE_RASTERIZATION_NV */
+ { 80785, 0x00009347 }, /* GL_SUBPIXEL_PRECISION_BIAS_X_BITS_NV */
+ { 80822, 0x00009348 }, /* GL_SUBPIXEL_PRECISION_BIAS_Y_BITS_NV */
+ { 80859, 0x00009349 }, /* GL_MAX_SUBPIXEL_PRECISION_BIAS_BITS_NV */
+ { 80898, 0x0000934A }, /* GL_LOCATION_COMPONENT */
+ { 80920, 0x0000934B }, /* GL_TRANSFORM_FEEDBACK_BUFFER_INDEX */
+ { 80955, 0x0000934C }, /* GL_TRANSFORM_FEEDBACK_BUFFER_STRIDE */
+ { 80991, 0x0000934D }, /* GL_ALPHA_TO_COVERAGE_DITHER_DEFAULT_NV */
+ { 81030, 0x0000934E }, /* GL_ALPHA_TO_COVERAGE_DITHER_ENABLE_NV */
+ { 81068, 0x0000934F }, /* GL_ALPHA_TO_COVERAGE_DITHER_DISABLE_NV */
+ { 81107, 0x00009350 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_X_NV */
+ { 81141, 0x00009351 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_X_NV */
+ { 81175, 0x00009352 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_Y_NV */
+ { 81209, 0x00009353 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_Y_NV */
+ { 81243, 0x00009354 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_Z_NV */
+ { 81277, 0x00009355 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_Z_NV */
+ { 81311, 0x00009356 }, /* GL_VIEWPORT_SWIZZLE_POSITIVE_W_NV */
+ { 81345, 0x00009357 }, /* GL_VIEWPORT_SWIZZLE_NEGATIVE_W_NV */
+ { 81379, 0x00009358 }, /* GL_VIEWPORT_SWIZZLE_X_NV */
+ { 81404, 0x00009359 }, /* GL_VIEWPORT_SWIZZLE_Y_NV */
+ { 81429, 0x0000935A }, /* GL_VIEWPORT_SWIZZLE_Z_NV */
+ { 81454, 0x0000935B }, /* GL_VIEWPORT_SWIZZLE_W_NV */
+ { 81479, 0x0000935C }, /* GL_CLIP_ORIGIN */
+ { 81494, 0x0000935D }, /* GL_CLIP_DEPTH_MODE */
+ { 81513, 0x0000935E }, /* GL_NEGATIVE_ONE_TO_ONE */
+ { 81536, 0x0000935F }, /* GL_ZERO_TO_ONE */
+ { 81551, 0x00009365 }, /* GL_CLEAR_TEXTURE */
+ { 81568, 0x00009366 }, /* GL_TEXTURE_REDUCTION_MODE_ARB */
+ { 81598, 0x00009367 }, /* GL_WEIGHTED_AVERAGE_ARB */
+ { 81622, 0x00009368 }, /* GL_FONT_GLYPHS_AVAILABLE_NV */
+ { 81650, 0x00009369 }, /* GL_FONT_TARGET_UNAVAILABLE_NV */
+ { 81680, 0x0000936A }, /* GL_FONT_UNAVAILABLE_NV */
+ { 81703, 0x0000936B }, /* GL_FONT_UNINTELLIGIBLE_NV */
+ { 81729, 0x0000936C }, /* GL_STANDARD_FONT_FORMAT_NV */
+ { 81756, 0x0000936D }, /* GL_FRAGMENT_INPUT_NV */
+ { 81777, 0x0000936E }, /* GL_UNIFORM_BUFFER_UNIFIED_NV */
+ { 81806, 0x0000936F }, /* GL_UNIFORM_BUFFER_ADDRESS_NV */
+ { 81835, 0x00009370 }, /* GL_UNIFORM_BUFFER_LENGTH_NV */
+ { 81863, 0x00009371 }, /* GL_MULTISAMPLES_NV */
+ { 81882, 0x00009372 }, /* GL_SUPERSAMPLE_SCALE_X_NV */
+ { 81908, 0x00009373 }, /* GL_SUPERSAMPLE_SCALE_Y_NV */
+ { 81934, 0x00009374 }, /* GL_CONFORMANT_NV */
+ { 81951, 0x00009379 }, /* GL_CONSERVATIVE_RASTER_DILATE_NV */
+ { 81984, 0x0000937A }, /* GL_CONSERVATIVE_RASTER_DILATE_RANGE_NV */
+ { 82023, 0x0000937B }, /* GL_CONSERVATIVE_RASTER_DILATE_GRANULARITY_NV */
+ { 82068, 0x0000937C }, /* GL_VIEWPORT_POSITION_W_SCALE_NV */
+ { 82100, 0x0000937D }, /* GL_VIEWPORT_POSITION_W_SCALE_X_COEFF_NV */
+ { 82140, 0x0000937E }, /* GL_VIEWPORT_POSITION_W_SCALE_Y_COEFF_NV */
+ { 82180, 0x00009380 }, /* GL_NUM_SAMPLE_COUNTS */
+ { 82201, 0x00009381 }, /* GL_MULTISAMPLE_LINE_WIDTH_RANGE */
+ { 82233, 0x00009382 }, /* GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY */
+ { 82271, 0x000093A0 }, /* GL_TRANSLATED_SHADER_SOURCE_LENGTH_ANGLE */
+ { 82312, 0x000093A1 }, /* GL_BGRA8_EXT */
+ { 82325, 0x000093A2 }, /* GL_TEXTURE_USAGE_ANGLE */
+ { 82348, 0x000093A3 }, /* GL_FRAMEBUFFER_ATTACHMENT_ANGLE */
+ { 82380, 0x000093A4 }, /* GL_PACK_REVERSE_ROW_ORDER_ANGLE */
+ { 82412, 0x000093A6 }, /* GL_PROGRAM_BINARY_ANGLE */
+ { 82436, 0x000093B0 }, /* GL_COMPRESSED_RGBA_ASTC_4x4 */
+ { 82464, 0x000093B1 }, /* GL_COMPRESSED_RGBA_ASTC_5x4 */
+ { 82492, 0x000093B2 }, /* GL_COMPRESSED_RGBA_ASTC_5x5 */
+ { 82520, 0x000093B3 }, /* GL_COMPRESSED_RGBA_ASTC_6x5 */
+ { 82548, 0x000093B4 }, /* GL_COMPRESSED_RGBA_ASTC_6x6 */
+ { 82576, 0x000093B5 }, /* GL_COMPRESSED_RGBA_ASTC_8x5 */
+ { 82604, 0x000093B6 }, /* GL_COMPRESSED_RGBA_ASTC_8x6 */
+ { 82632, 0x000093B7 }, /* GL_COMPRESSED_RGBA_ASTC_8x8 */
+ { 82660, 0x000093B8 }, /* GL_COMPRESSED_RGBA_ASTC_10x5 */
+ { 82689, 0x000093B9 }, /* GL_COMPRESSED_RGBA_ASTC_10x6 */
+ { 82718, 0x000093BA }, /* GL_COMPRESSED_RGBA_ASTC_10x8 */
+ { 82747, 0x000093BB }, /* GL_COMPRESSED_RGBA_ASTC_10x10 */
+ { 82777, 0x000093BC }, /* GL_COMPRESSED_RGBA_ASTC_12x10 */
+ { 82807, 0x000093BD }, /* GL_COMPRESSED_RGBA_ASTC_12x12 */
+ { 82837, 0x000093C0 }, /* GL_COMPRESSED_RGBA_ASTC_3x3x3_OES */
+ { 82871, 0x000093C1 }, /* GL_COMPRESSED_RGBA_ASTC_4x3x3_OES */
+ { 82905, 0x000093C2 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x3_OES */
+ { 82939, 0x000093C3 }, /* GL_COMPRESSED_RGBA_ASTC_4x4x4_OES */
+ { 82973, 0x000093C4 }, /* GL_COMPRESSED_RGBA_ASTC_5x4x4_OES */
+ { 83007, 0x000093C5 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x4_OES */
+ { 83041, 0x000093C6 }, /* GL_COMPRESSED_RGBA_ASTC_5x5x5_OES */
+ { 83075, 0x000093C7 }, /* GL_COMPRESSED_RGBA_ASTC_6x5x5_OES */
+ { 83109, 0x000093C8 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x5_OES */
+ { 83143, 0x000093C9 }, /* GL_COMPRESSED_RGBA_ASTC_6x6x6_OES */
+ { 83177, 0x000093D0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4 */
+ { 83213, 0x000093D1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4 */
+ { 83249, 0x000093D2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5 */
+ { 83285, 0x000093D3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5 */
+ { 83321, 0x000093D4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6 */
+ { 83357, 0x000093D5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x5 */
+ { 83393, 0x000093D6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x6 */
+ { 83429, 0x000093D7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_8x8 */
+ { 83465, 0x000093D8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x5 */
+ { 83502, 0x000093D9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x6 */
+ { 83539, 0x000093DA }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x8 */
+ { 83576, 0x000093DB }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_10x10 */
+ { 83614, 0x000093DC }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x10 */
+ { 83652, 0x000093DD }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_12x12 */
+ { 83690, 0x000093E0 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_3x3x3_OES */
+ { 83732, 0x000093E1 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x3x3_OES */
+ { 83774, 0x000093E2 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x3_OES */
+ { 83816, 0x000093E3 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_4x4x4_OES */
+ { 83858, 0x000093E4 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x4x4_OES */
+ { 83900, 0x000093E5 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x4_OES */
+ { 83942, 0x000093E6 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_5x5x5_OES */
+ { 83984, 0x000093E7 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x5x5_OES */
+ { 84026, 0x000093E8 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x5_OES */
+ { 84068, 0x000093E9 }, /* GL_COMPRESSED_SRGB8_ALPHA8_ASTC_6x6x6_OES */
+ { 84110, 0x000093F0 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_2BPPV2_IMG */
+ { 84152, 0x000093F1 }, /* GL_COMPRESSED_SRGB_ALPHA_PVRTC_4BPPV2_IMG */
+ { 84194, 0x000094F0 }, /* GL_PERFQUERY_COUNTER_EVENT_INTEL */
+ { 84227, 0x000094F1 }, /* GL_PERFQUERY_COUNTER_DURATION_NORM_INTEL */
+ { 84268, 0x000094F2 }, /* GL_PERFQUERY_COUNTER_DURATION_RAW_INTEL */
+ { 84308, 0x000094F3 }, /* GL_PERFQUERY_COUNTER_THROUGHPUT_INTEL */
+ { 84346, 0x000094F4 }, /* GL_PERFQUERY_COUNTER_RAW_INTEL */
+ { 84377, 0x000094F5 }, /* GL_PERFQUERY_COUNTER_TIMESTAMP_INTEL */
+ { 84414, 0x000094F8 }, /* GL_PERFQUERY_COUNTER_DATA_UINT32_INTEL */
+ { 84453, 0x000094F9 }, /* GL_PERFQUERY_COUNTER_DATA_UINT64_INTEL */
+ { 84492, 0x000094FA }, /* GL_PERFQUERY_COUNTER_DATA_FLOAT_INTEL */
+ { 84530, 0x000094FB }, /* GL_PERFQUERY_COUNTER_DATA_DOUBLE_INTEL */
+ { 84569, 0x000094FC }, /* GL_PERFQUERY_COUNTER_DATA_BOOL32_INTEL */
+ { 84608, 0x000094FD }, /* GL_PERFQUERY_QUERY_NAME_LENGTH_MAX_INTEL */
+ { 84649, 0x000094FE }, /* GL_PERFQUERY_COUNTER_NAME_LENGTH_MAX_INTEL */
+ { 84692, 0x000094FF }, /* GL_PERFQUERY_COUNTER_DESC_LENGTH_MAX_INTEL */
+ { 84735, 0x00009500 }, /* GL_PERFQUERY_GPA_EXTENDED_COUNTERS_INTEL */
+ { 84776, 0x00009548 }, /* GL_PER_GPU_STORAGE_NV */
+ { 84798, 0x00009549 }, /* GL_MULTICAST_PROGRAMMABLE_SAMPLE_LOCATION_NV */
+ { 84843, 0x0000954D }, /* GL_CONSERVATIVE_RASTER_MODE_NV */
+ { 84874, 0x0000954E }, /* GL_CONSERVATIVE_RASTER_MODE_POST_SNAP_NV */
+ { 84915, 0x0000954F }, /* GL_CONSERVATIVE_RASTER_MODE_PRE_SNAP_TRIANGLES_NV */
+ { 84965, 0x00009551 }, /* GL_SHADER_BINARY_FORMAT_SPIR_V */
+ { 84996, 0x00009552 }, /* GL_SPIR_V_BINARY */
+ { 85013, 0x00009553 }, /* GL_SPIR_V_EXTENSIONS */
+ { 85034, 0x00009554 }, /* GL_NUM_SPIR_V_EXTENSIONS */
+ { 85059, 0x00009558 }, /* GL_RENDER_GPU_MASK_NV */
+ { 85081, 0x00009580 }, /* GL_TEXTURE_TILING_EXT */
+ { 85103, 0x00009581 }, /* GL_DEDICATED_MEMORY_OBJECT_EXT */
+ { 85134, 0x00009582 }, /* GL_NUM_TILING_TYPES_EXT */
+ { 85158, 0x00009583 }, /* GL_TILING_TYPES_EXT */
+ { 85178, 0x00009584 }, /* GL_OPTIMAL_TILING_EXT */
+ { 85200, 0x00009585 }, /* GL_LINEAR_TILING_EXT */
+ { 85221, 0x00009586 }, /* GL_HANDLE_TYPE_OPAQUE_FD_EXT */
+ { 85250, 0x00009587 }, /* GL_HANDLE_TYPE_OPAQUE_WIN32_EXT */
+ { 85282, 0x00009588 }, /* GL_HANDLE_TYPE_OPAQUE_WIN32_KMT_EXT */
+ { 85318, 0x00009589 }, /* GL_HANDLE_TYPE_D3D12_TILEPOOL_EXT */
+ { 85352, 0x0000958A }, /* GL_HANDLE_TYPE_D3D12_RESOURCE_EXT */
+ { 85386, 0x0000958B }, /* GL_HANDLE_TYPE_D3D11_IMAGE_EXT */
+ { 85417, 0x0000958C }, /* GL_HANDLE_TYPE_D3D11_IMAGE_KMT_EXT */
+ { 85452, 0x0000958D }, /* GL_LAYOUT_GENERAL_EXT */
+ { 85474, 0x0000958E }, /* GL_LAYOUT_COLOR_ATTACHMENT_EXT */
+ { 85505, 0x0000958F }, /* GL_LAYOUT_DEPTH_STENCIL_ATTACHMENT_EXT */
+ { 85544, 0x00009590 }, /* GL_LAYOUT_DEPTH_STENCIL_READ_ONLY_EXT */
+ { 85582, 0x00009591 }, /* GL_LAYOUT_SHADER_READ_ONLY_EXT */
+ { 85613, 0x00009592 }, /* GL_LAYOUT_TRANSFER_SRC_EXT */
+ { 85640, 0x00009593 }, /* GL_LAYOUT_TRANSFER_DST_EXT */
+ { 85667, 0x00009594 }, /* GL_HANDLE_TYPE_D3D12_FENCE_EXT */
+ { 85698, 0x00009595 }, /* GL_D3D12_FENCE_VALUE_EXT */
+ { 85723, 0x00009596 }, /* GL_NUM_DEVICE_UUIDS_EXT */
+ { 85747, 0x00009597 }, /* GL_DEVICE_UUID_EXT */
+ { 85766, 0x00009598 }, /* GL_DRIVER_UUID_EXT */
+ { 85785, 0x00009599 }, /* GL_DEVICE_LUID_EXT */
+ { 85804, 0x0000959A }, /* GL_DEVICE_NODE_MASK_EXT */
+ { 85828, 0x0000959B }, /* GL_PROTECTED_MEMORY_OBJECT_EXT */
+ { 85859, 0x00009630 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_NUM_VIEWS_OVR */
+ { 85907, 0x00009631 }, /* GL_MAX_VIEWS_OVR */
+ { 85924, 0x00009632 }, /* GL_FRAMEBUFFER_ATTACHMENT_TEXTURE_BASE_VIEW_INDEX_OVR */
+ { 85978, 0x00009633 }, /* GL_FRAMEBUFFER_INCOMPLETE_VIEW_TARGETS_OVR */
+ { 86021, 0x00009650 }, /* GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_FAST_SIZE_EXT */
+ { 86072, 0x00009651 }, /* GL_MAX_SHADER_COMBINED_LOCAL_STORAGE_SIZE_EXT */
+ { 86118, 0x00009652 }, /* GL_FRAMEBUFFER_INCOMPLETE_INSUFFICIENT_SHADER_COMBINED_LOCAL_STORAGE_EXT */
+ { 86191, 0x000096A2 }, /* GL_FRAMEBUFFER_FETCH_NONCOHERENT_QCOM */
+ { 86229, 0x00019262 }, /* GL_RASTER_POSITION_UNCLIPPED_IBM */
+ { 86262, 0x0001A1F8 }, /* GL_PREFER_DOUBLEBUFFER_HINT_PGI */
+ { 86294, 0x0001A1FD }, /* GL_CONSERVE_MEMORY_HINT_PGI */
+ { 86322, 0x0001A1FE }, /* GL_RECLAIM_MEMORY_HINT_PGI */
+ { 86349, 0x0001A202 }, /* GL_NATIVE_GRAPHICS_HANDLE_PGI */
+ { 86379, 0x0001A203 }, /* GL_NATIVE_GRAPHICS_BEGIN_HINT_PGI */
+ { 86413, 0x0001A204 }, /* GL_NATIVE_GRAPHICS_END_HINT_PGI */
+ { 86445, 0x0001A20C }, /* GL_ALWAYS_FAST_HINT_PGI */
+ { 86469, 0x0001A20D }, /* GL_ALWAYS_SOFT_HINT_PGI */
+ { 86493, 0x0001A20E }, /* GL_ALLOW_DRAW_OBJ_HINT_PGI */
+ { 86520, 0x0001A20F }, /* GL_ALLOW_DRAW_WIN_HINT_PGI */
+ { 86547, 0x0001A210 }, /* GL_ALLOW_DRAW_FRG_HINT_PGI */
+ { 86574, 0x0001A211 }, /* GL_ALLOW_DRAW_MEM_HINT_PGI */
+ { 86601, 0x0001A216 }, /* GL_STRICT_DEPTHFUNC_HINT_PGI */
+ { 86630, 0x0001A217 }, /* GL_STRICT_LIGHTING_HINT_PGI */
+ { 86658, 0x0001A218 }, /* GL_STRICT_SCISSOR_HINT_PGI */
+ { 86685, 0x0001A219 }, /* GL_FULL_STIPPLE_HINT_PGI */
+ { 86710, 0x0001A220 }, /* GL_CLIP_NEAR_HINT_PGI */
+ { 86732, 0x0001A221 }, /* GL_CLIP_FAR_HINT_PGI */
+ { 86753, 0x0001A222 }, /* GL_WIDE_LINE_HINT_PGI */
+ { 86775, 0x0001A223 }, /* GL_BACK_NORMALS_HINT_PGI */
+ { 86800, 0x0001A22A }, /* GL_VERTEX_DATA_HINT_PGI */
+ { 86824, 0x0001A22B }, /* GL_VERTEX_CONSISTENT_HINT_PGI */
+ { 86854, 0x0001A22C }, /* GL_MATERIAL_SIDE_HINT_PGI */
+ { 86880, 0x0001A22D }, /* GL_MAX_VERTEX_HINT_PGI */
+ { 86903, 0x00103050 }, /* GL_CULL_VERTEX_IBM */
+ { 86922, 0x00103060 }, /* GL_ALL_STATIC_DATA_IBM */
+ { 86945, 0x00103061 }, /* GL_STATIC_VERTEX_ARRAY_IBM */
+ { 86972, 0x00103070 }, /* GL_VERTEX_ARRAY_LIST_IBM */
+ { 86997, 0x00103071 }, /* GL_NORMAL_ARRAY_LIST_IBM */
+ { 87022, 0x00103072 }, /* GL_COLOR_ARRAY_LIST_IBM */
+ { 87046, 0x00103073 }, /* GL_INDEX_ARRAY_LIST_IBM */
+ { 87070, 0x00103074 }, /* GL_TEXTURE_COORD_ARRAY_LIST_IBM */
+ { 87102, 0x00103075 }, /* GL_EDGE_FLAG_ARRAY_LIST_IBM */
+ { 87130, 0x00103076 }, /* GL_FOG_COORDINATE_ARRAY_LIST_IBM */
+ { 87163, 0x00103077 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_IBM */
+ { 87197, 0x00103080 }, /* GL_VERTEX_ARRAY_LIST_STRIDE_IBM */
+ { 87229, 0x00103081 }, /* GL_NORMAL_ARRAY_LIST_STRIDE_IBM */
+ { 87261, 0x00103082 }, /* GL_COLOR_ARRAY_LIST_STRIDE_IBM */
+ { 87292, 0x00103083 }, /* GL_INDEX_ARRAY_LIST_STRIDE_IBM */
+ { 87323, 0x00103084 }, /* GL_TEXTURE_COORD_ARRAY_LIST_STRIDE_IBM */
+ { 87362, 0x00103085 }, /* GL_EDGE_FLAG_ARRAY_LIST_STRIDE_IBM */
+ { 87397, 0x00103086 }, /* GL_FOG_COORDINATE_ARRAY_LIST_STRIDE_IBM */
+ { 87437, 0x00103087 }, /* GL_SECONDARY_COLOR_ARRAY_LIST_STRIDE_IBM */
+};
+
+
+typedef int (*cfunc)(const void *, const void *);
+
+/**
+ * Compare a key enum value to an element in the \c enum_string_table_offsets array.
+ *
+ * \c bsearch always passes the key as the first parameter and the pointer
+ * to the array element as the second parameter. We can elimiate some
+ * extra work by taking advantage of that fact.
+ *
+ * \param a Pointer to the desired enum name.
+ * \param b Pointer into the \c enum_string_table_offsets array.
+ */
+static int compar_nr( const int *a, enum_elt *b )
+{
+ return a[0] - b->n;
+}
+
+
+static char token_tmp[20];
+
+/**
+ * This function always returns a string. If the number is a valid enum, it
+ * returns the enum name. Otherwise, it returns a numeric string.
+ */
+const char *
+_mesa_enum_to_string(int nr)
+{
+ enum_elt *elt;
+
+ elt = bsearch(& nr, enum_string_table_offsets,
+ ARRAY_SIZE(enum_string_table_offsets),
+ sizeof(enum_string_table_offsets[0]),
+ (cfunc) compar_nr);
+
+ if (elt != NULL) {
+ return &enum_string_table[elt->offset];
+ }
+ else {
+ /* this is not re-entrant safe, no big deal here */
+ _mesa_snprintf(token_tmp, sizeof(token_tmp) - 1, "0x%x", nr);
+ token_tmp[sizeof(token_tmp) - 1] = '\0';
+ return token_tmp;
+ }
+}
+
+/**
+ * Primitive names
+ */
+static const char *prim_names[PRIM_MAX+3] = {
+ "GL_POINTS",
+ "GL_LINES",
+ "GL_LINE_LOOP",
+ "GL_LINE_STRIP",
+ "GL_TRIANGLES",
+ "GL_TRIANGLE_STRIP",
+ "GL_TRIANGLE_FAN",
+ "GL_QUADS",
+ "GL_QUAD_STRIP",
+ "GL_POLYGON",
+ "GL_LINES_ADJACENCY",
+ "GL_LINE_STRIP_ADJACENCY",
+ "GL_TRIANGLES_ADJACENCY",
+ "GL_TRIANGLE_STRIP_ADJACENCY",
+ "GL_PATCHES",
+ "outside begin/end",
+ "unknown state"
+};
+
+
+/* Get the name of an enum given that it is a primitive type. Avoids
+ * GL_FALSE/GL_POINTS ambiguity and others.
+ */
+const char *
+_mesa_lookup_prim_by_nr(GLuint nr)
+{
+ if (nr < ARRAY_SIZE(prim_names))
+ return prim_names[nr];
+ else
+ return "invalid mode";
+}
+
+
+
diff --git a/prebuilt-intermediates/main/format_fallback.c b/prebuilt-intermediates/main/format_fallback.c
new file mode 100644
index 0000000..a1719fa
--- /dev/null
+++ b/prebuilt-intermediates/main/format_fallback.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright 2017 Google
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "formats.h"
+#include "util/macros.h"
+
+/**
+ * For an sRGB format, return the corresponding linear color space format.
+ * For non-sRGB formats, return the format as-is.
+ */
+mesa_format
+_mesa_get_srgb_format_linear(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ return MESA_FORMAT_A8B8G8R8_UNORM;
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ return MESA_FORMAT_B8G8R8A8_UNORM;
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ return MESA_FORMAT_A8R8G8B8_UNORM;
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ return MESA_FORMAT_B8G8R8X8_UNORM;
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ return MESA_FORMAT_X8R8G8B8_UNORM;
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ return MESA_FORMAT_R8G8B8A8_UNORM;
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ return MESA_FORMAT_R8G8B8X8_UNORM;
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ return MESA_FORMAT_X8B8G8R8_UNORM;
+ case MESA_FORMAT_L8A8_SRGB:
+ return MESA_FORMAT_L8A8_UNORM;
+ case MESA_FORMAT_A8L8_SRGB:
+ return MESA_FORMAT_A8L8_UNORM;
+ case MESA_FORMAT_L_SRGB8:
+ return MESA_FORMAT_L_UNORM8;
+ case MESA_FORMAT_BGR_SRGB8:
+ return MESA_FORMAT_BGR_UNORM8;
+ case MESA_FORMAT_SRGB_DXT1:
+ return MESA_FORMAT_RGB_DXT1;
+ case MESA_FORMAT_SRGBA_DXT1:
+ return MESA_FORMAT_RGBA_DXT1;
+ case MESA_FORMAT_SRGBA_DXT3:
+ return MESA_FORMAT_RGBA_DXT3;
+ case MESA_FORMAT_SRGBA_DXT5:
+ return MESA_FORMAT_RGBA_DXT5;
+ case MESA_FORMAT_ETC2_SRGB8:
+ return MESA_FORMAT_ETC2_RGB8;
+ case MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC:
+ return MESA_FORMAT_ETC2_RGBA8_EAC;
+ case MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1:
+ return MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1;
+ case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
+ return MESA_FORMAT_BPTC_RGBA_UNORM;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4:
+ return MESA_FORMAT_RGBA_ASTC_4x4;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4:
+ return MESA_FORMAT_RGBA_ASTC_5x4;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5:
+ return MESA_FORMAT_RGBA_ASTC_5x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5:
+ return MESA_FORMAT_RGBA_ASTC_6x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6:
+ return MESA_FORMAT_RGBA_ASTC_6x6;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5:
+ return MESA_FORMAT_RGBA_ASTC_8x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6:
+ return MESA_FORMAT_RGBA_ASTC_8x6;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8:
+ return MESA_FORMAT_RGBA_ASTC_8x8;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5:
+ return MESA_FORMAT_RGBA_ASTC_10x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6:
+ return MESA_FORMAT_RGBA_ASTC_10x6;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8:
+ return MESA_FORMAT_RGBA_ASTC_10x8;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10:
+ return MESA_FORMAT_RGBA_ASTC_10x10;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10:
+ return MESA_FORMAT_RGBA_ASTC_12x10;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12:
+ return MESA_FORMAT_RGBA_ASTC_12x12;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3:
+ return MESA_FORMAT_RGBA_ASTC_3x3x3;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3:
+ return MESA_FORMAT_RGBA_ASTC_4x3x3;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3:
+ return MESA_FORMAT_RGBA_ASTC_4x4x3;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4:
+ return MESA_FORMAT_RGBA_ASTC_4x4x4;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4:
+ return MESA_FORMAT_RGBA_ASTC_5x4x4;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4:
+ return MESA_FORMAT_RGBA_ASTC_5x5x4;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5:
+ return MESA_FORMAT_RGBA_ASTC_5x5x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5:
+ return MESA_FORMAT_RGBA_ASTC_6x5x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5:
+ return MESA_FORMAT_RGBA_ASTC_6x6x5;
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6:
+ return MESA_FORMAT_RGBA_ASTC_6x6x6;
+ default:
+ return format;
+ }
+}
+
+/**
+ * For a linear format, return the corresponding sRGB color space format.
+ * For an sRGB format, return the format as-is.
+ * Assert-fails if the format is not sRGB and does not have an sRGB equivalent.
+ */
+mesa_format
+_mesa_get_linear_format_srgb(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ return MESA_FORMAT_A8B8G8R8_SRGB;
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ return MESA_FORMAT_B8G8R8A8_SRGB;
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ return MESA_FORMAT_A8R8G8B8_SRGB;
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ return MESA_FORMAT_B8G8R8X8_SRGB;
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ return MESA_FORMAT_X8R8G8B8_SRGB;
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ return MESA_FORMAT_R8G8B8A8_SRGB;
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ return MESA_FORMAT_R8G8B8X8_SRGB;
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ return MESA_FORMAT_X8B8G8R8_SRGB;
+ case MESA_FORMAT_L8A8_UNORM:
+ return MESA_FORMAT_L8A8_SRGB;
+ case MESA_FORMAT_A8L8_UNORM:
+ return MESA_FORMAT_A8L8_SRGB;
+ case MESA_FORMAT_L_UNORM8:
+ return MESA_FORMAT_L_SRGB8;
+ case MESA_FORMAT_BGR_UNORM8:
+ return MESA_FORMAT_BGR_SRGB8;
+ case MESA_FORMAT_RGB_DXT1:
+ return MESA_FORMAT_SRGB_DXT1;
+ case MESA_FORMAT_RGBA_DXT1:
+ return MESA_FORMAT_SRGBA_DXT1;
+ case MESA_FORMAT_RGBA_DXT3:
+ return MESA_FORMAT_SRGBA_DXT3;
+ case MESA_FORMAT_RGBA_DXT5:
+ return MESA_FORMAT_SRGBA_DXT5;
+ case MESA_FORMAT_ETC2_RGB8:
+ return MESA_FORMAT_ETC2_SRGB8;
+ case MESA_FORMAT_ETC2_RGBA8_EAC:
+ return MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC;
+ case MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1:
+ return MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1;
+ case MESA_FORMAT_BPTC_RGBA_UNORM:
+ return MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM;
+ case MESA_FORMAT_RGBA_ASTC_4x4:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4;
+ case MESA_FORMAT_RGBA_ASTC_5x4:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4;
+ case MESA_FORMAT_RGBA_ASTC_5x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5;
+ case MESA_FORMAT_RGBA_ASTC_6x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5;
+ case MESA_FORMAT_RGBA_ASTC_6x6:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6;
+ case MESA_FORMAT_RGBA_ASTC_8x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5;
+ case MESA_FORMAT_RGBA_ASTC_8x6:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6;
+ case MESA_FORMAT_RGBA_ASTC_8x8:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8;
+ case MESA_FORMAT_RGBA_ASTC_10x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5;
+ case MESA_FORMAT_RGBA_ASTC_10x6:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6;
+ case MESA_FORMAT_RGBA_ASTC_10x8:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8;
+ case MESA_FORMAT_RGBA_ASTC_10x10:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10;
+ case MESA_FORMAT_RGBA_ASTC_12x10:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10;
+ case MESA_FORMAT_RGBA_ASTC_12x12:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12;
+ case MESA_FORMAT_RGBA_ASTC_3x3x3:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3;
+ case MESA_FORMAT_RGBA_ASTC_4x3x3:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3;
+ case MESA_FORMAT_RGBA_ASTC_4x4x3:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3;
+ case MESA_FORMAT_RGBA_ASTC_4x4x4:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4;
+ case MESA_FORMAT_RGBA_ASTC_5x4x4:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4;
+ case MESA_FORMAT_RGBA_ASTC_5x5x4:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4;
+ case MESA_FORMAT_RGBA_ASTC_5x5x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5;
+ case MESA_FORMAT_RGBA_ASTC_6x5x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5;
+ case MESA_FORMAT_RGBA_ASTC_6x6x5:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5;
+ case MESA_FORMAT_RGBA_ASTC_6x6x6:
+ return MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6;
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ case MESA_FORMAT_L8A8_SRGB:
+ case MESA_FORMAT_A8L8_SRGB:
+ case MESA_FORMAT_L_SRGB8:
+ case MESA_FORMAT_BGR_SRGB8:
+ case MESA_FORMAT_SRGB_DXT1:
+ case MESA_FORMAT_SRGBA_DXT1:
+ case MESA_FORMAT_SRGBA_DXT3:
+ case MESA_FORMAT_SRGBA_DXT5:
+ case MESA_FORMAT_ETC2_SRGB8:
+ case MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC:
+ case MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1:
+ case MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5:
+ case MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6:
+ return format;
+ default:
+ unreachable("Given format does not have an sRGB equivalent");
+ }
+}
+
+/**
+ * If the format has an alpha channel, and there exists a non-alpha
+ * variant of the format with an identical bit layout, then return
+ * the non-alpha format. Otherwise return the original format.
+ *
+ * Examples:
+ * Fallback exists:
+ * MESA_FORMAT_R8G8B8X8_UNORM -> MESA_FORMAT_R8G8B8A8_UNORM
+ * MESA_FORMAT_RGBX_UNORM16 -> MESA_FORMAT_RGBA_UNORM16
+ *
+ * No fallback:
+ * MESA_FORMAT_R8G8B8A8_UNORM -> MESA_FORMAT_R8G8B8A8_UNORM
+ * MESA_FORMAT_Z_FLOAT32 -> MESA_FORMAT_Z_FLOAT32
+ */
+mesa_format
+_mesa_format_fallback_rgbx_to_rgba(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ return MESA_FORMAT_A8B8G8R8_UNORM;
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ return MESA_FORMAT_R8G8B8A8_UNORM;
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ return MESA_FORMAT_B8G8R8A8_UNORM;
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ return MESA_FORMAT_A8R8G8B8_UNORM;
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ return MESA_FORMAT_B4G4R4A4_UNORM;
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ return MESA_FORMAT_A1B5G5R5_UNORM;
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ return MESA_FORMAT_B5G5R5A1_UNORM;
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ return MESA_FORMAT_B10G10R10A2_UNORM;
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ return MESA_FORMAT_R10G10B10A2_UNORM;
+ case MESA_FORMAT_RGBX_UNORM16:
+ return MESA_FORMAT_RGBA_UNORM16;
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ return MESA_FORMAT_A8B8G8R8_SNORM;
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ return MESA_FORMAT_R8G8B8A8_SNORM;
+ case MESA_FORMAT_RGBX_SNORM16:
+ return MESA_FORMAT_RGBA_SNORM16;
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ return MESA_FORMAT_B8G8R8A8_SRGB;
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ return MESA_FORMAT_A8R8G8B8_SRGB;
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ return MESA_FORMAT_R8G8B8A8_SRGB;
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ return MESA_FORMAT_A8B8G8R8_SRGB;
+ case MESA_FORMAT_RGBX_FLOAT16:
+ return MESA_FORMAT_RGBA_FLOAT16;
+ case MESA_FORMAT_RGBX_FLOAT32:
+ return MESA_FORMAT_RGBA_FLOAT32;
+ case MESA_FORMAT_RGBX_UINT8:
+ return MESA_FORMAT_RGBA_UINT8;
+ case MESA_FORMAT_RGBX_UINT16:
+ return MESA_FORMAT_RGBA_UINT16;
+ case MESA_FORMAT_RGBX_UINT32:
+ return MESA_FORMAT_RGBA_UINT32;
+ case MESA_FORMAT_RGBX_SINT8:
+ return MESA_FORMAT_RGBA_SINT8;
+ case MESA_FORMAT_RGBX_SINT16:
+ return MESA_FORMAT_RGBA_SINT16;
+ case MESA_FORMAT_RGBX_SINT32:
+ return MESA_FORMAT_RGBA_SINT32;
+ default:
+ return format;
+ }
+}
diff --git a/prebuilt-intermediates/main/format_info.h b/prebuilt-intermediates/main/format_info.h
new file mode 100644
index 0000000..dede3e6
--- /dev/null
+++ b/prebuilt-intermediates/main/format_info.h
@@ -0,0 +1,3828 @@
+
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+ /*
+ * This file is AUTOGENERATED by format_info.py. Do not edit it
+ * manually or commit it into version control.
+ */
+
+static const struct gl_format_info format_info[MESA_FORMAT_COUNT] =
+{
+
+ {
+ .Name = MESA_FORMAT_NONE,
+ .StrName = "MESA_FORMAT_NONE",
+ .Layout = MESA_FORMAT_LAYOUT_OTHER,
+ .BaseFormat = GL_NONE,
+ .DataType = GL_NONE,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 4, 4, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A8B8G8R8_UNORM,
+ .StrName = "MESA_FORMAT_A8B8G8R8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 3, 2, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_X8B8G8R8_UNORM,
+ .StrName = "MESA_FORMAT_X8B8G8R8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 3, 2, 1, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8A8_UNORM,
+ .StrName = "MESA_FORMAT_R8G8B8A8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8X8_UNORM,
+ .StrName = "MESA_FORMAT_R8G8B8X8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_B8G8R8A8_UNORM,
+ .StrName = "MESA_FORMAT_B8G8R8A8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 2, 1, 0, 3),
+ },
+ {
+ .Name = MESA_FORMAT_B8G8R8X8_UNORM,
+ .StrName = "MESA_FORMAT_B8G8R8X8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 2, 1, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_A8R8G8B8_UNORM,
+ .StrName = "MESA_FORMAT_A8R8G8B8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 1, 2, 3, 0),
+ },
+ {
+ .Name = MESA_FORMAT_X8R8G8B8_UNORM,
+ .StrName = "MESA_FORMAT_X8R8G8B8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 1, 2, 3, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L16A16_UNORM,
+ .StrName = "MESA_FORMAT_L16A16_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_A16L16_UNORM,
+ .StrName = "MESA_FORMAT_A16L16_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 1, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 2, 1, 1, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_B5G6R5_UNORM,
+ .StrName = "MESA_FORMAT_B5G6R5_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 6, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R5G6B5_UNORM,
+ .StrName = "MESA_FORMAT_R5G6B5_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 6, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B4G4R4A4_UNORM,
+ .StrName = "MESA_FORMAT_B4G4R4A4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B4G4R4X4_UNORM,
+ .StrName = "MESA_FORMAT_B4G4R4X4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A4R4G4B4_UNORM,
+ .StrName = "MESA_FORMAT_A4R4G4B4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A1B5G5R5_UNORM,
+ .StrName = "MESA_FORMAT_A1B5G5R5_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_X1B5G5R5_UNORM,
+ .StrName = "MESA_FORMAT_X1B5G5R5_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 3, 2, 1, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B5G5R5A1_UNORM,
+ .StrName = "MESA_FORMAT_B5G5R5A1_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B5G5R5X1_UNORM,
+ .StrName = "MESA_FORMAT_B5G5R5X1_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A1R5G5B5_UNORM,
+ .StrName = "MESA_FORMAT_A1R5G5B5_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_L8A8_UNORM,
+ .StrName = "MESA_FORMAT_L8A8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_A8L8_UNORM,
+ .StrName = "MESA_FORMAT_A8L8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 1, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 1, 1, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8_UNORM,
+ .StrName = "MESA_FORMAT_R8G8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_G8R8_UNORM,
+ .StrName = "MESA_FORMAT_G8R8_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 0, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 1, 0, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L4A4_UNORM,
+ .StrName = "MESA_FORMAT_L4A4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 4,
+ .LuminanceBits = 4, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B2G3R3_UNORM,
+ .StrName = "MESA_FORMAT_B2G3R3_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 3, .GreenBits = 3, .BlueBits = 2, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R16G16_UNORM,
+ .StrName = "MESA_FORMAT_R16G16_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_G16R16_UNORM,
+ .StrName = "MESA_FORMAT_G16R16_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 0, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 2, 1, 0, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_B10G10R10A2_UNORM,
+ .StrName = "MESA_FORMAT_B10G10R10A2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B10G10R10X2_UNORM,
+ .StrName = "MESA_FORMAT_B10G10R10X2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R10G10B10A2_UNORM,
+ .StrName = "MESA_FORMAT_R10G10B10A2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R10G10B10X2_UNORM,
+ .StrName = "MESA_FORMAT_R10G10B10X2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_S8_UINT_Z24_UNORM,
+ .StrName = "MESA_FORMAT_S8_UINT_Z24_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_DEPTH_STENCIL,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 24, .StencilBits = 8,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 6, 6 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_X8_UINT_Z24_UNORM,
+ .StrName = "MESA_FORMAT_X8_UINT_Z24_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_DEPTH_COMPONENT,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 24, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 6, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(3, 0, 0, 1, 2, 0, 6, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_Z24_UNORM_S8_UINT,
+ .StrName = "MESA_FORMAT_Z24_UNORM_S8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_DEPTH_STENCIL,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 24, .StencilBits = 8,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 0, 6, 6 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_Z24_UNORM_X8_UINT,
+ .StrName = "MESA_FORMAT_Z24_UNORM_X8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_DEPTH_COMPONENT,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 24, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 6, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(3, 0, 0, 1, 2, 1, 6, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_R3G3B2_UNORM,
+ .StrName = "MESA_FORMAT_R3G3B2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 3, .GreenBits = 3, .BlueBits = 2, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A4B4G4R4_UNORM,
+ .StrName = "MESA_FORMAT_A4B4G4R4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R4G4B4A4_UNORM,
+ .StrName = "MESA_FORMAT_R4G4B4A4_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R5G5B5A1_UNORM,
+ .StrName = "MESA_FORMAT_R5G5B5A1_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A2B10G10R10_UNORM,
+ .StrName = "MESA_FORMAT_A2B10G10R10_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A2R10G10B10_UNORM,
+ .StrName = "MESA_FORMAT_A2R10G10B10_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_YCBCR,
+ .StrName = "MESA_FORMAT_YCBCR",
+ .Layout = MESA_FORMAT_LAYOUT_OTHER,
+ .BaseFormat = GL_YCBCR_MESA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_YCBCR_REV,
+ .StrName = "MESA_FORMAT_YCBCR_REV",
+ .Layout = MESA_FORMAT_LAYOUT_OTHER,
+ .BaseFormat = GL_YCBCR_MESA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A_UNORM8,
+ .StrName = "MESA_FORMAT_A_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_UNORM16,
+ .StrName = "MESA_FORMAT_A_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_L_UNORM8,
+ .StrName = "MESA_FORMAT_L_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_UNORM16,
+ .StrName = "MESA_FORMAT_L_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_I_UNORM8,
+ .StrName = "MESA_FORMAT_I_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 8, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_UNORM16,
+ .StrName = "MESA_FORMAT_I_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 16, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_R_UNORM8,
+ .StrName = "MESA_FORMAT_R_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_UNORM16,
+ .StrName = "MESA_FORMAT_R_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_BGR_UNORM8,
+ .StrName = "MESA_FORMAT_BGR_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 3,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 3, 2, 1, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_UNORM8,
+ .StrName = "MESA_FORMAT_RGB_UNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 3,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_UNORM16,
+ .StrName = "MESA_FORMAT_RGBA_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_UNORM16,
+ .StrName = "MESA_FORMAT_RGBX_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_Z_UNORM16,
+ .StrName = "MESA_FORMAT_Z_UNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_DEPTH_COMPONENT,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 16, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 6, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 1, 1, 0, 6, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_Z_UNORM32,
+ .StrName = "MESA_FORMAT_Z_UNORM32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_DEPTH_COMPONENT,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 32, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 6, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 1, 1, 0, 6, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_S_UINT8,
+ .StrName = "MESA_FORMAT_S_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_STENCIL_INDEX,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 8,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 6, 0, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 1, 6, 0, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_A8B8G8R8_SNORM,
+ .StrName = "MESA_FORMAT_A8B8G8R8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 4, 3, 2, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_X8B8G8R8_SNORM,
+ .StrName = "MESA_FORMAT_X8B8G8R8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 4, 3, 2, 1, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8A8_SNORM,
+ .StrName = "MESA_FORMAT_R8G8B8A8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8X8_SNORM,
+ .StrName = "MESA_FORMAT_R8G8B8X8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R16G16_SNORM,
+ .StrName = "MESA_FORMAT_R16G16_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_G16R16_SNORM,
+ .StrName = "MESA_FORMAT_G16R16_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 0, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 2, 1, 0, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8_SNORM,
+ .StrName = "MESA_FORMAT_R8G8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_G8R8_SNORM,
+ .StrName = "MESA_FORMAT_G8R8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 0, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 2, 1, 0, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L8A8_SNORM,
+ .StrName = "MESA_FORMAT_L8A8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_A8L8_SNORM,
+ .StrName = "MESA_FORMAT_A8L8_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 1, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 2, 1, 1, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_SNORM8,
+ .StrName = "MESA_FORMAT_A_SNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_SNORM16,
+ .StrName = "MESA_FORMAT_A_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_L_SNORM8,
+ .StrName = "MESA_FORMAT_L_SNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_SNORM16,
+ .StrName = "MESA_FORMAT_L_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_I_SNORM8,
+ .StrName = "MESA_FORMAT_I_SNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 8, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_SNORM16,
+ .StrName = "MESA_FORMAT_I_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 16, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_R_SNORM8,
+ .StrName = "MESA_FORMAT_R_SNORM8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_SNORM16,
+ .StrName = "MESA_FORMAT_R_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_LA_SNORM16,
+ .StrName = "MESA_FORMAT_LA_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_SNORM16,
+ .StrName = "MESA_FORMAT_RGB_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 6,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_SNORM16,
+ .StrName = "MESA_FORMAT_RGBA_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_SNORM16,
+ .StrName = "MESA_FORMAT_RGBX_SNORM16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_A8B8G8R8_SRGB,
+ .StrName = "MESA_FORMAT_A8B8G8R8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 3, 2, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_B8G8R8A8_SRGB,
+ .StrName = "MESA_FORMAT_B8G8R8A8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 2, 1, 0, 3),
+ },
+ {
+ .Name = MESA_FORMAT_A8R8G8B8_SRGB,
+ .StrName = "MESA_FORMAT_A8R8G8B8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 1, 2, 3, 0),
+ },
+ {
+ .Name = MESA_FORMAT_B8G8R8X8_SRGB,
+ .StrName = "MESA_FORMAT_B8G8R8X8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 2, 1, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_X8R8G8B8_SRGB,
+ .StrName = "MESA_FORMAT_X8R8G8B8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 1, 2, 3, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8A8_SRGB,
+ .StrName = "MESA_FORMAT_R8G8B8A8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8X8_SRGB,
+ .StrName = "MESA_FORMAT_R8G8B8X8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_X8B8G8R8_SRGB,
+ .StrName = "MESA_FORMAT_X8B8G8R8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 4, 3, 2, 1, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L8A8_SRGB,
+ .StrName = "MESA_FORMAT_L8A8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_A8L8_SRGB,
+ .StrName = "MESA_FORMAT_A8L8_SRGB",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 1, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 2, 1, 1, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_L_SRGB8,
+ .StrName = "MESA_FORMAT_L_SRGB8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_BGR_SRGB8,
+ .StrName = "MESA_FORMAT_BGR_SRGB8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 3,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 1, 3, 2, 1, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R9G9B9E5_FLOAT,
+ .StrName = "MESA_FORMAT_R9G9B9E5_FLOAT",
+ .Layout = MESA_FORMAT_LAYOUT_OTHER,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 9, .GreenBits = 9, .BlueBits = 9, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R11G11B10_FLOAT,
+ .StrName = "MESA_FORMAT_R11G11B10_FLOAT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 11, .GreenBits = 11, .BlueBits = 10, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_Z32_FLOAT_S8X24_UINT,
+ .StrName = "MESA_FORMAT_Z32_FLOAT_S8X24_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_DEPTH_STENCIL,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 32, .StencilBits = 8,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 2, 0, 6, 6 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A_FLOAT16,
+ .StrName = "MESA_FORMAT_A_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_FLOAT32,
+ .StrName = "MESA_FORMAT_A_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_L_FLOAT16,
+ .StrName = "MESA_FORMAT_L_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_FLOAT32,
+ .StrName = "MESA_FORMAT_L_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_LA_FLOAT16,
+ .StrName = "MESA_FORMAT_LA_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_FLOAT32,
+ .StrName = "MESA_FORMAT_LA_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_I_FLOAT16,
+ .StrName = "MESA_FORMAT_I_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 16, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_FLOAT32,
+ .StrName = "MESA_FORMAT_I_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 32, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_R_FLOAT16,
+ .StrName = "MESA_FORMAT_R_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_FLOAT32,
+ .StrName = "MESA_FORMAT_R_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_FLOAT,
+ .RedBits = 32, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_FLOAT16,
+ .StrName = "MESA_FORMAT_RG_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_FLOAT32,
+ .StrName = "MESA_FORMAT_RG_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_FLOAT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_FLOAT16,
+ .StrName = "MESA_FORMAT_RGB_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 6,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_FLOAT32,
+ .StrName = "MESA_FORMAT_RGB_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 12,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_FLOAT16,
+ .StrName = "MESA_FORMAT_RGBA_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_FLOAT32,
+ .StrName = "MESA_FORMAT_RGBA_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_FLOAT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_FLOAT16,
+ .StrName = "MESA_FORMAT_RGBX_FLOAT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 1, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_FLOAT32,
+ .StrName = "MESA_FORMAT_RGBX_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_Z_FLOAT32,
+ .StrName = "MESA_FORMAT_Z_FLOAT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_DEPTH_COMPONENT,
+ .DataType = GL_FLOAT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 32, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 6, 6, 6 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 1, 1, 1, 0, 6, 6, 6),
+ },
+ {
+ .Name = MESA_FORMAT_A8B8G8R8_UINT,
+ .StrName = "MESA_FORMAT_A8B8G8R8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 3, 2, 1, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A8R8G8B8_UINT,
+ .StrName = "MESA_FORMAT_A8R8G8B8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 1, 2, 3, 0),
+ },
+ {
+ .Name = MESA_FORMAT_R8G8B8A8_UINT,
+ .StrName = "MESA_FORMAT_R8G8B8A8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_B8G8R8A8_UINT,
+ .StrName = "MESA_FORMAT_B8G8R8A8_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 2, 1, 0, 3),
+ },
+ {
+ .Name = MESA_FORMAT_B10G10R10A2_UINT,
+ .StrName = "MESA_FORMAT_B10G10R10A2_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R10G10B10A2_UINT,
+ .StrName = "MESA_FORMAT_R10G10B10A2_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A2B10G10R10_UINT,
+ .StrName = "MESA_FORMAT_A2B10G10R10_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A2R10G10B10_UINT,
+ .StrName = "MESA_FORMAT_A2R10G10B10_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 10, .GreenBits = 10, .BlueBits = 10, .AlphaBits = 2,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B5G6R5_UINT,
+ .StrName = "MESA_FORMAT_B5G6R5_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 6, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R5G6B5_UINT,
+ .StrName = "MESA_FORMAT_R5G6B5_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 6, .BlueBits = 5, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B2G3R3_UINT,
+ .StrName = "MESA_FORMAT_B2G3R3_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 3, .GreenBits = 3, .BlueBits = 2, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 2, 1, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R3G3B2_UINT,
+ .StrName = "MESA_FORMAT_R3G3B2_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 3, .GreenBits = 3, .BlueBits = 2, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A4B4G4R4_UINT,
+ .StrName = "MESA_FORMAT_A4B4G4R4_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R4G4B4A4_UINT,
+ .StrName = "MESA_FORMAT_R4G4B4A4_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B4G4R4A4_UINT,
+ .StrName = "MESA_FORMAT_B4G4R4A4_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A4R4G4B4_UINT,
+ .StrName = "MESA_FORMAT_A4R4G4B4_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A1B5G5R5_UINT,
+ .StrName = "MESA_FORMAT_A1B5G5R5_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 3, 2, 1, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_B5G5R5A1_UINT,
+ .StrName = "MESA_FORMAT_B5G5R5A1_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 2, 1, 0, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A1R5G5B5_UINT,
+ .StrName = "MESA_FORMAT_A1R5G5B5_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 1, 2, 3, 0 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R5G5B5A1_UINT,
+ .StrName = "MESA_FORMAT_R5G5B5A1_UINT",
+ .Layout = MESA_FORMAT_LAYOUT_PACKED,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 5, .GreenBits = 5, .BlueBits = 5, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_A_UINT8,
+ .StrName = "MESA_FORMAT_A_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_UINT16,
+ .StrName = "MESA_FORMAT_A_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_UINT32,
+ .StrName = "MESA_FORMAT_A_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_SINT8,
+ .StrName = "MESA_FORMAT_A_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_SINT16,
+ .StrName = "MESA_FORMAT_A_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_A_SINT32,
+ .StrName = "MESA_FORMAT_A_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 4, 4, 4, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 1, 4, 4, 4, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_UINT8,
+ .StrName = "MESA_FORMAT_I_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 8, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_UINT16,
+ .StrName = "MESA_FORMAT_I_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 16, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_UINT32,
+ .StrName = "MESA_FORMAT_I_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 32, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_SINT8,
+ .StrName = "MESA_FORMAT_I_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 8, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_SINT16,
+ .StrName = "MESA_FORMAT_I_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 16, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_I_SINT32,
+ .StrName = "MESA_FORMAT_I_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_INTENSITY,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 32, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 0 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 1, 0, 0, 0, 0),
+ },
+ {
+ .Name = MESA_FORMAT_L_UINT8,
+ .StrName = "MESA_FORMAT_L_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_UINT16,
+ .StrName = "MESA_FORMAT_L_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_UINT32,
+ .StrName = "MESA_FORMAT_L_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_SINT8,
+ .StrName = "MESA_FORMAT_L_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_SINT16,
+ .StrName = "MESA_FORMAT_L_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_L_SINT32,
+ .StrName = "MESA_FORMAT_L_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 1, 0, 0, 0, 5),
+ },
+ {
+ .Name = MESA_FORMAT_LA_UINT8,
+ .StrName = "MESA_FORMAT_LA_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_UINT16,
+ .StrName = "MESA_FORMAT_LA_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_UINT32,
+ .StrName = "MESA_FORMAT_LA_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_SINT8,
+ .StrName = "MESA_FORMAT_LA_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_SINT16,
+ .StrName = "MESA_FORMAT_LA_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 16,
+ .LuminanceBits = 16, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_LA_SINT32,
+ .StrName = "MESA_FORMAT_LA_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_INT,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 32,
+ .LuminanceBits = 32, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 2, 0, 0, 0, 1),
+ },
+ {
+ .Name = MESA_FORMAT_R_UINT8,
+ .StrName = "MESA_FORMAT_R_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_UINT16,
+ .StrName = "MESA_FORMAT_R_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 16, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_UINT32,
+ .StrName = "MESA_FORMAT_R_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 32, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_SINT8,
+ .StrName = "MESA_FORMAT_R_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_INT,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 1,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_SINT16,
+ .StrName = "MESA_FORMAT_R_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_INT,
+ .RedBits = 16, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_R_SINT32,
+ .StrName = "MESA_FORMAT_R_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RED,
+ .DataType = GL_INT,
+ .RedBits = 32, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 1, 0, 4, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_UINT8,
+ .StrName = "MESA_FORMAT_RG_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_UINT16,
+ .StrName = "MESA_FORMAT_RG_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_UINT32,
+ .StrName = "MESA_FORMAT_RG_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_SINT8,
+ .StrName = "MESA_FORMAT_RG_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 2,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_SINT16,
+ .StrName = "MESA_FORMAT_RG_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RG_SINT32,
+ .StrName = "MESA_FORMAT_RG_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RG,
+ .DataType = GL_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 2, 0, 1, 4, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_UINT8,
+ .StrName = "MESA_FORMAT_RGB_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 3,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_UINT16,
+ .StrName = "MESA_FORMAT_RGB_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 6,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_UINT32,
+ .StrName = "MESA_FORMAT_RGB_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 12,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_SINT8,
+ .StrName = "MESA_FORMAT_RGB_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 3,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_SINT16,
+ .StrName = "MESA_FORMAT_RGB_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 6,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_SINT32,
+ .StrName = "MESA_FORMAT_RGB_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 12,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 3, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_UINT8,
+ .StrName = "MESA_FORMAT_RGBA_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_UINT16,
+ .StrName = "MESA_FORMAT_RGBA_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_UINT32,
+ .StrName = "MESA_FORMAT_RGBA_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_SINT8,
+ .StrName = "MESA_FORMAT_RGBA_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_SINT16,
+ .StrName = "MESA_FORMAT_RGBA_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_SINT32,
+ .StrName = "MESA_FORMAT_RGBA_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 32,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 4, 0, 1, 2, 3),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_UINT8,
+ .StrName = "MESA_FORMAT_RGBX_UINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 0, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_UINT16,
+ .StrName = "MESA_FORMAT_RGBX_UINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 0, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_UINT32,
+ .StrName = "MESA_FORMAT_RGBX_UINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 0, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_SINT8,
+ .StrName = "MESA_FORMAT_RGBX_SINT8",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 4,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(1, 1, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_SINT16,
+ .StrName = "MESA_FORMAT_RGBX_SINT16",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(2, 1, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGBX_SINT32,
+ .StrName = "MESA_FORMAT_RGBX_SINT32",
+ .Layout = MESA_FORMAT_LAYOUT_ARRAY,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_INT,
+ .RedBits = 32, .GreenBits = 32, .BlueBits = 32, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 1, .BlockHeight = 1, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = MESA_ARRAY_FORMAT(4, 1, 0, 0, 4, 0, 1, 2, 5),
+ },
+ {
+ .Name = MESA_FORMAT_RGB_DXT1,
+ .StrName = "MESA_FORMAT_RGB_DXT1",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_DXT1,
+ .StrName = "MESA_FORMAT_RGBA_DXT1",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_DXT3,
+ .StrName = "MESA_FORMAT_RGBA_DXT3",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_DXT5,
+ .StrName = "MESA_FORMAT_RGBA_DXT5",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB_DXT1,
+ .StrName = "MESA_FORMAT_SRGB_DXT1",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGBA_DXT1,
+ .StrName = "MESA_FORMAT_SRGBA_DXT1",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGBA_DXT3,
+ .StrName = "MESA_FORMAT_SRGBA_DXT3",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGBA_DXT5,
+ .StrName = "MESA_FORMAT_SRGBA_DXT5",
+ .Layout = MESA_FORMAT_LAYOUT_S3TC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 4,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGB_FXT1,
+ .StrName = "MESA_FORMAT_RGB_FXT1",
+ .Layout = MESA_FORMAT_LAYOUT_FXT1,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 8, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_FXT1,
+ .StrName = "MESA_FORMAT_RGBA_FXT1",
+ .Layout = MESA_FORMAT_LAYOUT_FXT1,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 4, .GreenBits = 4, .BlueBits = 4, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 8, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R_RGTC1_UNORM,
+ .StrName = "MESA_FORMAT_R_RGTC1_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_RGTC,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_R_RGTC1_SNORM,
+ .StrName = "MESA_FORMAT_R_RGTC1_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_RGTC,
+ .BaseFormat = GL_RED,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RG_RGTC2_UNORM,
+ .StrName = "MESA_FORMAT_RG_RGTC2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_RGTC,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RG_RGTC2_SNORM,
+ .StrName = "MESA_FORMAT_RG_RGTC2_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_RGTC,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_L_LATC1_UNORM,
+ .StrName = "MESA_FORMAT_L_LATC1_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_LATC,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_L_LATC1_SNORM,
+ .StrName = "MESA_FORMAT_L_LATC1_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_LATC,
+ .BaseFormat = GL_LUMINANCE,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 0, 0, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_LA_LATC2_UNORM,
+ .StrName = "MESA_FORMAT_LA_LATC2_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_LATC,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_LA_LATC2_SNORM,
+ .StrName = "MESA_FORMAT_LA_LATC2_SNORM",
+ .Layout = MESA_FORMAT_LAYOUT_LATC,
+ .BaseFormat = GL_LUMINANCE_ALPHA,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 0, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 8,
+ .LuminanceBits = 8, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 0, 0, 1 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC1_RGB8,
+ .StrName = "MESA_FORMAT_ETC1_RGB8",
+ .Layout = MESA_FORMAT_LAYOUT_ETC1,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_RGB8,
+ .StrName = "MESA_FORMAT_ETC2_RGB8",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_SRGB8,
+ .StrName = "MESA_FORMAT_ETC2_SRGB8",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_RGBA8_EAC,
+ .StrName = "MESA_FORMAT_ETC2_RGBA8_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC,
+ .StrName = "MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_R11_EAC,
+ .StrName = "MESA_FORMAT_ETC2_R11_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RED,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 11, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_RG11_EAC,
+ .StrName = "MESA_FORMAT_ETC2_RG11_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RG,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 11, .GreenBits = 11, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_SIGNED_R11_EAC,
+ .StrName = "MESA_FORMAT_ETC2_SIGNED_R11_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RED,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 11, .GreenBits = 0, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 4, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_SIGNED_RG11_EAC,
+ .StrName = "MESA_FORMAT_ETC2_SIGNED_RG11_EAC",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RG,
+ .DataType = GL_SIGNED_NORMALIZED,
+ .RedBits = 11, .GreenBits = 11, .BlueBits = 0, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 4, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1,
+ .StrName = "MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1,
+ .StrName = "MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1",
+ .Layout = MESA_FORMAT_LAYOUT_ETC2,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 1,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 8,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_BPTC_RGBA_UNORM,
+ .StrName = "MESA_FORMAT_BPTC_RGBA_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_BPTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM,
+ .StrName = "MESA_FORMAT_BPTC_SRGB_ALPHA_UNORM",
+ .Layout = MESA_FORMAT_LAYOUT_BPTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT,
+ .StrName = "MESA_FORMAT_BPTC_RGB_SIGNED_FLOAT",
+ .Layout = MESA_FORMAT_LAYOUT_BPTC,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT,
+ .StrName = "MESA_FORMAT_BPTC_RGB_UNSIGNED_FLOAT",
+ .Layout = MESA_FORMAT_LAYOUT_BPTC,
+ .BaseFormat = GL_RGB,
+ .DataType = GL_FLOAT,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 0,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 5 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_4x4,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_5x4,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_5x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 5, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_5x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_6x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_6x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 6, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_6x6,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_6x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_8x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_8x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 8, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_8x6,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_8x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 8, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_8x8,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_8x8",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 8, .BlockHeight = 8, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_10x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_10x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 10, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_10x6,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_10x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 10, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_10x8,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_10x8",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 10, .BlockHeight = 8, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_10x10,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_10x10",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 10, .BlockHeight = 10, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_12x10,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_12x10",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 12, .BlockHeight = 10, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_12x12,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_12x12",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 12, .BlockHeight = 12, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 5, .BlockHeight = 4, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 6, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 8, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 8, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_8x8",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 8, .BlockHeight = 8, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 10, .BlockHeight = 5, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 10, .BlockHeight = 6, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x8",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 10, .BlockHeight = 8, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_10x10",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 10, .BlockHeight = 10, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x10",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 12, .BlockHeight = 10, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_12x12",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 12, .BlockHeight = 12, .BlockDepth = 1,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_3x3x3,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_3x3x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 3, .BlockHeight = 3, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_4x3x3,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_4x3x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 3, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_4x4x3,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_4x4x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_4x4x4,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_4x4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_5x4x4,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_5x4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 5, .BlockHeight = 4, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_5x5x4,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_5x5x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_5x5x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_5x5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_6x5x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_6x5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 6, .BlockHeight = 5, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_6x6x5,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_6x6x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_RGBA_ASTC_6x6x6,
+ .StrName = "MESA_FORMAT_RGBA_ASTC_6x6x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 16, .GreenBits = 16, .BlueBits = 16, .AlphaBits = 16,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 0,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 6,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_3x3x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 3, .BlockHeight = 3, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x3x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 3, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x3",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 3,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_4x4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 4, .BlockHeight = 4, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x4x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 5, .BlockHeight = 4, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x4",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 4,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_5x5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 5, .BlockHeight = 5, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x5x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 6, .BlockHeight = 5, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x5",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 5,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+ {
+ .Name = MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6,
+ .StrName = "MESA_FORMAT_SRGB8_ALPHA8_ASTC_6x6x6",
+ .Layout = MESA_FORMAT_LAYOUT_ASTC,
+ .BaseFormat = GL_RGBA,
+ .DataType = GL_UNSIGNED_NORMALIZED,
+ .RedBits = 8, .GreenBits = 8, .BlueBits = 8, .AlphaBits = 8,
+ .LuminanceBits = 0, .IntensityBits = 0, .DepthBits = 0, .StencilBits = 0,
+ .IsSRGBFormat = 1,
+ .BlockWidth = 6, .BlockHeight = 6, .BlockDepth = 6,
+ .BytesPerBlock = 16,
+ .Swizzle = { 0, 1, 2, 3 },
+ .ArrayFormat = 0,
+ },
+};
diff --git a/prebuilt-intermediates/main/format_pack.c b/prebuilt-intermediates/main/format_pack.c
new file mode 100644
index 0000000..f9e194d
--- /dev/null
+++ b/prebuilt-intermediates/main/format_pack.c
@@ -0,0 +1,11243 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2011 VMware, Inc.
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+/**
+ * Color, depth, stencil packing functions.
+ * Used to pack basic color, depth and stencil formats to specific
+ * hardware formats.
+ *
+ * There are both per-pixel and per-row packing functions:
+ * - The former will be used by swrast to write values to the color, depth,
+ * stencil buffers when drawing points, lines and masked spans.
+ * - The later will be used for image-oriented functions like glDrawPixels,
+ * glAccum, and glTexImage.
+ */
+
+#include <stdint.h>
+
+#include "format_pack.h"
+#include "format_utils.h"
+#include "macros.h"
+#include "util/format_rgb9e5.h"
+#include "util/format_r11g11b10f.h"
+#include "util/format_srgb.h"
+
+#define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS))
+#define PACK(SRC, OFFSET, BITS) (((SRC) & MAX_UINT(BITS)) << (OFFSET))
+
+
+
+/* ubyte packing functions */
+
+
+static inline void
+pack_ubyte_a8b8g8r8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x8b8g8r8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8a8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8x8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b8g8r8a8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b8g8r8x8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8r8g8b8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x8r8g8b8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l16a16_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+
+ uint16_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(l, 0, 16);
+ d |= PACK(a, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a16l16_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 16);
+
+
+ uint16_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 16);
+ d |= PACK(l, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b5g6r5_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 6);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r5g6b5_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 6);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b4g4r4a4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 4);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 4);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 4);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b4g4r4x4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 4);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 4);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a4r4g4b4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 4);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 4);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(r, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(b, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a1b5g5r5_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 1);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x1b5g5r5_unorm(const GLubyte src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b5g5r5a1_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 1);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b5g5r5x1_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a1r5g5b5_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 1);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(r, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l8a8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8l8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_g8r8_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(g, 0, 8);
+ d |= PACK(r, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l4a4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 4);
+
+ uint8_t d = 0;
+ d |= PACK(l, 0, 4);
+ d |= PACK(a, 4, 4);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b2g3r3_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 2);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 3);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 3);
+
+ uint8_t d = 0;
+ d |= PACK(b, 0, 2);
+ d |= PACK(g, 2, 3);
+ d |= PACK(r, 5, 3);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r16g16_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 16);
+ d |= PACK(g, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_g16r16_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 16);
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(g, 0, 16);
+ d |= PACK(r, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b10g10r10a2_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 2);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b10g10r10x2_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r10g10b10a2_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 2);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r10g10b10x2_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r3g3b2_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 3);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 3);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 2);
+
+ uint8_t d = 0;
+ d |= PACK(r, 0, 3);
+ d |= PACK(g, 3, 3);
+ d |= PACK(b, 6, 2);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a4b4g4r4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 4);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 4);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 4);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(b, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(r, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r4g4b4a4_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 4);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 4);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 4);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 4);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(b, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r5g5b5a1_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 5);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 5);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 5);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 1);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(b, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a2b10g10r10_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 2);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(b, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(r, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a2r10g10b10_unorm(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 2);
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 10);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 10);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(r, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(b, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_l_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_i_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t i =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_r_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_bgr_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = b;
+ d[1] = g;
+ d[2] = r;
+}
+
+static inline void
+pack_ubyte_rgb_unorm8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 8);
+
+
+ uint8_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgba_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 16);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 16);
+
+
+ uint16_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgbx_unorm16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_unorm(src[0], 8, 16);
+
+
+ uint16_t g =
+ _mesa_unorm_to_unorm(src[1], 8, 16);
+
+
+ uint16_t b =
+ _mesa_unorm_to_unorm(src[2], 8, 16);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_a8b8g8r8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 8);
+
+
+ int8_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 8);
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x8b8g8r8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+
+ int8_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 8);
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8a8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+
+ int8_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 8);
+
+
+ int8_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8x8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+
+ int8_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r16g16_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+
+ int16_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 16);
+ d |= PACK(g, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_g16r16_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 16);
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+ uint32_t d = 0;
+ d |= PACK(g, 0, 16);
+ d |= PACK(r, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_g8r8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 8);
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(g, 0, 8);
+ d |= PACK(r, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l8a8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+
+ int8_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8l8_snorm(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 8);
+
+
+ int8_t l =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a_snorm8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_l_snorm8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_i_snorm8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t i =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t i =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_r_snorm8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_la_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+
+ int16_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_rgb_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+
+ int16_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 16);
+
+
+ int16_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgba_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+
+ int16_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 16);
+
+
+ int16_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 16);
+
+
+ int16_t a =
+ _mesa_unorm_to_snorm(src[3], 8, 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgbx_snorm16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unorm_to_snorm(src[0], 8, 16);
+
+
+ int16_t g =
+ _mesa_unorm_to_snorm(src[1], 8, 16);
+
+
+ int16_t b =
+ _mesa_unorm_to_snorm(src[2], 8, 16);
+
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_a8b8g8r8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b8g8r8a8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8r8g8b8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b8g8r8x8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x8r8g8b8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+ uint32_t d = 0;
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8a8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8x8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_x8b8g8r8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l8a8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8l8_srgb(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unorm_to_unorm(src[3], 8, 8);
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_l_srgb8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unorm_to_unorm(src[0], 8, 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_bgr_srgb8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_to_srgb_8unorm(src[0]);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = b;
+ d[1] = g;
+ d[2] = r;
+}
+
+static inline void
+pack_ubyte_a_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_unorm_to_half(src[3], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float a =
+ _mesa_unorm_to_float(src[3], 8);
+
+ float *d = (float *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_l_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unorm_to_half(src[0], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float l =
+ _mesa_unorm_to_float(src[0], 8);
+
+ float *d = (float *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_la_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unorm_to_half(src[0], 8);
+
+
+ uint16_t a =
+ _mesa_unorm_to_half(src[3], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float l =
+ _mesa_unorm_to_float(src[0], 8);
+
+
+ float a =
+ _mesa_unorm_to_float(src[3], 8);
+
+ float *d = (float *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_i_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_unorm_to_half(src[0], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float i =
+ _mesa_unorm_to_float(src[0], 8);
+
+ float *d = (float *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_r_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_half(src[0], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float r =
+ _mesa_unorm_to_float(src[0], 8);
+
+ float *d = (float *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_rg_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_half(src[0], 8);
+
+
+ uint16_t g =
+ _mesa_unorm_to_half(src[1], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float r =
+ _mesa_unorm_to_float(src[0], 8);
+
+
+ float g =
+ _mesa_unorm_to_float(src[1], 8);
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rgb_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_half(src[0], 8);
+
+
+ uint16_t g =
+ _mesa_unorm_to_half(src[1], 8);
+
+
+ uint16_t b =
+ _mesa_unorm_to_half(src[2], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float r =
+ _mesa_unorm_to_float(src[0], 8);
+
+
+ float g =
+ _mesa_unorm_to_float(src[1], 8);
+
+
+ float b =
+ _mesa_unorm_to_float(src[2], 8);
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgba_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_half(src[0], 8);
+
+
+ uint16_t g =
+ _mesa_unorm_to_half(src[1], 8);
+
+
+ uint16_t b =
+ _mesa_unorm_to_half(src[2], 8);
+
+
+ uint16_t a =
+ _mesa_unorm_to_half(src[3], 8);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float r =
+ _mesa_unorm_to_float(src[0], 8);
+
+
+ float g =
+ _mesa_unorm_to_float(src[1], 8);
+
+
+ float b =
+ _mesa_unorm_to_float(src[2], 8);
+
+
+ float a =
+ _mesa_unorm_to_float(src[3], 8);
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgbx_float16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unorm_to_half(src[0], 8);
+
+
+ uint16_t g =
+ _mesa_unorm_to_half(src[1], 8);
+
+
+ uint16_t b =
+ _mesa_unorm_to_half(src[2], 8);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_float32(const GLubyte src[4], void *dst)
+{
+
+
+ float r =
+ _mesa_unorm_to_float(src[0], 8);
+
+
+ float g =
+ _mesa_unorm_to_float(src[1], 8);
+
+
+ float b =
+ _mesa_unorm_to_float(src[2], 8);
+
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_a8b8g8r8_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a8r8g8b8_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r8g8b8a8_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b8g8r8a8_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b10g10r10a2_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r10g10b10a2_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a2b10g10r10_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(b, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(r, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a2r10g10b10_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(r, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(b, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b5g6r5_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 6);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r5g6b5_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 6);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b2g3r3_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 2);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 3);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 3);
+
+ uint8_t d = 0;
+ d |= PACK(b, 0, 2);
+ d |= PACK(g, 2, 3);
+ d |= PACK(r, 5, 3);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r3g3b2_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 3);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 3);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 2);
+
+ uint8_t d = 0;
+ d |= PACK(r, 0, 3);
+ d |= PACK(g, 3, 3);
+ d |= PACK(b, 6, 2);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a4b4g4r4_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(b, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(r, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r4g4b4a4_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(b, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b4g4r4a4_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a4r4g4b4_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(r, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(b, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a1b5g5r5_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_b5g5r5a1_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a1r5g5b5_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(r, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_r5g5b5a1_uint(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(b, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_ubyte_a_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_unsigned_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t a =
+ _mesa_unsigned_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_a_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t a =
+ _mesa_unsigned_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_ubyte_i_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t i =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t i =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t i =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t i =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_i_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t i =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_ubyte_l_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t l =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_l_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t l =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_ubyte_la_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t l =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+
+ int8_t a =
+ _mesa_unsigned_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+
+ int16_t a =
+ _mesa_unsigned_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_la_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t l =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+
+ int32_t a =
+ _mesa_unsigned_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_ubyte_r_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_r_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_ubyte_rg_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_unsigned_to_signed(src[1], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_unsigned_to_signed(src[1], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rg_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_unsigned_to_signed(src[1], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_ubyte_rgb_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_unsigned_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_unsigned_to_signed(src[2], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_unsigned_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_unsigned_to_signed(src[2], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgb_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_unsigned_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_unsigned_to_signed(src[2], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_ubyte_rgba_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_unsigned_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_unsigned_to_signed(src[2], 8);
+
+
+ int8_t a =
+ _mesa_unsigned_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_unsigned_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_unsigned_to_signed(src[2], 16);
+
+
+ int16_t a =
+ _mesa_unsigned_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgba_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_unsigned_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_unsigned_to_signed(src[2], 32);
+
+
+ int32_t a =
+ _mesa_unsigned_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_ubyte_rgbx_uint8(const GLubyte src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_uint16(const GLubyte src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_uint32(const GLubyte src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_sint8(const GLubyte src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_unsigned_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_unsigned_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_unsigned_to_signed(src[2], 8);
+
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_sint16(const GLubyte src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_unsigned_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_unsigned_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_unsigned_to_signed(src[2], 16);
+
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_rgbx_sint32(const GLubyte src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_unsigned_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_unsigned_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_unsigned_to_signed(src[2], 32);
+
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_ubyte_r9g9b9e5_float(const GLubyte src[4], void *dst)
+{
+ GLuint *d = (GLuint *) dst;
+ GLfloat rgb[3];
+ rgb[0] = _mesa_unorm_to_float(src[RCOMP], 8);
+ rgb[1] = _mesa_unorm_to_float(src[GCOMP], 8);
+ rgb[2] = _mesa_unorm_to_float(src[BCOMP], 8);
+ *d = float3_to_rgb9e5(rgb);
+}
+
+static inline void
+pack_ubyte_r11g11b10_float(const GLubyte src[4], void *dst)
+{
+ GLuint *d = (GLuint *) dst;
+ GLfloat rgb[3];
+ rgb[0] = _mesa_unorm_to_float(src[RCOMP], 8);
+ rgb[1] = _mesa_unorm_to_float(src[GCOMP], 8);
+ rgb[2] = _mesa_unorm_to_float(src[BCOMP], 8);
+ *d = float3_to_r11g11b10f(rgb);
+}
+
+/* uint packing functions */
+
+
+static inline void
+pack_uint_a8b8g8r8_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a8r8g8b8_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r8g8b8a8_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b8g8r8a8_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b10g10r10a2_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r10g10b10a2_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a2b10g10r10_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(b, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(r, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a2r10g10b10_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 2);
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(r, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(b, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b5g6r5_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 6);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r5g6b5_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 6);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b2g3r3_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 2);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 3);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 3);
+
+ uint8_t d = 0;
+ d |= PACK(b, 0, 2);
+ d |= PACK(g, 2, 3);
+ d |= PACK(r, 5, 3);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r3g3b2_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 3);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 3);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 2);
+
+ uint8_t d = 0;
+ d |= PACK(r, 0, 3);
+ d |= PACK(g, 3, 3);
+ d |= PACK(b, 6, 2);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a4b4g4r4_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(b, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(r, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r4g4b4a4_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(b, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b4g4r4a4_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a4r4g4b4_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 4);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(r, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(b, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a1b5g5r5_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_b5g5r5a1_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a1r5g5b5_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(r, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_r5g5b5a1_uint(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 5);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(b, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_uint_a_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_a_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_a_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_a_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_signed_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_a_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t a =
+ _mesa_signed_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_a_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t a =
+ _mesa_signed_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_uint_i_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t i =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_i_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_i_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t i =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_i_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t i =
+ _mesa_signed_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_i_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t i =
+ _mesa_signed_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_i_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t i =
+ _mesa_signed_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_uint_l_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_l_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_l_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t l =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_l_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_signed_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_l_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_signed_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_l_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t l =
+ _mesa_signed_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_uint_la_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_la_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_la_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t l =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_la_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_signed_to_signed(src[0], 8);
+
+
+ int8_t a =
+ _mesa_signed_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_la_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_signed_to_signed(src[0], 16);
+
+
+ int16_t a =
+ _mesa_signed_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_la_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t l =
+ _mesa_signed_to_signed(src[0], 32);
+
+
+ int32_t a =
+ _mesa_signed_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_uint_r_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_r_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_r_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_r_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_signed_to_signed(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_r_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_signed_to_signed(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_r_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_signed_to_signed(src[0], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_uint_rg_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rg_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rg_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rg_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_signed_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_signed_to_signed(src[1], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rg_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_signed_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_signed_to_signed(src[1], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rg_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_signed_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_signed_to_signed(src[1], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_uint_rgb_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgb_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgb_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgb_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_signed_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_signed_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_signed_to_signed(src[2], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgb_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_signed_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_signed_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_signed_to_signed(src[2], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgb_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_signed_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_signed_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_signed_to_signed(src[2], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_uint_rgba_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t a =
+ _mesa_unsigned_to_unsigned(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgba_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+
+ uint16_t a =
+ _mesa_unsigned_to_unsigned(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgba_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+
+ uint32_t a =
+ _mesa_unsigned_to_unsigned(src[3], 32);
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgba_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_signed_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_signed_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_signed_to_signed(src[2], 8);
+
+
+ int8_t a =
+ _mesa_signed_to_signed(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgba_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_signed_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_signed_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_signed_to_signed(src[2], 16);
+
+
+ int16_t a =
+ _mesa_signed_to_signed(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgba_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_signed_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_signed_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_signed_to_signed(src[2], 32);
+
+
+ int32_t a =
+ _mesa_signed_to_signed(src[3], 32);
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_uint_rgbx_uint8(const GLuint src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_unsigned_to_unsigned(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_unsigned_to_unsigned(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_unsigned_to_unsigned(src[2], 8);
+
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_uint_rgbx_uint16(const GLuint src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_unsigned_to_unsigned(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_unsigned_to_unsigned(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_unsigned_to_unsigned(src[2], 16);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_uint_rgbx_uint32(const GLuint src[4], void *dst)
+{
+
+
+ uint32_t r =
+ _mesa_unsigned_to_unsigned(src[0], 32);
+
+
+ uint32_t g =
+ _mesa_unsigned_to_unsigned(src[1], 32);
+
+
+ uint32_t b =
+ _mesa_unsigned_to_unsigned(src[2], 32);
+
+
+ uint32_t *d = (uint32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_uint_rgbx_sint8(const GLuint src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_signed_to_signed(src[0], 8);
+
+
+ int8_t g =
+ _mesa_signed_to_signed(src[1], 8);
+
+
+ int8_t b =
+ _mesa_signed_to_signed(src[2], 8);
+
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_uint_rgbx_sint16(const GLuint src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_signed_to_signed(src[0], 16);
+
+
+ int16_t g =
+ _mesa_signed_to_signed(src[1], 16);
+
+
+ int16_t b =
+ _mesa_signed_to_signed(src[2], 16);
+
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_uint_rgbx_sint32(const GLuint src[4], void *dst)
+{
+
+
+ int32_t r =
+ _mesa_signed_to_signed(src[0], 32);
+
+
+ int32_t g =
+ _mesa_signed_to_signed(src[1], 32);
+
+
+ int32_t b =
+ _mesa_signed_to_signed(src[2], 32);
+
+
+ int32_t *d = (int32_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+/* float packing functions */
+
+
+static inline void
+pack_float_a8b8g8r8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_x8b8g8r8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8a8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8x8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b8g8r8a8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b8g8r8x8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_a8r8g8b8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_x8r8g8b8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_l16a16_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_float_to_unorm(src[0], 16);
+
+
+ uint16_t a =
+ _mesa_float_to_unorm(src[3], 16);
+
+ uint32_t d = 0;
+ d |= PACK(l, 0, 16);
+ d |= PACK(a, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_a16l16_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_float_to_unorm(src[3], 16);
+
+
+ uint16_t l =
+ _mesa_float_to_unorm(src[0], 16);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 16);
+ d |= PACK(l, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b5g6r5_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 6);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_r5g6b5_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 6);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 6);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_b4g4r4a4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 4);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_b4g4r4x4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 4);
+
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(r, 8, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a4r4g4b4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 4);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(r, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(b, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a1b5g5r5_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 1);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_x1b5g5r5_unorm(const GLfloat src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+ uint16_t d = 0;
+ d |= PACK(b, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(r, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_b5g5r5a1_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_b5g5r5x1_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+
+ uint16_t d = 0;
+ d |= PACK(b, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(r, 10, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a1r5g5b5_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 1);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 1);
+ d |= PACK(r, 1, 5);
+ d |= PACK(g, 6, 5);
+ d |= PACK(b, 11, 5);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_l8a8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a8l8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_g8r8_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint16_t d = 0;
+ d |= PACK(g, 0, 8);
+ d |= PACK(r, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_l4a4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 4);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 4);
+
+ uint8_t d = 0;
+ d |= PACK(l, 0, 4);
+ d |= PACK(a, 4, 4);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_float_b2g3r3_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 2);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 3);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 3);
+
+ uint8_t d = 0;
+ d |= PACK(b, 0, 2);
+ d |= PACK(g, 2, 3);
+ d |= PACK(r, 5, 3);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_float_r16g16_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 16);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 16);
+ d |= PACK(g, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_g16r16_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 16);
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 16);
+
+ uint32_t d = 0;
+ d |= PACK(g, 0, 16);
+ d |= PACK(r, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b10g10r10a2_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b10g10r10x2_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(r, 20, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r10g10b10a2_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 2);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ d |= PACK(a, 30, 2);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r10g10b10x2_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 10);
+ d |= PACK(g, 10, 10);
+ d |= PACK(b, 20, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r3g3b2_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 3);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 3);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 2);
+
+ uint8_t d = 0;
+ d |= PACK(r, 0, 3);
+ d |= PACK(g, 3, 3);
+ d |= PACK(b, 6, 2);
+ (*(uint8_t *)dst) = d;
+}
+
+static inline void
+pack_float_a4b4g4r4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 4);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 4);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 4);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 4);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 4);
+ d |= PACK(b, 4, 4);
+ d |= PACK(g, 8, 4);
+ d |= PACK(r, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_r4g4b4a4_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 4);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 4);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 4);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 4);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 4);
+ d |= PACK(g, 4, 4);
+ d |= PACK(b, 8, 4);
+ d |= PACK(a, 12, 4);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_r5g5b5a1_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 5);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 5);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 5);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 1);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 5);
+ d |= PACK(g, 5, 5);
+ d |= PACK(b, 10, 5);
+ d |= PACK(a, 15, 1);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a2b10g10r10_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 2);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(b, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(r, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_a2r10g10b10_unorm(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 2);
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 10);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 10);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 10);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 2);
+ d |= PACK(r, 2, 10);
+ d |= PACK(g, 12, 10);
+ d |= PACK(b, 22, 10);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_a_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_a_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_float_to_unorm(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_l_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_l_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_float_to_unorm(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_i_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t i =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_i_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_float_to_unorm(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_r_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_r_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_bgr_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = b;
+ d[1] = g;
+ d[2] = r;
+}
+
+static inline void
+pack_float_rgb_unorm8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t g =
+ _mesa_float_to_unorm(src[1], 8);
+
+
+ uint8_t b =
+ _mesa_float_to_unorm(src[2], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_float_rgba_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 16);
+
+
+ uint16_t a =
+ _mesa_float_to_unorm(src[3], 16);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_float_rgbx_unorm16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_unorm(src[0], 16);
+
+
+ uint16_t g =
+ _mesa_float_to_unorm(src[1], 16);
+
+
+ uint16_t b =
+ _mesa_float_to_unorm(src[2], 16);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_float_a8b8g8r8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_float_to_snorm(src[3], 8);
+
+
+ int8_t b =
+ _mesa_float_to_snorm(src[2], 8);
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_x8b8g8r8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+
+ int8_t b =
+ _mesa_float_to_snorm(src[2], 8);
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8a8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+
+ int8_t b =
+ _mesa_float_to_snorm(src[2], 8);
+
+
+ int8_t a =
+ _mesa_float_to_snorm(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8x8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+
+ int8_t b =
+ _mesa_float_to_snorm(src[2], 8);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r16g16_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+
+ int16_t g =
+ _mesa_float_to_snorm(src[1], 16);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 16);
+ d |= PACK(g, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_g16r16_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t g =
+ _mesa_float_to_snorm(src[1], 16);
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+ uint32_t d = 0;
+ d |= PACK(g, 0, 16);
+ d |= PACK(r, 16, 16);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+ uint16_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_g8r8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t g =
+ _mesa_float_to_snorm(src[1], 8);
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+ uint16_t d = 0;
+ d |= PACK(g, 0, 8);
+ d |= PACK(r, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_l8a8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_float_to_snorm(src[0], 8);
+
+
+ int8_t a =
+ _mesa_float_to_snorm(src[3], 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a8l8_snorm(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_float_to_snorm(src[3], 8);
+
+
+ int8_t l =
+ _mesa_float_to_snorm(src[0], 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a_snorm8(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t a =
+ _mesa_float_to_snorm(src[3], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_a_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t a =
+ _mesa_float_to_snorm(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_l_snorm8(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t l =
+ _mesa_float_to_snorm(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_l_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_float_to_snorm(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_i_snorm8(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t i =
+ _mesa_float_to_snorm(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_i_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t i =
+ _mesa_float_to_snorm(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_r_snorm8(const GLfloat src[4], void *dst)
+{
+
+
+ int8_t r =
+ _mesa_float_to_snorm(src[0], 8);
+
+ int8_t *d = (int8_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_r_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_la_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t l =
+ _mesa_float_to_snorm(src[0], 16);
+
+
+ int16_t a =
+ _mesa_float_to_snorm(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_float_rgb_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+
+ int16_t g =
+ _mesa_float_to_snorm(src[1], 16);
+
+
+ int16_t b =
+ _mesa_float_to_snorm(src[2], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_float_rgba_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+
+ int16_t g =
+ _mesa_float_to_snorm(src[1], 16);
+
+
+ int16_t b =
+ _mesa_float_to_snorm(src[2], 16);
+
+
+ int16_t a =
+ _mesa_float_to_snorm(src[3], 16);
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_float_rgbx_snorm16(const GLfloat src[4], void *dst)
+{
+
+
+ int16_t r =
+ _mesa_float_to_snorm(src[0], 16);
+
+
+ int16_t g =
+ _mesa_float_to_snorm(src[1], 16);
+
+
+ int16_t b =
+ _mesa_float_to_snorm(src[2], 16);
+
+
+ int16_t *d = (int16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_float_a8b8g8r8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b8g8r8a8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_a8r8g8b8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+ uint32_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_b8g8r8x8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint32_t d = 0;
+ d |= PACK(b, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(r, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_x8r8g8b8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+ uint32_t d = 0;
+ d |= PACK(r, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(b, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8a8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ d |= PACK(a, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_r8g8b8x8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint32_t d = 0;
+ d |= PACK(r, 0, 8);
+ d |= PACK(g, 8, 8);
+ d |= PACK(b, 16, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_x8b8g8r8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+ uint32_t d = 0;
+ d |= PACK(b, 8, 8);
+ d |= PACK(g, 16, 8);
+ d |= PACK(r, 24, 8);
+ (*(uint32_t *)dst) = d;
+}
+
+static inline void
+pack_float_l8a8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+ uint16_t d = 0;
+ d |= PACK(l, 0, 8);
+ d |= PACK(a, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_a8l8_srgb(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t a =
+ _mesa_float_to_unorm(src[3], 8);
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint16_t d = 0;
+ d |= PACK(a, 0, 8);
+ d |= PACK(l, 8, 8);
+ (*(uint16_t *)dst) = d;
+}
+
+static inline void
+pack_float_l_srgb8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t l =
+ _mesa_float_to_unorm(src[0], 8);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_bgr_srgb8(const GLfloat src[4], void *dst)
+{
+
+
+ uint8_t b =
+
+ util_format_linear_float_to_srgb_8unorm(src[2]);
+
+
+ uint8_t g =
+
+ util_format_linear_float_to_srgb_8unorm(src[1]);
+
+
+ uint8_t r =
+
+ util_format_linear_float_to_srgb_8unorm(src[0]);
+
+ uint8_t *d = (uint8_t *)dst;
+ d[0] = b;
+ d[1] = g;
+ d[2] = r;
+}
+
+static inline void
+pack_float_a_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t a =
+ _mesa_float_to_half(src[3]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_a_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float a =
+ src[3];
+
+ float *d = (float *)dst;
+ d[0] = a;
+}
+
+static inline void
+pack_float_l_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_float_to_half(src[0]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_l_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float l =
+ src[0];
+
+ float *d = (float *)dst;
+ d[0] = l;
+}
+
+static inline void
+pack_float_la_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t l =
+ _mesa_float_to_half(src[0]);
+
+
+ uint16_t a =
+ _mesa_float_to_half(src[3]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_float_la_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float l =
+ src[0];
+
+
+ float a =
+ src[3];
+
+ float *d = (float *)dst;
+ d[0] = l;
+ d[1] = a;
+}
+
+static inline void
+pack_float_i_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t i =
+ _mesa_float_to_half(src[0]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_i_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float i =
+ src[0];
+
+ float *d = (float *)dst;
+ d[0] = i;
+}
+
+static inline void
+pack_float_r_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_half(src[0]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_r_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float r =
+ src[0];
+
+ float *d = (float *)dst;
+ d[0] = r;
+}
+
+static inline void
+pack_float_rg_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_half(src[0]);
+
+
+ uint16_t g =
+ _mesa_float_to_half(src[1]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_float_rg_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float r =
+ src[0];
+
+
+ float g =
+ src[1];
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+}
+
+static inline void
+pack_float_rgb_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_half(src[0]);
+
+
+ uint16_t g =
+ _mesa_float_to_half(src[1]);
+
+
+ uint16_t b =
+ _mesa_float_to_half(src[2]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_float_rgb_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float r =
+ src[0];
+
+
+ float g =
+ src[1];
+
+
+ float b =
+ src[2];
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+}
+
+static inline void
+pack_float_rgba_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_half(src[0]);
+
+
+ uint16_t g =
+ _mesa_float_to_half(src[1]);
+
+
+ uint16_t b =
+ _mesa_float_to_half(src[2]);
+
+
+ uint16_t a =
+ _mesa_float_to_half(src[3]);
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_float_rgba_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float r =
+ src[0];
+
+
+ float g =
+ src[1];
+
+
+ float b =
+ src[2];
+
+
+ float a =
+ src[3];
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ d[3] = a;
+}
+
+static inline void
+pack_float_rgbx_float16(const GLfloat src[4], void *dst)
+{
+
+
+ uint16_t r =
+ _mesa_float_to_half(src[0]);
+
+
+ uint16_t g =
+ _mesa_float_to_half(src[1]);
+
+
+ uint16_t b =
+ _mesa_float_to_half(src[2]);
+
+
+ uint16_t *d = (uint16_t *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_float_rgbx_float32(const GLfloat src[4], void *dst)
+{
+
+
+ float r =
+ src[0];
+
+
+ float g =
+ src[1];
+
+
+ float b =
+ src[2];
+
+
+ float *d = (float *)dst;
+ d[0] = r;
+ d[1] = g;
+ d[2] = b;
+ }
+
+static inline void
+pack_float_r9g9b9e5_float(const GLfloat src[4], void *dst)
+{
+ GLuint *d = (GLuint *) dst;
+ *d = float3_to_rgb9e5(src);
+}
+
+static inline void
+pack_float_r11g11b10_float(const GLfloat src[4], void *dst)
+{
+ GLuint *d = (GLuint *) dst;
+ *d = float3_to_r11g11b10f(src);
+}
+
+/**
+ * Return a function that can pack a GLubyte rgba[4] color.
+ */
+gl_pack_ubyte_rgba_func
+_mesa_get_pack_ubyte_rgba_function(mesa_format format)
+{
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ return pack_ubyte_a8b8g8r8_unorm;
+
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ return pack_ubyte_x8b8g8r8_unorm;
+
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ return pack_ubyte_r8g8b8a8_unorm;
+
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ return pack_ubyte_r8g8b8x8_unorm;
+
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ return pack_ubyte_b8g8r8a8_unorm;
+
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ return pack_ubyte_b8g8r8x8_unorm;
+
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ return pack_ubyte_a8r8g8b8_unorm;
+
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ return pack_ubyte_x8r8g8b8_unorm;
+
+ case MESA_FORMAT_L16A16_UNORM:
+ return pack_ubyte_l16a16_unorm;
+
+ case MESA_FORMAT_A16L16_UNORM:
+ return pack_ubyte_a16l16_unorm;
+
+ case MESA_FORMAT_B5G6R5_UNORM:
+ return pack_ubyte_b5g6r5_unorm;
+
+ case MESA_FORMAT_R5G6B5_UNORM:
+ return pack_ubyte_r5g6b5_unorm;
+
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ return pack_ubyte_b4g4r4a4_unorm;
+
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ return pack_ubyte_b4g4r4x4_unorm;
+
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ return pack_ubyte_a4r4g4b4_unorm;
+
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ return pack_ubyte_a1b5g5r5_unorm;
+
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ return pack_ubyte_x1b5g5r5_unorm;
+
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ return pack_ubyte_b5g5r5a1_unorm;
+
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ return pack_ubyte_b5g5r5x1_unorm;
+
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ return pack_ubyte_a1r5g5b5_unorm;
+
+ case MESA_FORMAT_L8A8_UNORM:
+ return pack_ubyte_l8a8_unorm;
+
+ case MESA_FORMAT_A8L8_UNORM:
+ return pack_ubyte_a8l8_unorm;
+
+ case MESA_FORMAT_R8G8_UNORM:
+ return pack_ubyte_r8g8_unorm;
+
+ case MESA_FORMAT_G8R8_UNORM:
+ return pack_ubyte_g8r8_unorm;
+
+ case MESA_FORMAT_L4A4_UNORM:
+ return pack_ubyte_l4a4_unorm;
+
+ case MESA_FORMAT_B2G3R3_UNORM:
+ return pack_ubyte_b2g3r3_unorm;
+
+ case MESA_FORMAT_R16G16_UNORM:
+ return pack_ubyte_r16g16_unorm;
+
+ case MESA_FORMAT_G16R16_UNORM:
+ return pack_ubyte_g16r16_unorm;
+
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ return pack_ubyte_b10g10r10a2_unorm;
+
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ return pack_ubyte_b10g10r10x2_unorm;
+
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ return pack_ubyte_r10g10b10a2_unorm;
+
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ return pack_ubyte_r10g10b10x2_unorm;
+
+ case MESA_FORMAT_R3G3B2_UNORM:
+ return pack_ubyte_r3g3b2_unorm;
+
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ return pack_ubyte_a4b4g4r4_unorm;
+
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ return pack_ubyte_r4g4b4a4_unorm;
+
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ return pack_ubyte_r5g5b5a1_unorm;
+
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ return pack_ubyte_a2b10g10r10_unorm;
+
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ return pack_ubyte_a2r10g10b10_unorm;
+
+ case MESA_FORMAT_A_UNORM8:
+ return pack_ubyte_a_unorm8;
+
+ case MESA_FORMAT_A_UNORM16:
+ return pack_ubyte_a_unorm16;
+
+ case MESA_FORMAT_L_UNORM8:
+ return pack_ubyte_l_unorm8;
+
+ case MESA_FORMAT_L_UNORM16:
+ return pack_ubyte_l_unorm16;
+
+ case MESA_FORMAT_I_UNORM8:
+ return pack_ubyte_i_unorm8;
+
+ case MESA_FORMAT_I_UNORM16:
+ return pack_ubyte_i_unorm16;
+
+ case MESA_FORMAT_R_UNORM8:
+ return pack_ubyte_r_unorm8;
+
+ case MESA_FORMAT_R_UNORM16:
+ return pack_ubyte_r_unorm16;
+
+ case MESA_FORMAT_BGR_UNORM8:
+ return pack_ubyte_bgr_unorm8;
+
+ case MESA_FORMAT_RGB_UNORM8:
+ return pack_ubyte_rgb_unorm8;
+
+ case MESA_FORMAT_RGBA_UNORM16:
+ return pack_ubyte_rgba_unorm16;
+
+ case MESA_FORMAT_RGBX_UNORM16:
+ return pack_ubyte_rgbx_unorm16;
+
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ return pack_ubyte_a8b8g8r8_snorm;
+
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ return pack_ubyte_x8b8g8r8_snorm;
+
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ return pack_ubyte_r8g8b8a8_snorm;
+
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ return pack_ubyte_r8g8b8x8_snorm;
+
+ case MESA_FORMAT_R16G16_SNORM:
+ return pack_ubyte_r16g16_snorm;
+
+ case MESA_FORMAT_G16R16_SNORM:
+ return pack_ubyte_g16r16_snorm;
+
+ case MESA_FORMAT_R8G8_SNORM:
+ return pack_ubyte_r8g8_snorm;
+
+ case MESA_FORMAT_G8R8_SNORM:
+ return pack_ubyte_g8r8_snorm;
+
+ case MESA_FORMAT_L8A8_SNORM:
+ return pack_ubyte_l8a8_snorm;
+
+ case MESA_FORMAT_A8L8_SNORM:
+ return pack_ubyte_a8l8_snorm;
+
+ case MESA_FORMAT_A_SNORM8:
+ return pack_ubyte_a_snorm8;
+
+ case MESA_FORMAT_A_SNORM16:
+ return pack_ubyte_a_snorm16;
+
+ case MESA_FORMAT_L_SNORM8:
+ return pack_ubyte_l_snorm8;
+
+ case MESA_FORMAT_L_SNORM16:
+ return pack_ubyte_l_snorm16;
+
+ case MESA_FORMAT_I_SNORM8:
+ return pack_ubyte_i_snorm8;
+
+ case MESA_FORMAT_I_SNORM16:
+ return pack_ubyte_i_snorm16;
+
+ case MESA_FORMAT_R_SNORM8:
+ return pack_ubyte_r_snorm8;
+
+ case MESA_FORMAT_R_SNORM16:
+ return pack_ubyte_r_snorm16;
+
+ case MESA_FORMAT_LA_SNORM16:
+ return pack_ubyte_la_snorm16;
+
+ case MESA_FORMAT_RGB_SNORM16:
+ return pack_ubyte_rgb_snorm16;
+
+ case MESA_FORMAT_RGBA_SNORM16:
+ return pack_ubyte_rgba_snorm16;
+
+ case MESA_FORMAT_RGBX_SNORM16:
+ return pack_ubyte_rgbx_snorm16;
+
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ return pack_ubyte_a8b8g8r8_srgb;
+
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ return pack_ubyte_b8g8r8a8_srgb;
+
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ return pack_ubyte_a8r8g8b8_srgb;
+
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ return pack_ubyte_b8g8r8x8_srgb;
+
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ return pack_ubyte_x8r8g8b8_srgb;
+
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ return pack_ubyte_r8g8b8a8_srgb;
+
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ return pack_ubyte_r8g8b8x8_srgb;
+
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ return pack_ubyte_x8b8g8r8_srgb;
+
+ case MESA_FORMAT_L8A8_SRGB:
+ return pack_ubyte_l8a8_srgb;
+
+ case MESA_FORMAT_A8L8_SRGB:
+ return pack_ubyte_a8l8_srgb;
+
+ case MESA_FORMAT_L_SRGB8:
+ return pack_ubyte_l_srgb8;
+
+ case MESA_FORMAT_BGR_SRGB8:
+ return pack_ubyte_bgr_srgb8;
+
+ case MESA_FORMAT_R9G9B9E5_FLOAT:
+ return pack_ubyte_r9g9b9e5_float;
+
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ return pack_ubyte_r11g11b10_float;
+
+ case MESA_FORMAT_A_FLOAT16:
+ return pack_ubyte_a_float16;
+
+ case MESA_FORMAT_A_FLOAT32:
+ return pack_ubyte_a_float32;
+
+ case MESA_FORMAT_L_FLOAT16:
+ return pack_ubyte_l_float16;
+
+ case MESA_FORMAT_L_FLOAT32:
+ return pack_ubyte_l_float32;
+
+ case MESA_FORMAT_LA_FLOAT16:
+ return pack_ubyte_la_float16;
+
+ case MESA_FORMAT_LA_FLOAT32:
+ return pack_ubyte_la_float32;
+
+ case MESA_FORMAT_I_FLOAT16:
+ return pack_ubyte_i_float16;
+
+ case MESA_FORMAT_I_FLOAT32:
+ return pack_ubyte_i_float32;
+
+ case MESA_FORMAT_R_FLOAT16:
+ return pack_ubyte_r_float16;
+
+ case MESA_FORMAT_R_FLOAT32:
+ return pack_ubyte_r_float32;
+
+ case MESA_FORMAT_RG_FLOAT16:
+ return pack_ubyte_rg_float16;
+
+ case MESA_FORMAT_RG_FLOAT32:
+ return pack_ubyte_rg_float32;
+
+ case MESA_FORMAT_RGB_FLOAT16:
+ return pack_ubyte_rgb_float16;
+
+ case MESA_FORMAT_RGB_FLOAT32:
+ return pack_ubyte_rgb_float32;
+
+ case MESA_FORMAT_RGBA_FLOAT16:
+ return pack_ubyte_rgba_float16;
+
+ case MESA_FORMAT_RGBA_FLOAT32:
+ return pack_ubyte_rgba_float32;
+
+ case MESA_FORMAT_RGBX_FLOAT16:
+ return pack_ubyte_rgbx_float16;
+
+ case MESA_FORMAT_RGBX_FLOAT32:
+ return pack_ubyte_rgbx_float32;
+
+ case MESA_FORMAT_A8B8G8R8_UINT:
+ return pack_ubyte_a8b8g8r8_uint;
+
+ case MESA_FORMAT_A8R8G8B8_UINT:
+ return pack_ubyte_a8r8g8b8_uint;
+
+ case MESA_FORMAT_R8G8B8A8_UINT:
+ return pack_ubyte_r8g8b8a8_uint;
+
+ case MESA_FORMAT_B8G8R8A8_UINT:
+ return pack_ubyte_b8g8r8a8_uint;
+
+ case MESA_FORMAT_B10G10R10A2_UINT:
+ return pack_ubyte_b10g10r10a2_uint;
+
+ case MESA_FORMAT_R10G10B10A2_UINT:
+ return pack_ubyte_r10g10b10a2_uint;
+
+ case MESA_FORMAT_A2B10G10R10_UINT:
+ return pack_ubyte_a2b10g10r10_uint;
+
+ case MESA_FORMAT_A2R10G10B10_UINT:
+ return pack_ubyte_a2r10g10b10_uint;
+
+ case MESA_FORMAT_B5G6R5_UINT:
+ return pack_ubyte_b5g6r5_uint;
+
+ case MESA_FORMAT_R5G6B5_UINT:
+ return pack_ubyte_r5g6b5_uint;
+
+ case MESA_FORMAT_B2G3R3_UINT:
+ return pack_ubyte_b2g3r3_uint;
+
+ case MESA_FORMAT_R3G3B2_UINT:
+ return pack_ubyte_r3g3b2_uint;
+
+ case MESA_FORMAT_A4B4G4R4_UINT:
+ return pack_ubyte_a4b4g4r4_uint;
+
+ case MESA_FORMAT_R4G4B4A4_UINT:
+ return pack_ubyte_r4g4b4a4_uint;
+
+ case MESA_FORMAT_B4G4R4A4_UINT:
+ return pack_ubyte_b4g4r4a4_uint;
+
+ case MESA_FORMAT_A4R4G4B4_UINT:
+ return pack_ubyte_a4r4g4b4_uint;
+
+ case MESA_FORMAT_A1B5G5R5_UINT:
+ return pack_ubyte_a1b5g5r5_uint;
+
+ case MESA_FORMAT_B5G5R5A1_UINT:
+ return pack_ubyte_b5g5r5a1_uint;
+
+ case MESA_FORMAT_A1R5G5B5_UINT:
+ return pack_ubyte_a1r5g5b5_uint;
+
+ case MESA_FORMAT_R5G5B5A1_UINT:
+ return pack_ubyte_r5g5b5a1_uint;
+
+ case MESA_FORMAT_A_UINT8:
+ return pack_ubyte_a_uint8;
+
+ case MESA_FORMAT_A_UINT16:
+ return pack_ubyte_a_uint16;
+
+ case MESA_FORMAT_A_UINT32:
+ return pack_ubyte_a_uint32;
+
+ case MESA_FORMAT_A_SINT8:
+ return pack_ubyte_a_sint8;
+
+ case MESA_FORMAT_A_SINT16:
+ return pack_ubyte_a_sint16;
+
+ case MESA_FORMAT_A_SINT32:
+ return pack_ubyte_a_sint32;
+
+ case MESA_FORMAT_I_UINT8:
+ return pack_ubyte_i_uint8;
+
+ case MESA_FORMAT_I_UINT16:
+ return pack_ubyte_i_uint16;
+
+ case MESA_FORMAT_I_UINT32:
+ return pack_ubyte_i_uint32;
+
+ case MESA_FORMAT_I_SINT8:
+ return pack_ubyte_i_sint8;
+
+ case MESA_FORMAT_I_SINT16:
+ return pack_ubyte_i_sint16;
+
+ case MESA_FORMAT_I_SINT32:
+ return pack_ubyte_i_sint32;
+
+ case MESA_FORMAT_L_UINT8:
+ return pack_ubyte_l_uint8;
+
+ case MESA_FORMAT_L_UINT16:
+ return pack_ubyte_l_uint16;
+
+ case MESA_FORMAT_L_UINT32:
+ return pack_ubyte_l_uint32;
+
+ case MESA_FORMAT_L_SINT8:
+ return pack_ubyte_l_sint8;
+
+ case MESA_FORMAT_L_SINT16:
+ return pack_ubyte_l_sint16;
+
+ case MESA_FORMAT_L_SINT32:
+ return pack_ubyte_l_sint32;
+
+ case MESA_FORMAT_LA_UINT8:
+ return pack_ubyte_la_uint8;
+
+ case MESA_FORMAT_LA_UINT16:
+ return pack_ubyte_la_uint16;
+
+ case MESA_FORMAT_LA_UINT32:
+ return pack_ubyte_la_uint32;
+
+ case MESA_FORMAT_LA_SINT8:
+ return pack_ubyte_la_sint8;
+
+ case MESA_FORMAT_LA_SINT16:
+ return pack_ubyte_la_sint16;
+
+ case MESA_FORMAT_LA_SINT32:
+ return pack_ubyte_la_sint32;
+
+ case MESA_FORMAT_R_UINT8:
+ return pack_ubyte_r_uint8;
+
+ case MESA_FORMAT_R_UINT16:
+ return pack_ubyte_r_uint16;
+
+ case MESA_FORMAT_R_UINT32:
+ return pack_ubyte_r_uint32;
+
+ case MESA_FORMAT_R_SINT8:
+ return pack_ubyte_r_sint8;
+
+ case MESA_FORMAT_R_SINT16:
+ return pack_ubyte_r_sint16;
+
+ case MESA_FORMAT_R_SINT32:
+ return pack_ubyte_r_sint32;
+
+ case MESA_FORMAT_RG_UINT8:
+ return pack_ubyte_rg_uint8;
+
+ case MESA_FORMAT_RG_UINT16:
+ return pack_ubyte_rg_uint16;
+
+ case MESA_FORMAT_RG_UINT32:
+ return pack_ubyte_rg_uint32;
+
+ case MESA_FORMAT_RG_SINT8:
+ return pack_ubyte_rg_sint8;
+
+ case MESA_FORMAT_RG_SINT16:
+ return pack_ubyte_rg_sint16;
+
+ case MESA_FORMAT_RG_SINT32:
+ return pack_ubyte_rg_sint32;
+
+ case MESA_FORMAT_RGB_UINT8:
+ return pack_ubyte_rgb_uint8;
+
+ case MESA_FORMAT_RGB_UINT16:
+ return pack_ubyte_rgb_uint16;
+
+ case MESA_FORMAT_RGB_UINT32:
+ return pack_ubyte_rgb_uint32;
+
+ case MESA_FORMAT_RGB_SINT8:
+ return pack_ubyte_rgb_sint8;
+
+ case MESA_FORMAT_RGB_SINT16:
+ return pack_ubyte_rgb_sint16;
+
+ case MESA_FORMAT_RGB_SINT32:
+ return pack_ubyte_rgb_sint32;
+
+ case MESA_FORMAT_RGBA_UINT8:
+ return pack_ubyte_rgba_uint8;
+
+ case MESA_FORMAT_RGBA_UINT16:
+ return pack_ubyte_rgba_uint16;
+
+ case MESA_FORMAT_RGBA_UINT32:
+ return pack_ubyte_rgba_uint32;
+
+ case MESA_FORMAT_RGBA_SINT8:
+ return pack_ubyte_rgba_sint8;
+
+ case MESA_FORMAT_RGBA_SINT16:
+ return pack_ubyte_rgba_sint16;
+
+ case MESA_FORMAT_RGBA_SINT32:
+ return pack_ubyte_rgba_sint32;
+
+ case MESA_FORMAT_RGBX_UINT8:
+ return pack_ubyte_rgbx_uint8;
+
+ case MESA_FORMAT_RGBX_UINT16:
+ return pack_ubyte_rgbx_uint16;
+
+ case MESA_FORMAT_RGBX_UINT32:
+ return pack_ubyte_rgbx_uint32;
+
+ case MESA_FORMAT_RGBX_SINT8:
+ return pack_ubyte_rgbx_sint8;
+
+ case MESA_FORMAT_RGBX_SINT16:
+ return pack_ubyte_rgbx_sint16;
+
+ case MESA_FORMAT_RGBX_SINT32:
+ return pack_ubyte_rgbx_sint32;
+ default:
+ return NULL;
+ }
+}
+
+/**
+ * Return a function that can pack a GLfloat rgba[4] color.
+ */
+gl_pack_float_rgba_func
+_mesa_get_pack_float_rgba_function(mesa_format format)
+{
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ return pack_float_a8b8g8r8_unorm;
+
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ return pack_float_x8b8g8r8_unorm;
+
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ return pack_float_r8g8b8a8_unorm;
+
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ return pack_float_r8g8b8x8_unorm;
+
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ return pack_float_b8g8r8a8_unorm;
+
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ return pack_float_b8g8r8x8_unorm;
+
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ return pack_float_a8r8g8b8_unorm;
+
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ return pack_float_x8r8g8b8_unorm;
+
+ case MESA_FORMAT_L16A16_UNORM:
+ return pack_float_l16a16_unorm;
+
+ case MESA_FORMAT_A16L16_UNORM:
+ return pack_float_a16l16_unorm;
+
+ case MESA_FORMAT_B5G6R5_UNORM:
+ return pack_float_b5g6r5_unorm;
+
+ case MESA_FORMAT_R5G6B5_UNORM:
+ return pack_float_r5g6b5_unorm;
+
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ return pack_float_b4g4r4a4_unorm;
+
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ return pack_float_b4g4r4x4_unorm;
+
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ return pack_float_a4r4g4b4_unorm;
+
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ return pack_float_a1b5g5r5_unorm;
+
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ return pack_float_x1b5g5r5_unorm;
+
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ return pack_float_b5g5r5a1_unorm;
+
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ return pack_float_b5g5r5x1_unorm;
+
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ return pack_float_a1r5g5b5_unorm;
+
+ case MESA_FORMAT_L8A8_UNORM:
+ return pack_float_l8a8_unorm;
+
+ case MESA_FORMAT_A8L8_UNORM:
+ return pack_float_a8l8_unorm;
+
+ case MESA_FORMAT_R8G8_UNORM:
+ return pack_float_r8g8_unorm;
+
+ case MESA_FORMAT_G8R8_UNORM:
+ return pack_float_g8r8_unorm;
+
+ case MESA_FORMAT_L4A4_UNORM:
+ return pack_float_l4a4_unorm;
+
+ case MESA_FORMAT_B2G3R3_UNORM:
+ return pack_float_b2g3r3_unorm;
+
+ case MESA_FORMAT_R16G16_UNORM:
+ return pack_float_r16g16_unorm;
+
+ case MESA_FORMAT_G16R16_UNORM:
+ return pack_float_g16r16_unorm;
+
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ return pack_float_b10g10r10a2_unorm;
+
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ return pack_float_b10g10r10x2_unorm;
+
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ return pack_float_r10g10b10a2_unorm;
+
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ return pack_float_r10g10b10x2_unorm;
+
+ case MESA_FORMAT_R3G3B2_UNORM:
+ return pack_float_r3g3b2_unorm;
+
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ return pack_float_a4b4g4r4_unorm;
+
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ return pack_float_r4g4b4a4_unorm;
+
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ return pack_float_r5g5b5a1_unorm;
+
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ return pack_float_a2b10g10r10_unorm;
+
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ return pack_float_a2r10g10b10_unorm;
+
+ case MESA_FORMAT_A_UNORM8:
+ return pack_float_a_unorm8;
+
+ case MESA_FORMAT_A_UNORM16:
+ return pack_float_a_unorm16;
+
+ case MESA_FORMAT_L_UNORM8:
+ return pack_float_l_unorm8;
+
+ case MESA_FORMAT_L_UNORM16:
+ return pack_float_l_unorm16;
+
+ case MESA_FORMAT_I_UNORM8:
+ return pack_float_i_unorm8;
+
+ case MESA_FORMAT_I_UNORM16:
+ return pack_float_i_unorm16;
+
+ case MESA_FORMAT_R_UNORM8:
+ return pack_float_r_unorm8;
+
+ case MESA_FORMAT_R_UNORM16:
+ return pack_float_r_unorm16;
+
+ case MESA_FORMAT_BGR_UNORM8:
+ return pack_float_bgr_unorm8;
+
+ case MESA_FORMAT_RGB_UNORM8:
+ return pack_float_rgb_unorm8;
+
+ case MESA_FORMAT_RGBA_UNORM16:
+ return pack_float_rgba_unorm16;
+
+ case MESA_FORMAT_RGBX_UNORM16:
+ return pack_float_rgbx_unorm16;
+
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ return pack_float_a8b8g8r8_snorm;
+
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ return pack_float_x8b8g8r8_snorm;
+
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ return pack_float_r8g8b8a8_snorm;
+
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ return pack_float_r8g8b8x8_snorm;
+
+ case MESA_FORMAT_R16G16_SNORM:
+ return pack_float_r16g16_snorm;
+
+ case MESA_FORMAT_G16R16_SNORM:
+ return pack_float_g16r16_snorm;
+
+ case MESA_FORMAT_R8G8_SNORM:
+ return pack_float_r8g8_snorm;
+
+ case MESA_FORMAT_G8R8_SNORM:
+ return pack_float_g8r8_snorm;
+
+ case MESA_FORMAT_L8A8_SNORM:
+ return pack_float_l8a8_snorm;
+
+ case MESA_FORMAT_A8L8_SNORM:
+ return pack_float_a8l8_snorm;
+
+ case MESA_FORMAT_A_SNORM8:
+ return pack_float_a_snorm8;
+
+ case MESA_FORMAT_A_SNORM16:
+ return pack_float_a_snorm16;
+
+ case MESA_FORMAT_L_SNORM8:
+ return pack_float_l_snorm8;
+
+ case MESA_FORMAT_L_SNORM16:
+ return pack_float_l_snorm16;
+
+ case MESA_FORMAT_I_SNORM8:
+ return pack_float_i_snorm8;
+
+ case MESA_FORMAT_I_SNORM16:
+ return pack_float_i_snorm16;
+
+ case MESA_FORMAT_R_SNORM8:
+ return pack_float_r_snorm8;
+
+ case MESA_FORMAT_R_SNORM16:
+ return pack_float_r_snorm16;
+
+ case MESA_FORMAT_LA_SNORM16:
+ return pack_float_la_snorm16;
+
+ case MESA_FORMAT_RGB_SNORM16:
+ return pack_float_rgb_snorm16;
+
+ case MESA_FORMAT_RGBA_SNORM16:
+ return pack_float_rgba_snorm16;
+
+ case MESA_FORMAT_RGBX_SNORM16:
+ return pack_float_rgbx_snorm16;
+
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ return pack_float_a8b8g8r8_srgb;
+
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ return pack_float_b8g8r8a8_srgb;
+
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ return pack_float_a8r8g8b8_srgb;
+
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ return pack_float_b8g8r8x8_srgb;
+
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ return pack_float_x8r8g8b8_srgb;
+
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ return pack_float_r8g8b8a8_srgb;
+
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ return pack_float_r8g8b8x8_srgb;
+
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ return pack_float_x8b8g8r8_srgb;
+
+ case MESA_FORMAT_L8A8_SRGB:
+ return pack_float_l8a8_srgb;
+
+ case MESA_FORMAT_A8L8_SRGB:
+ return pack_float_a8l8_srgb;
+
+ case MESA_FORMAT_L_SRGB8:
+ return pack_float_l_srgb8;
+
+ case MESA_FORMAT_BGR_SRGB8:
+ return pack_float_bgr_srgb8;
+
+ case MESA_FORMAT_R9G9B9E5_FLOAT:
+ return pack_float_r9g9b9e5_float;
+
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ return pack_float_r11g11b10_float;
+
+ case MESA_FORMAT_A_FLOAT16:
+ return pack_float_a_float16;
+
+ case MESA_FORMAT_A_FLOAT32:
+ return pack_float_a_float32;
+
+ case MESA_FORMAT_L_FLOAT16:
+ return pack_float_l_float16;
+
+ case MESA_FORMAT_L_FLOAT32:
+ return pack_float_l_float32;
+
+ case MESA_FORMAT_LA_FLOAT16:
+ return pack_float_la_float16;
+
+ case MESA_FORMAT_LA_FLOAT32:
+ return pack_float_la_float32;
+
+ case MESA_FORMAT_I_FLOAT16:
+ return pack_float_i_float16;
+
+ case MESA_FORMAT_I_FLOAT32:
+ return pack_float_i_float32;
+
+ case MESA_FORMAT_R_FLOAT16:
+ return pack_float_r_float16;
+
+ case MESA_FORMAT_R_FLOAT32:
+ return pack_float_r_float32;
+
+ case MESA_FORMAT_RG_FLOAT16:
+ return pack_float_rg_float16;
+
+ case MESA_FORMAT_RG_FLOAT32:
+ return pack_float_rg_float32;
+
+ case MESA_FORMAT_RGB_FLOAT16:
+ return pack_float_rgb_float16;
+
+ case MESA_FORMAT_RGB_FLOAT32:
+ return pack_float_rgb_float32;
+
+ case MESA_FORMAT_RGBA_FLOAT16:
+ return pack_float_rgba_float16;
+
+ case MESA_FORMAT_RGBA_FLOAT32:
+ return pack_float_rgba_float32;
+
+ case MESA_FORMAT_RGBX_FLOAT16:
+ return pack_float_rgbx_float16;
+
+ case MESA_FORMAT_RGBX_FLOAT32:
+ return pack_float_rgbx_float32;
+ default:
+ return NULL;
+ }
+}
+
+/**
+ * Pack a row of GLubyte rgba[4] values to the destination.
+ */
+void
+_mesa_pack_ubyte_rgba_row(mesa_format format, GLuint n,
+ const GLubyte src[][4], void *dst)
+{
+ GLuint i;
+ GLubyte *d = dst;
+
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8b8g8r8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x8b8g8r8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8a8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8x8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b8g8r8a8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b8g8r8x8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8r8g8b8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x8r8g8b8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L16A16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l16a16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A16L16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a16l16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b5g6r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r5g6b5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b4g4r4a4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b4g4r4x4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a4r4g4b4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a1b5g5r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x1b5g5r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b5g5r5a1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b5g5r5x1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a1r5g5b5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l8a8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8l8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_g8r8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l4a4_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b2g3r3_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r16g16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_g16r16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b10g10r10a2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b10g10r10x2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r10g10b10a2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r10g10b10x2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r3g3b2_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a4b4g4r4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r4g4b4a4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r5g5b5a1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a2b10g10r10_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a2r10g10b10_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_bgr_unorm8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_unorm8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_unorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_unorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8b8g8r8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x8b8g8r8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8a8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8x8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r16g16_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_g16r16_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_g8r8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l8a8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8l8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_snorm16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_snorm16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_snorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_snorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8b8g8r8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b8g8r8a8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8r8g8b8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b8g8r8x8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x8r8g8b8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8a8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8x8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_x8b8g8r8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l8a8_srgb(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8l8_srgb(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SRGB8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_srgb8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_SRGB8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_bgr_srgb8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_R9G9B9E5_FLOAT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r9g9b9e5_float(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r11g11b10_float(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_float16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_float32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_I_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_float16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_float32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_float16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_float32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_float16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_float32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_float16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_float32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8b8g8r8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a8r8g8b8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r8g8b8a8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b8g8r8a8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b10g10r10a2_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r10g10b10a2_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a2b10g10r10_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a2r10g10b10_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b5g6r5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r5g6b5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b2g3r3_uint(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r3g3b2_uint(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a4b4g4r4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r4g4b4a4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b4g4r4a4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a4r4g4b4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a1b5g5r5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_b5g5r5a1_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a1r5g5b5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r5g5b5a1_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_a_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_i_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_l_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_uint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_uint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_uint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_sint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_sint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_la_sint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_r_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_uint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_uint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_uint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_sint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_sint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rg_sint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_uint8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_uint16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_uint32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_sint8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_sint16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgb_sint32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_uint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_uint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_uint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_sint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_sint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgba_sint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_uint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_uint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_uint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_sint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_sint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_ubyte_rgbx_sint32(src[i], d);
+ d += 16;
+ }
+ break;
+ default:
+ assert(!"Invalid format");
+ }
+}
+
+/**
+ * Pack a row of GLuint rgba[4] values to the destination.
+ */
+void
+_mesa_pack_uint_rgba_row(mesa_format format, GLuint n,
+ const GLuint src[][4], void *dst)
+{
+ GLuint i;
+ GLubyte *d = dst;
+
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a8b8g8r8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a8r8g8b8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r8g8b8a8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b8g8r8a8_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b10g10r10a2_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r10g10b10a2_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a2b10g10r10_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a2r10g10b10_uint(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b5g6r5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r5g6b5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b2g3r3_uint(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r3g3b2_uint(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a4b4g4r4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r4g4b4a4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b4g4r4a4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a4r4g4b4_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a1b5g5r5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_b5g5r5a1_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a1r5g5b5_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r5g5b5a1_uint(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_a_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_i_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_l_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_uint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_uint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_uint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_sint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_sint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_la_sint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_uint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_uint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_uint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_sint8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_sint16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_r_sint32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_uint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_uint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_uint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_sint8(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_sint16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rg_sint32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_uint8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_uint16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_uint32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_sint8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_sint16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgb_sint32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_uint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_uint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_uint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_sint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_sint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgba_sint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_uint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_uint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_uint32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT8:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_sint8(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT16:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_sint16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT32:
+ for (i = 0; i < n; ++i) {
+ pack_uint_rgbx_sint32(src[i], d);
+ d += 16;
+ }
+ break;
+ default:
+ assert(!"Invalid format");
+ }
+}
+
+/**
+ * Pack a row of GLfloat rgba[4] values to the destination.
+ */
+void
+_mesa_pack_float_rgba_row(mesa_format format, GLuint n,
+ const GLfloat src[][4], void *dst)
+{
+ GLuint i;
+ GLubyte *d = dst;
+
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8b8g8r8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_x8b8g8r8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8a8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8x8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b8g8r8a8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b8g8r8x8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8r8g8b8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_x8r8g8b8_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L16A16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_l16a16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A16L16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a16l16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b5g6r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r5g6b5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b4g4r4a4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b4g4r4x4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a4r4g4b4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a1b5g5r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_x1b5g5r5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b5g5r5a1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b5g5r5x1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a1r5g5b5_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_l8a8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8l8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_g8r8_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_l4a4_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b2g3r3_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r16g16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_g16r16_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b10g10r10a2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_b10g10r10x2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r10g10b10a2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r10g10b10x2_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r3g3b2_unorm(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a4b4g4r4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r4g4b4a4_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r5g5b5a1_unorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a2b10g10r10_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a2r10g10b10_unorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_unorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_unorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_bgr_unorm8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgb_unorm8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgba_unorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgbx_unorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8b8g8r8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_x8b8g8r8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8a8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8x8_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r16g16_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_g16r16_snorm(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_g8r8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_l8a8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SNORM:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8l8_snorm(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM8:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_snorm8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_snorm16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_la_snorm16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgb_snorm16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgba_snorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SNORM16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgbx_snorm16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8b8g8r8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_b8g8r8a8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8r8g8b8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_b8g8r8x8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_x8r8g8b8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8a8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_r8g8b8x8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_x8b8g8r8_srgb(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_l8a8_srgb(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SRGB:
+ for (i = 0; i < n; ++i) {
+ pack_float_a8l8_srgb(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SRGB8:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_srgb8(src[i], d);
+ d += 1;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_SRGB8:
+ for (i = 0; i < n; ++i) {
+ pack_float_bgr_srgb8(src[i], d);
+ d += 3;
+ }
+ break;
+
+ case MESA_FORMAT_R9G9B9E5_FLOAT:
+ for (i = 0; i < n; ++i) {
+ pack_float_r9g9b9e5_float(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ for (i = 0; i < n; ++i) {
+ pack_float_r11g11b10_float(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_a_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_l_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_la_float16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_la_float32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_I_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_i_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_float16(src[i], d);
+ d += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_r_float32(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rg_float16(src[i], d);
+ d += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_rg_float32(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgb_float16(src[i], d);
+ d += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgb_float32(src[i], d);
+ d += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgba_float16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgba_float32(src[i], d);
+ d += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgbx_float16(src[i], d);
+ d += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ pack_float_rgbx_float32(src[i], d);
+ d += 16;
+ }
+ break;
+ default:
+ assert(!"Invalid format");
+ }
+}
+
+/**
+ * Pack a 2D image of ubyte RGBA pixels in the given format.
+ * \param srcRowStride source image row stride in bytes
+ * \param dstRowStride destination image row stride in bytes
+ */
+void
+_mesa_pack_ubyte_rgba_rect(mesa_format format, GLuint width, GLuint height,
+ const GLubyte *src, GLint srcRowStride,
+ void *dst, GLint dstRowStride)
+{
+ GLubyte *dstUB = dst;
+ GLuint i;
+
+ if (srcRowStride == width * 4 * sizeof(GLubyte) &&
+ dstRowStride == _mesa_format_row_stride(format, width)) {
+ /* do whole image at once */
+ _mesa_pack_ubyte_rgba_row(format, width * height,
+ (const GLubyte (*)[4]) src, dst);
+ }
+ else {
+ /* row by row */
+ for (i = 0; i < height; i++) {
+ _mesa_pack_ubyte_rgba_row(format, width,
+ (const GLubyte (*)[4]) src, dstUB);
+ src += srcRowStride;
+ dstUB += dstRowStride;
+ }
+ }
+}
+
+
+/** Helper struct for MESA_FORMAT_Z32_FLOAT_S8X24_UINT */
+struct z32f_x24s8
+{
+ float z;
+ uint32_t x24s8;
+};
+
+
+/**
+ ** Pack float Z pixels
+ **/
+
+static void
+pack_float_S8_UINT_Z24_UNORM(const GLfloat *src, void *dst)
+{
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffff;
+ GLuint s = *d & 0xff;
+ GLuint z = (GLuint) (*src * scale);
+ assert(z <= 0xffffff);
+ *d = (z << 8) | s;
+}
+
+static void
+pack_float_Z24_UNORM_S8_UINT(const GLfloat *src, void *dst)
+{
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffff;
+ GLuint s = *d & 0xff000000;
+ GLuint z = (GLuint) (*src * scale);
+ assert(z <= 0xffffff);
+ *d = s | z;
+}
+
+static void
+pack_float_Z_UNORM16(const GLfloat *src, void *dst)
+{
+ GLushort *d = ((GLushort *) dst);
+ const GLfloat scale = (GLfloat) 0xffff;
+ *d = (GLushort) (*src * scale);
+}
+
+static void
+pack_float_Z_UNORM32(const GLfloat *src, void *dst)
+{
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffffff;
+ *d = (GLuint) (*src * scale);
+}
+
+static void
+pack_float_Z_FLOAT32(const GLfloat *src, void *dst)
+{
+ GLfloat *d = (GLfloat *) dst;
+ *d = *src;
+}
+
+gl_pack_float_z_func
+_mesa_get_pack_float_z_func(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ return pack_float_S8_UINT_Z24_UNORM;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ return pack_float_Z24_UNORM_S8_UINT;
+ case MESA_FORMAT_Z_UNORM16:
+ return pack_float_Z_UNORM16;
+ case MESA_FORMAT_Z_UNORM32:
+ return pack_float_Z_UNORM32;
+ case MESA_FORMAT_Z_FLOAT32:
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ return pack_float_Z_FLOAT32;
+ default:
+ _mesa_problem(NULL,
+ "unexpected format in _mesa_get_pack_float_z_func()");
+ return NULL;
+ }
+}
+
+
+
+/**
+ ** Pack uint Z pixels. The incoming src value is always in
+ ** the range [0, 2^32-1].
+ **/
+
+static void
+pack_uint_S8_UINT_Z24_UNORM(const GLuint *src, void *dst)
+{
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint s = *d & 0xff;
+ GLuint z = *src & 0xffffff00;
+ *d = z | s;
+}
+
+static void
+pack_uint_Z24_UNORM_S8_UINT(const GLuint *src, void *dst)
+{
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint s = *d & 0xff000000;
+ GLuint z = *src >> 8;
+ *d = s | z;
+}
+
+static void
+pack_uint_Z_UNORM16(const GLuint *src, void *dst)
+{
+ GLushort *d = ((GLushort *) dst);
+ *d = *src >> 16;
+}
+
+static void
+pack_uint_Z_UNORM32(const GLuint *src, void *dst)
+{
+ GLuint *d = ((GLuint *) dst);
+ *d = *src;
+}
+
+static void
+pack_uint_Z_FLOAT32(const GLuint *src, void *dst)
+{
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffffff;
+ *d = (GLuint) (*src * scale);
+ assert(*d >= 0.0f);
+ assert(*d <= 1.0f);
+}
+
+static void
+pack_uint_Z_FLOAT32_X24S8(const GLuint *src, void *dst)
+{
+ GLfloat *d = ((GLfloat *) dst);
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffffff;
+ *d = (GLfloat) (*src * scale);
+ assert(*d >= 0.0f);
+ assert(*d <= 1.0f);
+}
+
+gl_pack_uint_z_func
+_mesa_get_pack_uint_z_func(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ return pack_uint_S8_UINT_Z24_UNORM;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ return pack_uint_Z24_UNORM_S8_UINT;
+ case MESA_FORMAT_Z_UNORM16:
+ return pack_uint_Z_UNORM16;
+ case MESA_FORMAT_Z_UNORM32:
+ return pack_uint_Z_UNORM32;
+ case MESA_FORMAT_Z_FLOAT32:
+ return pack_uint_Z_FLOAT32;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ return pack_uint_Z_FLOAT32_X24S8;
+ default:
+ _mesa_problem(NULL, "unexpected format in _mesa_get_pack_uint_z_func()");
+ return NULL;
+ }
+}
+
+
+/**
+ ** Pack ubyte stencil pixels
+ **/
+
+static void
+pack_ubyte_stencil_Z24_S8(const GLubyte *src, void *dst)
+{
+ /* don't disturb the Z values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint s = *src;
+ GLuint z = *d & 0xffffff00;
+ *d = z | s;
+}
+
+static void
+pack_ubyte_stencil_S8_Z24(const GLubyte *src, void *dst)
+{
+ /* don't disturb the Z values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint s = *src << 24;
+ GLuint z = *d & 0xffffff;
+ *d = s | z;
+}
+
+static void
+pack_ubyte_stencil_S8(const GLubyte *src, void *dst)
+{
+ GLubyte *d = (GLubyte *) dst;
+ *d = *src;
+}
+
+static void
+pack_ubyte_stencil_Z32_FLOAT_X24S8(const GLubyte *src, void *dst)
+{
+ GLfloat *d = ((GLfloat *) dst);
+ d[1] = *src;
+}
+
+
+gl_pack_ubyte_stencil_func
+_mesa_get_pack_ubyte_stencil_func(mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ return pack_ubyte_stencil_Z24_S8;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ return pack_ubyte_stencil_S8_Z24;
+ case MESA_FORMAT_S_UINT8:
+ return pack_ubyte_stencil_S8;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ return pack_ubyte_stencil_Z32_FLOAT_X24S8;
+ default:
+ _mesa_problem(NULL,
+ "unexpected format in _mesa_pack_ubyte_stencil_func()");
+ return NULL;
+ }
+}
+
+
+
+void
+_mesa_pack_float_z_row(mesa_format format, GLuint n,
+ const GLfloat *src, void *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ {
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = d[i] & 0xff;
+ GLuint z = (GLuint) (src[i] * scale);
+ assert(z <= 0xffffff);
+ d[i] = (z << 8) | s;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ {
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = d[i] & 0xff000000;
+ GLuint z = (GLuint) (src[i] * scale);
+ assert(z <= 0xffffff);
+ d[i] = s | z;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z_UNORM16:
+ {
+ GLushort *d = ((GLushort *) dst);
+ const GLfloat scale = (GLfloat) 0xffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i] = (GLushort) (src[i] * scale);
+ }
+ }
+ break;
+ case MESA_FORMAT_Z_UNORM32:
+ {
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = (GLdouble) 0xffffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i] = (GLuint) (src[i] * scale);
+ }
+ }
+ break;
+ case MESA_FORMAT_Z_FLOAT32:
+ memcpy(dst, src, n * sizeof(GLfloat));
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ {
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i].z = src[i];
+ }
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "unexpected format in _mesa_pack_float_z_row()");
+ }
+}
+
+
+/**
+ * The incoming Z values are always in the range [0, 0xffffffff].
+ */
+void
+_mesa_pack_uint_z_row(mesa_format format, GLuint n,
+ const GLuint *src, void *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ {
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = d[i] & 0xff;
+ GLuint z = src[i] & 0xffffff00;
+ d[i] = z | s;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ {
+ /* don't disturb the stencil values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = d[i] & 0xff000000;
+ GLuint z = src[i] >> 8;
+ d[i] = s | z;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z_UNORM16:
+ {
+ GLushort *d = ((GLushort *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i] = src[i] >> 16;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z_UNORM32:
+ memcpy(dst, src, n * sizeof(GLfloat));
+ break;
+ case MESA_FORMAT_Z_FLOAT32:
+ {
+ GLuint *d = ((GLuint *) dst);
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i] = (GLuint) (src[i] * scale);
+ assert(d[i] >= 0.0f);
+ assert(d[i] <= 1.0f);
+ }
+ }
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ {
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i].z = (GLfloat) (src[i] * scale);
+ assert(d[i].z >= 0.0f);
+ assert(d[i].z <= 1.0f);
+ }
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "unexpected format in _mesa_pack_uint_z_row()");
+ }
+}
+
+
+void
+_mesa_pack_ubyte_stencil_row(mesa_format format, GLuint n,
+ const GLubyte *src, void *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ {
+ /* don't disturb the Z values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = src[i];
+ GLuint z = d[i] & 0xffffff00;
+ d[i] = z | s;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ {
+ /* don't disturb the Z values */
+ GLuint *d = ((GLuint *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = src[i] << 24;
+ GLuint z = d[i] & 0xffffff;
+ d[i] = s | z;
+ }
+ }
+ break;
+ case MESA_FORMAT_S_UINT8:
+ memcpy(dst, src, n * sizeof(GLubyte));
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ {
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ d[i].x24s8 = src[i];
+ }
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "unexpected format in _mesa_pack_ubyte_stencil_row()");
+ }
+}
+
+
+/**
+ * Incoming Z/stencil values are always in uint_24_8 format.
+ */
+void
+_mesa_pack_uint_24_8_depth_stencil_row(mesa_format format, GLuint n,
+ const GLuint *src, void *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ memcpy(dst, src, n * sizeof(GLuint));
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ {
+ GLuint *d = ((GLuint *) dst);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLuint s = src[i] << 24;
+ GLuint z = src[i] >> 8;
+ d[i] = s | z;
+ }
+ }
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ {
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ GLfloat z = (GLfloat) ((src[i] >> 8) * scale);
+ d[i].z = z;
+ d[i].x24s8 = src[i];
+ }
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "bad format %s in _mesa_pack_ubyte_s_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+
+
+/**
+ * Convert a boolean color mask to a packed color where each channel of
+ * the packed value at dst will be 0 or ~0 depending on the colorMask.
+ */
+void
+_mesa_pack_colormask(mesa_format format, const GLubyte colorMask[4], void *dst)
+{
+ GLfloat maskColor[4];
+
+ switch (_mesa_get_format_datatype(format)) {
+ case GL_UNSIGNED_NORMALIZED:
+ /* simple: 1.0 will convert to ~0 in the right bit positions */
+ maskColor[0] = colorMask[0] ? 1.0f : 0.0f;
+ maskColor[1] = colorMask[1] ? 1.0f : 0.0f;
+ maskColor[2] = colorMask[2] ? 1.0f : 0.0f;
+ maskColor[3] = colorMask[3] ? 1.0f : 0.0f;
+ _mesa_pack_float_rgba_row(format, 1,
+ (const GLfloat (*)[4]) maskColor, dst);
+ break;
+ case GL_SIGNED_NORMALIZED:
+ case GL_FLOAT:
+ /* These formats are harder because it's hard to know the floating
+ * point values that will convert to ~0 for each color channel's bits.
+ * This solution just generates a non-zero value for each color channel
+ * then fixes up the non-zero values to be ~0.
+ * Note: we'll need to add special case code if we ever have to deal
+ * with formats with unequal color channel sizes, like R11_G11_B10.
+ * We issue a warning below for channel sizes other than 8,16,32.
+ */
+ {
+ GLuint bits = _mesa_get_format_max_bits(format); /* bits per chan */
+ GLuint bytes = _mesa_get_format_bytes(format);
+ GLuint i;
+
+ /* this should put non-zero values into the channels of dst */
+ maskColor[0] = colorMask[0] ? -1.0f : 0.0f;
+ maskColor[1] = colorMask[1] ? -1.0f : 0.0f;
+ maskColor[2] = colorMask[2] ? -1.0f : 0.0f;
+ maskColor[3] = colorMask[3] ? -1.0f : 0.0f;
+ _mesa_pack_float_rgba_row(format, 1,
+ (const GLfloat (*)[4]) maskColor, dst);
+
+ /* fix-up the dst channels by converting non-zero values to ~0 */
+ if (bits == 8) {
+ GLubyte *d = (GLubyte *) dst;
+ for (i = 0; i < bytes; i++) {
+ d[i] = d[i] ? 0xff : 0x0;
+ }
+ }
+ else if (bits == 16) {
+ GLushort *d = (GLushort *) dst;
+ for (i = 0; i < bytes / 2; i++) {
+ d[i] = d[i] ? 0xffff : 0x0;
+ }
+ }
+ else if (bits == 32) {
+ GLuint *d = (GLuint *) dst;
+ for (i = 0; i < bytes / 4; i++) {
+ d[i] = d[i] ? 0xffffffffU : 0x0;
+ }
+ }
+ else {
+ _mesa_problem(NULL, "unexpected size in _mesa_pack_colormask()");
+ return;
+ }
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "unexpected format data type in gen_color_mask()");
+ return;
+ }
+}
+
diff --git a/prebuilt-intermediates/main/format_unpack.c b/prebuilt-intermediates/main/format_unpack.c
new file mode 100644
index 0000000..21c5541
--- /dev/null
+++ b/prebuilt-intermediates/main/format_unpack.c
@@ -0,0 +1,7604 @@
+/*
+ * Mesa 3-D graphics library
+ *
+ * Copyright (c) 2011 VMware, Inc.
+ * Copyright (c) 2014 Intel Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+/**
+ * Color, depth, stencil packing functions.
+ * Used to pack basic color, depth and stencil formats to specific
+ * hardware formats.
+ *
+ * There are both per-pixel and per-row packing functions:
+ * - The former will be used by swrast to write values to the color, depth,
+ * stencil buffers when drawing points, lines and masked spans.
+ * - The later will be used for image-oriented functions like glDrawPixels,
+ * glAccum, and glTexImage.
+ */
+
+#include <stdint.h>
+
+#include "format_unpack.h"
+#include "format_utils.h"
+#include "macros.h"
+#include "util/format_rgb9e5.h"
+#include "util/format_r11g11b10f.h"
+#include "util/format_srgb.h"
+
+#define UNPACK(SRC, OFFSET, BITS) (((SRC) >> (OFFSET)) & MAX_UINT(BITS))
+
+
+
+/* float unpacking functions */
+
+
+static inline void
+unpack_float_a8b8g8r8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_x8b8g8r8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r8g8b8a8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_r8g8b8x8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_b8g8r8a8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_b8g8r8x8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a8r8g8b8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_x8r8g8b8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l16a16_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t l = UNPACK(*src, 0, 16);
+ uint16_t a = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_a16l16_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t a = UNPACK(*src, 0, 16);
+ uint16_t l = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_b5g6r5_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 6);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r5g6b5_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 6);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_b4g4r4a4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t r = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 4);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 4);
+}
+
+static inline void
+unpack_float_b4g4r4x4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t r = UNPACK(*src, 8, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 4);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a4r4g4b4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t r = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t b = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 4);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 4);
+}
+
+static inline void
+unpack_float_a1b5g5r5_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t b = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 1);
+}
+
+static inline void
+unpack_float_x1b5g5r5_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_b5g5r5a1_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t r = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 1);
+}
+
+static inline void
+unpack_float_b5g5r5x1_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t r = UNPACK(*src, 10, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a1r5g5b5_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t r = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 1);
+}
+
+static inline void
+unpack_float_l8a8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 8);
+ uint8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a8l8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_r8g8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_g8r8_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t g = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l4a4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 4);
+ uint8_t a = UNPACK(*src, 4, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 4);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 4);
+}
+
+static inline void
+unpack_float_b2g3r3_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 2);
+ uint8_t g = UNPACK(*src, 2, 3);
+ uint8_t r = UNPACK(*src, 5, 3);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 3);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 3);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 2);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r16g16_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 16);
+ uint16_t g = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 16);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_g16r16_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t g = UNPACK(*src, 0, 16);
+ uint16_t r = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 16);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_b10g10r10a2_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t b = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t r = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 2);
+}
+
+static inline void
+unpack_float_b10g10r10x2_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t b = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t r = UNPACK(*src, 20, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r10g10b10a2_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t b = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 2);
+}
+
+static inline void
+unpack_float_r10g10b10x2_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t b = UNPACK(*src, 20, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r3g3b2_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 3);
+ uint8_t g = UNPACK(*src, 3, 3);
+ uint8_t b = UNPACK(*src, 6, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 3);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 3);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 2);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a4b4g4r4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t b = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t r = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 4);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 4);
+}
+
+static inline void
+unpack_float_r4g4b4a4_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t b = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 4);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 4);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 4);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 4);
+}
+
+static inline void
+unpack_float_r5g5b5a1_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t b = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 5);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 5);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 5);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 1);
+}
+
+static inline void
+unpack_float_a2b10g10r10_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t b = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t r = UNPACK(*src, 22, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 2);
+}
+
+static inline void
+unpack_float_a2r10g10b10_unorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t r = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t b = UNPACK(*src, 22, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 10);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 10);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 10);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 2);
+}
+
+static inline void
+unpack_float_a_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = _mesa_unorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_l_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 16);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_i_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t i = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(i, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(i, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(i, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(i, 8);
+}
+
+static inline void
+unpack_float_i_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t i = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(i, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(i, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(i, 16);
+
+
+ dst[3] = _mesa_unorm_to_float(i, 16);
+}
+
+static inline void
+unpack_float_r_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 16);
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_bgr_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = src[0];
+ uint8_t g = src[1];
+ uint8_t r = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgb_unorm8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+ uint8_t b = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgba_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+ uint16_t a = src[3];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 16);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_rgbx_unorm16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_unorm_to_float(g, 16);
+
+
+ dst[2] = _mesa_unorm_to_float(b, 16);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a8b8g8r8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t a = UNPACK(*src, 0, 8);
+ int8_t b = UNPACK(*src, 8, 8);
+ int8_t g = UNPACK(*src, 16, 8);
+ int8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_x8b8g8r8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t b = UNPACK(*src, 8, 8);
+ int8_t g = UNPACK(*src, 16, 8);
+ int8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r8g8b8a8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+ int8_t b = UNPACK(*src, 16, 8);
+ int8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 8);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_r8g8b8x8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+ int8_t b = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r16g16_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int16_t r = UNPACK(*src, 0, 16);
+ int16_t g = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 16);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_g16r16_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int16_t g = UNPACK(*src, 0, 16);
+ int16_t r = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 16);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r8g8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_g8r8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t g = UNPACK(*src, 0, 8);
+ int8_t r = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 8);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l8a8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t l = UNPACK(*src, 0, 8);
+ int8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a8l8_snorm(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t a = UNPACK(*src, 0, 8);
+ int8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a_snorm8(const void *void_src, GLfloat dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = _mesa_snorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = _mesa_snorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_l_snorm8(const void *void_src, GLfloat dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t l = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(l, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(l, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(l, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(l, 16);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_i_snorm8(const void *void_src, GLfloat dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t i = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(i, 8);
+
+
+ dst[1] = _mesa_snorm_to_float(i, 8);
+
+
+ dst[2] = _mesa_snorm_to_float(i, 8);
+
+
+ dst[3] = _mesa_snorm_to_float(i, 8);
+}
+
+static inline void
+unpack_float_i_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t i = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(i, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(i, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(i, 16);
+
+
+ dst[3] = _mesa_snorm_to_float(i, 16);
+}
+
+static inline void
+unpack_float_r_snorm8(const void *void_src, GLfloat dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 8);
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_la_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+ int16_t a = src[1];
+
+
+
+ dst[0] = _mesa_snorm_to_float(l, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(l, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(l, 16);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_rgb_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 16);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgba_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+ int16_t a = src[3];
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 16);
+
+
+ dst[3] = _mesa_snorm_to_float(a, 16);
+}
+
+static inline void
+unpack_float_rgbx_snorm16(const void *void_src, GLfloat dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+
+ dst[0] = _mesa_snorm_to_float(r, 16);
+
+
+ dst[1] = _mesa_snorm_to_float(g, 16);
+
+
+ dst[2] = _mesa_snorm_to_float(b, 16);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a8b8g8r8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_b8g8r8a8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a8r8g8b8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_b8g8r8x8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_x8r8g8b8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r8g8b8a8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_r8g8b8x8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_x8b8g8r8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l8a8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 8);
+ uint8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_a8l8_srgb(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[3] = _mesa_unorm_to_float(a, 8);
+}
+
+static inline void
+unpack_float_l_srgb8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[1] = _mesa_unorm_to_float(l, 8);
+
+
+ dst[2] = _mesa_unorm_to_float(l, 8);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_bgr_srgb8(const void *void_src, GLfloat dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = src[0];
+ uint8_t g = src[1];
+ uint8_t r = src[2];
+
+
+
+
+ dst[0] = util_format_srgb_8unorm_to_linear_float(r);
+
+
+
+ dst[1] = util_format_srgb_8unorm_to_linear_float(g);
+
+
+
+ dst[2] = util_format_srgb_8unorm_to_linear_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_a_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = _mesa_half_to_float(a);
+}
+
+static inline void
+unpack_float_a_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float a = src[0];
+
+
+ dst[0] = 0.0f;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_float_l_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+
+
+
+ dst[0] = _mesa_half_to_float(l);
+
+
+ dst[1] = _mesa_half_to_float(l);
+
+
+ dst[2] = _mesa_half_to_float(l);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_l_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float l = src[0];
+
+
+
+ dst[0] = l;
+
+
+ dst[1] = l;
+
+
+ dst[2] = l;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_la_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+ uint16_t a = src[1];
+
+
+
+ dst[0] = _mesa_half_to_float(l);
+
+
+ dst[1] = _mesa_half_to_float(l);
+
+
+ dst[2] = _mesa_half_to_float(l);
+
+
+ dst[3] = _mesa_half_to_float(a);
+}
+
+static inline void
+unpack_float_la_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float l = src[0];
+ float a = src[1];
+
+
+
+ dst[0] = l;
+
+
+ dst[1] = l;
+
+
+ dst[2] = l;
+
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_float_i_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t i = src[0];
+
+
+
+ dst[0] = _mesa_half_to_float(i);
+
+
+ dst[1] = _mesa_half_to_float(i);
+
+
+ dst[2] = _mesa_half_to_float(i);
+
+
+ dst[3] = _mesa_half_to_float(i);
+}
+
+static inline void
+unpack_float_i_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float i = src[0];
+
+
+
+ dst[0] = i;
+
+
+ dst[1] = i;
+
+
+ dst[2] = i;
+
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_float_r_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+
+
+
+ dst[0] = _mesa_half_to_float(r);
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_r_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float r = src[0];
+
+
+
+ dst[0] = r;
+
+ dst[1] = 0.0f;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rg_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+
+
+
+ dst[0] = _mesa_half_to_float(r);
+
+
+ dst[1] = _mesa_half_to_float(g);
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rg_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float r = src[0];
+ float g = src[1];
+
+
+
+ dst[0] = r;
+
+
+ dst[1] = g;
+
+ dst[2] = 0.0f;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgb_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+
+ dst[0] = _mesa_half_to_float(r);
+
+
+ dst[1] = _mesa_half_to_float(g);
+
+
+ dst[2] = _mesa_half_to_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgb_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float r = src[0];
+ float g = src[1];
+ float b = src[2];
+
+
+
+ dst[0] = r;
+
+
+ dst[1] = g;
+
+
+ dst[2] = b;
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgba_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+ uint16_t a = src[3];
+
+
+
+ dst[0] = _mesa_half_to_float(r);
+
+
+ dst[1] = _mesa_half_to_float(g);
+
+
+ dst[2] = _mesa_half_to_float(b);
+
+
+ dst[3] = _mesa_half_to_float(a);
+}
+
+static inline void
+unpack_float_rgba_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float r = src[0];
+ float g = src[1];
+ float b = src[2];
+ float a = src[3];
+
+
+
+ dst[0] = r;
+
+
+ dst[1] = g;
+
+
+ dst[2] = b;
+
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_float_rgbx_float16(const void *void_src, GLfloat dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+
+ dst[0] = _mesa_half_to_float(r);
+
+
+ dst[1] = _mesa_half_to_float(g);
+
+
+ dst[2] = _mesa_half_to_float(b);
+
+ dst[3] = 1.0f;
+}
+
+static inline void
+unpack_float_rgbx_float32(const void *void_src, GLfloat dst[4])
+{
+ float *src = (float *)void_src;
+ float r = src[0];
+ float g = src[1];
+ float b = src[2];
+
+
+
+ dst[0] = r;
+
+
+ dst[1] = g;
+
+
+ dst[2] = b;
+
+ dst[3] = 1.0f;
+}
+
+static void
+unpack_float_r9g9b9e5_float(const void *src, GLfloat dst[4])
+{
+ rgb9e5_to_float3(*(const GLuint *)src, dst);
+ dst[3] = 1.0f;
+}
+
+static void
+unpack_float_r11g11b10_float(const void *src, GLfloat dst[4])
+{
+ r11g11b10f_to_float3(*(const GLuint *)src, dst);
+ dst[3] = 1.0f;
+}
+
+static void
+unpack_float_ycbcr(const void *src, GLfloat dst[][4], GLuint n)
+{
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ const GLushort *src0 = ((const GLushort *) src) + i * 2; /* even */
+ const GLushort *src1 = src0 + 1; /* odd */
+ const GLubyte y0 = (*src0 >> 8) & 0xff; /* luminance */
+ const GLubyte cb = *src0 & 0xff; /* chroma U */
+ const GLubyte y1 = (*src1 >> 8) & 0xff; /* luminance */
+ const GLubyte cr = *src1 & 0xff; /* chroma V */
+ const GLubyte y = (i & 1) ? y1 : y0; /* choose even/odd luminance */
+ GLfloat r = 1.164F * (y - 16) + 1.596F * (cr - 128);
+ GLfloat g = 1.164F * (y - 16) - 0.813F * (cr - 128) - 0.391F * (cb - 128);
+ GLfloat b = 1.164F * (y - 16) + 2.018F * (cb - 128);
+ r *= (1.0F / 255.0F);
+ g *= (1.0F / 255.0F);
+ b *= (1.0F / 255.0F);
+ dst[i][0] = CLAMP(r, 0.0F, 1.0F);
+ dst[i][1] = CLAMP(g, 0.0F, 1.0F);
+ dst[i][2] = CLAMP(b, 0.0F, 1.0F);
+ dst[i][3] = 1.0F;
+ }
+}
+
+static void
+unpack_float_ycbcr_rev(const void *src, GLfloat dst[][4], GLuint n)
+{
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ const GLushort *src0 = ((const GLushort *) src) + i * 2; /* even */
+ const GLushort *src1 = src0 + 1; /* odd */
+ const GLubyte y0 = *src0 & 0xff; /* luminance */
+ const GLubyte cr = (*src0 >> 8) & 0xff; /* chroma V */
+ const GLubyte y1 = *src1 & 0xff; /* luminance */
+ const GLubyte cb = (*src1 >> 8) & 0xff; /* chroma U */
+ const GLubyte y = (i & 1) ? y1 : y0; /* choose even/odd luminance */
+ GLfloat r = 1.164F * (y - 16) + 1.596F * (cr - 128);
+ GLfloat g = 1.164F * (y - 16) - 0.813F * (cr - 128) - 0.391F * (cb - 128);
+ GLfloat b = 1.164F * (y - 16) + 2.018F * (cb - 128);
+ r *= (1.0F / 255.0F);
+ g *= (1.0F / 255.0F);
+ b *= (1.0F / 255.0F);
+ dst[i][0] = CLAMP(r, 0.0F, 1.0F);
+ dst[i][1] = CLAMP(g, 0.0F, 1.0F);
+ dst[i][2] = CLAMP(b, 0.0F, 1.0F);
+ dst[i][3] = 1.0F;
+ }
+}
+
+/* ubyte packing functions */
+
+
+static inline void
+unpack_ubyte_a8b8g8r8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_x8b8g8r8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r8g8b8a8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_r8g8b8x8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_b8g8r8a8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_b8g8r8x8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a8r8g8b8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_x8r8g8b8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l16a16_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t l = UNPACK(*src, 0, 16);
+ uint16_t a = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_a16l16_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t a = UNPACK(*src, 0, 16);
+ uint16_t l = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_b5g6r5_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 6, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r5g6b5_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 6, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_b4g4r4a4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t r = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 4, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 4, 8);
+}
+
+static inline void
+unpack_ubyte_b4g4r4x4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t r = UNPACK(*src, 8, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 4, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a4r4g4b4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t r = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t b = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 4, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 4, 8);
+}
+
+static inline void
+unpack_ubyte_a1b5g5r5_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t b = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 1, 8);
+}
+
+static inline void
+unpack_ubyte_x1b5g5r5_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_b5g5r5a1_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t r = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 1, 8);
+}
+
+static inline void
+unpack_ubyte_b5g5r5x1_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t r = UNPACK(*src, 10, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a1r5g5b5_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t r = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 1, 8);
+}
+
+static inline void
+unpack_ubyte_l8a8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 8);
+ uint8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a8l8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_r8g8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_g8r8_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t g = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l4a4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 4);
+ uint8_t a = UNPACK(*src, 4, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 4, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 4, 8);
+}
+
+static inline void
+unpack_ubyte_b2g3r3_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 2);
+ uint8_t g = UNPACK(*src, 2, 3);
+ uint8_t r = UNPACK(*src, 5, 3);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 3, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 3, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 2, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r16g16_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 16);
+ uint16_t g = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 16, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_g16r16_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t g = UNPACK(*src, 0, 16);
+ uint16_t r = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 16, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_b10g10r10a2_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t b = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t r = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 2, 8);
+}
+
+static inline void
+unpack_ubyte_b10g10r10x2_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t b = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t r = UNPACK(*src, 20, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r10g10b10a2_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t b = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 2, 8);
+}
+
+static inline void
+unpack_ubyte_r10g10b10x2_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t b = UNPACK(*src, 20, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r3g3b2_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 3);
+ uint8_t g = UNPACK(*src, 3, 3);
+ uint8_t b = UNPACK(*src, 6, 2);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 3, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 3, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 2, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a4b4g4r4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t b = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t r = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 4, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 4, 8);
+}
+
+static inline void
+unpack_ubyte_r4g4b4a4_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t b = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 4, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 4, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 4, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 4, 8);
+}
+
+static inline void
+unpack_ubyte_r5g5b5a1_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t b = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 5, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 5, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 5, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 1, 8);
+}
+
+static inline void
+unpack_ubyte_a2b10g10r10_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t b = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t r = UNPACK(*src, 22, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 2, 8);
+}
+
+static inline void
+unpack_ubyte_a2r10g10b10_unorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t r = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t b = UNPACK(*src, 22, 10);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 10, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 10, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 10, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 2, 8);
+}
+
+static inline void
+unpack_ubyte_a_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_l_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 16, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_i_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t i = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(i, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(i, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(i, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(i, 8, 8);
+}
+
+static inline void
+unpack_ubyte_i_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t i = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(i, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(i, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(i, 16, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(i, 16, 8);
+}
+
+static inline void
+unpack_ubyte_r_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 16, 8);
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_bgr_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = src[0];
+ uint8_t g = src[1];
+ uint8_t r = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_rgb_unorm8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+ uint8_t b = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_rgba_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+ uint16_t a = src[3];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 16, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_rgbx_unorm16(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(g, 16, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(b, 16, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a8b8g8r8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t a = UNPACK(*src, 0, 8);
+ int8_t b = UNPACK(*src, 8, 8);
+ int8_t g = UNPACK(*src, 16, 8);
+ int8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_x8b8g8r8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t b = UNPACK(*src, 8, 8);
+ int8_t g = UNPACK(*src, 16, 8);
+ int8_t r = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r8g8b8a8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+ int8_t b = UNPACK(*src, 16, 8);
+ int8_t a = UNPACK(*src, 24, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 8, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_r8g8b8x8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+ int8_t b = UNPACK(*src, 16, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r16g16_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int16_t r = UNPACK(*src, 0, 16);
+ int16_t g = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 16, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_g16r16_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ int16_t g = UNPACK(*src, 0, 16);
+ int16_t r = UNPACK(*src, 16, 16);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 16, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r8g8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t r = UNPACK(*src, 0, 8);
+ int8_t g = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_g8r8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t g = UNPACK(*src, 0, 8);
+ int8_t r = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 8, 8);
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l8a8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t l = UNPACK(*src, 0, 8);
+ int8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a8l8_snorm(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ int8_t a = UNPACK(*src, 0, 8);
+ int8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a_snorm8(const void *void_src, GLubyte dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_l_snorm8(const void *void_src, GLubyte dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t l = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(l, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(l, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(l, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(l, 16, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_i_snorm8(const void *void_src, GLubyte dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t i = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(i, 8, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(i, 8, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(i, 8, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(i, 8, 8);
+}
+
+static inline void
+unpack_ubyte_i_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t i = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(i, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(i, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(i, 16, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(i, 16, 8);
+}
+
+static inline void
+unpack_ubyte_r_snorm8(const void *void_src, GLubyte dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 8, 8);
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_la_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+ int16_t a = src[1];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(l, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(l, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(l, 16, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_rgb_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 16, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_rgba_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+ int16_t a = src[3];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 16, 8);
+
+
+ dst[3] = _mesa_snorm_to_unorm(a, 16, 8);
+}
+
+static inline void
+unpack_ubyte_rgbx_snorm16(const void *void_src, GLubyte dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+
+ dst[0] = _mesa_snorm_to_unorm(r, 16, 8);
+
+
+ dst[1] = _mesa_snorm_to_unorm(g, 16, 8);
+
+
+ dst[2] = _mesa_snorm_to_unorm(b, 16, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_a8b8g8r8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_b8g8r8a8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a8r8g8b8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_b8g8r8x8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_x8r8g8b8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_r8g8b8a8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_r8g8b8x8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_x8b8g8r8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_l8a8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t l = UNPACK(*src, 0, 8);
+ uint8_t a = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_a8l8_srgb(const void *void_src, GLubyte dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t l = UNPACK(*src, 8, 8);
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[3] = _mesa_unorm_to_unorm(a, 8, 8);
+}
+
+static inline void
+unpack_ubyte_l_srgb8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+
+
+
+ dst[0] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[1] = _mesa_unorm_to_unorm(l, 8, 8);
+
+
+ dst[2] = _mesa_unorm_to_unorm(l, 8, 8);
+
+ dst[3] = 255;
+}
+
+static inline void
+unpack_ubyte_bgr_srgb8(const void *void_src, GLubyte dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = src[0];
+ uint8_t g = src[1];
+ uint8_t r = src[2];
+
+
+
+
+ dst[0] = util_format_srgb_to_linear_8unorm(r);
+
+
+
+ dst[1] = util_format_srgb_to_linear_8unorm(g);
+
+
+
+ dst[2] = util_format_srgb_to_linear_8unorm(b);
+
+ dst[3] = 255;
+}
+
+/* integer packing functions */
+
+
+static inline void
+unpack_int_a8b8g8r8_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t b = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t r = UNPACK(*src, 24, 8);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a8r8g8b8_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 8);
+ uint8_t r = UNPACK(*src, 8, 8);
+ uint8_t g = UNPACK(*src, 16, 8);
+ uint8_t b = UNPACK(*src, 24, 8);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_r8g8b8a8_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t b = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_b8g8r8a8_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 8);
+ uint8_t g = UNPACK(*src, 8, 8);
+ uint8_t r = UNPACK(*src, 16, 8);
+ uint8_t a = UNPACK(*src, 24, 8);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_b10g10r10a2_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t b = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t r = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_r10g10b10a2_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint16_t r = UNPACK(*src, 0, 10);
+ uint16_t g = UNPACK(*src, 10, 10);
+ uint16_t b = UNPACK(*src, 20, 10);
+ uint8_t a = UNPACK(*src, 30, 2);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a2b10g10r10_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t b = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t r = UNPACK(*src, 22, 10);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a2r10g10b10_uint(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 2);
+ uint16_t r = UNPACK(*src, 2, 10);
+ uint16_t g = UNPACK(*src, 12, 10);
+ uint16_t b = UNPACK(*src, 22, 10);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_b5g6r5_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r5g6b5_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 6);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_b2g3r3_uint(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 2);
+ uint8_t g = UNPACK(*src, 2, 3);
+ uint8_t r = UNPACK(*src, 5, 3);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r3g3b2_uint(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 3);
+ uint8_t g = UNPACK(*src, 3, 3);
+ uint8_t b = UNPACK(*src, 6, 2);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_a4b4g4r4_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t b = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t r = UNPACK(*src, 12, 4);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_r4g4b4a4_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t b = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_b4g4r4a4_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 4);
+ uint8_t g = UNPACK(*src, 4, 4);
+ uint8_t r = UNPACK(*src, 8, 4);
+ uint8_t a = UNPACK(*src, 12, 4);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a4r4g4b4_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 4);
+ uint8_t r = UNPACK(*src, 4, 4);
+ uint8_t g = UNPACK(*src, 8, 4);
+ uint8_t b = UNPACK(*src, 12, 4);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a1b5g5r5_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t b = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t r = UNPACK(*src, 11, 5);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_b5g5r5a1_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t b = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t r = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a1r5g5b5_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t a = UNPACK(*src, 0, 1);
+ uint8_t r = UNPACK(*src, 1, 5);
+ uint8_t g = UNPACK(*src, 6, 5);
+ uint8_t b = UNPACK(*src, 11, 5);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_r5g5b5a1_uint(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint8_t r = UNPACK(*src, 0, 5);
+ uint8_t g = UNPACK(*src, 5, 5);
+ uint8_t b = UNPACK(*src, 10, 5);
+ uint8_t a = UNPACK(*src, 15, 1);
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_a_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t a = src[0];
+
+
+ dst[0] = 0;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_i_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_i_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_i_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_i_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_i_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_i_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t i = src[0];
+
+
+ dst[0] = i;
+
+ dst[1] = i;
+
+ dst[2] = i;
+
+ dst[3] = i;
+}
+
+static inline void
+unpack_int_l_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_l_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_l_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_l_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_l_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_l_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t l = src[0];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_la_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t l = src[0];
+ uint8_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_la_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t l = src[0];
+ uint16_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_la_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t l = src[0];
+ uint32_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_la_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t l = src[0];
+ int8_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_la_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t l = src[0];
+ int16_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_la_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t l = src[0];
+ int32_t a = src[1];
+
+
+ dst[0] = l;
+
+ dst[1] = l;
+
+ dst[2] = l;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_r_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_r_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t r = src[0];
+
+
+ dst[0] = r;
+
+ dst[1] = 0;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t r = src[0];
+ uint32_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+ int8_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rg_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t r = src[0];
+ int32_t g = src[1];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = 0;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+ uint8_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t r = src[0];
+ uint32_t g = src[1];
+ uint32_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+ int8_t g = src[1];
+ int8_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgb_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t r = src[0];
+ int32_t g = src[1];
+ int32_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgba_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+ uint8_t b = src[2];
+ uint8_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgba_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+ uint16_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgba_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t r = src[0];
+ uint32_t g = src[1];
+ uint32_t b = src[2];
+ uint32_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgba_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+ int8_t g = src[1];
+ int8_t b = src[2];
+ int8_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgba_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+ int16_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgba_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t r = src[0];
+ int32_t g = src[1];
+ int32_t b = src[2];
+ int32_t a = src[3];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = a;
+}
+
+static inline void
+unpack_int_rgbx_uint8(const void *void_src, GLuint dst[4])
+{
+ uint8_t *src = (uint8_t *)void_src;
+ uint8_t r = src[0];
+ uint8_t g = src[1];
+ uint8_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgbx_uint16(const void *void_src, GLuint dst[4])
+{
+ uint16_t *src = (uint16_t *)void_src;
+ uint16_t r = src[0];
+ uint16_t g = src[1];
+ uint16_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgbx_uint32(const void *void_src, GLuint dst[4])
+{
+ uint32_t *src = (uint32_t *)void_src;
+ uint32_t r = src[0];
+ uint32_t g = src[1];
+ uint32_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgbx_sint8(const void *void_src, GLuint dst[4])
+{
+ int8_t *src = (int8_t *)void_src;
+ int8_t r = src[0];
+ int8_t g = src[1];
+ int8_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgbx_sint16(const void *void_src, GLuint dst[4])
+{
+ int16_t *src = (int16_t *)void_src;
+ int16_t r = src[0];
+ int16_t g = src[1];
+ int16_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+static inline void
+unpack_int_rgbx_sint32(const void *void_src, GLuint dst[4])
+{
+ int32_t *src = (int32_t *)void_src;
+ int32_t r = src[0];
+ int32_t g = src[1];
+ int32_t b = src[2];
+
+
+ dst[0] = r;
+
+ dst[1] = g;
+
+ dst[2] = b;
+
+ dst[3] = 1;
+}
+
+
+void
+_mesa_unpack_rgba_row(mesa_format format, GLuint n,
+ const void *src, GLfloat dst[][4])
+{
+ GLubyte *s = (GLubyte *)src;
+ GLuint i;
+
+ switch (format) {
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8b8g8r8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x8b8g8r8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8a8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8x8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b8g8r8a8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b8g8r8x8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8r8g8b8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x8r8g8b8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_L16A16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l16a16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A16L16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a16l16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B5G6R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b5g6r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R5G6B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r5g6b5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b4g4r4a4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b4g4r4x4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a4r4g4b4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a1b5g5r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x1b5g5r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b5g5r5a1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b5g5r5x1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a1r5g5b5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l8a8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A8L8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8l8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R8G8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_g8r8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l4a4_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_B2G3R3_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b2g3r3_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_R16G16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r16g16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_G16R16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_g16r16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b10g10r10a2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b10g10r10x2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r10g10b10a2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r10g10b10x2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R3G3B2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r3g3b2_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a4b4g4r4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r4g4b4a4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r5g5b5a1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a2b10g10r10_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a2r10g10b10_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_A_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_L_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_I_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_I_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_R_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_BGR_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_bgr_unorm8(s, dst[i]);
+ s += 3;
+ }
+ break;
+ case MESA_FORMAT_RGB_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgb_unorm8(s, dst[i]);
+ s += 3;
+ }
+ break;
+ case MESA_FORMAT_RGBA_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgba_unorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_RGBX_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgbx_unorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8b8g8r8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x8b8g8r8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8a8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8x8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R16G16_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r16g16_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_G16R16_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_g16r16_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_g8r8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l8a8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A8L8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8l8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_A_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_L_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_I_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_I_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_R_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_LA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_la_snorm16(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_RGB_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgb_snorm16(s, dst[i]);
+ s += 6;
+ }
+ break;
+ case MESA_FORMAT_RGBA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgba_snorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_RGBX_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgbx_snorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8b8g8r8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b8g8r8a8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8r8g8b8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_b8g8r8x8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x8r8g8b8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8a8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r8g8b8x8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_x8b8g8r8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_L8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l8a8_srgb(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A8L8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a8l8_srgb(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L_SRGB8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_srgb8(s, dst[i]);
+ s += 1;
+ }
+ break;
+ case MESA_FORMAT_BGR_SRGB8:
+ for (i = 0; i < n; ++i) {
+ unpack_float_bgr_srgb8(s, dst[i]);
+ s += 3;
+ }
+ break;
+ case MESA_FORMAT_R9G9B9E5_FLOAT:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r9g9b9e5_float(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r11g11b10_float(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_A_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_float16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_A_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_a_float32(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_L_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_float16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_L_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_l_float32(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_LA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_la_float16(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_LA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_la_float32(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_I_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_float16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_I_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_i_float32(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_R_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_float16(s, dst[i]);
+ s += 2;
+ }
+ break;
+ case MESA_FORMAT_R_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_r_float32(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_RG_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rg_float16(s, dst[i]);
+ s += 4;
+ }
+ break;
+ case MESA_FORMAT_RG_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rg_float32(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_RGB_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgb_float16(s, dst[i]);
+ s += 6;
+ }
+ break;
+ case MESA_FORMAT_RGB_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgb_float32(s, dst[i]);
+ s += 12;
+ }
+ break;
+ case MESA_FORMAT_RGBA_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgba_float16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_RGBA_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgba_float32(s, dst[i]);
+ s += 16;
+ }
+ break;
+ case MESA_FORMAT_RGBX_FLOAT16:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgbx_float16(s, dst[i]);
+ s += 8;
+ }
+ break;
+ case MESA_FORMAT_RGBX_FLOAT32:
+ for (i = 0; i < n; ++i) {
+ unpack_float_rgbx_float32(s, dst[i]);
+ s += 16;
+ }
+ break;
+ case MESA_FORMAT_YCBCR:
+ unpack_float_ycbcr(src, dst, n);
+ break;
+ case MESA_FORMAT_YCBCR_REV:
+ unpack_float_ycbcr_rev(src, dst, n);
+ break;
+ default:
+ _mesa_problem(NULL, "%s: bad format %s", __func__,
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+void
+_mesa_unpack_ubyte_rgba_row(mesa_format format, GLuint n,
+ const void *src, GLubyte dst[][4])
+{
+ GLubyte *s = (GLubyte *)src;
+ GLuint i;
+
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8b8g8r8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x8b8g8r8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8a8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8x8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b8g8r8a8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b8g8r8x8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8r8g8b8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x8r8g8b8_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L16A16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l16a16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A16L16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a16l16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b5g6r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r5g6b5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b4g4r4a4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4X4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b4g4r4x4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a4r4g4b4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a1b5g5r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_X1B5G5R5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x1b5g5r5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b5g5r5a1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5X1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b5g5r5x1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a1r5g5b5_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l8a8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8l8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_g8r8_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l4a4_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b2g3r3_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r16g16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_g16r16_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b10g10r10a2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b10g10r10x2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r10g10b10a2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10X2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r10g10b10x2_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r3g3b2_unorm(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a4b4g4r4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r4g4b4a4_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r5g5b5a1_unorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a2b10g10r10_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a2r10g10b10_unorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_i_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_i_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r_unorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r_unorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_bgr_unorm8(s, dst[i]);
+ s += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgb_unorm8(s, dst[i]);
+ s += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgba_unorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgbx_unorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8b8g8r8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x8b8g8r8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8a8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8x8_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R16G16_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r16g16_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_G16R16_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_g16r16_snorm(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_G8R8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_g8r8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l8a8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SNORM:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8l8_snorm(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_i_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_i_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r_snorm8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r_snorm16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_la_snorm16(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgb_snorm16(s, dst[i]);
+ s += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgba_snorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SNORM16:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_rgbx_snorm16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_A8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8b8g8r8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b8g8r8a8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8r8g8b8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_b8g8r8x8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8R8G8B8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x8r8g8b8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8a8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8X8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_r8g8b8x8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_X8B8G8R8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_x8b8g8r8_srgb(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L8A8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l8a8_srgb(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A8L8_SRGB:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_a8l8_srgb(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SRGB8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_l_srgb8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_BGR_SRGB8:
+ for (i = 0; i < n; ++i) {
+ unpack_ubyte_bgr_srgb8(s, dst[i]);
+ s += 3;
+ }
+ break;
+ default:
+ /* get float values, convert to ubyte */
+ {
+ GLfloat *tmp = malloc(n * 4 * sizeof(GLfloat));
+ if (tmp) {
+ GLuint i;
+ _mesa_unpack_rgba_row(format, n, src, (GLfloat (*)[4]) tmp);
+ for (i = 0; i < n; i++) {
+ dst[i][0] = _mesa_float_to_unorm(tmp[i*4+0], 8);
+ dst[i][1] = _mesa_float_to_unorm(tmp[i*4+1], 8);
+ dst[i][2] = _mesa_float_to_unorm(tmp[i*4+2], 8);
+ dst[i][3] = _mesa_float_to_unorm(tmp[i*4+3], 8);
+ }
+ free(tmp);
+ }
+ }
+ break;
+ }
+}
+
+void
+_mesa_unpack_uint_rgba_row(mesa_format format, GLuint n,
+ const void *src, GLuint dst[][4])
+{
+ GLubyte *s = (GLubyte *)src;
+ GLuint i;
+
+ switch (format) {
+
+ case MESA_FORMAT_A8B8G8R8_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a8b8g8r8_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A8R8G8B8_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a8r8g8b8_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R8G8B8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r8g8b8a8_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B8G8R8A8_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b8g8r8a8_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B10G10R10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b10g10r10a2_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R10G10B10A2_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r10g10b10a2_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2B10G10R10_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a2b10g10r10_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A2R10G10B10_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a2r10g10b10_uint(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_B5G6R5_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b5g6r5_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G6B5_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r5g6b5_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B2G3R3_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b2g3r3_uint(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R3G3B2_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r3g3b2_uint(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A4B4G4R4_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a4b4g4r4_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R4G4B4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r4g4b4a4_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B4G4R4A4_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b4g4r4a4_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A4R4G4B4_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a4r4g4b4_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1B5G5R5_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a1b5g5r5_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_B5G5R5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_b5g5r5a1_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A1R5G5B5_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a1r5g5b5_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R5G5B5A1_UINT:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r5g5b5a1_uint(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_uint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_uint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_uint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_sint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_sint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_A_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_a_sint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_uint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_uint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_uint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_sint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_sint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_I_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_i_sint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_uint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_uint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_uint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_sint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_sint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_L_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_l_sint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_uint8(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_uint16(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_uint32(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_sint8(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_sint16(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_LA_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_la_sint32(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_uint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_uint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_uint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_sint8(s, dst[i]);
+ s += 1;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_sint16(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_R_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_r_sint32(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_uint8(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_uint16(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_uint32(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_sint8(s, dst[i]);
+ s += 2;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_sint16(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RG_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rg_sint32(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_uint8(s, dst[i]);
+ s += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_uint16(s, dst[i]);
+ s += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_uint32(s, dst[i]);
+ s += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_sint8(s, dst[i]);
+ s += 3;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_sint16(s, dst[i]);
+ s += 6;
+ }
+ break;
+
+ case MESA_FORMAT_RGB_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgb_sint32(s, dst[i]);
+ s += 12;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_uint8(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_uint16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_uint32(s, dst[i]);
+ s += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_sint8(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_sint16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBA_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgba_sint32(s, dst[i]);
+ s += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_uint8(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_uint16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_UINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_uint32(s, dst[i]);
+ s += 16;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT8:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_sint8(s, dst[i]);
+ s += 4;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT16:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_sint16(s, dst[i]);
+ s += 8;
+ }
+ break;
+
+ case MESA_FORMAT_RGBX_SINT32:
+ for (i = 0; i < n; ++i) {
+ unpack_int_rgbx_sint32(s, dst[i]);
+ s += 16;
+ }
+ break;
+ default:
+ _mesa_problem(NULL, "%s: bad format %s", __func__,
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+/**
+ * Unpack a 2D rect of pixels returning float RGBA colors.
+ * \param format the source image format
+ * \param src start address of the source image
+ * \param srcRowStride source image row stride in bytes
+ * \param dst start address of the dest image
+ * \param dstRowStride dest image row stride in bytes
+ * \param x source image start X pos
+ * \param y source image start Y pos
+ * \param width width of rect region to convert
+ * \param height height of rect region to convert
+ */
+void
+_mesa_unpack_rgba_block(mesa_format format,
+ const void *src, GLint srcRowStride,
+ GLfloat dst[][4], GLint dstRowStride,
+ GLuint x, GLuint y, GLuint width, GLuint height)
+{
+ const GLuint srcPixStride = _mesa_get_format_bytes(format);
+ const GLuint dstPixStride = 4 * sizeof(GLfloat);
+ const GLubyte *srcRow;
+ GLubyte *dstRow;
+ GLuint i;
+
+ /* XXX needs to be fixed for compressed formats */
+
+ srcRow = ((const GLubyte *) src) + srcRowStride * y + srcPixStride * x;
+ dstRow = ((GLubyte *) dst) + dstRowStride * y + dstPixStride * x;
+
+ for (i = 0; i < height; i++) {
+ _mesa_unpack_rgba_row(format, width, srcRow, (GLfloat (*)[4]) dstRow);
+
+ dstRow += dstRowStride;
+ srcRow += srcRowStride;
+ }
+}
+
+/** Helper struct for MESA_FORMAT_Z32_FLOAT_S8X24_UINT */
+struct z32f_x24s8
+{
+ float z;
+ uint32_t x24s8;
+};
+
+typedef void (*unpack_float_z_func)(GLuint n, const void *src, GLfloat *dst);
+
+static void
+unpack_float_z_X8_UINT_Z24_UNORM(GLuint n, const void *src, GLfloat *dst)
+{
+ /* only return Z, not stencil data */
+ const GLuint *s = ((const GLuint *) src);
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = (GLfloat) ((s[i] >> 8) * scale);
+ assert(dst[i] >= 0.0F);
+ assert(dst[i] <= 1.0F);
+ }
+}
+
+static void
+unpack_float_z_Z24_UNORM_X8_UINT(GLuint n, const void *src, GLfloat *dst)
+{
+ /* only return Z, not stencil data */
+ const GLuint *s = ((const GLuint *) src);
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = (GLfloat) ((s[i] & 0x00ffffff) * scale);
+ assert(dst[i] >= 0.0F);
+ assert(dst[i] <= 1.0F);
+ }
+}
+
+static void
+unpack_float_Z_UNORM16(GLuint n, const void *src, GLfloat *dst)
+{
+ const GLushort *s = ((const GLushort *) src);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = s[i] * (1.0F / 65535.0F);
+ }
+}
+
+static void
+unpack_float_Z_UNORM32(GLuint n, const void *src, GLfloat *dst)
+{
+ const GLuint *s = ((const GLuint *) src);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = s[i] * (1.0F / 0xffffffff);
+ }
+}
+
+static void
+unpack_float_Z_FLOAT32(GLuint n, const void *src, GLfloat *dst)
+{
+ memcpy(dst, src, n * sizeof(float));
+}
+
+static void
+unpack_float_z_Z32X24S8(GLuint n, const void *src, GLfloat *dst)
+{
+ const struct z32f_x24s8 *s = (const struct z32f_x24s8 *) src;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = s[i].z;
+ }
+}
+
+
+
+/**
+ * Unpack Z values.
+ * The returned values will always be in the range [0.0, 1.0].
+ */
+void
+_mesa_unpack_float_z_row(mesa_format format, GLuint n,
+ const void *src, GLfloat *dst)
+{
+ unpack_float_z_func unpack;
+
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ unpack = unpack_float_z_X8_UINT_Z24_UNORM;
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ unpack = unpack_float_z_Z24_UNORM_X8_UINT;
+ break;
+ case MESA_FORMAT_Z_UNORM16:
+ unpack = unpack_float_Z_UNORM16;
+ break;
+ case MESA_FORMAT_Z_UNORM32:
+ unpack = unpack_float_Z_UNORM32;
+ break;
+ case MESA_FORMAT_Z_FLOAT32:
+ unpack = unpack_float_Z_FLOAT32;
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ unpack = unpack_float_z_Z32X24S8;
+ break;
+ default:
+ _mesa_problem(NULL, "bad format %s in _mesa_unpack_float_z_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+
+ unpack(n, src, dst);
+}
+
+
+
+typedef void (*unpack_uint_z_func)(const void *src, GLuint *dst, GLuint n);
+
+static void
+unpack_uint_z_X8_UINT_Z24_UNORM(const void *src, GLuint *dst, GLuint n)
+{
+ /* only return Z, not stencil data */
+ const GLuint *s = ((const GLuint *) src);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = (s[i] & 0xffffff00) | (s[i] >> 24);
+ }
+}
+
+static void
+unpack_uint_z_Z24_UNORM_X8_UINT(const void *src, GLuint *dst, GLuint n)
+{
+ /* only return Z, not stencil data */
+ const GLuint *s = ((const GLuint *) src);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = (s[i] << 8) | ((s[i] >> 16) & 0xff);
+ }
+}
+
+static void
+unpack_uint_Z_UNORM16(const void *src, GLuint *dst, GLuint n)
+{
+ const GLushort *s = ((const GLushort *)src);
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = (s[i] << 16) | s[i];
+ }
+}
+
+static void
+unpack_uint_Z_UNORM32(const void *src, GLuint *dst, GLuint n)
+{
+ memcpy(dst, src, n * sizeof(GLuint));
+}
+
+static void
+unpack_uint_Z_FLOAT32(const void *src, GLuint *dst, GLuint n)
+{
+ const float *s = (const float *)src;
+ GLuint i;
+ for (i = 0; i < n; i++) {
+ dst[i] = FLOAT_TO_UINT(CLAMP(s[i], 0.0F, 1.0F));
+ }
+}
+
+static void
+unpack_uint_Z_FLOAT32_X24S8(const void *src, GLuint *dst, GLuint n)
+{
+ const struct z32f_x24s8 *s = (const struct z32f_x24s8 *) src;
+ GLuint i;
+
+ for (i = 0; i < n; i++) {
+ dst[i] = FLOAT_TO_UINT(CLAMP(s[i].z, 0.0F, 1.0F));
+ }
+}
+
+
+/**
+ * Unpack Z values.
+ * The returned values will always be in the range [0, 0xffffffff].
+ */
+void
+_mesa_unpack_uint_z_row(mesa_format format, GLuint n,
+ const void *src, GLuint *dst)
+{
+ unpack_uint_z_func unpack;
+ const GLubyte *srcPtr = (GLubyte *) src;
+
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ case MESA_FORMAT_X8_UINT_Z24_UNORM:
+ unpack = unpack_uint_z_X8_UINT_Z24_UNORM;
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ case MESA_FORMAT_Z24_UNORM_X8_UINT:
+ unpack = unpack_uint_z_Z24_UNORM_X8_UINT;
+ break;
+ case MESA_FORMAT_Z_UNORM16:
+ unpack = unpack_uint_Z_UNORM16;
+ break;
+ case MESA_FORMAT_Z_UNORM32:
+ unpack = unpack_uint_Z_UNORM32;
+ break;
+ case MESA_FORMAT_Z_FLOAT32:
+ unpack = unpack_uint_Z_FLOAT32;
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ unpack = unpack_uint_Z_FLOAT32_X24S8;
+ break;
+ default:
+ _mesa_problem(NULL, "bad format %s in _mesa_unpack_uint_z_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+
+ unpack(srcPtr, dst, n);
+}
+
+
+static void
+unpack_ubyte_s_S_UINT8(const void *src, GLubyte *dst, GLuint n)
+{
+ memcpy(dst, src, n);
+}
+
+static void
+unpack_ubyte_s_S8_UINT_Z24_UNORM(const void *src, GLubyte *dst, GLuint n)
+{
+ GLuint i;
+ const GLuint *src32 = src;
+
+ for (i = 0; i < n; i++)
+ dst[i] = src32[i] & 0xff;
+}
+
+static void
+unpack_ubyte_s_Z24_UNORM_S8_UINT(const void *src, GLubyte *dst, GLuint n)
+{
+ GLuint i;
+ const GLuint *src32 = src;
+
+ for (i = 0; i < n; i++)
+ dst[i] = src32[i] >> 24;
+}
+
+static void
+unpack_ubyte_s_Z32_FLOAT_S8X24_UINT(const void *src, GLubyte *dst, GLuint n)
+{
+ GLuint i;
+ const struct z32f_x24s8 *s = (const struct z32f_x24s8 *) src;
+
+ for (i = 0; i < n; i++)
+ dst[i] = s[i].x24s8 & 0xff;
+}
+
+void
+_mesa_unpack_ubyte_stencil_row(mesa_format format, GLuint n,
+ const void *src, GLubyte *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S_UINT8:
+ unpack_ubyte_s_S_UINT8(src, dst, n);
+ break;
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ unpack_ubyte_s_S8_UINT_Z24_UNORM(src, dst, n);
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ unpack_ubyte_s_Z24_UNORM_S8_UINT(src, dst, n);
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ unpack_ubyte_s_Z32_FLOAT_S8X24_UINT(src, dst, n);
+ break;
+ default:
+ _mesa_problem(NULL, "bad format %s in _mesa_unpack_ubyte_s_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+static void
+unpack_uint_24_8_depth_stencil_Z24_UNORM_S8_UINT(const GLuint *src, GLuint *dst, GLuint n)
+{
+ GLuint i;
+
+ for (i = 0; i < n; i++) {
+ GLuint val = src[i];
+ dst[i] = val >> 24 | val << 8;
+ }
+}
+
+static void
+unpack_uint_24_8_depth_stencil_Z32_S8X24(const GLuint *src,
+ GLuint *dst, GLuint n)
+{
+ GLuint i;
+
+ for (i = 0; i < n; i++) {
+ /* 8 bytes per pixel (float + uint32) */
+ GLfloat zf = ((GLfloat *) src)[i * 2 + 0];
+ GLuint z24 = (GLuint) (zf * (GLfloat) 0xffffff);
+ GLuint s = src[i * 2 + 1] & 0xff;
+ dst[i] = (z24 << 8) | s;
+ }
+}
+
+static void
+unpack_uint_24_8_depth_stencil_S8_UINT_Z24_UNORM(const GLuint *src, GLuint *dst, GLuint n)
+{
+ memcpy(dst, src, n * 4);
+}
+
+/**
+ * Unpack depth/stencil returning as GL_UNSIGNED_INT_24_8.
+ * \param format the source data format
+ */
+void
+_mesa_unpack_uint_24_8_depth_stencil_row(mesa_format format, GLuint n,
+ const void *src, GLuint *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ unpack_uint_24_8_depth_stencil_S8_UINT_Z24_UNORM(src, dst, n);
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ unpack_uint_24_8_depth_stencil_Z24_UNORM_S8_UINT(src, dst, n);
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ unpack_uint_24_8_depth_stencil_Z32_S8X24(src, dst, n);
+ break;
+ default:
+ _mesa_problem(NULL,
+ "bad format %s in _mesa_unpack_uint_24_8_depth_stencil_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+static void
+unpack_float_32_uint_24_8_Z24_UNORM_S8_UINT(const GLuint *src,
+ GLuint *dst, GLuint n)
+{
+ GLuint i;
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
+
+ for (i = 0; i < n; i++) {
+ const GLuint z24 = src[i] & 0xffffff;
+ d[i].z = z24 * scale;
+ d[i].x24s8 = src[i] >> 24;
+ assert(d[i].z >= 0.0f);
+ assert(d[i].z <= 1.0f);
+ }
+}
+
+static void
+unpack_float_32_uint_24_8_Z32_FLOAT_S8X24_UINT(const GLuint *src,
+ GLuint *dst, GLuint n)
+{
+ memcpy(dst, src, n * sizeof(struct z32f_x24s8));
+}
+
+static void
+unpack_float_32_uint_24_8_S8_UINT_Z24_UNORM(const GLuint *src,
+ GLuint *dst, GLuint n)
+{
+ GLuint i;
+ struct z32f_x24s8 *d = (struct z32f_x24s8 *) dst;
+ const GLdouble scale = 1.0 / (GLdouble) 0xffffff;
+
+ for (i = 0; i < n; i++) {
+ const GLuint z24 = src[i] >> 8;
+ d[i].z = z24 * scale;
+ d[i].x24s8 = src[i] & 0xff;
+ assert(d[i].z >= 0.0f);
+ assert(d[i].z <= 1.0f);
+ }
+}
+
+/**
+ * Unpack depth/stencil returning as GL_FLOAT_32_UNSIGNED_INT_24_8_REV.
+ * \param format the source data format
+ *
+ * In GL_FLOAT_32_UNSIGNED_INT_24_8_REV lower 4 bytes contain float
+ * component and higher 4 bytes contain packed 24-bit and 8-bit
+ * components.
+ *
+ * 31 30 29 28 ... 4 3 2 1 0 31 30 29 ... 9 8 7 6 5 ... 2 1 0
+ * +-------------------------+ +--------------------------------+
+ * | Float Component | | Unused | 8 bit stencil |
+ * +-------------------------+ +--------------------------------+
+ * lower 4 bytes higher 4 bytes
+ */
+void
+_mesa_unpack_float_32_uint_24_8_depth_stencil_row(mesa_format format, GLuint n,
+ const void *src, GLuint *dst)
+{
+ switch (format) {
+ case MESA_FORMAT_S8_UINT_Z24_UNORM:
+ unpack_float_32_uint_24_8_S8_UINT_Z24_UNORM(src, dst, n);
+ break;
+ case MESA_FORMAT_Z24_UNORM_S8_UINT:
+ unpack_float_32_uint_24_8_Z24_UNORM_S8_UINT(src, dst, n);
+ break;
+ case MESA_FORMAT_Z32_FLOAT_S8X24_UINT:
+ unpack_float_32_uint_24_8_Z32_FLOAT_S8X24_UINT(src, dst, n);
+ break;
+ default:
+ _mesa_problem(NULL,
+ "bad format %s in _mesa_unpack_uint_24_8_depth_stencil_row",
+ _mesa_get_format_name(format));
+ return;
+ }
+}
+
+/**
+ * Unpack depth/stencil
+ * \param format the source data format
+ * \param type the destination data type
+ */
+void
+_mesa_unpack_depth_stencil_row(mesa_format format, GLuint n,
+ const void *src, GLenum type,
+ GLuint *dst)
+{
+ assert(type == GL_UNSIGNED_INT_24_8 ||
+ type == GL_FLOAT_32_UNSIGNED_INT_24_8_REV);
+
+ switch (type) {
+ case GL_UNSIGNED_INT_24_8:
+ _mesa_unpack_uint_24_8_depth_stencil_row(format, n, src, dst);
+ break;
+ case GL_FLOAT_32_UNSIGNED_INT_24_8_REV:
+ _mesa_unpack_float_32_uint_24_8_depth_stencil_row(format, n, src, dst);
+ break;
+ default:
+ _mesa_problem(NULL,
+ "bad type 0x%x in _mesa_unpack_depth_stencil_row",
+ type);
+ return;
+ }
+}
+
diff --git a/prebuilt-intermediates/main/get_hash.h b/prebuilt-intermediates/main/get_hash.h
new file mode 100644
index 0000000..bf22211
--- /dev/null
+++ b/prebuilt-intermediates/main/get_hash.h
@@ -0,0 +1,2457 @@
+typedef const unsigned short table_t[1024];
+
+static const int prime_factor = 89, prime_step = 281;
+
+static const struct value_desc values[] = {
+ { 0, },
+ { GL_ALPHA_BITS, BUFFER_INT(Visual.alphaBits), extra_new_buffers },
+ { GL_BLEND, CONTEXT_BIT0(Color.BlendEnabled), NO_EXTRA },
+ { GL_BLEND_SRC, CONTEXT_ENUM(Color.Blend[0].SrcRGB), NO_EXTRA },
+ { GL_BLUE_BITS, BUFFER_INT(Visual.blueBits), extra_new_buffers },
+ { GL_COLOR_CLEAR_VALUE, LOC_CUSTOM, TYPE_FLOATN_4, 0, extra_new_frag_clamp },
+ { GL_COLOR_WRITEMASK, LOC_CUSTOM, TYPE_INT_4, 0, NO_EXTRA },
+ { GL_CULL_FACE, CONTEXT_BOOL(Polygon.CullFlag), NO_EXTRA },
+ { GL_CULL_FACE_MODE, CONTEXT_ENUM(Polygon.CullFaceMode), NO_EXTRA },
+ { GL_DEPTH_BITS, BUFFER_INT(Visual.depthBits), extra_new_buffers },
+ { GL_DEPTH_CLEAR_VALUE, CONTEXT_FIELD(Depth.Clear, TYPE_DOUBLEN), NO_EXTRA },
+ { GL_DEPTH_FUNC, CONTEXT_ENUM(Depth.Func), NO_EXTRA },
+ { GL_DEPTH_RANGE, LOC_CUSTOM, TYPE_DOUBLEN_2, 0, NO_EXTRA },
+ { GL_DEPTH_TEST, CONTEXT_BOOL(Depth.Test), NO_EXTRA },
+ { GL_DEPTH_WRITEMASK, CONTEXT_BOOL(Depth.Mask), NO_EXTRA },
+ { GL_DITHER, CONTEXT_BOOL(Color.DitherFlag), NO_EXTRA },
+ { GL_FRONT_FACE, CONTEXT_ENUM(Polygon.FrontFace), NO_EXTRA },
+ { GL_GREEN_BITS, BUFFER_INT(Visual.greenBits), extra_new_buffers },
+ { GL_LINE_WIDTH, CONTEXT_FLOAT(Line.Width), NO_EXTRA },
+ { GL_ALIASED_LINE_WIDTH_RANGE, CONTEXT_FLOAT2(Const.MinLineWidth), NO_EXTRA },
+ { GL_MAX_ELEMENTS_VERTICES, CONTEXT_INT(Const.MaxArrayLockSize), NO_EXTRA },
+ { GL_MAX_ELEMENTS_INDICES, CONTEXT_INT(Const.MaxArrayLockSize), NO_EXTRA },
+ { GL_MAX_TEXTURE_SIZE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_context, Const.MaxTextureLevels), NO_EXTRA },
+ { GL_MAX_VIEWPORT_DIMS, CONTEXT_INT2(Const.MaxViewportWidth), NO_EXTRA },
+ { GL_PACK_ALIGNMENT, CONTEXT_INT(Pack.Alignment), NO_EXTRA },
+ { GL_ALIASED_POINT_SIZE_RANGE, CONTEXT_FLOAT2(Const.MinPointSize), NO_EXTRA },
+ { GL_POLYGON_OFFSET_FACTOR, CONTEXT_FLOAT(Polygon.OffsetFactor ), NO_EXTRA },
+ { GL_POLYGON_OFFSET_UNITS, CONTEXT_FLOAT(Polygon.OffsetUnits ), NO_EXTRA },
+ { GL_POLYGON_OFFSET_FILL, CONTEXT_BOOL(Polygon.OffsetFill), NO_EXTRA },
+ { GL_RED_BITS, BUFFER_INT(Visual.redBits), extra_new_buffers },
+ { GL_SCISSOR_BOX, LOC_CUSTOM, TYPE_INT_4, 0, NO_EXTRA },
+ { GL_SCISSOR_TEST, LOC_CUSTOM, TYPE_BOOLEAN, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_BITS, BUFFER_INT(Visual.stencilBits), extra_new_buffers },
+ { GL_STENCIL_CLEAR_VALUE, CONTEXT_INT(Stencil.Clear), NO_EXTRA },
+ { GL_STENCIL_FAIL, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_FUNC, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_PASS_DEPTH_FAIL, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_PASS_DEPTH_PASS, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_REF, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_TEST, CONTEXT_BOOL(Stencil.Enabled), NO_EXTRA },
+ { GL_STENCIL_VALUE_MASK, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_WRITEMASK, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA },
+ { GL_SUBPIXEL_BITS, CONTEXT_INT(Const.SubPixelBits), NO_EXTRA },
+ { GL_TEXTURE_BINDING_2D, LOC_CUSTOM, TYPE_INT, TEXTURE_2D_INDEX, NO_EXTRA },
+ { GL_UNPACK_ALIGNMENT, CONTEXT_INT(Unpack.Alignment), NO_EXTRA },
+ { GL_VIEWPORT, LOC_CUSTOM, TYPE_FLOAT_4, 0, NO_EXTRA },
+ { GL_ACTIVE_TEXTURE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_TEXTURE_BINDING_CUBE_MAP_ARB, LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_INDEX, extra_ARB_texture_cube_map },
+ { GL_MAX_CUBE_MAP_TEXTURE_SIZE_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_context, Const.MaxCubeTextureLevels), extra_ARB_texture_cube_map },
+ { GL_BLEND_SRC_RGB, CONTEXT_ENUM(Color.Blend[0].SrcRGB), NO_EXTRA },
+ { GL_BLEND_DST_RGB, CONTEXT_ENUM(Color.Blend[0].DstRGB), NO_EXTRA },
+ { GL_BLEND_SRC_ALPHA, CONTEXT_ENUM(Color.Blend[0].SrcA), NO_EXTRA },
+ { GL_BLEND_DST_ALPHA, CONTEXT_ENUM(Color.Blend[0].DstA), NO_EXTRA },
+ { GL_BLEND_EQUATION, CONTEXT_ENUM(Color.Blend[0].EquationRGB), NO_EXTRA },
+ { GL_BLEND_EQUATION_ALPHA_EXT, CONTEXT_ENUM(Color.Blend[0].EquationA), NO_EXTRA },
+ { GL_NUM_COMPRESSED_TEXTURE_FORMATS_ARB, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_COMPRESSED_TEXTURE_FORMATS, LOC_CUSTOM, TYPE_INT_N, 0, NO_EXTRA },
+ { GL_SAMPLE_ALPHA_TO_COVERAGE_ARB, CONTEXT_BOOL(Multisample.SampleAlphaToCoverage), NO_EXTRA },
+ { GL_SAMPLE_COVERAGE_ARB, CONTEXT_BOOL(Multisample.SampleCoverage), NO_EXTRA },
+ { GL_SAMPLE_COVERAGE_VALUE_ARB, CONTEXT_FLOAT(Multisample.SampleCoverageValue), NO_EXTRA },
+ { GL_SAMPLE_COVERAGE_INVERT_ARB, CONTEXT_BOOL(Multisample.SampleCoverageInvert), NO_EXTRA },
+ { GL_SAMPLE_BUFFERS_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_new_buffers },
+ { GL_SAMPLES_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_new_buffers },
+ { GL_SAMPLE_SHADING_ARB, CONTEXT_BOOL(Multisample.SampleShading), extra_gl40_ARB_sample_shading },
+ { GL_MIN_SAMPLE_SHADING_VALUE_ARB, CONTEXT_FLOAT(Multisample.MinSampleShadingValue), extra_gl40_ARB_sample_shading },
+ { GL_GENERATE_MIPMAP_HINT_SGIS, CONTEXT_ENUM(Hint.GenerateMipmap), NO_EXTRA },
+ { GL_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_ELEMENT_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_CLAMP_VERTEX_COLOR, CONTEXT_ENUM(Light.ClampVertexColor), extra_ARB_color_buffer_float },
+ { GL_CLAMP_FRAGMENT_COLOR, CONTEXT_ENUM(Color.ClampFragmentColor), extra_ARB_color_buffer_float },
+ { GL_CLAMP_READ_COLOR, CONTEXT_ENUM(Color.ClampReadColor), extra_ARB_color_buffer_float_or_glcore },
+ { GL_COPY_READ_BUFFER, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_COPY_WRITE_BUFFER, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_IMPLEMENTATION_COLOR_READ_TYPE_OES, LOC_CUSTOM, TYPE_INT, 0, extra_new_buffers },
+ { GL_IMPLEMENTATION_COLOR_READ_FORMAT_OES, LOC_CUSTOM, TYPE_INT, 0, extra_new_buffers },
+ { GL_FRAMEBUFFER_BINDING_EXT, BUFFER_INT(Name), NO_EXTRA },
+ { GL_RENDERBUFFER_BINDING_EXT, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_MAX_RENDERBUFFER_SIZE_EXT, CONTEXT_INT(Const.MaxRenderbufferSize), NO_EXTRA },
+ { GL_MAX_CLIP_PLANES, CONTEXT_INT(Const.MaxClipPlanes), NO_EXTRA },
+ { GL_VERTEX_ARRAY_BINDING, ARRAY_INT(Name), NO_EXTRA },
+ { GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT, CONTEXT_FLOAT(Const.MaxTextureMaxAnisotropy), extra_EXT_texture_filter_anisotropic },
+ { GL_DEBUG_OUTPUT, LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA },
+ { GL_DEBUG_OUTPUT_SYNCHRONOUS, LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA },
+ { GL_DEBUG_LOGGED_MESSAGES, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_DEBUG_NEXT_LOGGED_MESSAGE_LENGTH, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_MAX_DEBUG_LOGGED_MESSAGES, CONST(MAX_DEBUG_LOGGED_MESSAGES), NO_EXTRA },
+ { GL_MAX_DEBUG_MESSAGE_LENGTH, CONST(MAX_DEBUG_MESSAGE_LENGTH), NO_EXTRA },
+ { GL_MAX_LABEL_LENGTH, CONST(MAX_LABEL_LENGTH), NO_EXTRA },
+ { GL_MAX_DEBUG_GROUP_STACK_DEPTH, CONST(MAX_DEBUG_GROUP_STACK_DEPTH), NO_EXTRA },
+ { GL_DEBUG_GROUP_STACK_DEPTH, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_POLYGON_OFFSET_CLAMP_EXT, CONTEXT_FLOAT(Polygon.OffsetClamp), extra_ARB_polygon_offset_clamp },
+ { GL_MAX_LIGHTS, CONTEXT_INT(Const.MaxLights), NO_EXTRA },
+ { GL_LIGHT0, CONTEXT_BOOL(Light.Light[0].Enabled), NO_EXTRA },
+ { GL_LIGHT1, CONTEXT_BOOL(Light.Light[1].Enabled), NO_EXTRA },
+ { GL_LIGHT2, CONTEXT_BOOL(Light.Light[2].Enabled), NO_EXTRA },
+ { GL_LIGHT3, CONTEXT_BOOL(Light.Light[3].Enabled), NO_EXTRA },
+ { GL_LIGHT4, CONTEXT_BOOL(Light.Light[4].Enabled), NO_EXTRA },
+ { GL_LIGHT5, CONTEXT_BOOL(Light.Light[5].Enabled), NO_EXTRA },
+ { GL_LIGHT6, CONTEXT_BOOL(Light.Light[6].Enabled), NO_EXTRA },
+ { GL_LIGHT7, CONTEXT_BOOL(Light.Light[7].Enabled), NO_EXTRA },
+ { GL_LIGHTING, CONTEXT_BOOL(Light.Enabled), NO_EXTRA },
+ { GL_LIGHT_MODEL_AMBIENT, CONTEXT_FIELD(Light.Model.Ambient[0], TYPE_FLOATN_4), NO_EXTRA },
+ { GL_LIGHT_MODEL_TWO_SIDE, CONTEXT_BOOL(Light.Model.TwoSide), NO_EXTRA },
+ { GL_ALPHA_TEST, CONTEXT_BOOL(Color.AlphaEnabled), NO_EXTRA },
+ { GL_ALPHA_TEST_FUNC, CONTEXT_ENUM(Color.AlphaFunc), NO_EXTRA },
+ { GL_ALPHA_TEST_REF, LOC_CUSTOM, TYPE_FLOATN, 0, extra_new_frag_clamp },
+ { GL_BLEND_DST, CONTEXT_ENUM(Color.Blend[0].DstRGB), NO_EXTRA },
+ { GL_CLIP_DISTANCE0, CONTEXT_BIT0(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE1, CONTEXT_BIT1(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE2, CONTEXT_BIT2(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE3, CONTEXT_BIT3(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE4, CONTEXT_BIT4(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE5, CONTEXT_BIT5(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE6, CONTEXT_BIT6(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_CLIP_DISTANCE7, CONTEXT_BIT7(Transform.ClipPlanesEnabled), extra_valid_clip_distance },
+ { GL_COLOR_MATERIAL, CONTEXT_BOOL(Light.ColorMaterialEnabled), NO_EXTRA },
+ { GL_CURRENT_COLOR, CONTEXT_FIELD(Current.Attrib[VERT_ATTRIB_COLOR0][0], TYPE_FLOATN_4), extra_flush_current },
+ { GL_CURRENT_NORMAL, CONTEXT_FIELD(Current.Attrib[VERT_ATTRIB_NORMAL][0], TYPE_FLOATN_3), extra_flush_current },
+ { GL_CURRENT_TEXTURE_COORDS, LOC_CUSTOM, TYPE_FLOAT_4, 0, extra_flush_current_valid_texture_unit },
+ { GL_POINT_DISTANCE_ATTENUATION, CONTEXT_FLOAT3(Point.Params[0]), NO_EXTRA },
+ { GL_FOG, CONTEXT_BOOL(Fog.Enabled), NO_EXTRA },
+ { GL_FOG_COLOR, LOC_CUSTOM, TYPE_FLOATN_4, 0, extra_new_frag_clamp },
+ { GL_FOG_DENSITY, CONTEXT_FLOAT(Fog.Density), NO_EXTRA },
+ { GL_FOG_END, CONTEXT_FLOAT(Fog.End), NO_EXTRA },
+ { GL_FOG_HINT, CONTEXT_ENUM(Hint.Fog), NO_EXTRA },
+ { GL_FOG_MODE, CONTEXT_ENUM(Fog.Mode), NO_EXTRA },
+ { GL_FOG_START, CONTEXT_FLOAT(Fog.Start), NO_EXTRA },
+ { GL_LINE_SMOOTH, CONTEXT_BOOL(Line.SmoothFlag), NO_EXTRA },
+ { GL_LINE_SMOOTH_HINT, CONTEXT_ENUM(Hint.LineSmooth), NO_EXTRA },
+ { GL_LINE_WIDTH_RANGE, CONTEXT_FLOAT2(Const.MinLineWidthAA), NO_EXTRA },
+ { GL_COLOR_LOGIC_OP, CONTEXT_BOOL(Color.ColorLogicOpEnabled), NO_EXTRA },
+ { GL_LOGIC_OP_MODE, CONTEXT_ENUM(Color.LogicOp), NO_EXTRA },
+ { GL_MATRIX_MODE, CONTEXT_ENUM(Transform.MatrixMode), NO_EXTRA },
+ { GL_MAX_MODELVIEW_STACK_DEPTH, CONST(MAX_MODELVIEW_STACK_DEPTH), NO_EXTRA },
+ { GL_MAX_PROJECTION_STACK_DEPTH, CONST(MAX_PROJECTION_STACK_DEPTH), NO_EXTRA },
+ { GL_MAX_TEXTURE_STACK_DEPTH, CONST(MAX_TEXTURE_STACK_DEPTH), NO_EXTRA },
+ { GL_MODELVIEW_MATRIX, CONTEXT_MATRIX(ModelviewMatrixStack.Top), NO_EXTRA },
+ { GL_MODELVIEW_STACK_DEPTH, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_context, ModelviewMatrixStack.Depth), NO_EXTRA },
+ { GL_NORMALIZE, CONTEXT_BOOL(Transform.Normalize), NO_EXTRA },
+ { GL_PACK_SKIP_IMAGES, CONTEXT_INT(Pack.SkipImages), NO_EXTRA },
+ { GL_PERSPECTIVE_CORRECTION_HINT, CONTEXT_ENUM(Hint.PerspectiveCorrection), NO_EXTRA },
+ { GL_POINT_SIZE, CONTEXT_FLOAT(Point.Size), NO_EXTRA },
+ { GL_POINT_SIZE_RANGE, CONTEXT_FLOAT2(Const.MinPointSizeAA), NO_EXTRA },
+ { GL_POINT_SMOOTH, CONTEXT_BOOL(Point.SmoothFlag), NO_EXTRA },
+ { GL_POINT_SMOOTH_HINT, CONTEXT_ENUM(Hint.PointSmooth), NO_EXTRA },
+ { GL_POINT_SIZE_MIN_EXT, CONTEXT_FLOAT(Point.MinSize), NO_EXTRA },
+ { GL_POINT_SIZE_MAX_EXT, CONTEXT_FLOAT(Point.MaxSize), NO_EXTRA },
+ { GL_POINT_FADE_THRESHOLD_SIZE_EXT, CONTEXT_FLOAT(Point.Threshold), NO_EXTRA },
+ { GL_PROJECTION_MATRIX, CONTEXT_MATRIX(ProjectionMatrixStack.Top), NO_EXTRA },
+ { GL_PROJECTION_STACK_DEPTH, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_context, ProjectionMatrixStack.Depth), NO_EXTRA },
+ { GL_RESCALE_NORMAL, CONTEXT_BOOL(Transform.RescaleNormals), NO_EXTRA },
+ { GL_SHADE_MODEL, CONTEXT_ENUM(Light.ShadeModel), NO_EXTRA },
+ { GL_TEXTURE_2D, LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA },
+ { GL_TEXTURE_MATRIX, LOC_CUSTOM, TYPE_MATRIX, 0, extra_valid_texture_unit },
+ { GL_TEXTURE_STACK_DEPTH, LOC_CUSTOM, TYPE_INT, 0, extra_valid_texture_unit },
+ { GL_VERTEX_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_POS].Enabled), NO_EXTRA },
+ { GL_VERTEX_ARRAY_SIZE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_POS].Size), NO_EXTRA },
+ { GL_VERTEX_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_POS].Type), NO_EXTRA },
+ { GL_VERTEX_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_POS].Stride), NO_EXTRA },
+ { GL_NORMAL_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_NORMAL].Enabled), NO_EXTRA },
+ { GL_NORMAL_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_NORMAL].Type), NO_EXTRA },
+ { GL_NORMAL_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_NORMAL].Stride), NO_EXTRA },
+ { GL_COLOR_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_COLOR0].Enabled), NO_EXTRA },
+ { GL_COLOR_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_COLOR_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_COLOR0].Type), NO_EXTRA },
+ { GL_COLOR_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_COLOR0].Stride), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY, LOC_CUSTOM, TYPE_BOOLEAN, offsetof(struct gl_array_attributes, Enabled), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Size), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY_TYPE, LOC_CUSTOM, TYPE_ENUM, offsetof(struct gl_array_attributes, Type), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY_STRIDE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_array_attributes, Stride), NO_EXTRA },
+ { GL_MAX_TEXTURE_UNITS, CONTEXT_INT(Const.MaxTextureUnits), NO_EXTRA },
+ { GL_CLIENT_ACTIVE_TEXTURE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_TEXTURE_CUBE_MAP_ARB, LOC_CUSTOM, TYPE_BOOLEAN, 0, NO_EXTRA },
+ { GL_TEXTURE_GEN_STR_OES, LOC_TEXUNIT, TYPE_BIT_0, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA },
+ { GL_MULTISAMPLE_ARB, CONTEXT_BOOL(Multisample.Enabled), NO_EXTRA },
+ { GL_SAMPLE_ALPHA_TO_ONE_ARB, CONTEXT_BOOL(Multisample.SampleAlphaToOne), NO_EXTRA },
+ { GL_VERTEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_POS].BufferObj), NO_EXTRA },
+ { GL_NORMAL_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_NORMAL].BufferObj), NO_EXTRA },
+ { GL_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR0].BufferObj), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, NO_OFFSET, NO_EXTRA },
+ { GL_POINT_SPRITE_NV, CONTEXT_BOOL(Point.PointSprite), extra_NV_point_sprite_ARB_point_sprite },
+ { GL_POINT_SIZE_ARRAY_OES, ARRAY_FIELD(VertexAttrib[VERT_ATTRIB_POINT_SIZE].Enabled, TYPE_BOOLEAN), NO_EXTRA },
+ { GL_POINT_SIZE_ARRAY_TYPE_OES, ARRAY_FIELD(VertexAttrib[VERT_ATTRIB_POINT_SIZE].Type, TYPE_ENUM), NO_EXTRA },
+ { GL_POINT_SIZE_ARRAY_STRIDE_OES, ARRAY_FIELD(VertexAttrib[VERT_ATTRIB_POINT_SIZE].Stride, TYPE_INT), NO_EXTRA },
+ { GL_POINT_SIZE_ARRAY_BUFFER_BINDING_OES, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_GPU_DISJOINT_EXT, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_disjoint_timer_query },
+ { GL_MAX_TEXTURE_COORDS_ARB, CONTEXT_INT(Const.MaxTextureCoordUnits), extra_ARB_fragment_program },
+ { GL_PACK_IMAGE_HEIGHT, CONTEXT_INT(Pack.ImageHeight), NO_EXTRA },
+ { GL_PACK_ROW_LENGTH, CONTEXT_INT(Pack.RowLength), NO_EXTRA },
+ { GL_PACK_SKIP_PIXELS, CONTEXT_INT(Pack.SkipPixels), NO_EXTRA },
+ { GL_PACK_SKIP_ROWS, CONTEXT_INT(Pack.SkipRows), NO_EXTRA },
+ { GL_UNPACK_ROW_LENGTH, CONTEXT_INT(Unpack.RowLength), NO_EXTRA },
+ { GL_UNPACK_SKIP_PIXELS, CONTEXT_INT(Unpack.SkipPixels), NO_EXTRA },
+ { GL_UNPACK_SKIP_ROWS, CONTEXT_INT(Unpack.SkipRows), NO_EXTRA },
+ { GL_UNPACK_SKIP_IMAGES, CONTEXT_INT(Unpack.SkipImages), NO_EXTRA },
+ { GL_UNPACK_IMAGE_HEIGHT, CONTEXT_INT(Unpack.ImageHeight), NO_EXTRA },
+ { GL_MAX_DRAW_BUFFERS_ARB, CONTEXT_INT(Const.MaxDrawBuffers), NO_EXTRA },
+ { GL_MAX_COLOR_ATTACHMENTS, CONTEXT_INT(Const.MaxColorAttachments), NO_EXTRA },
+ { GL_DRAW_BUFFER0_ARB, BUFFER_ENUM(ColorDrawBuffer[0]), NO_EXTRA },
+ { GL_DRAW_BUFFER1_ARB, BUFFER_ENUM(ColorDrawBuffer[1]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER2_ARB, BUFFER_ENUM(ColorDrawBuffer[2]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER3_ARB, BUFFER_ENUM(ColorDrawBuffer[3]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER4_ARB, BUFFER_ENUM(ColorDrawBuffer[4]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER5_ARB, BUFFER_ENUM(ColorDrawBuffer[5]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER6_ARB, BUFFER_ENUM(ColorDrawBuffer[6]), extra_valid_draw_buffer },
+ { GL_DRAW_BUFFER7_ARB, BUFFER_ENUM(ColorDrawBuffer[7]), extra_valid_draw_buffer },
+ { GL_BLEND_COLOR_EXT, LOC_CUSTOM, TYPE_FLOATN_4, 0, extra_new_frag_clamp },
+ { GL_MAX_TEXTURE_IMAGE_UNITS_ARB, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits), extra_ARB_fragment_program },
+ { GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS_ARB, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxTextureImageUnits), extra_ARB_vertex_shader },
+ { GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB, CONTEXT_INT(Const.MaxCombinedTextureImageUnits), extra_ARB_vertex_shader },
+ { GL_CURRENT_PROGRAM, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_STENCIL_BACK_FUNC, CONTEXT_ENUM(Stencil.Function[1]), NO_EXTRA },
+ { GL_STENCIL_BACK_VALUE_MASK, CONTEXT_UINT(Stencil.ValueMask[1]), NO_EXTRA },
+ { GL_STENCIL_BACK_WRITEMASK, CONTEXT_UINT(Stencil.WriteMask[1]), NO_EXTRA },
+ { GL_STENCIL_BACK_REF, LOC_CUSTOM, TYPE_UINT, NO_OFFSET, NO_EXTRA },
+ { GL_STENCIL_BACK_FAIL, CONTEXT_ENUM(Stencil.FailFunc[1]), NO_EXTRA },
+ { GL_STENCIL_BACK_PASS_DEPTH_FAIL, CONTEXT_ENUM(Stencil.ZFailFunc[1]), NO_EXTRA },
+ { GL_STENCIL_BACK_PASS_DEPTH_PASS, CONTEXT_ENUM(Stencil.ZPassFunc[1]), NO_EXTRA },
+ { GL_MAX_VERTEX_ATTRIBS_ARB, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxAttribs), extra_ARB_vertex_program_api_es2 },
+ { GL_TEXTURE_BINDING_3D, LOC_CUSTOM, TYPE_INT, TEXTURE_3D_INDEX, NO_EXTRA },
+ { GL_MAX_3D_TEXTURE_SIZE, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_context, Const.Max3DTextureLevels), NO_EXTRA },
+ { GL_FRAGMENT_SHADER_DERIVATIVE_HINT, CONTEXT_ENUM(Hint.FragmentShaderDerivative), extra_ARB_fragment_shader },
+ { GL_READ_BUFFER, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, extra_NV_read_buffer_api_gl },
+ { GL_SHADER_COMPILER, CONST(1), extra_ARB_ES2_compatibility_api_es2 },
+ { GL_MAX_VARYING_VECTORS, CONTEXT_INT(Const.MaxVarying), extra_ARB_ES2_compatibility_api_es2 },
+ { GL_MAX_VERTEX_UNIFORM_VECTORS, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_ES2_compatibility_api_es2 },
+ { GL_MAX_FRAGMENT_UNIFORM_VECTORS, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_ES2_compatibility_api_es2 },
+ { GL_NUM_SHADER_BINARY_FORMATS, CONST(0), extra_ARB_ES2_compatibility_api_es2 },
+ { GL_SHADER_BINARY_FORMATS, LOC_CUSTOM, TYPE_INVALID, 0, extra_ARB_ES2_compatibility_api_es2 },
+ { GL_NUM_PROGRAM_BINARY_FORMATS, CONTEXT_UINT(Const.NumProgramBinaryFormats), NO_EXTRA },
+ { GL_PROGRAM_BINARY_FORMATS, LOC_CUSTOM, TYPE_INT_N, 0, NO_EXTRA },
+ { GL_PERFQUERY_QUERY_NAME_LENGTH_MAX_INTEL, CONST(MAX_PERFQUERY_QUERY_NAME_LENGTH), extra_INTEL_performance_query },
+ { GL_PERFQUERY_COUNTER_NAME_LENGTH_MAX_INTEL, CONST(MAX_PERFQUERY_COUNTER_NAME_LENGTH), extra_INTEL_performance_query },
+ { GL_PERFQUERY_COUNTER_DESC_LENGTH_MAX_INTEL, CONST(MAX_PERFQUERY_COUNTER_DESC_LENGTH), extra_INTEL_performance_query },
+ { GL_PERFQUERY_GPA_EXTENDED_COUNTERS_INTEL, CONST(PERFQUERY_HAVE_GPA_EXTENDED_COUNTERS), extra_INTEL_performance_query },
+ { GL_CONTEXT_RELEASE_BEHAVIOR, CONTEXT_ENUM(Const.ContextReleaseBehavior), NO_EXTRA },
+ { GL_MAX_DUAL_SOURCE_DRAW_BUFFERS, CONTEXT_INT(Const.MaxDualSourceDrawBuffers), extra_ARB_blend_func_extended },
+ { GL_BLEND_ADVANCED_COHERENT_KHR, CONTEXT_BOOL(Color.BlendCoherent), extra_KHR_blend_equation_advanced_coherent },
+ { GL_CONTEXT_ROBUST_ACCESS, CONTEXT_ENUM(Const.RobustAccess), extra_KHR_robustness },
+ { GL_RESET_NOTIFICATION_STRATEGY_ARB, CONTEXT_ENUM(Const.ResetStrategy), extra_KHR_robustness_or_GL },
+ { GL_MAX_TEXTURE_LOD_BIAS_EXT, CONTEXT_FLOAT(Const.MaxTextureLodBias), NO_EXTRA },
+ { GL_NUM_EXTENSIONS, LOC_CUSTOM, TYPE_INT, 0, extra_gl30_es3 },
+ { GL_MAJOR_VERSION, LOC_CUSTOM, TYPE_INT, 0, extra_gl30_es3 },
+ { GL_MINOR_VERSION, LOC_CUSTOM, TYPE_INT, 0, extra_gl30_es3 },
+ { GL_MAX_VERTEX_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxOutputComponents), extra_gl32_es3 },
+ { GL_MAX_FRAGMENT_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxInputComponents), extra_gl32_es3 },
+ { GL_MAX_ELEMENT_INDEX, CONTEXT_INT64(Const.MaxElementIndex), extra_ARB_ES3_compatibility_api_es3 },
+ { GL_PRIMITIVE_RESTART_FIXED_INDEX, CONTEXT_BOOL(Array.PrimitiveRestartFixedIndex), extra_ARB_ES3_compatibility_api_es3 },
+ { GL_MAX_FRAGMENT_UNIFORM_COMPONENTS_ARB, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxUniformComponents), extra_ARB_fragment_shader },
+ { GL_MAX_SAMPLES, CONTEXT_INT(Const.MaxSamples), extra_ARB_framebuffer_object_EXT_framebuffer_multisample },
+ { GL_SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT, GL_SAMPLER_BINDING, NO_EXTRA },
+ { GL_MAX_SERVER_WAIT_TIMEOUT, CONTEXT_INT64(Const.MaxServerWaitTimeout), extra_ARB_sync },
+ { GL_TRANSFORM_FEEDBACK_BUFFER_PAUSED, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_ARB_transform_feedback2_api_es3 },
+ { GL_TRANSFORM_FEEDBACK_BUFFER_ACTIVE, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_ARB_transform_feedback2_api_es3 },
+ { GL_TRANSFORM_FEEDBACK_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_transform_feedback2_api_es3 },
+ { GL_MAX_VERTEX_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxUniformBlocks), extra_ARB_uniform_buffer_object },
+ { GL_MAX_FRAGMENT_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxUniformBlocks), extra_ARB_uniform_buffer_object },
+ { GL_MAX_COMBINED_UNIFORM_BLOCKS, CONTEXT_INT(Const.MaxCombinedUniformBlocks), extra_ARB_uniform_buffer_object },
+ { GL_MAX_UNIFORM_BLOCK_SIZE, CONTEXT_INT(Const.MaxUniformBlockSize), extra_ARB_uniform_buffer_object },
+ { GL_MAX_UNIFORM_BUFFER_BINDINGS, CONTEXT_INT(Const.MaxUniformBufferBindings), extra_ARB_uniform_buffer_object },
+ { GL_MAX_COMBINED_VERTEX_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxCombinedUniformComponents), extra_ARB_uniform_buffer_object },
+ { GL_MAX_COMBINED_FRAGMENT_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxCombinedUniformComponents), extra_ARB_uniform_buffer_object },
+ { GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT, CONTEXT_INT(Const.UniformBufferOffsetAlignment), extra_ARB_uniform_buffer_object },
+ { GL_UNIFORM_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_uniform_buffer_object },
+ { GL_MAX_VERTEX_UNIFORM_COMPONENTS_ARB, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxUniformComponents), extra_ARB_vertex_shader },
+ { GL_MAX_VARYING_FLOATS_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_vertex_shader },
+ { GL_READ_FRAMEBUFFER_BINDING_EXT, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_MIN_PROGRAM_TEXEL_OFFSET, CONTEXT_INT(Const.MinProgramTexelOffset), extra_GLSL_130_es3 },
+ { GL_MAX_PROGRAM_TEXEL_OFFSET, CONTEXT_INT(Const.MaxProgramTexelOffset), extra_GLSL_130_es3 },
+ { GL_PIXEL_PACK_BUFFER_BINDING_EXT, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_pixel_buffer_object },
+ { GL_PIXEL_UNPACK_BUFFER_BINDING_EXT, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_pixel_buffer_object },
+ { GL_TEXTURE_BINDING_2D_ARRAY, LOC_CUSTOM, TYPE_INT, TEXTURE_2D_ARRAY_INDEX, extra_EXT_texture_array_es3 },
+ { GL_MAX_ARRAY_TEXTURE_LAYERS_EXT, CONTEXT_INT(Const.MaxArrayTextureLayers), extra_EXT_texture_array_es3 },
+ { GL_TRANSFORM_FEEDBACK_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_transform_feedback },
+ { GL_RASTERIZER_DISCARD, CONTEXT_BOOL(RasterDiscard), extra_EXT_transform_feedback },
+ { GL_MAX_TRANSFORM_FEEDBACK_INTERLEAVED_COMPONENTS, CONTEXT_INT(Const.MaxTransformFeedbackInterleavedComponents), extra_EXT_transform_feedback },
+ { GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_ATTRIBS, CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_EXT_transform_feedback },
+ { GL_MAX_TRANSFORM_FEEDBACK_SEPARATE_COMPONENTS, CONTEXT_INT(Const.MaxTransformFeedbackSeparateComponents), extra_EXT_transform_feedback },
+ { GL_MAX_WINDOW_RECTANGLES_EXT, CONTEXT_INT(Const.MaxWindowRectangles), extra_EXT_window_rectangles },
+ { GL_NUM_WINDOW_RECTANGLES_EXT, CONTEXT_INT(Scissor.NumWindowRects), extra_EXT_window_rectangles },
+ { GL_WINDOW_RECTANGLE_MODE_EXT, CONTEXT_ENUM(Scissor.WindowRectMode), extra_EXT_window_rectangles },
+ { GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT, CONTEXT_BOOL(Extensions.MESA_shader_framebuffer_fetch), extra_EXT_shader_framebuffer_fetch },
+ { GL_TEXTURE_BINDING_EXTERNAL_OES, LOC_CUSTOM, TYPE_INT, TEXTURE_EXTERNAL_INDEX, extra_OES_EGL_image_external },
+ { GL_TEXTURE_EXTERNAL_OES, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_OES_EGL_image_external },
+ { GL_MAX_TEXTURE_BUFFER_SIZE_ARB, CONTEXT_INT(Const.MaxTextureBufferSize), extra_texture_buffer_object },
+ { GL_TEXTURE_BINDING_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_texture_buffer_object },
+ { GL_TEXTURE_BUFFER_DATA_STORE_BINDING_ARB, LOC_CUSTOM, TYPE_INT, TEXTURE_BUFFER_INDEX, extra_texture_buffer_object },
+ { GL_TEXTURE_BUFFER_FORMAT_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_texture_buffer_object },
+ { GL_TEXTURE_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_texture_buffer_object },
+ { GL_TEXTURE_BUFFER_OFFSET_ALIGNMENT, CONTEXT_INT(Const.TextureBufferOffsetAlignment), extra_ARB_texture_buffer_range },
+ { GL_MAX_IMAGE_UNITS, CONTEXT_INT(Const.MaxImageUnits), extra_ARB_shader_image_load_store },
+ { GL_MAX_VERTEX_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms), extra_ARB_shader_image_load_store },
+ { GL_MAX_FRAGMENT_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms), extra_ARB_shader_image_load_store },
+ { GL_MAX_COMBINED_IMAGE_UNIFORMS, CONTEXT_INT(Const.MaxCombinedImageUniforms), extra_ARB_shader_image_load_store },
+ { GL_ATOMIC_COUNTER_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_shader_atomic_counters },
+ { GL_MAX_ATOMIC_COUNTER_BUFFER_BINDINGS, CONTEXT_INT(Const.MaxAtomicBufferBindings), extra_ARB_shader_atomic_counters },
+ { GL_MAX_ATOMIC_COUNTER_BUFFER_SIZE, CONTEXT_INT(Const.MaxAtomicBufferSize), extra_ARB_shader_atomic_counters },
+ { GL_MAX_VERTEX_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxAtomicBuffers), extra_ARB_shader_atomic_counters },
+ { GL_MAX_VERTEX_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxAtomicCounters), extra_ARB_shader_atomic_counters },
+ { GL_MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers), extra_ARB_shader_atomic_counters },
+ { GL_MAX_FRAGMENT_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters), extra_ARB_shader_atomic_counters },
+ { GL_MAX_COMBINED_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.MaxCombinedAtomicBuffers), extra_ARB_shader_atomic_counters },
+ { GL_MAX_COMBINED_ATOMIC_COUNTERS, CONTEXT_INT(Const.MaxCombinedAtomicCounters), extra_ARB_shader_atomic_counters },
+ { GL_TEXTURE_BINDING_2D_MULTISAMPLE, LOC_CUSTOM, TYPE_INT, TEXTURE_2D_MULTISAMPLE_INDEX, extra_ARB_texture_multisample },
+ { GL_MAX_COLOR_TEXTURE_SAMPLES, CONTEXT_INT(Const.MaxColorTextureSamples), extra_ARB_texture_multisample },
+ { GL_MAX_DEPTH_TEXTURE_SAMPLES, CONTEXT_INT(Const.MaxDepthTextureSamples), extra_ARB_texture_multisample },
+ { GL_MAX_INTEGER_SAMPLES, CONTEXT_INT(Const.MaxIntegerSamples), extra_ARB_texture_multisample },
+ { GL_SAMPLE_MASK, CONTEXT_BOOL(Multisample.SampleMask), extra_ARB_texture_multisample },
+ { GL_MAX_SAMPLE_MASK_WORDS, CONST(1), extra_ARB_texture_multisample },
+ { GL_TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY, LOC_CUSTOM, TYPE_INT, TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX, extra_ARB_texture_multisample },
+ { GL_MIN_PROGRAM_TEXTURE_GATHER_OFFSET, CONTEXT_INT(Const.MinProgramTextureGatherOffset), extra_ARB_texture_gather },
+ { GL_MAX_PROGRAM_TEXTURE_GATHER_OFFSET, CONTEXT_INT(Const.MaxProgramTextureGatherOffset), extra_ARB_texture_gather },
+ { GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS, CONTEXT_INT(Const.MaxComputeWorkGroupInvocations), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxUniformBlocks), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxTextureImageUnits), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxAtomicBuffers), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxAtomicCounters), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_SHARED_MEMORY_SIZE, CONTEXT_INT(Const.MaxComputeSharedMemorySize), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxUniformComponents), extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMPUTE_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxImageUniforms), extra_ARB_compute_shader_es31 },
+ { GL_DISPATCH_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_compute_shader_es31 },
+ { GL_MAX_COMBINED_COMPUTE_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxCombinedUniformComponents), extra_ARB_compute_shader_es31 },
+ { GL_MAX_FRAMEBUFFER_WIDTH, CONTEXT_INT(Const.MaxFramebufferWidth), extra_ARB_framebuffer_no_attachments },
+ { GL_MAX_FRAMEBUFFER_HEIGHT, CONTEXT_INT(Const.MaxFramebufferHeight), extra_ARB_framebuffer_no_attachments },
+ { GL_MAX_FRAMEBUFFER_SAMPLES, CONTEXT_INT(Const.MaxFramebufferSamples), extra_ARB_framebuffer_no_attachments },
+ { GL_MAX_FRAMEBUFFER_LAYERS, CONTEXT_INT(Const.MaxFramebufferLayers), extra_ARB_framebuffer_no_attachments_and_geometry_shader },
+ { GL_MAX_UNIFORM_LOCATIONS, CONTEXT_INT(Const.MaxUserAssignableUniformLocations), extra_ARB_explicit_uniform_location },
+ { GL_PROGRAM_PIPELINE_BINDING, LOC_CUSTOM, TYPE_INT, GL_PROGRAM_PIPELINE_BINDING, NO_EXTRA },
+ { GL_MAX_VERTEX_ATTRIB_RELATIVE_OFFSET, CONTEXT_ENUM(Const.MaxVertexAttribRelativeOffset), NO_EXTRA },
+ { GL_MAX_VERTEX_ATTRIB_BINDINGS, CONTEXT_ENUM(Const.MaxVertexAttribBindings), NO_EXTRA },
+ { GL_MAX_VERTEX_ATTRIB_STRIDE, CONTEXT_ENUM(Const.MaxVertexAttribStride), NO_EXTRA },
+ { GL_MAX_VERTEX_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_FRAGMENT_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_COMPUTE_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_COMPUTE].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_COMBINED_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.MaxCombinedShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_SHADER_STORAGE_BLOCK_SIZE, CONTEXT_INT(Const.MaxShaderStorageBlockSize), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_SHADER_STORAGE_BUFFER_BINDINGS, CONTEXT_INT(Const.MaxShaderStorageBufferBindings), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT, CONTEXT_INT(Const.ShaderStorageBufferOffsetAlignment), extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_SHADER_STORAGE_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_shader_storage_buffer_object_es31 },
+ { GL_MAX_COMBINED_SHADER_OUTPUT_RESOURCES, CONTEXT_INT(Const.MaxCombinedShaderOutputResources), extra_ARB_shader_image_load_store_shader_storage_buffer_object_es31 },
+ { GL_TEXTURE_BINDING_CUBE_MAP_ARRAY_ARB, LOC_CUSTOM, TYPE_INT, TEXTURE_CUBE_ARRAY_INDEX, extra_ARB_texture_cube_map_array_OES_texture_cube_map_array },
+ { GL_NUM_SHADING_LANGUAGE_VERSIONS, LOC_CUSTOM, TYPE_INT, 0, extra_version_43 },
+ { GL_MIN_FRAGMENT_INTERPOLATION_OFFSET, CONTEXT_FLOAT(Const.MinFragmentInterpolationOffset), extra_ARB_gpu_shader5_or_OES_sample_variables },
+ { GL_MAX_FRAGMENT_INTERPOLATION_OFFSET, CONTEXT_FLOAT(Const.MaxFragmentInterpolationOffset), extra_ARB_gpu_shader5_or_OES_sample_variables },
+ { GL_FRAGMENT_INTERPOLATION_OFFSET_BITS, CONST(FRAGMENT_INTERPOLATION_OFFSET_BITS), extra_ARB_gpu_shader5_or_OES_sample_variables },
+ { GL_DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_draw_indirect },
+ { GL_MAX_GEOMETRY_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxInputComponents), extra_version_32_OES_geometry_shader },
+ { GL_MAX_GEOMETRY_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxOutputComponents), extra_version_32_OES_geometry_shader },
+ { GL_MAX_GEOMETRY_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxTextureImageUnits), extra_version_32_OES_geometry_shader },
+ { GL_MAX_GEOMETRY_OUTPUT_VERTICES, CONTEXT_INT(Const.MaxGeometryOutputVertices), extra_version_32_OES_geometry_shader },
+ { GL_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.MaxGeometryTotalOutputComponents), extra_version_32_OES_geometry_shader },
+ { GL_MAX_GEOMETRY_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformComponents), extra_version_32_OES_geometry_shader },
+ { GL_PATCH_VERTICES, CONTEXT_INT(TessCtrlProgram.patch_vertices), extra_ARB_tessellation_shader },
+ { GL_PATCH_DEFAULT_OUTER_LEVEL, CONTEXT_FLOAT4(TessCtrlProgram.patch_default_outer_level), extra_ARB_tessellation_shader },
+ { GL_PATCH_DEFAULT_INNER_LEVEL, CONTEXT_FLOAT2(TessCtrlProgram.patch_default_inner_level), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_GEN_LEVEL, CONTEXT_INT(Const.MaxTessGenLevel), extra_ARB_tessellation_shader },
+ { GL_MAX_PATCH_VERTICES, CONTEXT_INT(Const.MaxPatchVertices), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxTextureImageUnits), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_EVALUATION_TEXTURE_IMAGE_UNITS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxTextureImageUnits), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxOutputComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_PATCH_COMPONENTS, CONTEXT_INT(Const.MaxTessPatchComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_TOTAL_OUTPUT_COMPONENTS, CONTEXT_INT(Const.MaxTessControlTotalOutputComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_EVALUATION_OUTPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxOutputComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxInputComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_EVALUATION_INPUT_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxInputComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_CONTROL_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxUniformBlocks), extra_ARB_tessellation_shader },
+ { GL_MAX_TESS_EVALUATION_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxUniformBlocks), extra_ARB_tessellation_shader },
+ { GL_MAX_COMBINED_TESS_CONTROL_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader },
+ { GL_MAX_COMBINED_TESS_EVALUATION_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxCombinedUniformComponents), extra_ARB_tessellation_shader },
+ { GL_PRIMITIVE_RESTART_FOR_PATCHES_SUPPORTED, CONTEXT_BOOL(Const.PrimitiveRestartForPatches), extra_ARB_tessellation_shader },
+ { GL_MAX_GEOMETRY_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxImageUniforms), extra_ARB_shader_image_load_store_and_geometry_shader },
+ { GL_MAX_TESS_CONTROL_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation },
+ { GL_MAX_TESS_EVALUATION_IMAGE_UNIFORMS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxImageUniforms), extra_ARB_shader_image_load_store_and_tessellation },
+ { GL_MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_geometry_shader },
+ { GL_MAX_GEOMETRY_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_geometry_shader },
+ { GL_MAX_TESS_CONTROL_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation },
+ { GL_MAX_TESS_CONTROL_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation },
+ { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTER_BUFFERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicBuffers), extra_ARB_shader_atomic_counters_and_tessellation },
+ { GL_MAX_TESS_EVALUATION_ATOMIC_COUNTERS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxAtomicCounters), extra_ARB_shader_atomic_counters_and_tessellation },
+ { GL_MAX_GEOMETRY_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object_and_geometry_shader },
+ { GL_MAX_TESS_CONTROL_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object },
+ { GL_MAX_TESS_EVALUATION_SHADER_STORAGE_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_TESS_EVAL].MaxShaderStorageBlocks), extra_ARB_shader_storage_buffer_object },
+ { GL_MAX_GEOMETRY_UNIFORM_BLOCKS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxUniformBlocks), extra_ARB_uniform_buffer_object_and_geometry_shader },
+ { GL_MAX_COMBINED_GEOMETRY_UNIFORM_COMPONENTS, CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxCombinedUniformComponents), extra_ARB_uniform_buffer_object_and_geometry_shader },
+ { GL_LAYER_PROVOKING_VERTEX, CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array_or_oes_geometry_shader },
+ { GL_MAX_GEOMETRY_SHADER_INVOCATIONS, CONST(MAX_GEOMETRY_SHADER_INVOCATIONS), extra_ARB_gpu_shader5_or_oes_geometry_shader },
+ { GL_PRIMITIVE_BOUNDING_BOX_ARB, CONTEXT_FLOAT8(PrimitiveBoundingBox), extra_OES_primitive_bounding_box },
+ { GL_MAX_VIEWPORTS, CONTEXT_INT(Const.MaxViewports), extra_ARB_viewport_array_or_oes_viewport_array },
+ { GL_VIEWPORT_SUBPIXEL_BITS, CONTEXT_INT(Const.ViewportSubpixelBits), extra_ARB_viewport_array_or_oes_viewport_array },
+ { GL_VIEWPORT_BOUNDS_RANGE, CONTEXT_FLOAT2(Const.ViewportBounds), extra_ARB_viewport_array_or_oes_viewport_array },
+ { GL_VIEWPORT_INDEX_PROVOKING_VERTEX, CONTEXT_ENUM(Const.LayerAndVPIndexProvokingVertex), extra_ARB_viewport_array_or_oes_viewport_array },
+ { GL_CONSERVATIVE_RASTERIZATION_INTEL, CONTEXT_BOOL(IntelConservativeRasterization), extra_INTEL_conservative_rasterization },
+ { GL_MULTISAMPLE_LINE_WIDTH_RANGE_ARB, CONTEXT_FLOAT2(Const.MinLineWidthAA), extra_ES32 },
+ { GL_MULTISAMPLE_LINE_WIDTH_GRANULARITY_ARB, CONTEXT_FLOAT(Const.LineWidthGranularity), extra_ES32 },
+ { GL_CONTEXT_FLAGS, CONTEXT_INT(Const.ContextFlags), extra_version_30 },
+ { GL_ACCUM_RED_BITS, BUFFER_INT(Visual.accumRedBits), NO_EXTRA },
+ { GL_ACCUM_GREEN_BITS, BUFFER_INT(Visual.accumGreenBits), NO_EXTRA },
+ { GL_ACCUM_BLUE_BITS, BUFFER_INT(Visual.accumBlueBits), NO_EXTRA },
+ { GL_ACCUM_ALPHA_BITS, BUFFER_INT(Visual.accumAlphaBits), NO_EXTRA },
+ { GL_ACCUM_CLEAR_VALUE, CONTEXT_FIELD(Accum.ClearColor[0], TYPE_FLOATN_4), NO_EXTRA },
+ { GL_ALPHA_BIAS, CONTEXT_FLOAT(Pixel.AlphaBias), NO_EXTRA },
+ { GL_ALPHA_SCALE, CONTEXT_FLOAT(Pixel.AlphaScale), NO_EXTRA },
+ { GL_ATTRIB_STACK_DEPTH, CONTEXT_INT(AttribStackDepth), NO_EXTRA },
+ { GL_AUTO_NORMAL, CONTEXT_BOOL(Eval.AutoNormal), NO_EXTRA },
+ { GL_AUX_BUFFERS, BUFFER_INT(Visual.numAuxBuffers), NO_EXTRA },
+ { GL_BLUE_BIAS, CONTEXT_FLOAT(Pixel.BlueBias), NO_EXTRA },
+ { GL_BLUE_SCALE, CONTEXT_FLOAT(Pixel.BlueScale), NO_EXTRA },
+ { GL_CLIP_DEPTH_MODE, CONTEXT_ENUM(Transform.ClipDepthMode), extra_ARB_clip_control },
+ { GL_CLIP_ORIGIN, CONTEXT_ENUM(Transform.ClipOrigin), extra_ARB_clip_control },
+ { GL_CLIENT_ATTRIB_STACK_DEPTH, CONTEXT_INT(ClientAttribStackDepth), NO_EXTRA },
+ { GL_COLOR_MATERIAL_FACE, CONTEXT_ENUM(Light.ColorMaterialFace), NO_EXTRA },
+ { GL_COLOR_MATERIAL_PARAMETER, CONTEXT_ENUM(Light.ColorMaterialMode), NO_EXTRA },
+ { GL_CURRENT_INDEX, CONTEXT_FLOAT(Current.Attrib[VERT_ATTRIB_COLOR_INDEX][0]), extra_flush_current },
+ { GL_CURRENT_RASTER_COLOR, CONTEXT_FIELD(Current.RasterColor[0], TYPE_FLOATN_4), NO_EXTRA },
+ { GL_CURRENT_RASTER_DISTANCE, CONTEXT_FLOAT(Current.RasterDistance), NO_EXTRA },
+ { GL_CURRENT_RASTER_INDEX, CONST(1), NO_EXTRA },
+ { GL_CURRENT_RASTER_POSITION, CONTEXT_FLOAT4(Current.RasterPos[0]), NO_EXTRA },
+ { GL_CURRENT_RASTER_SECONDARY_COLOR, CONTEXT_FIELD(Current.RasterSecondaryColor[0], TYPE_FLOATN_4), NO_EXTRA },
+ { GL_CURRENT_RASTER_TEXTURE_COORDS, LOC_CUSTOM, TYPE_FLOAT_4, 0, extra_valid_texture_unit },
+ { GL_CURRENT_RASTER_POSITION_VALID, CONTEXT_BOOL(Current.RasterPosValid), NO_EXTRA },
+ { GL_DEPTH_BIAS, CONTEXT_FLOAT(Pixel.DepthBias), NO_EXTRA },
+ { GL_DEPTH_SCALE, CONTEXT_FLOAT(Pixel.DepthScale), NO_EXTRA },
+ { GL_DOUBLEBUFFER, BUFFER_INT(Visual.doubleBufferMode), NO_EXTRA },
+ { GL_DRAW_BUFFER, BUFFER_ENUM(ColorDrawBuffer[0]), NO_EXTRA },
+ { GL_EDGE_FLAG, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_flush_current },
+ { GL_FEEDBACK_BUFFER_SIZE, CONTEXT_INT(Feedback.BufferSize), NO_EXTRA },
+ { GL_FEEDBACK_BUFFER_TYPE, CONTEXT_ENUM(Feedback.Type), NO_EXTRA },
+ { GL_FOG_INDEX, CONTEXT_FLOAT(Fog.Index), NO_EXTRA },
+ { GL_GREEN_BIAS, CONTEXT_FLOAT(Pixel.GreenBias), NO_EXTRA },
+ { GL_GREEN_SCALE, CONTEXT_FLOAT(Pixel.GreenScale), NO_EXTRA },
+ { GL_INDEX_BITS, BUFFER_INT(Visual.indexBits), extra_new_buffers },
+ { GL_INDEX_CLEAR_VALUE, CONTEXT_INT(Color.ClearIndex), NO_EXTRA },
+ { GL_INDEX_MODE, CONST(0) , NO_EXTRA },
+ { GL_INDEX_OFFSET, CONTEXT_INT(Pixel.IndexOffset), NO_EXTRA },
+ { GL_INDEX_SHIFT, CONTEXT_INT(Pixel.IndexShift), NO_EXTRA },
+ { GL_INDEX_WRITEMASK, CONTEXT_INT(Color.IndexMask), NO_EXTRA },
+ { GL_LIGHT_MODEL_COLOR_CONTROL, CONTEXT_ENUM(Light.Model.ColorControl), NO_EXTRA },
+ { GL_LIGHT_MODEL_LOCAL_VIEWER, CONTEXT_BOOL(Light.Model.LocalViewer), NO_EXTRA },
+ { GL_LINE_STIPPLE, CONTEXT_BOOL(Line.StippleFlag), NO_EXTRA },
+ { GL_LINE_STIPPLE_PATTERN, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_LINE_STIPPLE_REPEAT, CONTEXT_INT(Line.StippleFactor), NO_EXTRA },
+ { GL_LINE_WIDTH_GRANULARITY, CONTEXT_FLOAT(Const.LineWidthGranularity), NO_EXTRA },
+ { GL_LIST_BASE, CONTEXT_INT(List.ListBase), NO_EXTRA },
+ { GL_LIST_INDEX, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_LIST_MODE, LOC_CUSTOM, TYPE_ENUM, 0, NO_EXTRA },
+ { GL_INDEX_LOGIC_OP, CONTEXT_BOOL(Color.IndexLogicOpEnabled), NO_EXTRA },
+ { GL_MAP1_COLOR_4, CONTEXT_BOOL(Eval.Map1Color4), NO_EXTRA },
+ { GL_MAP1_GRID_DOMAIN, CONTEXT_FLOAT2(Eval.MapGrid1u1), NO_EXTRA },
+ { GL_MAP1_GRID_SEGMENTS, CONTEXT_INT(Eval.MapGrid1un), NO_EXTRA },
+ { GL_MAP1_INDEX, CONTEXT_BOOL(Eval.Map1Index), NO_EXTRA },
+ { GL_MAP1_NORMAL, CONTEXT_BOOL(Eval.Map1Normal), NO_EXTRA },
+ { GL_MAP1_TEXTURE_COORD_1, CONTEXT_BOOL(Eval.Map1TextureCoord1), NO_EXTRA },
+ { GL_MAP1_TEXTURE_COORD_2, CONTEXT_BOOL(Eval.Map1TextureCoord2), NO_EXTRA },
+ { GL_MAP1_TEXTURE_COORD_3, CONTEXT_BOOL(Eval.Map1TextureCoord3), NO_EXTRA },
+ { GL_MAP1_TEXTURE_COORD_4, CONTEXT_BOOL(Eval.Map1TextureCoord4), NO_EXTRA },
+ { GL_MAP1_VERTEX_3, CONTEXT_BOOL(Eval.Map1Vertex3), NO_EXTRA },
+ { GL_MAP1_VERTEX_4, CONTEXT_BOOL(Eval.Map1Vertex4), NO_EXTRA },
+ { GL_MAP2_COLOR_4, CONTEXT_BOOL(Eval.Map2Color4), NO_EXTRA },
+ { GL_MAP2_GRID_DOMAIN, LOC_CUSTOM, TYPE_FLOAT_4, 0, NO_EXTRA },
+ { GL_MAP2_GRID_SEGMENTS, CONTEXT_INT2(Eval.MapGrid2un), NO_EXTRA },
+ { GL_MAP2_INDEX, CONTEXT_BOOL(Eval.Map2Index), NO_EXTRA },
+ { GL_MAP2_NORMAL, CONTEXT_BOOL(Eval.Map2Normal), NO_EXTRA },
+ { GL_MAP2_TEXTURE_COORD_1, CONTEXT_BOOL(Eval.Map2TextureCoord1), NO_EXTRA },
+ { GL_MAP2_TEXTURE_COORD_2, CONTEXT_BOOL(Eval.Map2TextureCoord2), NO_EXTRA },
+ { GL_MAP2_TEXTURE_COORD_3, CONTEXT_BOOL(Eval.Map2TextureCoord3), NO_EXTRA },
+ { GL_MAP2_TEXTURE_COORD_4, CONTEXT_BOOL(Eval.Map2TextureCoord4), NO_EXTRA },
+ { GL_MAP2_VERTEX_3, CONTEXT_BOOL(Eval.Map2Vertex3), NO_EXTRA },
+ { GL_MAP2_VERTEX_4, CONTEXT_BOOL(Eval.Map2Vertex4), NO_EXTRA },
+ { GL_MAP_COLOR, CONTEXT_BOOL(Pixel.MapColorFlag), NO_EXTRA },
+ { GL_MAP_STENCIL, CONTEXT_BOOL(Pixel.MapStencilFlag), NO_EXTRA },
+ { GL_MAX_ATTRIB_STACK_DEPTH, CONST(MAX_ATTRIB_STACK_DEPTH), NO_EXTRA },
+ { GL_MAX_CLIENT_ATTRIB_STACK_DEPTH, CONST(MAX_CLIENT_ATTRIB_STACK_DEPTH), NO_EXTRA },
+ { GL_MAX_EVAL_ORDER, CONST(MAX_EVAL_ORDER), NO_EXTRA },
+ { GL_MAX_LIST_NESTING, CONST(MAX_LIST_NESTING), NO_EXTRA },
+ { GL_MAX_NAME_STACK_DEPTH, CONST(MAX_NAME_STACK_DEPTH), NO_EXTRA },
+ { GL_MAX_PIXEL_MAP_TABLE, CONST(MAX_PIXEL_MAP_TABLE), NO_EXTRA },
+ { GL_NAME_STACK_DEPTH, CONTEXT_INT(Select.NameStackDepth), NO_EXTRA },
+ { GL_PACK_LSB_FIRST, CONTEXT_BOOL(Pack.LsbFirst), NO_EXTRA },
+ { GL_PACK_SWAP_BYTES, CONTEXT_BOOL(Pack.SwapBytes), NO_EXTRA },
+ { GL_PACK_INVERT_MESA, CONTEXT_BOOL(Pack.Invert), NO_EXTRA },
+ { GL_PIXEL_MAP_A_TO_A_SIZE, CONTEXT_INT(PixelMaps.AtoA.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_B_TO_B_SIZE, CONTEXT_INT(PixelMaps.BtoB.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_G_TO_G_SIZE, CONTEXT_INT(PixelMaps.GtoG.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_I_TO_A_SIZE, CONTEXT_INT(PixelMaps.ItoA.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_I_TO_B_SIZE, CONTEXT_INT(PixelMaps.ItoB.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_I_TO_G_SIZE, CONTEXT_INT(PixelMaps.ItoG.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_I_TO_I_SIZE, CONTEXT_INT(PixelMaps.ItoI.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_I_TO_R_SIZE, CONTEXT_INT(PixelMaps.ItoR.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_R_TO_R_SIZE, CONTEXT_INT(PixelMaps.RtoR.Size), NO_EXTRA },
+ { GL_PIXEL_MAP_S_TO_S_SIZE, CONTEXT_INT(PixelMaps.StoS.Size), NO_EXTRA },
+ { GL_POINT_SIZE_GRANULARITY, CONTEXT_FLOAT(Const.PointSizeGranularity), NO_EXTRA },
+ { GL_POLYGON_MODE, CONTEXT_ENUM2(Polygon.FrontMode), NO_EXTRA },
+ { GL_POLYGON_OFFSET_BIAS_EXT, CONTEXT_FLOAT(Polygon.OffsetUnits), NO_EXTRA },
+ { GL_POLYGON_OFFSET_POINT, CONTEXT_BOOL(Polygon.OffsetPoint), NO_EXTRA },
+ { GL_POLYGON_OFFSET_LINE, CONTEXT_BOOL(Polygon.OffsetLine), NO_EXTRA },
+ { GL_POLYGON_SMOOTH, CONTEXT_BOOL(Polygon.SmoothFlag), NO_EXTRA },
+ { GL_POLYGON_SMOOTH_HINT, CONTEXT_ENUM(Hint.PolygonSmooth), NO_EXTRA },
+ { GL_POLYGON_STIPPLE, CONTEXT_BOOL(Polygon.StippleFlag), NO_EXTRA },
+ { GL_RED_BIAS, CONTEXT_FLOAT(Pixel.RedBias), NO_EXTRA },
+ { GL_RED_SCALE, CONTEXT_FLOAT(Pixel.RedScale), NO_EXTRA },
+ { GL_RENDER_MODE, CONTEXT_ENUM(RenderMode), NO_EXTRA },
+ { GL_RGBA_MODE, CONST(1), NO_EXTRA },
+ { GL_SELECTION_BUFFER_SIZE, CONTEXT_INT(Select.BufferSize), NO_EXTRA },
+ { GL_STEREO, BUFFER_INT(Visual.stereoMode), NO_EXTRA },
+ { GL_TEXTURE_1D, LOC_CUSTOM, TYPE_BOOLEAN, NO_OFFSET, NO_EXTRA },
+ { GL_TEXTURE_3D, LOC_CUSTOM, TYPE_BOOLEAN, NO_OFFSET, NO_EXTRA },
+ { GL_TEXTURE_BINDING_1D, LOC_CUSTOM, TYPE_INT, TEXTURE_1D_INDEX, NO_EXTRA },
+ { GL_TEXTURE_BINDING_1D_ARRAY, LOC_CUSTOM, TYPE_INT, TEXTURE_1D_ARRAY_INDEX, extra_EXT_texture_array },
+ { GL_TEXTURE_GEN_S, LOC_TEXUNIT, TYPE_BIT_0, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA },
+ { GL_TEXTURE_GEN_T, LOC_TEXUNIT, TYPE_BIT_1, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA },
+ { GL_TEXTURE_GEN_R, LOC_TEXUNIT, TYPE_BIT_2, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA },
+ { GL_TEXTURE_GEN_Q, LOC_TEXUNIT, TYPE_BIT_3, offsetof(struct gl_texture_unit, TexGenEnabled), NO_EXTRA },
+ { GL_UNPACK_LSB_FIRST, CONTEXT_BOOL(Unpack.LsbFirst), NO_EXTRA },
+ { GL_UNPACK_SWAP_BYTES, CONTEXT_BOOL(Unpack.SwapBytes), NO_EXTRA },
+ { GL_ZOOM_X, CONTEXT_FLOAT(Pixel.ZoomX), NO_EXTRA },
+ { GL_ZOOM_Y, CONTEXT_FLOAT(Pixel.ZoomY), NO_EXTRA },
+ { GL_VERTEX_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_NORMAL_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_COLOR_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_INDEX_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_COLOR_INDEX].Enabled), NO_EXTRA },
+ { GL_INDEX_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_COLOR_INDEX].Type), NO_EXTRA },
+ { GL_INDEX_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_COLOR_INDEX].Stride), NO_EXTRA },
+ { GL_INDEX_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_TEXTURE_COORD_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_EDGE_FLAG_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_EDGEFLAG].Enabled), NO_EXTRA },
+ { GL_EDGE_FLAG_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_EDGEFLAG].Stride), NO_EXTRA },
+ { GL_EDGE_FLAG_ARRAY_COUNT_EXT, CONST(0), NO_EXTRA },
+ { GL_TEXTURE_COMPRESSION_HINT_ARB, CONTEXT_INT(Hint.TextureCompression), NO_EXTRA },
+ { GL_ARRAY_ELEMENT_LOCK_FIRST_EXT, CONTEXT_INT(Array.LockFirst), NO_EXTRA },
+ { GL_ARRAY_ELEMENT_LOCK_COUNT_EXT, CONTEXT_INT(Array.LockCount), NO_EXTRA },
+ { GL_UNPACK_COMPRESSED_BLOCK_WIDTH, CONTEXT_INT(Unpack.CompressedBlockWidth), NO_EXTRA },
+ { GL_UNPACK_COMPRESSED_BLOCK_HEIGHT, CONTEXT_INT(Unpack.CompressedBlockHeight), NO_EXTRA },
+ { GL_UNPACK_COMPRESSED_BLOCK_DEPTH, CONTEXT_INT(Unpack.CompressedBlockDepth), NO_EXTRA },
+ { GL_UNPACK_COMPRESSED_BLOCK_SIZE, CONTEXT_INT(Unpack.CompressedBlockSize), NO_EXTRA },
+ { GL_PACK_COMPRESSED_BLOCK_WIDTH, CONTEXT_INT(Pack.CompressedBlockWidth), NO_EXTRA },
+ { GL_PACK_COMPRESSED_BLOCK_HEIGHT, CONTEXT_INT(Pack.CompressedBlockHeight), NO_EXTRA },
+ { GL_PACK_COMPRESSED_BLOCK_DEPTH, CONTEXT_INT(Pack.CompressedBlockDepth), NO_EXTRA },
+ { GL_PACK_COMPRESSED_BLOCK_SIZE, CONTEXT_INT(Pack.CompressedBlockSize), NO_EXTRA },
+ { GL_TRANSPOSE_MODELVIEW_MATRIX_ARB, CONTEXT_MATRIX_T(ModelviewMatrixStack), NO_EXTRA },
+ { GL_TRANSPOSE_PROJECTION_MATRIX_ARB, CONTEXT_MATRIX_T(ProjectionMatrixStack.Top), NO_EXTRA },
+ { GL_TRANSPOSE_TEXTURE_MATRIX_ARB, CONTEXT_MATRIX_T(TextureMatrixStack), NO_EXTRA },
+ { GL_COLOR_SUM, CONTEXT_BOOL(Fog.ColorSumEnabled), NO_EXTRA },
+ { GL_CURRENT_SECONDARY_COLOR, CONTEXT_FIELD(Current.Attrib[VERT_ATTRIB_COLOR1][0], TYPE_FLOATN_4), extra_flush_current },
+ { GL_SECONDARY_COLOR_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_COLOR1].Enabled), NO_EXTRA },
+ { GL_SECONDARY_COLOR_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_COLOR1].Type), NO_EXTRA },
+ { GL_SECONDARY_COLOR_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_COLOR1].Stride), NO_EXTRA },
+ { GL_SECONDARY_COLOR_ARRAY_SIZE, LOC_CUSTOM, TYPE_INT, 0, NO_EXTRA },
+ { GL_CURRENT_FOG_COORDINATE, CONTEXT_FLOAT(Current.Attrib[VERT_ATTRIB_FOG][0]), extra_flush_current },
+ { GL_FOG_COORDINATE_ARRAY, ARRAY_BOOL(VertexAttrib[VERT_ATTRIB_FOG].Enabled), NO_EXTRA },
+ { GL_FOG_COORDINATE_ARRAY_TYPE, ARRAY_ENUM(VertexAttrib[VERT_ATTRIB_FOG].Type), NO_EXTRA },
+ { GL_FOG_COORDINATE_ARRAY_STRIDE, ARRAY_INT(VertexAttrib[VERT_ATTRIB_FOG].Stride), NO_EXTRA },
+ { GL_FOG_COORDINATE_SOURCE, CONTEXT_ENUM(Fog.FogCoordinateSource), NO_EXTRA },
+ { GL_FOG_DISTANCE_MODE_NV, CONTEXT_ENUM(Fog.FogDistanceMode), extra_NV_fog_distance },
+ { GL_RASTER_POSITION_UNCLIPPED_IBM, CONTEXT_BOOL(Transform.RasterPositionUnclipped), NO_EXTRA },
+ { GL_POINT_SPRITE_R_MODE_NV, CONTEXT_ENUM(Point.SpriteRMode), extra_NV_point_sprite },
+ { GL_POINT_SPRITE_COORD_ORIGIN, CONTEXT_ENUM(Point.SpriteOrigin), extra_NV_point_sprite_ARB_point_sprite },
+ { GL_TEXTURE_RECTANGLE_NV, LOC_CUSTOM, TYPE_BOOLEAN, 0, extra_NV_texture_rectangle },
+ { GL_TEXTURE_BINDING_RECTANGLE_NV, LOC_CUSTOM, TYPE_INT, TEXTURE_RECT_INDEX, extra_NV_texture_rectangle },
+ { GL_MAX_RECTANGLE_TEXTURE_SIZE_NV, CONTEXT_INT(Const.MaxTextureRectSize), extra_NV_texture_rectangle },
+ { GL_STENCIL_TEST_TWO_SIDE_EXT, CONTEXT_BOOL(Stencil.TestTwoSide), extra_EXT_stencil_two_side },
+ { GL_ACTIVE_STENCIL_FACE_EXT, LOC_CUSTOM, TYPE_ENUM, NO_OFFSET, NO_EXTRA },
+ { GL_MAX_SHININESS_NV, CONTEXT_FLOAT(Const.MaxShininess), NO_EXTRA },
+ { GL_MAX_SPOT_EXPONENT_NV, CONTEXT_FLOAT(Const.MaxSpotExponent), NO_EXTRA },
+ { GL_PRIMITIVE_RESTART_NV, CONTEXT_BOOL(Array.PrimitiveRestart), extra_NV_primitive_restart },
+ { GL_PRIMITIVE_RESTART_INDEX_NV, CONTEXT_INT(Array.RestartIndex), extra_NV_primitive_restart },
+ { GL_INDEX_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR_INDEX].BufferObj), NO_EXTRA },
+ { GL_EDGE_FLAG_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_EDGEFLAG].BufferObj), NO_EXTRA },
+ { GL_SECONDARY_COLOR_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_COLOR1].BufferObj), NO_EXTRA },
+ { GL_FOG_COORDINATE_ARRAY_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, offsetof(struct gl_vertex_array_object, BufferBinding[VERT_ATTRIB_FOG].BufferObj), NO_EXTRA },
+ { GL_VERTEX_PROGRAM_ARB, CONTEXT_BOOL(VertexProgram.Enabled), extra_ARB_vertex_program },
+ { GL_VERTEX_PROGRAM_POINT_SIZE_ARB, CONTEXT_BOOL(VertexProgram.PointSizeEnabled), extra_ARB_vertex_program },
+ { GL_VERTEX_PROGRAM_TWO_SIDE_ARB, CONTEXT_BOOL(VertexProgram.TwoSideEnabled), extra_ARB_vertex_program },
+ { GL_MAX_PROGRAM_MATRIX_STACK_DEPTH_ARB, CONTEXT_INT(Const.MaxProgramMatrixStackDepth), extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_MAX_PROGRAM_MATRICES_ARB, CONTEXT_INT(Const.MaxProgramMatrices), extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_CURRENT_MATRIX_STACK_DEPTH_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_CURRENT_MATRIX_ARB, LOC_CUSTOM, TYPE_MATRIX, 0, extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_TRANSPOSE_CURRENT_MATRIX_ARB, LOC_CUSTOM, TYPE_MATRIX_T, 0, extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_PROGRAM_ERROR_POSITION_ARB, CONTEXT_INT(Program.ErrorPos), extra_ARB_vertex_program_ARB_fragment_program },
+ { GL_FRAGMENT_PROGRAM_ARB, CONTEXT_BOOL(FragmentProgram.Enabled), extra_ARB_fragment_program },
+ { GL_RGBA_SIGNED_COMPONENTS_EXT, LOC_CUSTOM, TYPE_INT_4, 0, extra_EXT_packed_float },
+ { GL_DEPTH_BOUNDS_TEST_EXT, CONTEXT_BOOL(Depth.BoundsTest), extra_EXT_depth_bounds_test },
+ { GL_DEPTH_BOUNDS_EXT, CONTEXT_FLOAT2(Depth.BoundsMin), extra_EXT_depth_bounds_test },
+ { GL_DEPTH_CLAMP, CONTEXT_BOOL(Transform.DepthClamp), extra_ARB_depth_clamp },
+ { GL_FRAGMENT_SHADER_ATI, CONTEXT_BOOL(ATIFragmentShader.Enabled), extra_ATI_fragment_shader },
+ { GL_NUM_FRAGMENT_REGISTERS_ATI, CONST(6), extra_ATI_fragment_shader },
+ { GL_NUM_FRAGMENT_CONSTANTS_ATI, CONST(8), extra_ATI_fragment_shader },
+ { GL_NUM_PASSES_ATI, CONST(2), extra_ATI_fragment_shader },
+ { GL_NUM_INSTRUCTIONS_PER_PASS_ATI, CONST(8), extra_ATI_fragment_shader },
+ { GL_NUM_INSTRUCTIONS_TOTAL_ATI, CONST(16), extra_ATI_fragment_shader },
+ { GL_COLOR_ALPHA_PAIRING_ATI, CONST(GL_TRUE), extra_ATI_fragment_shader },
+ { GL_NUM_LOOPBACK_COMPONENTS_ATI, CONST(3), extra_ATI_fragment_shader },
+ { GL_NUM_INPUT_INTERPOLATOR_COMPONENTS_ATI, CONST(3), extra_ATI_fragment_shader },
+ { GL_PROVOKING_VERTEX_EXT, CONTEXT_ENUM(Light.ProvokingVertex), extra_EXT_provoking_vertex },
+ { GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION_EXT, CONTEXT_BOOL(Const.QuadsFollowProvokingVertexConvention), extra_EXT_provoking_vertex_32 },
+ { GL_TEXTURE_CUBE_MAP_SEAMLESS, CONTEXT_BOOL(Texture.CubeMapSeamless), extra_ARB_seamless_cube_map },
+ { GL_RGBA_INTEGER_MODE_EXT, LOC_CUSTOM, TYPE_INT, 0, extra_EXT_texture_integer_and_new_buffers },
+ { GL_MAX_TRANSFORM_FEEDBACK_BUFFERS, CONTEXT_INT(Const.MaxTransformFeedbackBuffers), extra_ARB_transform_feedback3 },
+ { GL_MAX_VERTEX_STREAMS, CONTEXT_INT(Const.MaxVertexStreams), extra_ARB_transform_feedback3_ARB_gpu_shader5 },
+ { GL_RGBA_FLOAT_MODE_ARB, BUFFER_FIELD(Visual.floatMode, TYPE_BOOLEAN), extra_core_ARB_color_buffer_float_and_new_buffers },
+ { GL_FRAMEBUFFER_SRGB_EXT, CONTEXT_BOOL(Color.sRGBEnabled), extra_EXT_framebuffer_sRGB },
+ { GL_FRAMEBUFFER_SRGB_CAPABLE_EXT, BUFFER_INT(Visual.sRGBCapable), extra_EXT_framebuffer_sRGB_and_new_buffers },
+ { GL_PRIMITIVE_RESTART, CONTEXT_BOOL(Array.PrimitiveRestart), extra_version_31 },
+ { GL_PRIMITIVE_RESTART_INDEX, CONTEXT_INT(Array.RestartIndex), extra_version_31 },
+ { GL_CONTEXT_PROFILE_MASK, CONTEXT_INT(Const.ProfileMask), extra_version_32 },
+ { GL_TIMESTAMP, LOC_CUSTOM, TYPE_INT64, 0, extra_ARB_timer_query },
+ { GL_MIN_MAP_BUFFER_ALIGNMENT, CONTEXT_INT(Const.MinMapBufferAlignment), NO_EXTRA },
+ { GL_MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB, CONTEXT_INT(Const.MaxProgramTextureGatherComponents), extra_ARB_texture_gather },
+ { GL_MAX_IMAGE_SAMPLES, CONTEXT_INT(Const.MaxImageSamples), extra_ARB_shader_image_load_store },
+ { GL_QUERY_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_query_buffer_object },
+ { GL_VBO_FREE_MEMORY_ATI, LOC_CUSTOM, TYPE_INT_4, NO_OFFSET, extra_ATI_meminfo },
+ { GL_TEXTURE_FREE_MEMORY_ATI, LOC_CUSTOM, TYPE_INT_4, NO_OFFSET, extra_ATI_meminfo },
+ { GL_RENDERBUFFER_FREE_MEMORY_ATI, LOC_CUSTOM, TYPE_INT_4, NO_OFFSET, extra_ATI_meminfo },
+ { GL_GPU_MEMORY_INFO_DEDICATED_VIDMEM_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info },
+ { GL_GPU_MEMORY_INFO_TOTAL_AVAILABLE_MEMORY_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info },
+ { GL_GPU_MEMORY_INFO_CURRENT_AVAILABLE_VIDMEM_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info },
+ { GL_GPU_MEMORY_INFO_EVICTION_COUNT_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info },
+ { GL_GPU_MEMORY_INFO_EVICTED_MEMORY_NVX, LOC_CUSTOM, TYPE_INT, NO_OFFSET, extra_NVX_gpu_memory_info },
+ { GL_MAX_CULL_DISTANCES, CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance },
+ { GL_MAX_COMBINED_CLIP_AND_CULL_DISTANCES, CONTEXT_INT(Const.MaxClipPlanes), extra_ARB_cull_distance },
+ { GL_MAX_COMPUTE_VARIABLE_GROUP_INVOCATIONS_ARB, CONTEXT_INT(Const.MaxComputeVariableGroupInvocations), extra_ARB_compute_variable_group_size },
+ { GL_SPARSE_BUFFER_PAGE_SIZE_ARB, CONTEXT_INT(Const.SparseBufferPageSize), extra_ARB_sparse_buffer },
+ { GL_MAX_SUBROUTINES, CONST(MAX_SUBROUTINES), NO_EXTRA },
+ { GL_MAX_SUBROUTINE_UNIFORM_LOCATIONS, CONST(MAX_SUBROUTINE_UNIFORM_LOCATIONS), NO_EXTRA },
+ { GL_PARAMETER_BUFFER_BINDING_ARB, LOC_CUSTOM, TYPE_INT, 0, extra_ARB_indirect_parameters },
+};
+
+static table_t table_API_OPENGL = {
+ 92, 533, 471, 0,
+ 149, 210, 0, 0,
+ 0, 475, 0, 118,
+ 284, 0, 0, 0,
+ 0, 0, 317, 579,
+ 262, 241, 0, 609,
+ 0, 0, 0, 453,
+ 0, 0, 0, 476,
+ 585, 0, 191, 333,
+ 0, 0, 176, 161,
+ 508, 144, 150, 6,
+ 0, 0, 0, 0,
+ 320, 0, 0, 266,
+ 151, 0, 442, 0,
+ 64, 600, 0, 0,
+ 0, 237, 326, 0,
+ 576, 0, 0, 225,
+ 0, 0, 467, 289,
+ 0, 589, 399, 86,
+ 537, 500, 232, 0,
+ 0, 438, 0, 276,
+ 155, 0, 0, 0,
+ 249, 93, 534, 0,
+ 0, 154, 0, 0,
+ 120, 248, 444, 0,
+ 406, 285, 300, 0,
+ 0, 0, 0, 318,
+ 291, 0, 396, 0,
+ 0, 0, 0, 0,
+ 454, 0, 0, 0,
+ 134, 0, 0, 193,
+ 242, 0, 0, 177,
+ 277, 43, 128, 0,
+ 196, 0, 0, 0,
+ 0, 411, 73, 0,
+ 0, 412, 0, 0,
+ 143, 619, 0, 0,
+ 574, 0, 303, 0,
+ 0, 577, 0, 0,
+ 224, 556, 0, 468,
+ 0, 0, 590, 400,
+ 85, 538, 516, 80,
+ 20, 0, 0, 214,
+ 527, 159, 545, 614,
+ 434, 565, 94, 0,
+ 435, 0, 136, 0,
+ 578, 429, 264, 445,
+ 0, 417, 0, 302,
+ 0, 0, 561, 0,
+ 315, 0, 0, 0,
+ 0, 427, 0, 0,
+ 0, 455, 0, 0,
+ 42, 135, 244, 0,
+ 192, 336, 0, 0,
+ 178, 163, 219, 452,
+ 581, 198, 0, 0,
+ 106, 0, 0, 74,
+ 0, 0, 413, 0,
+ 0, 141, 620, 0,
+ 297, 0, 403, 309,
+ 598, 308, 82, 255,
+ 0, 226, 0, 0,
+ 469, 0, 0, 593,
+ 0, 83, 539, 517,
+ 234, 21, 0, 0,
+ 212, 528, 162, 419,
+ 615, 503, 566, 95,
+ 0, 501, 240, 148,
+ 39, 0, 122, 265,
+ 0, 0, 420, 0,
+ 296, 107, 0, 562,
+ 0, 316, 0, 0,
+ 571, 0, 428, 0,
+ 0, 0, 456, 0,
+ 0, 432, 23, 555,
+ 0, 44, 335, 0,
+ 488, 567, 164, 139,
+ 124, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 115,
+ 493, 0, 142, 235,
+ 0, 0, 0, 0,
+ 0, 404, 327, 84,
+ 0, 0, 0, 0,
+ 449, 601, 0, 0,
+ 592, 0, 0, 0,
+ 431, 479, 0, 338,
+ 607, 213, 0, 521,
+ 510, 616, 424, 554,
+ 96, 0, 0, 0,
+ 153, 33, 466, 126,
+ 208, 0, 0, 418,
+ 0, 328, 108, 0,
+ 0, 0, 321, 584,
+ 0, 0, 0, 0,
+ 0, 415, 0, 457,
+ 405, 247, 29, 473,
+ 0, 595, 559, 197,
+ 50, 491, 179, 165,
+ 187, 552, 0, 200,
+ 30, 0, 2, 0,
+ 238, 334, 0, 0,
+ 481, 497, 218, 280,
+ 0, 330, 0, 0,
+ 0, 0, 575, 0,
+ 0, 256, 0, 0,
+ 0, 450, 602, 0,
+ 0, 591, 0, 563,
+ 474, 250, 188, 312,
+ 0, 0, 75, 273,
+ 166, 180, 617, 505,
+ 509, 97, 0, 0,
+ 103, 77, 35, 0,
+ 123, 209, 71, 0,
+ 421, 0, 329, 109,
+ 0, 0, 0, 0,
+ 0, 0, 557, 274,
+ 504, 0, 0, 0,
+ 458, 0, 0, 17,
+ 0, 245, 304, 0,
+ 46, 49, 489, 568,
+ 520, 25, 0, 0,
+ 201, 31, 0, 0,
+ 0, 0, 604, 0,
+ 12, 0, 499, 0,
+ 278, 0, 0, 0,
+ 0, 603, 0, 0,
+ 610, 0, 257, 0,
+ 27, 0, 460, 313,
+ 0, 0, 0, 0,
+ 564, 91, 68, 190,
+ 0, 0, 0, 76,
+ 582, 526, 512, 618,
+ 0, 271, 98, 0,
+ 0, 104, 606, 40,
+ 0, 125, 0, 72,
+ 127, 416, 588, 0,
+ 110, 0, 0, 0,
+ 0, 307, 0, 252,
+ 275, 0, 0, 0,
+ 459, 0, 211, 246,
+ 4, 0, 145, 305,
+ 560, 171, 52, 487,
+ 569, 522, 19, 550,
+ 502, 202, 0, 611,
+ 0, 0, 558, 608,
+ 0, 13, 0, 426,
+ 0, 279, 0, 0,
+ 299, 0, 55, 0,
+ 0, 0, 0, 259,
+ 549, 495, 0, 461,
+ 314, 0, 0, 0,
+ 173, 0, 78, 69,
+ 189, 269, 331, 0,
+ 61, 583, 156, 513,
+ 0, 0, 0, 99,
+ 131, 0, 105, 0,
+ 34, 0, 121, 0,
+ 290, 18, 0, 0,
+ 295, 111, 0, 0,
+ 0, 0, 0, 482,
+ 253, 525, 0, 0,
+ 0, 462, 0, 215,
+ 0, 1, 0, 146,
+ 306, 0, 170, 51,
+ 486, 174, 523, 507,
+ 543, 0, 203, 0,
+ 612, 0, 0, 0,
+ 132, 0, 14, 0,
+ 7, 0, 323, 0,
+ 87, 301, 0, 56,
+ 0, 0, 310, 0,
+ 258, 551, 496, 0,
+ 492, 319, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 0,
+ 0, 62, 0, 157,
+ 0, 0, 63, 0,
+ 573, 447, 430, 0,
+ 0, 36, 0, 0,
+ 100, 339, 129, 0,
+ 0, 0, 112, 0,
+ 0, 233, 0, 0,
+ 0, 254, 0, 0,
+ 506, 0, 463, 0,
+ 216, 0, 9, 0,
+ 147, 251, 0, 540,
+ 0, 485, 57, 524,
+ 0, 544, 0, 204,
+ 594, 613, 0, 0,
+ 0, 138, 0, 10,
+ 410, 8, 194, 325,
+ 116, 341, 298, 0,
+ 0, 0, 0, 311,
+ 0, 260, 0, 0,
+ 0, 498, 0, 0,
+ 448, 0, 0, 0,
+ 477, 402, 0, 270,
+ 0, 0, 59, 553,
+ 158, 0, 0, 28,
+ 433, 53, 130, 408,
+ 572, 0, 37, 0,
+ 0, 439, 0, 443,
+ 0, 0, 0, 113,
+ 0, 0, 480, 0,
+ 0, 0, 0, 0,
+ 228, 152, 0, 464,
+ 0, 217, 586, 32,
+ 0, 119, 436, 0,
+ 541, 0, 490, 175,
+ 167, 186, 548, 294,
+ 205, 0, 229, 605,
+ 15, 0, 45, 221,
+ 11, 409, 16, 195,
+ 324, 414, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 90,
+ 0, 0, 322, 0,
+ 530, 451, 0, 0,
+ 0, 472, 423, 0,
+ 515, 0, 0, 60,
+ 66, 518, 0, 596,
+ 26, 437, 340, 529,
+ 407, 267, 0, 38,
+ 401, 0, 102, 622,
+ 440, 0, 0, 0,
+ 114, 0, 0, 0,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 465, 0, 580, 587,
+ 397, 0, 535, 172,
+ 236, 542, 292, 484,
+ 58, 168, 207, 546,
+ 425, 286, 0, 230,
+ 532, 470, 0, 137,
+ 0, 0, 570, 0,
+ 446, 0, 117, 288,
+ 0, 0, 0, 0,
+ 0, 337, 0, 261,
+ 243, 621, 0, 0,
+ 0, 531, 65, 0,
+ 0, 0, 133, 422,
+ 0, 514, 332, 519,
+ 0, 67, 160, 0,
+ 140, 494, 5, 0,
+ 0, 70, 268, 0,
+ 41, 0, 0, 101,
+ 0, 441, 0, 599,
+ 81, 0, 0, 0,
+ 0, 89, 239, 0,
+ 263, 0, 223, 511,
+ 0, 79, 597, 206,
+ 478, 398, 272, 536,
+ 47, 231, 0, 293,
+ 483, 0, 169, 220,
+ 547, 222, 287, 0,
+};
+
+static table_t table_API_OPENGLES = {
+ 92, 0, 0, 0,
+ 149, 0, 0, 0,
+ 0, 0, 0, 118,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 283, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 176, 161,
+ 0, 144, 150, 6,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 151, 0, 0, 0,
+ 64, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 86,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 155, 0, 0, 0,
+ 0, 93, 0, 0,
+ 0, 154, 0, 0,
+ 120, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 134, 0, 0, 0,
+ 0, 0, 0, 177,
+ 0, 43, 128, 0,
+ 0, 0, 0, 0,
+ 0, 0, 73, 0,
+ 0, 0, 0, 0,
+ 143, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 85, 0, 0, 80,
+ 20, 0, 0, 0,
+ 0, 159, 0, 0,
+ 0, 0, 94, 0,
+ 0, 0, 136, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 282,
+ 42, 135, 0, 0,
+ 0, 0, 0, 0,
+ 178, 163, 0, 0,
+ 0, 0, 0, 0,
+ 106, 0, 0, 74,
+ 0, 0, 0, 0,
+ 0, 141, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 82, 0,
+ 0, 0, 0, 0,
+ 0, 0, 182, 0,
+ 0, 83, 0, 0,
+ 0, 21, 0, 0,
+ 0, 0, 162, 0,
+ 0, 0, 0, 95,
+ 0, 0, 0, 148,
+ 39, 0, 122, 0,
+ 0, 0, 0, 0,
+ 0, 107, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 23, 0,
+ 0, 44, 0, 0,
+ 0, 0, 164, 139,
+ 124, 54, 0, 0,
+ 0, 3, 0, 0,
+ 181, 0, 0, 115,
+ 0, 0, 142, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 84,
+ 0, 0, 0, 0,
+ 0, 0, 0, 183,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 96, 0, 0, 0,
+ 153, 33, 0, 126,
+ 0, 0, 0, 0,
+ 0, 0, 108, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 29, 0,
+ 0, 0, 0, 0,
+ 50, 0, 179, 165,
+ 0, 0, 0, 0,
+ 30, 0, 2, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 75, 0,
+ 166, 180, 0, 0,
+ 0, 97, 0, 0,
+ 103, 77, 35, 0,
+ 123, 0, 71, 0,
+ 0, 0, 0, 109,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 17,
+ 0, 0, 0, 0,
+ 46, 49, 0, 0,
+ 0, 25, 0, 0,
+ 0, 31, 0, 0,
+ 0, 0, 0, 0,
+ 12, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 27, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 91, 68, 0,
+ 0, 0, 0, 76,
+ 0, 0, 0, 0,
+ 0, 0, 98, 0,
+ 0, 104, 0, 40,
+ 0, 125, 0, 72,
+ 127, 0, 0, 0,
+ 110, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 4, 0, 145, 0,
+ 0, 171, 52, 0,
+ 0, 0, 19, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 184,
+ 0, 13, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 55, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 173, 0, 78, 69,
+ 0, 0, 0, 0,
+ 61, 0, 156, 0,
+ 0, 0, 0, 99,
+ 131, 0, 105, 0,
+ 34, 0, 121, 0,
+ 0, 18, 0, 0,
+ 0, 111, 0, 0,
+ 0, 0, 281, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 1, 0, 146,
+ 0, 0, 170, 51,
+ 0, 174, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 132, 0, 14, 0,
+ 7, 0, 0, 0,
+ 87, 0, 0, 56,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 0,
+ 0, 62, 0, 157,
+ 0, 0, 63, 0,
+ 0, 0, 0, 0,
+ 0, 36, 0, 0,
+ 100, 0, 129, 0,
+ 0, 0, 112, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 9, 0,
+ 147, 0, 0, 0,
+ 0, 0, 57, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 138, 0, 10,
+ 0, 8, 0, 0,
+ 116, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 59, 0,
+ 158, 0, 0, 28,
+ 0, 53, 130, 0,
+ 0, 0, 37, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 113,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 152, 0, 0,
+ 0, 0, 0, 32,
+ 0, 119, 0, 0,
+ 0, 0, 0, 175,
+ 167, 0, 0, 0,
+ 0, 0, 0, 0,
+ 15, 0, 45, 0,
+ 11, 0, 16, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 90,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 60,
+ 66, 0, 0, 0,
+ 26, 0, 0, 0,
+ 0, 0, 0, 38,
+ 0, 0, 102, 0,
+ 0, 0, 0, 0,
+ 114, 0, 0, 0,
+ 88, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 172,
+ 0, 0, 0, 0,
+ 58, 168, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 137,
+ 0, 0, 0, 0,
+ 0, 0, 117, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 65, 0,
+ 0, 0, 133, 0,
+ 0, 0, 0, 0,
+ 0, 67, 160, 0,
+ 140, 0, 5, 0,
+ 0, 70, 0, 0,
+ 41, 0, 0, 101,
+ 0, 0, 0, 0,
+ 81, 0, 0, 0,
+ 0, 89, 0, 0,
+ 0, 0, 0, 0,
+ 0, 79, 0, 0,
+ 0, 0, 0, 0,
+ 47, 240, 0, 0,
+ 0, 0, 169, 0,
+ 0, 0, 0, 0,
+};
+
+static table_t table_API_OPENGLES2 = {
+ 211, 0, 0, 185,
+ 0, 210, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 283, 0, 0,
+ 0, 0, 191, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 6,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 64, 0, 0, 0,
+ 0, 237, 0, 0,
+ 0, 0, 0, 225,
+ 0, 0, 0, 0,
+ 0, 0, 0, 86,
+ 0, 0, 232, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 215, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 193,
+ 0, 0, 0, 0,
+ 0, 43, 0, 0,
+ 196, 0, 0, 0,
+ 0, 0, 73, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 224, 0, 0, 0,
+ 0, 0, 0, 0,
+ 85, 0, 0, 80,
+ 20, 0, 0, 214,
+ 0, 0, 0, 0,
+ 0, 0, 216, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 282,
+ 42, 0, 0, 0,
+ 192, 0, 0, 0,
+ 0, 0, 219, 0,
+ 0, 198, 0, 0,
+ 0, 0, 0, 74,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 82, 0,
+ 0, 226, 0, 0,
+ 0, 0, 0, 0,
+ 0, 83, 0, 0,
+ 234, 21, 0, 0,
+ 212, 0, 0, 0,
+ 0, 0, 0, 217,
+ 0, 0, 0, 0,
+ 39, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 23, 0,
+ 0, 44, 0, 0,
+ 0, 0, 0, 0,
+ 0, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 235,
+ 0, 0, 0, 0,
+ 0, 0, 0, 84,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 213, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 33, 0, 0,
+ 208, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 29, 0,
+ 0, 0, 0, 197,
+ 50, 0, 0, 0,
+ 187, 0, 0, 200,
+ 30, 0, 2, 0,
+ 238, 0, 0, 0,
+ 0, 0, 218, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 188, 0,
+ 0, 0, 75, 0,
+ 0, 0, 0, 0,
+ 0, 206, 0, 0,
+ 233, 77, 35, 0,
+ 0, 209, 71, 0,
+ 0, 0, 0, 222,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 17,
+ 0, 0, 0, 0,
+ 46, 49, 0, 0,
+ 0, 25, 0, 0,
+ 201, 31, 0, 0,
+ 0, 0, 0, 0,
+ 12, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 27, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 68, 190,
+ 0, 0, 0, 76,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 40,
+ 0, 0, 0, 72,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 4, 0, 0, 0,
+ 0, 0, 52, 0,
+ 0, 0, 19, 0,
+ 0, 202, 0, 0,
+ 0, 0, 0, 0,
+ 0, 13, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 55, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 78, 69,
+ 189, 0, 0, 0,
+ 61, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 34, 0, 0, 0,
+ 0, 18, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 281, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 0, 51,
+ 0, 0, 0, 0,
+ 0, 0, 203, 0,
+ 0, 0, 0, 0,
+ 0, 0, 14, 0,
+ 7, 0, 0, 0,
+ 87, 0, 0, 56,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 0,
+ 0, 62, 0, 0,
+ 0, 0, 63, 0,
+ 0, 0, 0, 0,
+ 0, 36, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 9, 0,
+ 0, 0, 0, 0,
+ 0, 0, 57, 0,
+ 0, 0, 0, 204,
+ 0, 0, 0, 0,
+ 0, 0, 0, 10,
+ 0, 8, 194, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 59, 0,
+ 0, 0, 0, 28,
+ 0, 53, 0, 0,
+ 0, 0, 37, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 228, 0, 0, 0,
+ 0, 0, 0, 32,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 186, 0, 0,
+ 205, 0, 229, 0,
+ 15, 0, 45, 221,
+ 11, 0, 16, 195,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 90,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 60,
+ 66, 0, 0, 0,
+ 26, 0, 0, 0,
+ 0, 0, 0, 38,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 236, 0, 0, 0,
+ 58, 0, 207, 0,
+ 0, 0, 0, 230,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 65, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 67, 0, 0,
+ 0, 0, 5, 0,
+ 0, 70, 0, 0,
+ 41, 0, 0, 0,
+ 0, 0, 0, 0,
+ 81, 0, 0, 0,
+ 0, 89, 239, 0,
+ 0, 0, 223, 0,
+ 0, 79, 0, 0,
+ 0, 0, 0, 0,
+ 47, 231, 0, 0,
+ 0, 0, 0, 220,
+ 0, 0, 0, 0,
+};
+
+static table_t table_API_OPENGLES3 = {
+ 211, 0, 0, 185,
+ 0, 210, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 262, 241, 0, 0,
+ 0, 0, 0, 0,
+ 0, 283, 0, 0,
+ 0, 0, 191, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 6,
+ 0, 0, 0, 0,
+ 0, 0, 0, 266,
+ 0, 0, 0, 0,
+ 64, 0, 0, 0,
+ 0, 237, 0, 0,
+ 0, 0, 0, 225,
+ 0, 0, 0, 0,
+ 0, 0, 0, 86,
+ 0, 0, 232, 0,
+ 0, 0, 0, 276,
+ 0, 0, 0, 0,
+ 249, 215, 0, 0,
+ 0, 0, 0, 0,
+ 0, 248, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 193,
+ 242, 0, 0, 0,
+ 277, 43, 0, 0,
+ 196, 0, 0, 0,
+ 0, 0, 73, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 224, 0, 0, 0,
+ 0, 0, 0, 0,
+ 85, 0, 0, 80,
+ 20, 0, 0, 214,
+ 0, 0, 0, 0,
+ 0, 0, 216, 0,
+ 0, 0, 0, 0,
+ 0, 0, 264, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 282,
+ 42, 0, 244, 0,
+ 192, 0, 0, 0,
+ 0, 0, 219, 0,
+ 0, 198, 0, 0,
+ 0, 0, 0, 74,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 82, 255,
+ 0, 226, 0, 0,
+ 0, 0, 0, 0,
+ 0, 83, 0, 0,
+ 234, 21, 0, 0,
+ 212, 0, 0, 0,
+ 0, 0, 0, 217,
+ 0, 0, 240, 0,
+ 39, 0, 0, 265,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 185, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 23, 0,
+ 0, 44, 0, 0,
+ 0, 0, 0, 0,
+ 0, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 235,
+ 0, 0, 0, 0,
+ 0, 0, 0, 84,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 213, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 33, 0, 0,
+ 208, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 247, 29, 0,
+ 0, 0, 0, 197,
+ 50, 0, 0, 0,
+ 187, 0, 0, 200,
+ 30, 0, 2, 0,
+ 238, 0, 0, 0,
+ 0, 0, 218, 280,
+ 0, 0, 0, 0,
+ 0, 0, 0, 342,
+ 0, 256, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 250, 188, 0,
+ 0, 0, 75, 273,
+ 0, 0, 0, 0,
+ 0, 206, 0, 0,
+ 233, 77, 35, 0,
+ 0, 209, 71, 0,
+ 0, 0, 0, 222,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 17,
+ 0, 245, 0, 0,
+ 46, 49, 0, 0,
+ 0, 25, 0, 0,
+ 201, 31, 0, 0,
+ 0, 0, 0, 0,
+ 12, 0, 0, 0,
+ 278, 0, 0, 0,
+ 0, 0, 0, 0,
+ 343, 0, 257, 0,
+ 27, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 68, 190,
+ 0, 0, 0, 76,
+ 0, 0, 0, 0,
+ 0, 271, 0, 0,
+ 0, 0, 0, 40,
+ 0, 0, 0, 72,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 252,
+ 0, 0, 0, 0,
+ 0, 0, 0, 246,
+ 4, 0, 0, 0,
+ 0, 0, 52, 0,
+ 0, 0, 19, 0,
+ 0, 202, 0, 0,
+ 0, 0, 0, 0,
+ 0, 13, 0, 0,
+ 0, 279, 0, 0,
+ 0, 0, 55, 0,
+ 0, 344, 0, 259,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 78, 69,
+ 189, 269, 0, 0,
+ 61, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 34, 0, 0, 0,
+ 0, 18, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 281, 0,
+ 253, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 1, 0, 0,
+ 0, 0, 0, 51,
+ 0, 0, 0, 0,
+ 0, 0, 203, 0,
+ 0, 0, 0, 0,
+ 0, 0, 14, 0,
+ 7, 0, 0, 0,
+ 87, 0, 0, 56,
+ 0, 0, 0, 0,
+ 258, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 0,
+ 0, 62, 0, 0,
+ 0, 0, 63, 0,
+ 0, 0, 0, 0,
+ 0, 36, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 272, 0, 0,
+ 0, 254, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 9, 0,
+ 0, 251, 0, 0,
+ 0, 0, 57, 0,
+ 0, 0, 0, 204,
+ 0, 0, 0, 0,
+ 0, 0, 0, 10,
+ 0, 8, 194, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 260, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 270,
+ 0, 0, 59, 0,
+ 0, 0, 0, 28,
+ 0, 53, 0, 0,
+ 0, 0, 37, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 228, 0, 0, 0,
+ 0, 0, 0, 32,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 186, 0, 0,
+ 205, 0, 229, 0,
+ 15, 0, 45, 221,
+ 11, 0, 16, 195,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 90,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 60,
+ 66, 0, 0, 0,
+ 26, 0, 0, 0,
+ 0, 267, 0, 38,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 236, 0, 0, 0,
+ 58, 274, 207, 0,
+ 0, 0, 0, 230,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 261,
+ 243, 0, 0, 0,
+ 0, 0, 65, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 67, 0, 0,
+ 0, 0, 5, 0,
+ 0, 70, 268, 0,
+ 41, 0, 0, 0,
+ 0, 0, 0, 0,
+ 81, 0, 0, 0,
+ 0, 89, 239, 0,
+ 263, 0, 223, 0,
+ 0, 79, 0, 0,
+ 0, 0, 0, 0,
+ 47, 231, 0, 0,
+ 0, 0, 275, 220,
+ 0, 0, 0, 0,
+};
+
+static table_t table_API_OPENGLES31 = {
+ 211, 0, 0, 185,
+ 0, 210, 0, 0,
+ 0, 0, 0, 0,
+ 284, 376, 388, 0,
+ 0, 0, 317, 0,
+ 262, 241, 0, 366,
+ 0, 0, 0, 0,
+ 0, 283, 0, 0,
+ 392, 0, 191, 333,
+ 0, 0, 0, 0,
+ 0, 0, 0, 6,
+ 0, 0, 0, 0,
+ 320, 0, 0, 266,
+ 0, 0, 0, 0,
+ 64, 0, 0, 0,
+ 0, 237, 326, 0,
+ 0, 0, 0, 225,
+ 0, 0, 0, 289,
+ 0, 0, 0, 86,
+ 0, 0, 232, 0,
+ 0, 0, 0, 276,
+ 0, 0, 0, 0,
+ 249, 215, 0, 0,
+ 0, 0, 0, 0,
+ 0, 248, 0, 0,
+ 0, 285, 300, 393,
+ 0, 0, 0, 318,
+ 291, 0, 369, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 193,
+ 242, 0, 0, 0,
+ 277, 43, 0, 0,
+ 196, 0, 0, 0,
+ 0, 0, 73, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 303, 0,
+ 0, 0, 0, 0,
+ 224, 0, 0, 0,
+ 0, 0, 0, 0,
+ 85, 0, 0, 80,
+ 20, 0, 0, 214,
+ 0, 0, 0, 0,
+ 0, 0, 216, 0,
+ 0, 0, 0, 0,
+ 0, 0, 264, 0,
+ 0, 0, 0, 302,
+ 0, 0, 0, 0,
+ 315, 0, 0, 370,
+ 0, 0, 0, 0,
+ 0, 0, 0, 282,
+ 42, 0, 244, 0,
+ 192, 336, 0, 0,
+ 0, 0, 219, 0,
+ 0, 198, 0, 0,
+ 0, 0, 0, 74,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 297, 0, 389, 309,
+ 0, 308, 82, 255,
+ 0, 226, 0, 0,
+ 0, 0, 0, 0,
+ 0, 83, 0, 0,
+ 234, 21, 0, 0,
+ 212, 0, 0, 0,
+ 0, 0, 0, 217,
+ 0, 0, 240, 0,
+ 39, 0, 0, 265,
+ 0, 0, 0, 0,
+ 296, 294, 0, 0,
+ 185, 316, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 23, 346,
+ 0, 44, 335, 0,
+ 0, 0, 0, 0,
+ 0, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 235,
+ 0, 377, 0, 0,
+ 0, 0, 327, 84,
+ 384, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 363, 0,
+ 0, 0, 0, 338,
+ 0, 213, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 33, 0, 0,
+ 208, 0, 0, 0,
+ 0, 328, 0, 0,
+ 0, 356, 321, 0,
+ 0, 371, 0, 0,
+ 0, 0, 0, 0,
+ 0, 247, 29, 0,
+ 347, 0, 0, 197,
+ 50, 0, 0, 0,
+ 187, 0, 0, 200,
+ 30, 0, 2, 0,
+ 238, 334, 0, 0,
+ 0, 0, 218, 280,
+ 0, 330, 379, 0,
+ 0, 367, 352, 342,
+ 0, 256, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 364,
+ 0, 250, 188, 312,
+ 0, 0, 75, 273,
+ 0, 0, 0, 0,
+ 0, 206, 0, 0,
+ 233, 77, 35, 0,
+ 0, 209, 71, 0,
+ 0, 0, 329, 222,
+ 0, 0, 355, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 17,
+ 0, 245, 304, 0,
+ 46, 49, 0, 0,
+ 0, 25, 0, 0,
+ 201, 31, 0, 0,
+ 0, 0, 0, 0,
+ 12, 0, 0, 0,
+ 278, 0, 0, 375,
+ 0, 0, 368, 354,
+ 343, 0, 257, 0,
+ 27, 0, 0, 313,
+ 0, 0, 0, 0,
+ 0, 0, 68, 190,
+ 0, 0, 0, 76,
+ 0, 0, 0, 0,
+ 0, 271, 0, 0,
+ 0, 0, 0, 40,
+ 0, 0, 0, 72,
+ 0, 0, 0, 0,
+ 0, 0, 0, 357,
+ 0, 307, 0, 252,
+ 0, 0, 0, 0,
+ 0, 0, 0, 246,
+ 4, 0, 0, 305,
+ 0, 0, 52, 0,
+ 0, 0, 19, 0,
+ 0, 202, 0, 0,
+ 0, 0, 0, 0,
+ 0, 13, 0, 345,
+ 0, 279, 0, 0,
+ 299, 0, 55, 0,
+ 353, 344, 0, 259,
+ 0, 0, 0, 0,
+ 314, 0, 0, 0,
+ 0, 0, 78, 69,
+ 189, 269, 331, 0,
+ 61, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 34, 0, 0, 0,
+ 290, 18, 0, 0,
+ 295, 0, 0, 0,
+ 358, 0, 281, 0,
+ 253, 0, 0, 351,
+ 0, 0, 0, 0,
+ 0, 1, 0, 0,
+ 306, 0, 0, 51,
+ 0, 0, 0, 0,
+ 0, 0, 203, 0,
+ 0, 0, 0, 0,
+ 337, 0, 14, 0,
+ 7, 365, 323, 0,
+ 87, 301, 0, 56,
+ 0, 0, 310, 0,
+ 258, 0, 0, 0,
+ 0, 319, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 381,
+ 0, 62, 0, 0,
+ 0, 0, 63, 0,
+ 0, 0, 0, 0,
+ 0, 36, 0, 0,
+ 0, 339, 0, 0,
+ 0, 0, 0, 0,
+ 0, 272, 0, 0,
+ 0, 254, 0, 0,
+ 349, 0, 0, 0,
+ 0, 0, 9, 0,
+ 0, 251, 0, 0,
+ 374, 0, 57, 0,
+ 0, 0, 0, 204,
+ 0, 0, 0, 0,
+ 0, 0, 0, 10,
+ 0, 8, 194, 325,
+ 0, 341, 298, 0,
+ 0, 0, 0, 311,
+ 0, 260, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 390, 0, 270,
+ 382, 0, 59, 0,
+ 0, 0, 0, 28,
+ 0, 53, 0, 0,
+ 0, 0, 37, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 360, 0,
+ 0, 0, 0, 0,
+ 228, 350, 0, 0,
+ 0, 0, 0, 32,
+ 0, 0, 0, 0,
+ 0, 372, 0, 0,
+ 0, 186, 0, 0,
+ 205, 0, 229, 0,
+ 15, 0, 45, 221,
+ 11, 0, 16, 195,
+ 324, 0, 348, 378,
+ 0, 0, 0, 0,
+ 0, 0, 385, 90,
+ 0, 0, 322, 0,
+ 0, 0, 0, 0,
+ 0, 0, 391, 0,
+ 0, 383, 0, 60,
+ 66, 0, 0, 0,
+ 26, 0, 340, 0,
+ 387, 267, 0, 38,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 361,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 236, 0, 292, 0,
+ 58, 274, 207, 0,
+ 0, 286, 0, 230,
+ 0, 0, 0, 0,
+ 373, 0, 0, 0,
+ 0, 0, 0, 288,
+ 380, 0, 0, 0,
+ 0, 0, 0, 261,
+ 243, 0, 0, 0,
+ 0, 0, 65, 0,
+ 0, 0, 0, 386,
+ 0, 0, 332, 0,
+ 0, 67, 0, 0,
+ 0, 0, 5, 0,
+ 0, 70, 268, 0,
+ 41, 0, 0, 0,
+ 0, 0, 0, 0,
+ 81, 0, 0, 0,
+ 362, 89, 239, 0,
+ 263, 0, 223, 0,
+ 0, 79, 0, 0,
+ 0, 0, 359, 0,
+ 47, 231, 0, 293,
+ 0, 0, 275, 220,
+ 0, 0, 287, 0,
+};
+
+static table_t table_API_OPENGLES32 = {
+ 211, 0, 0, 185,
+ 0, 210, 0, 0,
+ 0, 0, 0, 0,
+ 284, 376, 388, 0,
+ 0, 0, 317, 0,
+ 262, 241, 0, 366,
+ 0, 0, 0, 0,
+ 0, 283, 0, 0,
+ 392, 0, 191, 333,
+ 0, 0, 0, 0,
+ 0, 0, 0, 6,
+ 0, 0, 0, 0,
+ 320, 0, 395, 266,
+ 0, 0, 0, 0,
+ 64, 0, 0, 0,
+ 0, 237, 326, 0,
+ 0, 0, 0, 225,
+ 0, 0, 0, 289,
+ 0, 0, 0, 86,
+ 0, 0, 232, 0,
+ 0, 0, 0, 276,
+ 0, 0, 0, 0,
+ 249, 215, 0, 0,
+ 0, 0, 0, 0,
+ 0, 248, 0, 0,
+ 0, 285, 300, 393,
+ 0, 0, 0, 318,
+ 291, 0, 369, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 193,
+ 242, 0, 0, 0,
+ 277, 43, 0, 0,
+ 196, 0, 0, 0,
+ 0, 0, 73, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 303, 0,
+ 0, 0, 0, 0,
+ 224, 0, 0, 0,
+ 0, 0, 0, 0,
+ 85, 0, 0, 80,
+ 20, 0, 0, 214,
+ 0, 0, 0, 0,
+ 0, 0, 216, 0,
+ 0, 0, 0, 0,
+ 0, 0, 264, 0,
+ 0, 0, 0, 302,
+ 0, 0, 0, 0,
+ 315, 0, 0, 370,
+ 0, 0, 0, 0,
+ 0, 0, 0, 282,
+ 42, 0, 244, 0,
+ 192, 336, 0, 0,
+ 0, 0, 219, 0,
+ 0, 198, 0, 0,
+ 0, 0, 0, 74,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 297, 0, 389, 309,
+ 0, 308, 82, 255,
+ 0, 226, 0, 0,
+ 0, 0, 0, 0,
+ 0, 83, 0, 0,
+ 234, 21, 0, 0,
+ 212, 0, 0, 0,
+ 0, 0, 0, 217,
+ 0, 0, 240, 0,
+ 39, 0, 0, 265,
+ 0, 0, 0, 0,
+ 296, 294, 0, 0,
+ 185, 316, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 23, 346,
+ 0, 44, 335, 0,
+ 0, 0, 0, 0,
+ 0, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 235,
+ 0, 377, 0, 0,
+ 0, 0, 327, 84,
+ 384, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 363, 0,
+ 0, 0, 0, 338,
+ 0, 213, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 33, 0, 0,
+ 208, 0, 0, 0,
+ 0, 328, 0, 0,
+ 0, 356, 321, 0,
+ 0, 371, 0, 0,
+ 0, 0, 0, 0,
+ 0, 247, 29, 0,
+ 347, 0, 0, 197,
+ 50, 0, 0, 0,
+ 187, 0, 0, 200,
+ 30, 0, 2, 0,
+ 238, 334, 0, 0,
+ 0, 0, 218, 280,
+ 0, 330, 379, 0,
+ 0, 367, 352, 342,
+ 0, 256, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 364,
+ 0, 250, 188, 312,
+ 0, 0, 75, 273,
+ 0, 0, 0, 0,
+ 0, 206, 0, 0,
+ 233, 77, 35, 0,
+ 0, 209, 71, 0,
+ 0, 0, 329, 222,
+ 0, 0, 355, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 17,
+ 0, 245, 304, 0,
+ 46, 49, 0, 0,
+ 0, 25, 0, 0,
+ 201, 31, 0, 0,
+ 0, 0, 0, 0,
+ 12, 0, 0, 0,
+ 278, 0, 0, 375,
+ 0, 0, 368, 354,
+ 343, 0, 257, 0,
+ 27, 0, 0, 313,
+ 0, 0, 0, 0,
+ 0, 0, 68, 190,
+ 0, 0, 0, 76,
+ 0, 0, 0, 0,
+ 0, 271, 0, 0,
+ 0, 0, 0, 40,
+ 0, 0, 0, 72,
+ 0, 0, 0, 0,
+ 0, 0, 0, 357,
+ 0, 307, 0, 252,
+ 0, 0, 0, 0,
+ 0, 0, 0, 246,
+ 4, 0, 0, 305,
+ 0, 0, 52, 0,
+ 0, 0, 19, 0,
+ 0, 202, 0, 0,
+ 0, 0, 0, 0,
+ 0, 13, 0, 345,
+ 0, 279, 0, 0,
+ 299, 0, 55, 0,
+ 353, 344, 0, 259,
+ 0, 0, 0, 0,
+ 314, 0, 0, 0,
+ 0, 0, 78, 69,
+ 189, 269, 331, 0,
+ 61, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 34, 0, 0, 0,
+ 290, 18, 0, 0,
+ 295, 0, 0, 0,
+ 358, 0, 281, 0,
+ 253, 0, 0, 351,
+ 0, 0, 0, 0,
+ 0, 1, 0, 0,
+ 306, 0, 0, 51,
+ 0, 0, 0, 0,
+ 0, 0, 203, 0,
+ 0, 0, 0, 0,
+ 337, 0, 14, 0,
+ 7, 365, 323, 0,
+ 87, 301, 0, 56,
+ 0, 0, 310, 0,
+ 258, 0, 0, 0,
+ 0, 319, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 381,
+ 0, 62, 0, 0,
+ 0, 0, 63, 0,
+ 0, 0, 0, 0,
+ 0, 36, 0, 0,
+ 0, 339, 0, 0,
+ 0, 0, 0, 0,
+ 0, 272, 0, 0,
+ 0, 254, 0, 0,
+ 349, 0, 0, 0,
+ 0, 0, 9, 0,
+ 0, 251, 0, 0,
+ 374, 0, 57, 0,
+ 0, 0, 0, 204,
+ 0, 0, 0, 0,
+ 0, 0, 0, 10,
+ 0, 8, 194, 325,
+ 0, 341, 298, 0,
+ 0, 0, 0, 311,
+ 0, 260, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 390, 0, 270,
+ 382, 0, 59, 0,
+ 0, 0, 0, 28,
+ 0, 53, 0, 0,
+ 0, 0, 37, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 360, 0,
+ 0, 0, 0, 0,
+ 228, 350, 0, 0,
+ 0, 0, 0, 32,
+ 0, 0, 0, 0,
+ 0, 372, 0, 0,
+ 0, 186, 0, 0,
+ 205, 0, 229, 0,
+ 15, 0, 45, 221,
+ 11, 0, 16, 195,
+ 324, 0, 348, 378,
+ 0, 0, 0, 0,
+ 0, 0, 385, 90,
+ 0, 0, 322, 0,
+ 0, 0, 0, 0,
+ 0, 0, 391, 0,
+ 0, 383, 0, 60,
+ 66, 0, 0, 0,
+ 26, 0, 340, 0,
+ 387, 267, 0, 38,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 361,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 236, 0, 292, 0,
+ 58, 274, 207, 0,
+ 0, 286, 0, 230,
+ 0, 0, 0, 0,
+ 373, 0, 0, 0,
+ 0, 0, 0, 288,
+ 380, 0, 0, 0,
+ 0, 396, 0, 261,
+ 243, 0, 0, 0,
+ 0, 0, 65, 0,
+ 0, 0, 0, 386,
+ 0, 0, 332, 0,
+ 0, 67, 0, 0,
+ 0, 0, 5, 0,
+ 0, 70, 268, 0,
+ 41, 394, 0, 0,
+ 0, 0, 0, 0,
+ 81, 0, 0, 0,
+ 362, 89, 239, 0,
+ 263, 0, 223, 0,
+ 0, 79, 0, 0,
+ 0, 0, 359, 0,
+ 47, 231, 0, 293,
+ 0, 0, 275, 220,
+ 0, 0, 287, 0,
+};
+
+static table_t table_API_OPENGL_CORE = {
+ 92, 533, 471, 0,
+ 149, 210, 0, 0,
+ 0, 475, 0, 118,
+ 284, 376, 388, 0,
+ 0, 0, 317, 579,
+ 262, 241, 0, 366,
+ 0, 0, 0, 453,
+ 0, 0, 0, 476,
+ 392, 0, 191, 333,
+ 0, 0, 176, 161,
+ 508, 144, 150, 6,
+ 0, 0, 402, 0,
+ 320, 0, 395, 266,
+ 151, 0, 442, 0,
+ 64, 600, 0, 0,
+ 0, 237, 326, 0,
+ 576, 0, 0, 225,
+ 0, 0, 467, 289,
+ 0, 589, 399, 86,
+ 537, 500, 232, 0,
+ 0, 438, 350, 276,
+ 155, 0, 359, 0,
+ 249, 93, 534, 0,
+ 0, 154, 0, 0,
+ 120, 248, 444, 0,
+ 406, 285, 300, 393,
+ 0, 0, 0, 318,
+ 291, 0, 369, 0,
+ 0, 0, 0, 0,
+ 454, 0, 0, 0,
+ 134, 0, 0, 193,
+ 242, 0, 0, 177,
+ 277, 43, 128, 0,
+ 196, 0, 0, 423,
+ 0, 411, 73, 0,
+ 0, 412, 0, 0,
+ 143, 619, 0, 0,
+ 574, 407, 303, 0,
+ 0, 577, 0, 0,
+ 224, 556, 0, 468,
+ 0, 0, 590, 400,
+ 85, 538, 516, 80,
+ 20, 0, 0, 214,
+ 527, 159, 545, 580,
+ 434, 565, 94, 0,
+ 435, 0, 136, 0,
+ 578, 429, 264, 445,
+ 0, 417, 0, 302,
+ 0, 0, 561, 0,
+ 315, 0, 0, 370,
+ 0, 427, 0, 0,
+ 0, 455, 0, 0,
+ 42, 135, 244, 0,
+ 192, 336, 0, 0,
+ 178, 163, 219, 452,
+ 581, 198, 0, 0,
+ 106, 0, 0, 74,
+ 0, 0, 413, 0,
+ 0, 141, 620, 0,
+ 297, 0, 389, 309,
+ 598, 308, 82, 255,
+ 0, 226, 0, 0,
+ 469, 0, 0, 593,
+ 0, 83, 539, 517,
+ 234, 21, 0, 0,
+ 212, 528, 162, 419,
+ 615, 503, 566, 95,
+ 0, 501, 240, 148,
+ 39, 0, 122, 265,
+ 0, 0, 420, 0,
+ 296, 107, 0, 562,
+ 0, 316, 0, 0,
+ 571, 0, 428, 0,
+ 0, 0, 456, 0,
+ 0, 432, 23, 346,
+ 0, 44, 335, 0,
+ 488, 567, 164, 139,
+ 124, 54, 199, 0,
+ 0, 3, 0, 0,
+ 0, 0, 0, 115,
+ 493, 0, 142, 235,
+ 0, 377, 0, 610,
+ 0, 404, 327, 84,
+ 384, 0, 0, 623,
+ 449, 601, 0, 0,
+ 592, 0, 363, 0,
+ 431, 479, 0, 338,
+ 607, 213, 0, 521,
+ 510, 616, 424, 554,
+ 96, 0, 0, 0,
+ 153, 33, 466, 126,
+ 208, 0, 0, 418,
+ 0, 328, 108, 0,
+ 0, 356, 321, 584,
+ 0, 371, 0, 0,
+ 0, 415, 0, 457,
+ 405, 247, 29, 473,
+ 347, 595, 559, 197,
+ 50, 491, 179, 165,
+ 187, 552, 0, 200,
+ 30, 0, 2, 0,
+ 238, 334, 0, 0,
+ 481, 497, 218, 280,
+ 0, 330, 379, 0,
+ 0, 367, 352, 342,
+ 0, 256, 0, 0,
+ 624, 450, 602, 0,
+ 0, 591, 0, 364,
+ 474, 250, 188, 312,
+ 0, 0, 75, 273,
+ 166, 180, 617, 505,
+ 509, 97, 0, 0,
+ 103, 77, 35, 0,
+ 123, 209, 71, 0,
+ 421, 0, 329, 109,
+ 0, 0, 355, 0,
+ 0, 0, 557, 274,
+ 504, 0, 0, 0,
+ 458, 0, 0, 17,
+ 0, 245, 304, 0,
+ 46, 49, 489, 568,
+ 520, 25, 0, 0,
+ 201, 31, 0, 396,
+ 0, 0, 604, 0,
+ 12, 0, 499, 0,
+ 278, 0, 0, 375,
+ 0, 422, 368, 354,
+ 343, 0, 257, 0,
+ 27, 0, 460, 313,
+ 0, 0, 0, 403,
+ 564, 91, 68, 190,
+ 0, 0, 0, 76,
+ 582, 526, 512, 618,
+ 0, 271, 98, 0,
+ 0, 104, 606, 40,
+ 0, 125, 0, 72,
+ 127, 416, 588, 0,
+ 110, 0, 0, 357,
+ 0, 307, 0, 252,
+ 275, 0, 0, 0,
+ 459, 0, 211, 246,
+ 4, 0, 145, 305,
+ 560, 171, 52, 487,
+ 569, 522, 19, 550,
+ 502, 202, 0, 611,
+ 555, 0, 558, 608,
+ 0, 13, 0, 345,
+ 0, 279, 0, 0,
+ 299, 0, 55, 0,
+ 353, 344, 0, 259,
+ 549, 495, 0, 461,
+ 314, 0, 0, 0,
+ 173, 0, 78, 69,
+ 189, 269, 331, 0,
+ 61, 583, 156, 513,
+ 0, 0, 0, 99,
+ 131, 0, 105, 0,
+ 34, 0, 121, 0,
+ 290, 18, 0, 0,
+ 295, 111, 0, 0,
+ 358, 0, 0, 482,
+ 253, 525, 0, 351,
+ 0, 462, 0, 215,
+ 0, 1, 0, 146,
+ 306, 0, 170, 51,
+ 486, 174, 523, 507,
+ 543, 0, 203, 0,
+ 612, 0, 0, 0,
+ 132, 0, 14, 0,
+ 7, 365, 323, 0,
+ 87, 301, 0, 56,
+ 0, 609, 310, 0,
+ 258, 551, 496, 0,
+ 492, 319, 0, 0,
+ 0, 0, 0, 22,
+ 48, 24, 0, 381,
+ 0, 62, 0, 157,
+ 0, 0, 63, 0,
+ 563, 447, 430, 0,
+ 0, 36, 0, 0,
+ 100, 339, 129, 0,
+ 0, 0, 112, 0,
+ 0, 233, 0, 0,
+ 0, 254, 0, 0,
+ 349, 614, 463, 0,
+ 216, 0, 9, 0,
+ 147, 251, 0, 540,
+ 374, 485, 57, 524,
+ 0, 544, 0, 204,
+ 594, 613, 0, 0,
+ 0, 138, 0, 10,
+ 410, 8, 194, 325,
+ 116, 341, 298, 0,
+ 0, 0, 0, 311,
+ 0, 260, 0, 0,
+ 0, 498, 0, 0,
+ 448, 0, 603, 0,
+ 477, 390, 0, 270,
+ 382, 0, 59, 553,
+ 158, 0, 0, 28,
+ 433, 53, 130, 408,
+ 572, 0, 37, 0,
+ 0, 439, 625, 443,
+ 0, 0, 0, 113,
+ 0, 0, 360, 0,
+ 0, 0, 0, 0,
+ 228, 152, 0, 464,
+ 0, 217, 586, 32,
+ 0, 119, 436, 0,
+ 541, 372, 490, 175,
+ 167, 186, 548, 294,
+ 205, 0, 229, 605,
+ 15, 0, 45, 221,
+ 11, 409, 16, 195,
+ 324, 414, 348, 378,
+ 0, 0, 0, 0,
+ 0, 0, 385, 90,
+ 426, 0, 322, 0,
+ 530, 451, 0, 585,
+ 0, 472, 391, 0,
+ 515, 383, 0, 60,
+ 66, 518, 0, 596,
+ 26, 437, 340, 529,
+ 387, 267, 0, 38,
+ 401, 0, 102, 622,
+ 440, 0, 0, 0,
+ 114, 0, 0, 361,
+ 88, 0, 0, 0,
+ 0, 227, 0, 0,
+ 465, 0, 480, 587,
+ 397, 0, 535, 172,
+ 236, 542, 292, 484,
+ 58, 168, 207, 546,
+ 425, 286, 0, 230,
+ 532, 470, 0, 137,
+ 373, 0, 570, 0,
+ 446, 0, 117, 288,
+ 380, 0, 0, 0,
+ 0, 337, 0, 261,
+ 243, 621, 0, 0,
+ 0, 531, 65, 0,
+ 0, 0, 133, 386,
+ 0, 514, 332, 519,
+ 0, 67, 160, 0,
+ 140, 494, 5, 0,
+ 575, 70, 268, 0,
+ 41, 394, 0, 101,
+ 0, 441, 0, 599,
+ 81, 573, 0, 0,
+ 362, 89, 239, 0,
+ 263, 0, 223, 511,
+ 0, 79, 597, 206,
+ 478, 398, 272, 536,
+ 47, 231, 0, 293,
+ 483, 506, 169, 220,
+ 547, 222, 287, 0,
+};
+
+static table_t *table_set[] = {
+ &table_API_OPENGL,
+ &table_API_OPENGLES,
+ &table_API_OPENGLES2,
+ &table_API_OPENGL_CORE,
+ &table_API_OPENGLES3,
+ &table_API_OPENGLES31,
+ &table_API_OPENGLES32,
+};
+
+#define table(api) (*table_set[api])
diff --git a/prebuilt-intermediates/main/marshal_generated.c b/prebuilt-intermediates/main/marshal_generated.c
new file mode 100644
index 0000000..dd4e140
--- /dev/null
+++ b/prebuilt-intermediates/main/marshal_generated.c
@@ -0,0 +1,45243 @@
+/* DO NOT EDIT - This file generated automatically by gl_marshal.py script */
+
+/*
+ * Copyright (C) 2012 Intel Corporation
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * INTEL CORPORATION,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#include "api_exec.h"
+#include "context.h"
+#include "dispatch.h"
+#include "glthread.h"
+#include "marshal.h"
+#include "marshal_generated.h"
+
+static inline int safe_mul(int a, int b)
+{
+ if (a < 0 || b < 0) return -1;
+ if (a == 0 || b == 0) return 0;
+ if (a > INT_MAX / b) return -1;
+ return a * b;
+}
+
+/* MapGrid1d: marshalled asynchronously */
+struct marshal_cmd_MapGrid1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint un;
+ GLdouble u1;
+ GLdouble u2;
+};
+static inline void
+_mesa_unmarshal_MapGrid1d(struct gl_context *ctx, const struct marshal_cmd_MapGrid1d *cmd)
+{
+ const GLint un = cmd->un;
+ const GLdouble u1 = cmd->u1;
+ const GLdouble u2 = cmd->u2;
+ CALL_MapGrid1d(ctx->CurrentServerDispatch, (un, u1, u2));
+}
+static void GLAPIENTRY
+_mesa_marshal_MapGrid1d(GLint un, GLdouble u1, GLdouble u2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MapGrid1d);
+ struct marshal_cmd_MapGrid1d *cmd;
+ debug_print_marshal("MapGrid1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MapGrid1d, cmd_size);
+ cmd->un = un;
+ cmd->u1 = u1;
+ cmd->u2 = u2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MapGrid1d");
+ CALL_MapGrid1d(ctx->CurrentServerDispatch, (un, u1, u2));
+}
+
+
+/* MapGrid1f: marshalled asynchronously */
+struct marshal_cmd_MapGrid1f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint un;
+ GLfloat u1;
+ GLfloat u2;
+};
+static inline void
+_mesa_unmarshal_MapGrid1f(struct gl_context *ctx, const struct marshal_cmd_MapGrid1f *cmd)
+{
+ const GLint un = cmd->un;
+ const GLfloat u1 = cmd->u1;
+ const GLfloat u2 = cmd->u2;
+ CALL_MapGrid1f(ctx->CurrentServerDispatch, (un, u1, u2));
+}
+static void GLAPIENTRY
+_mesa_marshal_MapGrid1f(GLint un, GLfloat u1, GLfloat u2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MapGrid1f);
+ struct marshal_cmd_MapGrid1f *cmd;
+ debug_print_marshal("MapGrid1f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MapGrid1f, cmd_size);
+ cmd->un = un;
+ cmd->u1 = u1;
+ cmd->u2 = u2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MapGrid1f");
+ CALL_MapGrid1f(ctx->CurrentServerDispatch, (un, u1, u2));
+}
+
+
+/* ProgramUniform3i64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLint64 value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3i64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3i64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 24;
+ CALL_ProgramUniform3i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3i64vARB(GLuint program, GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3i64vARB) + safe_mul(count, 24);
+ struct marshal_cmd_ProgramUniform3i64vARB *cmd;
+ debug_print_marshal("ProgramUniform3i64vARB");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3i64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3i64vARB");
+ CALL_ProgramUniform3i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetProgramResourceLocationIndex: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetProgramResourceLocationIndex(GLuint program, GLenum programInterface, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramResourceLocationIndex");
+ return CALL_GetProgramResourceLocationIndex(ctx->CurrentServerDispatch, (program, programInterface, name));
+}
+
+
+/* TexCoordP1ui: marshalled asynchronously */
+struct marshal_cmd_TexCoordP1ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_TexCoordP1ui(struct gl_context *ctx, const struct marshal_cmd_TexCoordP1ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_TexCoordP1ui(ctx->CurrentServerDispatch, (type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP1ui(GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordP1ui);
+ struct marshal_cmd_TexCoordP1ui *cmd;
+ debug_print_marshal("TexCoordP1ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordP1ui, cmd_size);
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordP1ui");
+ CALL_TexCoordP1ui(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* PolygonStipple: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PolygonStipple(const GLubyte * mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PolygonStipple");
+ CALL_PolygonStipple(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* MultiTexCoord1dv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble v[1];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1dv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1dv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble * v = cmd->v;
+ CALL_MultiTexCoord1dv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1dv(GLenum target, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1dv);
+ struct marshal_cmd_MultiTexCoord1dv *cmd;
+ debug_print_marshal("MultiTexCoord1dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1dv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1dv");
+ CALL_MultiTexCoord1dv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* IsEnabled: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsEnabled(GLenum cap)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsEnabled");
+ return CALL_IsEnabled(ctx->CurrentServerDispatch, (cap));
+}
+
+
+/* AttachShader: marshalled asynchronously */
+struct marshal_cmd_AttachShader
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLuint shader;
+};
+static inline void
+_mesa_unmarshal_AttachShader(struct gl_context *ctx, const struct marshal_cmd_AttachShader *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLuint shader = cmd->shader;
+ CALL_AttachShader(ctx->CurrentServerDispatch, (program, shader));
+}
+static void GLAPIENTRY
+_mesa_marshal_AttachShader(GLuint program, GLuint shader)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AttachShader);
+ struct marshal_cmd_AttachShader *cmd;
+ debug_print_marshal("AttachShader");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AttachShader, cmd_size);
+ cmd->program = program;
+ cmd->shader = shader;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AttachShader");
+ CALL_AttachShader(ctx->CurrentServerDispatch, (program, shader));
+}
+
+
+/* VertexAttrib3fARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3fARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3fARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_VertexAttrib3fARB(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3fARB(GLuint index, GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3fARB);
+ struct marshal_cmd_VertexAttrib3fARB *cmd;
+ debug_print_marshal("VertexAttrib3fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3fARB, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3fARB");
+ CALL_VertexAttrib3fARB(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* Indexubv: marshalled asynchronously */
+struct marshal_cmd_Indexubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte c[1];
+};
+static inline void
+_mesa_unmarshal_Indexubv(struct gl_context *ctx, const struct marshal_cmd_Indexubv *cmd)
+{
+ const GLubyte * c = cmd->c;
+ CALL_Indexubv(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexubv(const GLubyte * c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexubv);
+ struct marshal_cmd_Indexubv *cmd;
+ debug_print_marshal("Indexubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexubv, cmd_size);
+ memcpy(cmd->c, c, 1);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexubv");
+ CALL_Indexubv(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* GetCompressedTextureImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetCompressedTextureImage(GLuint texture, GLint level, GLsizei bufSize, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetCompressedTextureImage");
+ CALL_GetCompressedTextureImage(ctx->CurrentServerDispatch, (texture, level, bufSize, pixels));
+}
+
+
+/* MultiTexCoordP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP3uiv(GLenum texture, GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiTexCoordP3uiv");
+ CALL_MultiTexCoordP3uiv(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* VertexAttribI4usv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4usv(GLuint index, const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4usv");
+ CALL_VertexAttribI4usv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Color3ubv: marshalled asynchronously */
+struct marshal_cmd_Color3ubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte v[3];
+};
+static inline void
+_mesa_unmarshal_Color3ubv(struct gl_context *ctx, const struct marshal_cmd_Color3ubv *cmd)
+{
+ const GLubyte * v = cmd->v;
+ CALL_Color3ubv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3ubv(const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3ubv);
+ struct marshal_cmd_Color3ubv *cmd;
+ debug_print_marshal("Color3ubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3ubv, cmd_size);
+ memcpy(cmd->v, v, 3);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3ubv");
+ CALL_Color3ubv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetClipPlanex: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetClipPlanex(GLenum plane, GLfixed * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetClipPlanex");
+ CALL_GetClipPlanex(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* ProgramUniform2ui: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint x;
+ GLuint y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2ui(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2ui *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ CALL_ProgramUniform2ui(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2ui(GLuint program, GLint location, GLuint x, GLuint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2ui);
+ struct marshal_cmd_ProgramUniform2ui *cmd;
+ debug_print_marshal("ProgramUniform2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2ui, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2ui");
+ CALL_ProgramUniform2ui(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* TexCoordP1uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP1uiv(GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexCoordP1uiv");
+ CALL_TexCoordP1uiv(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* RenderbufferStorage: marshalled asynchronously */
+struct marshal_cmd_RenderbufferStorage
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_RenderbufferStorage(struct gl_context *ctx, const struct marshal_cmd_RenderbufferStorage *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_RenderbufferStorage(ctx->CurrentServerDispatch, (target, internalformat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_RenderbufferStorage(GLenum target, GLenum internalformat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RenderbufferStorage);
+ struct marshal_cmd_RenderbufferStorage *cmd;
+ debug_print_marshal("RenderbufferStorage");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RenderbufferStorage, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RenderbufferStorage");
+ CALL_RenderbufferStorage(ctx->CurrentServerDispatch, (target, internalformat, width, height));
+}
+
+
+/* GetClipPlanef: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetClipPlanef(GLenum plane, GLfloat * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetClipPlanef");
+ CALL_GetClipPlanef(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* GetPerfQueryDataINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfQueryDataINTEL(GLuint queryHandle, GLuint flags, GLsizei dataSize, GLvoid * data, GLuint * bytesWritten)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfQueryDataINTEL");
+ CALL_GetPerfQueryDataINTEL(ctx->CurrentServerDispatch, (queryHandle, flags, dataSize, data, bytesWritten));
+}
+
+
+/* DrawArraysIndirect: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DrawArraysIndirect(GLenum mode, const GLvoid * indirect)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DrawArraysIndirect");
+ CALL_DrawArraysIndirect(ctx->CurrentServerDispatch, (mode, indirect));
+}
+
+
+/* Uniform3i: marshalled asynchronously */
+struct marshal_cmd_Uniform3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint v0;
+ GLint v1;
+ GLint v2;
+};
+static inline void
+_mesa_unmarshal_Uniform3i(struct gl_context *ctx, const struct marshal_cmd_Uniform3i *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint v0 = cmd->v0;
+ const GLint v1 = cmd->v1;
+ const GLint v2 = cmd->v2;
+ CALL_Uniform3i(ctx->CurrentServerDispatch, (location, v0, v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3i(GLint location, GLint v0, GLint v1, GLint v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3i);
+ struct marshal_cmd_Uniform3i *cmd;
+ debug_print_marshal("Uniform3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3i, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3i");
+ CALL_Uniform3i(ctx->CurrentServerDispatch, (location, v0, v1, v2));
+}
+
+
+/* VDPAUGetSurfaceivNV: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VDPAUGetSurfaceivNV(GLintptr surface, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAUGetSurfaceivNV");
+ CALL_VDPAUGetSurfaceivNV(ctx->CurrentServerDispatch, (surface, pname, bufSize, length, values));
+}
+
+
+/* Uniform3d: marshalled asynchronously */
+struct marshal_cmd_Uniform3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_Uniform3d(struct gl_context *ctx, const struct marshal_cmd_Uniform3d *cmd)
+{
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_Uniform3d(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3d(GLint location, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3d);
+ struct marshal_cmd_Uniform3d *cmd;
+ debug_print_marshal("Uniform3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3d, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3d");
+ CALL_Uniform3d(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+
+
+/* Uniform3f: marshalled asynchronously */
+struct marshal_cmd_Uniform3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLfloat v0;
+ GLfloat v1;
+ GLfloat v2;
+};
+static inline void
+_mesa_unmarshal_Uniform3f(struct gl_context *ctx, const struct marshal_cmd_Uniform3f *cmd)
+{
+ const GLint location = cmd->location;
+ const GLfloat v0 = cmd->v0;
+ const GLfloat v1 = cmd->v1;
+ const GLfloat v2 = cmd->v2;
+ CALL_Uniform3f(ctx->CurrentServerDispatch, (location, v0, v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3f(GLint location, GLfloat v0, GLfloat v1, GLfloat v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3f);
+ struct marshal_cmd_Uniform3f *cmd;
+ debug_print_marshal("Uniform3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3f, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3f");
+ CALL_Uniform3f(ctx->CurrentServerDispatch, (location, v0, v1, v2));
+}
+
+
+/* UniformMatrix2x4fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2x4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLfloat value[count][8] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2x4fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2x4fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 32;
+ CALL_UniformMatrix2x4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2x4fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2x4fv) + safe_mul(count, 32);
+ struct marshal_cmd_UniformMatrix2x4fv *cmd;
+ debug_print_marshal("UniformMatrix2x4fv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2x4fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2x4fv");
+ CALL_UniformMatrix2x4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* QueryMatrixxOES: marshalled synchronously */
+static GLbitfield GLAPIENTRY
+_mesa_marshal_QueryMatrixxOES(GLfixed * mantissa, GLint * exponent)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("QueryMatrixxOES");
+ return CALL_QueryMatrixxOES(ctx->CurrentServerDispatch, (mantissa, exponent));
+}
+
+
+/* Normal3iv: marshalled asynchronously */
+struct marshal_cmd_Normal3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_Normal3iv(struct gl_context *ctx, const struct marshal_cmd_Normal3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Normal3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3iv);
+ struct marshal_cmd_Normal3iv *cmd;
+ debug_print_marshal("Normal3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3iv");
+ CALL_Normal3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DrawTexiOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexiOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint width;
+ GLint height;
+};
+static inline void
+_mesa_unmarshal_DrawTexiOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexiOES *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint width = cmd->width;
+ const GLint height = cmd->height;
+ CALL_DrawTexiOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexiOES(GLint x, GLint y, GLint z, GLint width, GLint height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexiOES);
+ struct marshal_cmd_DrawTexiOES *cmd;
+ debug_print_marshal("DrawTexiOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexiOES, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexiOES");
+ CALL_DrawTexiOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+
+
+/* Viewport: marshalled asynchronously */
+struct marshal_cmd_Viewport
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_Viewport(struct gl_context *ctx, const struct marshal_cmd_Viewport *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_Viewport(ctx->CurrentServerDispatch, (x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_Viewport(GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Viewport);
+ struct marshal_cmd_Viewport *cmd;
+ debug_print_marshal("Viewport");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Viewport, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Viewport");
+ CALL_Viewport(ctx->CurrentServerDispatch, (x, y, width, height));
+}
+
+
+/* CreateProgramPipelines: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateProgramPipelines(GLsizei n, GLuint * pipelines)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateProgramPipelines");
+ CALL_CreateProgramPipelines(ctx->CurrentServerDispatch, (n, pipelines));
+}
+
+
+/* DeleteVertexArrays: marshalled asynchronously */
+struct marshal_cmd_DeleteVertexArrays
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint arrays[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteVertexArrays(struct gl_context *ctx, const struct marshal_cmd_DeleteVertexArrays *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * arrays;
+ const char *variable_data = (const char *) (cmd + 1);
+ arrays = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteVertexArrays(ctx->CurrentServerDispatch, (n, arrays));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteVertexArrays(GLsizei n, const GLuint * arrays)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteVertexArrays) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteVertexArrays *cmd;
+ debug_print_marshal("DeleteVertexArrays");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteVertexArrays, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, arrays, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteVertexArrays");
+ CALL_DeleteVertexArrays(ctx->CurrentServerDispatch, (n, arrays));
+}
+
+
+/* ClearColorIuiEXT: marshalled asynchronously */
+struct marshal_cmd_ClearColorIuiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint r;
+ GLuint g;
+ GLuint b;
+ GLuint a;
+};
+static inline void
+_mesa_unmarshal_ClearColorIuiEXT(struct gl_context *ctx, const struct marshal_cmd_ClearColorIuiEXT *cmd)
+{
+ const GLuint r = cmd->r;
+ const GLuint g = cmd->g;
+ const GLuint b = cmd->b;
+ const GLuint a = cmd->a;
+ CALL_ClearColorIuiEXT(ctx->CurrentServerDispatch, (r, g, b, a));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearColorIuiEXT(GLuint r, GLuint g, GLuint b, GLuint a)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearColorIuiEXT);
+ struct marshal_cmd_ClearColorIuiEXT *cmd;
+ debug_print_marshal("ClearColorIuiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearColorIuiEXT, cmd_size);
+ cmd->r = r;
+ cmd->g = g;
+ cmd->b = b;
+ cmd->a = a;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearColorIuiEXT");
+ CALL_ClearColorIuiEXT(ctx->CurrentServerDispatch, (r, g, b, a));
+}
+
+
+/* GetnConvolutionFilterARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnConvolutionFilterARB(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid * image)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnConvolutionFilterARB");
+ CALL_GetnConvolutionFilterARB(ctx->CurrentServerDispatch, (target, format, type, bufSize, image));
+}
+
+
+/* PolygonOffsetx: marshalled asynchronously */
+struct marshal_cmd_PolygonOffsetx
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed factor;
+ GLfixed units;
+};
+static inline void
+_mesa_unmarshal_PolygonOffsetx(struct gl_context *ctx, const struct marshal_cmd_PolygonOffsetx *cmd)
+{
+ const GLfixed factor = cmd->factor;
+ const GLfixed units = cmd->units;
+ CALL_PolygonOffsetx(ctx->CurrentServerDispatch, (factor, units));
+}
+static void GLAPIENTRY
+_mesa_marshal_PolygonOffsetx(GLfixed factor, GLfixed units)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PolygonOffsetx);
+ struct marshal_cmd_PolygonOffsetx *cmd;
+ debug_print_marshal("PolygonOffsetx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PolygonOffsetx, cmd_size);
+ cmd->factor = factor;
+ cmd->units = units;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PolygonOffsetx");
+ CALL_PolygonOffsetx(ctx->CurrentServerDispatch, (factor, units));
+}
+
+
+/* GetLightxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetLightxv(GLenum light, GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetLightxv");
+ CALL_GetLightxv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* GetConvolutionParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetConvolutionParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetConvolutionParameteriv");
+ CALL_GetConvolutionParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* DepthRangeIndexedfOES: marshalled asynchronously */
+struct marshal_cmd_DepthRangeIndexedfOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat n;
+ GLfloat f;
+};
+static inline void
+_mesa_unmarshal_DepthRangeIndexedfOES(struct gl_context *ctx, const struct marshal_cmd_DepthRangeIndexedfOES *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat n = cmd->n;
+ const GLfloat f = cmd->f;
+ CALL_DepthRangeIndexedfOES(ctx->CurrentServerDispatch, (index, n, f));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRangeIndexedfOES(GLuint index, GLfloat n, GLfloat f)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRangeIndexedfOES);
+ struct marshal_cmd_DepthRangeIndexedfOES *cmd;
+ debug_print_marshal("DepthRangeIndexedfOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRangeIndexedfOES, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ cmd->f = f;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRangeIndexedfOES");
+ CALL_DepthRangeIndexedfOES(ctx->CurrentServerDispatch, (index, n, f));
+}
+
+
+/* GetProgramResourceLocation: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetProgramResourceLocation(GLuint program, GLenum programInterface, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramResourceLocation");
+ return CALL_GetProgramResourceLocation(ctx->CurrentServerDispatch, (program, programInterface, name));
+}
+
+
+/* GetSubroutineUniformLocation: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetSubroutineUniformLocation(GLuint program, GLenum shadertype, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSubroutineUniformLocation");
+ return CALL_GetSubroutineUniformLocation(ctx->CurrentServerDispatch, (program, shadertype, name));
+}
+
+
+/* VertexAttrib4usv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4usv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLushort v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4usv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4usv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLushort * v = cmd->v;
+ CALL_VertexAttrib4usv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4usv(GLuint index, const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4usv);
+ struct marshal_cmd_VertexAttrib4usv *cmd;
+ debug_print_marshal("VertexAttrib4usv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4usv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4usv");
+ CALL_VertexAttrib4usv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* TextureStorage1DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorage1DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_TextureStorage1DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorage1DEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ CALL_TextureStorage1DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage1DEXT(GLuint texture, GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage1DEXT);
+ struct marshal_cmd_TextureStorage1DEXT *cmd;
+ debug_print_marshal("TextureStorage1DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage1DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage1DEXT");
+ CALL_TextureStorage1DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width));
+}
+
+
+/* VertexAttrib4Nub: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nub
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLubyte x;
+ GLubyte y;
+ GLubyte z;
+ GLubyte w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nub(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nub *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLubyte x = cmd->x;
+ const GLubyte y = cmd->y;
+ const GLubyte z = cmd->z;
+ const GLubyte w = cmd->w;
+ CALL_VertexAttrib4Nub(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nub(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nub);
+ struct marshal_cmd_VertexAttrib4Nub *cmd;
+ debug_print_marshal("VertexAttrib4Nub");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nub, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nub");
+ CALL_VertexAttrib4Nub(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* VertexAttribP3ui: marshalled asynchronously */
+struct marshal_cmd_VertexAttribP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLenum type;
+ GLboolean normalized;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexAttribP3ui(struct gl_context *ctx, const struct marshal_cmd_VertexAttribP3ui *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint value = cmd->value;
+ CALL_VertexAttribP3ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP3ui(GLuint index, GLenum type, GLboolean normalized, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribP3ui);
+ struct marshal_cmd_VertexAttribP3ui *cmd;
+ debug_print_marshal("VertexAttribP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribP3ui, cmd_size);
+ cmd->index = index;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribP3ui");
+ CALL_VertexAttribP3ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* PointSize: marshalled asynchronously */
+struct marshal_cmd_PointSize
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat size;
+};
+static inline void
+_mesa_unmarshal_PointSize(struct gl_context *ctx, const struct marshal_cmd_PointSize *cmd)
+{
+ const GLfloat size = cmd->size;
+ CALL_PointSize(ctx->CurrentServerDispatch, (size));
+}
+static void GLAPIENTRY
+_mesa_marshal_PointSize(GLfloat size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PointSize);
+ struct marshal_cmd_PointSize *cmd;
+ debug_print_marshal("PointSize");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PointSize, cmd_size);
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PointSize");
+ CALL_PointSize(ctx->CurrentServerDispatch, (size));
+}
+
+
+/* PopName: marshalled asynchronously */
+struct marshal_cmd_PopName
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PopName(struct gl_context *ctx, const struct marshal_cmd_PopName *cmd)
+{
+ CALL_PopName(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PopName(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PopName);
+ struct marshal_cmd_PopName *cmd;
+ debug_print_marshal("PopName");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PopName, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PopName");
+ CALL_PopName(ctx->CurrentServerDispatch, ());
+}
+
+
+/* FramebufferTexture: marshalled asynchronously */
+struct marshal_cmd_FramebufferTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLuint texture;
+ GLint level;
+};
+static inline void
+_mesa_unmarshal_FramebufferTexture(struct gl_context *ctx, const struct marshal_cmd_FramebufferTexture *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ CALL_FramebufferTexture(ctx->CurrentServerDispatch, (target, attachment, texture, level));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferTexture(GLenum target, GLenum attachment, GLuint texture, GLint level)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferTexture);
+ struct marshal_cmd_FramebufferTexture *cmd;
+ debug_print_marshal("FramebufferTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferTexture, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->texture = texture;
+ cmd->level = level;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferTexture");
+ CALL_FramebufferTexture(ctx->CurrentServerDispatch, (target, attachment, texture, level));
+}
+
+
+/* CreateTransformFeedbacks: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateTransformFeedbacks(GLsizei n, GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateTransformFeedbacks");
+ CALL_CreateTransformFeedbacks(ctx->CurrentServerDispatch, (n, ids));
+}
+
+
+/* VertexAttrib4ubNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4ubNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLubyte x;
+ GLubyte y;
+ GLubyte z;
+ GLubyte w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4ubNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4ubNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLubyte x = cmd->x;
+ const GLubyte y = cmd->y;
+ const GLubyte z = cmd->z;
+ const GLubyte w = cmd->w;
+ CALL_VertexAttrib4ubNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4ubNV(GLuint index, GLubyte x, GLubyte y, GLubyte z, GLubyte w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4ubNV);
+ struct marshal_cmd_VertexAttrib4ubNV *cmd;
+ debug_print_marshal("VertexAttrib4ubNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4ubNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4ubNV");
+ CALL_VertexAttrib4ubNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* ValidateProgramPipeline: marshalled asynchronously */
+struct marshal_cmd_ValidateProgramPipeline
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint pipeline;
+};
+static inline void
+_mesa_unmarshal_ValidateProgramPipeline(struct gl_context *ctx, const struct marshal_cmd_ValidateProgramPipeline *cmd)
+{
+ const GLuint pipeline = cmd->pipeline;
+ CALL_ValidateProgramPipeline(ctx->CurrentServerDispatch, (pipeline));
+}
+static void GLAPIENTRY
+_mesa_marshal_ValidateProgramPipeline(GLuint pipeline)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ValidateProgramPipeline);
+ struct marshal_cmd_ValidateProgramPipeline *cmd;
+ debug_print_marshal("ValidateProgramPipeline");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ValidateProgramPipeline, cmd_size);
+ cmd->pipeline = pipeline;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ValidateProgramPipeline");
+ CALL_ValidateProgramPipeline(ctx->CurrentServerDispatch, (pipeline));
+}
+
+
+/* BindFragDataLocationIndexed: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindFragDataLocationIndexed(GLuint program, GLuint colorNumber, GLuint index, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindFragDataLocationIndexed");
+ CALL_BindFragDataLocationIndexed(ctx->CurrentServerDispatch, (program, colorNumber, index, name));
+}
+
+
+/* GetClipPlane: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetClipPlane(GLenum plane, GLdouble * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetClipPlane");
+ CALL_GetClipPlane(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* DeleteSemaphoresEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeleteSemaphoresEXT(GLsizei n, const GLuint * semaphores)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeleteSemaphoresEXT");
+ CALL_DeleteSemaphoresEXT(ctx->CurrentServerDispatch, (n, semaphores));
+}
+
+
+/* TexCoordP4uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP4uiv(GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexCoordP4uiv");
+ CALL_TexCoordP4uiv(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* VertexAttribs3dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs3dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 24) bytes are GLdouble v[n][3] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs3dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs3dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLdouble * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLdouble *) variable_data;
+ variable_data += n * 24;
+ CALL_VertexAttribs3dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs3dvNV(GLuint index, GLsizei n, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs3dvNV) + safe_mul(n, 24);
+ struct marshal_cmd_VertexAttribs3dvNV *cmd;
+ debug_print_marshal("VertexAttribs3dvNV");
+ if (unlikely(safe_mul(n, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs3dvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 24);
+ variable_data += n * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs3dvNV");
+ CALL_VertexAttribs3dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* ProgramUniformMatrix2x4dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2x4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLdouble value[count][8] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2x4dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2x4dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 64;
+ CALL_ProgramUniformMatrix2x4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2x4dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2x4dv) + safe_mul(count, 64);
+ struct marshal_cmd_ProgramUniformMatrix2x4dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2x4dv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2x4dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2x4dv");
+ CALL_ProgramUniformMatrix2x4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* GenQueries: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenQueries(GLsizei n, GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenQueries");
+ CALL_GenQueries(ctx->CurrentServerDispatch, (n, ids));
+}
+
+
+/* ProgramUniform4iv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLint value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4iv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4iv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform4iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4iv(GLuint program, GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4iv) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform4iv *cmd;
+ debug_print_marshal("ProgramUniform4iv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4iv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4iv");
+ CALL_ProgramUniform4iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* ObjectUnpurgeableAPPLE: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_ObjectUnpurgeableAPPLE(GLenum objectType, GLuint name, GLenum option)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ObjectUnpurgeableAPPLE");
+ return CALL_ObjectUnpurgeableAPPLE(ctx->CurrentServerDispatch, (objectType, name, option));
+}
+
+
+/* GetCompressedTextureSubImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetCompressedTextureSubImage(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLsizei bufSize, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetCompressedTextureSubImage");
+ CALL_GetCompressedTextureSubImage(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth, bufSize, pixels));
+}
+
+
+/* TexCoord2iv: marshalled asynchronously */
+struct marshal_cmd_TexCoord2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[2];
+};
+static inline void
+_mesa_unmarshal_TexCoord2iv(struct gl_context *ctx, const struct marshal_cmd_TexCoord2iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_TexCoord2iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2iv);
+ struct marshal_cmd_TexCoord2iv *cmd;
+ debug_print_marshal("TexCoord2iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2iv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2iv");
+ CALL_TexCoord2iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexImage2DMultisample: marshalled asynchronously */
+struct marshal_cmd_TexImage2DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TexImage2DMultisample(struct gl_context *ctx, const struct marshal_cmd_TexImage2DMultisample *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TexImage2DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexImage2DMultisample(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexImage2DMultisample);
+ struct marshal_cmd_TexImage2DMultisample *cmd;
+ debug_print_marshal("TexImage2DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexImage2DMultisample, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexImage2DMultisample");
+ CALL_TexImage2DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, fixedsamplelocations));
+}
+
+
+/* TexParameterx: marshalled asynchronously */
+struct marshal_cmd_TexParameterx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_TexParameterx(struct gl_context *ctx, const struct marshal_cmd_TexParameterx *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_TexParameterx(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexParameterx(GLenum target, GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexParameterx);
+ struct marshal_cmd_TexParameterx *cmd;
+ debug_print_marshal("TexParameterx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexParameterx, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexParameterx");
+ CALL_TexParameterx(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* Rotatef: marshalled asynchronously */
+struct marshal_cmd_Rotatef
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat angle;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_Rotatef(struct gl_context *ctx, const struct marshal_cmd_Rotatef *cmd)
+{
+ const GLfloat angle = cmd->angle;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_Rotatef(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rotatef(GLfloat angle, GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rotatef);
+ struct marshal_cmd_Rotatef *cmd;
+ debug_print_marshal("Rotatef");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rotatef, cmd_size);
+ cmd->angle = angle;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rotatef");
+ CALL_Rotatef(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+
+
+/* TexParameterf: marshalled asynchronously */
+struct marshal_cmd_TexParameterf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_TexParameterf(struct gl_context *ctx, const struct marshal_cmd_TexParameterf *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_TexParameterf(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexParameterf(GLenum target, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexParameterf);
+ struct marshal_cmd_TexParameterf *cmd;
+ debug_print_marshal("TexParameterf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexParameterf, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexParameterf");
+ CALL_TexParameterf(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* TexParameteri: marshalled asynchronously */
+struct marshal_cmd_TexParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_TexParameteri(struct gl_context *ctx, const struct marshal_cmd_TexParameteri *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_TexParameteri(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexParameteri(GLenum target, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexParameteri);
+ struct marshal_cmd_TexParameteri *cmd;
+ debug_print_marshal("TexParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexParameteri, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexParameteri");
+ CALL_TexParameteri(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* GetUniformiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformiv(GLuint program, GLint location, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformiv");
+ CALL_GetUniformiv(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* ClearBufferSubData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearBufferSubData(GLenum target, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearBufferSubData");
+ CALL_ClearBufferSubData(ctx->CurrentServerDispatch, (target, internalformat, offset, size, format, type, data));
+}
+
+
+/* TextureParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureParameterfv(GLuint texture, GLenum pname, const GLfloat * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureParameterfv");
+ CALL_TextureParameterfv(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+
+
+/* VDPAUFiniNV: marshalled asynchronously */
+struct marshal_cmd_VDPAUFiniNV
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_VDPAUFiniNV(struct gl_context *ctx, const struct marshal_cmd_VDPAUFiniNV *cmd)
+{
+ CALL_VDPAUFiniNV(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_VDPAUFiniNV(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VDPAUFiniNV);
+ struct marshal_cmd_VDPAUFiniNV *cmd;
+ debug_print_marshal("VDPAUFiniNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VDPAUFiniNV, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VDPAUFiniNV");
+ CALL_VDPAUFiniNV(ctx->CurrentServerDispatch, ());
+}
+
+
+/* ProgramUniformMatrix4x2fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4x2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLfloat value[count][8] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4x2fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4x2fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniformMatrix4x2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4x2fv) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniformMatrix4x2fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4x2fv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4x2fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4x2fv");
+ CALL_ProgramUniformMatrix4x2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* ProgramUniform2f: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2f(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2f *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_ProgramUniform2f(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2f(GLuint program, GLint location, GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2f);
+ struct marshal_cmd_ProgramUniform2f *cmd;
+ debug_print_marshal("ProgramUniform2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2f, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2f");
+ CALL_ProgramUniform2f(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* ProgramUniform2d: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2d(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2d *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_ProgramUniform2d(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2d(GLuint program, GLint location, GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2d);
+ struct marshal_cmd_ProgramUniform2d *cmd;
+ debug_print_marshal("ProgramUniform2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2d, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2d");
+ CALL_ProgramUniform2d(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* ProgramUniform2i: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint x;
+ GLint y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2i(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2i *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ CALL_ProgramUniform2i(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2i(GLuint program, GLint location, GLint x, GLint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2i);
+ struct marshal_cmd_ProgramUniform2i *cmd;
+ debug_print_marshal("ProgramUniform2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2i, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2i");
+ CALL_ProgramUniform2i(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* Fogx: marshalled asynchronously */
+struct marshal_cmd_Fogx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_Fogx(struct gl_context *ctx, const struct marshal_cmd_Fogx *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_Fogx(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Fogx(GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Fogx);
+ struct marshal_cmd_Fogx *cmd;
+ debug_print_marshal("Fogx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Fogx, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Fogx");
+ CALL_Fogx(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* Uniform3ui64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform3ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+ GLuint64 z;
+};
+static inline void
+_mesa_unmarshal_Uniform3ui64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform3ui64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ const GLuint64 z = cmd->z;
+ CALL_Uniform3ui64ARB(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3ui64ARB(GLint location, GLuint64 x, GLuint64 y, GLuint64 z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3ui64ARB);
+ struct marshal_cmd_Uniform3ui64ARB *cmd;
+ debug_print_marshal("Uniform3ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3ui64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3ui64ARB");
+ CALL_Uniform3ui64ARB(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+
+
+/* Fogf: marshalled asynchronously */
+struct marshal_cmd_Fogf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_Fogf(struct gl_context *ctx, const struct marshal_cmd_Fogf *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_Fogf(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Fogf(GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Fogf);
+ struct marshal_cmd_Fogf *cmd;
+ debug_print_marshal("Fogf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Fogf, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Fogf");
+ CALL_Fogf(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* TexSubImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexSubImage1D(GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexSubImage1D");
+ CALL_TexSubImage1D(ctx->CurrentServerDispatch, (target, level, xoffset, width, format, type, pixels));
+}
+
+
+/* ProgramUniform3ui64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLuint64 value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3ui64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3ui64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 24;
+ CALL_ProgramUniform3ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3ui64vARB(GLuint program, GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3ui64vARB) + safe_mul(count, 24);
+ struct marshal_cmd_ProgramUniform3ui64vARB *cmd;
+ debug_print_marshal("ProgramUniform3ui64vARB");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3ui64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3ui64vARB");
+ CALL_ProgramUniform3ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* Color4usv: marshalled asynchronously */
+struct marshal_cmd_Color4usv
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort v[4];
+};
+static inline void
+_mesa_unmarshal_Color4usv(struct gl_context *ctx, const struct marshal_cmd_Color4usv *cmd)
+{
+ const GLushort * v = cmd->v;
+ CALL_Color4usv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4usv(const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4usv);
+ struct marshal_cmd_Color4usv *cmd;
+ debug_print_marshal("Color4usv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4usv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4usv");
+ CALL_Color4usv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Fogi: marshalled asynchronously */
+struct marshal_cmd_Fogi
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_Fogi(struct gl_context *ctx, const struct marshal_cmd_Fogi *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_Fogi(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Fogi(GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Fogi);
+ struct marshal_cmd_Fogi *cmd;
+ debug_print_marshal("Fogi");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Fogi, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Fogi");
+ CALL_Fogi(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* DepthFunc: marshalled asynchronously */
+struct marshal_cmd_DepthFunc
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum func;
+};
+static inline void
+_mesa_unmarshal_DepthFunc(struct gl_context *ctx, const struct marshal_cmd_DepthFunc *cmd)
+{
+ const GLenum func = cmd->func;
+ CALL_DepthFunc(ctx->CurrentServerDispatch, (func));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthFunc(GLenum func)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthFunc);
+ struct marshal_cmd_DepthFunc *cmd;
+ debug_print_marshal("DepthFunc");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthFunc, cmd_size);
+ cmd->func = func;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthFunc");
+ CALL_DepthFunc(ctx->CurrentServerDispatch, (func));
+}
+
+
+/* GetSamplerParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSamplerParameterIiv(GLuint sampler, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSamplerParameterIiv");
+ CALL_GetSamplerParameterIiv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* VertexArrayAttribLFormat: marshalled asynchronously */
+struct marshal_cmd_VertexArrayAttribLFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexArrayAttribLFormat(struct gl_context *ctx, const struct marshal_cmd_VertexArrayAttribLFormat *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexArrayAttribLFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayAttribLFormat(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayAttribLFormat);
+ struct marshal_cmd_VertexArrayAttribLFormat *cmd;
+ debug_print_marshal("VertexArrayAttribLFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayAttribLFormat, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayAttribLFormat");
+ CALL_VertexArrayAttribLFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, relativeoffset));
+}
+
+
+/* VertexAttribI4uiEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI4uiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+ GLuint w;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI4uiEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI4uiEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ const GLuint w = cmd->w;
+ CALL_VertexAttribI4uiEXT(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4uiEXT(GLuint index, GLuint x, GLuint y, GLuint z, GLuint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI4uiEXT);
+ struct marshal_cmd_VertexAttribI4uiEXT *cmd;
+ debug_print_marshal("VertexAttribI4uiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI4uiEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI4uiEXT");
+ CALL_VertexAttribI4uiEXT(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* DrawElementsInstancedBaseVertexBaseInstance: marshalled asynchronously */
+struct marshal_cmd_DrawElementsInstancedBaseVertexBaseInstance
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLsizei primcount;
+ GLint basevertex;
+ GLuint baseinstance;
+};
+static inline void
+_mesa_unmarshal_DrawElementsInstancedBaseVertexBaseInstance(struct gl_context *ctx, const struct marshal_cmd_DrawElementsInstancedBaseVertexBaseInstance *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLsizei primcount = cmd->primcount;
+ const GLint basevertex = cmd->basevertex;
+ const GLuint baseinstance = cmd->baseinstance;
+ CALL_DrawElementsInstancedBaseVertexBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex, baseinstance));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsInstancedBaseVertexBaseInstance(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices, GLsizei primcount, GLint basevertex, GLuint baseinstance)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElementsInstancedBaseVertexBaseInstance);
+ struct marshal_cmd_DrawElementsInstancedBaseVertexBaseInstance *cmd;
+ debug_print_marshal("DrawElementsInstancedBaseVertexBaseInstance");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseVertexBaseInstance");
+ CALL_DrawElementsInstancedBaseVertexBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex, baseinstance));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElementsInstancedBaseVertexBaseInstance, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->primcount = primcount;
+ cmd->basevertex = basevertex;
+ cmd->baseinstance = baseinstance;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseVertexBaseInstance");
+ CALL_DrawElementsInstancedBaseVertexBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex, baseinstance));
+}
+
+
+/* ProgramEnvParameter4dvARB: marshalled asynchronously */
+struct marshal_cmd_ProgramEnvParameter4dvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLdouble params[4];
+};
+static inline void
+_mesa_unmarshal_ProgramEnvParameter4dvARB(struct gl_context *ctx, const struct marshal_cmd_ProgramEnvParameter4dvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLdouble * params = cmd->params;
+ CALL_ProgramEnvParameter4dvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramEnvParameter4dvARB(GLenum target, GLuint index, const GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramEnvParameter4dvARB);
+ struct marshal_cmd_ProgramEnvParameter4dvARB *cmd;
+ debug_print_marshal("ProgramEnvParameter4dvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramEnvParameter4dvARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ memcpy(cmd->params, params, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramEnvParameter4dvARB");
+ CALL_ProgramEnvParameter4dvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* ColorTableParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorTableParameteriv(GLenum target, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorTableParameteriv");
+ CALL_ColorTableParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* BindSamplers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindSamplers(GLuint first, GLsizei count, const GLuint * samplers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindSamplers");
+ CALL_BindSamplers(ctx->CurrentServerDispatch, (first, count, samplers));
+}
+
+
+/* GetnCompressedTexImageARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnCompressedTexImageARB(GLenum target, GLint lod, GLsizei bufSize, GLvoid * img)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnCompressedTexImageARB");
+ CALL_GetnCompressedTexImageARB(ctx->CurrentServerDispatch, (target, lod, bufSize, img));
+}
+
+
+/* CopyNamedBufferSubData: marshalled asynchronously */
+struct marshal_cmd_CopyNamedBufferSubData
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint readBuffer;
+ GLuint writeBuffer;
+ GLintptr readOffset;
+ GLintptr writeOffset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_CopyNamedBufferSubData(struct gl_context *ctx, const struct marshal_cmd_CopyNamedBufferSubData *cmd)
+{
+ const GLuint readBuffer = cmd->readBuffer;
+ const GLuint writeBuffer = cmd->writeBuffer;
+ const GLintptr readOffset = cmd->readOffset;
+ const GLintptr writeOffset = cmd->writeOffset;
+ const GLsizeiptr size = cmd->size;
+ CALL_CopyNamedBufferSubData(ctx->CurrentServerDispatch, (readBuffer, writeBuffer, readOffset, writeOffset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyNamedBufferSubData(GLuint readBuffer, GLuint writeBuffer, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyNamedBufferSubData);
+ struct marshal_cmd_CopyNamedBufferSubData *cmd;
+ debug_print_marshal("CopyNamedBufferSubData");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyNamedBufferSubData, cmd_size);
+ cmd->readBuffer = readBuffer;
+ cmd->writeBuffer = writeBuffer;
+ cmd->readOffset = readOffset;
+ cmd->writeOffset = writeOffset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyNamedBufferSubData");
+ CALL_CopyNamedBufferSubData(ctx->CurrentServerDispatch, (readBuffer, writeBuffer, readOffset, writeOffset, size));
+}
+
+
+/* BindSampler: marshalled asynchronously */
+struct marshal_cmd_BindSampler
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint unit;
+ GLuint sampler;
+};
+static inline void
+_mesa_unmarshal_BindSampler(struct gl_context *ctx, const struct marshal_cmd_BindSampler *cmd)
+{
+ const GLuint unit = cmd->unit;
+ const GLuint sampler = cmd->sampler;
+ CALL_BindSampler(ctx->CurrentServerDispatch, (unit, sampler));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindSampler(GLuint unit, GLuint sampler)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindSampler);
+ struct marshal_cmd_BindSampler *cmd;
+ debug_print_marshal("BindSampler");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindSampler, cmd_size);
+ cmd->unit = unit;
+ cmd->sampler = sampler;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindSampler");
+ CALL_BindSampler(ctx->CurrentServerDispatch, (unit, sampler));
+}
+
+
+/* GetUniformuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformuiv(GLuint program, GLint location, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformuiv");
+ CALL_GetUniformuiv(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* GetQueryBufferObjectuiv: marshalled asynchronously */
+struct marshal_cmd_GetQueryBufferObjectuiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+ GLuint buffer;
+ GLenum pname;
+ GLintptr offset;
+};
+static inline void
+_mesa_unmarshal_GetQueryBufferObjectuiv(struct gl_context *ctx, const struct marshal_cmd_GetQueryBufferObjectuiv *cmd)
+{
+ const GLuint id = cmd->id;
+ const GLuint buffer = cmd->buffer;
+ const GLenum pname = cmd->pname;
+ const GLintptr offset = cmd->offset;
+ CALL_GetQueryBufferObjectuiv(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_GetQueryBufferObjectuiv(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GetQueryBufferObjectuiv);
+ struct marshal_cmd_GetQueryBufferObjectuiv *cmd;
+ debug_print_marshal("GetQueryBufferObjectuiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GetQueryBufferObjectuiv, cmd_size);
+ cmd->id = id;
+ cmd->buffer = buffer;
+ cmd->pname = pname;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GetQueryBufferObjectuiv");
+ CALL_GetQueryBufferObjectuiv(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+
+
+/* MultiTexCoord2fARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat s;
+ GLfloat t;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2fARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ CALL_MultiTexCoord2fARB(ctx->CurrentServerDispatch, (target, s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2fARB(GLenum target, GLfloat s, GLfloat t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2fARB);
+ struct marshal_cmd_MultiTexCoord2fARB *cmd;
+ debug_print_marshal("MultiTexCoord2fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2fARB, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2fARB");
+ CALL_MultiTexCoord2fARB(ctx->CurrentServerDispatch, (target, s, t));
+}
+
+
+/* Uniform1ui64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform1ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint64 x;
+};
+static inline void
+_mesa_unmarshal_Uniform1ui64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform1ui64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ CALL_Uniform1ui64ARB(ctx->CurrentServerDispatch, (location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1ui64ARB(GLint location, GLuint64 x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1ui64ARB);
+ struct marshal_cmd_Uniform1ui64ARB *cmd;
+ debug_print_marshal("Uniform1ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1ui64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1ui64ARB");
+ CALL_Uniform1ui64ARB(ctx->CurrentServerDispatch, (location, x));
+}
+
+
+/* GetTextureImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureImage(GLuint texture, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureImage");
+ CALL_GetTextureImage(ctx->CurrentServerDispatch, (texture, level, format, type, bufSize, pixels));
+}
+
+
+/* MultiTexCoord3iv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3iv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3iv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint * v = cmd->v;
+ CALL_MultiTexCoord3iv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3iv(GLenum target, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3iv);
+ struct marshal_cmd_MultiTexCoord3iv *cmd;
+ debug_print_marshal("MultiTexCoord3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3iv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3iv");
+ CALL_MultiTexCoord3iv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* Finish: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Finish(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Finish");
+ CALL_Finish(ctx->CurrentServerDispatch, ());
+}
+
+
+/* ClearStencil: marshalled asynchronously */
+struct marshal_cmd_ClearStencil
+{
+ struct marshal_cmd_base cmd_base;
+ GLint s;
+};
+static inline void
+_mesa_unmarshal_ClearStencil(struct gl_context *ctx, const struct marshal_cmd_ClearStencil *cmd)
+{
+ const GLint s = cmd->s;
+ CALL_ClearStencil(ctx->CurrentServerDispatch, (s));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearStencil(GLint s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearStencil);
+ struct marshal_cmd_ClearStencil *cmd;
+ debug_print_marshal("ClearStencil");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearStencil, cmd_size);
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearStencil");
+ CALL_ClearStencil(ctx->CurrentServerDispatch, (s));
+}
+
+
+/* ClearColorIiEXT: marshalled asynchronously */
+struct marshal_cmd_ClearColorIiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLint r;
+ GLint g;
+ GLint b;
+ GLint a;
+};
+static inline void
+_mesa_unmarshal_ClearColorIiEXT(struct gl_context *ctx, const struct marshal_cmd_ClearColorIiEXT *cmd)
+{
+ const GLint r = cmd->r;
+ const GLint g = cmd->g;
+ const GLint b = cmd->b;
+ const GLint a = cmd->a;
+ CALL_ClearColorIiEXT(ctx->CurrentServerDispatch, (r, g, b, a));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearColorIiEXT(GLint r, GLint g, GLint b, GLint a)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearColorIiEXT);
+ struct marshal_cmd_ClearColorIiEXT *cmd;
+ debug_print_marshal("ClearColorIiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearColorIiEXT, cmd_size);
+ cmd->r = r;
+ cmd->g = g;
+ cmd->b = b;
+ cmd->a = a;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearColorIiEXT");
+ CALL_ClearColorIiEXT(ctx->CurrentServerDispatch, (r, g, b, a));
+}
+
+
+/* LoadMatrixd: marshalled asynchronously */
+struct marshal_cmd_LoadMatrixd
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble m[16];
+};
+static inline void
+_mesa_unmarshal_LoadMatrixd(struct gl_context *ctx, const struct marshal_cmd_LoadMatrixd *cmd)
+{
+ const GLdouble * m = cmd->m;
+ CALL_LoadMatrixd(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_LoadMatrixd(const GLdouble * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LoadMatrixd);
+ struct marshal_cmd_LoadMatrixd *cmd;
+ debug_print_marshal("LoadMatrixd");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LoadMatrixd, cmd_size);
+ memcpy(cmd->m, m, 128);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LoadMatrixd");
+ CALL_LoadMatrixd(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* VDPAURegisterOutputSurfaceNV: marshalled synchronously */
+static GLintptr GLAPIENTRY
+_mesa_marshal_VDPAURegisterOutputSurfaceNV(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAURegisterOutputSurfaceNV");
+ return CALL_VDPAURegisterOutputSurfaceNV(ctx->CurrentServerDispatch, (vdpSurface, target, numTextureNames, textureNames));
+}
+
+
+/* VertexP4ui: marshalled asynchronously */
+struct marshal_cmd_VertexP4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexP4ui(struct gl_context *ctx, const struct marshal_cmd_VertexP4ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint value = cmd->value;
+ CALL_VertexP4ui(ctx->CurrentServerDispatch, (type, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexP4ui(GLenum type, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexP4ui);
+ struct marshal_cmd_VertexP4ui *cmd;
+ debug_print_marshal("VertexP4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexP4ui, cmd_size);
+ cmd->type = type;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexP4ui");
+ CALL_VertexP4ui(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* GetProgramResourceIndex: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GetProgramResourceIndex(GLuint program, GLenum programInterface, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramResourceIndex");
+ return CALL_GetProgramResourceIndex(ctx->CurrentServerDispatch, (program, programInterface, name));
+}
+
+
+/* TextureStorage3DMultisample: marshalled asynchronously */
+struct marshal_cmd_TextureStorage3DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TextureStorage3DMultisample(struct gl_context *ctx, const struct marshal_cmd_TextureStorage3DMultisample *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TextureStorage3DMultisample(ctx->CurrentServerDispatch, (texture, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage3DMultisample(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage3DMultisample);
+ struct marshal_cmd_TextureStorage3DMultisample *cmd;
+ debug_print_marshal("TextureStorage3DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage3DMultisample, cmd_size);
+ cmd->texture = texture;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage3DMultisample");
+ CALL_TextureStorage3DMultisample(ctx->CurrentServerDispatch, (texture, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+
+
+/* GetnUniformivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformivARB(GLuint program, GLint location, GLsizei bufSize, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformivARB");
+ CALL_GetnUniformivARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* ReleaseShaderCompiler: marshalled asynchronously */
+struct marshal_cmd_ReleaseShaderCompiler
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_ReleaseShaderCompiler(struct gl_context *ctx, const struct marshal_cmd_ReleaseShaderCompiler *cmd)
+{
+ CALL_ReleaseShaderCompiler(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_ReleaseShaderCompiler(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ReleaseShaderCompiler);
+ struct marshal_cmd_ReleaseShaderCompiler *cmd;
+ debug_print_marshal("ReleaseShaderCompiler");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ReleaseShaderCompiler, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ReleaseShaderCompiler");
+ CALL_ReleaseShaderCompiler(ctx->CurrentServerDispatch, ());
+}
+
+
+/* BlendFuncSeparate: marshalled asynchronously */
+struct marshal_cmd_BlendFuncSeparate
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum sfactorRGB;
+ GLenum dfactorRGB;
+ GLenum sfactorAlpha;
+ GLenum dfactorAlpha;
+};
+static inline void
+_mesa_unmarshal_BlendFuncSeparate(struct gl_context *ctx, const struct marshal_cmd_BlendFuncSeparate *cmd)
+{
+ const GLenum sfactorRGB = cmd->sfactorRGB;
+ const GLenum dfactorRGB = cmd->dfactorRGB;
+ const GLenum sfactorAlpha = cmd->sfactorAlpha;
+ const GLenum dfactorAlpha = cmd->dfactorAlpha;
+ CALL_BlendFuncSeparate(ctx->CurrentServerDispatch, (sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendFuncSeparate(GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorAlpha, GLenum dfactorAlpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendFuncSeparate);
+ struct marshal_cmd_BlendFuncSeparate *cmd;
+ debug_print_marshal("BlendFuncSeparate");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendFuncSeparate, cmd_size);
+ cmd->sfactorRGB = sfactorRGB;
+ cmd->dfactorRGB = dfactorRGB;
+ cmd->sfactorAlpha = sfactorAlpha;
+ cmd->dfactorAlpha = dfactorAlpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendFuncSeparate");
+ CALL_BlendFuncSeparate(ctx->CurrentServerDispatch, (sfactorRGB, dfactorRGB, sfactorAlpha, dfactorAlpha));
+}
+
+
+/* Color3us: marshalled asynchronously */
+struct marshal_cmd_Color3us
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort red;
+ GLushort green;
+ GLushort blue;
+};
+static inline void
+_mesa_unmarshal_Color3us(struct gl_context *ctx, const struct marshal_cmd_Color3us *cmd)
+{
+ const GLushort red = cmd->red;
+ const GLushort green = cmd->green;
+ const GLushort blue = cmd->blue;
+ CALL_Color3us(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3us(GLushort red, GLushort green, GLushort blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3us);
+ struct marshal_cmd_Color3us *cmd;
+ debug_print_marshal("Color3us");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3us, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3us");
+ CALL_Color3us(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* LoadMatrixx: marshalled asynchronously */
+struct marshal_cmd_LoadMatrixx
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed m[16];
+};
+static inline void
+_mesa_unmarshal_LoadMatrixx(struct gl_context *ctx, const struct marshal_cmd_LoadMatrixx *cmd)
+{
+ const GLfixed * m = cmd->m;
+ CALL_LoadMatrixx(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_LoadMatrixx(const GLfixed * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LoadMatrixx);
+ struct marshal_cmd_LoadMatrixx *cmd;
+ debug_print_marshal("LoadMatrixx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LoadMatrixx, cmd_size);
+ memcpy(cmd->m, m, 64);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LoadMatrixx");
+ CALL_LoadMatrixx(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* BufferStorage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BufferStorage(GLenum target, GLsizeiptr size, const GLvoid * data, GLbitfield flags)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BufferStorage");
+ CALL_BufferStorage(ctx->CurrentServerDispatch, (target, size, data, flags));
+}
+
+
+/* Color3ub: marshalled asynchronously */
+struct marshal_cmd_Color3ub
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte red;
+ GLubyte green;
+ GLubyte blue;
+};
+static inline void
+_mesa_unmarshal_Color3ub(struct gl_context *ctx, const struct marshal_cmd_Color3ub *cmd)
+{
+ const GLubyte red = cmd->red;
+ const GLubyte green = cmd->green;
+ const GLubyte blue = cmd->blue;
+ CALL_Color3ub(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3ub(GLubyte red, GLubyte green, GLubyte blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3ub);
+ struct marshal_cmd_Color3ub *cmd;
+ debug_print_marshal("Color3ub");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3ub, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3ub");
+ CALL_Color3ub(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* Color3ui: marshalled asynchronously */
+struct marshal_cmd_Color3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint red;
+ GLuint green;
+ GLuint blue;
+};
+static inline void
+_mesa_unmarshal_Color3ui(struct gl_context *ctx, const struct marshal_cmd_Color3ui *cmd)
+{
+ const GLuint red = cmd->red;
+ const GLuint green = cmd->green;
+ const GLuint blue = cmd->blue;
+ CALL_Color3ui(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3ui(GLuint red, GLuint green, GLuint blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3ui);
+ struct marshal_cmd_Color3ui *cmd;
+ debug_print_marshal("Color3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3ui, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3ui");
+ CALL_Color3ui(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* VertexAttrib4dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib4dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4dvNV(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4dvNV);
+ struct marshal_cmd_VertexAttrib4dvNV *cmd;
+ debug_print_marshal("VertexAttrib4dvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4dvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4dvNV");
+ CALL_VertexAttrib4dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* AlphaFragmentOp2ATI: marshalled asynchronously */
+struct marshal_cmd_AlphaFragmentOp2ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+ GLuint arg2;
+ GLuint arg2Rep;
+ GLuint arg2Mod;
+};
+static inline void
+_mesa_unmarshal_AlphaFragmentOp2ATI(struct gl_context *ctx, const struct marshal_cmd_AlphaFragmentOp2ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ const GLuint arg2 = cmd->arg2;
+ const GLuint arg2Rep = cmd->arg2Rep;
+ const GLuint arg2Mod = cmd->arg2Mod;
+ CALL_AlphaFragmentOp2ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_AlphaFragmentOp2ATI(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AlphaFragmentOp2ATI);
+ struct marshal_cmd_AlphaFragmentOp2ATI *cmd;
+ debug_print_marshal("AlphaFragmentOp2ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AlphaFragmentOp2ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ cmd->arg2 = arg2;
+ cmd->arg2Rep = arg2Rep;
+ cmd->arg2Mod = arg2Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AlphaFragmentOp2ATI");
+ CALL_AlphaFragmentOp2ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod));
+}
+
+
+/* RasterPos4dv: marshalled asynchronously */
+struct marshal_cmd_RasterPos4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_RasterPos4dv(struct gl_context *ctx, const struct marshal_cmd_RasterPos4dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_RasterPos4dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4dv);
+ struct marshal_cmd_RasterPos4dv *cmd;
+ debug_print_marshal("RasterPos4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4dv, cmd_size);
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4dv");
+ CALL_RasterPos4dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DeleteProgramPipelines: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeleteProgramPipelines(GLsizei n, const GLuint * pipelines)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeleteProgramPipelines");
+ CALL_DeleteProgramPipelines(ctx->CurrentServerDispatch, (n, pipelines));
+}
+
+
+/* LineWidthx: marshalled asynchronously */
+struct marshal_cmd_LineWidthx
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed width;
+};
+static inline void
+_mesa_unmarshal_LineWidthx(struct gl_context *ctx, const struct marshal_cmd_LineWidthx *cmd)
+{
+ const GLfixed width = cmd->width;
+ CALL_LineWidthx(ctx->CurrentServerDispatch, (width));
+}
+static void GLAPIENTRY
+_mesa_marshal_LineWidthx(GLfixed width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LineWidthx);
+ struct marshal_cmd_LineWidthx *cmd;
+ debug_print_marshal("LineWidthx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LineWidthx, cmd_size);
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LineWidthx");
+ CALL_LineWidthx(ctx->CurrentServerDispatch, (width));
+}
+
+
+/* GetTransformFeedbacki_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTransformFeedbacki_v(GLuint xfb, GLenum pname, GLuint index, GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTransformFeedbacki_v");
+ CALL_GetTransformFeedbacki_v(ctx->CurrentServerDispatch, (xfb, pname, index, param));
+}
+
+
+/* Indexdv: marshalled asynchronously */
+struct marshal_cmd_Indexdv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble c[1];
+};
+static inline void
+_mesa_unmarshal_Indexdv(struct gl_context *ctx, const struct marshal_cmd_Indexdv *cmd)
+{
+ const GLdouble * c = cmd->c;
+ CALL_Indexdv(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexdv(const GLdouble * c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexdv);
+ struct marshal_cmd_Indexdv *cmd;
+ debug_print_marshal("Indexdv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexdv, cmd_size);
+ memcpy(cmd->c, c, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexdv");
+ CALL_Indexdv(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* GetnPixelMapfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnPixelMapfvARB(GLenum map, GLsizei bufSize, GLfloat * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnPixelMapfvARB");
+ CALL_GetnPixelMapfvARB(ctx->CurrentServerDispatch, (map, bufSize, values));
+}
+
+
+/* EGLImageTargetTexture2DOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_EGLImageTargetTexture2DOES(GLenum target, GLvoid * writeOffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("EGLImageTargetTexture2DOES");
+ CALL_EGLImageTargetTexture2DOES(ctx->CurrentServerDispatch, (target, writeOffset));
+}
+
+
+/* DepthMask: marshalled asynchronously */
+struct marshal_cmd_DepthMask
+{
+ struct marshal_cmd_base cmd_base;
+ GLboolean flag;
+};
+static inline void
+_mesa_unmarshal_DepthMask(struct gl_context *ctx, const struct marshal_cmd_DepthMask *cmd)
+{
+ const GLboolean flag = cmd->flag;
+ CALL_DepthMask(ctx->CurrentServerDispatch, (flag));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthMask(GLboolean flag)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthMask);
+ struct marshal_cmd_DepthMask *cmd;
+ debug_print_marshal("DepthMask");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthMask, cmd_size);
+ cmd->flag = flag;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthMask");
+ CALL_DepthMask(ctx->CurrentServerDispatch, (flag));
+}
+
+
+/* WindowPos4ivMESA: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4ivMESA(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos4ivMESA");
+ CALL_WindowPos4ivMESA(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetShaderInfoLog: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetShaderInfoLog(GLuint shader, GLsizei bufSize, GLsizei * length, GLchar * infoLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetShaderInfoLog");
+ CALL_GetShaderInfoLog(ctx->CurrentServerDispatch, (shader, bufSize, length, infoLog));
+}
+
+
+/* BindFragmentShaderATI: marshalled asynchronously */
+struct marshal_cmd_BindFragmentShaderATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_BindFragmentShaderATI(struct gl_context *ctx, const struct marshal_cmd_BindFragmentShaderATI *cmd)
+{
+ const GLuint id = cmd->id;
+ CALL_BindFragmentShaderATI(ctx->CurrentServerDispatch, (id));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindFragmentShaderATI(GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindFragmentShaderATI);
+ struct marshal_cmd_BindFragmentShaderATI *cmd;
+ debug_print_marshal("BindFragmentShaderATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindFragmentShaderATI, cmd_size);
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindFragmentShaderATI");
+ CALL_BindFragmentShaderATI(ctx->CurrentServerDispatch, (id));
+}
+
+
+/* BlendFuncSeparateiARB: marshalled asynchronously */
+struct marshal_cmd_BlendFuncSeparateiARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buf;
+ GLenum srcRGB;
+ GLenum dstRGB;
+ GLenum srcA;
+ GLenum dstA;
+};
+static inline void
+_mesa_unmarshal_BlendFuncSeparateiARB(struct gl_context *ctx, const struct marshal_cmd_BlendFuncSeparateiARB *cmd)
+{
+ const GLuint buf = cmd->buf;
+ const GLenum srcRGB = cmd->srcRGB;
+ const GLenum dstRGB = cmd->dstRGB;
+ const GLenum srcA = cmd->srcA;
+ const GLenum dstA = cmd->dstA;
+ CALL_BlendFuncSeparateiARB(ctx->CurrentServerDispatch, (buf, srcRGB, dstRGB, srcA, dstA));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendFuncSeparateiARB(GLuint buf, GLenum srcRGB, GLenum dstRGB, GLenum srcA, GLenum dstA)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendFuncSeparateiARB);
+ struct marshal_cmd_BlendFuncSeparateiARB *cmd;
+ debug_print_marshal("BlendFuncSeparateiARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendFuncSeparateiARB, cmd_size);
+ cmd->buf = buf;
+ cmd->srcRGB = srcRGB;
+ cmd->dstRGB = dstRGB;
+ cmd->srcA = srcA;
+ cmd->dstA = dstA;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendFuncSeparateiARB");
+ CALL_BlendFuncSeparateiARB(ctx->CurrentServerDispatch, (buf, srcRGB, dstRGB, srcA, dstA));
+}
+
+
+/* EGLImageTargetRenderbufferStorageOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_EGLImageTargetRenderbufferStorageOES(GLenum target, GLvoid * writeOffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("EGLImageTargetRenderbufferStorageOES");
+ CALL_EGLImageTargetRenderbufferStorageOES(ctx->CurrentServerDispatch, (target, writeOffset));
+}
+
+
+/* GenTransformFeedbacks: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenTransformFeedbacks(GLsizei n, GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenTransformFeedbacks");
+ CALL_GenTransformFeedbacks(ctx->CurrentServerDispatch, (n, ids));
+}
+
+
+/* VertexPointer: marshalled asynchronously */
+struct marshal_cmd_VertexPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_VertexPointer(struct gl_context *ctx, const struct marshal_cmd_VertexPointer *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_VertexPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexPointer(GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexPointer);
+ struct marshal_cmd_VertexPointer *cmd;
+ debug_print_marshal("VertexPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("VertexPointer");
+ CALL_VertexPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexPointer, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexPointer");
+ CALL_VertexPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+
+
+/* GetCompressedTexImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetCompressedTexImage(GLenum target, GLint level, GLvoid * img)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetCompressedTexImage");
+ CALL_GetCompressedTexImage(ctx->CurrentServerDispatch, (target, level, img));
+}
+
+
+/* ProgramLocalParameter4dvARB: marshalled asynchronously */
+struct marshal_cmd_ProgramLocalParameter4dvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLdouble params[4];
+};
+static inline void
+_mesa_unmarshal_ProgramLocalParameter4dvARB(struct gl_context *ctx, const struct marshal_cmd_ProgramLocalParameter4dvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLdouble * params = cmd->params;
+ CALL_ProgramLocalParameter4dvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramLocalParameter4dvARB(GLenum target, GLuint index, const GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramLocalParameter4dvARB);
+ struct marshal_cmd_ProgramLocalParameter4dvARB *cmd;
+ debug_print_marshal("ProgramLocalParameter4dvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramLocalParameter4dvARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ memcpy(cmd->params, params, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramLocalParameter4dvARB");
+ CALL_ProgramLocalParameter4dvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* UniformMatrix2dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLdouble value[count][4] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 32;
+ CALL_UniformMatrix2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2dv) + safe_mul(count, 32);
+ struct marshal_cmd_UniformMatrix2dv *cmd;
+ debug_print_marshal("UniformMatrix2dv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2dv");
+ CALL_UniformMatrix2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* GetQueryObjectui64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryObjectui64v(GLuint id, GLenum pname, GLuint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryObjectui64v");
+ CALL_GetQueryObjectui64v(ctx->CurrentServerDispatch, (id, pname, params));
+}
+
+
+/* VertexAttribP1uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP1uiv(GLuint index, GLenum type, GLboolean normalized, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribP1uiv");
+ CALL_VertexAttribP1uiv(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* IsProgram: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsProgram(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsProgram");
+ return CALL_IsProgram(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* BindBuffersBase: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindBuffersBase(GLenum target, GLuint first, GLsizei count, const GLuint * buffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindBuffersBase");
+ CALL_BindBuffersBase(ctx->CurrentServerDispatch, (target, first, count, buffers));
+}
+
+
+/* GenTextures: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenTextures(GLsizei n, GLuint * textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenTextures");
+ CALL_GenTextures(ctx->CurrentServerDispatch, (n, textures));
+}
+
+
+/* UnmapNamedBuffer: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_UnmapNamedBuffer(GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("UnmapNamedBuffer");
+ return CALL_UnmapNamedBuffer(ctx->CurrentServerDispatch, (buffer));
+}
+
+
+/* UniformMatrix3x2dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3x2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLdouble value[count][6] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3x2dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3x2dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 48;
+ CALL_UniformMatrix3x2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3x2dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3x2dv) + safe_mul(count, 48);
+ struct marshal_cmd_UniformMatrix3x2dv *cmd;
+ debug_print_marshal("UniformMatrix3x2dv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3x2dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3x2dv");
+ CALL_UniformMatrix3x2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* WindowPos4fMESA: marshalled asynchronously */
+struct marshal_cmd_WindowPos4fMESA
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_WindowPos4fMESA(struct gl_context *ctx, const struct marshal_cmd_WindowPos4fMESA *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_WindowPos4fMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4fMESA(GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos4fMESA);
+ struct marshal_cmd_WindowPos4fMESA *cmd;
+ debug_print_marshal("WindowPos4fMESA");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos4fMESA, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos4fMESA");
+ CALL_WindowPos4fMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttribs2fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs2fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 8) bytes are GLfloat v[n][2] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs2fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs2fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLfloat * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLfloat *) variable_data;
+ variable_data += n * 8;
+ CALL_VertexAttribs2fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs2fvNV(GLuint index, GLsizei n, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs2fvNV) + safe_mul(n, 8);
+ struct marshal_cmd_VertexAttribs2fvNV *cmd;
+ debug_print_marshal("VertexAttribs2fvNV");
+ if (unlikely(safe_mul(n, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs2fvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 8);
+ variable_data += n * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs2fvNV");
+ CALL_VertexAttribs2fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* VertexAttribP4ui: marshalled asynchronously */
+struct marshal_cmd_VertexAttribP4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLenum type;
+ GLboolean normalized;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexAttribP4ui(struct gl_context *ctx, const struct marshal_cmd_VertexAttribP4ui *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint value = cmd->value;
+ CALL_VertexAttribP4ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP4ui(GLuint index, GLenum type, GLboolean normalized, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribP4ui);
+ struct marshal_cmd_VertexAttribP4ui *cmd;
+ debug_print_marshal("VertexAttribP4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribP4ui, cmd_size);
+ cmd->index = index;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribP4ui");
+ CALL_VertexAttribP4ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* StringMarkerGREMEDY: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_StringMarkerGREMEDY(GLsizei len, const GLvoid * string)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("StringMarkerGREMEDY");
+ CALL_StringMarkerGREMEDY(ctx->CurrentServerDispatch, (len, string));
+}
+
+
+/* Uniform4i: marshalled asynchronously */
+struct marshal_cmd_Uniform4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint v0;
+ GLint v1;
+ GLint v2;
+ GLint v3;
+};
+static inline void
+_mesa_unmarshal_Uniform4i(struct gl_context *ctx, const struct marshal_cmd_Uniform4i *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint v0 = cmd->v0;
+ const GLint v1 = cmd->v1;
+ const GLint v2 = cmd->v2;
+ const GLint v3 = cmd->v3;
+ CALL_Uniform4i(ctx->CurrentServerDispatch, (location, v0, v1, v2, v3));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4i(GLint location, GLint v0, GLint v1, GLint v2, GLint v3)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4i);
+ struct marshal_cmd_Uniform4i *cmd;
+ debug_print_marshal("Uniform4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4i, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ cmd->v3 = v3;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4i");
+ CALL_Uniform4i(ctx->CurrentServerDispatch, (location, v0, v1, v2, v3));
+}
+
+
+/* Uniform4d: marshalled asynchronously */
+struct marshal_cmd_Uniform4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_Uniform4d(struct gl_context *ctx, const struct marshal_cmd_Uniform4d *cmd)
+{
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_Uniform4d(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4d(GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4d);
+ struct marshal_cmd_Uniform4d *cmd;
+ debug_print_marshal("Uniform4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4d, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4d");
+ CALL_Uniform4d(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+
+
+/* Uniform4f: marshalled asynchronously */
+struct marshal_cmd_Uniform4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLfloat v0;
+ GLfloat v1;
+ GLfloat v2;
+ GLfloat v3;
+};
+static inline void
+_mesa_unmarshal_Uniform4f(struct gl_context *ctx, const struct marshal_cmd_Uniform4f *cmd)
+{
+ const GLint location = cmd->location;
+ const GLfloat v0 = cmd->v0;
+ const GLfloat v1 = cmd->v1;
+ const GLfloat v2 = cmd->v2;
+ const GLfloat v3 = cmd->v3;
+ CALL_Uniform4f(ctx->CurrentServerDispatch, (location, v0, v1, v2, v3));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4f(GLint location, GLfloat v0, GLfloat v1, GLfloat v2, GLfloat v3)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4f);
+ struct marshal_cmd_Uniform4f *cmd;
+ debug_print_marshal("Uniform4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4f, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ cmd->v3 = v3;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4f");
+ CALL_Uniform4f(ctx->CurrentServerDispatch, (location, v0, v1, v2, v3));
+}
+
+
+/* ProgramUniform3dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLdouble value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 24;
+ CALL_ProgramUniform3dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3dv(GLuint program, GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3dv) + safe_mul(count, 24);
+ struct marshal_cmd_ProgramUniform3dv *cmd;
+ debug_print_marshal("ProgramUniform3dv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3dv");
+ CALL_ProgramUniform3dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetNamedBufferParameteri64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedBufferParameteri64v(GLuint buffer, GLenum pname, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedBufferParameteri64v");
+ CALL_GetNamedBufferParameteri64v(ctx->CurrentServerDispatch, (buffer, pname, params));
+}
+
+
+/* NamedFramebufferTexture: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum attachment;
+ GLuint texture;
+ GLint level;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferTexture(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferTexture *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum attachment = cmd->attachment;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ CALL_NamedFramebufferTexture(ctx->CurrentServerDispatch, (framebuffer, attachment, texture, level));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferTexture(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferTexture);
+ struct marshal_cmd_NamedFramebufferTexture *cmd;
+ debug_print_marshal("NamedFramebufferTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferTexture, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->attachment = attachment;
+ cmd->texture = texture;
+ cmd->level = level;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferTexture");
+ CALL_NamedFramebufferTexture(ctx->CurrentServerDispatch, (framebuffer, attachment, texture, level));
+}
+
+
+/* ProgramUniform3d: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3d(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3d *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_ProgramUniform3d(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3d(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3d);
+ struct marshal_cmd_ProgramUniform3d *cmd;
+ debug_print_marshal("ProgramUniform3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3d, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3d");
+ CALL_ProgramUniform3d(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* ProgramUniform3f: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3f(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3f *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_ProgramUniform3f(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3f);
+ struct marshal_cmd_ProgramUniform3f *cmd;
+ debug_print_marshal("ProgramUniform3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3f, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3f");
+ CALL_ProgramUniform3f(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* ProgramUniform3i: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint x;
+ GLint y;
+ GLint z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3i(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3i *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ CALL_ProgramUniform3i(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3i(GLuint program, GLint location, GLint x, GLint y, GLint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3i);
+ struct marshal_cmd_ProgramUniform3i *cmd;
+ debug_print_marshal("ProgramUniform3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3i, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3i");
+ CALL_ProgramUniform3i(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* PointParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PointParameterfv(GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PointParameterfv");
+ CALL_PointParameterfv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* GetHistogramParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetHistogramParameterfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetHistogramParameterfv");
+ CALL_GetHistogramParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetString: marshalled synchronously */
+static const GLubyte * GLAPIENTRY
+_mesa_marshal_GetString(GLenum name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetString");
+ return CALL_GetString(ctx->CurrentServerDispatch, (name));
+}
+
+
+/* VDPAUUnmapSurfacesNV: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VDPAUUnmapSurfacesNV(GLsizei numSurfaces, const GLintptr * surfaces)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAUUnmapSurfacesNV");
+ CALL_VDPAUUnmapSurfacesNV(ctx->CurrentServerDispatch, (numSurfaces, surfaces));
+}
+
+
+/* GetnHistogramARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnHistogramARB(GLenum target, GLboolean reset, GLenum format, GLenum type, GLsizei bufSize, GLvoid * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnHistogramARB");
+ CALL_GetnHistogramARB(ctx->CurrentServerDispatch, (target, reset, format, type, bufSize, values));
+}
+
+
+/* SecondaryColor3s: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort red;
+ GLshort green;
+ GLshort blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3s(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3s *cmd)
+{
+ const GLshort red = cmd->red;
+ const GLshort green = cmd->green;
+ const GLshort blue = cmd->blue;
+ CALL_SecondaryColor3s(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3s(GLshort red, GLshort green, GLshort blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3s);
+ struct marshal_cmd_SecondaryColor3s *cmd;
+ debug_print_marshal("SecondaryColor3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3s, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3s");
+ CALL_SecondaryColor3s(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* TexStorageMem2DEXT: marshalled asynchronously */
+struct marshal_cmd_TexStorageMem2DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TexStorageMem2DEXT(struct gl_context *ctx, const struct marshal_cmd_TexStorageMem2DEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TexStorageMem2DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorageMem2DEXT(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorageMem2DEXT);
+ struct marshal_cmd_TexStorageMem2DEXT *cmd;
+ debug_print_marshal("TexStorageMem2DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorageMem2DEXT, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorageMem2DEXT");
+ CALL_TexStorageMem2DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, memory, offset));
+}
+
+
+/* VertexAttribP2uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP2uiv(GLuint index, GLenum type, GLboolean normalized, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribP2uiv");
+ CALL_VertexAttribP2uiv(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* UniformMatrix3x4dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3x4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 96) bytes are GLdouble value[count][12] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3x4dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3x4dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 96;
+ CALL_UniformMatrix3x4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3x4dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3x4dv) + safe_mul(count, 96);
+ struct marshal_cmd_UniformMatrix3x4dv *cmd;
+ debug_print_marshal("UniformMatrix3x4dv");
+ if (unlikely(safe_mul(count, 96) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3x4dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 96);
+ variable_data += count * 96;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3x4dv");
+ CALL_UniformMatrix3x4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* VertexAttrib3fNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3fNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3fNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3fNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_VertexAttrib3fNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3fNV(GLuint index, GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3fNV);
+ struct marshal_cmd_VertexAttrib3fNV *cmd;
+ debug_print_marshal("VertexAttrib3fNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3fNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3fNV");
+ CALL_VertexAttrib3fNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* SecondaryColor3b: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3b
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte red;
+ GLbyte green;
+ GLbyte blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3b(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3b *cmd)
+{
+ const GLbyte red = cmd->red;
+ const GLbyte green = cmd->green;
+ const GLbyte blue = cmd->blue;
+ CALL_SecondaryColor3b(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3b(GLbyte red, GLbyte green, GLbyte blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3b);
+ struct marshal_cmd_SecondaryColor3b *cmd;
+ debug_print_marshal("SecondaryColor3b");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3b, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3b");
+ CALL_SecondaryColor3b(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* EnableClientState: marshalled asynchronously */
+struct marshal_cmd_EnableClientState
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum array;
+};
+static inline void
+_mesa_unmarshal_EnableClientState(struct gl_context *ctx, const struct marshal_cmd_EnableClientState *cmd)
+{
+ const GLenum array = cmd->array;
+ CALL_EnableClientState(ctx->CurrentServerDispatch, (array));
+}
+static void GLAPIENTRY
+_mesa_marshal_EnableClientState(GLenum array)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EnableClientState);
+ struct marshal_cmd_EnableClientState *cmd;
+ debug_print_marshal("EnableClientState");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EnableClientState, cmd_size);
+ cmd->array = array;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EnableClientState");
+ CALL_EnableClientState(ctx->CurrentServerDispatch, (array));
+}
+
+
+/* GetActiveSubroutineName: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveSubroutineName(GLuint program, GLenum shadertype, GLuint index, GLsizei bufsize, GLsizei * length, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveSubroutineName");
+ CALL_GetActiveSubroutineName(ctx->CurrentServerDispatch, (program, shadertype, index, bufsize, length, name));
+}
+
+
+/* SecondaryColor3i: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint red;
+ GLint green;
+ GLint blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3i(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3i *cmd)
+{
+ const GLint red = cmd->red;
+ const GLint green = cmd->green;
+ const GLint blue = cmd->blue;
+ CALL_SecondaryColor3i(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3i(GLint red, GLint green, GLint blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3i);
+ struct marshal_cmd_SecondaryColor3i *cmd;
+ debug_print_marshal("SecondaryColor3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3i, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3i");
+ CALL_SecondaryColor3i(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* FlushMappedBufferRange: marshalled asynchronously */
+struct marshal_cmd_FlushMappedBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLintptr offset;
+ GLsizeiptr length;
+};
+static inline void
+_mesa_unmarshal_FlushMappedBufferRange(struct gl_context *ctx, const struct marshal_cmd_FlushMappedBufferRange *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr length = cmd->length;
+ CALL_FlushMappedBufferRange(ctx->CurrentServerDispatch, (target, offset, length));
+}
+static void GLAPIENTRY
+_mesa_marshal_FlushMappedBufferRange(GLenum target, GLintptr offset, GLsizeiptr length)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FlushMappedBufferRange);
+ struct marshal_cmd_FlushMappedBufferRange *cmd;
+ debug_print_marshal("FlushMappedBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FlushMappedBufferRange, cmd_size);
+ cmd->target = target;
+ cmd->offset = offset;
+ cmd->length = length;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FlushMappedBufferRange");
+ CALL_FlushMappedBufferRange(ctx->CurrentServerDispatch, (target, offset, length));
+}
+
+
+/* TexStorageMem3DEXT: marshalled asynchronously */
+struct marshal_cmd_TexStorageMem3DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TexStorageMem3DEXT(struct gl_context *ctx, const struct marshal_cmd_TexStorageMem3DEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TexStorageMem3DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, depth, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorageMem3DEXT(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorageMem3DEXT);
+ struct marshal_cmd_TexStorageMem3DEXT *cmd;
+ debug_print_marshal("TexStorageMem3DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorageMem3DEXT, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorageMem3DEXT");
+ CALL_TexStorageMem3DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, depth, memory, offset));
+}
+
+
+/* Lightfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Lightfv(GLenum light, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Lightfv");
+ CALL_Lightfv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* GetFramebufferAttachmentParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFramebufferAttachmentParameteriv(GLenum target, GLenum attachment, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFramebufferAttachmentParameteriv");
+ CALL_GetFramebufferAttachmentParameteriv(ctx->CurrentServerDispatch, (target, attachment, pname, params));
+}
+
+
+/* ColorSubTable: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorSubTable(GLenum target, GLsizei start, GLsizei count, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorSubTable");
+ CALL_ColorSubTable(ctx->CurrentServerDispatch, (target, start, count, format, type, data));
+}
+
+
+/* GetVertexArrayIndexed64iv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexArrayIndexed64iv(GLuint vaobj, GLuint index, GLenum pname, GLint64 * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexArrayIndexed64iv");
+ CALL_GetVertexArrayIndexed64iv(ctx->CurrentServerDispatch, (vaobj, index, pname, param));
+}
+
+
+/* EndPerfMonitorAMD: marshalled asynchronously */
+struct marshal_cmd_EndPerfMonitorAMD
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint monitor;
+};
+static inline void
+_mesa_unmarshal_EndPerfMonitorAMD(struct gl_context *ctx, const struct marshal_cmd_EndPerfMonitorAMD *cmd)
+{
+ const GLuint monitor = cmd->monitor;
+ CALL_EndPerfMonitorAMD(ctx->CurrentServerDispatch, (monitor));
+}
+static void GLAPIENTRY
+_mesa_marshal_EndPerfMonitorAMD(GLuint monitor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndPerfMonitorAMD);
+ struct marshal_cmd_EndPerfMonitorAMD *cmd;
+ debug_print_marshal("EndPerfMonitorAMD");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndPerfMonitorAMD, cmd_size);
+ cmd->monitor = monitor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndPerfMonitorAMD");
+ CALL_EndPerfMonitorAMD(ctx->CurrentServerDispatch, (monitor));
+}
+
+
+/* CreateBuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateBuffers(GLsizei n, GLuint * buffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateBuffers");
+ CALL_CreateBuffers(ctx->CurrentServerDispatch, (n, buffers));
+}
+
+
+/* VertexAttribs4dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs4dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 32) bytes are GLdouble v[n][4] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs4dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs4dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLdouble * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLdouble *) variable_data;
+ variable_data += n * 32;
+ CALL_VertexAttribs4dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs4dvNV(GLuint index, GLsizei n, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs4dvNV) + safe_mul(n, 32);
+ struct marshal_cmd_VertexAttribs4dvNV *cmd;
+ debug_print_marshal("VertexAttribs4dvNV");
+ if (unlikely(safe_mul(n, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs4dvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 32);
+ variable_data += n * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs4dvNV");
+ CALL_VertexAttribs4dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* Uniform2i64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform2i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLint64 value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2i64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform2i64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform2i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2i64vARB(GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2i64vARB) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform2i64vARB *cmd;
+ debug_print_marshal("Uniform2i64vARB");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2i64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2i64vARB");
+ CALL_Uniform2i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetMultisamplefv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMultisamplefv(GLenum pname, GLuint index, GLfloat * val)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMultisamplefv");
+ CALL_GetMultisamplefv(ctx->CurrentServerDispatch, (pname, index, val));
+}
+
+
+/* GetActiveSubroutineUniformName: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveSubroutineUniformName(GLuint program, GLenum shadertype, GLuint index, GLsizei bufsize, GLsizei * length, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveSubroutineUniformName");
+ CALL_GetActiveSubroutineUniformName(ctx->CurrentServerDispatch, (program, shadertype, index, bufsize, length, name));
+}
+
+
+/* Rectdv: marshalled asynchronously */
+struct marshal_cmd_Rectdv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v1[2];
+ GLdouble v2[2];
+};
+static inline void
+_mesa_unmarshal_Rectdv(struct gl_context *ctx, const struct marshal_cmd_Rectdv *cmd)
+{
+ const GLdouble * v1 = cmd->v1;
+ const GLdouble * v2 = cmd->v2;
+ CALL_Rectdv(ctx->CurrentServerDispatch, (v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectdv(const GLdouble * v1, const GLdouble * v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectdv);
+ struct marshal_cmd_Rectdv *cmd;
+ debug_print_marshal("Rectdv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectdv, cmd_size);
+ memcpy(cmd->v1, v1, 16);
+ memcpy(cmd->v2, v2, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectdv");
+ CALL_Rectdv(ctx->CurrentServerDispatch, (v1, v2));
+}
+
+
+/* DrawArraysInstancedARB: marshalled asynchronously */
+struct marshal_cmd_DrawArraysInstancedARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLint first;
+ GLsizei count;
+ GLsizei primcount;
+};
+static inline void
+_mesa_unmarshal_DrawArraysInstancedARB(struct gl_context *ctx, const struct marshal_cmd_DrawArraysInstancedARB *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLint first = cmd->first;
+ const GLsizei count = cmd->count;
+ const GLsizei primcount = cmd->primcount;
+ CALL_DrawArraysInstancedARB(ctx->CurrentServerDispatch, (mode, first, count, primcount));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawArraysInstancedARB(GLenum mode, GLint first, GLsizei count, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawArraysInstancedARB);
+ struct marshal_cmd_DrawArraysInstancedARB *cmd;
+ debug_print_marshal("DrawArraysInstancedARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawArraysInstancedARB, cmd_size);
+ cmd->mode = mode;
+ cmd->first = first;
+ cmd->count = count;
+ cmd->primcount = primcount;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawArraysInstancedARB");
+ CALL_DrawArraysInstancedARB(ctx->CurrentServerDispatch, (mode, first, count, primcount));
+}
+
+
+/* MakeImageHandleNonResidentARB: marshalled asynchronously */
+struct marshal_cmd_MakeImageHandleNonResidentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint64 handle;
+};
+static inline void
+_mesa_unmarshal_MakeImageHandleNonResidentARB(struct gl_context *ctx, const struct marshal_cmd_MakeImageHandleNonResidentARB *cmd)
+{
+ const GLuint64 handle = cmd->handle;
+ CALL_MakeImageHandleNonResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+static void GLAPIENTRY
+_mesa_marshal_MakeImageHandleNonResidentARB(GLuint64 handle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MakeImageHandleNonResidentARB);
+ struct marshal_cmd_MakeImageHandleNonResidentARB *cmd;
+ debug_print_marshal("MakeImageHandleNonResidentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MakeImageHandleNonResidentARB, cmd_size);
+ cmd->handle = handle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MakeImageHandleNonResidentARB");
+ CALL_MakeImageHandleNonResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+
+
+/* ImportMemoryFdEXT: marshalled asynchronously */
+struct marshal_cmd_ImportMemoryFdEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint memory;
+ GLuint64 size;
+ GLenum handleType;
+ GLint fd;
+};
+static inline void
+_mesa_unmarshal_ImportMemoryFdEXT(struct gl_context *ctx, const struct marshal_cmd_ImportMemoryFdEXT *cmd)
+{
+ const GLuint memory = cmd->memory;
+ const GLuint64 size = cmd->size;
+ const GLenum handleType = cmd->handleType;
+ const GLint fd = cmd->fd;
+ CALL_ImportMemoryFdEXT(ctx->CurrentServerDispatch, (memory, size, handleType, fd));
+}
+static void GLAPIENTRY
+_mesa_marshal_ImportMemoryFdEXT(GLuint memory, GLuint64 size, GLenum handleType, GLint fd)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ImportMemoryFdEXT);
+ struct marshal_cmd_ImportMemoryFdEXT *cmd;
+ debug_print_marshal("ImportMemoryFdEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ImportMemoryFdEXT, cmd_size);
+ cmd->memory = memory;
+ cmd->size = size;
+ cmd->handleType = handleType;
+ cmd->fd = fd;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ImportMemoryFdEXT");
+ CALL_ImportMemoryFdEXT(ctx->CurrentServerDispatch, (memory, size, handleType, fd));
+}
+
+
+/* ProgramEnvParameters4fvEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ProgramEnvParameters4fvEXT(GLenum target, GLuint index, GLsizei count, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ProgramEnvParameters4fvEXT");
+ CALL_ProgramEnvParameters4fvEXT(ctx->CurrentServerDispatch, (target, index, count, params));
+}
+
+
+/* TexStorageMem1DEXT: marshalled asynchronously */
+struct marshal_cmd_TexStorageMem1DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TexStorageMem1DEXT(struct gl_context *ctx, const struct marshal_cmd_TexStorageMem1DEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TexStorageMem1DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorageMem1DEXT(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorageMem1DEXT);
+ struct marshal_cmd_TexStorageMem1DEXT *cmd;
+ debug_print_marshal("TexStorageMem1DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorageMem1DEXT, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorageMem1DEXT");
+ CALL_TexStorageMem1DEXT(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, memory, offset));
+}
+
+
+/* BlendBarrier: marshalled asynchronously */
+struct marshal_cmd_BlendBarrier
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_BlendBarrier(struct gl_context *ctx, const struct marshal_cmd_BlendBarrier *cmd)
+{
+ CALL_BlendBarrier(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendBarrier(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendBarrier);
+ struct marshal_cmd_BlendBarrier *cmd;
+ debug_print_marshal("BlendBarrier");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendBarrier, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendBarrier");
+ CALL_BlendBarrier(ctx->CurrentServerDispatch, ());
+}
+
+
+/* VertexAttrib2svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib2svNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2svNV(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2svNV);
+ struct marshal_cmd_VertexAttrib2svNV *cmd;
+ debug_print_marshal("VertexAttrib2svNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2svNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2svNV");
+ CALL_VertexAttrib2svNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SecondaryColorP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColorP3uiv(GLenum type, const GLuint * color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SecondaryColorP3uiv");
+ CALL_SecondaryColorP3uiv(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* GetnPixelMapuivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnPixelMapuivARB(GLenum map, GLsizei bufSize, GLuint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnPixelMapuivARB");
+ CALL_GetnPixelMapuivARB(ctx->CurrentServerDispatch, (map, bufSize, values));
+}
+
+
+/* GetSamplerParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSamplerParameterIuiv(GLuint sampler, GLenum pname, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSamplerParameterIuiv");
+ CALL_GetSamplerParameterIuiv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* Disablei: marshalled asynchronously */
+struct marshal_cmd_Disablei
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_Disablei(struct gl_context *ctx, const struct marshal_cmd_Disablei *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ CALL_Disablei(ctx->CurrentServerDispatch, (target, index));
+}
+static void GLAPIENTRY
+_mesa_marshal_Disablei(GLenum target, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Disablei);
+ struct marshal_cmd_Disablei *cmd;
+ debug_print_marshal("Disablei");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Disablei, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Disablei");
+ CALL_Disablei(ctx->CurrentServerDispatch, (target, index));
+}
+
+
+/* CompressedTexSubImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexSubImage3D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexSubImage3D");
+ CALL_CompressedTexSubImage3D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, data));
+}
+
+
+/* WindowPos4svMESA: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4svMESA(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos4svMESA");
+ CALL_WindowPos4svMESA(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ObjectLabel: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ObjectLabel(GLenum identifier, GLuint name, GLsizei length, const GLchar * label)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ObjectLabel");
+ CALL_ObjectLabel(ctx->CurrentServerDispatch, (identifier, name, length, label));
+}
+
+
+/* Color3dv: marshalled asynchronously */
+struct marshal_cmd_Color3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_Color3dv(struct gl_context *ctx, const struct marshal_cmd_Color3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Color3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3dv);
+ struct marshal_cmd_Color3dv *cmd;
+ debug_print_marshal("Color3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3dv");
+ CALL_Color3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ProgramUniform1ui64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint64 x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1ui64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1ui64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ CALL_ProgramUniform1ui64ARB(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1ui64ARB(GLuint program, GLint location, GLuint64 x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1ui64ARB);
+ struct marshal_cmd_ProgramUniform1ui64ARB *cmd;
+ debug_print_marshal("ProgramUniform1ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1ui64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1ui64ARB");
+ CALL_ProgramUniform1ui64ARB(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* BeginQuery: marshalled asynchronously */
+struct marshal_cmd_BeginQuery
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_BeginQuery(struct gl_context *ctx, const struct marshal_cmd_BeginQuery *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint id = cmd->id;
+ CALL_BeginQuery(ctx->CurrentServerDispatch, (target, id));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginQuery(GLenum target, GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginQuery);
+ struct marshal_cmd_BeginQuery *cmd;
+ debug_print_marshal("BeginQuery");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginQuery, cmd_size);
+ cmd->target = target;
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginQuery");
+ CALL_BeginQuery(ctx->CurrentServerDispatch, (target, id));
+}
+
+
+/* VertexP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexP3uiv(GLenum type, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexP3uiv");
+ CALL_VertexP3uiv(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* GetUniformLocation: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetUniformLocation(GLuint program, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformLocation");
+ return CALL_GetUniformLocation(ctx->CurrentServerDispatch, (program, name));
+}
+
+
+/* PixelStoref: marshalled asynchronously */
+struct marshal_cmd_PixelStoref
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_PixelStoref(struct gl_context *ctx, const struct marshal_cmd_PixelStoref *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_PixelStoref(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PixelStoref(GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PixelStoref);
+ struct marshal_cmd_PixelStoref *cmd;
+ debug_print_marshal("PixelStoref");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PixelStoref, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PixelStoref");
+ CALL_PixelStoref(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* WindowPos2iv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos2iv");
+ CALL_WindowPos2iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* PixelStorei: marshalled asynchronously */
+struct marshal_cmd_PixelStorei
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_PixelStorei(struct gl_context *ctx, const struct marshal_cmd_PixelStorei *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_PixelStorei(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PixelStorei(GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PixelStorei);
+ struct marshal_cmd_PixelStorei *cmd;
+ debug_print_marshal("PixelStorei");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PixelStorei, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PixelStorei");
+ CALL_PixelStorei(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* VertexAttribs1svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs1svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 2) bytes are GLshort v[n] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs1svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs1svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLshort * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLshort *) variable_data;
+ variable_data += n * 2;
+ CALL_VertexAttribs1svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs1svNV(GLuint index, GLsizei n, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs1svNV) + safe_mul(n, 2);
+ struct marshal_cmd_VertexAttribs1svNV *cmd;
+ debug_print_marshal("VertexAttribs1svNV");
+ if (unlikely(safe_mul(n, 2) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs1svNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 2);
+ variable_data += n * 2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs1svNV");
+ CALL_VertexAttribs1svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* CheckNamedFramebufferStatus: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_CheckNamedFramebufferStatus(GLuint framebuffer, GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CheckNamedFramebufferStatus");
+ return CALL_CheckNamedFramebufferStatus(ctx->CurrentServerDispatch, (framebuffer, target));
+}
+
+
+/* UniformSubroutinesuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_UniformSubroutinesuiv(GLenum shadertype, GLsizei count, const GLuint * indices)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("UniformSubroutinesuiv");
+ CALL_UniformSubroutinesuiv(ctx->CurrentServerDispatch, (shadertype, count, indices));
+}
+
+
+/* CheckFramebufferStatus: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_CheckFramebufferStatus(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CheckFramebufferStatus");
+ return CALL_CheckFramebufferStatus(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* DispatchComputeIndirect: marshalled asynchronously */
+struct marshal_cmd_DispatchComputeIndirect
+{
+ struct marshal_cmd_base cmd_base;
+ GLintptr indirect;
+};
+static inline void
+_mesa_unmarshal_DispatchComputeIndirect(struct gl_context *ctx, const struct marshal_cmd_DispatchComputeIndirect *cmd)
+{
+ const GLintptr indirect = cmd->indirect;
+ CALL_DispatchComputeIndirect(ctx->CurrentServerDispatch, (indirect));
+}
+static void GLAPIENTRY
+_mesa_marshal_DispatchComputeIndirect(GLintptr indirect)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DispatchComputeIndirect);
+ struct marshal_cmd_DispatchComputeIndirect *cmd;
+ debug_print_marshal("DispatchComputeIndirect");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DispatchComputeIndirect, cmd_size);
+ cmd->indirect = indirect;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DispatchComputeIndirect");
+ CALL_DispatchComputeIndirect(ctx->CurrentServerDispatch, (indirect));
+}
+
+
+/* InvalidateBufferData: marshalled asynchronously */
+struct marshal_cmd_InvalidateBufferData
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_InvalidateBufferData(struct gl_context *ctx, const struct marshal_cmd_InvalidateBufferData *cmd)
+{
+ const GLuint buffer = cmd->buffer;
+ CALL_InvalidateBufferData(ctx->CurrentServerDispatch, (buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateBufferData(GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateBufferData);
+ struct marshal_cmd_InvalidateBufferData *cmd;
+ debug_print_marshal("InvalidateBufferData");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateBufferData, cmd_size);
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateBufferData");
+ CALL_InvalidateBufferData(ctx->CurrentServerDispatch, (buffer));
+}
+
+
+/* GetUniformdv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformdv(GLuint program, GLint location, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformdv");
+ CALL_GetUniformdv(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* ProgramLocalParameters4fvEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ProgramLocalParameters4fvEXT(GLenum target, GLuint index, GLsizei count, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ProgramLocalParameters4fvEXT");
+ CALL_ProgramLocalParameters4fvEXT(ctx->CurrentServerDispatch, (target, index, count, params));
+}
+
+
+/* VertexAttribL1dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL1dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribL1dv");
+ CALL_VertexAttribL1dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Uniform1ui64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform1ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLuint64 value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1ui64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform1ui64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform1ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1ui64vARB(GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1ui64vARB) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform1ui64vARB *cmd;
+ debug_print_marshal("Uniform1ui64vARB");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1ui64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1ui64vARB");
+ CALL_Uniform1ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* IsFramebuffer: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsFramebuffer(GLuint framebuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsFramebuffer");
+ return CALL_IsFramebuffer(ctx->CurrentServerDispatch, (framebuffer));
+}
+
+
+/* GetDoublev: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetDoublev(GLenum pname, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetDoublev");
+ CALL_GetDoublev(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* GetObjectLabel: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetObjectLabel(GLenum identifier, GLuint name, GLsizei bufSize, GLsizei * length, GLchar * label)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetObjectLabel");
+ CALL_GetObjectLabel(ctx->CurrentServerDispatch, (identifier, name, bufSize, length, label));
+}
+
+
+/* ColorP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorP3uiv(GLenum type, const GLuint * color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorP3uiv");
+ CALL_ColorP3uiv(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* GetTextureSubImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureSubImage(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, GLsizei bufSize, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureSubImage");
+ CALL_GetTextureSubImage(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, bufSize, pixels));
+}
+
+
+/* VertexAttribI4ivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4ivEXT(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4ivEXT");
+ CALL_VertexAttribI4ivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* VertexAttrib1svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib1svNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1svNV(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1svNV);
+ struct marshal_cmd_VertexAttrib1svNV *cmd;
+ debug_print_marshal("VertexAttrib1svNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1svNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 2);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1svNV");
+ CALL_VertexAttrib1svNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SecondaryColor3ubv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3ubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3ubv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3ubv *cmd)
+{
+ const GLubyte * v = cmd->v;
+ CALL_SecondaryColor3ubv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3ubv(const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3ubv);
+ struct marshal_cmd_SecondaryColor3ubv *cmd;
+ debug_print_marshal("SecondaryColor3ubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3ubv, cmd_size);
+ memcpy(cmd->v, v, 3);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3ubv");
+ CALL_SecondaryColor3ubv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetDebugMessageLog: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GetDebugMessageLog(GLuint count, GLsizei bufsize, GLenum * sources, GLenum * types, GLuint * ids, GLenum * severities, GLsizei * lengths, GLchar * messageLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetDebugMessageLog");
+ return CALL_GetDebugMessageLog(ctx->CurrentServerDispatch, (count, bufsize, sources, types, ids, severities, lengths, messageLog));
+}
+
+
+/* Uniform4ui64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform4ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+ GLuint64 z;
+ GLuint64 w;
+};
+static inline void
+_mesa_unmarshal_Uniform4ui64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform4ui64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ const GLuint64 z = cmd->z;
+ const GLuint64 w = cmd->w;
+ CALL_Uniform4ui64ARB(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4ui64ARB(GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4ui64ARB);
+ struct marshal_cmd_Uniform4ui64ARB *cmd;
+ debug_print_marshal("Uniform4ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4ui64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4ui64ARB");
+ CALL_Uniform4ui64ARB(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+
+
+/* RasterPos3fv: marshalled asynchronously */
+struct marshal_cmd_RasterPos3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_RasterPos3fv(struct gl_context *ctx, const struct marshal_cmd_RasterPos3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_RasterPos3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3fv);
+ struct marshal_cmd_RasterPos3fv *cmd;
+ debug_print_marshal("RasterPos3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3fv");
+ CALL_RasterPos3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetShaderSource: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetShaderSource(GLuint shader, GLsizei bufSize, GLsizei * length, GLchar * source)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetShaderSource");
+ CALL_GetShaderSource(ctx->CurrentServerDispatch, (shader, bufSize, length, source));
+}
+
+
+/* BindProgramARB: marshalled asynchronously */
+struct marshal_cmd_BindProgramARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_BindProgramARB(struct gl_context *ctx, const struct marshal_cmd_BindProgramARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint program = cmd->program;
+ CALL_BindProgramARB(ctx->CurrentServerDispatch, (target, program));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindProgramARB(GLenum target, GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindProgramARB);
+ struct marshal_cmd_BindProgramARB *cmd;
+ debug_print_marshal("BindProgramARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindProgramARB, cmd_size);
+ cmd->target = target;
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindProgramARB");
+ CALL_BindProgramARB(ctx->CurrentServerDispatch, (target, program));
+}
+
+
+/* VertexAttrib3sNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3sNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3sNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3sNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ CALL_VertexAttrib3sNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3sNV(GLuint index, GLshort x, GLshort y, GLshort z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3sNV);
+ struct marshal_cmd_VertexAttrib3sNV *cmd;
+ debug_print_marshal("VertexAttrib3sNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3sNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3sNV");
+ CALL_VertexAttrib3sNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* ColorFragmentOp1ATI: marshalled asynchronously */
+struct marshal_cmd_ColorFragmentOp1ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMask;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+};
+static inline void
+_mesa_unmarshal_ColorFragmentOp1ATI(struct gl_context *ctx, const struct marshal_cmd_ColorFragmentOp1ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMask = cmd->dstMask;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ CALL_ColorFragmentOp1ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorFragmentOp1ATI(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorFragmentOp1ATI);
+ struct marshal_cmd_ColorFragmentOp1ATI *cmd;
+ debug_print_marshal("ColorFragmentOp1ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorFragmentOp1ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMask = dstMask;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorFragmentOp1ATI");
+ CALL_ColorFragmentOp1ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod));
+}
+
+
+/* ProgramUniformMatrix4x3fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4x3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLfloat value[count][12] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4x3fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4x3fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 48;
+ CALL_ProgramUniformMatrix4x3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4x3fv) + safe_mul(count, 48);
+ struct marshal_cmd_ProgramUniformMatrix4x3fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4x3fv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4x3fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4x3fv");
+ CALL_ProgramUniformMatrix4x3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* PopClientAttrib: marshalled asynchronously */
+struct marshal_cmd_PopClientAttrib
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PopClientAttrib(struct gl_context *ctx, const struct marshal_cmd_PopClientAttrib *cmd)
+{
+ CALL_PopClientAttrib(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PopClientAttrib(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PopClientAttrib);
+ struct marshal_cmd_PopClientAttrib *cmd;
+ debug_print_marshal("PopClientAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PopClientAttrib, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PopClientAttrib");
+ CALL_PopClientAttrib(ctx->CurrentServerDispatch, ());
+}
+
+
+/* DrawElementsInstancedARB: marshalled asynchronously */
+struct marshal_cmd_DrawElementsInstancedARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLsizei primcount;
+};
+static inline void
+_mesa_unmarshal_DrawElementsInstancedARB(struct gl_context *ctx, const struct marshal_cmd_DrawElementsInstancedARB *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLsizei primcount = cmd->primcount;
+ CALL_DrawElementsInstancedARB(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsInstancedARB(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElementsInstancedARB);
+ struct marshal_cmd_DrawElementsInstancedARB *cmd;
+ debug_print_marshal("DrawElementsInstancedARB");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedARB");
+ CALL_DrawElementsInstancedARB(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElementsInstancedARB, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->primcount = primcount;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedARB");
+ CALL_DrawElementsInstancedARB(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount));
+}
+
+
+/* GetQueryObjectuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryObjectuiv(GLuint id, GLenum pname, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryObjectuiv");
+ CALL_GetQueryObjectuiv(ctx->CurrentServerDispatch, (id, pname, params));
+}
+
+
+/* VertexAttribI4bv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4bv(GLuint index, const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4bv");
+ CALL_VertexAttribI4bv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* DisableVertexArrayAttrib: marshalled asynchronously */
+struct marshal_cmd_DisableVertexArrayAttrib
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_DisableVertexArrayAttrib(struct gl_context *ctx, const struct marshal_cmd_DisableVertexArrayAttrib *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint index = cmd->index;
+ CALL_DisableVertexArrayAttrib(ctx->CurrentServerDispatch, (vaobj, index));
+}
+static void GLAPIENTRY
+_mesa_marshal_DisableVertexArrayAttrib(GLuint vaobj, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DisableVertexArrayAttrib);
+ struct marshal_cmd_DisableVertexArrayAttrib *cmd;
+ debug_print_marshal("DisableVertexArrayAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DisableVertexArrayAttrib, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DisableVertexArrayAttrib");
+ CALL_DisableVertexArrayAttrib(ctx->CurrentServerDispatch, (vaobj, index));
+}
+
+
+/* VertexAttribL4d: marshalled asynchronously */
+struct marshal_cmd_VertexAttribL4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_VertexAttribL4d(struct gl_context *ctx, const struct marshal_cmd_VertexAttribL4d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_VertexAttribL4d(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL4d(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribL4d);
+ struct marshal_cmd_VertexAttribL4d *cmd;
+ debug_print_marshal("VertexAttribL4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribL4d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribL4d");
+ CALL_VertexAttribL4d(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* ListBase: marshalled asynchronously */
+struct marshal_cmd_ListBase
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint base;
+};
+static inline void
+_mesa_unmarshal_ListBase(struct gl_context *ctx, const struct marshal_cmd_ListBase *cmd)
+{
+ const GLuint base = cmd->base;
+ CALL_ListBase(ctx->CurrentServerDispatch, (base));
+}
+static void GLAPIENTRY
+_mesa_marshal_ListBase(GLuint base)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ListBase);
+ struct marshal_cmd_ListBase *cmd;
+ debug_print_marshal("ListBase");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ListBase, cmd_size);
+ cmd->base = base;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ListBase");
+ CALL_ListBase(ctx->CurrentServerDispatch, (base));
+}
+
+
+/* GenerateMipmap: marshalled asynchronously */
+struct marshal_cmd_GenerateMipmap
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+};
+static inline void
+_mesa_unmarshal_GenerateMipmap(struct gl_context *ctx, const struct marshal_cmd_GenerateMipmap *cmd)
+{
+ const GLenum target = cmd->target;
+ CALL_GenerateMipmap(ctx->CurrentServerDispatch, (target));
+}
+static void GLAPIENTRY
+_mesa_marshal_GenerateMipmap(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GenerateMipmap);
+ struct marshal_cmd_GenerateMipmap *cmd;
+ debug_print_marshal("GenerateMipmap");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GenerateMipmap, cmd_size);
+ cmd->target = target;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GenerateMipmap");
+ CALL_GenerateMipmap(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* BindBufferRange: marshalled asynchronously */
+struct marshal_cmd_BindBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_BindBufferRange(struct gl_context *ctx, const struct marshal_cmd_BindBufferRange *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ CALL_BindBufferRange(ctx->CurrentServerDispatch, (target, index, buffer, offset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindBufferRange(GLenum target, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindBufferRange);
+ struct marshal_cmd_BindBufferRange *cmd;
+ debug_print_marshal("BindBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindBufferRange, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindBufferRange");
+ CALL_BindBufferRange(ctx->CurrentServerDispatch, (target, index, buffer, offset, size));
+}
+
+
+/* ProgramUniformMatrix2x4fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2x4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLfloat value[count][8] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2x4fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2x4fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniformMatrix2x4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2x4fv) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniformMatrix2x4fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2x4fv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2x4fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2x4fv");
+ CALL_ProgramUniformMatrix2x4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* BindBufferBase: marshalled asynchronously */
+struct marshal_cmd_BindBufferBase
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_BindBufferBase(struct gl_context *ctx, const struct marshal_cmd_BindBufferBase *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLuint buffer = cmd->buffer;
+ CALL_BindBufferBase(ctx->CurrentServerDispatch, (target, index, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindBufferBase(GLenum target, GLuint index, GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindBufferBase);
+ struct marshal_cmd_BindBufferBase *cmd;
+ debug_print_marshal("BindBufferBase");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindBufferBase, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindBufferBase");
+ CALL_BindBufferBase(ctx->CurrentServerDispatch, (target, index, buffer));
+}
+
+
+/* GetQueryObjectiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryObjectiv(GLuint id, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryObjectiv");
+ CALL_GetQueryObjectiv(ctx->CurrentServerDispatch, (id, pname, params));
+}
+
+
+/* VertexAttrib2s: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2s(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2s *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ CALL_VertexAttrib2s(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2s(GLuint index, GLshort x, GLshort y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2s);
+ struct marshal_cmd_VertexAttrib2s *cmd;
+ debug_print_marshal("VertexAttrib2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2s, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2s");
+ CALL_VertexAttrib2s(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* SecondaryColor3fvEXT: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3fvEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3fvEXT(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3fvEXT *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_SecondaryColor3fvEXT(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3fvEXT(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3fvEXT);
+ struct marshal_cmd_SecondaryColor3fvEXT *cmd;
+ debug_print_marshal("SecondaryColor3fvEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3fvEXT, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3fvEXT");
+ CALL_SecondaryColor3fvEXT(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* VertexAttrib2d: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2d(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_VertexAttrib2d(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2d(GLuint index, GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2d);
+ struct marshal_cmd_VertexAttrib2d *cmd;
+ debug_print_marshal("VertexAttrib2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2d");
+ CALL_VertexAttrib2d(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* ClearNamedFramebufferiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedFramebufferiv(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearNamedFramebufferiv");
+ CALL_ClearNamedFramebufferiv(ctx->CurrentServerDispatch, (framebuffer, buffer, drawbuffer, value));
+}
+
+
+/* Uniform1fv: marshalled asynchronously */
+struct marshal_cmd_Uniform1fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLfloat value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1fv(struct gl_context *ctx, const struct marshal_cmd_Uniform1fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 4;
+ CALL_Uniform1fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1fv(GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1fv) + safe_mul(count, 4);
+ struct marshal_cmd_Uniform1fv *cmd;
+ debug_print_marshal("Uniform1fv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1fv");
+ CALL_Uniform1fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetProgramPipelineInfoLog: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramPipelineInfoLog(GLuint pipeline, GLsizei bufSize, GLsizei * length, GLchar * infoLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramPipelineInfoLog");
+ CALL_GetProgramPipelineInfoLog(ctx->CurrentServerDispatch, (pipeline, bufSize, length, infoLog));
+}
+
+
+/* DepthBoundsEXT: marshalled asynchronously */
+struct marshal_cmd_DepthBoundsEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampd zmin;
+ GLclampd zmax;
+};
+static inline void
+_mesa_unmarshal_DepthBoundsEXT(struct gl_context *ctx, const struct marshal_cmd_DepthBoundsEXT *cmd)
+{
+ const GLclampd zmin = cmd->zmin;
+ const GLclampd zmax = cmd->zmax;
+ CALL_DepthBoundsEXT(ctx->CurrentServerDispatch, (zmin, zmax));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthBoundsEXT(GLclampd zmin, GLclampd zmax)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthBoundsEXT);
+ struct marshal_cmd_DepthBoundsEXT *cmd;
+ debug_print_marshal("DepthBoundsEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthBoundsEXT, cmd_size);
+ cmd->zmin = zmin;
+ cmd->zmax = zmax;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthBoundsEXT");
+ CALL_DepthBoundsEXT(ctx->CurrentServerDispatch, (zmin, zmax));
+}
+
+
+/* BufferStorageMemEXT: marshalled asynchronously */
+struct marshal_cmd_BufferStorageMemEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizeiptr size;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_BufferStorageMemEXT(struct gl_context *ctx, const struct marshal_cmd_BufferStorageMemEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizeiptr size = cmd->size;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_BufferStorageMemEXT(ctx->CurrentServerDispatch, (target, size, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_BufferStorageMemEXT(GLenum target, GLsizeiptr size, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BufferStorageMemEXT);
+ struct marshal_cmd_BufferStorageMemEXT *cmd;
+ debug_print_marshal("BufferStorageMemEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BufferStorageMemEXT, cmd_size);
+ cmd->target = target;
+ cmd->size = size;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BufferStorageMemEXT");
+ CALL_BufferStorageMemEXT(ctx->CurrentServerDispatch, (target, size, memory, offset));
+}
+
+
+/* WindowPos3fv: marshalled asynchronously */
+struct marshal_cmd_WindowPos3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_WindowPos3fv(struct gl_context *ctx, const struct marshal_cmd_WindowPos3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_WindowPos3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos3fv);
+ struct marshal_cmd_WindowPos3fv *cmd;
+ debug_print_marshal("WindowPos3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos3fv");
+ CALL_WindowPos3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetHistogramParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetHistogramParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetHistogramParameteriv");
+ CALL_GetHistogramParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* PointParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PointParameteriv(GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PointParameteriv");
+ CALL_PointParameteriv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* NamedRenderbufferStorage: marshalled asynchronously */
+struct marshal_cmd_NamedRenderbufferStorage
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint renderbuffer;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_NamedRenderbufferStorage(struct gl_context *ctx, const struct marshal_cmd_NamedRenderbufferStorage *cmd)
+{
+ const GLuint renderbuffer = cmd->renderbuffer;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_NamedRenderbufferStorage(ctx->CurrentServerDispatch, (renderbuffer, internalformat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedRenderbufferStorage(GLuint renderbuffer, GLenum internalformat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedRenderbufferStorage);
+ struct marshal_cmd_NamedRenderbufferStorage *cmd;
+ debug_print_marshal("NamedRenderbufferStorage");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedRenderbufferStorage, cmd_size);
+ cmd->renderbuffer = renderbuffer;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedRenderbufferStorage");
+ CALL_NamedRenderbufferStorage(ctx->CurrentServerDispatch, (renderbuffer, internalformat, width, height));
+}
+
+
+/* GetProgramivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramivARB(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramivARB");
+ CALL_GetProgramivARB(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* BindRenderbuffer: marshalled asynchronously */
+struct marshal_cmd_BindRenderbuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint renderbuffer;
+};
+static inline void
+_mesa_unmarshal_BindRenderbuffer(struct gl_context *ctx, const struct marshal_cmd_BindRenderbuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint renderbuffer = cmd->renderbuffer;
+ CALL_BindRenderbuffer(ctx->CurrentServerDispatch, (target, renderbuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindRenderbuffer(GLenum target, GLuint renderbuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindRenderbuffer);
+ struct marshal_cmd_BindRenderbuffer *cmd;
+ debug_print_marshal("BindRenderbuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindRenderbuffer, cmd_size);
+ cmd->target = target;
+ cmd->renderbuffer = renderbuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindRenderbuffer");
+ CALL_BindRenderbuffer(ctx->CurrentServerDispatch, (target, renderbuffer));
+}
+
+
+/* SecondaryColor3fEXT: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3fEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat red;
+ GLfloat green;
+ GLfloat blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3fEXT(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3fEXT *cmd)
+{
+ const GLfloat red = cmd->red;
+ const GLfloat green = cmd->green;
+ const GLfloat blue = cmd->blue;
+ CALL_SecondaryColor3fEXT(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3fEXT(GLfloat red, GLfloat green, GLfloat blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3fEXT);
+ struct marshal_cmd_SecondaryColor3fEXT *cmd;
+ debug_print_marshal("SecondaryColor3fEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3fEXT, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3fEXT");
+ CALL_SecondaryColor3fEXT(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* PrimitiveRestartIndex: marshalled asynchronously */
+struct marshal_cmd_PrimitiveRestartIndex
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_PrimitiveRestartIndex(struct gl_context *ctx, const struct marshal_cmd_PrimitiveRestartIndex *cmd)
+{
+ const GLuint index = cmd->index;
+ CALL_PrimitiveRestartIndex(ctx->CurrentServerDispatch, (index));
+}
+static void GLAPIENTRY
+_mesa_marshal_PrimitiveRestartIndex(GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PrimitiveRestartIndex);
+ struct marshal_cmd_PrimitiveRestartIndex *cmd;
+ debug_print_marshal("PrimitiveRestartIndex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PrimitiveRestartIndex, cmd_size);
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PrimitiveRestartIndex");
+ CALL_PrimitiveRestartIndex(ctx->CurrentServerDispatch, (index));
+}
+
+
+/* TextureStorageMem3DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorageMem3DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TextureStorageMem3DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorageMem3DEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TextureStorageMem3DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, height, depth, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorageMem3DEXT(GLuint texture, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorageMem3DEXT);
+ struct marshal_cmd_TextureStorageMem3DEXT *cmd;
+ debug_print_marshal("TextureStorageMem3DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorageMem3DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorageMem3DEXT");
+ CALL_TextureStorageMem3DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, height, depth, memory, offset));
+}
+
+
+/* VertexAttribI4ubv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4ubv(GLuint index, const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4ubv");
+ CALL_VertexAttribI4ubv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetGraphicsResetStatusARB: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_GetGraphicsResetStatusARB(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetGraphicsResetStatusARB");
+ return CALL_GetGraphicsResetStatusARB(ctx->CurrentServerDispatch, ());
+}
+
+
+/* CreateRenderbuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateRenderbuffers(GLsizei n, GLuint * renderbuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateRenderbuffers");
+ CALL_CreateRenderbuffers(ctx->CurrentServerDispatch, (n, renderbuffers));
+}
+
+
+/* ActiveStencilFaceEXT: marshalled asynchronously */
+struct marshal_cmd_ActiveStencilFaceEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+};
+static inline void
+_mesa_unmarshal_ActiveStencilFaceEXT(struct gl_context *ctx, const struct marshal_cmd_ActiveStencilFaceEXT *cmd)
+{
+ const GLenum face = cmd->face;
+ CALL_ActiveStencilFaceEXT(ctx->CurrentServerDispatch, (face));
+}
+static void GLAPIENTRY
+_mesa_marshal_ActiveStencilFaceEXT(GLenum face)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ActiveStencilFaceEXT);
+ struct marshal_cmd_ActiveStencilFaceEXT *cmd;
+ debug_print_marshal("ActiveStencilFaceEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ActiveStencilFaceEXT, cmd_size);
+ cmd->face = face;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ActiveStencilFaceEXT");
+ CALL_ActiveStencilFaceEXT(ctx->CurrentServerDispatch, (face));
+}
+
+
+/* VertexAttrib4dNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4dNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4dNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4dNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_VertexAttrib4dNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4dNV(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4dNV);
+ struct marshal_cmd_VertexAttrib4dNV *cmd;
+ debug_print_marshal("VertexAttrib4dNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4dNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4dNV");
+ CALL_VertexAttrib4dNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* DepthRange: marshalled asynchronously */
+struct marshal_cmd_DepthRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampd zNear;
+ GLclampd zFar;
+};
+static inline void
+_mesa_unmarshal_DepthRange(struct gl_context *ctx, const struct marshal_cmd_DepthRange *cmd)
+{
+ const GLclampd zNear = cmd->zNear;
+ const GLclampd zFar = cmd->zFar;
+ CALL_DepthRange(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRange(GLclampd zNear, GLclampd zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRange);
+ struct marshal_cmd_DepthRange *cmd;
+ debug_print_marshal("DepthRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRange, cmd_size);
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRange");
+ CALL_DepthRange(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+
+
+/* VertexAttrib4fNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4fNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4fNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4fNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_VertexAttrib4fNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4fNV(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4fNV);
+ struct marshal_cmd_VertexAttrib4fNV *cmd;
+ debug_print_marshal("VertexAttrib4fNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4fNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4fNV");
+ CALL_VertexAttrib4fNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* Uniform4fv: marshalled asynchronously */
+struct marshal_cmd_Uniform4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLfloat value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4fv(struct gl_context *ctx, const struct marshal_cmd_Uniform4fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform4fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4fv(GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4fv) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform4fv *cmd;
+ debug_print_marshal("Uniform4fv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4fv");
+ CALL_Uniform4fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* SamplerParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameterIiv(GLuint sampler, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SamplerParameterIiv");
+ CALL_SamplerParameterIiv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* Frustumf: marshalled asynchronously */
+struct marshal_cmd_Frustumf
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat left;
+ GLfloat right;
+ GLfloat bottom;
+ GLfloat top;
+ GLfloat zNear;
+ GLfloat zFar;
+};
+static inline void
+_mesa_unmarshal_Frustumf(struct gl_context *ctx, const struct marshal_cmd_Frustumf *cmd)
+{
+ const GLfloat left = cmd->left;
+ const GLfloat right = cmd->right;
+ const GLfloat bottom = cmd->bottom;
+ const GLfloat top = cmd->top;
+ const GLfloat zNear = cmd->zNear;
+ const GLfloat zFar = cmd->zFar;
+ CALL_Frustumf(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Frustumf(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Frustumf);
+ struct marshal_cmd_Frustumf *cmd;
+ debug_print_marshal("Frustumf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Frustumf, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Frustumf");
+ CALL_Frustumf(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* GetQueryBufferObjectui64v: marshalled asynchronously */
+struct marshal_cmd_GetQueryBufferObjectui64v
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+ GLuint buffer;
+ GLenum pname;
+ GLintptr offset;
+};
+static inline void
+_mesa_unmarshal_GetQueryBufferObjectui64v(struct gl_context *ctx, const struct marshal_cmd_GetQueryBufferObjectui64v *cmd)
+{
+ const GLuint id = cmd->id;
+ const GLuint buffer = cmd->buffer;
+ const GLenum pname = cmd->pname;
+ const GLintptr offset = cmd->offset;
+ CALL_GetQueryBufferObjectui64v(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_GetQueryBufferObjectui64v(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GetQueryBufferObjectui64v);
+ struct marshal_cmd_GetQueryBufferObjectui64v *cmd;
+ debug_print_marshal("GetQueryBufferObjectui64v");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GetQueryBufferObjectui64v, cmd_size);
+ cmd->id = id;
+ cmd->buffer = buffer;
+ cmd->pname = pname;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GetQueryBufferObjectui64v");
+ CALL_GetQueryBufferObjectui64v(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+
+
+/* ProgramUniform2uiv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLuint value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2uiv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2uiv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform2uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2uiv(GLuint program, GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2uiv) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform2uiv *cmd;
+ debug_print_marshal("ProgramUniform2uiv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2uiv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2uiv");
+ CALL_ProgramUniform2uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* Rectsv: marshalled asynchronously */
+struct marshal_cmd_Rectsv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v1[2];
+ GLshort v2[2];
+};
+static inline void
+_mesa_unmarshal_Rectsv(struct gl_context *ctx, const struct marshal_cmd_Rectsv *cmd)
+{
+ const GLshort * v1 = cmd->v1;
+ const GLshort * v2 = cmd->v2;
+ CALL_Rectsv(ctx->CurrentServerDispatch, (v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectsv(const GLshort * v1, const GLshort * v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectsv);
+ struct marshal_cmd_Rectsv *cmd;
+ debug_print_marshal("Rectsv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectsv, cmd_size);
+ memcpy(cmd->v1, v1, 4);
+ memcpy(cmd->v2, v2, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectsv");
+ CALL_Rectsv(ctx->CurrentServerDispatch, (v1, v2));
+}
+
+
+/* Frustumx: marshalled asynchronously */
+struct marshal_cmd_Frustumx
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed left;
+ GLfixed right;
+ GLfixed bottom;
+ GLfixed top;
+ GLfixed zNear;
+ GLfixed zFar;
+};
+static inline void
+_mesa_unmarshal_Frustumx(struct gl_context *ctx, const struct marshal_cmd_Frustumx *cmd)
+{
+ const GLfixed left = cmd->left;
+ const GLfixed right = cmd->right;
+ const GLfixed bottom = cmd->bottom;
+ const GLfixed top = cmd->top;
+ const GLfixed zNear = cmd->zNear;
+ const GLfixed zFar = cmd->zFar;
+ CALL_Frustumx(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Frustumx(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Frustumx);
+ struct marshal_cmd_Frustumx *cmd;
+ debug_print_marshal("Frustumx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Frustumx, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Frustumx");
+ CALL_Frustumx(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* CullFace: marshalled asynchronously */
+struct marshal_cmd_CullFace
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_CullFace(struct gl_context *ctx, const struct marshal_cmd_CullFace *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_CullFace(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_CullFace(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CullFace);
+ struct marshal_cmd_CullFace *cmd;
+ debug_print_marshal("CullFace");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CullFace, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CullFace");
+ CALL_CullFace(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* BindTexture: marshalled asynchronously */
+struct marshal_cmd_BindTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint texture;
+};
+static inline void
+_mesa_unmarshal_BindTexture(struct gl_context *ctx, const struct marshal_cmd_BindTexture *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint texture = cmd->texture;
+ CALL_BindTexture(ctx->CurrentServerDispatch, (target, texture));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindTexture(GLenum target, GLuint texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindTexture);
+ struct marshal_cmd_BindTexture *cmd;
+ debug_print_marshal("BindTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindTexture, cmd_size);
+ cmd->target = target;
+ cmd->texture = texture;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindTexture");
+ CALL_BindTexture(ctx->CurrentServerDispatch, (target, texture));
+}
+
+
+/* MultiTexCoord4fARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat s;
+ GLfloat t;
+ GLfloat r;
+ GLfloat q;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4fARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ const GLfloat r = cmd->r;
+ const GLfloat q = cmd->q;
+ CALL_MultiTexCoord4fARB(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4fARB(GLenum target, GLfloat s, GLfloat t, GLfloat r, GLfloat q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4fARB);
+ struct marshal_cmd_MultiTexCoord4fARB *cmd;
+ debug_print_marshal("MultiTexCoord4fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4fARB, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4fARB");
+ CALL_MultiTexCoord4fARB(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+
+
+/* Uniform2ui64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform2ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+};
+static inline void
+_mesa_unmarshal_Uniform2ui64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform2ui64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ CALL_Uniform2ui64ARB(ctx->CurrentServerDispatch, (location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2ui64ARB(GLint location, GLuint64 x, GLuint64 y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2ui64ARB);
+ struct marshal_cmd_Uniform2ui64ARB *cmd;
+ debug_print_marshal("Uniform2ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2ui64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2ui64ARB");
+ CALL_Uniform2ui64ARB(ctx->CurrentServerDispatch, (location, x, y));
+}
+
+
+/* MultiTexCoordP2uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP2uiv(GLenum texture, GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiTexCoordP2uiv");
+ CALL_MultiTexCoordP2uiv(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* BeginPerfQueryINTEL: marshalled asynchronously */
+struct marshal_cmd_BeginPerfQueryINTEL
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint queryHandle;
+};
+static inline void
+_mesa_unmarshal_BeginPerfQueryINTEL(struct gl_context *ctx, const struct marshal_cmd_BeginPerfQueryINTEL *cmd)
+{
+ const GLuint queryHandle = cmd->queryHandle;
+ CALL_BeginPerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginPerfQueryINTEL(GLuint queryHandle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginPerfQueryINTEL);
+ struct marshal_cmd_BeginPerfQueryINTEL *cmd;
+ debug_print_marshal("BeginPerfQueryINTEL");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginPerfQueryINTEL, cmd_size);
+ cmd->queryHandle = queryHandle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginPerfQueryINTEL");
+ CALL_BeginPerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+
+
+/* NormalPointer: marshalled asynchronously */
+struct marshal_cmd_NormalPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_NormalPointer(struct gl_context *ctx, const struct marshal_cmd_NormalPointer *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_NormalPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_NormalPointer(GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NormalPointer);
+ struct marshal_cmd_NormalPointer *cmd;
+ debug_print_marshal("NormalPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("NormalPointer");
+ CALL_NormalPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NormalPointer, cmd_size);
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NormalPointer");
+ CALL_NormalPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+
+
+/* WindowPos4iMESA: marshalled asynchronously */
+struct marshal_cmd_WindowPos4iMESA
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint w;
+};
+static inline void
+_mesa_unmarshal_WindowPos4iMESA(struct gl_context *ctx, const struct marshal_cmd_WindowPos4iMESA *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint w = cmd->w;
+ CALL_WindowPos4iMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4iMESA(GLint x, GLint y, GLint z, GLint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos4iMESA);
+ struct marshal_cmd_WindowPos4iMESA *cmd;
+ debug_print_marshal("WindowPos4iMESA");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos4iMESA, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos4iMESA");
+ CALL_WindowPos4iMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttrib4bv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4bv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLbyte v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4bv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4bv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLbyte * v = cmd->v;
+ CALL_VertexAttrib4bv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4bv(GLuint index, const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4bv);
+ struct marshal_cmd_VertexAttrib4bv *cmd;
+ debug_print_marshal("VertexAttrib4bv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4bv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4bv");
+ CALL_VertexAttrib4bv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SecondaryColor3usv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3usv
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3usv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3usv *cmd)
+{
+ const GLushort * v = cmd->v;
+ CALL_SecondaryColor3usv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3usv(const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3usv);
+ struct marshal_cmd_SecondaryColor3usv *cmd;
+ debug_print_marshal("SecondaryColor3usv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3usv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3usv");
+ CALL_SecondaryColor3usv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetPixelMapuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPixelMapuiv(GLenum map, GLuint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPixelMapuiv");
+ CALL_GetPixelMapuiv(ctx->CurrentServerDispatch, (map, values));
+}
+
+
+/* MapNamedBuffer: marshalled synchronously */
+static GLvoid * GLAPIENTRY
+_mesa_marshal_MapNamedBuffer(GLuint buffer, GLenum access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MapNamedBuffer");
+ return CALL_MapNamedBuffer(ctx->CurrentServerDispatch, (buffer, access));
+}
+
+
+/* Indexfv: marshalled asynchronously */
+struct marshal_cmd_Indexfv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat c[1];
+};
+static inline void
+_mesa_unmarshal_Indexfv(struct gl_context *ctx, const struct marshal_cmd_Indexfv *cmd)
+{
+ const GLfloat * c = cmd->c;
+ CALL_Indexfv(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexfv(const GLfloat * c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexfv);
+ struct marshal_cmd_Indexfv *cmd;
+ debug_print_marshal("Indexfv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexfv, cmd_size);
+ memcpy(cmd->c, c, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexfv");
+ CALL_Indexfv(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* AlphaFragmentOp1ATI: marshalled asynchronously */
+struct marshal_cmd_AlphaFragmentOp1ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+};
+static inline void
+_mesa_unmarshal_AlphaFragmentOp1ATI(struct gl_context *ctx, const struct marshal_cmd_AlphaFragmentOp1ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ CALL_AlphaFragmentOp1ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_AlphaFragmentOp1ATI(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AlphaFragmentOp1ATI);
+ struct marshal_cmd_AlphaFragmentOp1ATI *cmd;
+ debug_print_marshal("AlphaFragmentOp1ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AlphaFragmentOp1ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AlphaFragmentOp1ATI");
+ CALL_AlphaFragmentOp1ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod));
+}
+
+
+/* GetFloatv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFloatv(GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFloatv");
+ CALL_GetFloatv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* ProgramUniform2dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLdouble value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform2dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2dv(GLuint program, GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2dv) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform2dv *cmd;
+ debug_print_marshal("ProgramUniform2dv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2dv");
+ CALL_ProgramUniform2dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* MultiTexCoord3i: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint s;
+ GLint t;
+ GLint r;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3i(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3i *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ const GLint r = cmd->r;
+ CALL_MultiTexCoord3i(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3i(GLenum target, GLint s, GLint t, GLint r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3i);
+ struct marshal_cmd_MultiTexCoord3i *cmd;
+ debug_print_marshal("MultiTexCoord3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3i, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3i");
+ CALL_MultiTexCoord3i(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+
+
+/* ProgramUniform1fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLfloat value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 4;
+ CALL_ProgramUniform1fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1fv(GLuint program, GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1fv) + safe_mul(count, 4);
+ struct marshal_cmd_ProgramUniform1fv *cmd;
+ debug_print_marshal("ProgramUniform1fv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1fv");
+ CALL_ProgramUniform1fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* MultiTexCoord3d: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble s;
+ GLdouble t;
+ GLdouble r;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3d(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3d *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ const GLdouble r = cmd->r;
+ CALL_MultiTexCoord3d(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3d(GLenum target, GLdouble s, GLdouble t, GLdouble r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3d);
+ struct marshal_cmd_MultiTexCoord3d *cmd;
+ debug_print_marshal("MultiTexCoord3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3d, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3d");
+ CALL_MultiTexCoord3d(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+
+
+/* TexCoord3sv: marshalled asynchronously */
+struct marshal_cmd_TexCoord3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_TexCoord3sv(struct gl_context *ctx, const struct marshal_cmd_TexCoord3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_TexCoord3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3sv);
+ struct marshal_cmd_TexCoord3sv *cmd;
+ debug_print_marshal("TexCoord3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3sv");
+ CALL_TexCoord3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Fogfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Fogfv(GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Fogfv");
+ CALL_Fogfv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* Minmax: marshalled asynchronously */
+struct marshal_cmd_Minmax
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLboolean sink;
+};
+static inline void
+_mesa_unmarshal_Minmax(struct gl_context *ctx, const struct marshal_cmd_Minmax *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLboolean sink = cmd->sink;
+ CALL_Minmax(ctx->CurrentServerDispatch, (target, internalformat, sink));
+}
+static void GLAPIENTRY
+_mesa_marshal_Minmax(GLenum target, GLenum internalformat, GLboolean sink)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Minmax);
+ struct marshal_cmd_Minmax *cmd;
+ debug_print_marshal("Minmax");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Minmax, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->sink = sink;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Minmax");
+ CALL_Minmax(ctx->CurrentServerDispatch, (target, internalformat, sink));
+}
+
+
+/* MultiTexCoord3s: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort s;
+ GLshort t;
+ GLshort r;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3s(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3s *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ const GLshort r = cmd->r;
+ CALL_MultiTexCoord3s(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3s(GLenum target, GLshort s, GLshort t, GLshort r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3s);
+ struct marshal_cmd_MultiTexCoord3s *cmd;
+ debug_print_marshal("MultiTexCoord3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3s, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3s");
+ CALL_MultiTexCoord3s(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+
+
+/* Vertex4iv: marshalled asynchronously */
+struct marshal_cmd_Vertex4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_Vertex4iv(struct gl_context *ctx, const struct marshal_cmd_Vertex4iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Vertex4iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4iv);
+ struct marshal_cmd_Vertex4iv *cmd;
+ debug_print_marshal("Vertex4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4iv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4iv");
+ CALL_Vertex4iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoord4dv: marshalled asynchronously */
+struct marshal_cmd_TexCoord4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_TexCoord4dv(struct gl_context *ctx, const struct marshal_cmd_TexCoord4dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_TexCoord4dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4dv);
+ struct marshal_cmd_TexCoord4dv *cmd;
+ debug_print_marshal("TexCoord4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4dv, cmd_size);
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4dv");
+ CALL_TexCoord4dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Begin: marshalled asynchronously */
+struct marshal_cmd_Begin
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_Begin(struct gl_context *ctx, const struct marshal_cmd_Begin *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_Begin(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_Begin(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Begin);
+ struct marshal_cmd_Begin *cmd;
+ debug_print_marshal("Begin");
+ if (true) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("Begin");
+ CALL_Begin(ctx->CurrentServerDispatch, (mode));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Begin, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Begin");
+ CALL_Begin(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* LightModeli: marshalled asynchronously */
+struct marshal_cmd_LightModeli
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_LightModeli(struct gl_context *ctx, const struct marshal_cmd_LightModeli *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_LightModeli(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_LightModeli(GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LightModeli);
+ struct marshal_cmd_LightModeli *cmd;
+ debug_print_marshal("LightModeli");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LightModeli, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LightModeli");
+ CALL_LightModeli(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* UniformMatrix2fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 16) bytes are GLfloat value[count][4] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 16;
+ CALL_UniformMatrix2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2fv) + safe_mul(count, 16);
+ struct marshal_cmd_UniformMatrix2fv *cmd;
+ debug_print_marshal("UniformMatrix2fv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2fv");
+ CALL_UniformMatrix2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* LightModelf: marshalled asynchronously */
+struct marshal_cmd_LightModelf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_LightModelf(struct gl_context *ctx, const struct marshal_cmd_LightModelf *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_LightModelf(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_LightModelf(GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LightModelf);
+ struct marshal_cmd_LightModelf *cmd;
+ debug_print_marshal("LightModelf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LightModelf, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LightModelf");
+ CALL_LightModelf(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* GetTexParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexParameterfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexParameterfv");
+ CALL_GetTexParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TextureStorage1D: marshalled asynchronously */
+struct marshal_cmd_TextureStorage1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei levels;
+ GLenum internalformat;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_TextureStorage1D(struct gl_context *ctx, const struct marshal_cmd_TextureStorage1D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ CALL_TextureStorage1D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage1D(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage1D);
+ struct marshal_cmd_TextureStorage1D *cmd;
+ debug_print_marshal("TextureStorage1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage1D, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage1D");
+ CALL_TextureStorage1D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width));
+}
+
+
+/* MultiTexCoord2fvARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2fvARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat * v = cmd->v;
+ CALL_MultiTexCoord2fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2fvARB(GLenum target, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2fvARB);
+ struct marshal_cmd_MultiTexCoord2fvARB *cmd;
+ debug_print_marshal("MultiTexCoord2fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2fvARB, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2fvARB");
+ CALL_MultiTexCoord2fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* VertexAttrib4ubv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4ubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLubyte v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4ubv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4ubv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLubyte * v = cmd->v;
+ CALL_VertexAttrib4ubv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4ubv(GLuint index, const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4ubv);
+ struct marshal_cmd_VertexAttrib4ubv *cmd;
+ debug_print_marshal("VertexAttrib4ubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4ubv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4ubv");
+ CALL_VertexAttrib4ubv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetnTexImageARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnTexImageARB(GLenum target, GLint level, GLenum format, GLenum type, GLsizei bufSize, GLvoid * img)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnTexImageARB");
+ CALL_GetnTexImageARB(ctx->CurrentServerDispatch, (target, level, format, type, bufSize, img));
+}
+
+
+/* ColorMask: marshalled asynchronously */
+struct marshal_cmd_ColorMask
+{
+ struct marshal_cmd_base cmd_base;
+ GLboolean red;
+ GLboolean green;
+ GLboolean blue;
+ GLboolean alpha;
+};
+static inline void
+_mesa_unmarshal_ColorMask(struct gl_context *ctx, const struct marshal_cmd_ColorMask *cmd)
+{
+ const GLboolean red = cmd->red;
+ const GLboolean green = cmd->green;
+ const GLboolean blue = cmd->blue;
+ const GLboolean alpha = cmd->alpha;
+ CALL_ColorMask(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorMask(GLboolean red, GLboolean green, GLboolean blue, GLboolean alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorMask);
+ struct marshal_cmd_ColorMask *cmd;
+ debug_print_marshal("ColorMask");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorMask, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorMask");
+ CALL_ColorMask(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* MultiTexCoord4x: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4x
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfixed s;
+ GLfixed t;
+ GLfixed r;
+ GLfixed q;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4x(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4x *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfixed s = cmd->s;
+ const GLfixed t = cmd->t;
+ const GLfixed r = cmd->r;
+ const GLfixed q = cmd->q;
+ CALL_MultiTexCoord4x(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4x(GLenum target, GLfixed s, GLfixed t, GLfixed r, GLfixed q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4x);
+ struct marshal_cmd_MultiTexCoord4x *cmd;
+ debug_print_marshal("MultiTexCoord4x");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4x, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4x");
+ CALL_MultiTexCoord4x(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+
+
+/* UniformHandleui64ARB: marshalled asynchronously */
+struct marshal_cmd_UniformHandleui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint64 value;
+};
+static inline void
+_mesa_unmarshal_UniformHandleui64ARB(struct gl_context *ctx, const struct marshal_cmd_UniformHandleui64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint64 value = cmd->value;
+ CALL_UniformHandleui64ARB(ctx->CurrentServerDispatch, (location, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformHandleui64ARB(GLint location, GLuint64 value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformHandleui64ARB);
+ struct marshal_cmd_UniformHandleui64ARB *cmd;
+ debug_print_marshal("UniformHandleui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformHandleui64ARB, cmd_size);
+ cmd->location = location;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformHandleui64ARB");
+ CALL_UniformHandleui64ARB(ctx->CurrentServerDispatch, (location, value));
+}
+
+
+/* VertexAttribs4svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs4svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 8) bytes are GLshort v[n][4] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs4svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs4svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLshort * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLshort *) variable_data;
+ variable_data += n * 8;
+ CALL_VertexAttribs4svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs4svNV(GLuint index, GLsizei n, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs4svNV) + safe_mul(n, 8);
+ struct marshal_cmd_VertexAttribs4svNV *cmd;
+ debug_print_marshal("VertexAttribs4svNV");
+ if (unlikely(safe_mul(n, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs4svNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 8);
+ variable_data += n * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs4svNV");
+ CALL_VertexAttribs4svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* DrawElementsInstancedBaseInstance: marshalled asynchronously */
+struct marshal_cmd_DrawElementsInstancedBaseInstance
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLsizei primcount;
+ GLuint baseinstance;
+};
+static inline void
+_mesa_unmarshal_DrawElementsInstancedBaseInstance(struct gl_context *ctx, const struct marshal_cmd_DrawElementsInstancedBaseInstance *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLsizei primcount = cmd->primcount;
+ const GLuint baseinstance = cmd->baseinstance;
+ CALL_DrawElementsInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, baseinstance));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsInstancedBaseInstance(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices, GLsizei primcount, GLuint baseinstance)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElementsInstancedBaseInstance);
+ struct marshal_cmd_DrawElementsInstancedBaseInstance *cmd;
+ debug_print_marshal("DrawElementsInstancedBaseInstance");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseInstance");
+ CALL_DrawElementsInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, baseinstance));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElementsInstancedBaseInstance, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->primcount = primcount;
+ cmd->baseinstance = baseinstance;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseInstance");
+ CALL_DrawElementsInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, baseinstance));
+}
+
+
+/* UniformMatrix4fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLfloat value[count][16] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 64;
+ CALL_UniformMatrix4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4fv) + safe_mul(count, 64);
+ struct marshal_cmd_UniformMatrix4fv *cmd;
+ debug_print_marshal("UniformMatrix4fv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4fv");
+ CALL_UniformMatrix4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* UniformMatrix3x2fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3x2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 24) bytes are GLfloat value[count][6] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3x2fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3x2fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 24;
+ CALL_UniformMatrix3x2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3x2fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3x2fv) + safe_mul(count, 24);
+ struct marshal_cmd_UniformMatrix3x2fv *cmd;
+ debug_print_marshal("UniformMatrix3x2fv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3x2fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3x2fv");
+ CALL_UniformMatrix3x2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* VertexAttrib4Nuiv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nuiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nuiv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nuiv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint * v = cmd->v;
+ CALL_VertexAttrib4Nuiv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nuiv(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nuiv);
+ struct marshal_cmd_VertexAttrib4Nuiv *cmd;
+ debug_print_marshal("VertexAttrib4Nuiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nuiv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nuiv");
+ CALL_VertexAttrib4Nuiv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* ClientActiveTexture: marshalled asynchronously */
+struct marshal_cmd_ClientActiveTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+};
+static inline void
+_mesa_unmarshal_ClientActiveTexture(struct gl_context *ctx, const struct marshal_cmd_ClientActiveTexture *cmd)
+{
+ const GLenum texture = cmd->texture;
+ CALL_ClientActiveTexture(ctx->CurrentServerDispatch, (texture));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClientActiveTexture(GLenum texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClientActiveTexture);
+ struct marshal_cmd_ClientActiveTexture *cmd;
+ debug_print_marshal("ClientActiveTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClientActiveTexture, cmd_size);
+ cmd->texture = texture;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClientActiveTexture");
+ CALL_ClientActiveTexture(ctx->CurrentServerDispatch, (texture));
+}
+
+
+/* GetUniformIndices: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformIndices(GLuint program, GLsizei uniformCount, const GLchar * const * uniformNames, GLuint * uniformIndices)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformIndices");
+ CALL_GetUniformIndices(ctx->CurrentServerDispatch, (program, uniformCount, uniformNames, uniformIndices));
+}
+
+
+/* MultiTexCoord2sv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2sv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2sv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort * v = cmd->v;
+ CALL_MultiTexCoord2sv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2sv(GLenum target, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2sv);
+ struct marshal_cmd_MultiTexCoord2sv *cmd;
+ debug_print_marshal("MultiTexCoord2sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2sv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2sv");
+ CALL_MultiTexCoord2sv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* NamedBufferStorage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_NamedBufferStorage(GLuint buffer, GLsizeiptr size, const GLvoid * data, GLbitfield flags)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("NamedBufferStorage");
+ CALL_NamedBufferStorage(ctx->CurrentServerDispatch, (buffer, size, data, flags));
+}
+
+
+/* NamedFramebufferDrawBuffer: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferDrawBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum buf;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferDrawBuffer(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferDrawBuffer *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum buf = cmd->buf;
+ CALL_NamedFramebufferDrawBuffer(ctx->CurrentServerDispatch, (framebuffer, buf));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferDrawBuffer(GLuint framebuffer, GLenum buf)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferDrawBuffer);
+ struct marshal_cmd_NamedFramebufferDrawBuffer *cmd;
+ debug_print_marshal("NamedFramebufferDrawBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferDrawBuffer, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->buf = buf;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferDrawBuffer");
+ CALL_NamedFramebufferDrawBuffer(ctx->CurrentServerDispatch, (framebuffer, buf));
+}
+
+
+/* NamedFramebufferTextureLayer: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferTextureLayer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum attachment;
+ GLuint texture;
+ GLint level;
+ GLint layer;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferTextureLayer(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferTextureLayer *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum attachment = cmd->attachment;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint layer = cmd->layer;
+ CALL_NamedFramebufferTextureLayer(ctx->CurrentServerDispatch, (framebuffer, attachment, texture, level, layer));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferTextureLayer(GLuint framebuffer, GLenum attachment, GLuint texture, GLint level, GLint layer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferTextureLayer);
+ struct marshal_cmd_NamedFramebufferTextureLayer *cmd;
+ debug_print_marshal("NamedFramebufferTextureLayer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferTextureLayer, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->attachment = attachment;
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->layer = layer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferTextureLayer");
+ CALL_NamedFramebufferTextureLayer(ctx->CurrentServerDispatch, (framebuffer, attachment, texture, level, layer));
+}
+
+
+/* LoadIdentity: marshalled asynchronously */
+struct marshal_cmd_LoadIdentity
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_LoadIdentity(struct gl_context *ctx, const struct marshal_cmd_LoadIdentity *cmd)
+{
+ CALL_LoadIdentity(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_LoadIdentity(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LoadIdentity);
+ struct marshal_cmd_LoadIdentity *cmd;
+ debug_print_marshal("LoadIdentity");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LoadIdentity, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LoadIdentity");
+ CALL_LoadIdentity(ctx->CurrentServerDispatch, ());
+}
+
+
+/* ActiveShaderProgram: marshalled asynchronously */
+struct marshal_cmd_ActiveShaderProgram
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint pipeline;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_ActiveShaderProgram(struct gl_context *ctx, const struct marshal_cmd_ActiveShaderProgram *cmd)
+{
+ const GLuint pipeline = cmd->pipeline;
+ const GLuint program = cmd->program;
+ CALL_ActiveShaderProgram(ctx->CurrentServerDispatch, (pipeline, program));
+}
+static void GLAPIENTRY
+_mesa_marshal_ActiveShaderProgram(GLuint pipeline, GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ActiveShaderProgram);
+ struct marshal_cmd_ActiveShaderProgram *cmd;
+ debug_print_marshal("ActiveShaderProgram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ActiveShaderProgram, cmd_size);
+ cmd->pipeline = pipeline;
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ActiveShaderProgram");
+ CALL_ActiveShaderProgram(ctx->CurrentServerDispatch, (pipeline, program));
+}
+
+
+/* BindImageTextures: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindImageTextures(GLuint first, GLsizei count, const GLuint * textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindImageTextures");
+ CALL_BindImageTextures(ctx->CurrentServerDispatch, (first, count, textures));
+}
+
+
+/* DeleteTransformFeedbacks: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeleteTransformFeedbacks(GLsizei n, const GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeleteTransformFeedbacks");
+ CALL_DeleteTransformFeedbacks(ctx->CurrentServerDispatch, (n, ids));
+}
+
+
+/* VertexAttrib4ubvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4ubvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLubyte v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4ubvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4ubvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLubyte * v = cmd->v;
+ CALL_VertexAttrib4ubvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4ubvNV(GLuint index, const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4ubvNV);
+ struct marshal_cmd_VertexAttrib4ubvNV *cmd;
+ debug_print_marshal("VertexAttrib4ubvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4ubvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4ubvNV");
+ CALL_VertexAttrib4ubvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* FogCoordfEXT: marshalled asynchronously */
+struct marshal_cmd_FogCoordfEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat coord;
+};
+static inline void
+_mesa_unmarshal_FogCoordfEXT(struct gl_context *ctx, const struct marshal_cmd_FogCoordfEXT *cmd)
+{
+ const GLfloat coord = cmd->coord;
+ CALL_FogCoordfEXT(ctx->CurrentServerDispatch, (coord));
+}
+static void GLAPIENTRY
+_mesa_marshal_FogCoordfEXT(GLfloat coord)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FogCoordfEXT);
+ struct marshal_cmd_FogCoordfEXT *cmd;
+ debug_print_marshal("FogCoordfEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FogCoordfEXT, cmd_size);
+ cmd->coord = coord;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FogCoordfEXT");
+ CALL_FogCoordfEXT(ctx->CurrentServerDispatch, (coord));
+}
+
+
+/* GetMapfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMapfv(GLenum target, GLenum query, GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMapfv");
+ CALL_GetMapfv(ctx->CurrentServerDispatch, (target, query, v));
+}
+
+
+/* GetProgramInfoLog: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramInfoLog(GLuint program, GLsizei bufSize, GLsizei * length, GLchar * infoLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramInfoLog");
+ CALL_GetProgramInfoLog(ctx->CurrentServerDispatch, (program, bufSize, length, infoLog));
+}
+
+
+/* BindTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_BindTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_BindTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_BindTransformFeedback *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint id = cmd->id;
+ CALL_BindTransformFeedback(ctx->CurrentServerDispatch, (target, id));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindTransformFeedback(GLenum target, GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindTransformFeedback);
+ struct marshal_cmd_BindTransformFeedback *cmd;
+ debug_print_marshal("BindTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindTransformFeedback, cmd_size);
+ cmd->target = target;
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindTransformFeedback");
+ CALL_BindTransformFeedback(ctx->CurrentServerDispatch, (target, id));
+}
+
+
+/* GetPixelMapfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPixelMapfv(GLenum map, GLfloat * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPixelMapfv");
+ CALL_GetPixelMapfv(ctx->CurrentServerDispatch, (map, values));
+}
+
+
+/* TextureBufferRange: marshalled asynchronously */
+struct marshal_cmd_TextureBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum internalformat;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_TextureBufferRange(struct gl_context *ctx, const struct marshal_cmd_TextureBufferRange *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum internalformat = cmd->internalformat;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ CALL_TextureBufferRange(ctx->CurrentServerDispatch, (texture, internalformat, buffer, offset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureBufferRange(GLuint texture, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureBufferRange);
+ struct marshal_cmd_TextureBufferRange *cmd;
+ debug_print_marshal("TextureBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureBufferRange, cmd_size);
+ cmd->texture = texture;
+ cmd->internalformat = internalformat;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureBufferRange");
+ CALL_TextureBufferRange(ctx->CurrentServerDispatch, (texture, internalformat, buffer, offset, size));
+}
+
+
+/* VertexAttrib4svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib4svNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4svNV(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4svNV);
+ struct marshal_cmd_VertexAttrib4svNV *cmd;
+ debug_print_marshal("VertexAttrib4svNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4svNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4svNV");
+ CALL_VertexAttrib4svNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* PatchParameteri: marshalled asynchronously */
+struct marshal_cmd_PatchParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint value;
+};
+static inline void
+_mesa_unmarshal_PatchParameteri(struct gl_context *ctx, const struct marshal_cmd_PatchParameteri *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint value = cmd->value;
+ CALL_PatchParameteri(ctx->CurrentServerDispatch, (pname, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_PatchParameteri(GLenum pname, GLint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PatchParameteri);
+ struct marshal_cmd_PatchParameteri *cmd;
+ debug_print_marshal("PatchParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PatchParameteri, cmd_size);
+ cmd->pname = pname;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PatchParameteri");
+ CALL_PatchParameteri(ctx->CurrentServerDispatch, (pname, value));
+}
+
+
+/* GetNamedBufferSubData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedBufferSubData(GLuint buffer, GLintptr offset, GLsizeiptr size, GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedBufferSubData");
+ CALL_GetNamedBufferSubData(ctx->CurrentServerDispatch, (buffer, offset, size, data));
+}
+
+
+/* VDPAUSurfaceAccessNV: marshalled asynchronously */
+struct marshal_cmd_VDPAUSurfaceAccessNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLintptr surface;
+ GLenum access;
+};
+static inline void
+_mesa_unmarshal_VDPAUSurfaceAccessNV(struct gl_context *ctx, const struct marshal_cmd_VDPAUSurfaceAccessNV *cmd)
+{
+ const GLintptr surface = cmd->surface;
+ const GLenum access = cmd->access;
+ CALL_VDPAUSurfaceAccessNV(ctx->CurrentServerDispatch, (surface, access));
+}
+static void GLAPIENTRY
+_mesa_marshal_VDPAUSurfaceAccessNV(GLintptr surface, GLenum access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VDPAUSurfaceAccessNV);
+ struct marshal_cmd_VDPAUSurfaceAccessNV *cmd;
+ debug_print_marshal("VDPAUSurfaceAccessNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VDPAUSurfaceAccessNV, cmd_size);
+ cmd->surface = surface;
+ cmd->access = access;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VDPAUSurfaceAccessNV");
+ CALL_VDPAUSurfaceAccessNV(ctx->CurrentServerDispatch, (surface, access));
+}
+
+
+/* EdgeFlagPointer: marshalled asynchronously */
+struct marshal_cmd_EdgeFlagPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_EdgeFlagPointer(struct gl_context *ctx, const struct marshal_cmd_EdgeFlagPointer *cmd)
+{
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_EdgeFlagPointer(ctx->CurrentServerDispatch, (stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_EdgeFlagPointer(GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EdgeFlagPointer);
+ struct marshal_cmd_EdgeFlagPointer *cmd;
+ debug_print_marshal("EdgeFlagPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("EdgeFlagPointer");
+ CALL_EdgeFlagPointer(ctx->CurrentServerDispatch, (stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EdgeFlagPointer, cmd_size);
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EdgeFlagPointer");
+ CALL_EdgeFlagPointer(ctx->CurrentServerDispatch, (stride, pointer));
+}
+
+
+/* WindowPos2f: marshalled asynchronously */
+struct marshal_cmd_WindowPos2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_WindowPos2f(struct gl_context *ctx, const struct marshal_cmd_WindowPos2f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_WindowPos2f(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2f(GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos2f);
+ struct marshal_cmd_WindowPos2f *cmd;
+ debug_print_marshal("WindowPos2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos2f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos2f");
+ CALL_WindowPos2f(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* WindowPos2d: marshalled asynchronously */
+struct marshal_cmd_WindowPos2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_WindowPos2d(struct gl_context *ctx, const struct marshal_cmd_WindowPos2d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_WindowPos2d(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2d(GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos2d);
+ struct marshal_cmd_WindowPos2d *cmd;
+ debug_print_marshal("WindowPos2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos2d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos2d");
+ CALL_WindowPos2d(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* GetVertexAttribLdv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribLdv(GLuint index, GLenum pname, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribLdv");
+ CALL_GetVertexAttribLdv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* WindowPos2i: marshalled asynchronously */
+struct marshal_cmd_WindowPos2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+};
+static inline void
+_mesa_unmarshal_WindowPos2i(struct gl_context *ctx, const struct marshal_cmd_WindowPos2i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ CALL_WindowPos2i(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2i(GLint x, GLint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos2i);
+ struct marshal_cmd_WindowPos2i *cmd;
+ debug_print_marshal("WindowPos2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos2i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos2i");
+ CALL_WindowPos2i(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* WindowPos2s: marshalled asynchronously */
+struct marshal_cmd_WindowPos2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+};
+static inline void
+_mesa_unmarshal_WindowPos2s(struct gl_context *ctx, const struct marshal_cmd_WindowPos2s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ CALL_WindowPos2s(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2s(GLshort x, GLshort y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos2s);
+ struct marshal_cmd_WindowPos2s *cmd;
+ debug_print_marshal("WindowPos2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos2s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos2s");
+ CALL_WindowPos2s(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* VertexAttribI1uiEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI1uiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint x;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI1uiEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI1uiEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint x = cmd->x;
+ CALL_VertexAttribI1uiEXT(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI1uiEXT(GLuint index, GLuint x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI1uiEXT);
+ struct marshal_cmd_VertexAttribI1uiEXT *cmd;
+ debug_print_marshal("VertexAttribI1uiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI1uiEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI1uiEXT");
+ CALL_VertexAttribI1uiEXT(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* DeleteSync: marshalled asynchronously */
+struct marshal_cmd_DeleteSync
+{
+ struct marshal_cmd_base cmd_base;
+ GLsync sync;
+};
+static inline void
+_mesa_unmarshal_DeleteSync(struct gl_context *ctx, const struct marshal_cmd_DeleteSync *cmd)
+{
+ const GLsync sync = cmd->sync;
+ CALL_DeleteSync(ctx->CurrentServerDispatch, (sync));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteSync(GLsync sync)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteSync);
+ struct marshal_cmd_DeleteSync *cmd;
+ debug_print_marshal("DeleteSync");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteSync, cmd_size);
+ cmd->sync = sync;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteSync");
+ CALL_DeleteSync(ctx->CurrentServerDispatch, (sync));
+}
+
+
+/* WindowPos4fvMESA: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4fvMESA(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos4fvMESA");
+ CALL_WindowPos4fvMESA(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* CompressedTexImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexImage3D(GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexImage3D");
+ CALL_CompressedTexImage3D(ctx->CurrentServerDispatch, (target, level, internalformat, width, height, depth, border, imageSize, data));
+}
+
+
+/* GenSemaphoresEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenSemaphoresEXT(GLsizei n, GLuint * semaphores)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenSemaphoresEXT");
+ CALL_GenSemaphoresEXT(ctx->CurrentServerDispatch, (n, semaphores));
+}
+
+
+/* VertexAttribI1uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI1uiv(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI1uiv");
+ CALL_VertexAttribI1uiv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SecondaryColor3dv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3dv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_SecondaryColor3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3dv);
+ struct marshal_cmd_SecondaryColor3dv *cmd;
+ debug_print_marshal("SecondaryColor3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3dv");
+ CALL_SecondaryColor3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetnPixelMapusvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnPixelMapusvARB(GLenum map, GLsizei bufSize, GLushort * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnPixelMapusvARB");
+ CALL_GetnPixelMapusvARB(ctx->CurrentServerDispatch, (map, bufSize, values));
+}
+
+
+/* VertexAttrib3s: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3s(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3s *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ CALL_VertexAttrib3s(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3s(GLuint index, GLshort x, GLshort y, GLshort z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3s);
+ struct marshal_cmd_VertexAttrib3s *cmd;
+ debug_print_marshal("VertexAttrib3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3s, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3s");
+ CALL_VertexAttrib3s(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* UniformMatrix4x3fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4x3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLfloat value[count][12] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4x3fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4x3fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 48;
+ CALL_UniformMatrix4x3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4x3fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4x3fv) + safe_mul(count, 48);
+ struct marshal_cmd_UniformMatrix4x3fv *cmd;
+ debug_print_marshal("UniformMatrix4x3fv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4x3fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4x3fv");
+ CALL_UniformMatrix4x3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* GetQueryiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryiv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryiv");
+ CALL_GetQueryiv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* VertexAttrib3d: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3d(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_VertexAttrib3d(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3d(GLuint index, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3d);
+ struct marshal_cmd_VertexAttrib3d *cmd;
+ debug_print_marshal("VertexAttrib3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3d");
+ CALL_VertexAttrib3d(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* MapNamedBufferRange: marshalled synchronously */
+static GLvoid * GLAPIENTRY
+_mesa_marshal_MapNamedBufferRange(GLuint buffer, GLintptr offset, GLsizeiptr length, GLbitfield access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MapNamedBufferRange");
+ return CALL_MapNamedBufferRange(ctx->CurrentServerDispatch, (buffer, offset, length, access));
+}
+
+
+/* MapBuffer: marshalled synchronously */
+static GLvoid * GLAPIENTRY
+_mesa_marshal_MapBuffer(GLenum target, GLenum access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MapBuffer");
+ return CALL_MapBuffer(ctx->CurrentServerDispatch, (target, access));
+}
+
+
+/* GetProgramStageiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramStageiv(GLuint program, GLenum shadertype, GLenum pname, GLint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramStageiv");
+ CALL_GetProgramStageiv(ctx->CurrentServerDispatch, (program, shadertype, pname, values));
+}
+
+
+/* VertexAttrib4Nbv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nbv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLbyte v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nbv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nbv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLbyte * v = cmd->v;
+ CALL_VertexAttrib4Nbv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nbv(GLuint index, const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nbv);
+ struct marshal_cmd_VertexAttrib4Nbv *cmd;
+ debug_print_marshal("VertexAttrib4Nbv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nbv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nbv");
+ CALL_VertexAttrib4Nbv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* ProgramBinary: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ProgramBinary(GLuint program, GLenum binaryFormat, const GLvoid * binary, GLsizei length)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ProgramBinary");
+ CALL_ProgramBinary(ctx->CurrentServerDispatch, (program, binaryFormat, binary, length));
+}
+
+
+/* InvalidateTexImage: marshalled asynchronously */
+struct marshal_cmd_InvalidateTexImage
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLint level;
+};
+static inline void
+_mesa_unmarshal_InvalidateTexImage(struct gl_context *ctx, const struct marshal_cmd_InvalidateTexImage *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ CALL_InvalidateTexImage(ctx->CurrentServerDispatch, (texture, level));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateTexImage(GLuint texture, GLint level)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateTexImage);
+ struct marshal_cmd_InvalidateTexImage *cmd;
+ debug_print_marshal("InvalidateTexImage");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateTexImage, cmd_size);
+ cmd->texture = texture;
+ cmd->level = level;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateTexImage");
+ CALL_InvalidateTexImage(ctx->CurrentServerDispatch, (texture, level));
+}
+
+
+/* Uniform4ui: marshalled asynchronously */
+struct marshal_cmd_Uniform4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+ GLuint w;
+};
+static inline void
+_mesa_unmarshal_Uniform4ui(struct gl_context *ctx, const struct marshal_cmd_Uniform4ui *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ const GLuint w = cmd->w;
+ CALL_Uniform4ui(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4ui(GLint location, GLuint x, GLuint y, GLuint z, GLuint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4ui);
+ struct marshal_cmd_Uniform4ui *cmd;
+ debug_print_marshal("Uniform4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4ui, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4ui");
+ CALL_Uniform4ui(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+
+
+/* VertexArrayAttribFormat: marshalled asynchronously */
+struct marshal_cmd_VertexArrayAttribFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLboolean normalized;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexArrayAttribFormat(struct gl_context *ctx, const struct marshal_cmd_VertexArrayAttribFormat *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexArrayAttribFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, normalized, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayAttribFormat(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayAttribFormat);
+ struct marshal_cmd_VertexArrayAttribFormat *cmd;
+ debug_print_marshal("VertexArrayAttribFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayAttribFormat, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayAttribFormat");
+ CALL_VertexArrayAttribFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, normalized, relativeoffset));
+}
+
+
+/* VertexAttrib1fARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1fARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1fARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ CALL_VertexAttrib1fARB(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1fARB(GLuint index, GLfloat x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1fARB);
+ struct marshal_cmd_VertexAttrib1fARB *cmd;
+ debug_print_marshal("VertexAttrib1fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1fARB, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1fARB");
+ CALL_VertexAttrib1fARB(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* GetBooleani_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBooleani_v(GLenum value, GLuint index, GLboolean * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBooleani_v");
+ CALL_GetBooleani_v(ctx->CurrentServerDispatch, (value, index, data));
+}
+
+
+/* DrawTexsOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexsOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort width;
+ GLshort height;
+};
+static inline void
+_mesa_unmarshal_DrawTexsOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexsOES *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort width = cmd->width;
+ const GLshort height = cmd->height;
+ CALL_DrawTexsOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexsOES(GLshort x, GLshort y, GLshort z, GLshort width, GLshort height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexsOES);
+ struct marshal_cmd_DrawTexsOES *cmd;
+ debug_print_marshal("DrawTexsOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexsOES, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexsOES");
+ CALL_DrawTexsOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+
+
+/* GetObjectPtrLabel: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetObjectPtrLabel(const GLvoid * ptr, GLsizei bufSize, GLsizei * length, GLchar * label)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetObjectPtrLabel");
+ CALL_GetObjectPtrLabel(ctx->CurrentServerDispatch, (ptr, bufSize, length, label));
+}
+
+
+/* ProgramParameteri: marshalled asynchronously */
+struct marshal_cmd_ProgramParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLenum pname;
+ GLint value;
+};
+static inline void
+_mesa_unmarshal_ProgramParameteri(struct gl_context *ctx, const struct marshal_cmd_ProgramParameteri *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLenum pname = cmd->pname;
+ const GLint value = cmd->value;
+ CALL_ProgramParameteri(ctx->CurrentServerDispatch, (program, pname, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramParameteri(GLuint program, GLenum pname, GLint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramParameteri);
+ struct marshal_cmd_ProgramParameteri *cmd;
+ debug_print_marshal("ProgramParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramParameteri, cmd_size);
+ cmd->program = program;
+ cmd->pname = pname;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramParameteri");
+ CALL_ProgramParameteri(ctx->CurrentServerDispatch, (program, pname, value));
+}
+
+
+/* Color3fv: marshalled asynchronously */
+struct marshal_cmd_Color3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_Color3fv(struct gl_context *ctx, const struct marshal_cmd_Color3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Color3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3fv);
+ struct marshal_cmd_Color3fv *cmd;
+ debug_print_marshal("Color3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3fv");
+ CALL_Color3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetnMapfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnMapfvARB(GLenum target, GLenum query, GLsizei bufSize, GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnMapfvARB");
+ CALL_GetnMapfvARB(ctx->CurrentServerDispatch, (target, query, bufSize, v));
+}
+
+
+/* MultiTexCoord2i: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint s;
+ GLint t;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2i(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2i *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ CALL_MultiTexCoord2i(ctx->CurrentServerDispatch, (target, s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2i(GLenum target, GLint s, GLint t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2i);
+ struct marshal_cmd_MultiTexCoord2i *cmd;
+ debug_print_marshal("MultiTexCoord2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2i, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2i");
+ CALL_MultiTexCoord2i(ctx->CurrentServerDispatch, (target, s, t));
+}
+
+
+/* MultiTexCoord2d: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble s;
+ GLdouble t;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2d(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2d *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ CALL_MultiTexCoord2d(ctx->CurrentServerDispatch, (target, s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2d(GLenum target, GLdouble s, GLdouble t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2d);
+ struct marshal_cmd_MultiTexCoord2d *cmd;
+ debug_print_marshal("MultiTexCoord2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2d, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2d");
+ CALL_MultiTexCoord2d(ctx->CurrentServerDispatch, (target, s, t));
+}
+
+
+/* SamplerParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameterIuiv(GLuint sampler, GLenum pname, const GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SamplerParameterIuiv");
+ CALL_SamplerParameterIuiv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* MultiTexCoord2s: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort s;
+ GLshort t;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2s(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2s *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ CALL_MultiTexCoord2s(ctx->CurrentServerDispatch, (target, s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2s(GLenum target, GLshort s, GLshort t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2s);
+ struct marshal_cmd_MultiTexCoord2s *cmd;
+ debug_print_marshal("MultiTexCoord2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2s, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2s");
+ CALL_MultiTexCoord2s(ctx->CurrentServerDispatch, (target, s, t));
+}
+
+
+/* GetInternalformati64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetInternalformati64v(GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetInternalformati64v");
+ CALL_GetInternalformati64v(ctx->CurrentServerDispatch, (target, internalformat, pname, bufSize, params));
+}
+
+
+/* VDPAURegisterVideoSurfaceNV: marshalled synchronously */
+static GLintptr GLAPIENTRY
+_mesa_marshal_VDPAURegisterVideoSurfaceNV(const GLvoid * vdpSurface, GLenum target, GLsizei numTextureNames, const GLuint * textureNames)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAURegisterVideoSurfaceNV");
+ return CALL_VDPAURegisterVideoSurfaceNV(ctx->CurrentServerDispatch, (vdpSurface, target, numTextureNames, textureNames));
+}
+
+
+/* Indexub: marshalled asynchronously */
+struct marshal_cmd_Indexub
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte c;
+};
+static inline void
+_mesa_unmarshal_Indexub(struct gl_context *ctx, const struct marshal_cmd_Indexub *cmd)
+{
+ const GLubyte c = cmd->c;
+ CALL_Indexub(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexub(GLubyte c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexub);
+ struct marshal_cmd_Indexub *cmd;
+ debug_print_marshal("Indexub");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexub, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexub");
+ CALL_Indexub(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* GetPerfMonitorCounterDataAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorCounterDataAMD(GLuint monitor, GLenum pname, GLsizei dataSize, GLuint * data, GLint * bytesWritten)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorCounterDataAMD");
+ CALL_GetPerfMonitorCounterDataAMD(ctx->CurrentServerDispatch, (monitor, pname, dataSize, data, bytesWritten));
+}
+
+
+/* MultTransposeMatrixf: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultTransposeMatrixf(const GLfloat * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultTransposeMatrixf");
+ CALL_MultTransposeMatrixf(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* PolygonOffsetEXT: marshalled asynchronously */
+struct marshal_cmd_PolygonOffsetEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat factor;
+ GLfloat bias;
+};
+static inline void
+_mesa_unmarshal_PolygonOffsetEXT(struct gl_context *ctx, const struct marshal_cmd_PolygonOffsetEXT *cmd)
+{
+ const GLfloat factor = cmd->factor;
+ const GLfloat bias = cmd->bias;
+ CALL_PolygonOffsetEXT(ctx->CurrentServerDispatch, (factor, bias));
+}
+static void GLAPIENTRY
+_mesa_marshal_PolygonOffsetEXT(GLfloat factor, GLfloat bias)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PolygonOffsetEXT);
+ struct marshal_cmd_PolygonOffsetEXT *cmd;
+ debug_print_marshal("PolygonOffsetEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PolygonOffsetEXT, cmd_size);
+ cmd->factor = factor;
+ cmd->bias = bias;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PolygonOffsetEXT");
+ CALL_PolygonOffsetEXT(ctx->CurrentServerDispatch, (factor, bias));
+}
+
+
+/* Scalex: marshalled asynchronously */
+struct marshal_cmd_Scalex
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed x;
+ GLfixed y;
+ GLfixed z;
+};
+static inline void
+_mesa_unmarshal_Scalex(struct gl_context *ctx, const struct marshal_cmd_Scalex *cmd)
+{
+ const GLfixed x = cmd->x;
+ const GLfixed y = cmd->y;
+ const GLfixed z = cmd->z;
+ CALL_Scalex(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Scalex(GLfixed x, GLfixed y, GLfixed z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Scalex);
+ struct marshal_cmd_Scalex *cmd;
+ debug_print_marshal("Scalex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Scalex, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Scalex");
+ CALL_Scalex(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Scaled: marshalled asynchronously */
+struct marshal_cmd_Scaled
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_Scaled(struct gl_context *ctx, const struct marshal_cmd_Scaled *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_Scaled(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Scaled(GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Scaled);
+ struct marshal_cmd_Scaled *cmd;
+ debug_print_marshal("Scaled");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Scaled, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Scaled");
+ CALL_Scaled(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Scalef: marshalled asynchronously */
+struct marshal_cmd_Scalef
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_Scalef(struct gl_context *ctx, const struct marshal_cmd_Scalef *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_Scalef(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Scalef(GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Scalef);
+ struct marshal_cmd_Scalef *cmd;
+ debug_print_marshal("Scalef");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Scalef, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Scalef");
+ CALL_Scalef(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* IndexPointerEXT: marshalled asynchronously */
+struct marshal_cmd_IndexPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLsizei stride;
+ GLsizei count;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_IndexPointerEXT(struct gl_context *ctx, const struct marshal_cmd_IndexPointerEXT *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_IndexPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_IndexPointerEXT(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_IndexPointerEXT);
+ struct marshal_cmd_IndexPointerEXT *cmd;
+ debug_print_marshal("IndexPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("IndexPointerEXT");
+ CALL_IndexPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_IndexPointerEXT, cmd_size);
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("IndexPointerEXT");
+ CALL_IndexPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+}
+
+
+/* GetUniformfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformfv(GLuint program, GLint location, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformfv");
+ CALL_GetUniformfv(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* ColorFragmentOp2ATI: marshalled asynchronously */
+struct marshal_cmd_ColorFragmentOp2ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMask;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+ GLuint arg2;
+ GLuint arg2Rep;
+ GLuint arg2Mod;
+};
+static inline void
+_mesa_unmarshal_ColorFragmentOp2ATI(struct gl_context *ctx, const struct marshal_cmd_ColorFragmentOp2ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMask = cmd->dstMask;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ const GLuint arg2 = cmd->arg2;
+ const GLuint arg2Rep = cmd->arg2Rep;
+ const GLuint arg2Mod = cmd->arg2Mod;
+ CALL_ColorFragmentOp2ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorFragmentOp2ATI(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorFragmentOp2ATI);
+ struct marshal_cmd_ColorFragmentOp2ATI *cmd;
+ debug_print_marshal("ColorFragmentOp2ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorFragmentOp2ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMask = dstMask;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ cmd->arg2 = arg2;
+ cmd->arg2Rep = arg2Rep;
+ cmd->arg2Mod = arg2Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorFragmentOp2ATI");
+ CALL_ColorFragmentOp2ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod));
+}
+
+
+/* VertexAttrib2sNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2sNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2sNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2sNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ CALL_VertexAttrib2sNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2sNV(GLuint index, GLshort x, GLshort y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2sNV);
+ struct marshal_cmd_VertexAttrib2sNV *cmd;
+ debug_print_marshal("VertexAttrib2sNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2sNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2sNV");
+ CALL_VertexAttrib2sNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* ReadPixels: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ReadPixels(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ReadPixels");
+ CALL_ReadPixels(ctx->CurrentServerDispatch, (x, y, width, height, format, type, pixels));
+}
+
+
+/* QueryCounter: marshalled asynchronously */
+struct marshal_cmd_QueryCounter
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+ GLenum target;
+};
+static inline void
+_mesa_unmarshal_QueryCounter(struct gl_context *ctx, const struct marshal_cmd_QueryCounter *cmd)
+{
+ const GLuint id = cmd->id;
+ const GLenum target = cmd->target;
+ CALL_QueryCounter(ctx->CurrentServerDispatch, (id, target));
+}
+static void GLAPIENTRY
+_mesa_marshal_QueryCounter(GLuint id, GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_QueryCounter);
+ struct marshal_cmd_QueryCounter *cmd;
+ debug_print_marshal("QueryCounter");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_QueryCounter, cmd_size);
+ cmd->id = id;
+ cmd->target = target;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("QueryCounter");
+ CALL_QueryCounter(ctx->CurrentServerDispatch, (id, target));
+}
+
+
+/* NormalPointerEXT: marshalled asynchronously */
+struct marshal_cmd_NormalPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLsizei stride;
+ GLsizei count;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_NormalPointerEXT(struct gl_context *ctx, const struct marshal_cmd_NormalPointerEXT *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_NormalPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_NormalPointerEXT(GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NormalPointerEXT);
+ struct marshal_cmd_NormalPointerEXT *cmd;
+ debug_print_marshal("NormalPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("NormalPointerEXT");
+ CALL_NormalPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NormalPointerEXT, cmd_size);
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NormalPointerEXT");
+ CALL_NormalPointerEXT(ctx->CurrentServerDispatch, (type, stride, count, pointer));
+}
+
+
+/* GetSubroutineIndex: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GetSubroutineIndex(GLuint program, GLenum shadertype, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSubroutineIndex");
+ return CALL_GetSubroutineIndex(ctx->CurrentServerDispatch, (program, shadertype, name));
+}
+
+
+/* ProgramUniform3iv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLint value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3iv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3iv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 12;
+ CALL_ProgramUniform3iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3iv(GLuint program, GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3iv) + safe_mul(count, 12);
+ struct marshal_cmd_ProgramUniform3iv *cmd;
+ debug_print_marshal("ProgramUniform3iv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3iv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3iv");
+ CALL_ProgramUniform3iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* ProgramUniformMatrix2dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLdouble value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniformMatrix2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2dv) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniformMatrix2dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2dv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2dv");
+ CALL_ProgramUniformMatrix2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* ClearTexSubImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearTexSubImage(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearTexSubImage");
+ CALL_ClearTexSubImage(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, data));
+}
+
+
+/* GetActiveUniformBlockName: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveUniformBlockName(GLuint program, GLuint uniformBlockIndex, GLsizei bufSize, GLsizei * length, GLchar * uniformBlockName)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveUniformBlockName");
+ CALL_GetActiveUniformBlockName(ctx->CurrentServerDispatch, (program, uniformBlockIndex, bufSize, length, uniformBlockName));
+}
+
+
+/* DrawElementsBaseVertex: marshalled asynchronously */
+struct marshal_cmd_DrawElementsBaseVertex
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLint basevertex;
+};
+static inline void
+_mesa_unmarshal_DrawElementsBaseVertex(struct gl_context *ctx, const struct marshal_cmd_DrawElementsBaseVertex *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLint basevertex = cmd->basevertex;
+ CALL_DrawElementsBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, basevertex));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsBaseVertex(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices, GLint basevertex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElementsBaseVertex);
+ struct marshal_cmd_DrawElementsBaseVertex *cmd;
+ debug_print_marshal("DrawElementsBaseVertex");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElementsBaseVertex");
+ CALL_DrawElementsBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, basevertex));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElementsBaseVertex, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->basevertex = basevertex;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElementsBaseVertex");
+ CALL_DrawElementsBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, basevertex));
+}
+
+
+/* RasterPos3iv: marshalled asynchronously */
+struct marshal_cmd_RasterPos3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_RasterPos3iv(struct gl_context *ctx, const struct marshal_cmd_RasterPos3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_RasterPos3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3iv);
+ struct marshal_cmd_RasterPos3iv *cmd;
+ debug_print_marshal("RasterPos3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3iv");
+ CALL_RasterPos3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ColorMaski: marshalled asynchronously */
+struct marshal_cmd_ColorMaski
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buf;
+ GLboolean r;
+ GLboolean g;
+ GLboolean b;
+ GLboolean a;
+};
+static inline void
+_mesa_unmarshal_ColorMaski(struct gl_context *ctx, const struct marshal_cmd_ColorMaski *cmd)
+{
+ const GLuint buf = cmd->buf;
+ const GLboolean r = cmd->r;
+ const GLboolean g = cmd->g;
+ const GLboolean b = cmd->b;
+ const GLboolean a = cmd->a;
+ CALL_ColorMaski(ctx->CurrentServerDispatch, (buf, r, g, b, a));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorMaski(GLuint buf, GLboolean r, GLboolean g, GLboolean b, GLboolean a)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorMaski);
+ struct marshal_cmd_ColorMaski *cmd;
+ debug_print_marshal("ColorMaski");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorMaski, cmd_size);
+ cmd->buf = buf;
+ cmd->r = r;
+ cmd->g = g;
+ cmd->b = b;
+ cmd->a = a;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorMaski");
+ CALL_ColorMaski(ctx->CurrentServerDispatch, (buf, r, g, b, a));
+}
+
+
+/* Uniform2uiv: marshalled asynchronously */
+struct marshal_cmd_Uniform2uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLuint value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2uiv(struct gl_context *ctx, const struct marshal_cmd_Uniform2uiv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform2uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2uiv(GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2uiv) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform2uiv *cmd;
+ debug_print_marshal("Uniform2uiv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2uiv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2uiv");
+ CALL_Uniform2uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* RasterPos3s: marshalled asynchronously */
+struct marshal_cmd_RasterPos3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+};
+static inline void
+_mesa_unmarshal_RasterPos3s(struct gl_context *ctx, const struct marshal_cmd_RasterPos3s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ CALL_RasterPos3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3s(GLshort x, GLshort y, GLshort z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3s);
+ struct marshal_cmd_RasterPos3s *cmd;
+ debug_print_marshal("RasterPos3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3s");
+ CALL_RasterPos3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* RasterPos3d: marshalled asynchronously */
+struct marshal_cmd_RasterPos3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_RasterPos3d(struct gl_context *ctx, const struct marshal_cmd_RasterPos3d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_RasterPos3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3d(GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3d);
+ struct marshal_cmd_RasterPos3d *cmd;
+ debug_print_marshal("RasterPos3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3d");
+ CALL_RasterPos3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* RasterPos3f: marshalled asynchronously */
+struct marshal_cmd_RasterPos3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_RasterPos3f(struct gl_context *ctx, const struct marshal_cmd_RasterPos3f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_RasterPos3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3f(GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3f);
+ struct marshal_cmd_RasterPos3f *cmd;
+ debug_print_marshal("RasterPos3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3f");
+ CALL_RasterPos3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* BindVertexArray: marshalled asynchronously */
+struct marshal_cmd_BindVertexArray
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint array;
+};
+static inline void
+_mesa_unmarshal_BindVertexArray(struct gl_context *ctx, const struct marshal_cmd_BindVertexArray *cmd)
+{
+ const GLuint array = cmd->array;
+ CALL_BindVertexArray(ctx->CurrentServerDispatch, (array));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindVertexArray(GLuint array)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindVertexArray);
+ struct marshal_cmd_BindVertexArray *cmd;
+ debug_print_marshal("BindVertexArray");
+ if (_mesa_glthread_is_compat_bind_vertex_array(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("BindVertexArray");
+ CALL_BindVertexArray(ctx->CurrentServerDispatch, (array));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindVertexArray, cmd_size);
+ cmd->array = array;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindVertexArray");
+ CALL_BindVertexArray(ctx->CurrentServerDispatch, (array));
+}
+
+
+/* RasterPos3i: marshalled asynchronously */
+struct marshal_cmd_RasterPos3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+};
+static inline void
+_mesa_unmarshal_RasterPos3i(struct gl_context *ctx, const struct marshal_cmd_RasterPos3i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ CALL_RasterPos3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3i(GLint x, GLint y, GLint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3i);
+ struct marshal_cmd_RasterPos3i *cmd;
+ debug_print_marshal("RasterPos3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3i");
+ CALL_RasterPos3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* VertexAttribL3dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL3dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribL3dv");
+ CALL_VertexAttribL3dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetTexParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexParameteriv");
+ CALL_GetTexParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* DrawTransformFeedbackStreamInstanced: marshalled asynchronously */
+struct marshal_cmd_DrawTransformFeedbackStreamInstanced
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint id;
+ GLuint stream;
+ GLsizei primcount;
+};
+static inline void
+_mesa_unmarshal_DrawTransformFeedbackStreamInstanced(struct gl_context *ctx, const struct marshal_cmd_DrawTransformFeedbackStreamInstanced *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint id = cmd->id;
+ const GLuint stream = cmd->stream;
+ const GLsizei primcount = cmd->primcount;
+ CALL_DrawTransformFeedbackStreamInstanced(ctx->CurrentServerDispatch, (mode, id, stream, primcount));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTransformFeedbackStreamInstanced(GLenum mode, GLuint id, GLuint stream, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTransformFeedbackStreamInstanced);
+ struct marshal_cmd_DrawTransformFeedbackStreamInstanced *cmd;
+ debug_print_marshal("DrawTransformFeedbackStreamInstanced");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTransformFeedbackStreamInstanced, cmd_size);
+ cmd->mode = mode;
+ cmd->id = id;
+ cmd->stream = stream;
+ cmd->primcount = primcount;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTransformFeedbackStreamInstanced");
+ CALL_DrawTransformFeedbackStreamInstanced(ctx->CurrentServerDispatch, (mode, id, stream, primcount));
+}
+
+
+/* VertexAttrib2fvARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2fvARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2fvARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib2fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2fvARB(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2fvARB);
+ struct marshal_cmd_VertexAttrib2fvARB *cmd;
+ debug_print_marshal("VertexAttrib2fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2fvARB, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2fvARB");
+ CALL_VertexAttrib2fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetProgramResourceName: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramResourceName(GLuint program, GLenum programInterface, GLuint index, GLsizei bufSize, GLsizei * length, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramResourceName");
+ CALL_GetProgramResourceName(ctx->CurrentServerDispatch, (program, programInterface, index, bufSize, length, name));
+}
+
+
+/* ProgramUniformMatrix4x3dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4x3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 96) bytes are GLdouble value[count][12] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4x3dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4x3dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 96;
+ CALL_ProgramUniformMatrix4x3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4x3dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4x3dv) + safe_mul(count, 96);
+ struct marshal_cmd_ProgramUniformMatrix4x3dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4x3dv");
+ if (unlikely(safe_mul(count, 96) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4x3dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 96);
+ variable_data += count * 96;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4x3dv");
+ CALL_ProgramUniformMatrix4x3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* ColorTable: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorTable(GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid * table)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorTable");
+ CALL_ColorTable(ctx->CurrentServerDispatch, (target, internalformat, width, format, type, table));
+}
+
+
+/* LoadName: marshalled asynchronously */
+struct marshal_cmd_LoadName
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint name;
+};
+static inline void
+_mesa_unmarshal_LoadName(struct gl_context *ctx, const struct marshal_cmd_LoadName *cmd)
+{
+ const GLuint name = cmd->name;
+ CALL_LoadName(ctx->CurrentServerDispatch, (name));
+}
+static void GLAPIENTRY
+_mesa_marshal_LoadName(GLuint name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LoadName);
+ struct marshal_cmd_LoadName *cmd;
+ debug_print_marshal("LoadName");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LoadName, cmd_size);
+ cmd->name = name;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LoadName");
+ CALL_LoadName(ctx->CurrentServerDispatch, (name));
+}
+
+
+/* GetnUniformuivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformuivARB(GLuint program, GLint location, GLsizei bufSize, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformuivARB");
+ CALL_GetnUniformuivARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* ClearIndex: marshalled asynchronously */
+struct marshal_cmd_ClearIndex
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat c;
+};
+static inline void
+_mesa_unmarshal_ClearIndex(struct gl_context *ctx, const struct marshal_cmd_ClearIndex *cmd)
+{
+ const GLfloat c = cmd->c;
+ CALL_ClearIndex(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearIndex(GLfloat c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearIndex);
+ struct marshal_cmd_ClearIndex *cmd;
+ debug_print_marshal("ClearIndex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearIndex, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearIndex");
+ CALL_ClearIndex(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* ConvolutionParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionParameterfv(GLenum target, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ConvolutionParameterfv");
+ CALL_ConvolutionParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetTexGendv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexGendv(GLenum coord, GLenum pname, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexGendv");
+ CALL_GetTexGendv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* FlushMappedNamedBufferRange: marshalled asynchronously */
+struct marshal_cmd_FlushMappedNamedBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr length;
+};
+static inline void
+_mesa_unmarshal_FlushMappedNamedBufferRange(struct gl_context *ctx, const struct marshal_cmd_FlushMappedNamedBufferRange *cmd)
+{
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr length = cmd->length;
+ CALL_FlushMappedNamedBufferRange(ctx->CurrentServerDispatch, (buffer, offset, length));
+}
+static void GLAPIENTRY
+_mesa_marshal_FlushMappedNamedBufferRange(GLuint buffer, GLintptr offset, GLsizeiptr length)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FlushMappedNamedBufferRange);
+ struct marshal_cmd_FlushMappedNamedBufferRange *cmd;
+ debug_print_marshal("FlushMappedNamedBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FlushMappedNamedBufferRange, cmd_size);
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->length = length;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FlushMappedNamedBufferRange");
+ CALL_FlushMappedNamedBufferRange(ctx->CurrentServerDispatch, (buffer, offset, length));
+}
+
+
+/* MultiTexCoordP1ui: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoordP1ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoordP1ui(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoordP1ui *cmd)
+{
+ const GLenum texture = cmd->texture;
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_MultiTexCoordP1ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP1ui(GLenum texture, GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoordP1ui);
+ struct marshal_cmd_MultiTexCoordP1ui *cmd;
+ debug_print_marshal("MultiTexCoordP1ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoordP1ui, cmd_size);
+ cmd->texture = texture;
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoordP1ui");
+ CALL_MultiTexCoordP1ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* EvalMesh2: marshalled asynchronously */
+struct marshal_cmd_EvalMesh2
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLint i1;
+ GLint i2;
+ GLint j1;
+ GLint j2;
+};
+static inline void
+_mesa_unmarshal_EvalMesh2(struct gl_context *ctx, const struct marshal_cmd_EvalMesh2 *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLint i1 = cmd->i1;
+ const GLint i2 = cmd->i2;
+ const GLint j1 = cmd->j1;
+ const GLint j2 = cmd->j2;
+ CALL_EvalMesh2(ctx->CurrentServerDispatch, (mode, i1, i2, j1, j2));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalMesh2(GLenum mode, GLint i1, GLint i2, GLint j1, GLint j2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalMesh2);
+ struct marshal_cmd_EvalMesh2 *cmd;
+ debug_print_marshal("EvalMesh2");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalMesh2, cmd_size);
+ cmd->mode = mode;
+ cmd->i1 = i1;
+ cmd->i2 = i2;
+ cmd->j1 = j1;
+ cmd->j2 = j2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalMesh2");
+ CALL_EvalMesh2(ctx->CurrentServerDispatch, (mode, i1, i2, j1, j2));
+}
+
+
+/* Vertex4fv: marshalled asynchronously */
+struct marshal_cmd_Vertex4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_Vertex4fv(struct gl_context *ctx, const struct marshal_cmd_Vertex4fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Vertex4fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4fv);
+ struct marshal_cmd_Vertex4fv *cmd;
+ debug_print_marshal("Vertex4fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4fv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4fv");
+ CALL_Vertex4fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ProgramUniform4i64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+ GLint64 z;
+ GLint64 w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4i64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4i64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ const GLint64 z = cmd->z;
+ const GLint64 w = cmd->w;
+ CALL_ProgramUniform4i64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4i64ARB(GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4i64ARB);
+ struct marshal_cmd_ProgramUniform4i64ARB *cmd;
+ debug_print_marshal("ProgramUniform4i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4i64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4i64ARB");
+ CALL_ProgramUniform4i64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* SelectPerfMonitorCountersAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SelectPerfMonitorCountersAMD(GLuint monitor, GLboolean enable, GLuint group, GLint numCounters, GLuint * counterList)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SelectPerfMonitorCountersAMD");
+ CALL_SelectPerfMonitorCountersAMD(ctx->CurrentServerDispatch, (monitor, enable, group, numCounters, counterList));
+}
+
+
+/* TextureStorage2D: marshalled asynchronously */
+struct marshal_cmd_TextureStorage2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei levels;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_TextureStorage2D(struct gl_context *ctx, const struct marshal_cmd_TextureStorage2D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_TextureStorage2D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage2D(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage2D);
+ struct marshal_cmd_TextureStorage2D *cmd;
+ debug_print_marshal("TextureStorage2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage2D, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage2D");
+ CALL_TextureStorage2D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width, height));
+}
+
+
+/* GetTextureParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureParameterIiv(GLuint texture, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureParameterIiv");
+ CALL_GetTextureParameterIiv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* BindFramebuffer: marshalled asynchronously */
+struct marshal_cmd_BindFramebuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint framebuffer;
+};
+static inline void
+_mesa_unmarshal_BindFramebuffer(struct gl_context *ctx, const struct marshal_cmd_BindFramebuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint framebuffer = cmd->framebuffer;
+ CALL_BindFramebuffer(ctx->CurrentServerDispatch, (target, framebuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindFramebuffer(GLenum target, GLuint framebuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindFramebuffer);
+ struct marshal_cmd_BindFramebuffer *cmd;
+ debug_print_marshal("BindFramebuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindFramebuffer, cmd_size);
+ cmd->target = target;
+ cmd->framebuffer = framebuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindFramebuffer");
+ CALL_BindFramebuffer(ctx->CurrentServerDispatch, (target, framebuffer));
+}
+
+
+/* GetMinmax: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMinmax(GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMinmax");
+ CALL_GetMinmax(ctx->CurrentServerDispatch, (target, reset, format, type, values));
+}
+
+
+/* VertexAttribs3svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs3svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 6) bytes are GLshort v[n][3] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs3svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs3svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLshort * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLshort *) variable_data;
+ variable_data += n * 6;
+ CALL_VertexAttribs3svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs3svNV(GLuint index, GLsizei n, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs3svNV) + safe_mul(n, 6);
+ struct marshal_cmd_VertexAttribs3svNV *cmd;
+ debug_print_marshal("VertexAttribs3svNV");
+ if (unlikely(safe_mul(n, 6) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs3svNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 6);
+ variable_data += n * 6;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs3svNV");
+ CALL_VertexAttribs3svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* GetActiveUniformsiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveUniformsiv(GLuint program, GLsizei uniformCount, const GLuint * uniformIndices, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveUniformsiv");
+ CALL_GetActiveUniformsiv(ctx->CurrentServerDispatch, (program, uniformCount, uniformIndices, pname, params));
+}
+
+
+/* VertexAttrib2sv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2sv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2sv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib2sv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2sv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2sv);
+ struct marshal_cmd_VertexAttrib2sv *cmd;
+ debug_print_marshal("VertexAttrib2sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2sv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2sv");
+ CALL_VertexAttrib2sv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetProgramEnvParameterdvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramEnvParameterdvARB(GLenum target, GLuint index, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramEnvParameterdvARB");
+ CALL_GetProgramEnvParameterdvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* Uniform1dv: marshalled asynchronously */
+struct marshal_cmd_Uniform1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLdouble value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1dv(struct gl_context *ctx, const struct marshal_cmd_Uniform1dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform1dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1dv(GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1dv) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform1dv *cmd;
+ debug_print_marshal("Uniform1dv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1dv");
+ CALL_Uniform1dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* TransformFeedbackBufferRange: marshalled asynchronously */
+struct marshal_cmd_TransformFeedbackBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint xfb;
+ GLuint index;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_TransformFeedbackBufferRange(struct gl_context *ctx, const struct marshal_cmd_TransformFeedbackBufferRange *cmd)
+{
+ const GLuint xfb = cmd->xfb;
+ const GLuint index = cmd->index;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ CALL_TransformFeedbackBufferRange(ctx->CurrentServerDispatch, (xfb, index, buffer, offset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_TransformFeedbackBufferRange(GLuint xfb, GLuint index, GLuint buffer, GLintptr offset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TransformFeedbackBufferRange);
+ struct marshal_cmd_TransformFeedbackBufferRange *cmd;
+ debug_print_marshal("TransformFeedbackBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TransformFeedbackBufferRange, cmd_size);
+ cmd->xfb = xfb;
+ cmd->index = index;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TransformFeedbackBufferRange");
+ CALL_TransformFeedbackBufferRange(ctx->CurrentServerDispatch, (xfb, index, buffer, offset, size));
+}
+
+
+/* PushDebugGroup: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PushDebugGroup(GLenum source, GLuint id, GLsizei length, const GLchar * message)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PushDebugGroup");
+ CALL_PushDebugGroup(ctx->CurrentServerDispatch, (source, id, length, message));
+}
+
+
+/* GetPerfMonitorGroupStringAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorGroupStringAMD(GLuint group, GLsizei bufSize, GLsizei * length, GLchar * groupString)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorGroupStringAMD");
+ CALL_GetPerfMonitorGroupStringAMD(ctx->CurrentServerDispatch, (group, bufSize, length, groupString));
+}
+
+
+/* GetError: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_GetError(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetError");
+ return CALL_GetError(ctx->CurrentServerDispatch, ());
+}
+
+
+/* PassThrough: marshalled asynchronously */
+struct marshal_cmd_PassThrough
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat token;
+};
+static inline void
+_mesa_unmarshal_PassThrough(struct gl_context *ctx, const struct marshal_cmd_PassThrough *cmd)
+{
+ const GLfloat token = cmd->token;
+ CALL_PassThrough(ctx->CurrentServerDispatch, (token));
+}
+static void GLAPIENTRY
+_mesa_marshal_PassThrough(GLfloat token)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PassThrough);
+ struct marshal_cmd_PassThrough *cmd;
+ debug_print_marshal("PassThrough");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PassThrough, cmd_size);
+ cmd->token = token;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PassThrough");
+ CALL_PassThrough(ctx->CurrentServerDispatch, (token));
+}
+
+
+/* PatchParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PatchParameterfv(GLenum pname, const GLfloat * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PatchParameterfv");
+ CALL_PatchParameterfv(ctx->CurrentServerDispatch, (pname, values));
+}
+
+
+/* GetObjectParameterivAPPLE: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetObjectParameterivAPPLE(GLenum objectType, GLuint name, GLenum pname, GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetObjectParameterivAPPLE");
+ CALL_GetObjectParameterivAPPLE(ctx->CurrentServerDispatch, (objectType, name, pname, value));
+}
+
+
+/* BindBuffersRange: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindBuffersRange(GLenum target, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizeiptr * sizes)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindBuffersRange");
+ CALL_BindBuffersRange(ctx->CurrentServerDispatch, (target, first, count, buffers, offsets, sizes));
+}
+
+
+/* VertexAttrib4fvARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4fvARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4fvARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib4fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4fvARB(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4fvARB);
+ struct marshal_cmd_VertexAttrib4fvARB *cmd;
+ debug_print_marshal("VertexAttrib4fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4fvARB, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4fvARB");
+ CALL_VertexAttrib4fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Uniform3i64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform3i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLint64 value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3i64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform3i64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 24;
+ CALL_Uniform3i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3i64vARB(GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3i64vARB) + safe_mul(count, 24);
+ struct marshal_cmd_Uniform3i64vARB *cmd;
+ debug_print_marshal("Uniform3i64vARB");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3i64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3i64vARB");
+ CALL_Uniform3i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* WindowPos3dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos3dv");
+ CALL_WindowPos3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexGenxOES: marshalled asynchronously */
+struct marshal_cmd_TexGenxOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum coord;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_TexGenxOES(struct gl_context *ctx, const struct marshal_cmd_TexGenxOES *cmd)
+{
+ const GLenum coord = cmd->coord;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_TexGenxOES(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexGenxOES(GLenum coord, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexGenxOES);
+ struct marshal_cmd_TexGenxOES *cmd;
+ debug_print_marshal("TexGenxOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexGenxOES, cmd_size);
+ cmd->coord = coord;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexGenxOES");
+ CALL_TexGenxOES(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+
+
+/* VertexArrayAttribIFormat: marshalled asynchronously */
+struct marshal_cmd_VertexArrayAttribIFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexArrayAttribIFormat(struct gl_context *ctx, const struct marshal_cmd_VertexArrayAttribIFormat *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexArrayAttribIFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayAttribIFormat(GLuint vaobj, GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayAttribIFormat);
+ struct marshal_cmd_VertexArrayAttribIFormat *cmd;
+ debug_print_marshal("VertexArrayAttribIFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayAttribIFormat, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayAttribIFormat");
+ CALL_VertexArrayAttribIFormat(ctx->CurrentServerDispatch, (vaobj, attribindex, size, type, relativeoffset));
+}
+
+
+/* StencilOp: marshalled asynchronously */
+struct marshal_cmd_StencilOp
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum fail;
+ GLenum zfail;
+ GLenum zpass;
+};
+static inline void
+_mesa_unmarshal_StencilOp(struct gl_context *ctx, const struct marshal_cmd_StencilOp *cmd)
+{
+ const GLenum fail = cmd->fail;
+ const GLenum zfail = cmd->zfail;
+ const GLenum zpass = cmd->zpass;
+ CALL_StencilOp(ctx->CurrentServerDispatch, (fail, zfail, zpass));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilOp(GLenum fail, GLenum zfail, GLenum zpass)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilOp);
+ struct marshal_cmd_StencilOp *cmd;
+ debug_print_marshal("StencilOp");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilOp, cmd_size);
+ cmd->fail = fail;
+ cmd->zfail = zfail;
+ cmd->zpass = zpass;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilOp");
+ CALL_StencilOp(ctx->CurrentServerDispatch, (fail, zfail, zpass));
+}
+
+
+/* ProgramUniform1iv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLint value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1iv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1iv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 4;
+ CALL_ProgramUniform1iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1iv(GLuint program, GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1iv) + safe_mul(count, 4);
+ struct marshal_cmd_ProgramUniform1iv *cmd;
+ debug_print_marshal("ProgramUniform1iv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1iv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1iv");
+ CALL_ProgramUniform1iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* ProgramUniform3ui: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3ui(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3ui *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ CALL_ProgramUniform3ui(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3ui);
+ struct marshal_cmd_ProgramUniform3ui *cmd;
+ debug_print_marshal("ProgramUniform3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3ui, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3ui");
+ CALL_ProgramUniform3ui(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* SecondaryColor3sv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3sv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_SecondaryColor3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3sv);
+ struct marshal_cmd_SecondaryColor3sv *cmd;
+ debug_print_marshal("SecondaryColor3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3sv");
+ CALL_SecondaryColor3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoordP3ui: marshalled asynchronously */
+struct marshal_cmd_TexCoordP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_TexCoordP3ui(struct gl_context *ctx, const struct marshal_cmd_TexCoordP3ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_TexCoordP3ui(ctx->CurrentServerDispatch, (type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP3ui(GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordP3ui);
+ struct marshal_cmd_TexCoordP3ui *cmd;
+ debug_print_marshal("TexCoordP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordP3ui, cmd_size);
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordP3ui");
+ CALL_TexCoordP3ui(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* VertexArrayElementBuffer: marshalled asynchronously */
+struct marshal_cmd_VertexArrayElementBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_VertexArrayElementBuffer(struct gl_context *ctx, const struct marshal_cmd_VertexArrayElementBuffer *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint buffer = cmd->buffer;
+ CALL_VertexArrayElementBuffer(ctx->CurrentServerDispatch, (vaobj, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayElementBuffer(GLuint vaobj, GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayElementBuffer);
+ struct marshal_cmd_VertexArrayElementBuffer *cmd;
+ debug_print_marshal("VertexArrayElementBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayElementBuffer, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayElementBuffer");
+ CALL_VertexArrayElementBuffer(ctx->CurrentServerDispatch, (vaobj, buffer));
+}
+
+
+/* Fogxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Fogxv(GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Fogxv");
+ CALL_Fogxv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* Uniform3i64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform3i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+ GLint64 z;
+};
+static inline void
+_mesa_unmarshal_Uniform3i64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform3i64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ const GLint64 z = cmd->z;
+ CALL_Uniform3i64ARB(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3i64ARB(GLint location, GLint64 x, GLint64 y, GLint64 z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3i64ARB);
+ struct marshal_cmd_Uniform3i64ARB *cmd;
+ debug_print_marshal("Uniform3i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3i64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3i64ARB");
+ CALL_Uniform3i64ARB(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+
+
+/* VertexAttribP1ui: marshalled asynchronously */
+struct marshal_cmd_VertexAttribP1ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLenum type;
+ GLboolean normalized;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexAttribP1ui(struct gl_context *ctx, const struct marshal_cmd_VertexAttribP1ui *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint value = cmd->value;
+ CALL_VertexAttribP1ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP1ui(GLuint index, GLenum type, GLboolean normalized, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribP1ui);
+ struct marshal_cmd_VertexAttribP1ui *cmd;
+ debug_print_marshal("VertexAttribP1ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribP1ui, cmd_size);
+ cmd->index = index;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribP1ui");
+ CALL_VertexAttribP1ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* GetImageHandleARB: marshalled synchronously */
+static GLuint64 GLAPIENTRY
+_mesa_marshal_GetImageHandleARB(GLuint texture, GLint level, GLboolean layered, GLint layer, GLenum format)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetImageHandleARB");
+ return CALL_GetImageHandleARB(ctx->CurrentServerDispatch, (texture, level, layered, layer, format));
+}
+
+
+/* DeleteLists: marshalled asynchronously */
+struct marshal_cmd_DeleteLists
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint list;
+ GLsizei range;
+};
+static inline void
+_mesa_unmarshal_DeleteLists(struct gl_context *ctx, const struct marshal_cmd_DeleteLists *cmd)
+{
+ const GLuint list = cmd->list;
+ const GLsizei range = cmd->range;
+ CALL_DeleteLists(ctx->CurrentServerDispatch, (list, range));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteLists(GLuint list, GLsizei range)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteLists);
+ struct marshal_cmd_DeleteLists *cmd;
+ debug_print_marshal("DeleteLists");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteLists, cmd_size);
+ cmd->list = list;
+ cmd->range = range;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteLists");
+ CALL_DeleteLists(ctx->CurrentServerDispatch, (list, range));
+}
+
+
+/* LogicOp: marshalled asynchronously */
+struct marshal_cmd_LogicOp
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum opcode;
+};
+static inline void
+_mesa_unmarshal_LogicOp(struct gl_context *ctx, const struct marshal_cmd_LogicOp *cmd)
+{
+ const GLenum opcode = cmd->opcode;
+ CALL_LogicOp(ctx->CurrentServerDispatch, (opcode));
+}
+static void GLAPIENTRY
+_mesa_marshal_LogicOp(GLenum opcode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LogicOp);
+ struct marshal_cmd_LogicOp *cmd;
+ debug_print_marshal("LogicOp");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LogicOp, cmd_size);
+ cmd->opcode = opcode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LogicOp");
+ CALL_LogicOp(ctx->CurrentServerDispatch, (opcode));
+}
+
+
+/* RenderbufferStorageMultisample: marshalled asynchronously */
+struct marshal_cmd_RenderbufferStorageMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_RenderbufferStorageMultisample(struct gl_context *ctx, const struct marshal_cmd_RenderbufferStorageMultisample *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_RenderbufferStorageMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_RenderbufferStorageMultisample(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RenderbufferStorageMultisample);
+ struct marshal_cmd_RenderbufferStorageMultisample *cmd;
+ debug_print_marshal("RenderbufferStorageMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RenderbufferStorageMultisample, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RenderbufferStorageMultisample");
+ CALL_RenderbufferStorageMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height));
+}
+
+
+/* GetTransformFeedbacki64_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTransformFeedbacki64_v(GLuint xfb, GLenum pname, GLuint index, GLint64 * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTransformFeedbacki64_v");
+ CALL_GetTransformFeedbacki64_v(ctx->CurrentServerDispatch, (xfb, pname, index, param));
+}
+
+
+/* WindowPos3d: marshalled asynchronously */
+struct marshal_cmd_WindowPos3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_WindowPos3d(struct gl_context *ctx, const struct marshal_cmd_WindowPos3d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_WindowPos3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3d(GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos3d);
+ struct marshal_cmd_WindowPos3d *cmd;
+ debug_print_marshal("WindowPos3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos3d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos3d");
+ CALL_WindowPos3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Enablei: marshalled asynchronously */
+struct marshal_cmd_Enablei
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_Enablei(struct gl_context *ctx, const struct marshal_cmd_Enablei *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ CALL_Enablei(ctx->CurrentServerDispatch, (target, index));
+}
+static void GLAPIENTRY
+_mesa_marshal_Enablei(GLenum target, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Enablei);
+ struct marshal_cmd_Enablei *cmd;
+ debug_print_marshal("Enablei");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Enablei, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Enablei");
+ CALL_Enablei(ctx->CurrentServerDispatch, (target, index));
+}
+
+
+/* WindowPos3f: marshalled asynchronously */
+struct marshal_cmd_WindowPos3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_WindowPos3f(struct gl_context *ctx, const struct marshal_cmd_WindowPos3f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_WindowPos3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3f(GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos3f);
+ struct marshal_cmd_WindowPos3f *cmd;
+ debug_print_marshal("WindowPos3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos3f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos3f");
+ CALL_WindowPos3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* GenProgramsARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenProgramsARB(GLsizei n, GLuint * programs)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenProgramsARB");
+ CALL_GenProgramsARB(ctx->CurrentServerDispatch, (n, programs));
+}
+
+
+/* RasterPos2sv: marshalled asynchronously */
+struct marshal_cmd_RasterPos2sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_RasterPos2sv(struct gl_context *ctx, const struct marshal_cmd_RasterPos2sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_RasterPos2sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2sv);
+ struct marshal_cmd_RasterPos2sv *cmd;
+ debug_print_marshal("RasterPos2sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2sv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2sv");
+ CALL_RasterPos2sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* WindowPos3i: marshalled asynchronously */
+struct marshal_cmd_WindowPos3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+};
+static inline void
+_mesa_unmarshal_WindowPos3i(struct gl_context *ctx, const struct marshal_cmd_WindowPos3i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ CALL_WindowPos3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3i(GLint x, GLint y, GLint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos3i);
+ struct marshal_cmd_WindowPos3i *cmd;
+ debug_print_marshal("WindowPos3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos3i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos3i");
+ CALL_WindowPos3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* MultiTexCoord4iv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4iv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4iv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint * v = cmd->v;
+ CALL_MultiTexCoord4iv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4iv(GLenum target, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4iv);
+ struct marshal_cmd_MultiTexCoord4iv *cmd;
+ debug_print_marshal("MultiTexCoord4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4iv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4iv");
+ CALL_MultiTexCoord4iv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* TexCoord1sv: marshalled asynchronously */
+struct marshal_cmd_TexCoord1sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[1];
+};
+static inline void
+_mesa_unmarshal_TexCoord1sv(struct gl_context *ctx, const struct marshal_cmd_TexCoord1sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_TexCoord1sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1sv);
+ struct marshal_cmd_TexCoord1sv *cmd;
+ debug_print_marshal("TexCoord1sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1sv, cmd_size);
+ memcpy(cmd->v, v, 2);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1sv");
+ CALL_TexCoord1sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* WindowPos3s: marshalled asynchronously */
+struct marshal_cmd_WindowPos3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+};
+static inline void
+_mesa_unmarshal_WindowPos3s(struct gl_context *ctx, const struct marshal_cmd_WindowPos3s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ CALL_WindowPos3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3s(GLshort x, GLshort y, GLshort z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos3s);
+ struct marshal_cmd_WindowPos3s *cmd;
+ debug_print_marshal("WindowPos3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos3s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos3s");
+ CALL_WindowPos3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* PixelMapusv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PixelMapusv(GLenum map, GLsizei mapsize, const GLushort * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PixelMapusv");
+ CALL_PixelMapusv(ctx->CurrentServerDispatch, (map, mapsize, values));
+}
+
+
+/* DebugMessageInsert: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DebugMessageInsert(GLenum source, GLenum type, GLuint id, GLenum severity, GLsizei length, const GLchar * buf)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DebugMessageInsert");
+ CALL_DebugMessageInsert(ctx->CurrentServerDispatch, (source, type, id, severity, length, buf));
+}
+
+
+/* Orthof: marshalled asynchronously */
+struct marshal_cmd_Orthof
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat left;
+ GLfloat right;
+ GLfloat bottom;
+ GLfloat top;
+ GLfloat zNear;
+ GLfloat zFar;
+};
+static inline void
+_mesa_unmarshal_Orthof(struct gl_context *ctx, const struct marshal_cmd_Orthof *cmd)
+{
+ const GLfloat left = cmd->left;
+ const GLfloat right = cmd->right;
+ const GLfloat bottom = cmd->bottom;
+ const GLfloat top = cmd->top;
+ const GLfloat zNear = cmd->zNear;
+ const GLfloat zFar = cmd->zFar;
+ CALL_Orthof(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Orthof(GLfloat left, GLfloat right, GLfloat bottom, GLfloat top, GLfloat zNear, GLfloat zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Orthof);
+ struct marshal_cmd_Orthof *cmd;
+ debug_print_marshal("Orthof");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Orthof, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Orthof");
+ CALL_Orthof(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* CompressedTexImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexImage2D(GLenum target, GLint level, GLenum internalformat, GLsizei width, GLsizei height, GLint border, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexImage2D");
+ CALL_CompressedTexImage2D(ctx->CurrentServerDispatch, (target, level, internalformat, width, height, border, imageSize, data));
+}
+
+
+/* DeleteObjectARB: marshalled asynchronously */
+struct marshal_cmd_DeleteObjectARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLhandleARB obj;
+};
+static inline void
+_mesa_unmarshal_DeleteObjectARB(struct gl_context *ctx, const struct marshal_cmd_DeleteObjectARB *cmd)
+{
+ const GLhandleARB obj = cmd->obj;
+ CALL_DeleteObjectARB(ctx->CurrentServerDispatch, (obj));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteObjectARB(GLhandleARB obj)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteObjectARB);
+ struct marshal_cmd_DeleteObjectARB *cmd;
+ debug_print_marshal("DeleteObjectARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteObjectARB, cmd_size);
+ cmd->obj = obj;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteObjectARB");
+ CALL_DeleteObjectARB(ctx->CurrentServerDispatch, (obj));
+}
+
+
+/* ProgramUniformMatrix2x3dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2x3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLdouble value[count][6] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2x3dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2x3dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 48;
+ CALL_ProgramUniformMatrix2x3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2x3dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2x3dv) + safe_mul(count, 48);
+ struct marshal_cmd_ProgramUniformMatrix2x3dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2x3dv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2x3dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2x3dv");
+ CALL_ProgramUniformMatrix2x3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* GetVertexArrayiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexArrayiv(GLuint vaobj, GLenum pname, GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexArrayiv");
+ CALL_GetVertexArrayiv(ctx->CurrentServerDispatch, (vaobj, pname, param));
+}
+
+
+/* IsSync: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsSync(GLsync sync)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsSync");
+ return CALL_IsSync(ctx->CurrentServerDispatch, (sync));
+}
+
+
+/* Color4uiv: marshalled asynchronously */
+struct marshal_cmd_Color4uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint v[4];
+};
+static inline void
+_mesa_unmarshal_Color4uiv(struct gl_context *ctx, const struct marshal_cmd_Color4uiv *cmd)
+{
+ const GLuint * v = cmd->v;
+ CALL_Color4uiv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4uiv(const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4uiv);
+ struct marshal_cmd_Color4uiv *cmd;
+ debug_print_marshal("Color4uiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4uiv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4uiv");
+ CALL_Color4uiv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* MultiTexCoord1sv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort v[1];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1sv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1sv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort * v = cmd->v;
+ CALL_MultiTexCoord1sv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1sv(GLenum target, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1sv);
+ struct marshal_cmd_MultiTexCoord1sv *cmd;
+ debug_print_marshal("MultiTexCoord1sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1sv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 2);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1sv");
+ CALL_MultiTexCoord1sv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* Orthox: marshalled asynchronously */
+struct marshal_cmd_Orthox
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed left;
+ GLfixed right;
+ GLfixed bottom;
+ GLfixed top;
+ GLfixed zNear;
+ GLfixed zFar;
+};
+static inline void
+_mesa_unmarshal_Orthox(struct gl_context *ctx, const struct marshal_cmd_Orthox *cmd)
+{
+ const GLfixed left = cmd->left;
+ const GLfixed right = cmd->right;
+ const GLfixed bottom = cmd->bottom;
+ const GLfixed top = cmd->top;
+ const GLfixed zNear = cmd->zNear;
+ const GLfixed zFar = cmd->zFar;
+ CALL_Orthox(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Orthox(GLfixed left, GLfixed right, GLfixed bottom, GLfixed top, GLfixed zNear, GLfixed zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Orthox);
+ struct marshal_cmd_Orthox *cmd;
+ debug_print_marshal("Orthox");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Orthox, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Orthox");
+ CALL_Orthox(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* PushAttrib: marshalled asynchronously */
+struct marshal_cmd_PushAttrib
+{
+ struct marshal_cmd_base cmd_base;
+ GLbitfield mask;
+};
+static inline void
+_mesa_unmarshal_PushAttrib(struct gl_context *ctx, const struct marshal_cmd_PushAttrib *cmd)
+{
+ const GLbitfield mask = cmd->mask;
+ CALL_PushAttrib(ctx->CurrentServerDispatch, (mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_PushAttrib(GLbitfield mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PushAttrib);
+ struct marshal_cmd_PushAttrib *cmd;
+ debug_print_marshal("PushAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PushAttrib, cmd_size);
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PushAttrib");
+ CALL_PushAttrib(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* RasterPos2i: marshalled asynchronously */
+struct marshal_cmd_RasterPos2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+};
+static inline void
+_mesa_unmarshal_RasterPos2i(struct gl_context *ctx, const struct marshal_cmd_RasterPos2i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ CALL_RasterPos2i(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2i(GLint x, GLint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2i);
+ struct marshal_cmd_RasterPos2i *cmd;
+ debug_print_marshal("RasterPos2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2i");
+ CALL_RasterPos2i(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* ClipPlane: marshalled asynchronously */
+struct marshal_cmd_ClipPlane
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum plane;
+ GLdouble equation[4];
+};
+static inline void
+_mesa_unmarshal_ClipPlane(struct gl_context *ctx, const struct marshal_cmd_ClipPlane *cmd)
+{
+ const GLenum plane = cmd->plane;
+ const GLdouble * equation = cmd->equation;
+ CALL_ClipPlane(ctx->CurrentServerDispatch, (plane, equation));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClipPlane(GLenum plane, const GLdouble * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClipPlane);
+ struct marshal_cmd_ClipPlane *cmd;
+ debug_print_marshal("ClipPlane");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClipPlane, cmd_size);
+ cmd->plane = plane;
+ memcpy(cmd->equation, equation, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClipPlane");
+ CALL_ClipPlane(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* RasterPos2f: marshalled asynchronously */
+struct marshal_cmd_RasterPos2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_RasterPos2f(struct gl_context *ctx, const struct marshal_cmd_RasterPos2f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_RasterPos2f(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2f(GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2f);
+ struct marshal_cmd_RasterPos2f *cmd;
+ debug_print_marshal("RasterPos2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2f");
+ CALL_RasterPos2f(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* GetActiveSubroutineUniformiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveSubroutineUniformiv(GLuint program, GLenum shadertype, GLuint index, GLenum pname, GLint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveSubroutineUniformiv");
+ CALL_GetActiveSubroutineUniformiv(ctx->CurrentServerDispatch, (program, shadertype, index, pname, values));
+}
+
+
+/* RasterPos2d: marshalled asynchronously */
+struct marshal_cmd_RasterPos2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_RasterPos2d(struct gl_context *ctx, const struct marshal_cmd_RasterPos2d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_RasterPos2d(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2d(GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2d);
+ struct marshal_cmd_RasterPos2d *cmd;
+ debug_print_marshal("RasterPos2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2d");
+ CALL_RasterPos2d(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* MakeImageHandleResidentARB: marshalled asynchronously */
+struct marshal_cmd_MakeImageHandleResidentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint64 handle;
+ GLenum access;
+};
+static inline void
+_mesa_unmarshal_MakeImageHandleResidentARB(struct gl_context *ctx, const struct marshal_cmd_MakeImageHandleResidentARB *cmd)
+{
+ const GLuint64 handle = cmd->handle;
+ const GLenum access = cmd->access;
+ CALL_MakeImageHandleResidentARB(ctx->CurrentServerDispatch, (handle, access));
+}
+static void GLAPIENTRY
+_mesa_marshal_MakeImageHandleResidentARB(GLuint64 handle, GLenum access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MakeImageHandleResidentARB);
+ struct marshal_cmd_MakeImageHandleResidentARB *cmd;
+ debug_print_marshal("MakeImageHandleResidentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MakeImageHandleResidentARB, cmd_size);
+ cmd->handle = handle;
+ cmd->access = access;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MakeImageHandleResidentARB");
+ CALL_MakeImageHandleResidentARB(ctx->CurrentServerDispatch, (handle, access));
+}
+
+
+/* InvalidateSubFramebuffer: marshalled asynchronously */
+struct marshal_cmd_InvalidateSubFramebuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei numAttachments;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+ /* Next safe_mul(numAttachments, 4) bytes are GLenum attachments[numAttachments] */
+};
+static inline void
+_mesa_unmarshal_InvalidateSubFramebuffer(struct gl_context *ctx, const struct marshal_cmd_InvalidateSubFramebuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei numAttachments = cmd->numAttachments;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLenum * attachments;
+ const char *variable_data = (const char *) (cmd + 1);
+ attachments = (const GLenum *) variable_data;
+ variable_data += numAttachments * 4;
+ CALL_InvalidateSubFramebuffer(ctx->CurrentServerDispatch, (target, numAttachments, attachments, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateSubFramebuffer(GLenum target, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateSubFramebuffer) + safe_mul(numAttachments, 4);
+ struct marshal_cmd_InvalidateSubFramebuffer *cmd;
+ debug_print_marshal("InvalidateSubFramebuffer");
+ if (unlikely(safe_mul(numAttachments, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateSubFramebuffer, cmd_size);
+ cmd->target = target;
+ cmd->numAttachments = numAttachments;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, attachments, numAttachments * 4);
+ variable_data += numAttachments * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateSubFramebuffer");
+ CALL_InvalidateSubFramebuffer(ctx->CurrentServerDispatch, (target, numAttachments, attachments, x, y, width, height));
+}
+
+
+/* Color4ub: marshalled asynchronously */
+struct marshal_cmd_Color4ub
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte red;
+ GLubyte green;
+ GLubyte blue;
+ GLubyte alpha;
+};
+static inline void
+_mesa_unmarshal_Color4ub(struct gl_context *ctx, const struct marshal_cmd_Color4ub *cmd)
+{
+ const GLubyte red = cmd->red;
+ const GLubyte green = cmd->green;
+ const GLubyte blue = cmd->blue;
+ const GLubyte alpha = cmd->alpha;
+ CALL_Color4ub(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4ub(GLubyte red, GLubyte green, GLubyte blue, GLubyte alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4ub);
+ struct marshal_cmd_Color4ub *cmd;
+ debug_print_marshal("Color4ub");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4ub, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4ub");
+ CALL_Color4ub(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* UniformMatrix2x4dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2x4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLdouble value[count][8] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2x4dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2x4dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 64;
+ CALL_UniformMatrix2x4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2x4dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2x4dv) + safe_mul(count, 64);
+ struct marshal_cmd_UniformMatrix2x4dv *cmd;
+ debug_print_marshal("UniformMatrix2x4dv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2x4dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2x4dv");
+ CALL_UniformMatrix2x4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* RasterPos2s: marshalled asynchronously */
+struct marshal_cmd_RasterPos2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+};
+static inline void
+_mesa_unmarshal_RasterPos2s(struct gl_context *ctx, const struct marshal_cmd_RasterPos2s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ CALL_RasterPos2s(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2s(GLshort x, GLshort y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2s);
+ struct marshal_cmd_RasterPos2s *cmd;
+ debug_print_marshal("RasterPos2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2s");
+ CALL_RasterPos2s(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* DispatchComputeGroupSizeARB: marshalled asynchronously */
+struct marshal_cmd_DispatchComputeGroupSizeARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint num_groups_x;
+ GLuint num_groups_y;
+ GLuint num_groups_z;
+ GLuint group_size_x;
+ GLuint group_size_y;
+ GLuint group_size_z;
+};
+static inline void
+_mesa_unmarshal_DispatchComputeGroupSizeARB(struct gl_context *ctx, const struct marshal_cmd_DispatchComputeGroupSizeARB *cmd)
+{
+ const GLuint num_groups_x = cmd->num_groups_x;
+ const GLuint num_groups_y = cmd->num_groups_y;
+ const GLuint num_groups_z = cmd->num_groups_z;
+ const GLuint group_size_x = cmd->group_size_x;
+ const GLuint group_size_y = cmd->group_size_y;
+ const GLuint group_size_z = cmd->group_size_z;
+ CALL_DispatchComputeGroupSizeARB(ctx->CurrentServerDispatch, (num_groups_x, num_groups_y, num_groups_z, group_size_x, group_size_y, group_size_z));
+}
+static void GLAPIENTRY
+_mesa_marshal_DispatchComputeGroupSizeARB(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z, GLuint group_size_x, GLuint group_size_y, GLuint group_size_z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DispatchComputeGroupSizeARB);
+ struct marshal_cmd_DispatchComputeGroupSizeARB *cmd;
+ debug_print_marshal("DispatchComputeGroupSizeARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DispatchComputeGroupSizeARB, cmd_size);
+ cmd->num_groups_x = num_groups_x;
+ cmd->num_groups_y = num_groups_y;
+ cmd->num_groups_z = num_groups_z;
+ cmd->group_size_x = group_size_x;
+ cmd->group_size_y = group_size_y;
+ cmd->group_size_z = group_size_z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DispatchComputeGroupSizeARB");
+ CALL_DispatchComputeGroupSizeARB(ctx->CurrentServerDispatch, (num_groups_x, num_groups_y, num_groups_z, group_size_x, group_size_y, group_size_z));
+}
+
+
+/* VertexP2uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexP2uiv(GLenum type, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexP2uiv");
+ CALL_VertexP2uiv(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* VertexArrayBindingDivisor: marshalled asynchronously */
+struct marshal_cmd_VertexArrayBindingDivisor
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint bindingindex;
+ GLuint divisor;
+};
+static inline void
+_mesa_unmarshal_VertexArrayBindingDivisor(struct gl_context *ctx, const struct marshal_cmd_VertexArrayBindingDivisor *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint bindingindex = cmd->bindingindex;
+ const GLuint divisor = cmd->divisor;
+ CALL_VertexArrayBindingDivisor(ctx->CurrentServerDispatch, (vaobj, bindingindex, divisor));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayBindingDivisor(GLuint vaobj, GLuint bindingindex, GLuint divisor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayBindingDivisor);
+ struct marshal_cmd_VertexArrayBindingDivisor *cmd;
+ debug_print_marshal("VertexArrayBindingDivisor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayBindingDivisor, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->bindingindex = bindingindex;
+ cmd->divisor = divisor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayBindingDivisor");
+ CALL_VertexArrayBindingDivisor(ctx->CurrentServerDispatch, (vaobj, bindingindex, divisor));
+}
+
+
+/* MultiTexCoord3dv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3dv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3dv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble * v = cmd->v;
+ CALL_MultiTexCoord3dv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3dv(GLenum target, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3dv);
+ struct marshal_cmd_MultiTexCoord3dv *cmd;
+ debug_print_marshal("MultiTexCoord3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3dv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3dv");
+ CALL_MultiTexCoord3dv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* BindProgramPipeline: marshalled asynchronously */
+struct marshal_cmd_BindProgramPipeline
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint pipeline;
+};
+static inline void
+_mesa_unmarshal_BindProgramPipeline(struct gl_context *ctx, const struct marshal_cmd_BindProgramPipeline *cmd)
+{
+ const GLuint pipeline = cmd->pipeline;
+ CALL_BindProgramPipeline(ctx->CurrentServerDispatch, (pipeline));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindProgramPipeline(GLuint pipeline)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindProgramPipeline);
+ struct marshal_cmd_BindProgramPipeline *cmd;
+ debug_print_marshal("BindProgramPipeline");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindProgramPipeline, cmd_size);
+ cmd->pipeline = pipeline;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindProgramPipeline");
+ CALL_BindProgramPipeline(ctx->CurrentServerDispatch, (pipeline));
+}
+
+
+/* VertexAttribP4uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP4uiv(GLuint index, GLenum type, GLboolean normalized, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribP4uiv");
+ CALL_VertexAttribP4uiv(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* DebugMessageCallback: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DebugMessageCallback(GLDEBUGPROC callback, const GLvoid * userParam)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DebugMessageCallback");
+ CALL_DebugMessageCallback(ctx->CurrentServerDispatch, (callback, userParam));
+}
+
+
+/* MultiTexCoord1i: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1i
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint s;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1i(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1i *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint s = cmd->s;
+ CALL_MultiTexCoord1i(ctx->CurrentServerDispatch, (target, s));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1i(GLenum target, GLint s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1i);
+ struct marshal_cmd_MultiTexCoord1i *cmd;
+ debug_print_marshal("MultiTexCoord1i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1i, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1i");
+ CALL_MultiTexCoord1i(ctx->CurrentServerDispatch, (target, s));
+}
+
+
+/* WindowPos2dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos2dv");
+ CALL_WindowPos2dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexParameterIuiv(GLenum target, GLenum pname, const GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexParameterIuiv");
+ CALL_TexParameterIuiv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* DeletePerfQueryINTEL: marshalled asynchronously */
+struct marshal_cmd_DeletePerfQueryINTEL
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint queryHandle;
+};
+static inline void
+_mesa_unmarshal_DeletePerfQueryINTEL(struct gl_context *ctx, const struct marshal_cmd_DeletePerfQueryINTEL *cmd)
+{
+ const GLuint queryHandle = cmd->queryHandle;
+ CALL_DeletePerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeletePerfQueryINTEL(GLuint queryHandle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeletePerfQueryINTEL);
+ struct marshal_cmd_DeletePerfQueryINTEL *cmd;
+ debug_print_marshal("DeletePerfQueryINTEL");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeletePerfQueryINTEL, cmd_size);
+ cmd->queryHandle = queryHandle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeletePerfQueryINTEL");
+ CALL_DeletePerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+
+
+/* MultiTexCoord1d: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble s;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1d(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1d *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble s = cmd->s;
+ CALL_MultiTexCoord1d(ctx->CurrentServerDispatch, (target, s));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1d(GLenum target, GLdouble s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1d);
+ struct marshal_cmd_MultiTexCoord1d *cmd;
+ debug_print_marshal("MultiTexCoord1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1d, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1d");
+ CALL_MultiTexCoord1d(ctx->CurrentServerDispatch, (target, s));
+}
+
+
+/* MultiTexCoord1s: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1s
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort s;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1s(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1s *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort s = cmd->s;
+ CALL_MultiTexCoord1s(ctx->CurrentServerDispatch, (target, s));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1s(GLenum target, GLshort s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1s);
+ struct marshal_cmd_MultiTexCoord1s *cmd;
+ debug_print_marshal("MultiTexCoord1s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1s, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1s");
+ CALL_MultiTexCoord1s(ctx->CurrentServerDispatch, (target, s));
+}
+
+
+/* BeginConditionalRender: marshalled asynchronously */
+struct marshal_cmd_BeginConditionalRender
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint query;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_BeginConditionalRender(struct gl_context *ctx, const struct marshal_cmd_BeginConditionalRender *cmd)
+{
+ const GLuint query = cmd->query;
+ const GLenum mode = cmd->mode;
+ CALL_BeginConditionalRender(ctx->CurrentServerDispatch, (query, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginConditionalRender(GLuint query, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginConditionalRender);
+ struct marshal_cmd_BeginConditionalRender *cmd;
+ debug_print_marshal("BeginConditionalRender");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginConditionalRender, cmd_size);
+ cmd->query = query;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginConditionalRender");
+ CALL_BeginConditionalRender(ctx->CurrentServerDispatch, (query, mode));
+}
+
+
+/* GetShaderiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetShaderiv(GLuint shader, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetShaderiv");
+ CALL_GetShaderiv(ctx->CurrentServerDispatch, (shader, pname, params));
+}
+
+
+/* CopyConvolutionFilter1D: marshalled asynchronously */
+struct marshal_cmd_CopyConvolutionFilter1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLint x;
+ GLint y;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_CopyConvolutionFilter1D(struct gl_context *ctx, const struct marshal_cmd_CopyConvolutionFilter1D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ CALL_CopyConvolutionFilter1D(ctx->CurrentServerDispatch, (target, internalformat, x, y, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyConvolutionFilter1D(GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyConvolutionFilter1D);
+ struct marshal_cmd_CopyConvolutionFilter1D *cmd;
+ debug_print_marshal("CopyConvolutionFilter1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyConvolutionFilter1D, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyConvolutionFilter1D");
+ CALL_CopyConvolutionFilter1D(ctx->CurrentServerDispatch, (target, internalformat, x, y, width));
+}
+
+
+/* UniformMatrix4dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 128) bytes are GLdouble value[count][16] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 128;
+ CALL_UniformMatrix4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4dv) + safe_mul(count, 128);
+ struct marshal_cmd_UniformMatrix4dv *cmd;
+ debug_print_marshal("UniformMatrix4dv");
+ if (unlikely(safe_mul(count, 128) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 128);
+ variable_data += count * 128;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4dv");
+ CALL_UniformMatrix4dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* CreateShaderObjectARB: marshalled synchronously */
+static GLhandleARB GLAPIENTRY
+_mesa_marshal_CreateShaderObjectARB(GLenum shaderType)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateShaderObjectARB");
+ return CALL_CreateShaderObjectARB(ctx->CurrentServerDispatch, (shaderType));
+}
+
+
+/* GetTexParameterxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexParameterxv(GLenum target, GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexParameterxv");
+ CALL_GetTexParameterxv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetAttachedShaders: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetAttachedShaders(GLuint program, GLsizei maxCount, GLsizei * count, GLuint * obj)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetAttachedShaders");
+ CALL_GetAttachedShaders(ctx->CurrentServerDispatch, (program, maxCount, count, obj));
+}
+
+
+/* Materialiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Materialiv(GLenum face, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Materialiv");
+ CALL_Materialiv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* DeleteFragmentShaderATI: marshalled asynchronously */
+struct marshal_cmd_DeleteFragmentShaderATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_DeleteFragmentShaderATI(struct gl_context *ctx, const struct marshal_cmd_DeleteFragmentShaderATI *cmd)
+{
+ const GLuint id = cmd->id;
+ CALL_DeleteFragmentShaderATI(ctx->CurrentServerDispatch, (id));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteFragmentShaderATI(GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteFragmentShaderATI);
+ struct marshal_cmd_DeleteFragmentShaderATI *cmd;
+ debug_print_marshal("DeleteFragmentShaderATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteFragmentShaderATI, cmd_size);
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteFragmentShaderATI");
+ CALL_DeleteFragmentShaderATI(ctx->CurrentServerDispatch, (id));
+}
+
+
+/* VertexArrayVertexBuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayVertexBuffers(GLuint vaobj, GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexArrayVertexBuffers");
+ CALL_VertexArrayVertexBuffers(ctx->CurrentServerDispatch, (vaobj, first, count, buffers, offsets, strides));
+}
+
+
+/* DrawElementsInstancedBaseVertex: marshalled asynchronously */
+struct marshal_cmd_DrawElementsInstancedBaseVertex
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLsizei primcount;
+ GLint basevertex;
+};
+static inline void
+_mesa_unmarshal_DrawElementsInstancedBaseVertex(struct gl_context *ctx, const struct marshal_cmd_DrawElementsInstancedBaseVertex *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLsizei primcount = cmd->primcount;
+ const GLint basevertex = cmd->basevertex;
+ CALL_DrawElementsInstancedBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsInstancedBaseVertex(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices, GLsizei primcount, GLint basevertex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElementsInstancedBaseVertex);
+ struct marshal_cmd_DrawElementsInstancedBaseVertex *cmd;
+ debug_print_marshal("DrawElementsInstancedBaseVertex");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseVertex");
+ CALL_DrawElementsInstancedBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElementsInstancedBaseVertex, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->primcount = primcount;
+ cmd->basevertex = basevertex;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElementsInstancedBaseVertex");
+ CALL_DrawElementsInstancedBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex));
+}
+
+
+/* DisableClientState: marshalled asynchronously */
+struct marshal_cmd_DisableClientState
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum array;
+};
+static inline void
+_mesa_unmarshal_DisableClientState(struct gl_context *ctx, const struct marshal_cmd_DisableClientState *cmd)
+{
+ const GLenum array = cmd->array;
+ CALL_DisableClientState(ctx->CurrentServerDispatch, (array));
+}
+static void GLAPIENTRY
+_mesa_marshal_DisableClientState(GLenum array)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DisableClientState);
+ struct marshal_cmd_DisableClientState *cmd;
+ debug_print_marshal("DisableClientState");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DisableClientState, cmd_size);
+ cmd->array = array;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DisableClientState");
+ CALL_DisableClientState(ctx->CurrentServerDispatch, (array));
+}
+
+
+/* TexGeni: marshalled asynchronously */
+struct marshal_cmd_TexGeni
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum coord;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_TexGeni(struct gl_context *ctx, const struct marshal_cmd_TexGeni *cmd)
+{
+ const GLenum coord = cmd->coord;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_TexGeni(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexGeni(GLenum coord, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexGeni);
+ struct marshal_cmd_TexGeni *cmd;
+ debug_print_marshal("TexGeni");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexGeni, cmd_size);
+ cmd->coord = coord;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexGeni");
+ CALL_TexGeni(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+
+
+/* TexGenf: marshalled asynchronously */
+struct marshal_cmd_TexGenf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum coord;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_TexGenf(struct gl_context *ctx, const struct marshal_cmd_TexGenf *cmd)
+{
+ const GLenum coord = cmd->coord;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_TexGenf(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexGenf(GLenum coord, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexGenf);
+ struct marshal_cmd_TexGenf *cmd;
+ debug_print_marshal("TexGenf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexGenf, cmd_size);
+ cmd->coord = coord;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexGenf");
+ CALL_TexGenf(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+
+
+/* TexGend: marshalled asynchronously */
+struct marshal_cmd_TexGend
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum coord;
+ GLenum pname;
+ GLdouble param;
+};
+static inline void
+_mesa_unmarshal_TexGend(struct gl_context *ctx, const struct marshal_cmd_TexGend *cmd)
+{
+ const GLenum coord = cmd->coord;
+ const GLenum pname = cmd->pname;
+ const GLdouble param = cmd->param;
+ CALL_TexGend(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexGend(GLenum coord, GLenum pname, GLdouble param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexGend);
+ struct marshal_cmd_TexGend *cmd;
+ debug_print_marshal("TexGend");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexGend, cmd_size);
+ cmd->coord = coord;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexGend");
+ CALL_TexGend(ctx->CurrentServerDispatch, (coord, pname, param));
+}
+
+
+/* ProgramUniform4i64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLint64 value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4i64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4i64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniform4i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4i64vARB(GLuint program, GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4i64vARB) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniform4i64vARB *cmd;
+ debug_print_marshal("ProgramUniform4i64vARB");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4i64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4i64vARB");
+ CALL_ProgramUniform4i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* Color4sv: marshalled asynchronously */
+struct marshal_cmd_Color4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_Color4sv(struct gl_context *ctx, const struct marshal_cmd_Color4sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Color4sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4sv);
+ struct marshal_cmd_Color4sv *cmd;
+ debug_print_marshal("Color4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4sv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4sv");
+ CALL_Color4sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* LoadTransposeMatrixf: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_LoadTransposeMatrixf(const GLfloat * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("LoadTransposeMatrixf");
+ CALL_LoadTransposeMatrixf(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* LoadTransposeMatrixd: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_LoadTransposeMatrixd(const GLdouble * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("LoadTransposeMatrixd");
+ CALL_LoadTransposeMatrixd(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* PixelZoom: marshalled asynchronously */
+struct marshal_cmd_PixelZoom
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat xfactor;
+ GLfloat yfactor;
+};
+static inline void
+_mesa_unmarshal_PixelZoom(struct gl_context *ctx, const struct marshal_cmd_PixelZoom *cmd)
+{
+ const GLfloat xfactor = cmd->xfactor;
+ const GLfloat yfactor = cmd->yfactor;
+ CALL_PixelZoom(ctx->CurrentServerDispatch, (xfactor, yfactor));
+}
+static void GLAPIENTRY
+_mesa_marshal_PixelZoom(GLfloat xfactor, GLfloat yfactor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PixelZoom);
+ struct marshal_cmd_PixelZoom *cmd;
+ debug_print_marshal("PixelZoom");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PixelZoom, cmd_size);
+ cmd->xfactor = xfactor;
+ cmd->yfactor = yfactor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PixelZoom");
+ CALL_PixelZoom(ctx->CurrentServerDispatch, (xfactor, yfactor));
+}
+
+
+/* ProgramEnvParameter4dARB: marshalled asynchronously */
+struct marshal_cmd_ProgramEnvParameter4dARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_ProgramEnvParameter4dARB(struct gl_context *ctx, const struct marshal_cmd_ProgramEnvParameter4dARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_ProgramEnvParameter4dARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramEnvParameter4dARB(GLenum target, GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramEnvParameter4dARB);
+ struct marshal_cmd_ProgramEnvParameter4dARB *cmd;
+ debug_print_marshal("ProgramEnvParameter4dARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramEnvParameter4dARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramEnvParameter4dARB");
+ CALL_ProgramEnvParameter4dARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+
+
+/* ColorTableParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorTableParameterfv(GLenum target, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorTableParameterfv");
+ CALL_ColorTableParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* IsSemaphoreEXT: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsSemaphoreEXT(GLuint semaphore)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsSemaphoreEXT");
+ return CALL_IsSemaphoreEXT(ctx->CurrentServerDispatch, (semaphore));
+}
+
+
+/* IsTexture: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsTexture(GLuint texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsTexture");
+ return CALL_IsTexture(ctx->CurrentServerDispatch, (texture));
+}
+
+
+/* ProgramUniform3uiv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLuint value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3uiv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3uiv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 12;
+ CALL_ProgramUniform3uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3uiv(GLuint program, GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3uiv) + safe_mul(count, 12);
+ struct marshal_cmd_ProgramUniform3uiv *cmd;
+ debug_print_marshal("ProgramUniform3uiv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3uiv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3uiv");
+ CALL_ProgramUniform3uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* IndexPointer: marshalled asynchronously */
+struct marshal_cmd_IndexPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_IndexPointer(struct gl_context *ctx, const struct marshal_cmd_IndexPointer *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_IndexPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_IndexPointer(GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_IndexPointer);
+ struct marshal_cmd_IndexPointer *cmd;
+ debug_print_marshal("IndexPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("IndexPointer");
+ CALL_IndexPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_IndexPointer, cmd_size);
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("IndexPointer");
+ CALL_IndexPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+
+
+/* VertexAttrib4sNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4sNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4sNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4sNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort w = cmd->w;
+ CALL_VertexAttrib4sNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4sNV(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4sNV);
+ struct marshal_cmd_VertexAttrib4sNV *cmd;
+ debug_print_marshal("VertexAttrib4sNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4sNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4sNV");
+ CALL_VertexAttrib4sNV(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* GetMapdv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMapdv(GLenum target, GLenum query, GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMapdv");
+ CALL_GetMapdv(ctx->CurrentServerDispatch, (target, query, v));
+}
+
+
+/* Uniform3ui64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform3ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLuint64 value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3ui64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform3ui64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 24;
+ CALL_Uniform3ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3ui64vARB(GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3ui64vARB) + safe_mul(count, 24);
+ struct marshal_cmd_Uniform3ui64vARB *cmd;
+ debug_print_marshal("Uniform3ui64vARB");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3ui64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3ui64vARB");
+ CALL_Uniform3ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetInteger64i_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetInteger64i_v(GLenum cap, GLuint index, GLint64 * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetInteger64i_v");
+ CALL_GetInteger64i_v(ctx->CurrentServerDispatch, (cap, index, data));
+}
+
+
+/* BufferPageCommitmentARB: marshalled asynchronously */
+struct marshal_cmd_BufferPageCommitmentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLintptr offset;
+ GLsizeiptr size;
+ GLboolean commit;
+};
+static inline void
+_mesa_unmarshal_BufferPageCommitmentARB(struct gl_context *ctx, const struct marshal_cmd_BufferPageCommitmentARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ const GLboolean commit = cmd->commit;
+ CALL_BufferPageCommitmentARB(ctx->CurrentServerDispatch, (target, offset, size, commit));
+}
+static void GLAPIENTRY
+_mesa_marshal_BufferPageCommitmentARB(GLenum target, GLintptr offset, GLsizeiptr size, GLboolean commit)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BufferPageCommitmentARB);
+ struct marshal_cmd_BufferPageCommitmentARB *cmd;
+ debug_print_marshal("BufferPageCommitmentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BufferPageCommitmentARB, cmd_size);
+ cmd->target = target;
+ cmd->offset = offset;
+ cmd->size = size;
+ cmd->commit = commit;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BufferPageCommitmentARB");
+ CALL_BufferPageCommitmentARB(ctx->CurrentServerDispatch, (target, offset, size, commit));
+}
+
+
+/* IsBuffer: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsBuffer(GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsBuffer");
+ return CALL_IsBuffer(ctx->CurrentServerDispatch, (buffer));
+}
+
+
+/* ColorP4ui: marshalled asynchronously */
+struct marshal_cmd_ColorP4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint color;
+};
+static inline void
+_mesa_unmarshal_ColorP4ui(struct gl_context *ctx, const struct marshal_cmd_ColorP4ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint color = cmd->color;
+ CALL_ColorP4ui(ctx->CurrentServerDispatch, (type, color));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorP4ui(GLenum type, GLuint color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorP4ui);
+ struct marshal_cmd_ColorP4ui *cmd;
+ debug_print_marshal("ColorP4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorP4ui, cmd_size);
+ cmd->type = type;
+ cmd->color = color;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorP4ui");
+ CALL_ColorP4ui(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* TextureStorage3D: marshalled asynchronously */
+struct marshal_cmd_TextureStorage3D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei levels;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+};
+static inline void
+_mesa_unmarshal_TextureStorage3D(struct gl_context *ctx, const struct marshal_cmd_TextureStorage3D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ CALL_TextureStorage3D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width, height, depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage3D(GLuint texture, GLsizei levels, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage3D);
+ struct marshal_cmd_TextureStorage3D *cmd;
+ debug_print_marshal("TextureStorage3D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage3D, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage3D");
+ CALL_TextureStorage3D(ctx->CurrentServerDispatch, (texture, levels, internalformat, width, height, depth));
+}
+
+
+/* TexCoordP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP3uiv(GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexCoordP3uiv");
+ CALL_TexCoordP3uiv(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* GetnUniformui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformui64vARB(GLuint program, GLint location, GLsizei bufSize, GLuint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformui64vARB");
+ CALL_GetnUniformui64vARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* TextureStorageMem2DMultisampleEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorageMem2DMultisampleEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei samples;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLboolean fixedSampleLocations;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TextureStorageMem2DMultisampleEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorageMem2DMultisampleEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLboolean fixedSampleLocations = cmd->fixedSampleLocations;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TextureStorageMem2DMultisampleEXT(ctx->CurrentServerDispatch, (texture, samples, internalFormat, width, height, fixedSampleLocations, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorageMem2DMultisampleEXT(GLuint texture, GLsizei samples, GLenum internalFormat, GLsizei width, GLsizei height, GLboolean fixedSampleLocations, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorageMem2DMultisampleEXT);
+ struct marshal_cmd_TextureStorageMem2DMultisampleEXT *cmd;
+ debug_print_marshal("TextureStorageMem2DMultisampleEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorageMem2DMultisampleEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->samples = samples;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->fixedSampleLocations = fixedSampleLocations;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorageMem2DMultisampleEXT");
+ CALL_TextureStorageMem2DMultisampleEXT(ctx->CurrentServerDispatch, (texture, samples, internalFormat, width, height, fixedSampleLocations, memory, offset));
+}
+
+
+/* Uniform1iv: marshalled asynchronously */
+struct marshal_cmd_Uniform1iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLint value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1iv(struct gl_context *ctx, const struct marshal_cmd_Uniform1iv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 4;
+ CALL_Uniform1iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1iv(GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1iv) + safe_mul(count, 4);
+ struct marshal_cmd_Uniform1iv *cmd;
+ debug_print_marshal("Uniform1iv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1iv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1iv");
+ CALL_Uniform1iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* Uniform4uiv: marshalled asynchronously */
+struct marshal_cmd_Uniform4uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLuint value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4uiv(struct gl_context *ctx, const struct marshal_cmd_Uniform4uiv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform4uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4uiv(GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4uiv) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform4uiv *cmd;
+ debug_print_marshal("Uniform4uiv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4uiv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4uiv");
+ CALL_Uniform4uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* PopDebugGroup: marshalled asynchronously */
+struct marshal_cmd_PopDebugGroup
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PopDebugGroup(struct gl_context *ctx, const struct marshal_cmd_PopDebugGroup *cmd)
+{
+ CALL_PopDebugGroup(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PopDebugGroup(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PopDebugGroup);
+ struct marshal_cmd_PopDebugGroup *cmd;
+ debug_print_marshal("PopDebugGroup");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PopDebugGroup, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PopDebugGroup");
+ CALL_PopDebugGroup(ctx->CurrentServerDispatch, ());
+}
+
+
+/* VertexAttrib1d: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1d(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ CALL_VertexAttrib1d(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1d(GLuint index, GLdouble x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1d);
+ struct marshal_cmd_VertexAttrib1d *cmd;
+ debug_print_marshal("VertexAttrib1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1d");
+ CALL_VertexAttrib1d(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* CompressedTexImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexImage1D(GLenum target, GLint level, GLenum internalformat, GLsizei width, GLint border, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexImage1D");
+ CALL_CompressedTexImage1D(ctx->CurrentServerDispatch, (target, level, internalformat, width, border, imageSize, data));
+}
+
+
+/* TexBufferRange: marshalled asynchronously */
+struct marshal_cmd_TexBufferRange
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_TexBufferRange(struct gl_context *ctx, const struct marshal_cmd_TexBufferRange *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ CALL_TexBufferRange(ctx->CurrentServerDispatch, (target, internalformat, buffer, offset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexBufferRange(GLenum target, GLenum internalformat, GLuint buffer, GLintptr offset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexBufferRange);
+ struct marshal_cmd_TexBufferRange *cmd;
+ debug_print_marshal("TexBufferRange");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexBufferRange, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexBufferRange");
+ CALL_TexBufferRange(ctx->CurrentServerDispatch, (target, internalformat, buffer, offset, size));
+}
+
+
+/* VertexAttrib1s: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1s
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1s(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1s *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ CALL_VertexAttrib1s(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1s(GLuint index, GLshort x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1s);
+ struct marshal_cmd_VertexAttrib1s *cmd;
+ debug_print_marshal("VertexAttrib1s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1s, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1s");
+ CALL_VertexAttrib1s(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* MultiDrawElementsIndirect: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawElementsIndirect(GLenum mode, GLenum type, const GLvoid * indirect, GLsizei primcount, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiDrawElementsIndirect");
+ CALL_MultiDrawElementsIndirect(ctx->CurrentServerDispatch, (mode, type, indirect, primcount, stride));
+}
+
+
+/* UniformMatrix4x3dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4x3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 96) bytes are GLdouble value[count][12] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4x3dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4x3dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 96;
+ CALL_UniformMatrix4x3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4x3dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4x3dv) + safe_mul(count, 96);
+ struct marshal_cmd_UniformMatrix4x3dv *cmd;
+ debug_print_marshal("UniformMatrix4x3dv");
+ if (unlikely(safe_mul(count, 96) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4x3dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 96);
+ variable_data += count * 96;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4x3dv");
+ CALL_UniformMatrix4x3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* TransformFeedbackBufferBase: marshalled asynchronously */
+struct marshal_cmd_TransformFeedbackBufferBase
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint xfb;
+ GLuint index;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_TransformFeedbackBufferBase(struct gl_context *ctx, const struct marshal_cmd_TransformFeedbackBufferBase *cmd)
+{
+ const GLuint xfb = cmd->xfb;
+ const GLuint index = cmd->index;
+ const GLuint buffer = cmd->buffer;
+ CALL_TransformFeedbackBufferBase(ctx->CurrentServerDispatch, (xfb, index, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_TransformFeedbackBufferBase(GLuint xfb, GLuint index, GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TransformFeedbackBufferBase);
+ struct marshal_cmd_TransformFeedbackBufferBase *cmd;
+ debug_print_marshal("TransformFeedbackBufferBase");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TransformFeedbackBufferBase, cmd_size);
+ cmd->xfb = xfb;
+ cmd->index = index;
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TransformFeedbackBufferBase");
+ CALL_TransformFeedbackBufferBase(ctx->CurrentServerDispatch, (xfb, index, buffer));
+}
+
+
+/* FogCoordfvEXT: marshalled asynchronously */
+struct marshal_cmd_FogCoordfvEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat coord[1];
+};
+static inline void
+_mesa_unmarshal_FogCoordfvEXT(struct gl_context *ctx, const struct marshal_cmd_FogCoordfvEXT *cmd)
+{
+ const GLfloat * coord = cmd->coord;
+ CALL_FogCoordfvEXT(ctx->CurrentServerDispatch, (coord));
+}
+static void GLAPIENTRY
+_mesa_marshal_FogCoordfvEXT(const GLfloat * coord)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FogCoordfvEXT);
+ struct marshal_cmd_FogCoordfvEXT *cmd;
+ debug_print_marshal("FogCoordfvEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FogCoordfvEXT, cmd_size);
+ memcpy(cmd->coord, coord, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FogCoordfvEXT");
+ CALL_FogCoordfvEXT(ctx->CurrentServerDispatch, (coord));
+}
+
+
+/* Uniform2ui64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform2ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLuint64 value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2ui64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform2ui64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform2ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2ui64vARB(GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2ui64vARB) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform2ui64vARB *cmd;
+ debug_print_marshal("Uniform2ui64vARB");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2ui64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2ui64vARB");
+ CALL_Uniform2ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetColorTableParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetColorTableParameterfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetColorTableParameterfv");
+ CALL_GetColorTableParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* MultiTexCoord3fARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat s;
+ GLfloat t;
+ GLfloat r;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3fARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ const GLfloat r = cmd->r;
+ CALL_MultiTexCoord3fARB(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3fARB(GLenum target, GLfloat s, GLfloat t, GLfloat r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3fARB);
+ struct marshal_cmd_MultiTexCoord3fARB *cmd;
+ debug_print_marshal("MultiTexCoord3fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3fARB, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3fARB");
+ CALL_MultiTexCoord3fARB(ctx->CurrentServerDispatch, (target, s, t, r));
+}
+
+
+/* GetTexLevelParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexLevelParameterfv(GLenum target, GLint level, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexLevelParameterfv");
+ CALL_GetTexLevelParameterfv(ctx->CurrentServerDispatch, (target, level, pname, params));
+}
+
+
+/* Vertex2sv: marshalled asynchronously */
+struct marshal_cmd_Vertex2sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_Vertex2sv(struct gl_context *ctx, const struct marshal_cmd_Vertex2sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Vertex2sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2sv);
+ struct marshal_cmd_Vertex2sv *cmd;
+ debug_print_marshal("Vertex2sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2sv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2sv");
+ CALL_Vertex2sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetnMapdvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnMapdvARB(GLenum target, GLenum query, GLsizei bufSize, GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnMapdvARB");
+ CALL_GetnMapdvARB(ctx->CurrentServerDispatch, (target, query, bufSize, v));
+}
+
+
+/* VertexAttrib2dNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2dNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2dNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2dNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_VertexAttrib2dNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2dNV(GLuint index, GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2dNV);
+ struct marshal_cmd_VertexAttrib2dNV *cmd;
+ debug_print_marshal("VertexAttrib2dNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2dNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2dNV");
+ CALL_VertexAttrib2dNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* VertexAttrib3svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib3svNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3svNV(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3svNV);
+ struct marshal_cmd_VertexAttrib3svNV *cmd;
+ debug_print_marshal("VertexAttrib3svNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3svNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3svNV");
+ CALL_VertexAttrib3svNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetTexEnviv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexEnviv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexEnviv");
+ CALL_GetTexEnviv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* ViewportArrayv: marshalled asynchronously */
+struct marshal_cmd_ViewportArrayv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint first;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLfloat v[count][4] */
+};
+static inline void
+_mesa_unmarshal_ViewportArrayv(struct gl_context *ctx, const struct marshal_cmd_ViewportArrayv *cmd)
+{
+ const GLuint first = cmd->first;
+ const GLsizei count = cmd->count;
+ const GLfloat * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLfloat *) variable_data;
+ variable_data += count * 16;
+ CALL_ViewportArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_ViewportArrayv(GLuint first, GLsizei count, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ViewportArrayv) + safe_mul(count, 16);
+ struct marshal_cmd_ViewportArrayv *cmd;
+ debug_print_marshal("ViewportArrayv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ViewportArrayv, cmd_size);
+ cmd->first = first;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ViewportArrayv");
+ CALL_ViewportArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+
+
+/* SeparableFilter2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SeparableFilter2D(GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * row, const GLvoid * column)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SeparableFilter2D");
+ CALL_SeparableFilter2D(ctx->CurrentServerDispatch, (target, internalformat, width, height, format, type, row, column));
+}
+
+
+/* ArrayElement: marshalled asynchronously */
+struct marshal_cmd_ArrayElement
+{
+ struct marshal_cmd_base cmd_base;
+ GLint i;
+};
+static inline void
+_mesa_unmarshal_ArrayElement(struct gl_context *ctx, const struct marshal_cmd_ArrayElement *cmd)
+{
+ const GLint i = cmd->i;
+ CALL_ArrayElement(ctx->CurrentServerDispatch, (i));
+}
+static void GLAPIENTRY
+_mesa_marshal_ArrayElement(GLint i)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ArrayElement);
+ struct marshal_cmd_ArrayElement *cmd;
+ debug_print_marshal("ArrayElement");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ArrayElement, cmd_size);
+ cmd->i = i;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ArrayElement");
+ CALL_ArrayElement(ctx->CurrentServerDispatch, (i));
+}
+
+
+/* TexImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexImage2D(GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLint border, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexImage2D");
+ CALL_TexImage2D(ctx->CurrentServerDispatch, (target, level, internalformat, width, height, border, format, type, pixels));
+}
+
+
+/* RasterPos2dv: marshalled asynchronously */
+struct marshal_cmd_RasterPos2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_RasterPos2dv(struct gl_context *ctx, const struct marshal_cmd_RasterPos2dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_RasterPos2dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2dv);
+ struct marshal_cmd_RasterPos2dv *cmd;
+ debug_print_marshal("RasterPos2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2dv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2dv");
+ CALL_RasterPos2dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Fogiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Fogiv(GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Fogiv");
+ CALL_Fogiv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* EndQuery: marshalled asynchronously */
+struct marshal_cmd_EndQuery
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+};
+static inline void
+_mesa_unmarshal_EndQuery(struct gl_context *ctx, const struct marshal_cmd_EndQuery *cmd)
+{
+ const GLenum target = cmd->target;
+ CALL_EndQuery(ctx->CurrentServerDispatch, (target));
+}
+static void GLAPIENTRY
+_mesa_marshal_EndQuery(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndQuery);
+ struct marshal_cmd_EndQuery *cmd;
+ debug_print_marshal("EndQuery");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndQuery, cmd_size);
+ cmd->target = target;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndQuery");
+ CALL_EndQuery(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* TexCoord1dv: marshalled asynchronously */
+struct marshal_cmd_TexCoord1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[1];
+};
+static inline void
+_mesa_unmarshal_TexCoord1dv(struct gl_context *ctx, const struct marshal_cmd_TexCoord1dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_TexCoord1dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1dv);
+ struct marshal_cmd_TexCoord1dv *cmd;
+ debug_print_marshal("TexCoord1dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1dv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1dv");
+ CALL_TexCoord1dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* AlphaFragmentOp3ATI: marshalled asynchronously */
+struct marshal_cmd_AlphaFragmentOp3ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+ GLuint arg2;
+ GLuint arg2Rep;
+ GLuint arg2Mod;
+ GLuint arg3;
+ GLuint arg3Rep;
+ GLuint arg3Mod;
+};
+static inline void
+_mesa_unmarshal_AlphaFragmentOp3ATI(struct gl_context *ctx, const struct marshal_cmd_AlphaFragmentOp3ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ const GLuint arg2 = cmd->arg2;
+ const GLuint arg2Rep = cmd->arg2Rep;
+ const GLuint arg2Mod = cmd->arg2Mod;
+ const GLuint arg3 = cmd->arg3;
+ const GLuint arg3Rep = cmd->arg3Rep;
+ const GLuint arg3Mod = cmd->arg3Mod;
+ CALL_AlphaFragmentOp3ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_AlphaFragmentOp3ATI(GLenum op, GLuint dst, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AlphaFragmentOp3ATI);
+ struct marshal_cmd_AlphaFragmentOp3ATI *cmd;
+ debug_print_marshal("AlphaFragmentOp3ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AlphaFragmentOp3ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ cmd->arg2 = arg2;
+ cmd->arg2Rep = arg2Rep;
+ cmd->arg2Mod = arg2Mod;
+ cmd->arg3 = arg3;
+ cmd->arg3Rep = arg3Rep;
+ cmd->arg3Mod = arg3Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AlphaFragmentOp3ATI");
+ CALL_AlphaFragmentOp3ATI(ctx->CurrentServerDispatch, (op, dst, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod));
+}
+
+
+/* Clear: marshalled asynchronously */
+struct marshal_cmd_Clear
+{
+ struct marshal_cmd_base cmd_base;
+ GLbitfield mask;
+};
+static inline void
+_mesa_unmarshal_Clear(struct gl_context *ctx, const struct marshal_cmd_Clear *cmd)
+{
+ const GLbitfield mask = cmd->mask;
+ CALL_Clear(ctx->CurrentServerDispatch, (mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_Clear(GLbitfield mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Clear);
+ struct marshal_cmd_Clear *cmd;
+ debug_print_marshal("Clear");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Clear, cmd_size);
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Clear");
+ CALL_Clear(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* VertexAttrib4sv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4sv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4sv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib4sv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4sv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4sv);
+ struct marshal_cmd_VertexAttrib4sv *cmd;
+ debug_print_marshal("VertexAttrib4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4sv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4sv");
+ CALL_VertexAttrib4sv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Ortho: marshalled asynchronously */
+struct marshal_cmd_Ortho
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble left;
+ GLdouble right;
+ GLdouble bottom;
+ GLdouble top;
+ GLdouble zNear;
+ GLdouble zFar;
+};
+static inline void
+_mesa_unmarshal_Ortho(struct gl_context *ctx, const struct marshal_cmd_Ortho *cmd)
+{
+ const GLdouble left = cmd->left;
+ const GLdouble right = cmd->right;
+ const GLdouble bottom = cmd->bottom;
+ const GLdouble top = cmd->top;
+ const GLdouble zNear = cmd->zNear;
+ const GLdouble zFar = cmd->zFar;
+ CALL_Ortho(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Ortho(GLdouble left, GLdouble right, GLdouble bottom, GLdouble top, GLdouble zNear, GLdouble zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Ortho);
+ struct marshal_cmd_Ortho *cmd;
+ debug_print_marshal("Ortho");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Ortho, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Ortho");
+ CALL_Ortho(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* Uniform3uiv: marshalled asynchronously */
+struct marshal_cmd_Uniform3uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLuint value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3uiv(struct gl_context *ctx, const struct marshal_cmd_Uniform3uiv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 12;
+ CALL_Uniform3uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3uiv(GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3uiv) + safe_mul(count, 12);
+ struct marshal_cmd_Uniform3uiv *cmd;
+ debug_print_marshal("Uniform3uiv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3uiv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3uiv");
+ CALL_Uniform3uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetUniformi64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformi64vARB(GLuint program, GLint location, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformi64vARB");
+ CALL_GetUniformi64vARB(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* EndQueryIndexed: marshalled asynchronously */
+struct marshal_cmd_EndQueryIndexed
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_EndQueryIndexed(struct gl_context *ctx, const struct marshal_cmd_EndQueryIndexed *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ CALL_EndQueryIndexed(ctx->CurrentServerDispatch, (target, index));
+}
+static void GLAPIENTRY
+_mesa_marshal_EndQueryIndexed(GLenum target, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndQueryIndexed);
+ struct marshal_cmd_EndQueryIndexed *cmd;
+ debug_print_marshal("EndQueryIndexed");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndQueryIndexed, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndQueryIndexed");
+ CALL_EndQueryIndexed(ctx->CurrentServerDispatch, (target, index));
+}
+
+
+/* TexParameterxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexParameterxv(GLenum target, GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexParameterxv");
+ CALL_TexParameterxv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* MultiDrawArraysIndirectCountARB: marshalled asynchronously */
+struct marshal_cmd_MultiDrawArraysIndirectCountARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLintptr indirect;
+ GLintptr drawcount;
+ GLsizei maxdrawcount;
+ GLsizei stride;
+};
+static inline void
+_mesa_unmarshal_MultiDrawArraysIndirectCountARB(struct gl_context *ctx, const struct marshal_cmd_MultiDrawArraysIndirectCountARB *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLintptr indirect = cmd->indirect;
+ const GLintptr drawcount = cmd->drawcount;
+ const GLsizei maxdrawcount = cmd->maxdrawcount;
+ const GLsizei stride = cmd->stride;
+ CALL_MultiDrawArraysIndirectCountARB(ctx->CurrentServerDispatch, (mode, indirect, drawcount, maxdrawcount, stride));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawArraysIndirectCountARB(GLenum mode, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiDrawArraysIndirectCountARB);
+ struct marshal_cmd_MultiDrawArraysIndirectCountARB *cmd;
+ debug_print_marshal("MultiDrawArraysIndirectCountARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiDrawArraysIndirectCountARB, cmd_size);
+ cmd->mode = mode;
+ cmd->indirect = indirect;
+ cmd->drawcount = drawcount;
+ cmd->maxdrawcount = maxdrawcount;
+ cmd->stride = stride;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiDrawArraysIndirectCountARB");
+ CALL_MultiDrawArraysIndirectCountARB(ctx->CurrentServerDispatch, (mode, indirect, drawcount, maxdrawcount, stride));
+}
+
+
+/* ProgramUniformMatrix2fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 16) bytes are GLfloat value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniformMatrix2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2fv) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniformMatrix2fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2fv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2fv");
+ CALL_ProgramUniformMatrix2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* ProgramLocalParameter4fvARB: marshalled asynchronously */
+struct marshal_cmd_ProgramLocalParameter4fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLfloat params[4];
+};
+static inline void
+_mesa_unmarshal_ProgramLocalParameter4fvARB(struct gl_context *ctx, const struct marshal_cmd_ProgramLocalParameter4fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLfloat * params = cmd->params;
+ CALL_ProgramLocalParameter4fvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramLocalParameter4fvARB(GLenum target, GLuint index, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramLocalParameter4fvARB);
+ struct marshal_cmd_ProgramLocalParameter4fvARB *cmd;
+ debug_print_marshal("ProgramLocalParameter4fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramLocalParameter4fvARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ memcpy(cmd->params, params, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramLocalParameter4fvARB");
+ CALL_ProgramLocalParameter4fvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* Uniform4dv: marshalled asynchronously */
+struct marshal_cmd_Uniform4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLdouble value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4dv(struct gl_context *ctx, const struct marshal_cmd_Uniform4dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 32;
+ CALL_Uniform4dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4dv(GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4dv) + safe_mul(count, 32);
+ struct marshal_cmd_Uniform4dv *cmd;
+ debug_print_marshal("Uniform4dv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4dv");
+ CALL_Uniform4dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetUnsignedBytevEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUnsignedBytevEXT(GLenum pname, GLubyte * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUnsignedBytevEXT");
+ CALL_GetUnsignedBytevEXT(ctx->CurrentServerDispatch, (pname, data));
+}
+
+
+/* LightModelx: marshalled asynchronously */
+struct marshal_cmd_LightModelx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_LightModelx(struct gl_context *ctx, const struct marshal_cmd_LightModelx *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_LightModelx(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_LightModelx(GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LightModelx);
+ struct marshal_cmd_LightModelx *cmd;
+ debug_print_marshal("LightModelx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LightModelx, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LightModelx");
+ CALL_LightModelx(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* VertexAttribI3iEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI3iEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint x;
+ GLint y;
+ GLint z;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI3iEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI3iEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ CALL_VertexAttribI3iEXT(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI3iEXT(GLuint index, GLint x, GLint y, GLint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI3iEXT);
+ struct marshal_cmd_VertexAttribI3iEXT *cmd;
+ debug_print_marshal("VertexAttribI3iEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI3iEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI3iEXT");
+ CALL_VertexAttribI3iEXT(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* ClearColorx: marshalled asynchronously */
+struct marshal_cmd_ClearColorx
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampx red;
+ GLclampx green;
+ GLclampx blue;
+ GLclampx alpha;
+};
+static inline void
+_mesa_unmarshal_ClearColorx(struct gl_context *ctx, const struct marshal_cmd_ClearColorx *cmd)
+{
+ const GLclampx red = cmd->red;
+ const GLclampx green = cmd->green;
+ const GLclampx blue = cmd->blue;
+ const GLclampx alpha = cmd->alpha;
+ CALL_ClearColorx(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearColorx(GLclampx red, GLclampx green, GLclampx blue, GLclampx alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearColorx);
+ struct marshal_cmd_ClearColorx *cmd;
+ debug_print_marshal("ClearColorx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearColorx, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearColorx");
+ CALL_ClearColorx(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* EndTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_EndTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_EndTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_EndTransformFeedback *cmd)
+{
+ CALL_EndTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_EndTransformFeedback(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndTransformFeedback);
+ struct marshal_cmd_EndTransformFeedback *cmd;
+ debug_print_marshal("EndTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndTransformFeedback, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndTransformFeedback");
+ CALL_EndTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+
+
+/* VertexAttribL2dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL2dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribL2dv");
+ CALL_VertexAttribL2dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetActiveUniformName: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveUniformName(GLuint program, GLuint uniformIndex, GLsizei bufSize, GLsizei * length, GLchar * uniformName)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveUniformName");
+ CALL_GetActiveUniformName(ctx->CurrentServerDispatch, (program, uniformIndex, bufSize, length, uniformName));
+}
+
+
+/* GetProgramBinary: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramBinary(GLuint program, GLsizei bufSize, GLsizei * length, GLenum * binaryFormat, GLvoid * binary)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramBinary");
+ CALL_GetProgramBinary(ctx->CurrentServerDispatch, (program, bufSize, length, binaryFormat, binary));
+}
+
+
+/* ViewportIndexedfv: marshalled asynchronously */
+struct marshal_cmd_ViewportIndexedfv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_ViewportIndexedfv(struct gl_context *ctx, const struct marshal_cmd_ViewportIndexedfv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_ViewportIndexedfv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_ViewportIndexedfv(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ViewportIndexedfv);
+ struct marshal_cmd_ViewportIndexedfv *cmd;
+ debug_print_marshal("ViewportIndexedfv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ViewportIndexedfv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ViewportIndexedfv");
+ CALL_ViewportIndexedfv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* BindTextureUnit: marshalled asynchronously */
+struct marshal_cmd_BindTextureUnit
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint unit;
+ GLuint texture;
+};
+static inline void
+_mesa_unmarshal_BindTextureUnit(struct gl_context *ctx, const struct marshal_cmd_BindTextureUnit *cmd)
+{
+ const GLuint unit = cmd->unit;
+ const GLuint texture = cmd->texture;
+ CALL_BindTextureUnit(ctx->CurrentServerDispatch, (unit, texture));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindTextureUnit(GLuint unit, GLuint texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindTextureUnit);
+ struct marshal_cmd_BindTextureUnit *cmd;
+ debug_print_marshal("BindTextureUnit");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindTextureUnit, cmd_size);
+ cmd->unit = unit;
+ cmd->texture = texture;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindTextureUnit");
+ CALL_BindTextureUnit(ctx->CurrentServerDispatch, (unit, texture));
+}
+
+
+/* CallList: marshalled asynchronously */
+struct marshal_cmd_CallList
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint list;
+};
+static inline void
+_mesa_unmarshal_CallList(struct gl_context *ctx, const struct marshal_cmd_CallList *cmd)
+{
+ const GLuint list = cmd->list;
+ CALL_CallList(ctx->CurrentServerDispatch, (list));
+}
+static void GLAPIENTRY
+_mesa_marshal_CallList(GLuint list)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CallList);
+ struct marshal_cmd_CallList *cmd;
+ debug_print_marshal("CallList");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CallList, cmd_size);
+ cmd->list = list;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CallList");
+ CALL_CallList(ctx->CurrentServerDispatch, (list));
+}
+
+
+/* Materialfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Materialfv(GLenum face, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Materialfv");
+ CALL_Materialfv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* DeleteProgram: marshalled asynchronously */
+struct marshal_cmd_DeleteProgram
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_DeleteProgram(struct gl_context *ctx, const struct marshal_cmd_DeleteProgram *cmd)
+{
+ const GLuint program = cmd->program;
+ CALL_DeleteProgram(ctx->CurrentServerDispatch, (program));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteProgram(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteProgram);
+ struct marshal_cmd_DeleteProgram *cmd;
+ debug_print_marshal("DeleteProgram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteProgram, cmd_size);
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteProgram");
+ CALL_DeleteProgram(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* GetActiveAtomicCounterBufferiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveAtomicCounterBufferiv(GLuint program, GLuint bufferIndex, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveAtomicCounterBufferiv");
+ CALL_GetActiveAtomicCounterBufferiv(ctx->CurrentServerDispatch, (program, bufferIndex, pname, params));
+}
+
+
+/* ClearDepthf: marshalled asynchronously */
+struct marshal_cmd_ClearDepthf
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampf depth;
+};
+static inline void
+_mesa_unmarshal_ClearDepthf(struct gl_context *ctx, const struct marshal_cmd_ClearDepthf *cmd)
+{
+ const GLclampf depth = cmd->depth;
+ CALL_ClearDepthf(ctx->CurrentServerDispatch, (depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearDepthf(GLclampf depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearDepthf);
+ struct marshal_cmd_ClearDepthf *cmd;
+ debug_print_marshal("ClearDepthf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearDepthf, cmd_size);
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearDepthf");
+ CALL_ClearDepthf(ctx->CurrentServerDispatch, (depth));
+}
+
+
+/* GetTextureHandleARB: marshalled synchronously */
+static GLuint64 GLAPIENTRY
+_mesa_marshal_GetTextureHandleARB(GLuint texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureHandleARB");
+ return CALL_GetTextureHandleARB(ctx->CurrentServerDispatch, (texture));
+}
+
+
+/* GetConvolutionFilter: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetConvolutionFilter(GLenum target, GLenum format, GLenum type, GLvoid * image)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetConvolutionFilter");
+ CALL_GetConvolutionFilter(ctx->CurrentServerDispatch, (target, format, type, image));
+}
+
+
+/* MultiModeDrawElementsIBM: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiModeDrawElementsIBM(const GLenum * mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, GLint modestride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiModeDrawElementsIBM");
+ CALL_MultiModeDrawElementsIBM(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, modestride));
+}
+
+
+/* Uniform2iv: marshalled asynchronously */
+struct marshal_cmd_Uniform2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLint value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2iv(struct gl_context *ctx, const struct marshal_cmd_Uniform2iv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform2iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2iv(GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2iv) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform2iv *cmd;
+ debug_print_marshal("Uniform2iv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2iv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2iv");
+ CALL_Uniform2iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* GetFixedv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFixedv(GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFixedv");
+ CALL_GetFixedv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* SampleCoveragex: marshalled asynchronously */
+struct marshal_cmd_SampleCoveragex
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampx value;
+ GLboolean invert;
+};
+static inline void
+_mesa_unmarshal_SampleCoveragex(struct gl_context *ctx, const struct marshal_cmd_SampleCoveragex *cmd)
+{
+ const GLclampx value = cmd->value;
+ const GLboolean invert = cmd->invert;
+ CALL_SampleCoveragex(ctx->CurrentServerDispatch, (value, invert));
+}
+static void GLAPIENTRY
+_mesa_marshal_SampleCoveragex(GLclampx value, GLboolean invert)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SampleCoveragex);
+ struct marshal_cmd_SampleCoveragex *cmd;
+ debug_print_marshal("SampleCoveragex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SampleCoveragex, cmd_size);
+ cmd->value = value;
+ cmd->invert = invert;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SampleCoveragex");
+ CALL_SampleCoveragex(ctx->CurrentServerDispatch, (value, invert));
+}
+
+
+/* GetPerfQueryInfoINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfQueryInfoINTEL(GLuint queryId, GLuint queryNameLength, GLchar * queryName, GLuint * dataSize, GLuint * noCounters, GLuint * noInstances, GLuint * capsMask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfQueryInfoINTEL");
+ CALL_GetPerfQueryInfoINTEL(ctx->CurrentServerDispatch, (queryId, queryNameLength, queryName, dataSize, noCounters, noInstances, capsMask));
+}
+
+
+/* DeleteFramebuffers: marshalled asynchronously */
+struct marshal_cmd_DeleteFramebuffers
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint framebuffers[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteFramebuffers(struct gl_context *ctx, const struct marshal_cmd_DeleteFramebuffers *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * framebuffers;
+ const char *variable_data = (const char *) (cmd + 1);
+ framebuffers = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteFramebuffers(ctx->CurrentServerDispatch, (n, framebuffers));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteFramebuffers(GLsizei n, const GLuint * framebuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteFramebuffers) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteFramebuffers *cmd;
+ debug_print_marshal("DeleteFramebuffers");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteFramebuffers, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, framebuffers, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteFramebuffers");
+ CALL_DeleteFramebuffers(ctx->CurrentServerDispatch, (n, framebuffers));
+}
+
+
+/* VertexAttrib4uiv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4uiv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4uiv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint * v = cmd->v;
+ CALL_VertexAttrib4uiv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4uiv(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4uiv);
+ struct marshal_cmd_VertexAttrib4uiv *cmd;
+ debug_print_marshal("VertexAttrib4uiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4uiv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4uiv");
+ CALL_VertexAttrib4uiv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* VertexAttrib4Nsv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nsv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nsv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nsv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib4Nsv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nsv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nsv);
+ struct marshal_cmd_VertexAttrib4Nsv *cmd;
+ debug_print_marshal("VertexAttrib4Nsv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nsv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nsv");
+ CALL_VertexAttrib4Nsv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Vertex4s: marshalled asynchronously */
+struct marshal_cmd_Vertex4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort w;
+};
+static inline void
+_mesa_unmarshal_Vertex4s(struct gl_context *ctx, const struct marshal_cmd_Vertex4s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort w = cmd->w;
+ CALL_Vertex4s(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4s(GLshort x, GLshort y, GLshort z, GLshort w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4s);
+ struct marshal_cmd_Vertex4s *cmd;
+ debug_print_marshal("Vertex4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4s");
+ CALL_Vertex4s(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttribI2iEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI2iEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint x;
+ GLint y;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI2iEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI2iEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ CALL_VertexAttribI2iEXT(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI2iEXT(GLuint index, GLint x, GLint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI2iEXT);
+ struct marshal_cmd_VertexAttribI2iEXT *cmd;
+ debug_print_marshal("VertexAttribI2iEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI2iEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI2iEXT");
+ CALL_VertexAttribI2iEXT(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* Vertex4f: marshalled asynchronously */
+struct marshal_cmd_Vertex4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_Vertex4f(struct gl_context *ctx, const struct marshal_cmd_Vertex4f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_Vertex4f(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4f(GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4f);
+ struct marshal_cmd_Vertex4f *cmd;
+ debug_print_marshal("Vertex4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4f");
+ CALL_Vertex4f(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* Vertex4d: marshalled asynchronously */
+struct marshal_cmd_Vertex4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_Vertex4d(struct gl_context *ctx, const struct marshal_cmd_Vertex4d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_Vertex4d(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4d(GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4d);
+ struct marshal_cmd_Vertex4d *cmd;
+ debug_print_marshal("Vertex4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4d");
+ CALL_Vertex4d(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttribL4dv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL4dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribL4dv");
+ CALL_VertexAttribL4dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetnUniformi64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformi64vARB(GLuint program, GLint location, GLsizei bufSize, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformi64vARB");
+ CALL_GetnUniformi64vARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* GetTexGenfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexGenfv(GLenum coord, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexGenfv");
+ CALL_GetTexGenfv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* Vertex4i: marshalled asynchronously */
+struct marshal_cmd_Vertex4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint w;
+};
+static inline void
+_mesa_unmarshal_Vertex4i(struct gl_context *ctx, const struct marshal_cmd_Vertex4i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint w = cmd->w;
+ CALL_Vertex4i(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4i(GLint x, GLint y, GLint z, GLint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4i);
+ struct marshal_cmd_Vertex4i *cmd;
+ debug_print_marshal("Vertex4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4i");
+ CALL_Vertex4i(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* MemoryBarrierByRegion: marshalled asynchronously */
+struct marshal_cmd_MemoryBarrierByRegion
+{
+ struct marshal_cmd_base cmd_base;
+ GLbitfield barriers;
+};
+static inline void
+_mesa_unmarshal_MemoryBarrierByRegion(struct gl_context *ctx, const struct marshal_cmd_MemoryBarrierByRegion *cmd)
+{
+ const GLbitfield barriers = cmd->barriers;
+ CALL_MemoryBarrierByRegion(ctx->CurrentServerDispatch, (barriers));
+}
+static void GLAPIENTRY
+_mesa_marshal_MemoryBarrierByRegion(GLbitfield barriers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MemoryBarrierByRegion);
+ struct marshal_cmd_MemoryBarrierByRegion *cmd;
+ debug_print_marshal("MemoryBarrierByRegion");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MemoryBarrierByRegion, cmd_size);
+ cmd->barriers = barriers;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MemoryBarrierByRegion");
+ CALL_MemoryBarrierByRegion(ctx->CurrentServerDispatch, (barriers));
+}
+
+
+/* StencilFuncSeparateATI: marshalled asynchronously */
+struct marshal_cmd_StencilFuncSeparateATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum frontfunc;
+ GLenum backfunc;
+ GLint ref;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_StencilFuncSeparateATI(struct gl_context *ctx, const struct marshal_cmd_StencilFuncSeparateATI *cmd)
+{
+ const GLenum frontfunc = cmd->frontfunc;
+ const GLenum backfunc = cmd->backfunc;
+ const GLint ref = cmd->ref;
+ const GLuint mask = cmd->mask;
+ CALL_StencilFuncSeparateATI(ctx->CurrentServerDispatch, (frontfunc, backfunc, ref, mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilFuncSeparateATI(GLenum frontfunc, GLenum backfunc, GLint ref, GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilFuncSeparateATI);
+ struct marshal_cmd_StencilFuncSeparateATI *cmd;
+ debug_print_marshal("StencilFuncSeparateATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilFuncSeparateATI, cmd_size);
+ cmd->frontfunc = frontfunc;
+ cmd->backfunc = backfunc;
+ cmd->ref = ref;
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilFuncSeparateATI");
+ CALL_StencilFuncSeparateATI(ctx->CurrentServerDispatch, (frontfunc, backfunc, ref, mask));
+}
+
+
+/* GetVertexAttribIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribIuiv(GLuint index, GLenum pname, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribIuiv");
+ CALL_GetVertexAttribIuiv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* LightModelfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_LightModelfv(GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("LightModelfv");
+ CALL_LightModelfv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* Vertex4dv: marshalled asynchronously */
+struct marshal_cmd_Vertex4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_Vertex4dv(struct gl_context *ctx, const struct marshal_cmd_Vertex4dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Vertex4dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4dv);
+ struct marshal_cmd_Vertex4dv *cmd;
+ debug_print_marshal("Vertex4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4dv, cmd_size);
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4dv");
+ CALL_Vertex4dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetInfoLogARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetInfoLogARB(GLhandleARB obj, GLsizei maxLength, GLsizei * length, GLcharARB * infoLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetInfoLogARB");
+ CALL_GetInfoLogARB(ctx->CurrentServerDispatch, (obj, maxLength, length, infoLog));
+}
+
+
+/* StencilMask: marshalled asynchronously */
+struct marshal_cmd_StencilMask
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_StencilMask(struct gl_context *ctx, const struct marshal_cmd_StencilMask *cmd)
+{
+ const GLuint mask = cmd->mask;
+ CALL_StencilMask(ctx->CurrentServerDispatch, (mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilMask(GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilMask);
+ struct marshal_cmd_StencilMask *cmd;
+ debug_print_marshal("StencilMask");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilMask, cmd_size);
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilMask");
+ CALL_StencilMask(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* NamedFramebufferReadBuffer: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferReadBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum buf;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferReadBuffer(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferReadBuffer *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum buf = cmd->buf;
+ CALL_NamedFramebufferReadBuffer(ctx->CurrentServerDispatch, (framebuffer, buf));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferReadBuffer(GLuint framebuffer, GLenum buf)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferReadBuffer);
+ struct marshal_cmd_NamedFramebufferReadBuffer *cmd;
+ debug_print_marshal("NamedFramebufferReadBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferReadBuffer, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->buf = buf;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferReadBuffer");
+ CALL_NamedFramebufferReadBuffer(ctx->CurrentServerDispatch, (framebuffer, buf));
+}
+
+
+/* ProgramUniformHandleui64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformHandleui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint64 value;
+};
+static inline void
+_mesa_unmarshal_ProgramUniformHandleui64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformHandleui64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint64 value = cmd->value;
+ CALL_ProgramUniformHandleui64ARB(ctx->CurrentServerDispatch, (program, location, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformHandleui64ARB(GLuint program, GLint location, GLuint64 value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformHandleui64ARB);
+ struct marshal_cmd_ProgramUniformHandleui64ARB *cmd;
+ debug_print_marshal("ProgramUniformHandleui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformHandleui64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformHandleui64ARB");
+ CALL_ProgramUniformHandleui64ARB(ctx->CurrentServerDispatch, (program, location, value));
+}
+
+
+/* ProgramUniform2i64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2i64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2i64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ CALL_ProgramUniform2i64ARB(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2i64ARB(GLuint program, GLint location, GLint64 x, GLint64 y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2i64ARB);
+ struct marshal_cmd_ProgramUniform2i64ARB *cmd;
+ debug_print_marshal("ProgramUniform2i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2i64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2i64ARB");
+ CALL_ProgramUniform2i64ARB(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* IsList: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsList(GLuint list)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsList");
+ return CALL_IsList(ctx->CurrentServerDispatch, (list));
+}
+
+
+/* GetIntegeri_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetIntegeri_v(GLenum value, GLuint index, GLint * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetIntegeri_v");
+ CALL_GetIntegeri_v(ctx->CurrentServerDispatch, (value, index, data));
+}
+
+
+/* ProgramUniform2iv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLint value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2iv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2iv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform2iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2iv(GLuint program, GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2iv) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform2iv *cmd;
+ debug_print_marshal("ProgramUniform2iv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2iv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2iv");
+ CALL_ProgramUniform2iv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* CreateVertexArrays: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateVertexArrays(GLsizei n, GLuint * arrays)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateVertexArrays");
+ CALL_CreateVertexArrays(ctx->CurrentServerDispatch, (n, arrays));
+}
+
+
+/* FogCoordPointer: marshalled asynchronously */
+struct marshal_cmd_FogCoordPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_FogCoordPointer(struct gl_context *ctx, const struct marshal_cmd_FogCoordPointer *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_FogCoordPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_FogCoordPointer(GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FogCoordPointer);
+ struct marshal_cmd_FogCoordPointer *cmd;
+ debug_print_marshal("FogCoordPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("FogCoordPointer");
+ CALL_FogCoordPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FogCoordPointer, cmd_size);
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FogCoordPointer");
+ CALL_FogCoordPointer(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+
+
+/* SecondaryColor3us: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3us
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort red;
+ GLushort green;
+ GLushort blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3us(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3us *cmd)
+{
+ const GLushort red = cmd->red;
+ const GLushort green = cmd->green;
+ const GLushort blue = cmd->blue;
+ CALL_SecondaryColor3us(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3us(GLushort red, GLushort green, GLushort blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3us);
+ struct marshal_cmd_SecondaryColor3us *cmd;
+ debug_print_marshal("SecondaryColor3us");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3us, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3us");
+ CALL_SecondaryColor3us(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* TextureStorageMem1DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorageMem1DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TextureStorageMem1DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorageMem1DEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TextureStorageMem1DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorageMem1DEXT(GLuint texture, GLsizei levels, GLenum internalFormat, GLsizei width, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorageMem1DEXT);
+ struct marshal_cmd_TextureStorageMem1DEXT *cmd;
+ debug_print_marshal("TextureStorageMem1DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorageMem1DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorageMem1DEXT");
+ CALL_TextureStorageMem1DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, memory, offset));
+}
+
+
+/* SecondaryColor3ub: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3ub
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte red;
+ GLubyte green;
+ GLubyte blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3ub(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3ub *cmd)
+{
+ const GLubyte red = cmd->red;
+ const GLubyte green = cmd->green;
+ const GLubyte blue = cmd->blue;
+ CALL_SecondaryColor3ub(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3ub(GLubyte red, GLubyte green, GLubyte blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3ub);
+ struct marshal_cmd_SecondaryColor3ub *cmd;
+ debug_print_marshal("SecondaryColor3ub");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3ub, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3ub");
+ CALL_SecondaryColor3ub(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* NamedBufferStorageMemEXT: marshalled asynchronously */
+struct marshal_cmd_NamedBufferStorageMemEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buffer;
+ GLsizeiptr size;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_NamedBufferStorageMemEXT(struct gl_context *ctx, const struct marshal_cmd_NamedBufferStorageMemEXT *cmd)
+{
+ const GLuint buffer = cmd->buffer;
+ const GLsizeiptr size = cmd->size;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_NamedBufferStorageMemEXT(ctx->CurrentServerDispatch, (buffer, size, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedBufferStorageMemEXT(GLuint buffer, GLsizeiptr size, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedBufferStorageMemEXT);
+ struct marshal_cmd_NamedBufferStorageMemEXT *cmd;
+ debug_print_marshal("NamedBufferStorageMemEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedBufferStorageMemEXT, cmd_size);
+ cmd->buffer = buffer;
+ cmd->size = size;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedBufferStorageMemEXT");
+ CALL_NamedBufferStorageMemEXT(ctx->CurrentServerDispatch, (buffer, size, memory, offset));
+}
+
+
+/* SecondaryColor3ui: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint red;
+ GLuint green;
+ GLuint blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3ui(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3ui *cmd)
+{
+ const GLuint red = cmd->red;
+ const GLuint green = cmd->green;
+ const GLuint blue = cmd->blue;
+ CALL_SecondaryColor3ui(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3ui(GLuint red, GLuint green, GLuint blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3ui);
+ struct marshal_cmd_SecondaryColor3ui *cmd;
+ debug_print_marshal("SecondaryColor3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3ui, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3ui");
+ CALL_SecondaryColor3ui(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* ProgramUniform4ui64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+ GLuint64 z;
+ GLuint64 w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4ui64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4ui64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ const GLuint64 z = cmd->z;
+ const GLuint64 w = cmd->w;
+ CALL_ProgramUniform4ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4ui64ARB(GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z, GLuint64 w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4ui64ARB);
+ struct marshal_cmd_ProgramUniform4ui64ARB *cmd;
+ debug_print_marshal("ProgramUniform4ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4ui64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4ui64ARB");
+ CALL_ProgramUniform4ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* VertexAttrib1sNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1sNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1sNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1sNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ CALL_VertexAttrib1sNV(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1sNV(GLuint index, GLshort x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1sNV);
+ struct marshal_cmd_VertexAttrib1sNV *cmd;
+ debug_print_marshal("VertexAttrib1sNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1sNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1sNV");
+ CALL_VertexAttrib1sNV(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* SignalSemaphoreEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SignalSemaphoreEXT(GLuint semaphore, GLuint numBufferBarriers, const GLuint * buffers, GLuint numTextureBarriers, const GLuint * textures, const GLenum * dstLayouts)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SignalSemaphoreEXT");
+ CALL_SignalSemaphoreEXT(ctx->CurrentServerDispatch, (semaphore, numBufferBarriers, buffers, numTextureBarriers, textures, dstLayouts));
+}
+
+
+/* TextureBuffer: marshalled asynchronously */
+struct marshal_cmd_TextureBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum internalformat;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_TextureBuffer(struct gl_context *ctx, const struct marshal_cmd_TextureBuffer *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum internalformat = cmd->internalformat;
+ const GLuint buffer = cmd->buffer;
+ CALL_TextureBuffer(ctx->CurrentServerDispatch, (texture, internalformat, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureBuffer(GLuint texture, GLenum internalformat, GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureBuffer);
+ struct marshal_cmd_TextureBuffer *cmd;
+ debug_print_marshal("TextureBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureBuffer, cmd_size);
+ cmd->texture = texture;
+ cmd->internalformat = internalformat;
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureBuffer");
+ CALL_TextureBuffer(ctx->CurrentServerDispatch, (texture, internalformat, buffer));
+}
+
+
+/* InitNames: marshalled asynchronously */
+struct marshal_cmd_InitNames
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_InitNames(struct gl_context *ctx, const struct marshal_cmd_InitNames *cmd)
+{
+ CALL_InitNames(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_InitNames(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InitNames);
+ struct marshal_cmd_InitNames *cmd;
+ debug_print_marshal("InitNames");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InitNames, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InitNames");
+ CALL_InitNames(ctx->CurrentServerDispatch, ());
+}
+
+
+/* Normal3sv: marshalled asynchronously */
+struct marshal_cmd_Normal3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_Normal3sv(struct gl_context *ctx, const struct marshal_cmd_Normal3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Normal3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3sv);
+ struct marshal_cmd_Normal3sv *cmd;
+ debug_print_marshal("Normal3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3sv");
+ CALL_Normal3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DeleteQueries: marshalled asynchronously */
+struct marshal_cmd_DeleteQueries
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint ids[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteQueries(struct gl_context *ctx, const struct marshal_cmd_DeleteQueries *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * ids;
+ const char *variable_data = (const char *) (cmd + 1);
+ ids = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteQueries(ctx->CurrentServerDispatch, (n, ids));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteQueries(GLsizei n, const GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteQueries) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteQueries *cmd;
+ debug_print_marshal("DeleteQueries");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteQueries, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, ids, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteQueries");
+ CALL_DeleteQueries(ctx->CurrentServerDispatch, (n, ids));
+}
+
+
+/* InvalidateFramebuffer: marshalled asynchronously */
+struct marshal_cmd_InvalidateFramebuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei numAttachments;
+ /* Next safe_mul(numAttachments, 4) bytes are GLenum attachments[numAttachments] */
+};
+static inline void
+_mesa_unmarshal_InvalidateFramebuffer(struct gl_context *ctx, const struct marshal_cmd_InvalidateFramebuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei numAttachments = cmd->numAttachments;
+ const GLenum * attachments;
+ const char *variable_data = (const char *) (cmd + 1);
+ attachments = (const GLenum *) variable_data;
+ variable_data += numAttachments * 4;
+ CALL_InvalidateFramebuffer(ctx->CurrentServerDispatch, (target, numAttachments, attachments));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateFramebuffer(GLenum target, GLsizei numAttachments, const GLenum * attachments)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateFramebuffer) + safe_mul(numAttachments, 4);
+ struct marshal_cmd_InvalidateFramebuffer *cmd;
+ debug_print_marshal("InvalidateFramebuffer");
+ if (unlikely(safe_mul(numAttachments, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateFramebuffer, cmd_size);
+ cmd->target = target;
+ cmd->numAttachments = numAttachments;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, attachments, numAttachments * 4);
+ variable_data += numAttachments * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateFramebuffer");
+ CALL_InvalidateFramebuffer(ctx->CurrentServerDispatch, (target, numAttachments, attachments));
+}
+
+
+/* Hint: marshalled asynchronously */
+struct marshal_cmd_Hint
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_Hint(struct gl_context *ctx, const struct marshal_cmd_Hint *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum mode = cmd->mode;
+ CALL_Hint(ctx->CurrentServerDispatch, (target, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_Hint(GLenum target, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Hint);
+ struct marshal_cmd_Hint *cmd;
+ debug_print_marshal("Hint");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Hint, cmd_size);
+ cmd->target = target;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Hint");
+ CALL_Hint(ctx->CurrentServerDispatch, (target, mode));
+}
+
+
+/* MemoryBarrier: marshalled asynchronously */
+struct marshal_cmd_MemoryBarrier
+{
+ struct marshal_cmd_base cmd_base;
+ GLbitfield barriers;
+};
+static inline void
+_mesa_unmarshal_MemoryBarrier(struct gl_context *ctx, const struct marshal_cmd_MemoryBarrier *cmd)
+{
+ const GLbitfield barriers = cmd->barriers;
+ CALL_MemoryBarrier(ctx->CurrentServerDispatch, (barriers));
+}
+static void GLAPIENTRY
+_mesa_marshal_MemoryBarrier(GLbitfield barriers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MemoryBarrier);
+ struct marshal_cmd_MemoryBarrier *cmd;
+ debug_print_marshal("MemoryBarrier");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MemoryBarrier, cmd_size);
+ cmd->barriers = barriers;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MemoryBarrier");
+ CALL_MemoryBarrier(ctx->CurrentServerDispatch, (barriers));
+}
+
+
+/* CopyColorSubTable: marshalled asynchronously */
+struct marshal_cmd_CopyColorSubTable
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei start;
+ GLint x;
+ GLint y;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_CopyColorSubTable(struct gl_context *ctx, const struct marshal_cmd_CopyColorSubTable *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei start = cmd->start;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ CALL_CopyColorSubTable(ctx->CurrentServerDispatch, (target, start, x, y, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyColorSubTable(GLenum target, GLsizei start, GLint x, GLint y, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyColorSubTable);
+ struct marshal_cmd_CopyColorSubTable *cmd;
+ debug_print_marshal("CopyColorSubTable");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyColorSubTable, cmd_size);
+ cmd->target = target;
+ cmd->start = start;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyColorSubTable");
+ CALL_CopyColorSubTable(ctx->CurrentServerDispatch, (target, start, x, y, width));
+}
+
+
+/* GetObjectParameterfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetObjectParameterfvARB(GLhandleARB obj, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetObjectParameterfvARB");
+ CALL_GetObjectParameterfvARB(ctx->CurrentServerDispatch, (obj, pname, params));
+}
+
+
+/* GetTexEnvxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexEnvxv(GLenum target, GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexEnvxv");
+ CALL_GetTexEnvxv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* DrawTexsvOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexsvOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort coords[5];
+};
+static inline void
+_mesa_unmarshal_DrawTexsvOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexsvOES *cmd)
+{
+ const GLshort * coords = cmd->coords;
+ CALL_DrawTexsvOES(ctx->CurrentServerDispatch, (coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexsvOES(const GLshort * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexsvOES);
+ struct marshal_cmd_DrawTexsvOES *cmd;
+ debug_print_marshal("DrawTexsvOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexsvOES, cmd_size);
+ memcpy(cmd->coords, coords, 10);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexsvOES");
+ CALL_DrawTexsvOES(ctx->CurrentServerDispatch, (coords));
+}
+
+
+/* Disable: marshalled asynchronously */
+struct marshal_cmd_Disable
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum cap;
+};
+static inline void
+_mesa_unmarshal_Disable(struct gl_context *ctx, const struct marshal_cmd_Disable *cmd)
+{
+ const GLenum cap = cmd->cap;
+ CALL_Disable(ctx->CurrentServerDispatch, (cap));
+}
+static void GLAPIENTRY
+_mesa_marshal_Disable(GLenum cap)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Disable);
+ struct marshal_cmd_Disable *cmd;
+ debug_print_marshal("Disable");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Disable, cmd_size);
+ cmd->cap = cap;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Disable");
+ CALL_Disable(ctx->CurrentServerDispatch, (cap));
+}
+
+
+/* ClearColor: marshalled asynchronously */
+struct marshal_cmd_ClearColor
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampf red;
+ GLclampf green;
+ GLclampf blue;
+ GLclampf alpha;
+};
+static inline void
+_mesa_unmarshal_ClearColor(struct gl_context *ctx, const struct marshal_cmd_ClearColor *cmd)
+{
+ const GLclampf red = cmd->red;
+ const GLclampf green = cmd->green;
+ const GLclampf blue = cmd->blue;
+ const GLclampf alpha = cmd->alpha;
+ CALL_ClearColor(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearColor(GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearColor);
+ struct marshal_cmd_ClearColor *cmd;
+ debug_print_marshal("ClearColor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearColor, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearColor");
+ CALL_ClearColor(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* GetTextureParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureParameterIuiv(GLuint texture, GLenum pname, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureParameterIuiv");
+ CALL_GetTextureParameterIuiv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* RasterPos4iv: marshalled asynchronously */
+struct marshal_cmd_RasterPos4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_RasterPos4iv(struct gl_context *ctx, const struct marshal_cmd_RasterPos4iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_RasterPos4iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4iv);
+ struct marshal_cmd_RasterPos4iv *cmd;
+ debug_print_marshal("RasterPos4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4iv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4iv");
+ CALL_RasterPos4iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* VDPAUIsSurfaceNV: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_VDPAUIsSurfaceNV(GLintptr surface)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAUIsSurfaceNV");
+ return CALL_VDPAUIsSurfaceNV(ctx->CurrentServerDispatch, (surface));
+}
+
+
+/* ProgramUniformMatrix2x3fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix2x3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 24) bytes are GLfloat value[count][6] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix2x3fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix2x3fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 24;
+ CALL_ProgramUniformMatrix2x3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix2x3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix2x3fv) + safe_mul(count, 24);
+ struct marshal_cmd_ProgramUniformMatrix2x3fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix2x3fv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix2x3fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix2x3fv");
+ CALL_ProgramUniformMatrix2x3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* BindVertexBuffer: marshalled asynchronously */
+struct marshal_cmd_BindVertexBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint bindingindex;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizei stride;
+};
+static inline void
+_mesa_unmarshal_BindVertexBuffer(struct gl_context *ctx, const struct marshal_cmd_BindVertexBuffer *cmd)
+{
+ const GLuint bindingindex = cmd->bindingindex;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizei stride = cmd->stride;
+ CALL_BindVertexBuffer(ctx->CurrentServerDispatch, (bindingindex, buffer, offset, stride));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindVertexBuffer(GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindVertexBuffer);
+ struct marshal_cmd_BindVertexBuffer *cmd;
+ debug_print_marshal("BindVertexBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindVertexBuffer, cmd_size);
+ cmd->bindingindex = bindingindex;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->stride = stride;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindVertexBuffer");
+ CALL_BindVertexBuffer(ctx->CurrentServerDispatch, (bindingindex, buffer, offset, stride));
+}
+
+
+/* RasterPos4i: marshalled asynchronously */
+struct marshal_cmd_RasterPos4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint w;
+};
+static inline void
+_mesa_unmarshal_RasterPos4i(struct gl_context *ctx, const struct marshal_cmd_RasterPos4i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint w = cmd->w;
+ CALL_RasterPos4i(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4i(GLint x, GLint y, GLint z, GLint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4i);
+ struct marshal_cmd_RasterPos4i *cmd;
+ debug_print_marshal("RasterPos4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4i");
+ CALL_RasterPos4i(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* RasterPos4d: marshalled asynchronously */
+struct marshal_cmd_RasterPos4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_RasterPos4d(struct gl_context *ctx, const struct marshal_cmd_RasterPos4d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_RasterPos4d(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4d(GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4d);
+ struct marshal_cmd_RasterPos4d *cmd;
+ debug_print_marshal("RasterPos4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4d");
+ CALL_RasterPos4d(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* RasterPos4f: marshalled asynchronously */
+struct marshal_cmd_RasterPos4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_RasterPos4f(struct gl_context *ctx, const struct marshal_cmd_RasterPos4f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_RasterPos4f(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4f(GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4f);
+ struct marshal_cmd_RasterPos4f *cmd;
+ debug_print_marshal("RasterPos4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4f");
+ CALL_RasterPos4f(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VDPAUMapSurfacesNV: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VDPAUMapSurfacesNV(GLsizei numSurfaces, const GLintptr * surfaces)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAUMapSurfacesNV");
+ CALL_VDPAUMapSurfacesNV(ctx->CurrentServerDispatch, (numSurfaces, surfaces));
+}
+
+
+/* GetQueryIndexediv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryIndexediv(GLenum target, GLuint index, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryIndexediv");
+ CALL_GetQueryIndexediv(ctx->CurrentServerDispatch, (target, index, pname, params));
+}
+
+
+/* RasterPos3dv: marshalled asynchronously */
+struct marshal_cmd_RasterPos3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_RasterPos3dv(struct gl_context *ctx, const struct marshal_cmd_RasterPos3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_RasterPos3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3dv);
+ struct marshal_cmd_RasterPos3dv *cmd;
+ debug_print_marshal("RasterPos3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3dv");
+ CALL_RasterPos3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetProgramiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramiv(GLuint program, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramiv");
+ CALL_GetProgramiv(ctx->CurrentServerDispatch, (program, pname, params));
+}
+
+
+/* TexCoord1iv: marshalled asynchronously */
+struct marshal_cmd_TexCoord1iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[1];
+};
+static inline void
+_mesa_unmarshal_TexCoord1iv(struct gl_context *ctx, const struct marshal_cmd_TexCoord1iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_TexCoord1iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1iv);
+ struct marshal_cmd_TexCoord1iv *cmd;
+ debug_print_marshal("TexCoord1iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1iv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1iv");
+ CALL_TexCoord1iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* RasterPos4s: marshalled asynchronously */
+struct marshal_cmd_RasterPos4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort w;
+};
+static inline void
+_mesa_unmarshal_RasterPos4s(struct gl_context *ctx, const struct marshal_cmd_RasterPos4s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort w = cmd->w;
+ CALL_RasterPos4s(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4s(GLshort x, GLshort y, GLshort z, GLshort w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4s);
+ struct marshal_cmd_RasterPos4s *cmd;
+ debug_print_marshal("RasterPos4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4s");
+ CALL_RasterPos4s(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttrib3dv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3dv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3dv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib3dv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3dv);
+ struct marshal_cmd_VertexAttrib3dv *cmd;
+ debug_print_marshal("VertexAttrib3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3dv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3dv");
+ CALL_VertexAttrib3dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Histogram: marshalled asynchronously */
+struct marshal_cmd_Histogram
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei width;
+ GLenum internalformat;
+ GLboolean sink;
+};
+static inline void
+_mesa_unmarshal_Histogram(struct gl_context *ctx, const struct marshal_cmd_Histogram *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei width = cmd->width;
+ const GLenum internalformat = cmd->internalformat;
+ const GLboolean sink = cmd->sink;
+ CALL_Histogram(ctx->CurrentServerDispatch, (target, width, internalformat, sink));
+}
+static void GLAPIENTRY
+_mesa_marshal_Histogram(GLenum target, GLsizei width, GLenum internalformat, GLboolean sink)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Histogram);
+ struct marshal_cmd_Histogram *cmd;
+ debug_print_marshal("Histogram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Histogram, cmd_size);
+ cmd->target = target;
+ cmd->width = width;
+ cmd->internalformat = internalformat;
+ cmd->sink = sink;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Histogram");
+ CALL_Histogram(ctx->CurrentServerDispatch, (target, width, internalformat, sink));
+}
+
+
+/* Uniform2fv: marshalled asynchronously */
+struct marshal_cmd_Uniform2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLfloat value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2fv(struct gl_context *ctx, const struct marshal_cmd_Uniform2fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform2fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2fv(GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2fv) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform2fv *cmd;
+ debug_print_marshal("Uniform2fv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2fv");
+ CALL_Uniform2fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* ProgramUniformMatrix3x4dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3x4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 96) bytes are GLdouble value[count][12] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3x4dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3x4dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 96;
+ CALL_ProgramUniformMatrix3x4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3x4dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3x4dv) + safe_mul(count, 96);
+ struct marshal_cmd_ProgramUniformMatrix3x4dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3x4dv");
+ if (unlikely(safe_mul(count, 96) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3x4dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 96);
+ variable_data += count * 96;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3x4dv");
+ CALL_ProgramUniformMatrix3x4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* DrawBuffers: marshalled asynchronously */
+struct marshal_cmd_DrawBuffers
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLenum bufs[n] */
+};
+static inline void
+_mesa_unmarshal_DrawBuffers(struct gl_context *ctx, const struct marshal_cmd_DrawBuffers *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLenum * bufs;
+ const char *variable_data = (const char *) (cmd + 1);
+ bufs = (const GLenum *) variable_data;
+ variable_data += n * 4;
+ CALL_DrawBuffers(ctx->CurrentServerDispatch, (n, bufs));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawBuffers(GLsizei n, const GLenum * bufs)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawBuffers) + safe_mul(n, 4);
+ struct marshal_cmd_DrawBuffers *cmd;
+ debug_print_marshal("DrawBuffers");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawBuffers, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, bufs, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawBuffers");
+ CALL_DrawBuffers(ctx->CurrentServerDispatch, (n, bufs));
+}
+
+
+/* VertexAttribL1ui64ARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttribL1ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint64EXT x;
+};
+static inline void
+_mesa_unmarshal_VertexAttribL1ui64ARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttribL1ui64ARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint64EXT x = cmd->x;
+ CALL_VertexAttribL1ui64ARB(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL1ui64ARB(GLuint index, GLuint64EXT x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribL1ui64ARB);
+ struct marshal_cmd_VertexAttribL1ui64ARB *cmd;
+ debug_print_marshal("VertexAttribL1ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribL1ui64ARB, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribL1ui64ARB");
+ CALL_VertexAttribL1ui64ARB(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* GetnPolygonStippleARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnPolygonStippleARB(GLsizei bufSize, GLubyte * pattern)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnPolygonStippleARB");
+ CALL_GetnPolygonStippleARB(ctx->CurrentServerDispatch, (bufSize, pattern));
+}
+
+
+/* Color3uiv: marshalled asynchronously */
+struct marshal_cmd_Color3uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint v[3];
+};
+static inline void
+_mesa_unmarshal_Color3uiv(struct gl_context *ctx, const struct marshal_cmd_Color3uiv *cmd)
+{
+ const GLuint * v = cmd->v;
+ CALL_Color3uiv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3uiv(const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3uiv);
+ struct marshal_cmd_Color3uiv *cmd;
+ debug_print_marshal("Color3uiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3uiv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3uiv");
+ CALL_Color3uiv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* EvalCoord2fv: marshalled asynchronously */
+struct marshal_cmd_EvalCoord2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat u[2];
+};
+static inline void
+_mesa_unmarshal_EvalCoord2fv(struct gl_context *ctx, const struct marshal_cmd_EvalCoord2fv *cmd)
+{
+ const GLfloat * u = cmd->u;
+ CALL_EvalCoord2fv(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord2fv(const GLfloat * u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord2fv);
+ struct marshal_cmd_EvalCoord2fv *cmd;
+ debug_print_marshal("EvalCoord2fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord2fv, cmd_size);
+ memcpy(cmd->u, u, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord2fv");
+ CALL_EvalCoord2fv(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* TextureStorage3DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorage3DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+};
+static inline void
+_mesa_unmarshal_TextureStorage3DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorage3DEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ CALL_TextureStorage3DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width, height, depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage3DEXT(GLuint texture, GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage3DEXT);
+ struct marshal_cmd_TextureStorage3DEXT *cmd;
+ debug_print_marshal("TextureStorage3DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage3DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage3DEXT");
+ CALL_TextureStorage3DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width, height, depth));
+}
+
+
+/* VertexAttrib2fARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2fARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2fARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_VertexAttrib2fARB(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2fARB(GLuint index, GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2fARB);
+ struct marshal_cmd_VertexAttrib2fARB *cmd;
+ debug_print_marshal("VertexAttrib2fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2fARB, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2fARB");
+ CALL_VertexAttrib2fARB(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* SpecializeShaderARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SpecializeShaderARB(GLuint shader, const GLchar * pEntryPoint, GLuint numSpecializationConstants, const GLuint * pConstantIndex, const GLuint * pConstantValue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SpecializeShaderARB");
+ CALL_SpecializeShaderARB(ctx->CurrentServerDispatch, (shader, pEntryPoint, numSpecializationConstants, pConstantIndex, pConstantValue));
+}
+
+
+/* BeginPerfMonitorAMD: marshalled asynchronously */
+struct marshal_cmd_BeginPerfMonitorAMD
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint monitor;
+};
+static inline void
+_mesa_unmarshal_BeginPerfMonitorAMD(struct gl_context *ctx, const struct marshal_cmd_BeginPerfMonitorAMD *cmd)
+{
+ const GLuint monitor = cmd->monitor;
+ CALL_BeginPerfMonitorAMD(ctx->CurrentServerDispatch, (monitor));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginPerfMonitorAMD(GLuint monitor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginPerfMonitorAMD);
+ struct marshal_cmd_BeginPerfMonitorAMD *cmd;
+ debug_print_marshal("BeginPerfMonitorAMD");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginPerfMonitorAMD, cmd_size);
+ cmd->monitor = monitor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginPerfMonitorAMD");
+ CALL_BeginPerfMonitorAMD(ctx->CurrentServerDispatch, (monitor));
+}
+
+
+/* WindowPos2fv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos2fv");
+ CALL_WindowPos2fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexImage3D(GLenum target, GLint level, GLint internalformat, GLsizei width, GLsizei height, GLsizei depth, GLint border, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexImage3D");
+ CALL_TexImage3D(ctx->CurrentServerDispatch, (target, level, internalformat, width, height, depth, border, format, type, pixels));
+}
+
+
+/* GetPerfQueryIdByNameINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfQueryIdByNameINTEL(GLchar * queryName, GLuint * queryId)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfQueryIdByNameINTEL");
+ CALL_GetPerfQueryIdByNameINTEL(ctx->CurrentServerDispatch, (queryName, queryId));
+}
+
+
+/* BindFragDataLocation: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindFragDataLocation(GLuint program, GLuint colorNumber, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindFragDataLocation");
+ CALL_BindFragDataLocation(ctx->CurrentServerDispatch, (program, colorNumber, name));
+}
+
+
+/* LightModeliv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_LightModeliv(GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("LightModeliv");
+ CALL_LightModeliv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* Normal3bv: marshalled asynchronously */
+struct marshal_cmd_Normal3bv
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte v[3];
+};
+static inline void
+_mesa_unmarshal_Normal3bv(struct gl_context *ctx, const struct marshal_cmd_Normal3bv *cmd)
+{
+ const GLbyte * v = cmd->v;
+ CALL_Normal3bv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3bv(const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3bv);
+ struct marshal_cmd_Normal3bv *cmd;
+ debug_print_marshal("Normal3bv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3bv, cmd_size);
+ memcpy(cmd->v, v, 3);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3bv");
+ CALL_Normal3bv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* BeginQueryIndexed: marshalled asynchronously */
+struct marshal_cmd_BeginQueryIndexed
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_BeginQueryIndexed(struct gl_context *ctx, const struct marshal_cmd_BeginQueryIndexed *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLuint id = cmd->id;
+ CALL_BeginQueryIndexed(ctx->CurrentServerDispatch, (target, index, id));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginQueryIndexed(GLenum target, GLuint index, GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginQueryIndexed);
+ struct marshal_cmd_BeginQueryIndexed *cmd;
+ debug_print_marshal("BeginQueryIndexed");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginQueryIndexed, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginQueryIndexed");
+ CALL_BeginQueryIndexed(ctx->CurrentServerDispatch, (target, index, id));
+}
+
+
+/* ClearNamedBufferData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedBufferData(GLuint buffer, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearNamedBufferData");
+ CALL_ClearNamedBufferData(ctx->CurrentServerDispatch, (buffer, internalformat, format, type, data));
+}
+
+
+/* Vertex3iv: marshalled asynchronously */
+struct marshal_cmd_Vertex3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_Vertex3iv(struct gl_context *ctx, const struct marshal_cmd_Vertex3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Vertex3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3iv);
+ struct marshal_cmd_Vertex3iv *cmd;
+ debug_print_marshal("Vertex3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3iv");
+ CALL_Vertex3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* UniformMatrix2x3dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2x3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLdouble value[count][6] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2x3dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2x3dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 48;
+ CALL_UniformMatrix2x3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2x3dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2x3dv) + safe_mul(count, 48);
+ struct marshal_cmd_UniformMatrix2x3dv *cmd;
+ debug_print_marshal("UniformMatrix2x3dv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2x3dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2x3dv");
+ CALL_UniformMatrix2x3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* UniformHandleui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_UniformHandleui64vARB(GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("UniformHandleui64vARB");
+ CALL_UniformHandleui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* TexCoord3dv: marshalled asynchronously */
+struct marshal_cmd_TexCoord3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_TexCoord3dv(struct gl_context *ctx, const struct marshal_cmd_TexCoord3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_TexCoord3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3dv);
+ struct marshal_cmd_TexCoord3dv *cmd;
+ debug_print_marshal("TexCoord3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3dv");
+ CALL_TexCoord3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetProgramStringARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramStringARB(GLenum target, GLenum pname, GLvoid * string)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramStringARB");
+ CALL_GetProgramStringARB(ctx->CurrentServerDispatch, (target, pname, string));
+}
+
+
+/* VertexP3ui: marshalled asynchronously */
+struct marshal_cmd_VertexP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexP3ui(struct gl_context *ctx, const struct marshal_cmd_VertexP3ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint value = cmd->value;
+ CALL_VertexP3ui(ctx->CurrentServerDispatch, (type, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexP3ui(GLenum type, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexP3ui);
+ struct marshal_cmd_VertexP3ui *cmd;
+ debug_print_marshal("VertexP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexP3ui, cmd_size);
+ cmd->type = type;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexP3ui");
+ CALL_VertexP3ui(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* CreateProgramObjectARB: marshalled synchronously */
+static GLhandleARB GLAPIENTRY
+_mesa_marshal_CreateProgramObjectARB(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateProgramObjectARB");
+ return CALL_CreateProgramObjectARB(ctx->CurrentServerDispatch, ());
+}
+
+
+/* UniformMatrix3fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 36) bytes are GLfloat value[count][9] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 36;
+ CALL_UniformMatrix3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3fv) + safe_mul(count, 36);
+ struct marshal_cmd_UniformMatrix3fv *cmd;
+ debug_print_marshal("UniformMatrix3fv");
+ if (unlikely(safe_mul(count, 36) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 36);
+ variable_data += count * 36;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3fv");
+ CALL_UniformMatrix3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* PrioritizeTextures: marshalled asynchronously */
+struct marshal_cmd_PrioritizeTextures
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint textures[n] */
+ /* Next safe_mul(n, 4) bytes are GLclampf priorities[n] */
+};
+static inline void
+_mesa_unmarshal_PrioritizeTextures(struct gl_context *ctx, const struct marshal_cmd_PrioritizeTextures *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * textures;
+ const GLclampf * priorities;
+ const char *variable_data = (const char *) (cmd + 1);
+ textures = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ priorities = (const GLclampf *) variable_data;
+ variable_data += n * 4;
+ CALL_PrioritizeTextures(ctx->CurrentServerDispatch, (n, textures, priorities));
+}
+static void GLAPIENTRY
+_mesa_marshal_PrioritizeTextures(GLsizei n, const GLuint * textures, const GLclampf * priorities)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PrioritizeTextures) + safe_mul(n, 4) + safe_mul(n, 4);
+ struct marshal_cmd_PrioritizeTextures *cmd;
+ debug_print_marshal("PrioritizeTextures");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PrioritizeTextures, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, textures, n * 4);
+ variable_data += n * 4;
+ memcpy(variable_data, priorities, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PrioritizeTextures");
+ CALL_PrioritizeTextures(ctx->CurrentServerDispatch, (n, textures, priorities));
+}
+
+
+/* VertexAttribI3uiEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI3uiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI3uiEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI3uiEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ CALL_VertexAttribI3uiEXT(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI3uiEXT(GLuint index, GLuint x, GLuint y, GLuint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI3uiEXT);
+ struct marshal_cmd_VertexAttribI3uiEXT *cmd;
+ debug_print_marshal("VertexAttribI3uiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI3uiEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI3uiEXT");
+ CALL_VertexAttribI3uiEXT(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* ProgramUniform1i64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint64 x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1i64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1i64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ CALL_ProgramUniform1i64ARB(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1i64ARB(GLuint program, GLint location, GLint64 x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1i64ARB);
+ struct marshal_cmd_ProgramUniform1i64ARB *cmd;
+ debug_print_marshal("ProgramUniform1i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1i64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1i64ARB");
+ CALL_ProgramUniform1i64ARB(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* GetMaterialxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMaterialxv(GLenum face, GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMaterialxv");
+ CALL_GetMaterialxv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* SecondaryColor3uiv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3uiv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3uiv *cmd)
+{
+ const GLuint * v = cmd->v;
+ CALL_SecondaryColor3uiv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3uiv(const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3uiv);
+ struct marshal_cmd_SecondaryColor3uiv *cmd;
+ debug_print_marshal("SecondaryColor3uiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3uiv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3uiv");
+ CALL_SecondaryColor3uiv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* EndConditionalRender: marshalled asynchronously */
+struct marshal_cmd_EndConditionalRender
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_EndConditionalRender(struct gl_context *ctx, const struct marshal_cmd_EndConditionalRender *cmd)
+{
+ CALL_EndConditionalRender(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_EndConditionalRender(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndConditionalRender);
+ struct marshal_cmd_EndConditionalRender *cmd;
+ debug_print_marshal("EndConditionalRender");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndConditionalRender, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndConditionalRender");
+ CALL_EndConditionalRender(ctx->CurrentServerDispatch, ());
+}
+
+
+/* ProgramLocalParameter4dARB: marshalled asynchronously */
+struct marshal_cmd_ProgramLocalParameter4dARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_ProgramLocalParameter4dARB(struct gl_context *ctx, const struct marshal_cmd_ProgramLocalParameter4dARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_ProgramLocalParameter4dARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramLocalParameter4dARB(GLenum target, GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramLocalParameter4dARB);
+ struct marshal_cmd_ProgramLocalParameter4dARB *cmd;
+ debug_print_marshal("ProgramLocalParameter4dARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramLocalParameter4dARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramLocalParameter4dARB");
+ CALL_ProgramLocalParameter4dARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+
+
+/* Color3sv: marshalled asynchronously */
+struct marshal_cmd_Color3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_Color3sv(struct gl_context *ctx, const struct marshal_cmd_Color3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Color3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3sv);
+ struct marshal_cmd_Color3sv *cmd;
+ debug_print_marshal("Color3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3sv");
+ CALL_Color3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GenFragmentShadersATI: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GenFragmentShadersATI(GLuint range)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenFragmentShadersATI");
+ return CALL_GenFragmentShadersATI(ctx->CurrentServerDispatch, (range));
+}
+
+
+/* GetNamedBufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedBufferParameteriv(GLuint buffer, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedBufferParameteriv");
+ CALL_GetNamedBufferParameteriv(ctx->CurrentServerDispatch, (buffer, pname, params));
+}
+
+
+/* BlendEquationSeparateiARB: marshalled asynchronously */
+struct marshal_cmd_BlendEquationSeparateiARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buf;
+ GLenum modeRGB;
+ GLenum modeA;
+};
+static inline void
+_mesa_unmarshal_BlendEquationSeparateiARB(struct gl_context *ctx, const struct marshal_cmd_BlendEquationSeparateiARB *cmd)
+{
+ const GLuint buf = cmd->buf;
+ const GLenum modeRGB = cmd->modeRGB;
+ const GLenum modeA = cmd->modeA;
+ CALL_BlendEquationSeparateiARB(ctx->CurrentServerDispatch, (buf, modeRGB, modeA));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendEquationSeparateiARB(GLuint buf, GLenum modeRGB, GLenum modeA)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendEquationSeparateiARB);
+ struct marshal_cmd_BlendEquationSeparateiARB *cmd;
+ debug_print_marshal("BlendEquationSeparateiARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendEquationSeparateiARB, cmd_size);
+ cmd->buf = buf;
+ cmd->modeRGB = modeRGB;
+ cmd->modeA = modeA;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendEquationSeparateiARB");
+ CALL_BlendEquationSeparateiARB(ctx->CurrentServerDispatch, (buf, modeRGB, modeA));
+}
+
+
+/* MultiTexCoord1fvARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat v[1];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1fvARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat * v = cmd->v;
+ CALL_MultiTexCoord1fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1fvARB(GLenum target, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1fvARB);
+ struct marshal_cmd_MultiTexCoord1fvARB *cmd;
+ debug_print_marshal("MultiTexCoord1fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1fvARB, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1fvARB");
+ CALL_MultiTexCoord1fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* TexStorage2D: marshalled asynchronously */
+struct marshal_cmd_TexStorage2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_TexStorage2D(struct gl_context *ctx, const struct marshal_cmd_TexStorage2D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_TexStorage2D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorage2D(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorage2D);
+ struct marshal_cmd_TexStorage2D *cmd;
+ debug_print_marshal("TexStorage2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorage2D, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorage2D");
+ CALL_TexStorage2D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height));
+}
+
+
+/* FramebufferTexture2D: marshalled asynchronously */
+struct marshal_cmd_FramebufferTexture2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLenum textarget;
+ GLuint texture;
+ GLint level;
+};
+static inline void
+_mesa_unmarshal_FramebufferTexture2D(struct gl_context *ctx, const struct marshal_cmd_FramebufferTexture2D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLenum textarget = cmd->textarget;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ CALL_FramebufferTexture2D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferTexture2D(GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferTexture2D);
+ struct marshal_cmd_FramebufferTexture2D *cmd;
+ debug_print_marshal("FramebufferTexture2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferTexture2D, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->textarget = textarget;
+ cmd->texture = texture;
+ cmd->level = level;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferTexture2D");
+ CALL_FramebufferTexture2D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level));
+}
+
+
+/* GetSamplerParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSamplerParameterfv(GLuint sampler, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSamplerParameterfv");
+ CALL_GetSamplerParameterfv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* VertexAttrib2dv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2dv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2dv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib2dv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2dv);
+ struct marshal_cmd_VertexAttrib2dv *cmd;
+ debug_print_marshal("VertexAttrib2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2dv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2dv");
+ CALL_VertexAttrib2dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Vertex4sv: marshalled asynchronously */
+struct marshal_cmd_Vertex4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_Vertex4sv(struct gl_context *ctx, const struct marshal_cmd_Vertex4sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Vertex4sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex4sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex4sv);
+ struct marshal_cmd_Vertex4sv *cmd;
+ debug_print_marshal("Vertex4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex4sv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex4sv");
+ CALL_Vertex4sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetQueryObjecti64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetQueryObjecti64v(GLuint id, GLenum pname, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetQueryObjecti64v");
+ CALL_GetQueryObjecti64v(ctx->CurrentServerDispatch, (id, pname, params));
+}
+
+
+/* ClampColor: marshalled asynchronously */
+struct marshal_cmd_ClampColor
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum clamp;
+};
+static inline void
+_mesa_unmarshal_ClampColor(struct gl_context *ctx, const struct marshal_cmd_ClampColor *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum clamp = cmd->clamp;
+ CALL_ClampColor(ctx->CurrentServerDispatch, (target, clamp));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClampColor(GLenum target, GLenum clamp)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClampColor);
+ struct marshal_cmd_ClampColor *cmd;
+ debug_print_marshal("ClampColor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClampColor, cmd_size);
+ cmd->target = target;
+ cmd->clamp = clamp;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClampColor");
+ CALL_ClampColor(ctx->CurrentServerDispatch, (target, clamp));
+}
+
+
+/* Uniform1i64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform1i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint64 x;
+};
+static inline void
+_mesa_unmarshal_Uniform1i64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform1i64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ CALL_Uniform1i64ARB(ctx->CurrentServerDispatch, (location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1i64ARB(GLint location, GLint64 x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1i64ARB);
+ struct marshal_cmd_Uniform1i64ARB *cmd;
+ debug_print_marshal("Uniform1i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1i64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1i64ARB");
+ CALL_Uniform1i64ARB(ctx->CurrentServerDispatch, (location, x));
+}
+
+
+/* DepthRangeArrayfvOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DepthRangeArrayfvOES(GLuint first, GLsizei count, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DepthRangeArrayfvOES");
+ CALL_DepthRangeArrayfvOES(ctx->CurrentServerDispatch, (first, count, v));
+}
+
+
+/* ConvolutionFilter1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionFilter1D(GLenum target, GLenum internalformat, GLsizei width, GLenum format, GLenum type, const GLvoid * image)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ConvolutionFilter1D");
+ CALL_ConvolutionFilter1D(ctx->CurrentServerDispatch, (target, internalformat, width, format, type, image));
+}
+
+
+/* DrawElementsIndirect: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DrawElementsIndirect(GLenum mode, GLenum type, const GLvoid * indirect)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DrawElementsIndirect");
+ CALL_DrawElementsIndirect(ctx->CurrentServerDispatch, (mode, type, indirect));
+}
+
+
+/* WindowPos3sv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos3sv");
+ CALL_WindowPos3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* CallLists: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CallLists(GLsizei n, GLenum type, const GLvoid * lists)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CallLists");
+ CALL_CallLists(ctx->CurrentServerDispatch, (n, type, lists));
+}
+
+
+/* AlphaFunc: marshalled asynchronously */
+struct marshal_cmd_AlphaFunc
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum func;
+ GLclampf ref;
+};
+static inline void
+_mesa_unmarshal_AlphaFunc(struct gl_context *ctx, const struct marshal_cmd_AlphaFunc *cmd)
+{
+ const GLenum func = cmd->func;
+ const GLclampf ref = cmd->ref;
+ CALL_AlphaFunc(ctx->CurrentServerDispatch, (func, ref));
+}
+static void GLAPIENTRY
+_mesa_marshal_AlphaFunc(GLenum func, GLclampf ref)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AlphaFunc);
+ struct marshal_cmd_AlphaFunc *cmd;
+ debug_print_marshal("AlphaFunc");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AlphaFunc, cmd_size);
+ cmd->func = func;
+ cmd->ref = ref;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AlphaFunc");
+ CALL_AlphaFunc(ctx->CurrentServerDispatch, (func, ref));
+}
+
+
+/* GetTextureParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureParameterfv(GLuint texture, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureParameterfv");
+ CALL_GetTextureParameterfv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* EdgeFlag: marshalled asynchronously */
+struct marshal_cmd_EdgeFlag
+{
+ struct marshal_cmd_base cmd_base;
+ GLboolean flag;
+};
+static inline void
+_mesa_unmarshal_EdgeFlag(struct gl_context *ctx, const struct marshal_cmd_EdgeFlag *cmd)
+{
+ const GLboolean flag = cmd->flag;
+ CALL_EdgeFlag(ctx->CurrentServerDispatch, (flag));
+}
+static void GLAPIENTRY
+_mesa_marshal_EdgeFlag(GLboolean flag)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EdgeFlag);
+ struct marshal_cmd_EdgeFlag *cmd;
+ debug_print_marshal("EdgeFlag");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EdgeFlag, cmd_size);
+ cmd->flag = flag;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EdgeFlag");
+ CALL_EdgeFlag(ctx->CurrentServerDispatch, (flag));
+}
+
+
+/* EdgeFlagv: marshalled asynchronously */
+struct marshal_cmd_EdgeFlagv
+{
+ struct marshal_cmd_base cmd_base;
+ GLboolean flag[1];
+};
+static inline void
+_mesa_unmarshal_EdgeFlagv(struct gl_context *ctx, const struct marshal_cmd_EdgeFlagv *cmd)
+{
+ const GLboolean * flag = cmd->flag;
+ CALL_EdgeFlagv(ctx->CurrentServerDispatch, (flag));
+}
+static void GLAPIENTRY
+_mesa_marshal_EdgeFlagv(const GLboolean * flag)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EdgeFlagv);
+ struct marshal_cmd_EdgeFlagv *cmd;
+ debug_print_marshal("EdgeFlagv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EdgeFlagv, cmd_size);
+ memcpy(cmd->flag, flag, 1);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EdgeFlagv");
+ CALL_EdgeFlagv(ctx->CurrentServerDispatch, (flag));
+}
+
+
+/* DepthRangex: marshalled asynchronously */
+struct marshal_cmd_DepthRangex
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampx zNear;
+ GLclampx zFar;
+};
+static inline void
+_mesa_unmarshal_DepthRangex(struct gl_context *ctx, const struct marshal_cmd_DepthRangex *cmd)
+{
+ const GLclampx zNear = cmd->zNear;
+ const GLclampx zFar = cmd->zFar;
+ CALL_DepthRangex(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRangex(GLclampx zNear, GLclampx zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRangex);
+ struct marshal_cmd_DepthRangex *cmd;
+ debug_print_marshal("DepthRangex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRangex, cmd_size);
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRangex");
+ CALL_DepthRangex(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+
+
+/* ProgramUniformHandleui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformHandleui64vARB(GLuint program, GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ProgramUniformHandleui64vARB");
+ CALL_ProgramUniformHandleui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* VDPAUInitNV: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VDPAUInitNV(const GLvoid * vdpDevice, const GLvoid * getProcAddress)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VDPAUInitNV");
+ CALL_VDPAUInitNV(ctx->CurrentServerDispatch, (vdpDevice, getProcAddress));
+}
+
+
+/* GetBufferParameteri64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBufferParameteri64v(GLenum target, GLenum pname, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBufferParameteri64v");
+ CALL_GetBufferParameteri64v(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* CreateProgram: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_CreateProgram(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateProgram");
+ return CALL_CreateProgram(ctx->CurrentServerDispatch, ());
+}
+
+
+/* DepthRangef: marshalled asynchronously */
+struct marshal_cmd_DepthRangef
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampf zNear;
+ GLclampf zFar;
+};
+static inline void
+_mesa_unmarshal_DepthRangef(struct gl_context *ctx, const struct marshal_cmd_DepthRangef *cmd)
+{
+ const GLclampf zNear = cmd->zNear;
+ const GLclampf zFar = cmd->zFar;
+ CALL_DepthRangef(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRangef(GLclampf zNear, GLclampf zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRangef);
+ struct marshal_cmd_DepthRangef *cmd;
+ debug_print_marshal("DepthRangef");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRangef, cmd_size);
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRangef");
+ CALL_DepthRangef(ctx->CurrentServerDispatch, (zNear, zFar));
+}
+
+
+/* TextureParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureParameteriv(GLuint texture, GLenum pname, const GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureParameteriv");
+ CALL_TextureParameteriv(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+
+
+/* ColorFragmentOp3ATI: marshalled asynchronously */
+struct marshal_cmd_ColorFragmentOp3ATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLuint dst;
+ GLuint dstMask;
+ GLuint dstMod;
+ GLuint arg1;
+ GLuint arg1Rep;
+ GLuint arg1Mod;
+ GLuint arg2;
+ GLuint arg2Rep;
+ GLuint arg2Mod;
+ GLuint arg3;
+ GLuint arg3Rep;
+ GLuint arg3Mod;
+};
+static inline void
+_mesa_unmarshal_ColorFragmentOp3ATI(struct gl_context *ctx, const struct marshal_cmd_ColorFragmentOp3ATI *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLuint dst = cmd->dst;
+ const GLuint dstMask = cmd->dstMask;
+ const GLuint dstMod = cmd->dstMod;
+ const GLuint arg1 = cmd->arg1;
+ const GLuint arg1Rep = cmd->arg1Rep;
+ const GLuint arg1Mod = cmd->arg1Mod;
+ const GLuint arg2 = cmd->arg2;
+ const GLuint arg2Rep = cmd->arg2Rep;
+ const GLuint arg2Mod = cmd->arg2Mod;
+ const GLuint arg3 = cmd->arg3;
+ const GLuint arg3Rep = cmd->arg3Rep;
+ const GLuint arg3Mod = cmd->arg3Mod;
+ CALL_ColorFragmentOp3ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorFragmentOp3ATI(GLenum op, GLuint dst, GLuint dstMask, GLuint dstMod, GLuint arg1, GLuint arg1Rep, GLuint arg1Mod, GLuint arg2, GLuint arg2Rep, GLuint arg2Mod, GLuint arg3, GLuint arg3Rep, GLuint arg3Mod)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorFragmentOp3ATI);
+ struct marshal_cmd_ColorFragmentOp3ATI *cmd;
+ debug_print_marshal("ColorFragmentOp3ATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorFragmentOp3ATI, cmd_size);
+ cmd->op = op;
+ cmd->dst = dst;
+ cmd->dstMask = dstMask;
+ cmd->dstMod = dstMod;
+ cmd->arg1 = arg1;
+ cmd->arg1Rep = arg1Rep;
+ cmd->arg1Mod = arg1Mod;
+ cmd->arg2 = arg2;
+ cmd->arg2Rep = arg2Rep;
+ cmd->arg2Mod = arg2Mod;
+ cmd->arg3 = arg3;
+ cmd->arg3Rep = arg3Rep;
+ cmd->arg3Mod = arg3Mod;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorFragmentOp3ATI");
+ CALL_ColorFragmentOp3ATI(ctx->CurrentServerDispatch, (op, dst, dstMask, dstMod, arg1, arg1Rep, arg1Mod, arg2, arg2Rep, arg2Mod, arg3, arg3Rep, arg3Mod));
+}
+
+
+/* ValidateProgram: marshalled asynchronously */
+struct marshal_cmd_ValidateProgram
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_ValidateProgram(struct gl_context *ctx, const struct marshal_cmd_ValidateProgram *cmd)
+{
+ const GLuint program = cmd->program;
+ CALL_ValidateProgram(ctx->CurrentServerDispatch, (program));
+}
+static void GLAPIENTRY
+_mesa_marshal_ValidateProgram(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ValidateProgram);
+ struct marshal_cmd_ValidateProgram *cmd;
+ debug_print_marshal("ValidateProgram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ValidateProgram, cmd_size);
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ValidateProgram");
+ CALL_ValidateProgram(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* VertexPointerEXT: marshalled asynchronously */
+struct marshal_cmd_VertexPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ GLsizei count;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_VertexPointerEXT(struct gl_context *ctx, const struct marshal_cmd_VertexPointerEXT *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_VertexPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexPointerEXT(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexPointerEXT);
+ struct marshal_cmd_VertexPointerEXT *cmd;
+ debug_print_marshal("VertexPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("VertexPointerEXT");
+ CALL_VertexPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexPointerEXT, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexPointerEXT");
+ CALL_VertexPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+
+
+/* VertexAttribI4sv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4sv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4sv");
+ CALL_VertexAttribI4sv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Scissor: marshalled asynchronously */
+struct marshal_cmd_Scissor
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_Scissor(struct gl_context *ctx, const struct marshal_cmd_Scissor *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_Scissor(ctx->CurrentServerDispatch, (x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_Scissor(GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Scissor);
+ struct marshal_cmd_Scissor *cmd;
+ debug_print_marshal("Scissor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Scissor, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Scissor");
+ CALL_Scissor(ctx->CurrentServerDispatch, (x, y, width, height));
+}
+
+
+/* BeginTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_BeginTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_BeginTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_BeginTransformFeedback *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_BeginTransformFeedback(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginTransformFeedback(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginTransformFeedback);
+ struct marshal_cmd_BeginTransformFeedback *cmd;
+ debug_print_marshal("BeginTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginTransformFeedback, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginTransformFeedback");
+ CALL_BeginTransformFeedback(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* TexCoord2i: marshalled asynchronously */
+struct marshal_cmd_TexCoord2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint s;
+ GLint t;
+};
+static inline void
+_mesa_unmarshal_TexCoord2i(struct gl_context *ctx, const struct marshal_cmd_TexCoord2i *cmd)
+{
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ CALL_TexCoord2i(ctx->CurrentServerDispatch, (s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2i(GLint s, GLint t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2i);
+ struct marshal_cmd_TexCoord2i *cmd;
+ debug_print_marshal("TexCoord2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2i, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2i");
+ CALL_TexCoord2i(ctx->CurrentServerDispatch, (s, t));
+}
+
+
+/* VertexArrayAttribBinding: marshalled asynchronously */
+struct marshal_cmd_VertexArrayAttribBinding
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint attribindex;
+ GLuint bindingindex;
+};
+static inline void
+_mesa_unmarshal_VertexArrayAttribBinding(struct gl_context *ctx, const struct marshal_cmd_VertexArrayAttribBinding *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint attribindex = cmd->attribindex;
+ const GLuint bindingindex = cmd->bindingindex;
+ CALL_VertexArrayAttribBinding(ctx->CurrentServerDispatch, (vaobj, attribindex, bindingindex));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayAttribBinding(GLuint vaobj, GLuint attribindex, GLuint bindingindex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayAttribBinding);
+ struct marshal_cmd_VertexArrayAttribBinding *cmd;
+ debug_print_marshal("VertexArrayAttribBinding");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayAttribBinding, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->attribindex = attribindex;
+ cmd->bindingindex = bindingindex;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayAttribBinding");
+ CALL_VertexArrayAttribBinding(ctx->CurrentServerDispatch, (vaobj, attribindex, bindingindex));
+}
+
+
+/* Color4ui: marshalled asynchronously */
+struct marshal_cmd_Color4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint red;
+ GLuint green;
+ GLuint blue;
+ GLuint alpha;
+};
+static inline void
+_mesa_unmarshal_Color4ui(struct gl_context *ctx, const struct marshal_cmd_Color4ui *cmd)
+{
+ const GLuint red = cmd->red;
+ const GLuint green = cmd->green;
+ const GLuint blue = cmd->blue;
+ const GLuint alpha = cmd->alpha;
+ CALL_Color4ui(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4ui(GLuint red, GLuint green, GLuint blue, GLuint alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4ui);
+ struct marshal_cmd_Color4ui *cmd;
+ debug_print_marshal("Color4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4ui, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4ui");
+ CALL_Color4ui(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* TexCoord2f: marshalled asynchronously */
+struct marshal_cmd_TexCoord2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat s;
+ GLfloat t;
+};
+static inline void
+_mesa_unmarshal_TexCoord2f(struct gl_context *ctx, const struct marshal_cmd_TexCoord2f *cmd)
+{
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ CALL_TexCoord2f(ctx->CurrentServerDispatch, (s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2f(GLfloat s, GLfloat t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2f);
+ struct marshal_cmd_TexCoord2f *cmd;
+ debug_print_marshal("TexCoord2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2f, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2f");
+ CALL_TexCoord2f(ctx->CurrentServerDispatch, (s, t));
+}
+
+
+/* TexCoord2d: marshalled asynchronously */
+struct marshal_cmd_TexCoord2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble s;
+ GLdouble t;
+};
+static inline void
+_mesa_unmarshal_TexCoord2d(struct gl_context *ctx, const struct marshal_cmd_TexCoord2d *cmd)
+{
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ CALL_TexCoord2d(ctx->CurrentServerDispatch, (s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2d(GLdouble s, GLdouble t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2d);
+ struct marshal_cmd_TexCoord2d *cmd;
+ debug_print_marshal("TexCoord2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2d, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2d");
+ CALL_TexCoord2d(ctx->CurrentServerDispatch, (s, t));
+}
+
+
+/* GetTransformFeedbackiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTransformFeedbackiv(GLuint xfb, GLenum pname, GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTransformFeedbackiv");
+ CALL_GetTransformFeedbackiv(ctx->CurrentServerDispatch, (xfb, pname, param));
+}
+
+
+/* TexCoord2s: marshalled asynchronously */
+struct marshal_cmd_TexCoord2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort s;
+ GLshort t;
+};
+static inline void
+_mesa_unmarshal_TexCoord2s(struct gl_context *ctx, const struct marshal_cmd_TexCoord2s *cmd)
+{
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ CALL_TexCoord2s(ctx->CurrentServerDispatch, (s, t));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2s(GLshort s, GLshort t)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2s);
+ struct marshal_cmd_TexCoord2s *cmd;
+ debug_print_marshal("TexCoord2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2s, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2s");
+ CALL_TexCoord2s(ctx->CurrentServerDispatch, (s, t));
+}
+
+
+/* PointSizePointerOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PointSizePointerOES(GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PointSizePointerOES");
+ CALL_PointSizePointerOES(ctx->CurrentServerDispatch, (type, stride, pointer));
+}
+
+
+/* Color4us: marshalled asynchronously */
+struct marshal_cmd_Color4us
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort red;
+ GLushort green;
+ GLushort blue;
+ GLushort alpha;
+};
+static inline void
+_mesa_unmarshal_Color4us(struct gl_context *ctx, const struct marshal_cmd_Color4us *cmd)
+{
+ const GLushort red = cmd->red;
+ const GLushort green = cmd->green;
+ const GLushort blue = cmd->blue;
+ const GLushort alpha = cmd->alpha;
+ CALL_Color4us(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4us(GLushort red, GLushort green, GLushort blue, GLushort alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4us);
+ struct marshal_cmd_Color4us *cmd;
+ debug_print_marshal("Color4us");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4us, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4us");
+ CALL_Color4us(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* Color3bv: marshalled asynchronously */
+struct marshal_cmd_Color3bv
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte v[3];
+};
+static inline void
+_mesa_unmarshal_Color3bv(struct gl_context *ctx, const struct marshal_cmd_Color3bv *cmd)
+{
+ const GLbyte * v = cmd->v;
+ CALL_Color3bv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3bv(const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3bv);
+ struct marshal_cmd_Color3bv *cmd;
+ debug_print_marshal("Color3bv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3bv, cmd_size);
+ memcpy(cmd->v, v, 3);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3bv");
+ CALL_Color3bv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* PrimitiveRestartNV: marshalled asynchronously */
+struct marshal_cmd_PrimitiveRestartNV
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PrimitiveRestartNV(struct gl_context *ctx, const struct marshal_cmd_PrimitiveRestartNV *cmd)
+{
+ CALL_PrimitiveRestartNV(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PrimitiveRestartNV(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PrimitiveRestartNV);
+ struct marshal_cmd_PrimitiveRestartNV *cmd;
+ debug_print_marshal("PrimitiveRestartNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PrimitiveRestartNV, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PrimitiveRestartNV");
+ CALL_PrimitiveRestartNV(ctx->CurrentServerDispatch, ());
+}
+
+
+/* BindBufferOffsetEXT: marshalled asynchronously */
+struct marshal_cmd_BindBufferOffsetEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLuint buffer;
+ GLintptr offset;
+};
+static inline void
+_mesa_unmarshal_BindBufferOffsetEXT(struct gl_context *ctx, const struct marshal_cmd_BindBufferOffsetEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ CALL_BindBufferOffsetEXT(ctx->CurrentServerDispatch, (target, index, buffer, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindBufferOffsetEXT(GLenum target, GLuint index, GLuint buffer, GLintptr offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindBufferOffsetEXT);
+ struct marshal_cmd_BindBufferOffsetEXT *cmd;
+ debug_print_marshal("BindBufferOffsetEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindBufferOffsetEXT, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindBufferOffsetEXT");
+ CALL_BindBufferOffsetEXT(ctx->CurrentServerDispatch, (target, index, buffer, offset));
+}
+
+
+/* ProvokingVertex: marshalled asynchronously */
+struct marshal_cmd_ProvokingVertex
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_ProvokingVertex(struct gl_context *ctx, const struct marshal_cmd_ProvokingVertex *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_ProvokingVertex(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProvokingVertex(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProvokingVertex);
+ struct marshal_cmd_ProvokingVertex *cmd;
+ debug_print_marshal("ProvokingVertex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProvokingVertex, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProvokingVertex");
+ CALL_ProvokingVertex(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* VertexAttribs4fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs4fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 16) bytes are GLfloat v[n][4] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs4fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs4fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLfloat * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLfloat *) variable_data;
+ variable_data += n * 16;
+ CALL_VertexAttribs4fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs4fvNV(GLuint index, GLsizei n, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs4fvNV) + safe_mul(n, 16);
+ struct marshal_cmd_VertexAttribs4fvNV *cmd;
+ debug_print_marshal("VertexAttribs4fvNV");
+ if (unlikely(safe_mul(n, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs4fvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 16);
+ variable_data += n * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs4fvNV");
+ CALL_VertexAttribs4fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* Vertex2i: marshalled asynchronously */
+struct marshal_cmd_Vertex2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+};
+static inline void
+_mesa_unmarshal_Vertex2i(struct gl_context *ctx, const struct marshal_cmd_Vertex2i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ CALL_Vertex2i(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2i(GLint x, GLint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2i);
+ struct marshal_cmd_Vertex2i *cmd;
+ debug_print_marshal("Vertex2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2i");
+ CALL_Vertex2i(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* GetQueryBufferObjecti64v: marshalled asynchronously */
+struct marshal_cmd_GetQueryBufferObjecti64v
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+ GLuint buffer;
+ GLenum pname;
+ GLintptr offset;
+};
+static inline void
+_mesa_unmarshal_GetQueryBufferObjecti64v(struct gl_context *ctx, const struct marshal_cmd_GetQueryBufferObjecti64v *cmd)
+{
+ const GLuint id = cmd->id;
+ const GLuint buffer = cmd->buffer;
+ const GLenum pname = cmd->pname;
+ const GLintptr offset = cmd->offset;
+ CALL_GetQueryBufferObjecti64v(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_GetQueryBufferObjecti64v(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GetQueryBufferObjecti64v);
+ struct marshal_cmd_GetQueryBufferObjecti64v *cmd;
+ debug_print_marshal("GetQueryBufferObjecti64v");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GetQueryBufferObjecti64v, cmd_size);
+ cmd->id = id;
+ cmd->buffer = buffer;
+ cmd->pname = pname;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GetQueryBufferObjecti64v");
+ CALL_GetQueryBufferObjecti64v(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+
+
+/* InterleavedArrays: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_InterleavedArrays(GLenum format, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("InterleavedArrays");
+ CALL_InterleavedArrays(ctx->CurrentServerDispatch, (format, stride, pointer));
+}
+
+
+/* RasterPos2fv: marshalled asynchronously */
+struct marshal_cmd_RasterPos2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_RasterPos2fv(struct gl_context *ctx, const struct marshal_cmd_RasterPos2fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_RasterPos2fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2fv);
+ struct marshal_cmd_RasterPos2fv *cmd;
+ debug_print_marshal("RasterPos2fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2fv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2fv");
+ CALL_RasterPos2fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoord1fv: marshalled asynchronously */
+struct marshal_cmd_TexCoord1fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[1];
+};
+static inline void
+_mesa_unmarshal_TexCoord1fv(struct gl_context *ctx, const struct marshal_cmd_TexCoord1fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_TexCoord1fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1fv);
+ struct marshal_cmd_TexCoord1fv *cmd;
+ debug_print_marshal("TexCoord1fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1fv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1fv");
+ CALL_TexCoord1fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* MultiTexCoord4dv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4dv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4dv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble * v = cmd->v;
+ CALL_MultiTexCoord4dv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4dv(GLenum target, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4dv);
+ struct marshal_cmd_MultiTexCoord4dv *cmd;
+ debug_print_marshal("MultiTexCoord4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4dv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4dv");
+ CALL_MultiTexCoord4dv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* ProgramEnvParameter4fvARB: marshalled asynchronously */
+struct marshal_cmd_ProgramEnvParameter4fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLfloat params[4];
+};
+static inline void
+_mesa_unmarshal_ProgramEnvParameter4fvARB(struct gl_context *ctx, const struct marshal_cmd_ProgramEnvParameter4fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLfloat * params = cmd->params;
+ CALL_ProgramEnvParameter4fvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramEnvParameter4fvARB(GLenum target, GLuint index, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramEnvParameter4fvARB);
+ struct marshal_cmd_ProgramEnvParameter4fvARB *cmd;
+ debug_print_marshal("ProgramEnvParameter4fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramEnvParameter4fvARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ memcpy(cmd->params, params, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramEnvParameter4fvARB");
+ CALL_ProgramEnvParameter4fvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* RasterPos4fv: marshalled asynchronously */
+struct marshal_cmd_RasterPos4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_RasterPos4fv(struct gl_context *ctx, const struct marshal_cmd_RasterPos4fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_RasterPos4fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4fv);
+ struct marshal_cmd_RasterPos4fv *cmd;
+ debug_print_marshal("RasterPos4fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4fv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4fv");
+ CALL_RasterPos4fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* PushMatrix: marshalled asynchronously */
+struct marshal_cmd_PushMatrix
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PushMatrix(struct gl_context *ctx, const struct marshal_cmd_PushMatrix *cmd)
+{
+ CALL_PushMatrix(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PushMatrix(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PushMatrix);
+ struct marshal_cmd_PushMatrix *cmd;
+ debug_print_marshal("PushMatrix");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PushMatrix, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PushMatrix");
+ CALL_PushMatrix(ctx->CurrentServerDispatch, ());
+}
+
+
+/* EndList: marshalled asynchronously */
+struct marshal_cmd_EndList
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_EndList(struct gl_context *ctx, const struct marshal_cmd_EndList *cmd)
+{
+ CALL_EndList(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_EndList(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndList);
+ struct marshal_cmd_EndList *cmd;
+ debug_print_marshal("EndList");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndList, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndList");
+ CALL_EndList(ctx->CurrentServerDispatch, ());
+}
+
+
+/* DrawRangeElements: marshalled asynchronously */
+struct marshal_cmd_DrawRangeElements
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint start;
+ GLuint end;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+};
+static inline void
+_mesa_unmarshal_DrawRangeElements(struct gl_context *ctx, const struct marshal_cmd_DrawRangeElements *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint start = cmd->start;
+ const GLuint end = cmd->end;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ CALL_DrawRangeElements(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawRangeElements(GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const GLvoid * indices)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawRangeElements);
+ struct marshal_cmd_DrawRangeElements *cmd;
+ debug_print_marshal("DrawRangeElements");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawRangeElements");
+ CALL_DrawRangeElements(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawRangeElements, cmd_size);
+ cmd->mode = mode;
+ cmd->start = start;
+ cmd->end = end;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawRangeElements");
+ CALL_DrawRangeElements(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices));
+}
+
+
+/* GetTexGenxvOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexGenxvOES(GLenum coord, GLenum pname, GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexGenxvOES");
+ CALL_GetTexGenxvOES(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* GetHandleARB: marshalled synchronously */
+static GLhandleARB GLAPIENTRY
+_mesa_marshal_GetHandleARB(GLenum pname)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetHandleARB");
+ return CALL_GetHandleARB(ctx->CurrentServerDispatch, (pname));
+}
+
+
+/* DrawTexfvOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexfvOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat coords[5];
+};
+static inline void
+_mesa_unmarshal_DrawTexfvOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexfvOES *cmd)
+{
+ const GLfloat * coords = cmd->coords;
+ CALL_DrawTexfvOES(ctx->CurrentServerDispatch, (coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexfvOES(const GLfloat * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexfvOES);
+ struct marshal_cmd_DrawTexfvOES *cmd;
+ debug_print_marshal("DrawTexfvOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexfvOES, cmd_size);
+ memcpy(cmd->coords, coords, 20);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexfvOES");
+ CALL_DrawTexfvOES(ctx->CurrentServerDispatch, (coords));
+}
+
+
+/* BlendFunciARB: marshalled asynchronously */
+struct marshal_cmd_BlendFunciARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buf;
+ GLenum src;
+ GLenum dst;
+};
+static inline void
+_mesa_unmarshal_BlendFunciARB(struct gl_context *ctx, const struct marshal_cmd_BlendFunciARB *cmd)
+{
+ const GLuint buf = cmd->buf;
+ const GLenum src = cmd->src;
+ const GLenum dst = cmd->dst;
+ CALL_BlendFunciARB(ctx->CurrentServerDispatch, (buf, src, dst));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendFunciARB(GLuint buf, GLenum src, GLenum dst)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendFunciARB);
+ struct marshal_cmd_BlendFunciARB *cmd;
+ debug_print_marshal("BlendFunciARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendFunciARB, cmd_size);
+ cmd->buf = buf;
+ cmd->src = src;
+ cmd->dst = dst;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendFunciARB");
+ CALL_BlendFunciARB(ctx->CurrentServerDispatch, (buf, src, dst));
+}
+
+
+/* ClearNamedFramebufferfi: marshalled asynchronously */
+struct marshal_cmd_ClearNamedFramebufferfi
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum buffer;
+ GLint drawbuffer;
+ GLfloat depth;
+ GLint stencil;
+};
+static inline void
+_mesa_unmarshal_ClearNamedFramebufferfi(struct gl_context *ctx, const struct marshal_cmd_ClearNamedFramebufferfi *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum buffer = cmd->buffer;
+ const GLint drawbuffer = cmd->drawbuffer;
+ const GLfloat depth = cmd->depth;
+ const GLint stencil = cmd->stencil;
+ CALL_ClearNamedFramebufferfi(ctx->CurrentServerDispatch, (framebuffer, buffer, drawbuffer, depth, stencil));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedFramebufferfi(GLuint framebuffer, GLenum buffer, GLint drawbuffer, GLfloat depth, GLint stencil)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearNamedFramebufferfi);
+ struct marshal_cmd_ClearNamedFramebufferfi *cmd;
+ debug_print_marshal("ClearNamedFramebufferfi");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearNamedFramebufferfi, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->buffer = buffer;
+ cmd->drawbuffer = drawbuffer;
+ cmd->depth = depth;
+ cmd->stencil = stencil;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearNamedFramebufferfi");
+ CALL_ClearNamedFramebufferfi(ctx->CurrentServerDispatch, (framebuffer, buffer, drawbuffer, depth, stencil));
+}
+
+
+/* ClearNamedFramebufferfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedFramebufferfv(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearNamedFramebufferfv");
+ CALL_ClearNamedFramebufferfv(ctx->CurrentServerDispatch, (framebuffer, buffer, drawbuffer, value));
+}
+
+
+/* Uniform2ui: marshalled asynchronously */
+struct marshal_cmd_Uniform2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint x;
+ GLuint y;
+};
+static inline void
+_mesa_unmarshal_Uniform2ui(struct gl_context *ctx, const struct marshal_cmd_Uniform2ui *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ CALL_Uniform2ui(ctx->CurrentServerDispatch, (location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2ui(GLint location, GLuint x, GLuint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2ui);
+ struct marshal_cmd_Uniform2ui *cmd;
+ debug_print_marshal("Uniform2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2ui, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2ui");
+ CALL_Uniform2ui(ctx->CurrentServerDispatch, (location, x, y));
+}
+
+
+/* ScissorIndexed: marshalled asynchronously */
+struct marshal_cmd_ScissorIndexed
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint left;
+ GLint bottom;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_ScissorIndexed(struct gl_context *ctx, const struct marshal_cmd_ScissorIndexed *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint left = cmd->left;
+ const GLint bottom = cmd->bottom;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_ScissorIndexed(ctx->CurrentServerDispatch, (index, left, bottom, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_ScissorIndexed(GLuint index, GLint left, GLint bottom, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ScissorIndexed);
+ struct marshal_cmd_ScissorIndexed *cmd;
+ debug_print_marshal("ScissorIndexed");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ScissorIndexed, cmd_size);
+ cmd->index = index;
+ cmd->left = left;
+ cmd->bottom = bottom;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ScissorIndexed");
+ CALL_ScissorIndexed(ctx->CurrentServerDispatch, (index, left, bottom, width, height));
+}
+
+
+/* End: marshalled asynchronously */
+struct marshal_cmd_End
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_End(struct gl_context *ctx, const struct marshal_cmd_End *cmd)
+{
+ CALL_End(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_End(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_End);
+ struct marshal_cmd_End *cmd;
+ debug_print_marshal("End");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_End, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("End");
+ CALL_End(ctx->CurrentServerDispatch, ());
+}
+
+
+/* NamedFramebufferParameteri: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferParameteri(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferParameteri *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_NamedFramebufferParameteri(ctx->CurrentServerDispatch, (framebuffer, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferParameteri(GLuint framebuffer, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferParameteri);
+ struct marshal_cmd_NamedFramebufferParameteri *cmd;
+ debug_print_marshal("NamedFramebufferParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferParameteri, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferParameteri");
+ CALL_NamedFramebufferParameteri(ctx->CurrentServerDispatch, (framebuffer, pname, param));
+}
+
+
+/* BindVertexBuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindVertexBuffers(GLuint first, GLsizei count, const GLuint * buffers, const GLintptr * offsets, const GLsizei * strides)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindVertexBuffers");
+ CALL_BindVertexBuffers(ctx->CurrentServerDispatch, (first, count, buffers, offsets, strides));
+}
+
+
+/* GetSamplerParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSamplerParameteriv(GLuint sampler, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSamplerParameteriv");
+ CALL_GetSamplerParameteriv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* GenProgramPipelines: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenProgramPipelines(GLsizei n, GLuint * pipelines)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenProgramPipelines");
+ CALL_GenProgramPipelines(ctx->CurrentServerDispatch, (n, pipelines));
+}
+
+
+/* IsProgramPipeline: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsProgramPipeline(GLuint pipeline)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsProgramPipeline");
+ return CALL_IsProgramPipeline(ctx->CurrentServerDispatch, (pipeline));
+}
+
+
+/* ShaderBinary: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ShaderBinary(GLsizei n, const GLuint * shaders, GLenum binaryformat, const GLvoid * binary, GLsizei length)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ShaderBinary");
+ CALL_ShaderBinary(ctx->CurrentServerDispatch, (n, shaders, binaryformat, binary, length));
+}
+
+
+/* TextureSubImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureSubImage1D(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureSubImage1D");
+ CALL_TextureSubImage1D(ctx->CurrentServerDispatch, (texture, level, xoffset, width, format, type, pixels));
+}
+
+
+/* Normal3x: marshalled asynchronously */
+struct marshal_cmd_Normal3x
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed nx;
+ GLfixed ny;
+ GLfixed nz;
+};
+static inline void
+_mesa_unmarshal_Normal3x(struct gl_context *ctx, const struct marshal_cmd_Normal3x *cmd)
+{
+ const GLfixed nx = cmd->nx;
+ const GLfixed ny = cmd->ny;
+ const GLfixed nz = cmd->nz;
+ CALL_Normal3x(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3x(GLfixed nx, GLfixed ny, GLfixed nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3x);
+ struct marshal_cmd_Normal3x *cmd;
+ debug_print_marshal("Normal3x");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3x, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3x");
+ CALL_Normal3x(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* VertexAttrib4fARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4fARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4fARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_VertexAttrib4fARB(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4fARB(GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4fARB);
+ struct marshal_cmd_VertexAttrib4fARB *cmd;
+ debug_print_marshal("VertexAttrib4fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4fARB, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4fARB");
+ CALL_VertexAttrib4fARB(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* TexCoord4fv: marshalled asynchronously */
+struct marshal_cmd_TexCoord4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_TexCoord4fv(struct gl_context *ctx, const struct marshal_cmd_TexCoord4fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_TexCoord4fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4fv);
+ struct marshal_cmd_TexCoord4fv *cmd;
+ debug_print_marshal("TexCoord4fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4fv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4fv");
+ CALL_TexCoord4fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ReadnPixelsARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ReadnPixelsARB(GLint x, GLint y, GLsizei width, GLsizei height, GLenum format, GLenum type, GLsizei bufSize, GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ReadnPixelsARB");
+ CALL_ReadnPixelsARB(ctx->CurrentServerDispatch, (x, y, width, height, format, type, bufSize, data));
+}
+
+
+/* InvalidateTexSubImage: marshalled asynchronously */
+struct marshal_cmd_InvalidateTexSubImage
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLint level;
+ GLint xoffset;
+ GLint yoffset;
+ GLint zoffset;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+};
+static inline void
+_mesa_unmarshal_InvalidateTexSubImage(struct gl_context *ctx, const struct marshal_cmd_InvalidateTexSubImage *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint yoffset = cmd->yoffset;
+ const GLint zoffset = cmd->zoffset;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ CALL_InvalidateTexSubImage(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateTexSubImage(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateTexSubImage);
+ struct marshal_cmd_InvalidateTexSubImage *cmd;
+ debug_print_marshal("InvalidateTexSubImage");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateTexSubImage, cmd_size);
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->yoffset = yoffset;
+ cmd->zoffset = zoffset;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateTexSubImage");
+ CALL_InvalidateTexSubImage(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth));
+}
+
+
+/* Normal3s: marshalled asynchronously */
+struct marshal_cmd_Normal3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort nx;
+ GLshort ny;
+ GLshort nz;
+};
+static inline void
+_mesa_unmarshal_Normal3s(struct gl_context *ctx, const struct marshal_cmd_Normal3s *cmd)
+{
+ const GLshort nx = cmd->nx;
+ const GLshort ny = cmd->ny;
+ const GLshort nz = cmd->nz;
+ CALL_Normal3s(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3s(GLshort nx, GLshort ny, GLshort nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3s);
+ struct marshal_cmd_Normal3s *cmd;
+ debug_print_marshal("Normal3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3s, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3s");
+ CALL_Normal3s(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* Materialxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Materialxv(GLenum face, GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Materialxv");
+ CALL_Materialxv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* Normal3i: marshalled asynchronously */
+struct marshal_cmd_Normal3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint nx;
+ GLint ny;
+ GLint nz;
+};
+static inline void
+_mesa_unmarshal_Normal3i(struct gl_context *ctx, const struct marshal_cmd_Normal3i *cmd)
+{
+ const GLint nx = cmd->nx;
+ const GLint ny = cmd->ny;
+ const GLint nz = cmd->nz;
+ CALL_Normal3i(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3i(GLint nx, GLint ny, GLint nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3i);
+ struct marshal_cmd_Normal3i *cmd;
+ debug_print_marshal("Normal3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3i, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3i");
+ CALL_Normal3i(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* Normal3b: marshalled asynchronously */
+struct marshal_cmd_Normal3b
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte nx;
+ GLbyte ny;
+ GLbyte nz;
+};
+static inline void
+_mesa_unmarshal_Normal3b(struct gl_context *ctx, const struct marshal_cmd_Normal3b *cmd)
+{
+ const GLbyte nx = cmd->nx;
+ const GLbyte ny = cmd->ny;
+ const GLbyte nz = cmd->nz;
+ CALL_Normal3b(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3b(GLbyte nx, GLbyte ny, GLbyte nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3b);
+ struct marshal_cmd_Normal3b *cmd;
+ debug_print_marshal("Normal3b");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3b, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3b");
+ CALL_Normal3b(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* Normal3d: marshalled asynchronously */
+struct marshal_cmd_Normal3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble nx;
+ GLdouble ny;
+ GLdouble nz;
+};
+static inline void
+_mesa_unmarshal_Normal3d(struct gl_context *ctx, const struct marshal_cmd_Normal3d *cmd)
+{
+ const GLdouble nx = cmd->nx;
+ const GLdouble ny = cmd->ny;
+ const GLdouble nz = cmd->nz;
+ CALL_Normal3d(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3d(GLdouble nx, GLdouble ny, GLdouble nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3d);
+ struct marshal_cmd_Normal3d *cmd;
+ debug_print_marshal("Normal3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3d, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3d");
+ CALL_Normal3d(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* Normal3f: marshalled asynchronously */
+struct marshal_cmd_Normal3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat nx;
+ GLfloat ny;
+ GLfloat nz;
+};
+static inline void
+_mesa_unmarshal_Normal3f(struct gl_context *ctx, const struct marshal_cmd_Normal3f *cmd)
+{
+ const GLfloat nx = cmd->nx;
+ const GLfloat ny = cmd->ny;
+ const GLfloat nz = cmd->nz;
+ CALL_Normal3f(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3f(GLfloat nx, GLfloat ny, GLfloat nz)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3f);
+ struct marshal_cmd_Normal3f *cmd;
+ debug_print_marshal("Normal3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3f, cmd_size);
+ cmd->nx = nx;
+ cmd->ny = ny;
+ cmd->nz = nz;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3f");
+ CALL_Normal3f(ctx->CurrentServerDispatch, (nx, ny, nz));
+}
+
+
+/* Indexi: marshalled asynchronously */
+struct marshal_cmd_Indexi
+{
+ struct marshal_cmd_base cmd_base;
+ GLint c;
+};
+static inline void
+_mesa_unmarshal_Indexi(struct gl_context *ctx, const struct marshal_cmd_Indexi *cmd)
+{
+ const GLint c = cmd->c;
+ CALL_Indexi(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexi(GLint c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexi);
+ struct marshal_cmd_Indexi *cmd;
+ debug_print_marshal("Indexi");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexi, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexi");
+ CALL_Indexi(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* Uniform1uiv: marshalled asynchronously */
+struct marshal_cmd_Uniform1uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLuint value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1uiv(struct gl_context *ctx, const struct marshal_cmd_Uniform1uiv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 4;
+ CALL_Uniform1uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1uiv(GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1uiv) + safe_mul(count, 4);
+ struct marshal_cmd_Uniform1uiv *cmd;
+ debug_print_marshal("Uniform1uiv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1uiv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1uiv");
+ CALL_Uniform1uiv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* VertexAttribI2uiEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI2uiEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint x;
+ GLuint y;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI2uiEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI2uiEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ CALL_VertexAttribI2uiEXT(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI2uiEXT(GLuint index, GLuint x, GLuint y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI2uiEXT);
+ struct marshal_cmd_VertexAttribI2uiEXT *cmd;
+ debug_print_marshal("VertexAttribI2uiEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI2uiEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI2uiEXT");
+ CALL_VertexAttribI2uiEXT(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* IsRenderbuffer: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsRenderbuffer(GLuint renderbuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsRenderbuffer");
+ return CALL_IsRenderbuffer(ctx->CurrentServerDispatch, (renderbuffer));
+}
+
+
+/* NormalP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_NormalP3uiv(GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("NormalP3uiv");
+ CALL_NormalP3uiv(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* Indexf: marshalled asynchronously */
+struct marshal_cmd_Indexf
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat c;
+};
+static inline void
+_mesa_unmarshal_Indexf(struct gl_context *ctx, const struct marshal_cmd_Indexf *cmd)
+{
+ const GLfloat c = cmd->c;
+ CALL_Indexf(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexf(GLfloat c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexf);
+ struct marshal_cmd_Indexf *cmd;
+ debug_print_marshal("Indexf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexf, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexf");
+ CALL_Indexf(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* Indexd: marshalled asynchronously */
+struct marshal_cmd_Indexd
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble c;
+};
+static inline void
+_mesa_unmarshal_Indexd(struct gl_context *ctx, const struct marshal_cmd_Indexd *cmd)
+{
+ const GLdouble c = cmd->c;
+ CALL_Indexd(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexd(GLdouble c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexd);
+ struct marshal_cmd_Indexd *cmd;
+ debug_print_marshal("Indexd");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexd, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexd");
+ CALL_Indexd(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* GetMaterialiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMaterialiv(GLenum face, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMaterialiv");
+ CALL_GetMaterialiv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* Indexs: marshalled asynchronously */
+struct marshal_cmd_Indexs
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort c;
+};
+static inline void
+_mesa_unmarshal_Indexs(struct gl_context *ctx, const struct marshal_cmd_Indexs *cmd)
+{
+ const GLshort c = cmd->c;
+ CALL_Indexs(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexs(GLshort c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexs);
+ struct marshal_cmd_Indexs *cmd;
+ debug_print_marshal("Indexs");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexs, cmd_size);
+ cmd->c = c;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexs");
+ CALL_Indexs(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* MultiTexCoordP1uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP1uiv(GLenum texture, GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiTexCoordP1uiv");
+ CALL_MultiTexCoordP1uiv(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* ConvolutionFilter2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionFilter2D(GLenum target, GLenum internalformat, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * image)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ConvolutionFilter2D");
+ CALL_ConvolutionFilter2D(ctx->CurrentServerDispatch, (target, internalformat, width, height, format, type, image));
+}
+
+
+/* Vertex2d: marshalled asynchronously */
+struct marshal_cmd_Vertex2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_Vertex2d(struct gl_context *ctx, const struct marshal_cmd_Vertex2d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_Vertex2d(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2d(GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2d);
+ struct marshal_cmd_Vertex2d *cmd;
+ debug_print_marshal("Vertex2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2d");
+ CALL_Vertex2d(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* Vertex2f: marshalled asynchronously */
+struct marshal_cmd_Vertex2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_Vertex2f(struct gl_context *ctx, const struct marshal_cmd_Vertex2f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_Vertex2f(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2f(GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2f);
+ struct marshal_cmd_Vertex2f *cmd;
+ debug_print_marshal("Vertex2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2f");
+ CALL_Vertex2f(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* Color4bv: marshalled asynchronously */
+struct marshal_cmd_Color4bv
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte v[4];
+};
+static inline void
+_mesa_unmarshal_Color4bv(struct gl_context *ctx, const struct marshal_cmd_Color4bv *cmd)
+{
+ const GLbyte * v = cmd->v;
+ CALL_Color4bv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4bv(const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4bv);
+ struct marshal_cmd_Color4bv *cmd;
+ debug_print_marshal("Color4bv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4bv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4bv");
+ CALL_Color4bv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ProgramUniformMatrix3x2dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3x2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLdouble value[count][6] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3x2dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3x2dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 48;
+ CALL_ProgramUniformMatrix3x2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3x2dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3x2dv) + safe_mul(count, 48);
+ struct marshal_cmd_ProgramUniformMatrix3x2dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3x2dv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3x2dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3x2dv");
+ CALL_ProgramUniformMatrix3x2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* VertexAttrib2fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib2fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2fvNV(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2fvNV);
+ struct marshal_cmd_VertexAttrib2fvNV *cmd;
+ debug_print_marshal("VertexAttrib2fvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2fvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2fvNV");
+ CALL_VertexAttrib2fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Vertex2s: marshalled asynchronously */
+struct marshal_cmd_Vertex2s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+};
+static inline void
+_mesa_unmarshal_Vertex2s(struct gl_context *ctx, const struct marshal_cmd_Vertex2s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ CALL_Vertex2s(ctx->CurrentServerDispatch, (x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2s(GLshort x, GLshort y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2s);
+ struct marshal_cmd_Vertex2s *cmd;
+ debug_print_marshal("Vertex2s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2s");
+ CALL_Vertex2s(ctx->CurrentServerDispatch, (x, y));
+}
+
+
+/* ActiveTexture: marshalled asynchronously */
+struct marshal_cmd_ActiveTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+};
+static inline void
+_mesa_unmarshal_ActiveTexture(struct gl_context *ctx, const struct marshal_cmd_ActiveTexture *cmd)
+{
+ const GLenum texture = cmd->texture;
+ CALL_ActiveTexture(ctx->CurrentServerDispatch, (texture));
+}
+static void GLAPIENTRY
+_mesa_marshal_ActiveTexture(GLenum texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ActiveTexture);
+ struct marshal_cmd_ActiveTexture *cmd;
+ debug_print_marshal("ActiveTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ActiveTexture, cmd_size);
+ cmd->texture = texture;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ActiveTexture");
+ CALL_ActiveTexture(ctx->CurrentServerDispatch, (texture));
+}
+
+
+/* InvalidateNamedFramebufferSubData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_InvalidateNamedFramebufferSubData(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("InvalidateNamedFramebufferSubData");
+ CALL_InvalidateNamedFramebufferSubData(ctx->CurrentServerDispatch, (framebuffer, numAttachments, attachments, x, y, width, height));
+}
+
+
+/* ColorP4uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ColorP4uiv(GLenum type, const GLuint * color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ColorP4uiv");
+ CALL_ColorP4uiv(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* DrawTexxOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexxOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed x;
+ GLfixed y;
+ GLfixed z;
+ GLfixed width;
+ GLfixed height;
+};
+static inline void
+_mesa_unmarshal_DrawTexxOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexxOES *cmd)
+{
+ const GLfixed x = cmd->x;
+ const GLfixed y = cmd->y;
+ const GLfixed z = cmd->z;
+ const GLfixed width = cmd->width;
+ const GLfixed height = cmd->height;
+ CALL_DrawTexxOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexxOES(GLfixed x, GLfixed y, GLfixed z, GLfixed width, GLfixed height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexxOES);
+ struct marshal_cmd_DrawTexxOES *cmd;
+ debug_print_marshal("DrawTexxOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexxOES, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexxOES");
+ CALL_DrawTexxOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+
+
+/* MultiTexCoordP3ui: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoordP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoordP3ui(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoordP3ui *cmd)
+{
+ const GLenum texture = cmd->texture;
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_MultiTexCoordP3ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP3ui(GLenum texture, GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoordP3ui);
+ struct marshal_cmd_MultiTexCoordP3ui *cmd;
+ debug_print_marshal("MultiTexCoordP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoordP3ui, cmd_size);
+ cmd->texture = texture;
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoordP3ui");
+ CALL_MultiTexCoordP3ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* GetAttribLocation: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetAttribLocation(GLuint program, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetAttribLocation");
+ return CALL_GetAttribLocation(ctx->CurrentServerDispatch, (program, name));
+}
+
+
+/* DrawBuffer: marshalled asynchronously */
+struct marshal_cmd_DrawBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_DrawBuffer(struct gl_context *ctx, const struct marshal_cmd_DrawBuffer *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_DrawBuffer(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawBuffer(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawBuffer);
+ struct marshal_cmd_DrawBuffer *cmd;
+ debug_print_marshal("DrawBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawBuffer, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawBuffer");
+ CALL_DrawBuffer(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* GetPointerv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPointerv(GLenum pname, GLvoid ** params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPointerv");
+ CALL_GetPointerv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* MultiTexCoord2dv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2dv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2dv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble * v = cmd->v;
+ CALL_MultiTexCoord2dv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2dv(GLenum target, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2dv);
+ struct marshal_cmd_MultiTexCoord2dv *cmd;
+ debug_print_marshal("MultiTexCoord2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2dv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2dv");
+ CALL_MultiTexCoord2dv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* IsSampler: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsSampler(GLuint sampler)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsSampler");
+ return CALL_IsSampler(ctx->CurrentServerDispatch, (sampler));
+}
+
+
+/* BlendFunc: marshalled asynchronously */
+struct marshal_cmd_BlendFunc
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum sfactor;
+ GLenum dfactor;
+};
+static inline void
+_mesa_unmarshal_BlendFunc(struct gl_context *ctx, const struct marshal_cmd_BlendFunc *cmd)
+{
+ const GLenum sfactor = cmd->sfactor;
+ const GLenum dfactor = cmd->dfactor;
+ CALL_BlendFunc(ctx->CurrentServerDispatch, (sfactor, dfactor));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendFunc(GLenum sfactor, GLenum dfactor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendFunc);
+ struct marshal_cmd_BlendFunc *cmd;
+ debug_print_marshal("BlendFunc");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendFunc, cmd_size);
+ cmd->sfactor = sfactor;
+ cmd->dfactor = dfactor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendFunc");
+ CALL_BlendFunc(ctx->CurrentServerDispatch, (sfactor, dfactor));
+}
+
+
+/* NamedRenderbufferStorageMultisample: marshalled asynchronously */
+struct marshal_cmd_NamedRenderbufferStorageMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint renderbuffer;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_NamedRenderbufferStorageMultisample(struct gl_context *ctx, const struct marshal_cmd_NamedRenderbufferStorageMultisample *cmd)
+{
+ const GLuint renderbuffer = cmd->renderbuffer;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_NamedRenderbufferStorageMultisample(ctx->CurrentServerDispatch, (renderbuffer, samples, internalformat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedRenderbufferStorageMultisample(GLuint renderbuffer, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedRenderbufferStorageMultisample);
+ struct marshal_cmd_NamedRenderbufferStorageMultisample *cmd;
+ debug_print_marshal("NamedRenderbufferStorageMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedRenderbufferStorageMultisample, cmd_size);
+ cmd->renderbuffer = renderbuffer;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedRenderbufferStorageMultisample");
+ CALL_NamedRenderbufferStorageMultisample(ctx->CurrentServerDispatch, (renderbuffer, samples, internalformat, width, height));
+}
+
+
+/* ColorMaterial: marshalled asynchronously */
+struct marshal_cmd_ColorMaterial
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_ColorMaterial(struct gl_context *ctx, const struct marshal_cmd_ColorMaterial *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum mode = cmd->mode;
+ CALL_ColorMaterial(ctx->CurrentServerDispatch, (face, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorMaterial(GLenum face, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorMaterial);
+ struct marshal_cmd_ColorMaterial *cmd;
+ debug_print_marshal("ColorMaterial");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorMaterial, cmd_size);
+ cmd->face = face;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorMaterial");
+ CALL_ColorMaterial(ctx->CurrentServerDispatch, (face, mode));
+}
+
+
+/* RasterPos3sv: marshalled asynchronously */
+struct marshal_cmd_RasterPos3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_RasterPos3sv(struct gl_context *ctx, const struct marshal_cmd_RasterPos3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_RasterPos3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos3sv);
+ struct marshal_cmd_RasterPos3sv *cmd;
+ debug_print_marshal("RasterPos3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos3sv");
+ CALL_RasterPos3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoordP2ui: marshalled asynchronously */
+struct marshal_cmd_TexCoordP2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_TexCoordP2ui(struct gl_context *ctx, const struct marshal_cmd_TexCoordP2ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_TexCoordP2ui(ctx->CurrentServerDispatch, (type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP2ui(GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordP2ui);
+ struct marshal_cmd_TexCoordP2ui *cmd;
+ debug_print_marshal("TexCoordP2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordP2ui, cmd_size);
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordP2ui");
+ CALL_TexCoordP2ui(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* TexParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexParameteriv(GLenum target, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexParameteriv");
+ CALL_TexParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* WaitSemaphoreEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WaitSemaphoreEXT(GLuint semaphore, GLuint numBufferBarriers, const GLuint * buffers, GLuint numTextureBarriers, const GLuint * textures, const GLenum * srcLayouts)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WaitSemaphoreEXT");
+ CALL_WaitSemaphoreEXT(ctx->CurrentServerDispatch, (semaphore, numBufferBarriers, buffers, numTextureBarriers, textures, srcLayouts));
+}
+
+
+/* VertexAttrib3fvARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3fvARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3fvARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib3fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3fvARB(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3fvARB);
+ struct marshal_cmd_VertexAttrib3fvARB *cmd;
+ debug_print_marshal("VertexAttrib3fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3fvARB, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3fvARB");
+ CALL_VertexAttrib3fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* ProgramUniformMatrix3x4fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3x4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLfloat value[count][12] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3x4fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3x4fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 48;
+ CALL_ProgramUniformMatrix3x4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3x4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3x4fv) + safe_mul(count, 48);
+ struct marshal_cmd_ProgramUniformMatrix3x4fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3x4fv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3x4fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3x4fv");
+ CALL_ProgramUniformMatrix3x4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* GetColorTable: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetColorTable(GLenum target, GLenum format, GLenum type, GLvoid * table)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetColorTable");
+ CALL_GetColorTable(ctx->CurrentServerDispatch, (target, format, type, table));
+}
+
+
+/* TexCoord3i: marshalled asynchronously */
+struct marshal_cmd_TexCoord3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint s;
+ GLint t;
+ GLint r;
+};
+static inline void
+_mesa_unmarshal_TexCoord3i(struct gl_context *ctx, const struct marshal_cmd_TexCoord3i *cmd)
+{
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ const GLint r = cmd->r;
+ CALL_TexCoord3i(ctx->CurrentServerDispatch, (s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3i(GLint s, GLint t, GLint r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3i);
+ struct marshal_cmd_TexCoord3i *cmd;
+ debug_print_marshal("TexCoord3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3i, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3i");
+ CALL_TexCoord3i(ctx->CurrentServerDispatch, (s, t, r));
+}
+
+
+/* CopyColorTable: marshalled asynchronously */
+struct marshal_cmd_CopyColorTable
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLint x;
+ GLint y;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_CopyColorTable(struct gl_context *ctx, const struct marshal_cmd_CopyColorTable *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ CALL_CopyColorTable(ctx->CurrentServerDispatch, (target, internalformat, x, y, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyColorTable(GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyColorTable);
+ struct marshal_cmd_CopyColorTable *cmd;
+ debug_print_marshal("CopyColorTable");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyColorTable, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyColorTable");
+ CALL_CopyColorTable(ctx->CurrentServerDispatch, (target, internalformat, x, y, width));
+}
+
+
+/* Frustum: marshalled asynchronously */
+struct marshal_cmd_Frustum
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble left;
+ GLdouble right;
+ GLdouble bottom;
+ GLdouble top;
+ GLdouble zNear;
+ GLdouble zFar;
+};
+static inline void
+_mesa_unmarshal_Frustum(struct gl_context *ctx, const struct marshal_cmd_Frustum *cmd)
+{
+ const GLdouble left = cmd->left;
+ const GLdouble right = cmd->right;
+ const GLdouble bottom = cmd->bottom;
+ const GLdouble top = cmd->top;
+ const GLdouble zNear = cmd->zNear;
+ const GLdouble zFar = cmd->zFar;
+ CALL_Frustum(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+static void GLAPIENTRY
+_mesa_marshal_Frustum(GLdouble left, GLdouble right, GLdouble bottom, GLdouble top, GLdouble zNear, GLdouble zFar)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Frustum);
+ struct marshal_cmd_Frustum *cmd;
+ debug_print_marshal("Frustum");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Frustum, cmd_size);
+ cmd->left = left;
+ cmd->right = right;
+ cmd->bottom = bottom;
+ cmd->top = top;
+ cmd->zNear = zNear;
+ cmd->zFar = zFar;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Frustum");
+ CALL_Frustum(ctx->CurrentServerDispatch, (left, right, bottom, top, zNear, zFar));
+}
+
+
+/* TexCoord3d: marshalled asynchronously */
+struct marshal_cmd_TexCoord3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble s;
+ GLdouble t;
+ GLdouble r;
+};
+static inline void
+_mesa_unmarshal_TexCoord3d(struct gl_context *ctx, const struct marshal_cmd_TexCoord3d *cmd)
+{
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ const GLdouble r = cmd->r;
+ CALL_TexCoord3d(ctx->CurrentServerDispatch, (s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3d(GLdouble s, GLdouble t, GLdouble r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3d);
+ struct marshal_cmd_TexCoord3d *cmd;
+ debug_print_marshal("TexCoord3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3d, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3d");
+ CALL_TexCoord3d(ctx->CurrentServerDispatch, (s, t, r));
+}
+
+
+/* GetTextureParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureParameteriv(GLuint texture, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureParameteriv");
+ CALL_GetTextureParameteriv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* TexCoord3f: marshalled asynchronously */
+struct marshal_cmd_TexCoord3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat s;
+ GLfloat t;
+ GLfloat r;
+};
+static inline void
+_mesa_unmarshal_TexCoord3f(struct gl_context *ctx, const struct marshal_cmd_TexCoord3f *cmd)
+{
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ const GLfloat r = cmd->r;
+ CALL_TexCoord3f(ctx->CurrentServerDispatch, (s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3f(GLfloat s, GLfloat t, GLfloat r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3f);
+ struct marshal_cmd_TexCoord3f *cmd;
+ debug_print_marshal("TexCoord3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3f, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3f");
+ CALL_TexCoord3f(ctx->CurrentServerDispatch, (s, t, r));
+}
+
+
+/* DepthRangeArrayv: marshalled asynchronously */
+struct marshal_cmd_DepthRangeArrayv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint first;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLclampd v[count][2] */
+};
+static inline void
+_mesa_unmarshal_DepthRangeArrayv(struct gl_context *ctx, const struct marshal_cmd_DepthRangeArrayv *cmd)
+{
+ const GLuint first = cmd->first;
+ const GLsizei count = cmd->count;
+ const GLclampd * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLclampd *) variable_data;
+ variable_data += count * 16;
+ CALL_DepthRangeArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRangeArrayv(GLuint first, GLsizei count, const GLclampd * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRangeArrayv) + safe_mul(count, 16);
+ struct marshal_cmd_DepthRangeArrayv *cmd;
+ debug_print_marshal("DepthRangeArrayv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRangeArrayv, cmd_size);
+ cmd->first = first;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRangeArrayv");
+ CALL_DepthRangeArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+
+
+/* DeleteTextures: marshalled asynchronously */
+struct marshal_cmd_DeleteTextures
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint textures[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteTextures(struct gl_context *ctx, const struct marshal_cmd_DeleteTextures *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * textures;
+ const char *variable_data = (const char *) (cmd + 1);
+ textures = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteTextures(ctx->CurrentServerDispatch, (n, textures));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteTextures(GLsizei n, const GLuint * textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteTextures) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteTextures *cmd;
+ debug_print_marshal("DeleteTextures");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteTextures, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, textures, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteTextures");
+ CALL_DeleteTextures(ctx->CurrentServerDispatch, (n, textures));
+}
+
+
+/* TexCoordPointerEXT: marshalled asynchronously */
+struct marshal_cmd_TexCoordPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ GLsizei count;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_TexCoordPointerEXT(struct gl_context *ctx, const struct marshal_cmd_TexCoordPointerEXT *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_TexCoordPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordPointerEXT(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordPointerEXT);
+ struct marshal_cmd_TexCoordPointerEXT *cmd;
+ debug_print_marshal("TexCoordPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("TexCoordPointerEXT");
+ CALL_TexCoordPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordPointerEXT, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordPointerEXT");
+ CALL_TexCoordPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+
+
+/* TexCoord3s: marshalled asynchronously */
+struct marshal_cmd_TexCoord3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort s;
+ GLshort t;
+ GLshort r;
+};
+static inline void
+_mesa_unmarshal_TexCoord3s(struct gl_context *ctx, const struct marshal_cmd_TexCoord3s *cmd)
+{
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ const GLshort r = cmd->r;
+ CALL_TexCoord3s(ctx->CurrentServerDispatch, (s, t, r));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3s(GLshort s, GLshort t, GLshort r)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3s);
+ struct marshal_cmd_TexCoord3s *cmd;
+ debug_print_marshal("TexCoord3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3s, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3s");
+ CALL_TexCoord3s(ctx->CurrentServerDispatch, (s, t, r));
+}
+
+
+/* GetTexLevelParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexLevelParameteriv(GLenum target, GLint level, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexLevelParameteriv");
+ CALL_GetTexLevelParameteriv(ctx->CurrentServerDispatch, (target, level, pname, params));
+}
+
+
+/* TextureParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureParameterIuiv(GLuint texture, GLenum pname, const GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureParameterIuiv");
+ CALL_TextureParameterIuiv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* GenPerfMonitorsAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenPerfMonitorsAMD(GLsizei n, GLuint * monitors)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenPerfMonitorsAMD");
+ CALL_GenPerfMonitorsAMD(ctx->CurrentServerDispatch, (n, monitors));
+}
+
+
+/* ClearAccum: marshalled asynchronously */
+struct marshal_cmd_ClearAccum
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat red;
+ GLfloat green;
+ GLfloat blue;
+ GLfloat alpha;
+};
+static inline void
+_mesa_unmarshal_ClearAccum(struct gl_context *ctx, const struct marshal_cmd_ClearAccum *cmd)
+{
+ const GLfloat red = cmd->red;
+ const GLfloat green = cmd->green;
+ const GLfloat blue = cmd->blue;
+ const GLfloat alpha = cmd->alpha;
+ CALL_ClearAccum(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearAccum(GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearAccum);
+ struct marshal_cmd_ClearAccum *cmd;
+ debug_print_marshal("ClearAccum");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearAccum, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearAccum");
+ CALL_ClearAccum(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* TexCoord4iv: marshalled asynchronously */
+struct marshal_cmd_TexCoord4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_TexCoord4iv(struct gl_context *ctx, const struct marshal_cmd_TexCoord4iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_TexCoord4iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4iv);
+ struct marshal_cmd_TexCoord4iv *cmd;
+ debug_print_marshal("TexCoord4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4iv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4iv");
+ CALL_TexCoord4iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexStorage3D: marshalled asynchronously */
+struct marshal_cmd_TexStorage3D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+};
+static inline void
+_mesa_unmarshal_TexStorage3D(struct gl_context *ctx, const struct marshal_cmd_TexStorage3D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ CALL_TexStorage3D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorage3D(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorage3D);
+ struct marshal_cmd_TexStorage3D *cmd;
+ debug_print_marshal("TexStorage3D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorage3D, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorage3D");
+ CALL_TexStorage3D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width, height, depth));
+}
+
+
+/* Uniform2i64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform2i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+};
+static inline void
+_mesa_unmarshal_Uniform2i64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform2i64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ CALL_Uniform2i64ARB(ctx->CurrentServerDispatch, (location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2i64ARB(GLint location, GLint64 x, GLint64 y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2i64ARB);
+ struct marshal_cmd_Uniform2i64ARB *cmd;
+ debug_print_marshal("Uniform2i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2i64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2i64ARB");
+ CALL_Uniform2i64ARB(ctx->CurrentServerDispatch, (location, x, y));
+}
+
+
+/* FramebufferTexture3D: marshalled asynchronously */
+struct marshal_cmd_FramebufferTexture3D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLenum textarget;
+ GLuint texture;
+ GLint level;
+ GLint layer;
+};
+static inline void
+_mesa_unmarshal_FramebufferTexture3D(struct gl_context *ctx, const struct marshal_cmd_FramebufferTexture3D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLenum textarget = cmd->textarget;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint layer = cmd->layer;
+ CALL_FramebufferTexture3D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level, layer));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferTexture3D(GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level, GLint layer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferTexture3D);
+ struct marshal_cmd_FramebufferTexture3D *cmd;
+ debug_print_marshal("FramebufferTexture3D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferTexture3D, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->textarget = textarget;
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->layer = layer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferTexture3D");
+ CALL_FramebufferTexture3D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level, layer));
+}
+
+
+/* GetBufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBufferParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBufferParameteriv");
+ CALL_GetBufferParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* VertexAttrib2fNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2fNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2fNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2fNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ CALL_VertexAttrib2fNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2fNV(GLuint index, GLfloat x, GLfloat y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2fNV);
+ struct marshal_cmd_VertexAttrib2fNV *cmd;
+ debug_print_marshal("VertexAttrib2fNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2fNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2fNV");
+ CALL_VertexAttrib2fNV(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* CopyTexImage2D: marshalled asynchronously */
+struct marshal_cmd_CopyTexImage2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint level;
+ GLenum internalformat;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+ GLint border;
+};
+static inline void
+_mesa_unmarshal_CopyTexImage2D(struct gl_context *ctx, const struct marshal_cmd_CopyTexImage2D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint level = cmd->level;
+ const GLenum internalformat = cmd->internalformat;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLint border = cmd->border;
+ CALL_CopyTexImage2D(ctx->CurrentServerDispatch, (target, level, internalformat, x, y, width, height, border));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTexImage2D(GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height, GLint border)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTexImage2D);
+ struct marshal_cmd_CopyTexImage2D *cmd;
+ debug_print_marshal("CopyTexImage2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTexImage2D, cmd_size);
+ cmd->target = target;
+ cmd->level = level;
+ cmd->internalformat = internalformat;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->border = border;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTexImage2D");
+ CALL_CopyTexImage2D(ctx->CurrentServerDispatch, (target, level, internalformat, x, y, width, height, border));
+}
+
+
+/* Vertex3fv: marshalled asynchronously */
+struct marshal_cmd_Vertex3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_Vertex3fv(struct gl_context *ctx, const struct marshal_cmd_Vertex3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Vertex3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3fv);
+ struct marshal_cmd_Vertex3fv *cmd;
+ debug_print_marshal("Vertex3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3fv");
+ CALL_Vertex3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* WindowPos4dvMESA: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4dvMESA(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos4dvMESA");
+ CALL_WindowPos4dvMESA(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* ProgramUniform2i64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLint64 value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2i64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2i64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform2i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2i64vARB(GLuint program, GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2i64vARB) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform2i64vARB *cmd;
+ debug_print_marshal("ProgramUniform2i64vARB");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2i64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2i64vARB");
+ CALL_ProgramUniform2i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* MultiTexCoordP2ui: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoordP2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoordP2ui(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoordP2ui *cmd)
+{
+ const GLenum texture = cmd->texture;
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_MultiTexCoordP2ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP2ui(GLenum texture, GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoordP2ui);
+ struct marshal_cmd_MultiTexCoordP2ui *cmd;
+ debug_print_marshal("MultiTexCoordP2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoordP2ui, cmd_size);
+ cmd->texture = texture;
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoordP2ui");
+ CALL_MultiTexCoordP2ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* VertexAttribs1dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs1dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 8) bytes are GLdouble v[n] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs1dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs1dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLdouble * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLdouble *) variable_data;
+ variable_data += n * 8;
+ CALL_VertexAttribs1dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs1dvNV(GLuint index, GLsizei n, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs1dvNV) + safe_mul(n, 8);
+ struct marshal_cmd_VertexAttribs1dvNV *cmd;
+ debug_print_marshal("VertexAttribs1dvNV");
+ if (unlikely(safe_mul(n, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs1dvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 8);
+ variable_data += n * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs1dvNV");
+ CALL_VertexAttribs1dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* ImportSemaphoreFdEXT: marshalled asynchronously */
+struct marshal_cmd_ImportSemaphoreFdEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint semaphore;
+ GLenum handleType;
+ GLint fd;
+};
+static inline void
+_mesa_unmarshal_ImportSemaphoreFdEXT(struct gl_context *ctx, const struct marshal_cmd_ImportSemaphoreFdEXT *cmd)
+{
+ const GLuint semaphore = cmd->semaphore;
+ const GLenum handleType = cmd->handleType;
+ const GLint fd = cmd->fd;
+ CALL_ImportSemaphoreFdEXT(ctx->CurrentServerDispatch, (semaphore, handleType, fd));
+}
+static void GLAPIENTRY
+_mesa_marshal_ImportSemaphoreFdEXT(GLuint semaphore, GLenum handleType, GLint fd)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ImportSemaphoreFdEXT);
+ struct marshal_cmd_ImportSemaphoreFdEXT *cmd;
+ debug_print_marshal("ImportSemaphoreFdEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ImportSemaphoreFdEXT, cmd_size);
+ cmd->semaphore = semaphore;
+ cmd->handleType = handleType;
+ cmd->fd = fd;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ImportSemaphoreFdEXT");
+ CALL_ImportSemaphoreFdEXT(ctx->CurrentServerDispatch, (semaphore, handleType, fd));
+}
+
+
+/* IsQuery: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsQuery(GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsQuery");
+ return CALL_IsQuery(ctx->CurrentServerDispatch, (id));
+}
+
+
+/* EdgeFlagPointerEXT: marshalled asynchronously */
+struct marshal_cmd_EdgeFlagPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei stride;
+ GLsizei count;
+ const GLboolean * pointer;
+};
+static inline void
+_mesa_unmarshal_EdgeFlagPointerEXT(struct gl_context *ctx, const struct marshal_cmd_EdgeFlagPointerEXT *cmd)
+{
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLboolean * pointer = cmd->pointer;
+ CALL_EdgeFlagPointerEXT(ctx->CurrentServerDispatch, (stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_EdgeFlagPointerEXT(GLsizei stride, GLsizei count, const GLboolean * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EdgeFlagPointerEXT);
+ struct marshal_cmd_EdgeFlagPointerEXT *cmd;
+ debug_print_marshal("EdgeFlagPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("EdgeFlagPointerEXT");
+ CALL_EdgeFlagPointerEXT(ctx->CurrentServerDispatch, (stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EdgeFlagPointerEXT, cmd_size);
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EdgeFlagPointerEXT");
+ CALL_EdgeFlagPointerEXT(ctx->CurrentServerDispatch, (stride, count, pointer));
+}
+
+
+/* VertexAttribs2svNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs2svNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLshort v[n][2] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs2svNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs2svNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLshort * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLshort *) variable_data;
+ variable_data += n * 4;
+ CALL_VertexAttribs2svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs2svNV(GLuint index, GLsizei n, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs2svNV) + safe_mul(n, 4);
+ struct marshal_cmd_VertexAttribs2svNV *cmd;
+ debug_print_marshal("VertexAttribs2svNV");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs2svNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs2svNV");
+ CALL_VertexAttribs2svNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* CreateShaderProgramv: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_CreateShaderProgramv(GLenum type, GLsizei count, const GLchar * const * strings)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateShaderProgramv");
+ return CALL_CreateShaderProgramv(ctx->CurrentServerDispatch, (type, count, strings));
+}
+
+
+/* BlendEquationiARB: marshalled asynchronously */
+struct marshal_cmd_BlendEquationiARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buf;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_BlendEquationiARB(struct gl_context *ctx, const struct marshal_cmd_BlendEquationiARB *cmd)
+{
+ const GLuint buf = cmd->buf;
+ const GLenum mode = cmd->mode;
+ CALL_BlendEquationiARB(ctx->CurrentServerDispatch, (buf, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendEquationiARB(GLuint buf, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendEquationiARB);
+ struct marshal_cmd_BlendEquationiARB *cmd;
+ debug_print_marshal("BlendEquationiARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendEquationiARB, cmd_size);
+ cmd->buf = buf;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendEquationiARB");
+ CALL_BlendEquationiARB(ctx->CurrentServerDispatch, (buf, mode));
+}
+
+
+/* VertexAttribI4uivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4uivEXT(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI4uivEXT");
+ CALL_VertexAttribI4uivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* PointSizex: marshalled asynchronously */
+struct marshal_cmd_PointSizex
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed size;
+};
+static inline void
+_mesa_unmarshal_PointSizex(struct gl_context *ctx, const struct marshal_cmd_PointSizex *cmd)
+{
+ const GLfixed size = cmd->size;
+ CALL_PointSizex(ctx->CurrentServerDispatch, (size));
+}
+static void GLAPIENTRY
+_mesa_marshal_PointSizex(GLfixed size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PointSizex);
+ struct marshal_cmd_PointSizex *cmd;
+ debug_print_marshal("PointSizex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PointSizex, cmd_size);
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PointSizex");
+ CALL_PointSizex(ctx->CurrentServerDispatch, (size));
+}
+
+
+/* PolygonMode: marshalled asynchronously */
+struct marshal_cmd_PolygonMode
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_PolygonMode(struct gl_context *ctx, const struct marshal_cmd_PolygonMode *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum mode = cmd->mode;
+ CALL_PolygonMode(ctx->CurrentServerDispatch, (face, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_PolygonMode(GLenum face, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PolygonMode);
+ struct marshal_cmd_PolygonMode *cmd;
+ debug_print_marshal("PolygonMode");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PolygonMode, cmd_size);
+ cmd->face = face;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PolygonMode");
+ CALL_PolygonMode(ctx->CurrentServerDispatch, (face, mode));
+}
+
+
+/* SecondaryColor3iv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3iv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_SecondaryColor3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3iv);
+ struct marshal_cmd_SecondaryColor3iv *cmd;
+ debug_print_marshal("SecondaryColor3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3iv");
+ CALL_SecondaryColor3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* VertexAttribI1iEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI1iEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint x;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI1iEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI1iEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint x = cmd->x;
+ CALL_VertexAttribI1iEXT(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI1iEXT(GLuint index, GLint x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI1iEXT);
+ struct marshal_cmd_VertexAttribI1iEXT *cmd;
+ debug_print_marshal("VertexAttribI1iEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI1iEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI1iEXT");
+ CALL_VertexAttribI1iEXT(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* VertexAttrib4Niv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Niv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Niv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Niv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint * v = cmd->v;
+ CALL_VertexAttrib4Niv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Niv(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Niv);
+ struct marshal_cmd_VertexAttrib4Niv *cmd;
+ debug_print_marshal("VertexAttrib4Niv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Niv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Niv");
+ CALL_VertexAttrib4Niv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetnUniformdvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformdvARB(GLuint program, GLint location, GLsizei bufSize, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformdvARB");
+ CALL_GetnUniformdvARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* LinkProgram: marshalled asynchronously */
+struct marshal_cmd_LinkProgram
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_LinkProgram(struct gl_context *ctx, const struct marshal_cmd_LinkProgram *cmd)
+{
+ const GLuint program = cmd->program;
+ CALL_LinkProgram(ctx->CurrentServerDispatch, (program));
+}
+static void GLAPIENTRY
+_mesa_marshal_LinkProgram(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LinkProgram);
+ struct marshal_cmd_LinkProgram *cmd;
+ debug_print_marshal("LinkProgram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LinkProgram, cmd_size);
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LinkProgram");
+ CALL_LinkProgram(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* ProgramUniform4d: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4d(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4d *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_ProgramUniform4d(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4d(GLuint program, GLint location, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4d);
+ struct marshal_cmd_ProgramUniform4d *cmd;
+ debug_print_marshal("ProgramUniform4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4d, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4d");
+ CALL_ProgramUniform4d(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* ProgramUniform4f: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4f(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4f *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_ProgramUniform4f(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4f(GLuint program, GLint location, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4f);
+ struct marshal_cmd_ProgramUniform4f *cmd;
+ debug_print_marshal("ProgramUniform4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4f, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4f");
+ CALL_ProgramUniform4f(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* ProgramUniform4i: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4i(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4i *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint w = cmd->w;
+ CALL_ProgramUniform4i(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4i(GLuint program, GLint location, GLint x, GLint y, GLint z, GLint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4i);
+ struct marshal_cmd_ProgramUniform4i *cmd;
+ debug_print_marshal("ProgramUniform4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4i, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4i");
+ CALL_ProgramUniform4i(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* GetFramebufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFramebufferParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFramebufferParameteriv");
+ CALL_GetFramebufferParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetNamedBufferPointerv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedBufferPointerv(GLuint buffer, GLenum pname, GLvoid ** params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedBufferPointerv");
+ CALL_GetNamedBufferPointerv(ctx->CurrentServerDispatch, (buffer, pname, params));
+}
+
+
+/* VertexAttrib4d: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4d(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_VertexAttrib4d(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4d(GLuint index, GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4d);
+ struct marshal_cmd_VertexAttrib4d *cmd;
+ debug_print_marshal("VertexAttrib4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4d");
+ CALL_VertexAttrib4d(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* ProgramUniform4ui64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLuint64 value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4ui64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4ui64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniform4ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4ui64vARB(GLuint program, GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4ui64vARB) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniform4ui64vARB *cmd;
+ debug_print_marshal("ProgramUniform4ui64vARB");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4ui64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4ui64vARB");
+ CALL_ProgramUniform4ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* WindowPos4sMESA: marshalled asynchronously */
+struct marshal_cmd_WindowPos4sMESA
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort w;
+};
+static inline void
+_mesa_unmarshal_WindowPos4sMESA(struct gl_context *ctx, const struct marshal_cmd_WindowPos4sMESA *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort w = cmd->w;
+ CALL_WindowPos4sMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4sMESA(GLshort x, GLshort y, GLshort z, GLshort w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos4sMESA);
+ struct marshal_cmd_WindowPos4sMESA *cmd;
+ debug_print_marshal("WindowPos4sMESA");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos4sMESA, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos4sMESA");
+ CALL_WindowPos4sMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* VertexAttrib4s: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+ GLshort w;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4s(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4s *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ const GLshort w = cmd->w;
+ CALL_VertexAttrib4s(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4s(GLuint index, GLshort x, GLshort y, GLshort z, GLshort w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4s);
+ struct marshal_cmd_VertexAttrib4s *cmd;
+ debug_print_marshal("VertexAttrib4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4s, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4s");
+ CALL_VertexAttrib4s(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* ProgramUniform1i64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLint64 value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1i64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1i64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform1i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1i64vARB(GLuint program, GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1i64vARB) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform1i64vARB *cmd;
+ debug_print_marshal("ProgramUniform1i64vARB");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1i64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1i64vARB");
+ CALL_ProgramUniform1i64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* VertexAttrib1dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib1dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1dvNV(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1dvNV);
+ struct marshal_cmd_VertexAttrib1dvNV *cmd;
+ debug_print_marshal("VertexAttrib1dvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1dvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1dvNV");
+ CALL_VertexAttrib1dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetSemaphoreParameterui64vEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSemaphoreParameterui64vEXT(GLuint semaphore, GLenum pname, GLuint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSemaphoreParameterui64vEXT");
+ CALL_GetSemaphoreParameterui64vEXT(ctx->CurrentServerDispatch, (semaphore, pname, params));
+}
+
+
+/* TexStorage3DMultisample: marshalled asynchronously */
+struct marshal_cmd_TexStorage3DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TexStorage3DMultisample(struct gl_context *ctx, const struct marshal_cmd_TexStorage3DMultisample *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TexStorage3DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorage3DMultisample(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorage3DMultisample);
+ struct marshal_cmd_TexStorage3DMultisample *cmd;
+ debug_print_marshal("TexStorage3DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorage3DMultisample, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorage3DMultisample");
+ CALL_TexStorage3DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+
+
+/* SamplerParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameteriv(GLuint sampler, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SamplerParameteriv");
+ CALL_SamplerParameteriv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* VertexAttribP3uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP3uiv(GLuint index, GLenum type, GLboolean normalized, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribP3uiv");
+ CALL_VertexAttribP3uiv(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* ScissorIndexedv: marshalled asynchronously */
+struct marshal_cmd_ScissorIndexedv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_ScissorIndexedv(struct gl_context *ctx, const struct marshal_cmd_ScissorIndexedv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint * v = cmd->v;
+ CALL_ScissorIndexedv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_ScissorIndexedv(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ScissorIndexedv);
+ struct marshal_cmd_ScissorIndexedv *cmd;
+ debug_print_marshal("ScissorIndexedv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ScissorIndexedv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ScissorIndexedv");
+ CALL_ScissorIndexedv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetStringi: marshalled synchronously */
+static const GLubyte * GLAPIENTRY
+_mesa_marshal_GetStringi(GLenum name, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetStringi");
+ return CALL_GetStringi(ctx->CurrentServerDispatch, (name, index));
+}
+
+
+/* Uniform2dv: marshalled asynchronously */
+struct marshal_cmd_Uniform2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLdouble value[count][2] */
+};
+static inline void
+_mesa_unmarshal_Uniform2dv(struct gl_context *ctx, const struct marshal_cmd_Uniform2dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform2dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2dv(GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2dv) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform2dv *cmd;
+ debug_print_marshal("Uniform2dv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2dv");
+ CALL_Uniform2dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* VertexAttrib4dv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4dv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4dv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib4dv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4dv);
+ struct marshal_cmd_VertexAttrib4dv *cmd;
+ debug_print_marshal("VertexAttrib4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4dv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4dv");
+ CALL_VertexAttrib4dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* CreateTextures: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateTextures(GLenum target, GLsizei n, GLuint * textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateTextures");
+ CALL_CreateTextures(ctx->CurrentServerDispatch, (target, n, textures));
+}
+
+
+/* EvalCoord2dv: marshalled asynchronously */
+struct marshal_cmd_EvalCoord2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble u[2];
+};
+static inline void
+_mesa_unmarshal_EvalCoord2dv(struct gl_context *ctx, const struct marshal_cmd_EvalCoord2dv *cmd)
+{
+ const GLdouble * u = cmd->u;
+ CALL_EvalCoord2dv(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord2dv(const GLdouble * u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord2dv);
+ struct marshal_cmd_EvalCoord2dv *cmd;
+ debug_print_marshal("EvalCoord2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord2dv, cmd_size);
+ memcpy(cmd->u, u, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord2dv");
+ CALL_EvalCoord2dv(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* VertexAttrib1fNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1fNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1fNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1fNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ CALL_VertexAttrib1fNV(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1fNV(GLuint index, GLfloat x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1fNV);
+ struct marshal_cmd_VertexAttrib1fNV *cmd;
+ debug_print_marshal("VertexAttrib1fNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1fNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1fNV");
+ CALL_VertexAttrib1fNV(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* CompressedTexSubImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexSubImage1D(GLenum target, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexSubImage1D");
+ CALL_CompressedTexSubImage1D(ctx->CurrentServerDispatch, (target, level, xoffset, width, format, imageSize, data));
+}
+
+
+/* GetSeparableFilter: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSeparableFilter(GLenum target, GLenum format, GLenum type, GLvoid * row, GLvoid * column, GLvoid * span)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSeparableFilter");
+ CALL_GetSeparableFilter(ctx->CurrentServerDispatch, (target, format, type, row, column, span));
+}
+
+
+/* FeedbackBuffer: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_FeedbackBuffer(GLsizei size, GLenum type, GLfloat * buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("FeedbackBuffer");
+ CALL_FeedbackBuffer(ctx->CurrentServerDispatch, (size, type, buffer));
+}
+
+
+/* RasterPos2iv: marshalled asynchronously */
+struct marshal_cmd_RasterPos2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[2];
+};
+static inline void
+_mesa_unmarshal_RasterPos2iv(struct gl_context *ctx, const struct marshal_cmd_RasterPos2iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_RasterPos2iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos2iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos2iv);
+ struct marshal_cmd_RasterPos2iv *cmd;
+ debug_print_marshal("RasterPos2iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos2iv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos2iv");
+ CALL_RasterPos2iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexImage1D(GLenum target, GLint level, GLint internalformat, GLsizei width, GLint border, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexImage1D");
+ CALL_TexImage1D(ctx->CurrentServerDispatch, (target, level, internalformat, width, border, format, type, pixels));
+}
+
+
+/* MultiDrawElementsEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawElementsEXT(GLenum mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiDrawElementsEXT");
+ CALL_MultiDrawElementsEXT(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount));
+}
+
+
+/* GetnSeparableFilterARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnSeparableFilterARB(GLenum target, GLenum format, GLenum type, GLsizei rowBufSize, GLvoid * row, GLsizei columnBufSize, GLvoid * column, GLvoid * span)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnSeparableFilterARB");
+ CALL_GetnSeparableFilterARB(ctx->CurrentServerDispatch, (target, format, type, rowBufSize, row, columnBufSize, column, span));
+}
+
+
+/* FrontFace: marshalled asynchronously */
+struct marshal_cmd_FrontFace
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_FrontFace(struct gl_context *ctx, const struct marshal_cmd_FrontFace *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_FrontFace(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_FrontFace(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FrontFace);
+ struct marshal_cmd_FrontFace *cmd;
+ debug_print_marshal("FrontFace");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FrontFace, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FrontFace");
+ CALL_FrontFace(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* MultiModeDrawArraysIBM: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiModeDrawArraysIBM(const GLenum * mode, const GLint * first, const GLsizei * count, GLsizei primcount, GLint modestride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiModeDrawArraysIBM");
+ CALL_MultiModeDrawArraysIBM(ctx->CurrentServerDispatch, (mode, first, count, primcount, modestride));
+}
+
+
+/* Normal3dv: marshalled asynchronously */
+struct marshal_cmd_Normal3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_Normal3dv(struct gl_context *ctx, const struct marshal_cmd_Normal3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Normal3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3dv);
+ struct marshal_cmd_Normal3dv *cmd;
+ debug_print_marshal("Normal3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3dv");
+ CALL_Normal3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Lightf: marshalled asynchronously */
+struct marshal_cmd_Lightf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum light;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_Lightf(struct gl_context *ctx, const struct marshal_cmd_Lightf *cmd)
+{
+ const GLenum light = cmd->light;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_Lightf(ctx->CurrentServerDispatch, (light, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Lightf(GLenum light, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Lightf);
+ struct marshal_cmd_Lightf *cmd;
+ debug_print_marshal("Lightf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Lightf, cmd_size);
+ cmd->light = light;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Lightf");
+ CALL_Lightf(ctx->CurrentServerDispatch, (light, pname, param));
+}
+
+
+/* MatrixMode: marshalled asynchronously */
+struct marshal_cmd_MatrixMode
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_MatrixMode(struct gl_context *ctx, const struct marshal_cmd_MatrixMode *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_MatrixMode(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_MatrixMode(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MatrixMode);
+ struct marshal_cmd_MatrixMode *cmd;
+ debug_print_marshal("MatrixMode");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MatrixMode, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MatrixMode");
+ CALL_MatrixMode(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* GetPixelMapusv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPixelMapusv(GLenum map, GLushort * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPixelMapusv");
+ CALL_GetPixelMapusv(ctx->CurrentServerDispatch, (map, values));
+}
+
+
+/* Lighti: marshalled asynchronously */
+struct marshal_cmd_Lighti
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum light;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_Lighti(struct gl_context *ctx, const struct marshal_cmd_Lighti *cmd)
+{
+ const GLenum light = cmd->light;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_Lighti(ctx->CurrentServerDispatch, (light, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Lighti(GLenum light, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Lighti);
+ struct marshal_cmd_Lighti *cmd;
+ debug_print_marshal("Lighti");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Lighti, cmd_size);
+ cmd->light = light;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Lighti");
+ CALL_Lighti(ctx->CurrentServerDispatch, (light, pname, param));
+}
+
+
+/* GetFragDataIndex: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetFragDataIndex(GLuint program, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFragDataIndex");
+ return CALL_GetFragDataIndex(ctx->CurrentServerDispatch, (program, name));
+}
+
+
+/* Lightx: marshalled asynchronously */
+struct marshal_cmd_Lightx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum light;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_Lightx(struct gl_context *ctx, const struct marshal_cmd_Lightx *cmd)
+{
+ const GLenum light = cmd->light;
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_Lightx(ctx->CurrentServerDispatch, (light, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Lightx(GLenum light, GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Lightx);
+ struct marshal_cmd_Lightx *cmd;
+ debug_print_marshal("Lightx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Lightx, cmd_size);
+ cmd->light = light;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Lightx");
+ CALL_Lightx(ctx->CurrentServerDispatch, (light, pname, param));
+}
+
+
+/* ProgramUniform3fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLfloat value[count][3] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 12;
+ CALL_ProgramUniform3fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3fv(GLuint program, GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3fv) + safe_mul(count, 12);
+ struct marshal_cmd_ProgramUniform3fv *cmd;
+ debug_print_marshal("ProgramUniform3fv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3fv");
+ CALL_ProgramUniform3fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* MultMatrixd: marshalled asynchronously */
+struct marshal_cmd_MultMatrixd
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble m[16];
+};
+static inline void
+_mesa_unmarshal_MultMatrixd(struct gl_context *ctx, const struct marshal_cmd_MultMatrixd *cmd)
+{
+ const GLdouble * m = cmd->m;
+ CALL_MultMatrixd(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultMatrixd(const GLdouble * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultMatrixd);
+ struct marshal_cmd_MultMatrixd *cmd;
+ debug_print_marshal("MultMatrixd");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultMatrixd, cmd_size);
+ memcpy(cmd->m, m, 128);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultMatrixd");
+ CALL_MultMatrixd(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* MultMatrixf: marshalled asynchronously */
+struct marshal_cmd_MultMatrixf
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat m[16];
+};
+static inline void
+_mesa_unmarshal_MultMatrixf(struct gl_context *ctx, const struct marshal_cmd_MultMatrixf *cmd)
+{
+ const GLfloat * m = cmd->m;
+ CALL_MultMatrixf(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultMatrixf(const GLfloat * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultMatrixf);
+ struct marshal_cmd_MultMatrixf *cmd;
+ debug_print_marshal("MultMatrixf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultMatrixf, cmd_size);
+ memcpy(cmd->m, m, 64);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultMatrixf");
+ CALL_MultMatrixf(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* Uniform4ui64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform4ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLuint64 value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4ui64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform4ui64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 32;
+ CALL_Uniform4ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4ui64vARB(GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4ui64vARB) + safe_mul(count, 32);
+ struct marshal_cmd_Uniform4ui64vARB *cmd;
+ debug_print_marshal("Uniform4ui64vARB");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4ui64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4ui64vARB");
+ CALL_Uniform4ui64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* MultiTexCoord4fvARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4fvARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat * v = cmd->v;
+ CALL_MultiTexCoord4fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4fvARB(GLenum target, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4fvARB);
+ struct marshal_cmd_MultiTexCoord4fvARB *cmd;
+ debug_print_marshal("MultiTexCoord4fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4fvARB, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4fvARB");
+ CALL_MultiTexCoord4fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* UniformMatrix2x3fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix2x3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 24) bytes are GLfloat value[count][6] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix2x3fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix2x3fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 24;
+ CALL_UniformMatrix2x3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix2x3fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix2x3fv) + safe_mul(count, 24);
+ struct marshal_cmd_UniformMatrix2x3fv *cmd;
+ debug_print_marshal("UniformMatrix2x3fv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix2x3fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix2x3fv");
+ CALL_UniformMatrix2x3fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* SamplerParameterf: marshalled asynchronously */
+struct marshal_cmd_SamplerParameterf
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint sampler;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_SamplerParameterf(struct gl_context *ctx, const struct marshal_cmd_SamplerParameterf *cmd)
+{
+ const GLuint sampler = cmd->sampler;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_SamplerParameterf(ctx->CurrentServerDispatch, (sampler, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameterf(GLuint sampler, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SamplerParameterf);
+ struct marshal_cmd_SamplerParameterf *cmd;
+ debug_print_marshal("SamplerParameterf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SamplerParameterf, cmd_size);
+ cmd->sampler = sampler;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SamplerParameterf");
+ CALL_SamplerParameterf(ctx->CurrentServerDispatch, (sampler, pname, param));
+}
+
+
+/* UniformMatrix3dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 72) bytes are GLdouble value[count][9] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 72;
+ CALL_UniformMatrix3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3dv) + safe_mul(count, 72);
+ struct marshal_cmd_UniformMatrix3dv *cmd;
+ debug_print_marshal("UniformMatrix3dv");
+ if (unlikely(safe_mul(count, 72) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 72);
+ variable_data += count * 72;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3dv");
+ CALL_UniformMatrix3dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* PointParameterx: marshalled asynchronously */
+struct marshal_cmd_PointParameterx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_PointParameterx(struct gl_context *ctx, const struct marshal_cmd_PointParameterx *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_PointParameterx(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PointParameterx(GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PointParameterx);
+ struct marshal_cmd_PointParameterx *cmd;
+ debug_print_marshal("PointParameterx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PointParameterx, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PointParameterx");
+ CALL_PointParameterx(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* DrawArrays: marshalled asynchronously */
+struct marshal_cmd_DrawArrays
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLint first;
+ GLsizei count;
+};
+static inline void
+_mesa_unmarshal_DrawArrays(struct gl_context *ctx, const struct marshal_cmd_DrawArrays *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLint first = cmd->first;
+ const GLsizei count = cmd->count;
+ CALL_DrawArrays(ctx->CurrentServerDispatch, (mode, first, count));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawArrays(GLenum mode, GLint first, GLsizei count)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawArrays);
+ struct marshal_cmd_DrawArrays *cmd;
+ debug_print_marshal("DrawArrays");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawArrays, cmd_size);
+ cmd->mode = mode;
+ cmd->first = first;
+ cmd->count = count;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawArrays");
+ CALL_DrawArrays(ctx->CurrentServerDispatch, (mode, first, count));
+}
+
+
+/* Uniform3dv: marshalled asynchronously */
+struct marshal_cmd_Uniform3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 24) bytes are GLdouble value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3dv(struct gl_context *ctx, const struct marshal_cmd_Uniform3dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 24;
+ CALL_Uniform3dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3dv(GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3dv) + safe_mul(count, 24);
+ struct marshal_cmd_Uniform3dv *cmd;
+ debug_print_marshal("Uniform3dv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3dv");
+ CALL_Uniform3dv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* PointParameteri: marshalled asynchronously */
+struct marshal_cmd_PointParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_PointParameteri(struct gl_context *ctx, const struct marshal_cmd_PointParameteri *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_PointParameteri(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PointParameteri(GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PointParameteri);
+ struct marshal_cmd_PointParameteri *cmd;
+ debug_print_marshal("PointParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PointParameteri, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PointParameteri");
+ CALL_PointParameteri(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* PointParameterf: marshalled asynchronously */
+struct marshal_cmd_PointParameterf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_PointParameterf(struct gl_context *ctx, const struct marshal_cmd_PointParameterf *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_PointParameterf(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PointParameterf(GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PointParameterf);
+ struct marshal_cmd_PointParameterf *cmd;
+ debug_print_marshal("PointParameterf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PointParameterf, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PointParameterf");
+ CALL_PointParameterf(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* VertexAttribBinding: marshalled asynchronously */
+struct marshal_cmd_VertexAttribBinding
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint attribindex;
+ GLuint bindingindex;
+};
+static inline void
+_mesa_unmarshal_VertexAttribBinding(struct gl_context *ctx, const struct marshal_cmd_VertexAttribBinding *cmd)
+{
+ const GLuint attribindex = cmd->attribindex;
+ const GLuint bindingindex = cmd->bindingindex;
+ CALL_VertexAttribBinding(ctx->CurrentServerDispatch, (attribindex, bindingindex));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribBinding(GLuint attribindex, GLuint bindingindex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribBinding);
+ struct marshal_cmd_VertexAttribBinding *cmd;
+ debug_print_marshal("VertexAttribBinding");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribBinding, cmd_size);
+ cmd->attribindex = attribindex;
+ cmd->bindingindex = bindingindex;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribBinding");
+ CALL_VertexAttribBinding(ctx->CurrentServerDispatch, (attribindex, bindingindex));
+}
+
+
+/* TextureSubImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureSubImage2D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureSubImage2D");
+ CALL_TextureSubImage2D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, width, height, format, type, pixels));
+}
+
+
+/* CreateShader: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_CreateShader(GLenum type)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateShader");
+ return CALL_CreateShader(ctx->CurrentServerDispatch, (type));
+}
+
+
+/* ProgramUniform1dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLdouble value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform1dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1dv(GLuint program, GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1dv) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform1dv *cmd;
+ debug_print_marshal("ProgramUniform1dv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1dv");
+ CALL_ProgramUniform1dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetProgramEnvParameterfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramEnvParameterfvARB(GLenum target, GLuint index, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramEnvParameterfvARB");
+ CALL_GetProgramEnvParameterfvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* DeleteBuffers: marshalled asynchronously */
+struct marshal_cmd_DeleteBuffers
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint buffer[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteBuffers(struct gl_context *ctx, const struct marshal_cmd_DeleteBuffers *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * buffer;
+ const char *variable_data = (const char *) (cmd + 1);
+ buffer = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteBuffers(ctx->CurrentServerDispatch, (n, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteBuffers(GLsizei n, const GLuint * buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteBuffers) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteBuffers *cmd;
+ debug_print_marshal("DeleteBuffers");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteBuffers, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, buffer, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteBuffers");
+ CALL_DeleteBuffers(ctx->CurrentServerDispatch, (n, buffer));
+}
+
+
+/* GetBufferSubData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBufferSubData(GLenum target, GLintptr offset, GLsizeiptr size, GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBufferSubData");
+ CALL_GetBufferSubData(ctx->CurrentServerDispatch, (target, offset, size, data));
+}
+
+
+/* GetNamedRenderbufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedRenderbufferParameteriv(GLuint renderbuffer, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedRenderbufferParameteriv");
+ CALL_GetNamedRenderbufferParameteriv(ctx->CurrentServerDispatch, (renderbuffer, pname, params));
+}
+
+
+/* GetPerfMonitorGroupsAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorGroupsAMD(GLint * numGroups, GLsizei groupsSize, GLuint * groups)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorGroupsAMD");
+ CALL_GetPerfMonitorGroupsAMD(ctx->CurrentServerDispatch, (numGroups, groupsSize, groups));
+}
+
+
+/* VertexAttribP2ui: marshalled asynchronously */
+struct marshal_cmd_VertexAttribP2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLenum type;
+ GLboolean normalized;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexAttribP2ui(struct gl_context *ctx, const struct marshal_cmd_VertexAttribP2ui *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint value = cmd->value;
+ CALL_VertexAttribP2ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribP2ui(GLuint index, GLenum type, GLboolean normalized, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribP2ui);
+ struct marshal_cmd_VertexAttribP2ui *cmd;
+ debug_print_marshal("VertexAttribP2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribP2ui, cmd_size);
+ cmd->index = index;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribP2ui");
+ CALL_VertexAttribP2ui(ctx->CurrentServerDispatch, (index, type, normalized, value));
+}
+
+
+/* ProgramUniform4dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLdouble value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 32;
+ CALL_ProgramUniform4dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4dv(GLuint program, GLint location, GLsizei count, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4dv) + safe_mul(count, 32);
+ struct marshal_cmd_ProgramUniform4dv *cmd;
+ debug_print_marshal("ProgramUniform4dv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4dv");
+ CALL_ProgramUniform4dv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetMinmaxParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMinmaxParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMinmaxParameteriv");
+ CALL_GetMinmaxParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* DrawTexivOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexivOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLint coords[5];
+};
+static inline void
+_mesa_unmarshal_DrawTexivOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexivOES *cmd)
+{
+ const GLint * coords = cmd->coords;
+ CALL_DrawTexivOES(ctx->CurrentServerDispatch, (coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexivOES(const GLint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexivOES);
+ struct marshal_cmd_DrawTexivOES *cmd;
+ debug_print_marshal("DrawTexivOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexivOES, cmd_size);
+ memcpy(cmd->coords, coords, 20);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexivOES");
+ CALL_DrawTexivOES(ctx->CurrentServerDispatch, (coords));
+}
+
+
+/* CopyTexImage1D: marshalled asynchronously */
+struct marshal_cmd_CopyTexImage1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint level;
+ GLenum internalformat;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLint border;
+};
+static inline void
+_mesa_unmarshal_CopyTexImage1D(struct gl_context *ctx, const struct marshal_cmd_CopyTexImage1D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint level = cmd->level;
+ const GLenum internalformat = cmd->internalformat;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLint border = cmd->border;
+ CALL_CopyTexImage1D(ctx->CurrentServerDispatch, (target, level, internalformat, x, y, width, border));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTexImage1D(GLenum target, GLint level, GLenum internalformat, GLint x, GLint y, GLsizei width, GLint border)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTexImage1D);
+ struct marshal_cmd_CopyTexImage1D *cmd;
+ debug_print_marshal("CopyTexImage1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTexImage1D, cmd_size);
+ cmd->target = target;
+ cmd->level = level;
+ cmd->internalformat = internalformat;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->border = border;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTexImage1D");
+ CALL_CopyTexImage1D(ctx->CurrentServerDispatch, (target, level, internalformat, x, y, width, border));
+}
+
+
+/* InvalidateNamedFramebufferData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_InvalidateNamedFramebufferData(GLuint framebuffer, GLsizei numAttachments, const GLenum * attachments)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("InvalidateNamedFramebufferData");
+ CALL_InvalidateNamedFramebufferData(ctx->CurrentServerDispatch, (framebuffer, numAttachments, attachments));
+}
+
+
+/* SemaphoreParameterui64vEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SemaphoreParameterui64vEXT(GLuint semaphore, GLenum pname, const GLuint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SemaphoreParameterui64vEXT");
+ CALL_SemaphoreParameterui64vEXT(ctx->CurrentServerDispatch, (semaphore, pname, params));
+}
+
+
+/* GetnColorTableARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnColorTableARB(GLenum target, GLenum format, GLenum type, GLsizei bufSize, GLvoid * table)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnColorTableARB");
+ CALL_GetnColorTableARB(ctx->CurrentServerDispatch, (target, format, type, bufSize, table));
+}
+
+
+/* VertexAttribFormat: marshalled asynchronously */
+struct marshal_cmd_VertexAttribFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLboolean normalized;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexAttribFormat(struct gl_context *ctx, const struct marshal_cmd_VertexAttribFormat *cmd)
+{
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexAttribFormat(ctx->CurrentServerDispatch, (attribindex, size, type, normalized, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribFormat(GLuint attribindex, GLint size, GLenum type, GLboolean normalized, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribFormat);
+ struct marshal_cmd_VertexAttribFormat *cmd;
+ debug_print_marshal("VertexAttribFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribFormat, cmd_size);
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribFormat");
+ CALL_VertexAttribFormat(ctx->CurrentServerDispatch, (attribindex, size, type, normalized, relativeoffset));
+}
+
+
+/* Vertex3i: marshalled asynchronously */
+struct marshal_cmd_Vertex3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLint z;
+};
+static inline void
+_mesa_unmarshal_Vertex3i(struct gl_context *ctx, const struct marshal_cmd_Vertex3i *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ CALL_Vertex3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3i(GLint x, GLint y, GLint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3i);
+ struct marshal_cmd_Vertex3i *cmd;
+ debug_print_marshal("Vertex3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3i, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3i");
+ CALL_Vertex3i(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Vertex3f: marshalled asynchronously */
+struct marshal_cmd_Vertex3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_Vertex3f(struct gl_context *ctx, const struct marshal_cmd_Vertex3f *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_Vertex3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3f(GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3f);
+ struct marshal_cmd_Vertex3f *cmd;
+ debug_print_marshal("Vertex3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3f, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3f");
+ CALL_Vertex3f(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Vertex3d: marshalled asynchronously */
+struct marshal_cmd_Vertex3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_Vertex3d(struct gl_context *ctx, const struct marshal_cmd_Vertex3d *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_Vertex3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3d(GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3d);
+ struct marshal_cmd_Vertex3d *cmd;
+ debug_print_marshal("Vertex3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3d, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3d");
+ CALL_Vertex3d(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* GetProgramPipelineiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramPipelineiv(GLuint pipeline, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramPipelineiv");
+ CALL_GetProgramPipelineiv(ctx->CurrentServerDispatch, (pipeline, pname, params));
+}
+
+
+/* ReadBuffer: marshalled asynchronously */
+struct marshal_cmd_ReadBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_ReadBuffer(struct gl_context *ctx, const struct marshal_cmd_ReadBuffer *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_ReadBuffer(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_ReadBuffer(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ReadBuffer);
+ struct marshal_cmd_ReadBuffer *cmd;
+ debug_print_marshal("ReadBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ReadBuffer, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ReadBuffer");
+ CALL_ReadBuffer(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* ConvolutionParameteri: marshalled asynchronously */
+struct marshal_cmd_ConvolutionParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLint params;
+};
+static inline void
+_mesa_unmarshal_ConvolutionParameteri(struct gl_context *ctx, const struct marshal_cmd_ConvolutionParameteri *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLint params = cmd->params;
+ CALL_ConvolutionParameteri(ctx->CurrentServerDispatch, (target, pname, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionParameteri(GLenum target, GLenum pname, GLint params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ConvolutionParameteri);
+ struct marshal_cmd_ConvolutionParameteri *cmd;
+ debug_print_marshal("ConvolutionParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ConvolutionParameteri, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->params = params;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ConvolutionParameteri");
+ CALL_ConvolutionParameteri(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetTexParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexParameterIiv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexParameterIiv");
+ CALL_GetTexParameterIiv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* Vertex3s: marshalled asynchronously */
+struct marshal_cmd_Vertex3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x;
+ GLshort y;
+ GLshort z;
+};
+static inline void
+_mesa_unmarshal_Vertex3s(struct gl_context *ctx, const struct marshal_cmd_Vertex3s *cmd)
+{
+ const GLshort x = cmd->x;
+ const GLshort y = cmd->y;
+ const GLshort z = cmd->z;
+ CALL_Vertex3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3s(GLshort x, GLshort y, GLshort z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3s);
+ struct marshal_cmd_Vertex3s *cmd;
+ debug_print_marshal("Vertex3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3s, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3s");
+ CALL_Vertex3s(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* ConvolutionParameterf: marshalled asynchronously */
+struct marshal_cmd_ConvolutionParameterf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLfloat params;
+};
+static inline void
+_mesa_unmarshal_ConvolutionParameterf(struct gl_context *ctx, const struct marshal_cmd_ConvolutionParameterf *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLfloat params = cmd->params;
+ CALL_ConvolutionParameterf(ctx->CurrentServerDispatch, (target, pname, params));
+}
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionParameterf(GLenum target, GLenum pname, GLfloat params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ConvolutionParameterf);
+ struct marshal_cmd_ConvolutionParameterf *cmd;
+ debug_print_marshal("ConvolutionParameterf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ConvolutionParameterf, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->params = params;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ConvolutionParameterf");
+ CALL_ConvolutionParameterf(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetColorTableParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetColorTableParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetColorTableParameteriv");
+ CALL_GetColorTableParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetTransformFeedbackVarying: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTransformFeedbackVarying(GLuint program, GLuint index, GLsizei bufSize, GLsizei * length, GLsizei * size, GLenum * type, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTransformFeedbackVarying");
+ CALL_GetTransformFeedbackVarying(ctx->CurrentServerDispatch, (program, index, bufSize, length, size, type, name));
+}
+
+
+/* GetNextPerfQueryIdINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNextPerfQueryIdINTEL(GLuint queryId, GLuint * nextQueryId)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNextPerfQueryIdINTEL");
+ CALL_GetNextPerfQueryIdINTEL(ctx->CurrentServerDispatch, (queryId, nextQueryId));
+}
+
+
+/* TexCoord3fv: marshalled asynchronously */
+struct marshal_cmd_TexCoord3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_TexCoord3fv(struct gl_context *ctx, const struct marshal_cmd_TexCoord3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_TexCoord3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3fv);
+ struct marshal_cmd_TexCoord3fv *cmd;
+ debug_print_marshal("TexCoord3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3fv");
+ CALL_TexCoord3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TextureBarrierNV: marshalled asynchronously */
+struct marshal_cmd_TextureBarrierNV
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_TextureBarrierNV(struct gl_context *ctx, const struct marshal_cmd_TextureBarrierNV *cmd)
+{
+ CALL_TextureBarrierNV(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureBarrierNV(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureBarrierNV);
+ struct marshal_cmd_TextureBarrierNV *cmd;
+ debug_print_marshal("TextureBarrierNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureBarrierNV, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureBarrierNV");
+ CALL_TextureBarrierNV(ctx->CurrentServerDispatch, ());
+}
+
+
+/* GetProgramInterfaceiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramInterfaceiv(GLuint program, GLenum programInterface, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramInterfaceiv");
+ CALL_GetProgramInterfaceiv(ctx->CurrentServerDispatch, (program, programInterface, pname, params));
+}
+
+
+/* VertexAttribL1ui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL1ui64vARB(GLuint index, const GLuint64EXT * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribL1ui64vARB");
+ CALL_VertexAttribL1ui64vARB(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* ProgramLocalParameter4fARB: marshalled asynchronously */
+struct marshal_cmd_ProgramLocalParameter4fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_ProgramLocalParameter4fARB(struct gl_context *ctx, const struct marshal_cmd_ProgramLocalParameter4fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_ProgramLocalParameter4fARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramLocalParameter4fARB(GLenum target, GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramLocalParameter4fARB);
+ struct marshal_cmd_ProgramLocalParameter4fARB *cmd;
+ debug_print_marshal("ProgramLocalParameter4fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramLocalParameter4fARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramLocalParameter4fARB");
+ CALL_ProgramLocalParameter4fARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+
+
+/* PauseTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_PauseTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PauseTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_PauseTransformFeedback *cmd)
+{
+ CALL_PauseTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PauseTransformFeedback(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PauseTransformFeedback);
+ struct marshal_cmd_PauseTransformFeedback *cmd;
+ debug_print_marshal("PauseTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PauseTransformFeedback, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PauseTransformFeedback");
+ CALL_PauseTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+
+
+/* DeleteShader: marshalled asynchronously */
+struct marshal_cmd_DeleteShader
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_DeleteShader(struct gl_context *ctx, const struct marshal_cmd_DeleteShader *cmd)
+{
+ const GLuint program = cmd->program;
+ CALL_DeleteShader(ctx->CurrentServerDispatch, (program));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteShader(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteShader);
+ struct marshal_cmd_DeleteShader *cmd;
+ debug_print_marshal("DeleteShader");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteShader, cmd_size);
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteShader");
+ CALL_DeleteShader(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* NamedFramebufferRenderbuffer: marshalled asynchronously */
+struct marshal_cmd_NamedFramebufferRenderbuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint framebuffer;
+ GLenum attachment;
+ GLenum renderbuffertarget;
+ GLuint renderbuffer;
+};
+static inline void
+_mesa_unmarshal_NamedFramebufferRenderbuffer(struct gl_context *ctx, const struct marshal_cmd_NamedFramebufferRenderbuffer *cmd)
+{
+ const GLuint framebuffer = cmd->framebuffer;
+ const GLenum attachment = cmd->attachment;
+ const GLenum renderbuffertarget = cmd->renderbuffertarget;
+ const GLuint renderbuffer = cmd->renderbuffer;
+ CALL_NamedFramebufferRenderbuffer(ctx->CurrentServerDispatch, (framebuffer, attachment, renderbuffertarget, renderbuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferRenderbuffer(GLuint framebuffer, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedFramebufferRenderbuffer);
+ struct marshal_cmd_NamedFramebufferRenderbuffer *cmd;
+ debug_print_marshal("NamedFramebufferRenderbuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedFramebufferRenderbuffer, cmd_size);
+ cmd->framebuffer = framebuffer;
+ cmd->attachment = attachment;
+ cmd->renderbuffertarget = renderbuffertarget;
+ cmd->renderbuffer = renderbuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedFramebufferRenderbuffer");
+ CALL_NamedFramebufferRenderbuffer(ctx->CurrentServerDispatch, (framebuffer, attachment, renderbuffertarget, renderbuffer));
+}
+
+
+/* CompileShader: marshalled asynchronously */
+struct marshal_cmd_CompileShader
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint shader;
+};
+static inline void
+_mesa_unmarshal_CompileShader(struct gl_context *ctx, const struct marshal_cmd_CompileShader *cmd)
+{
+ const GLuint shader = cmd->shader;
+ CALL_CompileShader(ctx->CurrentServerDispatch, (shader));
+}
+static void GLAPIENTRY
+_mesa_marshal_CompileShader(GLuint shader)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CompileShader);
+ struct marshal_cmd_CompileShader *cmd;
+ debug_print_marshal("CompileShader");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CompileShader, cmd_size);
+ cmd->shader = shader;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CompileShader");
+ CALL_CompileShader(ctx->CurrentServerDispatch, (shader));
+}
+
+
+/* Vertex2iv: marshalled asynchronously */
+struct marshal_cmd_Vertex2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[2];
+};
+static inline void
+_mesa_unmarshal_Vertex2iv(struct gl_context *ctx, const struct marshal_cmd_Vertex2iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Vertex2iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2iv);
+ struct marshal_cmd_Vertex2iv *cmd;
+ debug_print_marshal("Vertex2iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2iv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2iv");
+ CALL_Vertex2iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetVertexArrayIndexediv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexArrayIndexediv(GLuint vaobj, GLuint index, GLenum pname, GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexArrayIndexediv");
+ CALL_GetVertexArrayIndexediv(ctx->CurrentServerDispatch, (vaobj, index, pname, param));
+}
+
+
+/* TexParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexParameterIiv(GLenum target, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexParameterIiv");
+ CALL_TexParameterIiv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TexGendv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexGendv(GLenum coord, GLenum pname, const GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexGendv");
+ CALL_TexGendv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* ResetMinmax: marshalled asynchronously */
+struct marshal_cmd_ResetMinmax
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+};
+static inline void
+_mesa_unmarshal_ResetMinmax(struct gl_context *ctx, const struct marshal_cmd_ResetMinmax *cmd)
+{
+ const GLenum target = cmd->target;
+ CALL_ResetMinmax(ctx->CurrentServerDispatch, (target));
+}
+static void GLAPIENTRY
+_mesa_marshal_ResetMinmax(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ResetMinmax);
+ struct marshal_cmd_ResetMinmax *cmd;
+ debug_print_marshal("ResetMinmax");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ResetMinmax, cmd_size);
+ cmd->target = target;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ResetMinmax");
+ CALL_ResetMinmax(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* SampleCoverage: marshalled asynchronously */
+struct marshal_cmd_SampleCoverage
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampf value;
+ GLboolean invert;
+};
+static inline void
+_mesa_unmarshal_SampleCoverage(struct gl_context *ctx, const struct marshal_cmd_SampleCoverage *cmd)
+{
+ const GLclampf value = cmd->value;
+ const GLboolean invert = cmd->invert;
+ CALL_SampleCoverage(ctx->CurrentServerDispatch, (value, invert));
+}
+static void GLAPIENTRY
+_mesa_marshal_SampleCoverage(GLclampf value, GLboolean invert)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SampleCoverage);
+ struct marshal_cmd_SampleCoverage *cmd;
+ debug_print_marshal("SampleCoverage");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SampleCoverage, cmd_size);
+ cmd->value = value;
+ cmd->invert = invert;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SampleCoverage");
+ CALL_SampleCoverage(ctx->CurrentServerDispatch, (value, invert));
+}
+
+
+/* GenerateTextureMipmap: marshalled asynchronously */
+struct marshal_cmd_GenerateTextureMipmap
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+};
+static inline void
+_mesa_unmarshal_GenerateTextureMipmap(struct gl_context *ctx, const struct marshal_cmd_GenerateTextureMipmap *cmd)
+{
+ const GLuint texture = cmd->texture;
+ CALL_GenerateTextureMipmap(ctx->CurrentServerDispatch, (texture));
+}
+static void GLAPIENTRY
+_mesa_marshal_GenerateTextureMipmap(GLuint texture)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GenerateTextureMipmap);
+ struct marshal_cmd_GenerateTextureMipmap *cmd;
+ debug_print_marshal("GenerateTextureMipmap");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GenerateTextureMipmap, cmd_size);
+ cmd->texture = texture;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GenerateTextureMipmap");
+ CALL_GenerateTextureMipmap(ctx->CurrentServerDispatch, (texture));
+}
+
+
+/* DeleteProgramsARB: marshalled asynchronously */
+struct marshal_cmd_DeleteProgramsARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint programs[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteProgramsARB(struct gl_context *ctx, const struct marshal_cmd_DeleteProgramsARB *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * programs;
+ const char *variable_data = (const char *) (cmd + 1);
+ programs = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteProgramsARB(ctx->CurrentServerDispatch, (n, programs));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteProgramsARB(GLsizei n, const GLuint * programs)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteProgramsARB) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteProgramsARB *cmd;
+ debug_print_marshal("DeleteProgramsARB");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteProgramsARB, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, programs, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteProgramsARB");
+ CALL_DeleteProgramsARB(ctx->CurrentServerDispatch, (n, programs));
+}
+
+
+/* ShadeModel: marshalled asynchronously */
+struct marshal_cmd_ShadeModel
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_ShadeModel(struct gl_context *ctx, const struct marshal_cmd_ShadeModel *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_ShadeModel(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_ShadeModel(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ShadeModel);
+ struct marshal_cmd_ShadeModel *cmd;
+ debug_print_marshal("ShadeModel");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ShadeModel, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ShadeModel");
+ CALL_ShadeModel(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* CreateQueries: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateQueries(GLenum target, GLsizei n, GLuint * ids)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateQueries");
+ CALL_CreateQueries(ctx->CurrentServerDispatch, (target, n, ids));
+}
+
+
+/* MultiDrawArrays: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawArrays(GLenum mode, const GLint * first, const GLsizei * count, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiDrawArrays");
+ CALL_MultiDrawArrays(ctx->CurrentServerDispatch, (mode, first, count, primcount));
+}
+
+
+/* GetProgramLocalParameterdvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramLocalParameterdvARB(GLenum target, GLuint index, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramLocalParameterdvARB");
+ CALL_GetProgramLocalParameterdvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* MapBufferRange: marshalled synchronously */
+static GLvoid * GLAPIENTRY
+_mesa_marshal_MapBufferRange(GLenum target, GLintptr offset, GLsizeiptr length, GLbitfield access)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MapBufferRange");
+ return CALL_MapBufferRange(ctx->CurrentServerDispatch, (target, offset, length, access));
+}
+
+
+/* DispatchCompute: marshalled asynchronously */
+struct marshal_cmd_DispatchCompute
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint num_groups_x;
+ GLuint num_groups_y;
+ GLuint num_groups_z;
+};
+static inline void
+_mesa_unmarshal_DispatchCompute(struct gl_context *ctx, const struct marshal_cmd_DispatchCompute *cmd)
+{
+ const GLuint num_groups_x = cmd->num_groups_x;
+ const GLuint num_groups_y = cmd->num_groups_y;
+ const GLuint num_groups_z = cmd->num_groups_z;
+ CALL_DispatchCompute(ctx->CurrentServerDispatch, (num_groups_x, num_groups_y, num_groups_z));
+}
+static void GLAPIENTRY
+_mesa_marshal_DispatchCompute(GLuint num_groups_x, GLuint num_groups_y, GLuint num_groups_z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DispatchCompute);
+ struct marshal_cmd_DispatchCompute *cmd;
+ debug_print_marshal("DispatchCompute");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DispatchCompute, cmd_size);
+ cmd->num_groups_x = num_groups_x;
+ cmd->num_groups_y = num_groups_y;
+ cmd->num_groups_z = num_groups_z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DispatchCompute");
+ CALL_DispatchCompute(ctx->CurrentServerDispatch, (num_groups_x, num_groups_y, num_groups_z));
+}
+
+
+/* UseProgramStages: marshalled asynchronously */
+struct marshal_cmd_UseProgramStages
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint pipeline;
+ GLbitfield stages;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_UseProgramStages(struct gl_context *ctx, const struct marshal_cmd_UseProgramStages *cmd)
+{
+ const GLuint pipeline = cmd->pipeline;
+ const GLbitfield stages = cmd->stages;
+ const GLuint program = cmd->program;
+ CALL_UseProgramStages(ctx->CurrentServerDispatch, (pipeline, stages, program));
+}
+static void GLAPIENTRY
+_mesa_marshal_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UseProgramStages);
+ struct marshal_cmd_UseProgramStages *cmd;
+ debug_print_marshal("UseProgramStages");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UseProgramStages, cmd_size);
+ cmd->pipeline = pipeline;
+ cmd->stages = stages;
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UseProgramStages");
+ CALL_UseProgramStages(ctx->CurrentServerDispatch, (pipeline, stages, program));
+}
+
+
+/* ProgramUniformMatrix4fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLfloat value[count][16] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 64;
+ CALL_ProgramUniformMatrix4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4fv) + safe_mul(count, 64);
+ struct marshal_cmd_ProgramUniformMatrix4fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4fv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4fv");
+ CALL_ProgramUniformMatrix4fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* FramebufferRenderbuffer: marshalled asynchronously */
+struct marshal_cmd_FramebufferRenderbuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLenum renderbuffertarget;
+ GLuint renderbuffer;
+};
+static inline void
+_mesa_unmarshal_FramebufferRenderbuffer(struct gl_context *ctx, const struct marshal_cmd_FramebufferRenderbuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLenum renderbuffertarget = cmd->renderbuffertarget;
+ const GLuint renderbuffer = cmd->renderbuffer;
+ CALL_FramebufferRenderbuffer(ctx->CurrentServerDispatch, (target, attachment, renderbuffertarget, renderbuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferRenderbuffer(GLenum target, GLenum attachment, GLenum renderbuffertarget, GLuint renderbuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferRenderbuffer);
+ struct marshal_cmd_FramebufferRenderbuffer *cmd;
+ debug_print_marshal("FramebufferRenderbuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferRenderbuffer, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->renderbuffertarget = renderbuffertarget;
+ cmd->renderbuffer = renderbuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferRenderbuffer");
+ CALL_FramebufferRenderbuffer(ctx->CurrentServerDispatch, (target, attachment, renderbuffertarget, renderbuffer));
+}
+
+
+/* IsProgramARB: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsProgramARB(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsProgramARB");
+ return CALL_IsProgramARB(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* Map2d: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Map2d(GLenum target, GLdouble u1, GLdouble u2, GLint ustride, GLint uorder, GLdouble v1, GLdouble v2, GLint vstride, GLint vorder, const GLdouble * points)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Map2d");
+ CALL_Map2d(ctx->CurrentServerDispatch, (target, u1, u2, ustride, uorder, v1, v2, vstride, vorder, points));
+}
+
+
+/* Map2f: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Map2f(GLenum target, GLfloat u1, GLfloat u2, GLint ustride, GLint uorder, GLfloat v1, GLfloat v2, GLint vstride, GLint vorder, const GLfloat * points)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Map2f");
+ CALL_Map2f(ctx->CurrentServerDispatch, (target, u1, u2, ustride, uorder, v1, v2, vstride, vorder, points));
+}
+
+
+/* ProgramStringARB: marshalled asynchronously */
+struct marshal_cmd_ProgramStringARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum format;
+ GLsizei len;
+ /* Next len bytes are GLvoid string[len] */
+};
+static inline void
+_mesa_unmarshal_ProgramStringARB(struct gl_context *ctx, const struct marshal_cmd_ProgramStringARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum format = cmd->format;
+ const GLsizei len = cmd->len;
+ const GLvoid * string;
+ const char *variable_data = (const char *) (cmd + 1);
+ string = (const GLvoid *) variable_data;
+ variable_data += len;
+ CALL_ProgramStringARB(ctx->CurrentServerDispatch, (target, format, len, string));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramStringARB(GLenum target, GLenum format, GLsizei len, const GLvoid * string)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramStringARB) + len;
+ struct marshal_cmd_ProgramStringARB *cmd;
+ debug_print_marshal("ProgramStringARB");
+ if (unlikely(len < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramStringARB, cmd_size);
+ cmd->target = target;
+ cmd->format = format;
+ cmd->len = len;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, string, len);
+ variable_data += len;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramStringARB");
+ CALL_ProgramStringARB(ctx->CurrentServerDispatch, (target, format, len, string));
+}
+
+
+/* CopyTextureSubImage2D: marshalled asynchronously */
+struct marshal_cmd_CopyTextureSubImage2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLint level;
+ GLint xoffset;
+ GLint yoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_CopyTextureSubImage2D(struct gl_context *ctx, const struct marshal_cmd_CopyTextureSubImage2D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint yoffset = cmd->yoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_CopyTextureSubImage2D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTextureSubImage2D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTextureSubImage2D);
+ struct marshal_cmd_CopyTextureSubImage2D *cmd;
+ debug_print_marshal("CopyTextureSubImage2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTextureSubImage2D, cmd_size);
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->yoffset = yoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTextureSubImage2D");
+ CALL_CopyTextureSubImage2D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, x, y, width, height));
+}
+
+
+/* MultiTexCoord4s: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort s;
+ GLshort t;
+ GLshort r;
+ GLshort q;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4s(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4s *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ const GLshort r = cmd->r;
+ const GLshort q = cmd->q;
+ CALL_MultiTexCoord4s(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4s(GLenum target, GLshort s, GLshort t, GLshort r, GLshort q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4s);
+ struct marshal_cmd_MultiTexCoord4s *cmd;
+ debug_print_marshal("MultiTexCoord4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4s, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4s");
+ CALL_MultiTexCoord4s(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+
+
+/* ViewportIndexedf: marshalled asynchronously */
+struct marshal_cmd_ViewportIndexedf
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat w;
+ GLfloat h;
+};
+static inline void
+_mesa_unmarshal_ViewportIndexedf(struct gl_context *ctx, const struct marshal_cmd_ViewportIndexedf *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat w = cmd->w;
+ const GLfloat h = cmd->h;
+ CALL_ViewportIndexedf(ctx->CurrentServerDispatch, (index, x, y, w, h));
+}
+static void GLAPIENTRY
+_mesa_marshal_ViewportIndexedf(GLuint index, GLfloat x, GLfloat y, GLfloat w, GLfloat h)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ViewportIndexedf);
+ struct marshal_cmd_ViewportIndexedf *cmd;
+ debug_print_marshal("ViewportIndexedf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ViewportIndexedf, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->w = w;
+ cmd->h = h;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ViewportIndexedf");
+ CALL_ViewportIndexedf(ctx->CurrentServerDispatch, (index, x, y, w, h));
+}
+
+
+/* MultiTexCoord4i: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint s;
+ GLint t;
+ GLint r;
+ GLint q;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4i(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4i *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ const GLint r = cmd->r;
+ const GLint q = cmd->q;
+ CALL_MultiTexCoord4i(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4i(GLenum target, GLint s, GLint t, GLint r, GLint q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4i);
+ struct marshal_cmd_MultiTexCoord4i *cmd;
+ debug_print_marshal("MultiTexCoord4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4i, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4i");
+ CALL_MultiTexCoord4i(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+
+
+/* DebugMessageControl: marshalled asynchronously */
+struct marshal_cmd_DebugMessageControl
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum source;
+ GLenum type;
+ GLenum severity;
+ GLsizei count;
+ GLboolean enabled;
+ /* Next safe_mul(count, 4) bytes are GLuint ids[count] */
+};
+static inline void
+_mesa_unmarshal_DebugMessageControl(struct gl_context *ctx, const struct marshal_cmd_DebugMessageControl *cmd)
+{
+ const GLenum source = cmd->source;
+ const GLenum type = cmd->type;
+ const GLenum severity = cmd->severity;
+ const GLsizei count = cmd->count;
+ const GLboolean enabled = cmd->enabled;
+ const GLuint * ids;
+ const char *variable_data = (const char *) (cmd + 1);
+ ids = (const GLuint *) variable_data;
+ variable_data += count * 4;
+ CALL_DebugMessageControl(ctx->CurrentServerDispatch, (source, type, severity, count, ids, enabled));
+}
+static void GLAPIENTRY
+_mesa_marshal_DebugMessageControl(GLenum source, GLenum type, GLenum severity, GLsizei count, const GLuint * ids, GLboolean enabled)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DebugMessageControl) + safe_mul(count, 4);
+ struct marshal_cmd_DebugMessageControl *cmd;
+ debug_print_marshal("DebugMessageControl");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DebugMessageControl, cmd_size);
+ cmd->source = source;
+ cmd->type = type;
+ cmd->severity = severity;
+ cmd->count = count;
+ cmd->enabled = enabled;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, ids, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DebugMessageControl");
+ CALL_DebugMessageControl(ctx->CurrentServerDispatch, (source, type, severity, count, ids, enabled));
+}
+
+
+/* MultiTexCoord4d: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLdouble s;
+ GLdouble t;
+ GLdouble r;
+ GLdouble q;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4d(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4d *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ const GLdouble r = cmd->r;
+ const GLdouble q = cmd->q;
+ CALL_MultiTexCoord4d(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4d(GLenum target, GLdouble s, GLdouble t, GLdouble r, GLdouble q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4d);
+ struct marshal_cmd_MultiTexCoord4d *cmd;
+ debug_print_marshal("MultiTexCoord4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4d, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4d");
+ CALL_MultiTexCoord4d(ctx->CurrentServerDispatch, (target, s, t, r, q));
+}
+
+
+/* GetHistogram: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetHistogram(GLenum target, GLboolean reset, GLenum format, GLenum type, GLvoid * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetHistogram");
+ CALL_GetHistogram(ctx->CurrentServerDispatch, (target, reset, format, type, values));
+}
+
+
+/* Translatex: marshalled asynchronously */
+struct marshal_cmd_Translatex
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed x;
+ GLfixed y;
+ GLfixed z;
+};
+static inline void
+_mesa_unmarshal_Translatex(struct gl_context *ctx, const struct marshal_cmd_Translatex *cmd)
+{
+ const GLfixed x = cmd->x;
+ const GLfixed y = cmd->y;
+ const GLfixed z = cmd->z;
+ CALL_Translatex(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Translatex(GLfixed x, GLfixed y, GLfixed z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Translatex);
+ struct marshal_cmd_Translatex *cmd;
+ debug_print_marshal("Translatex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Translatex, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Translatex");
+ CALL_Translatex(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* MultiDrawElementsIndirectCountARB: marshalled asynchronously */
+struct marshal_cmd_MultiDrawElementsIndirectCountARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLenum type;
+ GLintptr indirect;
+ GLintptr drawcount;
+ GLsizei maxdrawcount;
+ GLsizei stride;
+};
+static inline void
+_mesa_unmarshal_MultiDrawElementsIndirectCountARB(struct gl_context *ctx, const struct marshal_cmd_MultiDrawElementsIndirectCountARB *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLenum type = cmd->type;
+ const GLintptr indirect = cmd->indirect;
+ const GLintptr drawcount = cmd->drawcount;
+ const GLsizei maxdrawcount = cmd->maxdrawcount;
+ const GLsizei stride = cmd->stride;
+ CALL_MultiDrawElementsIndirectCountARB(ctx->CurrentServerDispatch, (mode, type, indirect, drawcount, maxdrawcount, stride));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawElementsIndirectCountARB(GLenum mode, GLenum type, GLintptr indirect, GLintptr drawcount, GLsizei maxdrawcount, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiDrawElementsIndirectCountARB);
+ struct marshal_cmd_MultiDrawElementsIndirectCountARB *cmd;
+ debug_print_marshal("MultiDrawElementsIndirectCountARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiDrawElementsIndirectCountARB, cmd_size);
+ cmd->mode = mode;
+ cmd->type = type;
+ cmd->indirect = indirect;
+ cmd->drawcount = drawcount;
+ cmd->maxdrawcount = maxdrawcount;
+ cmd->stride = stride;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiDrawElementsIndirectCountARB");
+ CALL_MultiDrawElementsIndirectCountARB(ctx->CurrentServerDispatch, (mode, type, indirect, drawcount, maxdrawcount, stride));
+}
+
+
+/* Indexsv: marshalled asynchronously */
+struct marshal_cmd_Indexsv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort c[1];
+};
+static inline void
+_mesa_unmarshal_Indexsv(struct gl_context *ctx, const struct marshal_cmd_Indexsv *cmd)
+{
+ const GLshort * c = cmd->c;
+ CALL_Indexsv(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexsv(const GLshort * c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexsv);
+ struct marshal_cmd_Indexsv *cmd;
+ debug_print_marshal("Indexsv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexsv, cmd_size);
+ memcpy(cmd->c, c, 2);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexsv");
+ CALL_Indexsv(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* VertexAttrib1fvARB: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1fvARB(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1fvARB *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib1fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1fvARB(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1fvARB);
+ struct marshal_cmd_VertexAttrib1fvARB *cmd;
+ debug_print_marshal("VertexAttrib1fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1fvARB, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1fvARB");
+ CALL_VertexAttrib1fvARB(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* TexCoord2dv: marshalled asynchronously */
+struct marshal_cmd_TexCoord2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_TexCoord2dv(struct gl_context *ctx, const struct marshal_cmd_TexCoord2dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_TexCoord2dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2dv);
+ struct marshal_cmd_TexCoord2dv *cmd;
+ debug_print_marshal("TexCoord2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2dv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2dv");
+ CALL_TexCoord2dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* Translated: marshalled asynchronously */
+struct marshal_cmd_Translated
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_Translated(struct gl_context *ctx, const struct marshal_cmd_Translated *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_Translated(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Translated(GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Translated);
+ struct marshal_cmd_Translated *cmd;
+ debug_print_marshal("Translated");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Translated, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Translated");
+ CALL_Translated(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* Translatef: marshalled asynchronously */
+struct marshal_cmd_Translatef
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+};
+static inline void
+_mesa_unmarshal_Translatef(struct gl_context *ctx, const struct marshal_cmd_Translatef *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ CALL_Translatef(ctx->CurrentServerDispatch, (x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Translatef(GLfloat x, GLfloat y, GLfloat z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Translatef);
+ struct marshal_cmd_Translatef *cmd;
+ debug_print_marshal("Translatef");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Translatef, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Translatef");
+ CALL_Translatef(ctx->CurrentServerDispatch, (x, y, z));
+}
+
+
+/* MultTransposeMatrixd: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultTransposeMatrixd(const GLdouble * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultTransposeMatrixd");
+ CALL_MultTransposeMatrixd(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* ProgramUniform4uiv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLuint value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4uiv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4uiv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform4uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4uiv(GLuint program, GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4uiv) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform4uiv *cmd;
+ debug_print_marshal("ProgramUniform4uiv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4uiv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4uiv");
+ CALL_ProgramUniform4uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetPerfCounterInfoINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfCounterInfoINTEL(GLuint queryId, GLuint counterId, GLuint counterNameLength, GLchar * counterName, GLuint counterDescLength, GLchar * counterDesc, GLuint * counterOffset, GLuint * counterDataSize, GLuint * counterTypeEnum, GLuint * counterDataTypeEnum, GLuint64 * rawCounterMaxValue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfCounterInfoINTEL");
+ CALL_GetPerfCounterInfoINTEL(ctx->CurrentServerDispatch, (queryId, counterId, counterNameLength, counterName, counterDescLength, counterDesc, counterOffset, counterDataSize, counterTypeEnum, counterDataTypeEnum, rawCounterMaxValue));
+}
+
+
+/* RenderMode: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_RenderMode(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("RenderMode");
+ return CALL_RenderMode(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* MultiTexCoord1fARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat s;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1fARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat s = cmd->s;
+ CALL_MultiTexCoord1fARB(ctx->CurrentServerDispatch, (target, s));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1fARB(GLenum target, GLfloat s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1fARB);
+ struct marshal_cmd_MultiTexCoord1fARB *cmd;
+ debug_print_marshal("MultiTexCoord1fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1fARB, cmd_size);
+ cmd->target = target;
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1fARB");
+ CALL_MultiTexCoord1fARB(ctx->CurrentServerDispatch, (target, s));
+}
+
+
+/* SecondaryColor3d: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble red;
+ GLdouble green;
+ GLdouble blue;
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3d(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3d *cmd)
+{
+ const GLdouble red = cmd->red;
+ const GLdouble green = cmd->green;
+ const GLdouble blue = cmd->blue;
+ CALL_SecondaryColor3d(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3d(GLdouble red, GLdouble green, GLdouble blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3d);
+ struct marshal_cmd_SecondaryColor3d *cmd;
+ debug_print_marshal("SecondaryColor3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3d, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3d");
+ CALL_SecondaryColor3d(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* FramebufferParameteri: marshalled asynchronously */
+struct marshal_cmd_FramebufferParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_FramebufferParameteri(struct gl_context *ctx, const struct marshal_cmd_FramebufferParameteri *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_FramebufferParameteri(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferParameteri(GLenum target, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferParameteri);
+ struct marshal_cmd_FramebufferParameteri *cmd;
+ debug_print_marshal("FramebufferParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferParameteri, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferParameteri");
+ CALL_FramebufferParameteri(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* VertexAttribs4ubvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs4ubvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLubyte v[n][4] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs4ubvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs4ubvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLubyte * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLubyte *) variable_data;
+ variable_data += n * 4;
+ CALL_VertexAttribs4ubvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs4ubvNV(GLuint index, GLsizei n, const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs4ubvNV) + safe_mul(n, 4);
+ struct marshal_cmd_VertexAttribs4ubvNV *cmd;
+ debug_print_marshal("VertexAttribs4ubvNV");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs4ubvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs4ubvNV");
+ CALL_VertexAttribs4ubvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* LightModelxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_LightModelxv(GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("LightModelxv");
+ CALL_LightModelxv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* CopyTexSubImage1D: marshalled asynchronously */
+struct marshal_cmd_CopyTexSubImage1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint level;
+ GLint xoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_CopyTexSubImage1D(struct gl_context *ctx, const struct marshal_cmd_CopyTexSubImage1D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ CALL_CopyTexSubImage1D(ctx->CurrentServerDispatch, (target, level, xoffset, x, y, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTexSubImage1D(GLenum target, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTexSubImage1D);
+ struct marshal_cmd_CopyTexSubImage1D *cmd;
+ debug_print_marshal("CopyTexSubImage1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTexSubImage1D, cmd_size);
+ cmd->target = target;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTexSubImage1D");
+ CALL_CopyTexSubImage1D(ctx->CurrentServerDispatch, (target, level, xoffset, x, y, width));
+}
+
+
+/* TextureSubImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureSubImage3D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureSubImage3D");
+ CALL_TextureSubImage3D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels));
+}
+
+
+/* StencilFunc: marshalled asynchronously */
+struct marshal_cmd_StencilFunc
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum func;
+ GLint ref;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_StencilFunc(struct gl_context *ctx, const struct marshal_cmd_StencilFunc *cmd)
+{
+ const GLenum func = cmd->func;
+ const GLint ref = cmd->ref;
+ const GLuint mask = cmd->mask;
+ CALL_StencilFunc(ctx->CurrentServerDispatch, (func, ref, mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilFunc(GLenum func, GLint ref, GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilFunc);
+ struct marshal_cmd_StencilFunc *cmd;
+ debug_print_marshal("StencilFunc");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilFunc, cmd_size);
+ cmd->func = func;
+ cmd->ref = ref;
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilFunc");
+ CALL_StencilFunc(ctx->CurrentServerDispatch, (func, ref, mask));
+}
+
+
+/* CopyPixels: marshalled asynchronously */
+struct marshal_cmd_CopyPixels
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+ GLenum type;
+};
+static inline void
+_mesa_unmarshal_CopyPixels(struct gl_context *ctx, const struct marshal_cmd_CopyPixels *cmd)
+{
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLenum type = cmd->type;
+ CALL_CopyPixels(ctx->CurrentServerDispatch, (x, y, width, height, type));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyPixels(GLint x, GLint y, GLsizei width, GLsizei height, GLenum type)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyPixels);
+ struct marshal_cmd_CopyPixels *cmd;
+ debug_print_marshal("CopyPixels");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyPixels, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->type = type;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyPixels");
+ CALL_CopyPixels(ctx->CurrentServerDispatch, (x, y, width, height, type));
+}
+
+
+/* TexGenxvOES: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexGenxvOES(GLenum coord, GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexGenxvOES");
+ CALL_TexGenxvOES(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* GetTextureLevelParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureLevelParameterfv(GLuint texture, GLint level, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureLevelParameterfv");
+ CALL_GetTextureLevelParameterfv(ctx->CurrentServerDispatch, (texture, level, pname, params));
+}
+
+
+/* VertexAttrib4Nubv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLubyte v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nubv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nubv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLubyte * v = cmd->v;
+ CALL_VertexAttrib4Nubv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nubv(GLuint index, const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nubv);
+ struct marshal_cmd_VertexAttrib4Nubv *cmd;
+ debug_print_marshal("VertexAttrib4Nubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nubv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nubv");
+ CALL_VertexAttrib4Nubv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* UniformMatrix4x2dv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4x2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLdouble value[count][8] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4x2dv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4x2dv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 64;
+ CALL_UniformMatrix4x2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4x2dv(GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4x2dv) + safe_mul(count, 64);
+ struct marshal_cmd_UniformMatrix4x2dv *cmd;
+ debug_print_marshal("UniformMatrix4x2dv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4x2dv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4x2dv");
+ CALL_UniformMatrix4x2dv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* VertexAttribPointer: marshalled asynchronously */
+struct marshal_cmd_VertexAttribPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint size;
+ GLenum type;
+ GLboolean normalized;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_VertexAttribPointer(struct gl_context *ctx, const struct marshal_cmd_VertexAttribPointer *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLboolean normalized = cmd->normalized;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_VertexAttribPointer(ctx->CurrentServerDispatch, (index, size, type, normalized, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribPointer(GLuint index, GLint size, GLenum type, GLboolean normalized, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribPointer);
+ struct marshal_cmd_VertexAttribPointer *cmd;
+ debug_print_marshal("VertexAttribPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("VertexAttribPointer");
+ CALL_VertexAttribPointer(ctx->CurrentServerDispatch, (index, size, type, normalized, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribPointer, cmd_size);
+ cmd->index = index;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->normalized = normalized;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribPointer");
+ CALL_VertexAttribPointer(ctx->CurrentServerDispatch, (index, size, type, normalized, stride, pointer));
+}
+
+
+/* IndexMask: marshalled asynchronously */
+struct marshal_cmd_IndexMask
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_IndexMask(struct gl_context *ctx, const struct marshal_cmd_IndexMask *cmd)
+{
+ const GLuint mask = cmd->mask;
+ CALL_IndexMask(ctx->CurrentServerDispatch, (mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_IndexMask(GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_IndexMask);
+ struct marshal_cmd_IndexMask *cmd;
+ debug_print_marshal("IndexMask");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_IndexMask, cmd_size);
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("IndexMask");
+ CALL_IndexMask(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* VertexAttribIFormat: marshalled asynchronously */
+struct marshal_cmd_VertexAttribIFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexAttribIFormat(struct gl_context *ctx, const struct marshal_cmd_VertexAttribIFormat *cmd)
+{
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexAttribIFormat(ctx->CurrentServerDispatch, (attribindex, size, type, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribIFormat(GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribIFormat);
+ struct marshal_cmd_VertexAttribIFormat *cmd;
+ debug_print_marshal("VertexAttribIFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribIFormat, cmd_size);
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribIFormat");
+ CALL_VertexAttribIFormat(ctx->CurrentServerDispatch, (attribindex, size, type, relativeoffset));
+}
+
+
+/* DrawArraysInstancedBaseInstance: marshalled asynchronously */
+struct marshal_cmd_DrawArraysInstancedBaseInstance
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLint first;
+ GLsizei count;
+ GLsizei primcount;
+ GLuint baseinstance;
+};
+static inline void
+_mesa_unmarshal_DrawArraysInstancedBaseInstance(struct gl_context *ctx, const struct marshal_cmd_DrawArraysInstancedBaseInstance *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLint first = cmd->first;
+ const GLsizei count = cmd->count;
+ const GLsizei primcount = cmd->primcount;
+ const GLuint baseinstance = cmd->baseinstance;
+ CALL_DrawArraysInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, first, count, primcount, baseinstance));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawArraysInstancedBaseInstance(GLenum mode, GLint first, GLsizei count, GLsizei primcount, GLuint baseinstance)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawArraysInstancedBaseInstance);
+ struct marshal_cmd_DrawArraysInstancedBaseInstance *cmd;
+ debug_print_marshal("DrawArraysInstancedBaseInstance");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawArraysInstancedBaseInstance");
+ CALL_DrawArraysInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, first, count, primcount, baseinstance));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawArraysInstancedBaseInstance, cmd_size);
+ cmd->mode = mode;
+ cmd->first = first;
+ cmd->count = count;
+ cmd->primcount = primcount;
+ cmd->baseinstance = baseinstance;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawArraysInstancedBaseInstance");
+ CALL_DrawArraysInstancedBaseInstance(ctx->CurrentServerDispatch, (mode, first, count, primcount, baseinstance));
+}
+
+
+/* TextureStorageMem3DMultisampleEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorageMem3DMultisampleEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei samples;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLboolean fixedSampleLocations;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TextureStorageMem3DMultisampleEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorageMem3DMultisampleEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLboolean fixedSampleLocations = cmd->fixedSampleLocations;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TextureStorageMem3DMultisampleEXT(ctx->CurrentServerDispatch, (texture, samples, internalFormat, width, height, depth, fixedSampleLocations, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorageMem3DMultisampleEXT(GLuint texture, GLsizei samples, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedSampleLocations, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorageMem3DMultisampleEXT);
+ struct marshal_cmd_TextureStorageMem3DMultisampleEXT *cmd;
+ debug_print_marshal("TextureStorageMem3DMultisampleEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorageMem3DMultisampleEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->samples = samples;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->fixedSampleLocations = fixedSampleLocations;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorageMem3DMultisampleEXT");
+ CALL_TextureStorageMem3DMultisampleEXT(ctx->CurrentServerDispatch, (texture, samples, internalFormat, width, height, depth, fixedSampleLocations, memory, offset));
+}
+
+
+/* CompressedTextureSubImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTextureSubImage3D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTextureSubImage3D");
+ CALL_CompressedTextureSubImage3D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, width, height, depth, format, imageSize, data));
+}
+
+
+/* PopAttrib: marshalled asynchronously */
+struct marshal_cmd_PopAttrib
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PopAttrib(struct gl_context *ctx, const struct marshal_cmd_PopAttrib *cmd)
+{
+ CALL_PopAttrib(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PopAttrib(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PopAttrib);
+ struct marshal_cmd_PopAttrib *cmd;
+ debug_print_marshal("PopAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PopAttrib, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PopAttrib");
+ CALL_PopAttrib(ctx->CurrentServerDispatch, ());
+}
+
+
+/* Uniform3ui: marshalled asynchronously */
+struct marshal_cmd_Uniform3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+};
+static inline void
+_mesa_unmarshal_Uniform3ui(struct gl_context *ctx, const struct marshal_cmd_Uniform3ui *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ CALL_Uniform3ui(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3ui(GLint location, GLuint x, GLuint y, GLuint z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3ui);
+ struct marshal_cmd_Uniform3ui *cmd;
+ debug_print_marshal("Uniform3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3ui, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3ui");
+ CALL_Uniform3ui(ctx->CurrentServerDispatch, (location, x, y, z));
+}
+
+
+/* DeletePerfMonitorsAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeletePerfMonitorsAMD(GLsizei n, GLuint * monitors)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeletePerfMonitorsAMD");
+ CALL_DeletePerfMonitorsAMD(ctx->CurrentServerDispatch, (n, monitors));
+}
+
+
+/* Color4dv: marshalled asynchronously */
+struct marshal_cmd_Color4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[4];
+};
+static inline void
+_mesa_unmarshal_Color4dv(struct gl_context *ctx, const struct marshal_cmd_Color4dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Color4dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4dv);
+ struct marshal_cmd_Color4dv *cmd;
+ debug_print_marshal("Color4dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4dv, cmd_size);
+ memcpy(cmd->v, v, 32);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4dv");
+ CALL_Color4dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DisableVertexAttribArray: marshalled asynchronously */
+struct marshal_cmd_DisableVertexAttribArray
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_DisableVertexAttribArray(struct gl_context *ctx, const struct marshal_cmd_DisableVertexAttribArray *cmd)
+{
+ const GLuint index = cmd->index;
+ CALL_DisableVertexAttribArray(ctx->CurrentServerDispatch, (index));
+}
+static void GLAPIENTRY
+_mesa_marshal_DisableVertexAttribArray(GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DisableVertexAttribArray);
+ struct marshal_cmd_DisableVertexAttribArray *cmd;
+ debug_print_marshal("DisableVertexAttribArray");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DisableVertexAttribArray, cmd_size);
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DisableVertexAttribArray");
+ CALL_DisableVertexAttribArray(ctx->CurrentServerDispatch, (index));
+}
+
+
+/* ProgramUniformMatrix3x2fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3x2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 24) bytes are GLfloat value[count][6] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3x2fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3x2fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 24;
+ CALL_ProgramUniformMatrix3x2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3x2fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3x2fv) + safe_mul(count, 24);
+ struct marshal_cmd_ProgramUniformMatrix3x2fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3x2fv");
+ if (unlikely(safe_mul(count, 24) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3x2fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 24);
+ variable_data += count * 24;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3x2fv");
+ CALL_ProgramUniformMatrix3x2fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* GetDoublei_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetDoublei_v(GLenum target, GLuint index, GLdouble * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetDoublei_v");
+ CALL_GetDoublei_v(ctx->CurrentServerDispatch, (target, index, data));
+}
+
+
+/* IsTransformFeedback: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsTransformFeedback(GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsTransformFeedback");
+ return CALL_IsTransformFeedback(ctx->CurrentServerDispatch, (id));
+}
+
+
+/* GetMemoryObjectParameterivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMemoryObjectParameterivEXT(GLuint memoryObject, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMemoryObjectParameterivEXT");
+ CALL_GetMemoryObjectParameterivEXT(ctx->CurrentServerDispatch, (memoryObject, pname, params));
+}
+
+
+/* ClipPlanex: marshalled asynchronously */
+struct marshal_cmd_ClipPlanex
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum plane;
+ GLfixed equation[4];
+};
+static inline void
+_mesa_unmarshal_ClipPlanex(struct gl_context *ctx, const struct marshal_cmd_ClipPlanex *cmd)
+{
+ const GLenum plane = cmd->plane;
+ const GLfixed * equation = cmd->equation;
+ CALL_ClipPlanex(ctx->CurrentServerDispatch, (plane, equation));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClipPlanex(GLenum plane, const GLfixed * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClipPlanex);
+ struct marshal_cmd_ClipPlanex *cmd;
+ debug_print_marshal("ClipPlanex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClipPlanex, cmd_size);
+ cmd->plane = plane;
+ memcpy(cmd->equation, equation, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClipPlanex");
+ CALL_ClipPlanex(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* GetLightfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetLightfv(GLenum light, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetLightfv");
+ CALL_GetLightfv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* ClipPlanef: marshalled asynchronously */
+struct marshal_cmd_ClipPlanef
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum plane;
+ GLfloat equation[4];
+};
+static inline void
+_mesa_unmarshal_ClipPlanef(struct gl_context *ctx, const struct marshal_cmd_ClipPlanef *cmd)
+{
+ const GLenum plane = cmd->plane;
+ const GLfloat * equation = cmd->equation;
+ CALL_ClipPlanef(ctx->CurrentServerDispatch, (plane, equation));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClipPlanef(GLenum plane, const GLfloat * equation)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClipPlanef);
+ struct marshal_cmd_ClipPlanef *cmd;
+ debug_print_marshal("ClipPlanef");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClipPlanef, cmd_size);
+ cmd->plane = plane;
+ memcpy(cmd->equation, equation, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClipPlanef");
+ CALL_ClipPlanef(ctx->CurrentServerDispatch, (plane, equation));
+}
+
+
+/* ProgramUniform1ui: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1ui(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1ui *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ CALL_ProgramUniform1ui(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1ui(GLuint program, GLint location, GLuint x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1ui);
+ struct marshal_cmd_ProgramUniform1ui *cmd;
+ debug_print_marshal("ProgramUniform1ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1ui, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1ui");
+ CALL_ProgramUniform1ui(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* SecondaryColorPointer: marshalled asynchronously */
+struct marshal_cmd_SecondaryColorPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_SecondaryColorPointer(struct gl_context *ctx, const struct marshal_cmd_SecondaryColorPointer *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_SecondaryColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColorPointer(GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColorPointer);
+ struct marshal_cmd_SecondaryColorPointer *cmd;
+ debug_print_marshal("SecondaryColorPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("SecondaryColorPointer");
+ CALL_SecondaryColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColorPointer, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColorPointer");
+ CALL_SecondaryColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+
+
+/* LineStipple: marshalled asynchronously */
+struct marshal_cmd_LineStipple
+{
+ struct marshal_cmd_base cmd_base;
+ GLint factor;
+ GLushort pattern;
+};
+static inline void
+_mesa_unmarshal_LineStipple(struct gl_context *ctx, const struct marshal_cmd_LineStipple *cmd)
+{
+ const GLint factor = cmd->factor;
+ const GLushort pattern = cmd->pattern;
+ CALL_LineStipple(ctx->CurrentServerDispatch, (factor, pattern));
+}
+static void GLAPIENTRY
+_mesa_marshal_LineStipple(GLint factor, GLushort pattern)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LineStipple);
+ struct marshal_cmd_LineStipple *cmd;
+ debug_print_marshal("LineStipple");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LineStipple, cmd_size);
+ cmd->factor = factor;
+ cmd->pattern = pattern;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LineStipple");
+ CALL_LineStipple(ctx->CurrentServerDispatch, (factor, pattern));
+}
+
+
+/* BeginFragmentShaderATI: marshalled asynchronously */
+struct marshal_cmd_BeginFragmentShaderATI
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_BeginFragmentShaderATI(struct gl_context *ctx, const struct marshal_cmd_BeginFragmentShaderATI *cmd)
+{
+ CALL_BeginFragmentShaderATI(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_BeginFragmentShaderATI(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BeginFragmentShaderATI);
+ struct marshal_cmd_BeginFragmentShaderATI *cmd;
+ debug_print_marshal("BeginFragmentShaderATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BeginFragmentShaderATI, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BeginFragmentShaderATI");
+ CALL_BeginFragmentShaderATI(ctx->CurrentServerDispatch, ());
+}
+
+
+/* GenRenderbuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenRenderbuffers(GLsizei n, GLuint * renderbuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenRenderbuffers");
+ CALL_GenRenderbuffers(ctx->CurrentServerDispatch, (n, renderbuffers));
+}
+
+
+/* GetMinmaxParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMinmaxParameterfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMinmaxParameterfv");
+ CALL_GetMinmaxParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TextureStorageMem2DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorageMem2DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TextureStorageMem2DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorageMem2DEXT *cmd)
+{
+ const GLenum texture = cmd->texture;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TextureStorageMem2DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, height, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorageMem2DEXT(GLenum texture, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorageMem2DEXT);
+ struct marshal_cmd_TextureStorageMem2DEXT *cmd;
+ debug_print_marshal("TextureStorageMem2DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorageMem2DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorageMem2DEXT");
+ CALL_TextureStorageMem2DEXT(ctx->CurrentServerDispatch, (texture, levels, internalFormat, width, height, memory, offset));
+}
+
+
+/* IsEnabledi: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsEnabledi(GLenum target, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsEnabledi");
+ return CALL_IsEnabledi(ctx->CurrentServerDispatch, (target, index));
+}
+
+
+/* WaitSync: marshalled asynchronously */
+struct marshal_cmd_WaitSync
+{
+ struct marshal_cmd_base cmd_base;
+ GLsync sync;
+ GLbitfield flags;
+ GLuint64 timeout;
+};
+static inline void
+_mesa_unmarshal_WaitSync(struct gl_context *ctx, const struct marshal_cmd_WaitSync *cmd)
+{
+ const GLsync sync = cmd->sync;
+ const GLbitfield flags = cmd->flags;
+ const GLuint64 timeout = cmd->timeout;
+ CALL_WaitSync(ctx->CurrentServerDispatch, (sync, flags, timeout));
+}
+static void GLAPIENTRY
+_mesa_marshal_WaitSync(GLsync sync, GLbitfield flags, GLuint64 timeout)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WaitSync);
+ struct marshal_cmd_WaitSync *cmd;
+ debug_print_marshal("WaitSync");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WaitSync, cmd_size);
+ cmd->sync = sync;
+ cmd->flags = flags;
+ cmd->timeout = timeout;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WaitSync");
+ CALL_WaitSync(ctx->CurrentServerDispatch, (sync, flags, timeout));
+}
+
+
+/* GetVertexAttribPointerv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribPointerv(GLuint index, GLenum pname, GLvoid ** pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribPointerv");
+ CALL_GetVertexAttribPointerv(ctx->CurrentServerDispatch, (index, pname, pointer));
+}
+
+
+/* Uniform1i64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform1i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLint64 value[count] */
+};
+static inline void
+_mesa_unmarshal_Uniform1i64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform1i64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 8;
+ CALL_Uniform1i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1i64vARB(GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1i64vARB) + safe_mul(count, 8);
+ struct marshal_cmd_Uniform1i64vARB *cmd;
+ debug_print_marshal("Uniform1i64vARB");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1i64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1i64vARB");
+ CALL_Uniform1i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* CreatePerfQueryINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreatePerfQueryINTEL(GLuint queryId, GLuint * queryHandle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreatePerfQueryINTEL");
+ CALL_CreatePerfQueryINTEL(ctx->CurrentServerDispatch, (queryId, queryHandle));
+}
+
+
+/* NewList: marshalled asynchronously */
+struct marshal_cmd_NewList
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint list;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_NewList(struct gl_context *ctx, const struct marshal_cmd_NewList *cmd)
+{
+ const GLuint list = cmd->list;
+ const GLenum mode = cmd->mode;
+ CALL_NewList(ctx->CurrentServerDispatch, (list, mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_NewList(GLuint list, GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NewList);
+ struct marshal_cmd_NewList *cmd;
+ debug_print_marshal("NewList");
+ if (true) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("NewList");
+ CALL_NewList(ctx->CurrentServerDispatch, (list, mode));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NewList, cmd_size);
+ cmd->list = list;
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NewList");
+ CALL_NewList(ctx->CurrentServerDispatch, (list, mode));
+}
+
+
+/* TexBuffer: marshalled asynchronously */
+struct marshal_cmd_TexBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalFormat;
+ GLuint buffer;
+};
+static inline void
+_mesa_unmarshal_TexBuffer(struct gl_context *ctx, const struct marshal_cmd_TexBuffer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLuint buffer = cmd->buffer;
+ CALL_TexBuffer(ctx->CurrentServerDispatch, (target, internalFormat, buffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexBuffer(GLenum target, GLenum internalFormat, GLuint buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexBuffer);
+ struct marshal_cmd_TexBuffer *cmd;
+ debug_print_marshal("TexBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexBuffer, cmd_size);
+ cmd->target = target;
+ cmd->internalFormat = internalFormat;
+ cmd->buffer = buffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexBuffer");
+ CALL_TexBuffer(ctx->CurrentServerDispatch, (target, internalFormat, buffer));
+}
+
+
+/* TexCoord4sv: marshalled asynchronously */
+struct marshal_cmd_TexCoord4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_TexCoord4sv(struct gl_context *ctx, const struct marshal_cmd_TexCoord4sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_TexCoord4sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4sv);
+ struct marshal_cmd_TexCoord4sv *cmd;
+ debug_print_marshal("TexCoord4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4sv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4sv");
+ CALL_TexCoord4sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoord1f: marshalled asynchronously */
+struct marshal_cmd_TexCoord1f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat s;
+};
+static inline void
+_mesa_unmarshal_TexCoord1f(struct gl_context *ctx, const struct marshal_cmd_TexCoord1f *cmd)
+{
+ const GLfloat s = cmd->s;
+ CALL_TexCoord1f(ctx->CurrentServerDispatch, (s));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1f(GLfloat s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1f);
+ struct marshal_cmd_TexCoord1f *cmd;
+ debug_print_marshal("TexCoord1f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1f, cmd_size);
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1f");
+ CALL_TexCoord1f(ctx->CurrentServerDispatch, (s));
+}
+
+
+/* TexCoord1d: marshalled asynchronously */
+struct marshal_cmd_TexCoord1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble s;
+};
+static inline void
+_mesa_unmarshal_TexCoord1d(struct gl_context *ctx, const struct marshal_cmd_TexCoord1d *cmd)
+{
+ const GLdouble s = cmd->s;
+ CALL_TexCoord1d(ctx->CurrentServerDispatch, (s));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1d(GLdouble s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1d);
+ struct marshal_cmd_TexCoord1d *cmd;
+ debug_print_marshal("TexCoord1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1d, cmd_size);
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1d");
+ CALL_TexCoord1d(ctx->CurrentServerDispatch, (s));
+}
+
+
+/* TexCoord1i: marshalled asynchronously */
+struct marshal_cmd_TexCoord1i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint s;
+};
+static inline void
+_mesa_unmarshal_TexCoord1i(struct gl_context *ctx, const struct marshal_cmd_TexCoord1i *cmd)
+{
+ const GLint s = cmd->s;
+ CALL_TexCoord1i(ctx->CurrentServerDispatch, (s));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1i(GLint s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1i);
+ struct marshal_cmd_TexCoord1i *cmd;
+ debug_print_marshal("TexCoord1i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1i, cmd_size);
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1i");
+ CALL_TexCoord1i(ctx->CurrentServerDispatch, (s));
+}
+
+
+/* GetnUniformfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnUniformfvARB(GLuint program, GLint location, GLsizei bufSize, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnUniformfvARB");
+ CALL_GetnUniformfvARB(ctx->CurrentServerDispatch, (program, location, bufSize, params));
+}
+
+
+/* TexCoord1s: marshalled asynchronously */
+struct marshal_cmd_TexCoord1s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort s;
+};
+static inline void
+_mesa_unmarshal_TexCoord1s(struct gl_context *ctx, const struct marshal_cmd_TexCoord1s *cmd)
+{
+ const GLshort s = cmd->s;
+ CALL_TexCoord1s(ctx->CurrentServerDispatch, (s));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord1s(GLshort s)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord1s);
+ struct marshal_cmd_TexCoord1s *cmd;
+ debug_print_marshal("TexCoord1s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord1s, cmd_size);
+ cmd->s = s;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord1s");
+ CALL_TexCoord1s(ctx->CurrentServerDispatch, (s));
+}
+
+
+/* Uniform1ui: marshalled asynchronously */
+struct marshal_cmd_Uniform1ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLuint x;
+};
+static inline void
+_mesa_unmarshal_Uniform1ui(struct gl_context *ctx, const struct marshal_cmd_Uniform1ui *cmd)
+{
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ CALL_Uniform1ui(ctx->CurrentServerDispatch, (location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1ui(GLint location, GLuint x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1ui);
+ struct marshal_cmd_Uniform1ui *cmd;
+ debug_print_marshal("Uniform1ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1ui, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1ui");
+ CALL_Uniform1ui(ctx->CurrentServerDispatch, (location, x));
+}
+
+
+/* TexStorage1D: marshalled asynchronously */
+struct marshal_cmd_TexStorage1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_TexStorage1D(struct gl_context *ctx, const struct marshal_cmd_TexStorage1D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ CALL_TexStorage1D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorage1D(GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorage1D);
+ struct marshal_cmd_TexStorage1D *cmd;
+ debug_print_marshal("TexStorage1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorage1D, cmd_size);
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorage1D");
+ CALL_TexStorage1D(ctx->CurrentServerDispatch, (target, levels, internalFormat, width));
+}
+
+
+/* BlitFramebuffer: marshalled asynchronously */
+struct marshal_cmd_BlitFramebuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLint srcX0;
+ GLint srcY0;
+ GLint srcX1;
+ GLint srcY1;
+ GLint dstX0;
+ GLint dstY0;
+ GLint dstX1;
+ GLint dstY1;
+ GLbitfield mask;
+ GLenum filter;
+};
+static inline void
+_mesa_unmarshal_BlitFramebuffer(struct gl_context *ctx, const struct marshal_cmd_BlitFramebuffer *cmd)
+{
+ const GLint srcX0 = cmd->srcX0;
+ const GLint srcY0 = cmd->srcY0;
+ const GLint srcX1 = cmd->srcX1;
+ const GLint srcY1 = cmd->srcY1;
+ const GLint dstX0 = cmd->dstX0;
+ const GLint dstY0 = cmd->dstY0;
+ const GLint dstX1 = cmd->dstX1;
+ const GLint dstY1 = cmd->dstY1;
+ const GLbitfield mask = cmd->mask;
+ const GLenum filter = cmd->filter;
+ CALL_BlitFramebuffer(ctx->CurrentServerDispatch, (srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlitFramebuffer(GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlitFramebuffer);
+ struct marshal_cmd_BlitFramebuffer *cmd;
+ debug_print_marshal("BlitFramebuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlitFramebuffer, cmd_size);
+ cmd->srcX0 = srcX0;
+ cmd->srcY0 = srcY0;
+ cmd->srcX1 = srcX1;
+ cmd->srcY1 = srcY1;
+ cmd->dstX0 = dstX0;
+ cmd->dstY0 = dstY0;
+ cmd->dstX1 = dstX1;
+ cmd->dstY1 = dstY1;
+ cmd->mask = mask;
+ cmd->filter = filter;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlitFramebuffer");
+ CALL_BlitFramebuffer(ctx->CurrentServerDispatch, (srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter));
+}
+
+
+/* TextureParameterf: marshalled asynchronously */
+struct marshal_cmd_TextureParameterf
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_TextureParameterf(struct gl_context *ctx, const struct marshal_cmd_TextureParameterf *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_TextureParameterf(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureParameterf(GLuint texture, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureParameterf);
+ struct marshal_cmd_TextureParameterf *cmd;
+ debug_print_marshal("TextureParameterf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureParameterf, cmd_size);
+ cmd->texture = texture;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureParameterf");
+ CALL_TextureParameterf(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+
+
+/* FramebufferTexture1D: marshalled asynchronously */
+struct marshal_cmd_FramebufferTexture1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLenum textarget;
+ GLuint texture;
+ GLint level;
+};
+static inline void
+_mesa_unmarshal_FramebufferTexture1D(struct gl_context *ctx, const struct marshal_cmd_FramebufferTexture1D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLenum textarget = cmd->textarget;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ CALL_FramebufferTexture1D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferTexture1D(GLenum target, GLenum attachment, GLenum textarget, GLuint texture, GLint level)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferTexture1D);
+ struct marshal_cmd_FramebufferTexture1D *cmd;
+ debug_print_marshal("FramebufferTexture1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferTexture1D, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->textarget = textarget;
+ cmd->texture = texture;
+ cmd->level = level;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferTexture1D");
+ CALL_FramebufferTexture1D(ctx->CurrentServerDispatch, (target, attachment, textarget, texture, level));
+}
+
+
+/* TextureParameteri: marshalled asynchronously */
+struct marshal_cmd_TextureParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_TextureParameteri(struct gl_context *ctx, const struct marshal_cmd_TextureParameteri *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_TextureParameteri(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureParameteri(GLuint texture, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureParameteri);
+ struct marshal_cmd_TextureParameteri *cmd;
+ debug_print_marshal("TextureParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureParameteri, cmd_size);
+ cmd->texture = texture;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureParameteri");
+ CALL_TextureParameteri(ctx->CurrentServerDispatch, (texture, pname, param));
+}
+
+
+/* GetMapiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMapiv(GLenum target, GLenum query, GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMapiv");
+ CALL_GetMapiv(ctx->CurrentServerDispatch, (target, query, v));
+}
+
+
+/* GetUniformui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformui64vARB(GLuint program, GLint location, GLuint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformui64vARB");
+ CALL_GetUniformui64vARB(ctx->CurrentServerDispatch, (program, location, params));
+}
+
+
+/* TexCoordP4ui: marshalled asynchronously */
+struct marshal_cmd_TexCoordP4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_TexCoordP4ui(struct gl_context *ctx, const struct marshal_cmd_TexCoordP4ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_TexCoordP4ui(ctx->CurrentServerDispatch, (type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP4ui(GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordP4ui);
+ struct marshal_cmd_TexCoordP4ui *cmd;
+ debug_print_marshal("TexCoordP4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordP4ui, cmd_size);
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordP4ui");
+ CALL_TexCoordP4ui(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* VertexAttrib1sv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1sv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1sv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib1sv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1sv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1sv);
+ struct marshal_cmd_VertexAttrib1sv *cmd;
+ debug_print_marshal("VertexAttrib1sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1sv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 2);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1sv");
+ CALL_VertexAttrib1sv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* WindowPos4dMESA: marshalled asynchronously */
+struct marshal_cmd_WindowPos4dMESA
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+ GLdouble w;
+};
+static inline void
+_mesa_unmarshal_WindowPos4dMESA(struct gl_context *ctx, const struct marshal_cmd_WindowPos4dMESA *cmd)
+{
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ const GLdouble w = cmd->w;
+ CALL_WindowPos4dMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_WindowPos4dMESA(GLdouble x, GLdouble y, GLdouble z, GLdouble w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_WindowPos4dMESA);
+ struct marshal_cmd_WindowPos4dMESA *cmd;
+ debug_print_marshal("WindowPos4dMESA");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_WindowPos4dMESA, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("WindowPos4dMESA");
+ CALL_WindowPos4dMESA(ctx->CurrentServerDispatch, (x, y, z, w));
+}
+
+
+/* Vertex3dv: marshalled asynchronously */
+struct marshal_cmd_Vertex3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_Vertex3dv(struct gl_context *ctx, const struct marshal_cmd_Vertex3dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Vertex3dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3dv);
+ struct marshal_cmd_Vertex3dv *cmd;
+ debug_print_marshal("Vertex3dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3dv, cmd_size);
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3dv");
+ CALL_Vertex3dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* VertexAttribL2d: marshalled asynchronously */
+struct marshal_cmd_VertexAttribL2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_VertexAttribL2d(struct gl_context *ctx, const struct marshal_cmd_VertexAttribL2d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_VertexAttribL2d(ctx->CurrentServerDispatch, (index, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL2d(GLuint index, GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribL2d);
+ struct marshal_cmd_VertexAttribL2d *cmd;
+ debug_print_marshal("VertexAttribL2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribL2d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribL2d");
+ CALL_VertexAttribL2d(ctx->CurrentServerDispatch, (index, x, y));
+}
+
+
+/* GetnMapivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnMapivARB(GLenum target, GLenum query, GLsizei bufSize, GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnMapivARB");
+ CALL_GetnMapivARB(ctx->CurrentServerDispatch, (target, query, bufSize, v));
+}
+
+
+/* GetVertexAttribfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribfv(GLuint index, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribfv");
+ CALL_GetVertexAttribfv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* MultiTexCoordP4uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP4uiv(GLenum texture, GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiTexCoordP4uiv");
+ CALL_MultiTexCoordP4uiv(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* TexGeniv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexGeniv(GLenum coord, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexGeniv");
+ CALL_TexGeniv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* IsMemoryObjectEXT: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsMemoryObjectEXT(GLuint memoryObject)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsMemoryObjectEXT");
+ return CALL_IsMemoryObjectEXT(ctx->CurrentServerDispatch, (memoryObject));
+}
+
+
+/* BlendColor: marshalled asynchronously */
+struct marshal_cmd_BlendColor
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampf red;
+ GLclampf green;
+ GLclampf blue;
+ GLclampf alpha;
+};
+static inline void
+_mesa_unmarshal_BlendColor(struct gl_context *ctx, const struct marshal_cmd_BlendColor *cmd)
+{
+ const GLclampf red = cmd->red;
+ const GLclampf green = cmd->green;
+ const GLclampf blue = cmd->blue;
+ const GLclampf alpha = cmd->alpha;
+ CALL_BlendColor(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendColor(GLclampf red, GLclampf green, GLclampf blue, GLclampf alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendColor);
+ struct marshal_cmd_BlendColor *cmd;
+ debug_print_marshal("BlendColor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendColor, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendColor");
+ CALL_BlendColor(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* VertexAttribs2dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs2dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 16) bytes are GLdouble v[n][2] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs2dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs2dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLdouble * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLdouble *) variable_data;
+ variable_data += n * 16;
+ CALL_VertexAttribs2dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs2dvNV(GLuint index, GLsizei n, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs2dvNV) + safe_mul(n, 16);
+ struct marshal_cmd_VertexAttribs2dvNV *cmd;
+ debug_print_marshal("VertexAttribs2dvNV");
+ if (unlikely(safe_mul(n, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs2dvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 16);
+ variable_data += n * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs2dvNV");
+ CALL_VertexAttribs2dvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* VertexAttrib2dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib2dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib2dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib2dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib2dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib2dvNV(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib2dvNV);
+ struct marshal_cmd_VertexAttrib2dvNV *cmd;
+ debug_print_marshal("VertexAttrib2dvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib2dvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib2dvNV");
+ CALL_VertexAttrib2dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* NamedFramebufferDrawBuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_NamedFramebufferDrawBuffers(GLuint framebuffer, GLsizei n, const GLenum * bufs)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("NamedFramebufferDrawBuffers");
+ CALL_NamedFramebufferDrawBuffers(ctx->CurrentServerDispatch, (framebuffer, n, bufs));
+}
+
+
+/* ResetHistogram: marshalled asynchronously */
+struct marshal_cmd_ResetHistogram
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+};
+static inline void
+_mesa_unmarshal_ResetHistogram(struct gl_context *ctx, const struct marshal_cmd_ResetHistogram *cmd)
+{
+ const GLenum target = cmd->target;
+ CALL_ResetHistogram(ctx->CurrentServerDispatch, (target));
+}
+static void GLAPIENTRY
+_mesa_marshal_ResetHistogram(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ResetHistogram);
+ struct marshal_cmd_ResetHistogram *cmd;
+ debug_print_marshal("ResetHistogram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ResetHistogram, cmd_size);
+ cmd->target = target;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ResetHistogram");
+ CALL_ResetHistogram(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* CompressedTexSubImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTexSubImage2D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTexSubImage2D");
+ CALL_CompressedTexSubImage2D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, width, height, format, imageSize, data));
+}
+
+
+/* TexCoord2sv: marshalled asynchronously */
+struct marshal_cmd_TexCoord2sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[2];
+};
+static inline void
+_mesa_unmarshal_TexCoord2sv(struct gl_context *ctx, const struct marshal_cmd_TexCoord2sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_TexCoord2sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2sv);
+ struct marshal_cmd_TexCoord2sv *cmd;
+ debug_print_marshal("TexCoord2sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2sv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2sv");
+ CALL_TexCoord2sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* StencilMaskSeparate: marshalled asynchronously */
+struct marshal_cmd_StencilMaskSeparate
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_StencilMaskSeparate(struct gl_context *ctx, const struct marshal_cmd_StencilMaskSeparate *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLuint mask = cmd->mask;
+ CALL_StencilMaskSeparate(ctx->CurrentServerDispatch, (face, mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilMaskSeparate(GLenum face, GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilMaskSeparate);
+ struct marshal_cmd_StencilMaskSeparate *cmd;
+ debug_print_marshal("StencilMaskSeparate");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilMaskSeparate, cmd_size);
+ cmd->face = face;
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilMaskSeparate");
+ CALL_StencilMaskSeparate(ctx->CurrentServerDispatch, (face, mask));
+}
+
+
+/* MultiTexCoord3sv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3sv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3sv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort * v = cmd->v;
+ CALL_MultiTexCoord3sv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3sv(GLenum target, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3sv);
+ struct marshal_cmd_MultiTexCoord3sv *cmd;
+ debug_print_marshal("MultiTexCoord3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3sv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3sv");
+ CALL_MultiTexCoord3sv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* TexCoord3iv: marshalled asynchronously */
+struct marshal_cmd_TexCoord3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_TexCoord3iv(struct gl_context *ctx, const struct marshal_cmd_TexCoord3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_TexCoord3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord3iv);
+ struct marshal_cmd_TexCoord3iv *cmd;
+ debug_print_marshal("TexCoord3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord3iv");
+ CALL_TexCoord3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* MultiTexCoord4sv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord4sv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord4sv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLshort * v = cmd->v;
+ CALL_MultiTexCoord4sv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord4sv(GLenum target, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord4sv);
+ struct marshal_cmd_MultiTexCoord4sv *cmd;
+ debug_print_marshal("MultiTexCoord4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord4sv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord4sv");
+ CALL_MultiTexCoord4sv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* VertexBindingDivisor: marshalled asynchronously */
+struct marshal_cmd_VertexBindingDivisor
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint attribindex;
+ GLuint divisor;
+};
+static inline void
+_mesa_unmarshal_VertexBindingDivisor(struct gl_context *ctx, const struct marshal_cmd_VertexBindingDivisor *cmd)
+{
+ const GLuint attribindex = cmd->attribindex;
+ const GLuint divisor = cmd->divisor;
+ CALL_VertexBindingDivisor(ctx->CurrentServerDispatch, (attribindex, divisor));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexBindingDivisor(GLuint attribindex, GLuint divisor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexBindingDivisor);
+ struct marshal_cmd_VertexBindingDivisor *cmd;
+ debug_print_marshal("VertexBindingDivisor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexBindingDivisor, cmd_size);
+ cmd->attribindex = attribindex;
+ cmd->divisor = divisor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexBindingDivisor");
+ CALL_VertexBindingDivisor(ctx->CurrentServerDispatch, (attribindex, divisor));
+}
+
+
+/* PrimitiveBoundingBox: marshalled asynchronously */
+struct marshal_cmd_PrimitiveBoundingBox
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat minX;
+ GLfloat minY;
+ GLfloat minZ;
+ GLfloat minW;
+ GLfloat maxX;
+ GLfloat maxY;
+ GLfloat maxZ;
+ GLfloat maxW;
+};
+static inline void
+_mesa_unmarshal_PrimitiveBoundingBox(struct gl_context *ctx, const struct marshal_cmd_PrimitiveBoundingBox *cmd)
+{
+ const GLfloat minX = cmd->minX;
+ const GLfloat minY = cmd->minY;
+ const GLfloat minZ = cmd->minZ;
+ const GLfloat minW = cmd->minW;
+ const GLfloat maxX = cmd->maxX;
+ const GLfloat maxY = cmd->maxY;
+ const GLfloat maxZ = cmd->maxZ;
+ const GLfloat maxW = cmd->maxW;
+ CALL_PrimitiveBoundingBox(ctx->CurrentServerDispatch, (minX, minY, minZ, minW, maxX, maxY, maxZ, maxW));
+}
+static void GLAPIENTRY
+_mesa_marshal_PrimitiveBoundingBox(GLfloat minX, GLfloat minY, GLfloat minZ, GLfloat minW, GLfloat maxX, GLfloat maxY, GLfloat maxZ, GLfloat maxW)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PrimitiveBoundingBox);
+ struct marshal_cmd_PrimitiveBoundingBox *cmd;
+ debug_print_marshal("PrimitiveBoundingBox");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PrimitiveBoundingBox, cmd_size);
+ cmd->minX = minX;
+ cmd->minY = minY;
+ cmd->minZ = minZ;
+ cmd->minW = minW;
+ cmd->maxX = maxX;
+ cmd->maxY = maxY;
+ cmd->maxZ = maxZ;
+ cmd->maxW = maxW;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PrimitiveBoundingBox");
+ CALL_PrimitiveBoundingBox(ctx->CurrentServerDispatch, (minX, minY, minZ, minW, maxX, maxY, maxZ, maxW));
+}
+
+
+/* GetPerfMonitorCounterInfoAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorCounterInfoAMD(GLuint group, GLuint counter, GLenum pname, GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorCounterInfoAMD");
+ CALL_GetPerfMonitorCounterInfoAMD(ctx->CurrentServerDispatch, (group, counter, pname, data));
+}
+
+
+/* UniformBlockBinding: marshalled asynchronously */
+struct marshal_cmd_UniformBlockBinding
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLuint uniformBlockIndex;
+ GLuint uniformBlockBinding;
+};
+static inline void
+_mesa_unmarshal_UniformBlockBinding(struct gl_context *ctx, const struct marshal_cmd_UniformBlockBinding *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLuint uniformBlockIndex = cmd->uniformBlockIndex;
+ const GLuint uniformBlockBinding = cmd->uniformBlockBinding;
+ CALL_UniformBlockBinding(ctx->CurrentServerDispatch, (program, uniformBlockIndex, uniformBlockBinding));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformBlockBinding(GLuint program, GLuint uniformBlockIndex, GLuint uniformBlockBinding)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformBlockBinding);
+ struct marshal_cmd_UniformBlockBinding *cmd;
+ debug_print_marshal("UniformBlockBinding");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformBlockBinding, cmd_size);
+ cmd->program = program;
+ cmd->uniformBlockIndex = uniformBlockIndex;
+ cmd->uniformBlockBinding = uniformBlockBinding;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformBlockBinding");
+ CALL_UniformBlockBinding(ctx->CurrentServerDispatch, (program, uniformBlockIndex, uniformBlockBinding));
+}
+
+
+/* FenceSync: marshalled synchronously */
+static GLsync GLAPIENTRY
+_mesa_marshal_FenceSync(GLenum condition, GLbitfield flags)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("FenceSync");
+ return CALL_FenceSync(ctx->CurrentServerDispatch, (condition, flags));
+}
+
+
+/* CompressedTextureSubImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTextureSubImage2D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTextureSubImage2D");
+ CALL_CompressedTextureSubImage2D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, width, height, format, imageSize, data));
+}
+
+
+/* VertexAttrib4Nusv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4Nusv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLushort v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4Nusv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4Nusv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLushort * v = cmd->v;
+ CALL_VertexAttrib4Nusv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4Nusv(GLuint index, const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4Nusv);
+ struct marshal_cmd_VertexAttrib4Nusv *cmd;
+ debug_print_marshal("VertexAttrib4Nusv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4Nusv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4Nusv");
+ CALL_VertexAttrib4Nusv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SetFragmentShaderConstantATI: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SetFragmentShaderConstantATI(GLuint dst, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SetFragmentShaderConstantATI");
+ CALL_SetFragmentShaderConstantATI(ctx->CurrentServerDispatch, (dst, value));
+}
+
+
+/* VertexP2ui: marshalled asynchronously */
+struct marshal_cmd_VertexP2ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint value;
+};
+static inline void
+_mesa_unmarshal_VertexP2ui(struct gl_context *ctx, const struct marshal_cmd_VertexP2ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint value = cmd->value;
+ CALL_VertexP2ui(ctx->CurrentServerDispatch, (type, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexP2ui(GLenum type, GLuint value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexP2ui);
+ struct marshal_cmd_VertexP2ui *cmd;
+ debug_print_marshal("VertexP2ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexP2ui, cmd_size);
+ cmd->type = type;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexP2ui");
+ CALL_VertexP2ui(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* ProgramUniform2fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLfloat value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform2fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2fv(GLuint program, GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2fv) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform2fv *cmd;
+ debug_print_marshal("ProgramUniform2fv");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2fv");
+ CALL_ProgramUniform2fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* GetTextureLevelParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTextureLevelParameteriv(GLuint texture, GLint level, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureLevelParameteriv");
+ CALL_GetTextureLevelParameteriv(ctx->CurrentServerDispatch, (texture, level, pname, params));
+}
+
+
+/* GetTexEnvfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexEnvfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexEnvfv");
+ CALL_GetTexEnvfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* BindAttribLocation: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindAttribLocation(GLuint program, GLuint index, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindAttribLocation");
+ CALL_BindAttribLocation(ctx->CurrentServerDispatch, (program, index, name));
+}
+
+
+/* TextureStorage2DEXT: marshalled asynchronously */
+struct marshal_cmd_TextureStorage2DEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum target;
+ GLsizei levels;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_TextureStorage2DEXT(struct gl_context *ctx, const struct marshal_cmd_TextureStorage2DEXT *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum target = cmd->target;
+ const GLsizei levels = cmd->levels;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_TextureStorage2DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage2DEXT(GLuint texture, GLenum target, GLsizei levels, GLenum internalFormat, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage2DEXT);
+ struct marshal_cmd_TextureStorage2DEXT *cmd;
+ debug_print_marshal("TextureStorage2DEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage2DEXT, cmd_size);
+ cmd->texture = texture;
+ cmd->target = target;
+ cmd->levels = levels;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage2DEXT");
+ CALL_TextureStorage2DEXT(ctx->CurrentServerDispatch, (texture, target, levels, internalFormat, width, height));
+}
+
+
+/* TextureParameterIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TextureParameterIiv(GLuint texture, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TextureParameterIiv");
+ CALL_TextureParameterIiv(ctx->CurrentServerDispatch, (texture, pname, params));
+}
+
+
+/* DrawTransformFeedbackInstanced: marshalled asynchronously */
+struct marshal_cmd_DrawTransformFeedbackInstanced
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint id;
+ GLsizei primcount;
+};
+static inline void
+_mesa_unmarshal_DrawTransformFeedbackInstanced(struct gl_context *ctx, const struct marshal_cmd_DrawTransformFeedbackInstanced *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint id = cmd->id;
+ const GLsizei primcount = cmd->primcount;
+ CALL_DrawTransformFeedbackInstanced(ctx->CurrentServerDispatch, (mode, id, primcount));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTransformFeedbackInstanced(GLenum mode, GLuint id, GLsizei primcount)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTransformFeedbackInstanced);
+ struct marshal_cmd_DrawTransformFeedbackInstanced *cmd;
+ debug_print_marshal("DrawTransformFeedbackInstanced");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTransformFeedbackInstanced, cmd_size);
+ cmd->mode = mode;
+ cmd->id = id;
+ cmd->primcount = primcount;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTransformFeedbackInstanced");
+ CALL_DrawTransformFeedbackInstanced(ctx->CurrentServerDispatch, (mode, id, primcount));
+}
+
+
+/* CopyTextureSubImage1D: marshalled asynchronously */
+struct marshal_cmd_CopyTextureSubImage1D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLint level;
+ GLint xoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+};
+static inline void
+_mesa_unmarshal_CopyTextureSubImage1D(struct gl_context *ctx, const struct marshal_cmd_CopyTextureSubImage1D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ CALL_CopyTextureSubImage1D(ctx->CurrentServerDispatch, (texture, level, xoffset, x, y, width));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTextureSubImage1D(GLuint texture, GLint level, GLint xoffset, GLint x, GLint y, GLsizei width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTextureSubImage1D);
+ struct marshal_cmd_CopyTextureSubImage1D *cmd;
+ debug_print_marshal("CopyTextureSubImage1D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTextureSubImage1D, cmd_size);
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTextureSubImage1D");
+ CALL_CopyTextureSubImage1D(ctx->CurrentServerDispatch, (texture, level, xoffset, x, y, width));
+}
+
+
+/* ResumeTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_ResumeTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_ResumeTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_ResumeTransformFeedback *cmd)
+{
+ CALL_ResumeTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_ResumeTransformFeedback(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ResumeTransformFeedback);
+ struct marshal_cmd_ResumeTransformFeedback *cmd;
+ debug_print_marshal("ResumeTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ResumeTransformFeedback, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ResumeTransformFeedback");
+ CALL_ResumeTransformFeedback(ctx->CurrentServerDispatch, ());
+}
+
+
+/* VertexAttribI1iv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI1iv(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI1iv");
+ CALL_VertexAttribI1iv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Vertex2dv: marshalled asynchronously */
+struct marshal_cmd_Vertex2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble v[2];
+};
+static inline void
+_mesa_unmarshal_Vertex2dv(struct gl_context *ctx, const struct marshal_cmd_Vertex2dv *cmd)
+{
+ const GLdouble * v = cmd->v;
+ CALL_Vertex2dv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2dv(const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2dv);
+ struct marshal_cmd_Vertex2dv *cmd;
+ debug_print_marshal("Vertex2dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2dv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2dv");
+ CALL_Vertex2dv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* VertexAttribI2uivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI2uivEXT(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI2uivEXT");
+ CALL_VertexAttribI2uivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SampleMaski: marshalled asynchronously */
+struct marshal_cmd_SampleMaski
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLbitfield mask;
+};
+static inline void
+_mesa_unmarshal_SampleMaski(struct gl_context *ctx, const struct marshal_cmd_SampleMaski *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLbitfield mask = cmd->mask;
+ CALL_SampleMaski(ctx->CurrentServerDispatch, (index, mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_SampleMaski(GLuint index, GLbitfield mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SampleMaski);
+ struct marshal_cmd_SampleMaski *cmd;
+ debug_print_marshal("SampleMaski");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SampleMaski, cmd_size);
+ cmd->index = index;
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SampleMaski");
+ CALL_SampleMaski(ctx->CurrentServerDispatch, (index, mask));
+}
+
+
+/* GetFloati_v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFloati_v(GLenum target, GLuint index, GLfloat * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFloati_v");
+ CALL_GetFloati_v(ctx->CurrentServerDispatch, (target, index, data));
+}
+
+
+/* MultiTexCoord2iv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord2iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint v[2];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord2iv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord2iv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint * v = cmd->v;
+ CALL_MultiTexCoord2iv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord2iv(GLenum target, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord2iv);
+ struct marshal_cmd_MultiTexCoord2iv *cmd;
+ debug_print_marshal("MultiTexCoord2iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord2iv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord2iv");
+ CALL_MultiTexCoord2iv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* DrawPixels: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DrawPixels(GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DrawPixels");
+ CALL_DrawPixels(ctx->CurrentServerDispatch, (width, height, format, type, pixels));
+}
+
+
+/* CreateFramebuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateFramebuffers(GLsizei n, GLuint * framebuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateFramebuffers");
+ CALL_CreateFramebuffers(ctx->CurrentServerDispatch, (n, framebuffers));
+}
+
+
+/* DrawTransformFeedback: marshalled asynchronously */
+struct marshal_cmd_DrawTransformFeedback
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint id;
+};
+static inline void
+_mesa_unmarshal_DrawTransformFeedback(struct gl_context *ctx, const struct marshal_cmd_DrawTransformFeedback *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint id = cmd->id;
+ CALL_DrawTransformFeedback(ctx->CurrentServerDispatch, (mode, id));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTransformFeedback(GLenum mode, GLuint id)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTransformFeedback);
+ struct marshal_cmd_DrawTransformFeedback *cmd;
+ debug_print_marshal("DrawTransformFeedback");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTransformFeedback, cmd_size);
+ cmd->mode = mode;
+ cmd->id = id;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTransformFeedback");
+ CALL_DrawTransformFeedback(ctx->CurrentServerDispatch, (mode, id));
+}
+
+
+/* VertexAttribs3fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs3fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 12) bytes are GLfloat v[n][3] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs3fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs3fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLfloat * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLfloat *) variable_data;
+ variable_data += n * 12;
+ CALL_VertexAttribs3fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs3fvNV(GLuint index, GLsizei n, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs3fvNV) + safe_mul(n, 12);
+ struct marshal_cmd_VertexAttribs3fvNV *cmd;
+ debug_print_marshal("VertexAttribs3fvNV");
+ if (unlikely(safe_mul(n, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs3fvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 12);
+ variable_data += n * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs3fvNV");
+ CALL_VertexAttribs3fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* GenLists: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GenLists(GLsizei range)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenLists");
+ return CALL_GenLists(ctx->CurrentServerDispatch, (range));
+}
+
+
+/* ProgramUniform2ui64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLuint64 value[count][2] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2ui64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2ui64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform2ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2ui64vARB(GLuint program, GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2ui64vARB) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform2ui64vARB *cmd;
+ debug_print_marshal("ProgramUniform2ui64vARB");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2ui64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2ui64vARB");
+ CALL_ProgramUniform2ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* MapGrid2d: marshalled asynchronously */
+struct marshal_cmd_MapGrid2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint un;
+ GLdouble u1;
+ GLdouble u2;
+ GLint vn;
+ GLdouble v1;
+ GLdouble v2;
+};
+static inline void
+_mesa_unmarshal_MapGrid2d(struct gl_context *ctx, const struct marshal_cmd_MapGrid2d *cmd)
+{
+ const GLint un = cmd->un;
+ const GLdouble u1 = cmd->u1;
+ const GLdouble u2 = cmd->u2;
+ const GLint vn = cmd->vn;
+ const GLdouble v1 = cmd->v1;
+ const GLdouble v2 = cmd->v2;
+ CALL_MapGrid2d(ctx->CurrentServerDispatch, (un, u1, u2, vn, v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_MapGrid2d(GLint un, GLdouble u1, GLdouble u2, GLint vn, GLdouble v1, GLdouble v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MapGrid2d);
+ struct marshal_cmd_MapGrid2d *cmd;
+ debug_print_marshal("MapGrid2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MapGrid2d, cmd_size);
+ cmd->un = un;
+ cmd->u1 = u1;
+ cmd->u2 = u2;
+ cmd->vn = vn;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MapGrid2d");
+ CALL_MapGrid2d(ctx->CurrentServerDispatch, (un, u1, u2, vn, v1, v2));
+}
+
+
+/* MapGrid2f: marshalled asynchronously */
+struct marshal_cmd_MapGrid2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint un;
+ GLfloat u1;
+ GLfloat u2;
+ GLint vn;
+ GLfloat v1;
+ GLfloat v2;
+};
+static inline void
+_mesa_unmarshal_MapGrid2f(struct gl_context *ctx, const struct marshal_cmd_MapGrid2f *cmd)
+{
+ const GLint un = cmd->un;
+ const GLfloat u1 = cmd->u1;
+ const GLfloat u2 = cmd->u2;
+ const GLint vn = cmd->vn;
+ const GLfloat v1 = cmd->v1;
+ const GLfloat v2 = cmd->v2;
+ CALL_MapGrid2f(ctx->CurrentServerDispatch, (un, u1, u2, vn, v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_MapGrid2f(GLint un, GLfloat u1, GLfloat u2, GLint vn, GLfloat v1, GLfloat v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MapGrid2f);
+ struct marshal_cmd_MapGrid2f *cmd;
+ debug_print_marshal("MapGrid2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MapGrid2f, cmd_size);
+ cmd->un = un;
+ cmd->u1 = u1;
+ cmd->u2 = u2;
+ cmd->vn = vn;
+ cmd->v1 = v1;
+ cmd->v2 = v2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MapGrid2f");
+ CALL_MapGrid2f(ctx->CurrentServerDispatch, (un, u1, u2, vn, v1, v2));
+}
+
+
+/* SampleMapATI: marshalled asynchronously */
+struct marshal_cmd_SampleMapATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint dst;
+ GLuint interp;
+ GLenum swizzle;
+};
+static inline void
+_mesa_unmarshal_SampleMapATI(struct gl_context *ctx, const struct marshal_cmd_SampleMapATI *cmd)
+{
+ const GLuint dst = cmd->dst;
+ const GLuint interp = cmd->interp;
+ const GLenum swizzle = cmd->swizzle;
+ CALL_SampleMapATI(ctx->CurrentServerDispatch, (dst, interp, swizzle));
+}
+static void GLAPIENTRY
+_mesa_marshal_SampleMapATI(GLuint dst, GLuint interp, GLenum swizzle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SampleMapATI);
+ struct marshal_cmd_SampleMapATI *cmd;
+ debug_print_marshal("SampleMapATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SampleMapATI, cmd_size);
+ cmd->dst = dst;
+ cmd->interp = interp;
+ cmd->swizzle = swizzle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SampleMapATI");
+ CALL_SampleMapATI(ctx->CurrentServerDispatch, (dst, interp, swizzle));
+}
+
+
+/* GetActiveAttrib: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveAttrib(GLuint program, GLuint index, GLsizei bufSize, GLsizei * length, GLint * size, GLenum * type, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveAttrib");
+ CALL_GetActiveAttrib(ctx->CurrentServerDispatch, (program, index, bufSize, length, size, type, name));
+}
+
+
+/* PixelMapfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PixelMapfv(GLenum map, GLsizei mapsize, const GLfloat * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PixelMapfv");
+ CALL_PixelMapfv(ctx->CurrentServerDispatch, (map, mapsize, values));
+}
+
+
+/* ClearBufferData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearBufferData(GLenum target, GLenum internalformat, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearBufferData");
+ CALL_ClearBufferData(ctx->CurrentServerDispatch, (target, internalformat, format, type, data));
+}
+
+
+/* Color3usv: marshalled asynchronously */
+struct marshal_cmd_Color3usv
+{
+ struct marshal_cmd_base cmd_base;
+ GLushort v[3];
+};
+static inline void
+_mesa_unmarshal_Color3usv(struct gl_context *ctx, const struct marshal_cmd_Color3usv *cmd)
+{
+ const GLushort * v = cmd->v;
+ CALL_Color3usv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3usv(const GLushort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3usv);
+ struct marshal_cmd_Color3usv *cmd;
+ debug_print_marshal("Color3usv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3usv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3usv");
+ CALL_Color3usv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* CopyImageSubData: marshalled asynchronously */
+struct marshal_cmd_CopyImageSubData
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint srcName;
+ GLenum srcTarget;
+ GLint srcLevel;
+ GLint srcX;
+ GLint srcY;
+ GLint srcZ;
+ GLuint dstName;
+ GLenum dstTarget;
+ GLint dstLevel;
+ GLint dstX;
+ GLint dstY;
+ GLint dstZ;
+ GLsizei srcWidth;
+ GLsizei srcHeight;
+ GLsizei srcDepth;
+};
+static inline void
+_mesa_unmarshal_CopyImageSubData(struct gl_context *ctx, const struct marshal_cmd_CopyImageSubData *cmd)
+{
+ const GLuint srcName = cmd->srcName;
+ const GLenum srcTarget = cmd->srcTarget;
+ const GLint srcLevel = cmd->srcLevel;
+ const GLint srcX = cmd->srcX;
+ const GLint srcY = cmd->srcY;
+ const GLint srcZ = cmd->srcZ;
+ const GLuint dstName = cmd->dstName;
+ const GLenum dstTarget = cmd->dstTarget;
+ const GLint dstLevel = cmd->dstLevel;
+ const GLint dstX = cmd->dstX;
+ const GLint dstY = cmd->dstY;
+ const GLint dstZ = cmd->dstZ;
+ const GLsizei srcWidth = cmd->srcWidth;
+ const GLsizei srcHeight = cmd->srcHeight;
+ const GLsizei srcDepth = cmd->srcDepth;
+ CALL_CopyImageSubData(ctx->CurrentServerDispatch, (srcName, srcTarget, srcLevel, srcX, srcY, srcZ, dstName, dstTarget, dstLevel, dstX, dstY, dstZ, srcWidth, srcHeight, srcDepth));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyImageSubData(GLuint srcName, GLenum srcTarget, GLint srcLevel, GLint srcX, GLint srcY, GLint srcZ, GLuint dstName, GLenum dstTarget, GLint dstLevel, GLint dstX, GLint dstY, GLint dstZ, GLsizei srcWidth, GLsizei srcHeight, GLsizei srcDepth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyImageSubData);
+ struct marshal_cmd_CopyImageSubData *cmd;
+ debug_print_marshal("CopyImageSubData");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyImageSubData, cmd_size);
+ cmd->srcName = srcName;
+ cmd->srcTarget = srcTarget;
+ cmd->srcLevel = srcLevel;
+ cmd->srcX = srcX;
+ cmd->srcY = srcY;
+ cmd->srcZ = srcZ;
+ cmd->dstName = dstName;
+ cmd->dstTarget = dstTarget;
+ cmd->dstLevel = dstLevel;
+ cmd->dstX = dstX;
+ cmd->dstY = dstY;
+ cmd->dstZ = dstZ;
+ cmd->srcWidth = srcWidth;
+ cmd->srcHeight = srcHeight;
+ cmd->srcDepth = srcDepth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyImageSubData");
+ CALL_CopyImageSubData(ctx->CurrentServerDispatch, (srcName, srcTarget, srcLevel, srcX, srcY, srcZ, dstName, dstTarget, dstLevel, dstX, dstY, dstZ, srcWidth, srcHeight, srcDepth));
+}
+
+
+/* StencilOpSeparate: marshalled asynchronously */
+struct marshal_cmd_StencilOpSeparate
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum sfail;
+ GLenum zfail;
+ GLenum zpass;
+};
+static inline void
+_mesa_unmarshal_StencilOpSeparate(struct gl_context *ctx, const struct marshal_cmd_StencilOpSeparate *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum sfail = cmd->sfail;
+ const GLenum zfail = cmd->zfail;
+ const GLenum zpass = cmd->zpass;
+ CALL_StencilOpSeparate(ctx->CurrentServerDispatch, (face, sfail, zfail, zpass));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilOpSeparate(GLenum face, GLenum sfail, GLenum zfail, GLenum zpass)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilOpSeparate);
+ struct marshal_cmd_StencilOpSeparate *cmd;
+ debug_print_marshal("StencilOpSeparate");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilOpSeparate, cmd_size);
+ cmd->face = face;
+ cmd->sfail = sfail;
+ cmd->zfail = zfail;
+ cmd->zpass = zpass;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilOpSeparate");
+ CALL_StencilOpSeparate(ctx->CurrentServerDispatch, (face, sfail, zfail, zpass));
+}
+
+
+/* GenSamplers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenSamplers(GLsizei count, GLuint * samplers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenSamplers");
+ CALL_GenSamplers(ctx->CurrentServerDispatch, (count, samplers));
+}
+
+
+/* ClipControl: marshalled asynchronously */
+struct marshal_cmd_ClipControl
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum origin;
+ GLenum depth;
+};
+static inline void
+_mesa_unmarshal_ClipControl(struct gl_context *ctx, const struct marshal_cmd_ClipControl *cmd)
+{
+ const GLenum origin = cmd->origin;
+ const GLenum depth = cmd->depth;
+ CALL_ClipControl(ctx->CurrentServerDispatch, (origin, depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClipControl(GLenum origin, GLenum depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClipControl);
+ struct marshal_cmd_ClipControl *cmd;
+ debug_print_marshal("ClipControl");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClipControl, cmd_size);
+ cmd->origin = origin;
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClipControl");
+ CALL_ClipControl(ctx->CurrentServerDispatch, (origin, depth));
+}
+
+
+/* DrawTexfOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexfOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat width;
+ GLfloat height;
+};
+static inline void
+_mesa_unmarshal_DrawTexfOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexfOES *cmd)
+{
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat width = cmd->width;
+ const GLfloat height = cmd->height;
+ CALL_DrawTexfOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexfOES(GLfloat x, GLfloat y, GLfloat z, GLfloat width, GLfloat height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexfOES);
+ struct marshal_cmd_DrawTexfOES *cmd;
+ debug_print_marshal("DrawTexfOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexfOES, cmd_size);
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexfOES");
+ CALL_DrawTexfOES(ctx->CurrentServerDispatch, (x, y, z, width, height));
+}
+
+
+/* Uniform4i64vARB: marshalled asynchronously */
+struct marshal_cmd_Uniform4i64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 32) bytes are GLint64 value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4i64vARB(struct gl_context *ctx, const struct marshal_cmd_Uniform4i64vARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint64 *) variable_data;
+ variable_data += count * 32;
+ CALL_Uniform4i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4i64vARB(GLint location, GLsizei count, const GLint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4i64vARB) + safe_mul(count, 32);
+ struct marshal_cmd_Uniform4i64vARB *cmd;
+ debug_print_marshal("Uniform4i64vARB");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4i64vARB, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4i64vARB");
+ CALL_Uniform4i64vARB(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* AttachObjectARB: marshalled asynchronously */
+struct marshal_cmd_AttachObjectARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLhandleARB containerObj;
+ GLhandleARB obj;
+};
+static inline void
+_mesa_unmarshal_AttachObjectARB(struct gl_context *ctx, const struct marshal_cmd_AttachObjectARB *cmd)
+{
+ const GLhandleARB containerObj = cmd->containerObj;
+ const GLhandleARB obj = cmd->obj;
+ CALL_AttachObjectARB(ctx->CurrentServerDispatch, (containerObj, obj));
+}
+static void GLAPIENTRY
+_mesa_marshal_AttachObjectARB(GLhandleARB containerObj, GLhandleARB obj)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AttachObjectARB);
+ struct marshal_cmd_AttachObjectARB *cmd;
+ debug_print_marshal("AttachObjectARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AttachObjectARB, cmd_size);
+ cmd->containerObj = containerObj;
+ cmd->obj = obj;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AttachObjectARB");
+ CALL_AttachObjectARB(ctx->CurrentServerDispatch, (containerObj, obj));
+}
+
+
+/* Accum: marshalled asynchronously */
+struct marshal_cmd_Accum
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum op;
+ GLfloat value;
+};
+static inline void
+_mesa_unmarshal_Accum(struct gl_context *ctx, const struct marshal_cmd_Accum *cmd)
+{
+ const GLenum op = cmd->op;
+ const GLfloat value = cmd->value;
+ CALL_Accum(ctx->CurrentServerDispatch, (op, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Accum(GLenum op, GLfloat value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Accum);
+ struct marshal_cmd_Accum *cmd;
+ debug_print_marshal("Accum");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Accum, cmd_size);
+ cmd->op = op;
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Accum");
+ CALL_Accum(ctx->CurrentServerDispatch, (op, value));
+}
+
+
+/* GetTexImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexImage(GLenum target, GLint level, GLenum format, GLenum type, GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexImage");
+ CALL_GetTexImage(ctx->CurrentServerDispatch, (target, level, format, type, pixels));
+}
+
+
+/* Color4x: marshalled asynchronously */
+struct marshal_cmd_Color4x
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed red;
+ GLfixed green;
+ GLfixed blue;
+ GLfixed alpha;
+};
+static inline void
+_mesa_unmarshal_Color4x(struct gl_context *ctx, const struct marshal_cmd_Color4x *cmd)
+{
+ const GLfixed red = cmd->red;
+ const GLfixed green = cmd->green;
+ const GLfixed blue = cmd->blue;
+ const GLfixed alpha = cmd->alpha;
+ CALL_Color4x(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4x(GLfixed red, GLfixed green, GLfixed blue, GLfixed alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4x);
+ struct marshal_cmd_Color4x *cmd;
+ debug_print_marshal("Color4x");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4x, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4x");
+ CALL_Color4x(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* ConvolutionParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ConvolutionParameteriv(GLenum target, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ConvolutionParameteriv");
+ CALL_ConvolutionParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* Color4s: marshalled asynchronously */
+struct marshal_cmd_Color4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort red;
+ GLshort green;
+ GLshort blue;
+ GLshort alpha;
+};
+static inline void
+_mesa_unmarshal_Color4s(struct gl_context *ctx, const struct marshal_cmd_Color4s *cmd)
+{
+ const GLshort red = cmd->red;
+ const GLshort green = cmd->green;
+ const GLshort blue = cmd->blue;
+ const GLshort alpha = cmd->alpha;
+ CALL_Color4s(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4s(GLshort red, GLshort green, GLshort blue, GLshort alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4s);
+ struct marshal_cmd_Color4s *cmd;
+ debug_print_marshal("Color4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4s, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4s");
+ CALL_Color4s(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* EnableVertexAttribArray: marshalled asynchronously */
+struct marshal_cmd_EnableVertexAttribArray
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_EnableVertexAttribArray(struct gl_context *ctx, const struct marshal_cmd_EnableVertexAttribArray *cmd)
+{
+ const GLuint index = cmd->index;
+ CALL_EnableVertexAttribArray(ctx->CurrentServerDispatch, (index));
+}
+static void GLAPIENTRY
+_mesa_marshal_EnableVertexAttribArray(GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EnableVertexAttribArray);
+ struct marshal_cmd_EnableVertexAttribArray *cmd;
+ debug_print_marshal("EnableVertexAttribArray");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EnableVertexAttribArray, cmd_size);
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EnableVertexAttribArray");
+ CALL_EnableVertexAttribArray(ctx->CurrentServerDispatch, (index));
+}
+
+
+/* Color4i: marshalled asynchronously */
+struct marshal_cmd_Color4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint red;
+ GLint green;
+ GLint blue;
+ GLint alpha;
+};
+static inline void
+_mesa_unmarshal_Color4i(struct gl_context *ctx, const struct marshal_cmd_Color4i *cmd)
+{
+ const GLint red = cmd->red;
+ const GLint green = cmd->green;
+ const GLint blue = cmd->blue;
+ const GLint alpha = cmd->alpha;
+ CALL_Color4i(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4i(GLint red, GLint green, GLint blue, GLint alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4i);
+ struct marshal_cmd_Color4i *cmd;
+ debug_print_marshal("Color4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4i, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4i");
+ CALL_Color4i(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* Color4f: marshalled asynchronously */
+struct marshal_cmd_Color4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat red;
+ GLfloat green;
+ GLfloat blue;
+ GLfloat alpha;
+};
+static inline void
+_mesa_unmarshal_Color4f(struct gl_context *ctx, const struct marshal_cmd_Color4f *cmd)
+{
+ const GLfloat red = cmd->red;
+ const GLfloat green = cmd->green;
+ const GLfloat blue = cmd->blue;
+ const GLfloat alpha = cmd->alpha;
+ CALL_Color4f(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4f(GLfloat red, GLfloat green, GLfloat blue, GLfloat alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4f);
+ struct marshal_cmd_Color4f *cmd;
+ debug_print_marshal("Color4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4f, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4f");
+ CALL_Color4f(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* ShaderStorageBlockBinding: marshalled asynchronously */
+struct marshal_cmd_ShaderStorageBlockBinding
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLuint shaderStorageBlockIndex;
+ GLuint shaderStorageBlockBinding;
+};
+static inline void
+_mesa_unmarshal_ShaderStorageBlockBinding(struct gl_context *ctx, const struct marshal_cmd_ShaderStorageBlockBinding *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLuint shaderStorageBlockIndex = cmd->shaderStorageBlockIndex;
+ const GLuint shaderStorageBlockBinding = cmd->shaderStorageBlockBinding;
+ CALL_ShaderStorageBlockBinding(ctx->CurrentServerDispatch, (program, shaderStorageBlockIndex, shaderStorageBlockBinding));
+}
+static void GLAPIENTRY
+_mesa_marshal_ShaderStorageBlockBinding(GLuint program, GLuint shaderStorageBlockIndex, GLuint shaderStorageBlockBinding)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ShaderStorageBlockBinding);
+ struct marshal_cmd_ShaderStorageBlockBinding *cmd;
+ debug_print_marshal("ShaderStorageBlockBinding");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ShaderStorageBlockBinding, cmd_size);
+ cmd->program = program;
+ cmd->shaderStorageBlockIndex = shaderStorageBlockIndex;
+ cmd->shaderStorageBlockBinding = shaderStorageBlockBinding;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ShaderStorageBlockBinding");
+ CALL_ShaderStorageBlockBinding(ctx->CurrentServerDispatch, (program, shaderStorageBlockIndex, shaderStorageBlockBinding));
+}
+
+
+/* Color4d: marshalled asynchronously */
+struct marshal_cmd_Color4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble red;
+ GLdouble green;
+ GLdouble blue;
+ GLdouble alpha;
+};
+static inline void
+_mesa_unmarshal_Color4d(struct gl_context *ctx, const struct marshal_cmd_Color4d *cmd)
+{
+ const GLdouble red = cmd->red;
+ const GLdouble green = cmd->green;
+ const GLdouble blue = cmd->blue;
+ const GLdouble alpha = cmd->alpha;
+ CALL_Color4d(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4d(GLdouble red, GLdouble green, GLdouble blue, GLdouble alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4d);
+ struct marshal_cmd_Color4d *cmd;
+ debug_print_marshal("Color4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4d, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4d");
+ CALL_Color4d(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* Color4b: marshalled asynchronously */
+struct marshal_cmd_Color4b
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte red;
+ GLbyte green;
+ GLbyte blue;
+ GLbyte alpha;
+};
+static inline void
+_mesa_unmarshal_Color4b(struct gl_context *ctx, const struct marshal_cmd_Color4b *cmd)
+{
+ const GLbyte red = cmd->red;
+ const GLbyte green = cmd->green;
+ const GLbyte blue = cmd->blue;
+ const GLbyte alpha = cmd->alpha;
+ CALL_Color4b(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4b(GLbyte red, GLbyte green, GLbyte blue, GLbyte alpha)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4b);
+ struct marshal_cmd_Color4b *cmd;
+ debug_print_marshal("Color4b");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4b, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ cmd->alpha = alpha;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4b");
+ CALL_Color4b(ctx->CurrentServerDispatch, (red, green, blue, alpha));
+}
+
+
+/* MemoryObjectParameterivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MemoryObjectParameterivEXT(GLuint memoryObject, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MemoryObjectParameterivEXT");
+ CALL_MemoryObjectParameterivEXT(ctx->CurrentServerDispatch, (memoryObject, pname, params));
+}
+
+
+/* GetAttachedObjectsARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetAttachedObjectsARB(GLhandleARB containerObj, GLsizei maxLength, GLsizei * length, GLhandleARB * infoLog)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetAttachedObjectsARB");
+ CALL_GetAttachedObjectsARB(ctx->CurrentServerDispatch, (containerObj, maxLength, length, infoLog));
+}
+
+
+/* EvalCoord1fv: marshalled asynchronously */
+struct marshal_cmd_EvalCoord1fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat u[1];
+};
+static inline void
+_mesa_unmarshal_EvalCoord1fv(struct gl_context *ctx, const struct marshal_cmd_EvalCoord1fv *cmd)
+{
+ const GLfloat * u = cmd->u;
+ CALL_EvalCoord1fv(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord1fv(const GLfloat * u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord1fv);
+ struct marshal_cmd_EvalCoord1fv *cmd;
+ debug_print_marshal("EvalCoord1fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord1fv, cmd_size);
+ memcpy(cmd->u, u, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord1fv");
+ CALL_EvalCoord1fv(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* VertexAttribLFormat: marshalled asynchronously */
+struct marshal_cmd_VertexAttribLFormat
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint attribindex;
+ GLint size;
+ GLenum type;
+ GLuint relativeoffset;
+};
+static inline void
+_mesa_unmarshal_VertexAttribLFormat(struct gl_context *ctx, const struct marshal_cmd_VertexAttribLFormat *cmd)
+{
+ const GLuint attribindex = cmd->attribindex;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLuint relativeoffset = cmd->relativeoffset;
+ CALL_VertexAttribLFormat(ctx->CurrentServerDispatch, (attribindex, size, type, relativeoffset));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribLFormat(GLuint attribindex, GLint size, GLenum type, GLuint relativeoffset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribLFormat);
+ struct marshal_cmd_VertexAttribLFormat *cmd;
+ debug_print_marshal("VertexAttribLFormat");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribLFormat, cmd_size);
+ cmd->attribindex = attribindex;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->relativeoffset = relativeoffset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribLFormat");
+ CALL_VertexAttribLFormat(ctx->CurrentServerDispatch, (attribindex, size, type, relativeoffset));
+}
+
+
+/* VertexAttribL3d: marshalled asynchronously */
+struct marshal_cmd_VertexAttribL3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_VertexAttribL3d(struct gl_context *ctx, const struct marshal_cmd_VertexAttribL3d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_VertexAttribL3d(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL3d(GLuint index, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribL3d);
+ struct marshal_cmd_VertexAttribL3d *cmd;
+ debug_print_marshal("VertexAttribL3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribL3d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribL3d");
+ CALL_VertexAttribL3d(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* ClearNamedFramebufferuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedFramebufferuiv(GLuint framebuffer, GLenum buffer, GLint drawbuffer, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearNamedFramebufferuiv");
+ CALL_ClearNamedFramebufferuiv(ctx->CurrentServerDispatch, (framebuffer, buffer, drawbuffer, value));
+}
+
+
+/* StencilFuncSeparate: marshalled asynchronously */
+struct marshal_cmd_StencilFuncSeparate
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum func;
+ GLint ref;
+ GLuint mask;
+};
+static inline void
+_mesa_unmarshal_StencilFuncSeparate(struct gl_context *ctx, const struct marshal_cmd_StencilFuncSeparate *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum func = cmd->func;
+ const GLint ref = cmd->ref;
+ const GLuint mask = cmd->mask;
+ CALL_StencilFuncSeparate(ctx->CurrentServerDispatch, (face, func, ref, mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_StencilFuncSeparate(GLenum face, GLenum func, GLint ref, GLuint mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_StencilFuncSeparate);
+ struct marshal_cmd_StencilFuncSeparate *cmd;
+ debug_print_marshal("StencilFuncSeparate");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_StencilFuncSeparate, cmd_size);
+ cmd->face = face;
+ cmd->func = func;
+ cmd->ref = ref;
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("StencilFuncSeparate");
+ CALL_StencilFuncSeparate(ctx->CurrentServerDispatch, (face, func, ref, mask));
+}
+
+
+/* Normal3fv: marshalled asynchronously */
+struct marshal_cmd_Normal3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_Normal3fv(struct gl_context *ctx, const struct marshal_cmd_Normal3fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Normal3fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Normal3fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Normal3fv);
+ struct marshal_cmd_Normal3fv *cmd;
+ debug_print_marshal("Normal3fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Normal3fv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Normal3fv");
+ CALL_Normal3fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* NormalP3ui: marshalled asynchronously */
+struct marshal_cmd_NormalP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_NormalP3ui(struct gl_context *ctx, const struct marshal_cmd_NormalP3ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_NormalP3ui(ctx->CurrentServerDispatch, (type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_NormalP3ui(GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NormalP3ui);
+ struct marshal_cmd_NormalP3ui *cmd;
+ debug_print_marshal("NormalP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NormalP3ui, cmd_size);
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NormalP3ui");
+ CALL_NormalP3ui(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* CreateSamplers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateSamplers(GLsizei n, GLuint * samplers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateSamplers");
+ CALL_CreateSamplers(ctx->CurrentServerDispatch, (n, samplers));
+}
+
+
+/* MultiTexCoord3fvARB: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord3fvARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord3fvARB(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord3fvARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLfloat * v = cmd->v;
+ CALL_MultiTexCoord3fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord3fvARB(GLenum target, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord3fvARB);
+ struct marshal_cmd_MultiTexCoord3fvARB *cmd;
+ debug_print_marshal("MultiTexCoord3fvARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord3fvARB, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord3fvARB");
+ CALL_MultiTexCoord3fvARB(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* TexSubImage2D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexSubImage2D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLsizei width, GLsizei height, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexSubImage2D");
+ CALL_TexSubImage2D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, width, height, format, type, pixels));
+}
+
+
+/* TexGenfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexGenfv(GLenum coord, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexGenfv");
+ CALL_TexGenfv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* GetVertexAttribiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribiv(GLuint index, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribiv");
+ CALL_GetVertexAttribiv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* TexCoordP2uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexCoordP2uiv(GLenum type, const GLuint * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexCoordP2uiv");
+ CALL_TexCoordP2uiv(ctx->CurrentServerDispatch, (type, coords));
+}
+
+
+/* Uniform3fv: marshalled asynchronously */
+struct marshal_cmd_Uniform3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLfloat value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3fv(struct gl_context *ctx, const struct marshal_cmd_Uniform3fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 12;
+ CALL_Uniform3fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3fv(GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3fv) + safe_mul(count, 12);
+ struct marshal_cmd_Uniform3fv *cmd;
+ debug_print_marshal("Uniform3fv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3fv");
+ CALL_Uniform3fv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* BlendEquation: marshalled asynchronously */
+struct marshal_cmd_BlendEquation
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+};
+static inline void
+_mesa_unmarshal_BlendEquation(struct gl_context *ctx, const struct marshal_cmd_BlendEquation *cmd)
+{
+ const GLenum mode = cmd->mode;
+ CALL_BlendEquation(ctx->CurrentServerDispatch, (mode));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendEquation(GLenum mode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendEquation);
+ struct marshal_cmd_BlendEquation *cmd;
+ debug_print_marshal("BlendEquation");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendEquation, cmd_size);
+ cmd->mode = mode;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendEquation");
+ CALL_BlendEquation(ctx->CurrentServerDispatch, (mode));
+}
+
+
+/* VertexAttrib3dNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3dNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3dNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3dNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_VertexAttrib3dNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3dNV(GLuint index, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3dNV);
+ struct marshal_cmd_VertexAttrib3dNV *cmd;
+ debug_print_marshal("VertexAttrib3dNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3dNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3dNV");
+ CALL_VertexAttrib3dNV(ctx->CurrentServerDispatch, (index, x, y, z));
+}
+
+
+/* PushName: marshalled asynchronously */
+struct marshal_cmd_PushName
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint name;
+};
+static inline void
+_mesa_unmarshal_PushName(struct gl_context *ctx, const struct marshal_cmd_PushName *cmd)
+{
+ const GLuint name = cmd->name;
+ CALL_PushName(ctx->CurrentServerDispatch, (name));
+}
+static void GLAPIENTRY
+_mesa_marshal_PushName(GLuint name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PushName);
+ struct marshal_cmd_PushName *cmd;
+ debug_print_marshal("PushName");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PushName, cmd_size);
+ cmd->name = name;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PushName");
+ CALL_PushName(ctx->CurrentServerDispatch, (name));
+}
+
+
+/* DeleteRenderbuffers: marshalled asynchronously */
+struct marshal_cmd_DeleteRenderbuffers
+{
+ struct marshal_cmd_base cmd_base;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLuint renderbuffers[n] */
+};
+static inline void
+_mesa_unmarshal_DeleteRenderbuffers(struct gl_context *ctx, const struct marshal_cmd_DeleteRenderbuffers *cmd)
+{
+ const GLsizei n = cmd->n;
+ const GLuint * renderbuffers;
+ const char *variable_data = (const char *) (cmd + 1);
+ renderbuffers = (const GLuint *) variable_data;
+ variable_data += n * 4;
+ CALL_DeleteRenderbuffers(ctx->CurrentServerDispatch, (n, renderbuffers));
+}
+static void GLAPIENTRY
+_mesa_marshal_DeleteRenderbuffers(GLsizei n, const GLuint * renderbuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DeleteRenderbuffers) + safe_mul(n, 4);
+ struct marshal_cmd_DeleteRenderbuffers *cmd;
+ debug_print_marshal("DeleteRenderbuffers");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DeleteRenderbuffers, cmd_size);
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, renderbuffers, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DeleteRenderbuffers");
+ CALL_DeleteRenderbuffers(ctx->CurrentServerDispatch, (n, renderbuffers));
+}
+
+
+/* VertexAttrib1dv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1dv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1dv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib1dv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1dv(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1dv);
+ struct marshal_cmd_VertexAttrib1dv *cmd;
+ debug_print_marshal("VertexAttrib1dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1dv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1dv");
+ CALL_VertexAttrib1dv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* IsShader: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsShader(GLuint shader)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsShader");
+ return CALL_IsShader(ctx->CurrentServerDispatch, (shader));
+}
+
+
+/* Rotated: marshalled asynchronously */
+struct marshal_cmd_Rotated
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble angle;
+ GLdouble x;
+ GLdouble y;
+ GLdouble z;
+};
+static inline void
+_mesa_unmarshal_Rotated(struct gl_context *ctx, const struct marshal_cmd_Rotated *cmd)
+{
+ const GLdouble angle = cmd->angle;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ const GLdouble z = cmd->z;
+ CALL_Rotated(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rotated(GLdouble angle, GLdouble x, GLdouble y, GLdouble z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rotated);
+ struct marshal_cmd_Rotated *cmd;
+ debug_print_marshal("Rotated");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rotated, cmd_size);
+ cmd->angle = angle;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rotated");
+ CALL_Rotated(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+
+
+/* Color4iv: marshalled asynchronously */
+struct marshal_cmd_Color4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_Color4iv(struct gl_context *ctx, const struct marshal_cmd_Color4iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Color4iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4iv);
+ struct marshal_cmd_Color4iv *cmd;
+ debug_print_marshal("Color4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4iv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4iv");
+ CALL_Color4iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* PointParameterxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PointParameterxv(GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PointParameterxv");
+ CALL_PointParameterxv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* Rotatex: marshalled asynchronously */
+struct marshal_cmd_Rotatex
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed angle;
+ GLfixed x;
+ GLfixed y;
+ GLfixed z;
+};
+static inline void
+_mesa_unmarshal_Rotatex(struct gl_context *ctx, const struct marshal_cmd_Rotatex *cmd)
+{
+ const GLfixed angle = cmd->angle;
+ const GLfixed x = cmd->x;
+ const GLfixed y = cmd->y;
+ const GLfixed z = cmd->z;
+ CALL_Rotatex(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rotatex(GLfixed angle, GLfixed x, GLfixed y, GLfixed z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rotatex);
+ struct marshal_cmd_Rotatex *cmd;
+ debug_print_marshal("Rotatex");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rotatex, cmd_size);
+ cmd->angle = angle;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rotatex");
+ CALL_Rotatex(ctx->CurrentServerDispatch, (angle, x, y, z));
+}
+
+
+/* FramebufferTextureLayer: marshalled asynchronously */
+struct marshal_cmd_FramebufferTextureLayer
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum attachment;
+ GLuint texture;
+ GLint level;
+ GLint layer;
+};
+static inline void
+_mesa_unmarshal_FramebufferTextureLayer(struct gl_context *ctx, const struct marshal_cmd_FramebufferTextureLayer *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum attachment = cmd->attachment;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint layer = cmd->layer;
+ CALL_FramebufferTextureLayer(ctx->CurrentServerDispatch, (target, attachment, texture, level, layer));
+}
+static void GLAPIENTRY
+_mesa_marshal_FramebufferTextureLayer(GLenum target, GLenum attachment, GLuint texture, GLint level, GLint layer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FramebufferTextureLayer);
+ struct marshal_cmd_FramebufferTextureLayer *cmd;
+ debug_print_marshal("FramebufferTextureLayer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FramebufferTextureLayer, cmd_size);
+ cmd->target = target;
+ cmd->attachment = attachment;
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->layer = layer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FramebufferTextureLayer");
+ CALL_FramebufferTextureLayer(ctx->CurrentServerDispatch, (target, attachment, texture, level, layer));
+}
+
+
+/* TexEnvfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexEnvfv(GLenum target, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexEnvfv");
+ CALL_TexEnvfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* ProgramUniformMatrix3fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 36) bytes are GLfloat value[count][9] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 36;
+ CALL_ProgramUniformMatrix3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3fv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3fv) + safe_mul(count, 36);
+ struct marshal_cmd_ProgramUniformMatrix3fv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3fv");
+ if (unlikely(safe_mul(count, 36) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 36);
+ variable_data += count * 36;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3fv");
+ CALL_ProgramUniformMatrix3fv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* DeleteMemoryObjectsEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeleteMemoryObjectsEXT(GLsizei n, const GLuint * memoryObjects)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeleteMemoryObjectsEXT");
+ CALL_DeleteMemoryObjectsEXT(ctx->CurrentServerDispatch, (n, memoryObjects));
+}
+
+
+/* LoadMatrixf: marshalled asynchronously */
+struct marshal_cmd_LoadMatrixf
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat m[16];
+};
+static inline void
+_mesa_unmarshal_LoadMatrixf(struct gl_context *ctx, const struct marshal_cmd_LoadMatrixf *cmd)
+{
+ const GLfloat * m = cmd->m;
+ CALL_LoadMatrixf(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_LoadMatrixf(const GLfloat * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LoadMatrixf);
+ struct marshal_cmd_LoadMatrixf *cmd;
+ debug_print_marshal("LoadMatrixf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LoadMatrixf, cmd_size);
+ memcpy(cmd->m, m, 64);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LoadMatrixf");
+ CALL_LoadMatrixf(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* GetProgramLocalParameterfvARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramLocalParameterfvARB(GLenum target, GLuint index, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramLocalParameterfvARB");
+ CALL_GetProgramLocalParameterfvARB(ctx->CurrentServerDispatch, (target, index, params));
+}
+
+
+/* MakeTextureHandleResidentARB: marshalled asynchronously */
+struct marshal_cmd_MakeTextureHandleResidentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint64 handle;
+};
+static inline void
+_mesa_unmarshal_MakeTextureHandleResidentARB(struct gl_context *ctx, const struct marshal_cmd_MakeTextureHandleResidentARB *cmd)
+{
+ const GLuint64 handle = cmd->handle;
+ CALL_MakeTextureHandleResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+static void GLAPIENTRY
+_mesa_marshal_MakeTextureHandleResidentARB(GLuint64 handle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MakeTextureHandleResidentARB);
+ struct marshal_cmd_MakeTextureHandleResidentARB *cmd;
+ debug_print_marshal("MakeTextureHandleResidentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MakeTextureHandleResidentARB, cmd_size);
+ cmd->handle = handle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MakeTextureHandleResidentARB");
+ CALL_MakeTextureHandleResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+
+
+/* MultiDrawArraysIndirect: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawArraysIndirect(GLenum mode, const GLvoid * indirect, GLsizei primcount, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiDrawArraysIndirect");
+ CALL_MultiDrawArraysIndirect(ctx->CurrentServerDispatch, (mode, indirect, primcount, stride));
+}
+
+
+/* DrawRangeElementsBaseVertex: marshalled asynchronously */
+struct marshal_cmd_DrawRangeElementsBaseVertex
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint start;
+ GLuint end;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+ GLint basevertex;
+};
+static inline void
+_mesa_unmarshal_DrawRangeElementsBaseVertex(struct gl_context *ctx, const struct marshal_cmd_DrawRangeElementsBaseVertex *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint start = cmd->start;
+ const GLuint end = cmd->end;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ const GLint basevertex = cmd->basevertex;
+ CALL_DrawRangeElementsBaseVertex(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices, basevertex));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawRangeElementsBaseVertex(GLenum mode, GLuint start, GLuint end, GLsizei count, GLenum type, const GLvoid * indices, GLint basevertex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawRangeElementsBaseVertex);
+ struct marshal_cmd_DrawRangeElementsBaseVertex *cmd;
+ debug_print_marshal("DrawRangeElementsBaseVertex");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawRangeElementsBaseVertex");
+ CALL_DrawRangeElementsBaseVertex(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices, basevertex));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawRangeElementsBaseVertex, cmd_size);
+ cmd->mode = mode;
+ cmd->start = start;
+ cmd->end = end;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ cmd->basevertex = basevertex;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawRangeElementsBaseVertex");
+ CALL_DrawRangeElementsBaseVertex(ctx->CurrentServerDispatch, (mode, start, end, count, type, indices, basevertex));
+}
+
+
+/* ProgramUniformMatrix4dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 128) bytes are GLdouble value[count][16] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 128;
+ CALL_ProgramUniformMatrix4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4dv) + safe_mul(count, 128);
+ struct marshal_cmd_ProgramUniformMatrix4dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4dv");
+ if (unlikely(safe_mul(count, 128) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 128);
+ variable_data += count * 128;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4dv");
+ CALL_ProgramUniformMatrix4dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* SecondaryColor3bv: marshalled asynchronously */
+struct marshal_cmd_SecondaryColor3bv
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte v[3];
+};
+static inline void
+_mesa_unmarshal_SecondaryColor3bv(struct gl_context *ctx, const struct marshal_cmd_SecondaryColor3bv *cmd)
+{
+ const GLbyte * v = cmd->v;
+ CALL_SecondaryColor3bv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColor3bv(const GLbyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColor3bv);
+ struct marshal_cmd_SecondaryColor3bv *cmd;
+ debug_print_marshal("SecondaryColor3bv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColor3bv, cmd_size);
+ memcpy(cmd->v, v, 3);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColor3bv");
+ CALL_SecondaryColor3bv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DrawTexxvOES: marshalled asynchronously */
+struct marshal_cmd_DrawTexxvOES
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed coords[5];
+};
+static inline void
+_mesa_unmarshal_DrawTexxvOES(struct gl_context *ctx, const struct marshal_cmd_DrawTexxvOES *cmd)
+{
+ const GLfixed * coords = cmd->coords;
+ CALL_DrawTexxvOES(ctx->CurrentServerDispatch, (coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTexxvOES(const GLfixed * coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTexxvOES);
+ struct marshal_cmd_DrawTexxvOES *cmd;
+ debug_print_marshal("DrawTexxvOES");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTexxvOES, cmd_size);
+ memcpy(cmd->coords, coords, 20);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTexxvOES");
+ CALL_DrawTexxvOES(ctx->CurrentServerDispatch, (coords));
+}
+
+
+/* TexParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexParameterfv(GLenum target, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexParameterfv");
+ CALL_TexParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* Color4ubv: marshalled asynchronously */
+struct marshal_cmd_Color4ubv
+{
+ struct marshal_cmd_base cmd_base;
+ GLubyte v[4];
+};
+static inline void
+_mesa_unmarshal_Color4ubv(struct gl_context *ctx, const struct marshal_cmd_Color4ubv *cmd)
+{
+ const GLubyte * v = cmd->v;
+ CALL_Color4ubv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4ubv(const GLubyte * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4ubv);
+ struct marshal_cmd_Color4ubv *cmd;
+ debug_print_marshal("Color4ubv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4ubv, cmd_size);
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4ubv");
+ CALL_Color4ubv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* TexCoord2fv: marshalled asynchronously */
+struct marshal_cmd_TexCoord2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_TexCoord2fv(struct gl_context *ctx, const struct marshal_cmd_TexCoord2fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_TexCoord2fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord2fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord2fv);
+ struct marshal_cmd_TexCoord2fv *cmd;
+ debug_print_marshal("TexCoord2fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord2fv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord2fv");
+ CALL_TexCoord2fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* FogCoorddv: marshalled asynchronously */
+struct marshal_cmd_FogCoorddv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble coord[1];
+};
+static inline void
+_mesa_unmarshal_FogCoorddv(struct gl_context *ctx, const struct marshal_cmd_FogCoorddv *cmd)
+{
+ const GLdouble * coord = cmd->coord;
+ CALL_FogCoorddv(ctx->CurrentServerDispatch, (coord));
+}
+static void GLAPIENTRY
+_mesa_marshal_FogCoorddv(const GLdouble * coord)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FogCoorddv);
+ struct marshal_cmd_FogCoorddv *cmd;
+ debug_print_marshal("FogCoorddv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FogCoorddv, cmd_size);
+ memcpy(cmd->coord, coord, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FogCoorddv");
+ CALL_FogCoorddv(ctx->CurrentServerDispatch, (coord));
+}
+
+
+/* VDPAUUnregisterSurfaceNV: marshalled asynchronously */
+struct marshal_cmd_VDPAUUnregisterSurfaceNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLintptr surface;
+};
+static inline void
+_mesa_unmarshal_VDPAUUnregisterSurfaceNV(struct gl_context *ctx, const struct marshal_cmd_VDPAUUnregisterSurfaceNV *cmd)
+{
+ const GLintptr surface = cmd->surface;
+ CALL_VDPAUUnregisterSurfaceNV(ctx->CurrentServerDispatch, (surface));
+}
+static void GLAPIENTRY
+_mesa_marshal_VDPAUUnregisterSurfaceNV(GLintptr surface)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VDPAUUnregisterSurfaceNV);
+ struct marshal_cmd_VDPAUUnregisterSurfaceNV *cmd;
+ debug_print_marshal("VDPAUUnregisterSurfaceNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VDPAUUnregisterSurfaceNV, cmd_size);
+ cmd->surface = surface;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VDPAUUnregisterSurfaceNV");
+ CALL_VDPAUUnregisterSurfaceNV(ctx->CurrentServerDispatch, (surface));
+}
+
+
+/* ColorP3ui: marshalled asynchronously */
+struct marshal_cmd_ColorP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint color;
+};
+static inline void
+_mesa_unmarshal_ColorP3ui(struct gl_context *ctx, const struct marshal_cmd_ColorP3ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint color = cmd->color;
+ CALL_ColorP3ui(ctx->CurrentServerDispatch, (type, color));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorP3ui(GLenum type, GLuint color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorP3ui);
+ struct marshal_cmd_ColorP3ui *cmd;
+ debug_print_marshal("ColorP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorP3ui, cmd_size);
+ cmd->type = type;
+ cmd->color = color;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorP3ui");
+ CALL_ColorP3ui(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* GetUnsignedBytei_vEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUnsignedBytei_vEXT(GLenum target, GLuint index, GLubyte * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUnsignedBytei_vEXT");
+ CALL_GetUnsignedBytei_vEXT(ctx->CurrentServerDispatch, (target, index, data));
+}
+
+
+/* GetShaderPrecisionFormat: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetShaderPrecisionFormat(GLenum shadertype, GLenum precisiontype, GLint * range, GLint * precision)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetShaderPrecisionFormat");
+ CALL_GetShaderPrecisionFormat(ctx->CurrentServerDispatch, (shadertype, precisiontype, range, precision));
+}
+
+
+/* MakeTextureHandleNonResidentARB: marshalled asynchronously */
+struct marshal_cmd_MakeTextureHandleNonResidentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint64 handle;
+};
+static inline void
+_mesa_unmarshal_MakeTextureHandleNonResidentARB(struct gl_context *ctx, const struct marshal_cmd_MakeTextureHandleNonResidentARB *cmd)
+{
+ const GLuint64 handle = cmd->handle;
+ CALL_MakeTextureHandleNonResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+static void GLAPIENTRY
+_mesa_marshal_MakeTextureHandleNonResidentARB(GLuint64 handle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MakeTextureHandleNonResidentARB);
+ struct marshal_cmd_MakeTextureHandleNonResidentARB *cmd;
+ debug_print_marshal("MakeTextureHandleNonResidentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MakeTextureHandleNonResidentARB, cmd_size);
+ cmd->handle = handle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MakeTextureHandleNonResidentARB");
+ CALL_MakeTextureHandleNonResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+
+
+/* VertexAttribI4iEXT: marshalled asynchronously */
+struct marshal_cmd_VertexAttribI4iEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint x;
+ GLint y;
+ GLint z;
+ GLint w;
+};
+static inline void
+_mesa_unmarshal_VertexAttribI4iEXT(struct gl_context *ctx, const struct marshal_cmd_VertexAttribI4iEXT *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLint z = cmd->z;
+ const GLint w = cmd->w;
+ CALL_VertexAttribI4iEXT(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI4iEXT(GLuint index, GLint x, GLint y, GLint z, GLint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribI4iEXT);
+ struct marshal_cmd_VertexAttribI4iEXT *cmd;
+ debug_print_marshal("VertexAttribI4iEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribI4iEXT, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribI4iEXT");
+ CALL_VertexAttribI4iEXT(ctx->CurrentServerDispatch, (index, x, y, z, w));
+}
+
+
+/* VertexAttribI3uivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI3uivEXT(GLuint index, const GLuint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI3uivEXT");
+ CALL_VertexAttribI3uivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* FogCoordd: marshalled asynchronously */
+struct marshal_cmd_FogCoordd
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble coord;
+};
+static inline void
+_mesa_unmarshal_FogCoordd(struct gl_context *ctx, const struct marshal_cmd_FogCoordd *cmd)
+{
+ const GLdouble coord = cmd->coord;
+ CALL_FogCoordd(ctx->CurrentServerDispatch, (coord));
+}
+static void GLAPIENTRY
+_mesa_marshal_FogCoordd(GLdouble coord)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_FogCoordd);
+ struct marshal_cmd_FogCoordd *cmd;
+ debug_print_marshal("FogCoordd");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_FogCoordd, cmd_size);
+ cmd->coord = coord;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("FogCoordd");
+ CALL_FogCoordd(ctx->CurrentServerDispatch, (coord));
+}
+
+
+/* BindFramebufferEXT: marshalled asynchronously */
+struct marshal_cmd_BindFramebufferEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint framebuffer;
+};
+static inline void
+_mesa_unmarshal_BindFramebufferEXT(struct gl_context *ctx, const struct marshal_cmd_BindFramebufferEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint framebuffer = cmd->framebuffer;
+ CALL_BindFramebufferEXT(ctx->CurrentServerDispatch, (target, framebuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindFramebufferEXT(GLenum target, GLuint framebuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindFramebufferEXT);
+ struct marshal_cmd_BindFramebufferEXT *cmd;
+ debug_print_marshal("BindFramebufferEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindFramebufferEXT, cmd_size);
+ cmd->target = target;
+ cmd->framebuffer = framebuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindFramebufferEXT");
+ CALL_BindFramebufferEXT(ctx->CurrentServerDispatch, (target, framebuffer));
+}
+
+
+/* Uniform3iv: marshalled asynchronously */
+struct marshal_cmd_Uniform3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 12) bytes are GLint value[count][3] */
+};
+static inline void
+_mesa_unmarshal_Uniform3iv(struct gl_context *ctx, const struct marshal_cmd_Uniform3iv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 12;
+ CALL_Uniform3iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform3iv(GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform3iv) + safe_mul(count, 12);
+ struct marshal_cmd_Uniform3iv *cmd;
+ debug_print_marshal("Uniform3iv");
+ if (unlikely(safe_mul(count, 12) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform3iv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 12);
+ variable_data += count * 12;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform3iv");
+ CALL_Uniform3iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* TexStorage2DMultisample: marshalled asynchronously */
+struct marshal_cmd_TexStorage2DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TexStorage2DMultisample(struct gl_context *ctx, const struct marshal_cmd_TexStorage2DMultisample *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TexStorage2DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorage2DMultisample(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorage2DMultisample);
+ struct marshal_cmd_TexStorage2DMultisample *cmd;
+ debug_print_marshal("TexStorage2DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorage2DMultisample, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorage2DMultisample");
+ CALL_TexStorage2DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, fixedsamplelocations));
+}
+
+
+/* UnlockArraysEXT: marshalled asynchronously */
+struct marshal_cmd_UnlockArraysEXT
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_UnlockArraysEXT(struct gl_context *ctx, const struct marshal_cmd_UnlockArraysEXT *cmd)
+{
+ CALL_UnlockArraysEXT(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_UnlockArraysEXT(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UnlockArraysEXT);
+ struct marshal_cmd_UnlockArraysEXT *cmd;
+ debug_print_marshal("UnlockArraysEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UnlockArraysEXT, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UnlockArraysEXT");
+ CALL_UnlockArraysEXT(ctx->CurrentServerDispatch, ());
+}
+
+
+/* GetVertexAttribLui64vARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribLui64vARB(GLuint index, GLenum pname, GLuint64EXT * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribLui64vARB");
+ CALL_GetVertexAttribLui64vARB(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* VertexAttrib4iv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4iv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4iv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint * v = cmd->v;
+ CALL_VertexAttrib4iv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4iv(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4iv);
+ struct marshal_cmd_VertexAttrib4iv *cmd;
+ debug_print_marshal("VertexAttrib4iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4iv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4iv");
+ CALL_VertexAttrib4iv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* CopyTexSubImage3D: marshalled asynchronously */
+struct marshal_cmd_CopyTexSubImage3D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint level;
+ GLint xoffset;
+ GLint yoffset;
+ GLint zoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_CopyTexSubImage3D(struct gl_context *ctx, const struct marshal_cmd_CopyTexSubImage3D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint yoffset = cmd->yoffset;
+ const GLint zoffset = cmd->zoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_CopyTexSubImage3D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, zoffset, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTexSubImage3D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTexSubImage3D);
+ struct marshal_cmd_CopyTexSubImage3D *cmd;
+ debug_print_marshal("CopyTexSubImage3D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTexSubImage3D, cmd_size);
+ cmd->target = target;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->yoffset = yoffset;
+ cmd->zoffset = zoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTexSubImage3D");
+ CALL_CopyTexSubImage3D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, zoffset, x, y, width, height));
+}
+
+
+/* PolygonOffsetClampEXT: marshalled asynchronously */
+struct marshal_cmd_PolygonOffsetClampEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat factor;
+ GLfloat units;
+ GLfloat clamp;
+};
+static inline void
+_mesa_unmarshal_PolygonOffsetClampEXT(struct gl_context *ctx, const struct marshal_cmd_PolygonOffsetClampEXT *cmd)
+{
+ const GLfloat factor = cmd->factor;
+ const GLfloat units = cmd->units;
+ const GLfloat clamp = cmd->clamp;
+ CALL_PolygonOffsetClampEXT(ctx->CurrentServerDispatch, (factor, units, clamp));
+}
+static void GLAPIENTRY
+_mesa_marshal_PolygonOffsetClampEXT(GLfloat factor, GLfloat units, GLfloat clamp)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PolygonOffsetClampEXT);
+ struct marshal_cmd_PolygonOffsetClampEXT *cmd;
+ debug_print_marshal("PolygonOffsetClampEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PolygonOffsetClampEXT, cmd_size);
+ cmd->factor = factor;
+ cmd->units = units;
+ cmd->clamp = clamp;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PolygonOffsetClampEXT");
+ CALL_PolygonOffsetClampEXT(ctx->CurrentServerDispatch, (factor, units, clamp));
+}
+
+
+/* GetInteger64v: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetInteger64v(GLenum pname, GLint64 * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetInteger64v");
+ CALL_GetInteger64v(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* DetachObjectARB: marshalled asynchronously */
+struct marshal_cmd_DetachObjectARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLhandleARB containerObj;
+ GLhandleARB attachedObj;
+};
+static inline void
+_mesa_unmarshal_DetachObjectARB(struct gl_context *ctx, const struct marshal_cmd_DetachObjectARB *cmd)
+{
+ const GLhandleARB containerObj = cmd->containerObj;
+ const GLhandleARB attachedObj = cmd->attachedObj;
+ CALL_DetachObjectARB(ctx->CurrentServerDispatch, (containerObj, attachedObj));
+}
+static void GLAPIENTRY
+_mesa_marshal_DetachObjectARB(GLhandleARB containerObj, GLhandleARB attachedObj)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DetachObjectARB);
+ struct marshal_cmd_DetachObjectARB *cmd;
+ debug_print_marshal("DetachObjectARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DetachObjectARB, cmd_size);
+ cmd->containerObj = containerObj;
+ cmd->attachedObj = attachedObj;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DetachObjectARB");
+ CALL_DetachObjectARB(ctx->CurrentServerDispatch, (containerObj, attachedObj));
+}
+
+
+/* Indexiv: marshalled asynchronously */
+struct marshal_cmd_Indexiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint c[1];
+};
+static inline void
+_mesa_unmarshal_Indexiv(struct gl_context *ctx, const struct marshal_cmd_Indexiv *cmd)
+{
+ const GLint * c = cmd->c;
+ CALL_Indexiv(ctx->CurrentServerDispatch, (c));
+}
+static void GLAPIENTRY
+_mesa_marshal_Indexiv(const GLint * c)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Indexiv);
+ struct marshal_cmd_Indexiv *cmd;
+ debug_print_marshal("Indexiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Indexiv, cmd_size);
+ memcpy(cmd->c, c, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Indexiv");
+ CALL_Indexiv(ctx->CurrentServerDispatch, (c));
+}
+
+
+/* TexEnvi: marshalled asynchronously */
+struct marshal_cmd_TexEnvi
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_TexEnvi(struct gl_context *ctx, const struct marshal_cmd_TexEnvi *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_TexEnvi(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexEnvi(GLenum target, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexEnvi);
+ struct marshal_cmd_TexEnvi *cmd;
+ debug_print_marshal("TexEnvi");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexEnvi, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexEnvi");
+ CALL_TexEnvi(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* TexEnvf: marshalled asynchronously */
+struct marshal_cmd_TexEnvf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_TexEnvf(struct gl_context *ctx, const struct marshal_cmd_TexEnvf *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_TexEnvf(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexEnvf(GLenum target, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexEnvf);
+ struct marshal_cmd_TexEnvf *cmd;
+ debug_print_marshal("TexEnvf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexEnvf, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexEnvf");
+ CALL_TexEnvf(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* TexEnvx: marshalled asynchronously */
+struct marshal_cmd_TexEnvx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_TexEnvx(struct gl_context *ctx, const struct marshal_cmd_TexEnvx *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_TexEnvx(ctx->CurrentServerDispatch, (target, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexEnvx(GLenum target, GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexEnvx);
+ struct marshal_cmd_TexEnvx *cmd;
+ debug_print_marshal("TexEnvx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexEnvx, cmd_size);
+ cmd->target = target;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexEnvx");
+ CALL_TexEnvx(ctx->CurrentServerDispatch, (target, pname, param));
+}
+
+
+/* InvalidateBufferSubData: marshalled asynchronously */
+struct marshal_cmd_InvalidateBufferSubData
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr length;
+};
+static inline void
+_mesa_unmarshal_InvalidateBufferSubData(struct gl_context *ctx, const struct marshal_cmd_InvalidateBufferSubData *cmd)
+{
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr length = cmd->length;
+ CALL_InvalidateBufferSubData(ctx->CurrentServerDispatch, (buffer, offset, length));
+}
+static void GLAPIENTRY
+_mesa_marshal_InvalidateBufferSubData(GLuint buffer, GLintptr offset, GLsizeiptr length)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_InvalidateBufferSubData);
+ struct marshal_cmd_InvalidateBufferSubData *cmd;
+ debug_print_marshal("InvalidateBufferSubData");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_InvalidateBufferSubData, cmd_size);
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->length = length;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("InvalidateBufferSubData");
+ CALL_InvalidateBufferSubData(ctx->CurrentServerDispatch, (buffer, offset, length));
+}
+
+
+/* UniformMatrix4x2fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix4x2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 32) bytes are GLfloat value[count][8] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix4x2fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix4x2fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 32;
+ CALL_UniformMatrix4x2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix4x2fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix4x2fv) + safe_mul(count, 32);
+ struct marshal_cmd_UniformMatrix4x2fv *cmd;
+ debug_print_marshal("UniformMatrix4x2fv");
+ if (unlikely(safe_mul(count, 32) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix4x2fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 32);
+ variable_data += count * 32;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix4x2fv");
+ CALL_UniformMatrix4x2fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* ClearTexImage: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearTexImage(GLuint texture, GLint level, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearTexImage");
+ CALL_ClearTexImage(ctx->CurrentServerDispatch, (texture, level, format, type, data));
+}
+
+
+/* PolygonOffset: marshalled asynchronously */
+struct marshal_cmd_PolygonOffset
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat factor;
+ GLfloat units;
+};
+static inline void
+_mesa_unmarshal_PolygonOffset(struct gl_context *ctx, const struct marshal_cmd_PolygonOffset *cmd)
+{
+ const GLfloat factor = cmd->factor;
+ const GLfloat units = cmd->units;
+ CALL_PolygonOffset(ctx->CurrentServerDispatch, (factor, units));
+}
+static void GLAPIENTRY
+_mesa_marshal_PolygonOffset(GLfloat factor, GLfloat units)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PolygonOffset);
+ struct marshal_cmd_PolygonOffset *cmd;
+ debug_print_marshal("PolygonOffset");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PolygonOffset, cmd_size);
+ cmd->factor = factor;
+ cmd->units = units;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PolygonOffset");
+ CALL_PolygonOffset(ctx->CurrentServerDispatch, (factor, units));
+}
+
+
+/* SamplerParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameterfv(GLuint sampler, GLenum pname, const GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SamplerParameterfv");
+ CALL_SamplerParameterfv(ctx->CurrentServerDispatch, (sampler, pname, params));
+}
+
+
+/* CompressedTextureSubImage1D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CompressedTextureSubImage1D(GLuint texture, GLint level, GLint xoffset, GLsizei width, GLenum format, GLsizei imageSize, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CompressedTextureSubImage1D");
+ CALL_CompressedTextureSubImage1D(ctx->CurrentServerDispatch, (texture, level, xoffset, width, format, imageSize, data));
+}
+
+
+/* ProgramUniformMatrix4x2dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix4x2dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 64) bytes are GLdouble value[count][8] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix4x2dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix4x2dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 64;
+ CALL_ProgramUniformMatrix4x2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix4x2dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix4x2dv) + safe_mul(count, 64);
+ struct marshal_cmd_ProgramUniformMatrix4x2dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix4x2dv");
+ if (unlikely(safe_mul(count, 64) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix4x2dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 64);
+ variable_data += count * 64;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix4x2dv");
+ CALL_ProgramUniformMatrix4x2dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* ProgramEnvParameter4fARB: marshalled asynchronously */
+struct marshal_cmd_ProgramEnvParameter4fARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint index;
+ GLfloat x;
+ GLfloat y;
+ GLfloat z;
+ GLfloat w;
+};
+static inline void
+_mesa_unmarshal_ProgramEnvParameter4fARB(struct gl_context *ctx, const struct marshal_cmd_ProgramEnvParameter4fARB *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint index = cmd->index;
+ const GLfloat x = cmd->x;
+ const GLfloat y = cmd->y;
+ const GLfloat z = cmd->z;
+ const GLfloat w = cmd->w;
+ CALL_ProgramEnvParameter4fARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramEnvParameter4fARB(GLenum target, GLuint index, GLfloat x, GLfloat y, GLfloat z, GLfloat w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramEnvParameter4fARB);
+ struct marshal_cmd_ProgramEnvParameter4fARB *cmd;
+ debug_print_marshal("ProgramEnvParameter4fARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramEnvParameter4fARB, cmd_size);
+ cmd->target = target;
+ cmd->index = index;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramEnvParameter4fARB");
+ CALL_ProgramEnvParameter4fARB(ctx->CurrentServerDispatch, (target, index, x, y, z, w));
+}
+
+
+/* ClearDepth: marshalled asynchronously */
+struct marshal_cmd_ClearDepth
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampd depth;
+};
+static inline void
+_mesa_unmarshal_ClearDepth(struct gl_context *ctx, const struct marshal_cmd_ClearDepth *cmd)
+{
+ const GLclampd depth = cmd->depth;
+ CALL_ClearDepth(ctx->CurrentServerDispatch, (depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearDepth(GLclampd depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearDepth);
+ struct marshal_cmd_ClearDepth *cmd;
+ debug_print_marshal("ClearDepth");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearDepth, cmd_size);
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearDepth");
+ CALL_ClearDepth(ctx->CurrentServerDispatch, (depth));
+}
+
+
+/* VertexAttrib3dvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3dvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3dvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3dvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble * v = cmd->v;
+ CALL_VertexAttrib3dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3dvNV(GLuint index, const GLdouble * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3dvNV);
+ struct marshal_cmd_VertexAttrib3dvNV *cmd;
+ debug_print_marshal("VertexAttrib3dvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3dvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 24);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3dvNV");
+ CALL_VertexAttrib3dvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Color4fv: marshalled asynchronously */
+struct marshal_cmd_Color4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_Color4fv(struct gl_context *ctx, const struct marshal_cmd_Color4fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Color4fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color4fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color4fv);
+ struct marshal_cmd_Color4fv *cmd;
+ debug_print_marshal("Color4fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color4fv, cmd_size);
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color4fv");
+ CALL_Color4fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetnMinmaxARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetnMinmaxARB(GLenum target, GLboolean reset, GLenum format, GLenum type, GLsizei bufSize, GLvoid * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetnMinmaxARB");
+ CALL_GetnMinmaxARB(ctx->CurrentServerDispatch, (target, reset, format, type, bufSize, values));
+}
+
+
+/* IsImageHandleResidentARB: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsImageHandleResidentARB(GLuint64 handle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsImageHandleResidentARB");
+ return CALL_IsImageHandleResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+
+
+/* ColorPointer: marshalled asynchronously */
+struct marshal_cmd_ColorPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_ColorPointer(struct gl_context *ctx, const struct marshal_cmd_ColorPointer *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_ColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorPointer(GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorPointer);
+ struct marshal_cmd_ColorPointer *cmd;
+ debug_print_marshal("ColorPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("ColorPointer");
+ CALL_ColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorPointer, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorPointer");
+ CALL_ColorPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+
+
+/* ProgramUniform2ui64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform2ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform2ui64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform2ui64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ CALL_ProgramUniform2ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform2ui64ARB(GLuint program, GLint location, GLuint64 x, GLuint64 y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform2ui64ARB);
+ struct marshal_cmd_ProgramUniform2ui64ARB *cmd;
+ debug_print_marshal("ProgramUniform2ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform2ui64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform2ui64ARB");
+ CALL_ProgramUniform2ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y));
+}
+
+
+/* Lightiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Lightiv(GLenum light, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Lightiv");
+ CALL_Lightiv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* GetTexParameterIuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexParameterIuiv(GLenum target, GLenum pname, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexParameterIuiv");
+ CALL_GetTexParameterIuiv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TransformFeedbackVaryings: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TransformFeedbackVaryings(GLuint program, GLsizei count, const GLchar * const * varyings, GLenum bufferMode)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TransformFeedbackVaryings");
+ CALL_TransformFeedbackVaryings(ctx->CurrentServerDispatch, (program, count, varyings, bufferMode));
+}
+
+
+/* VertexAttrib3sv: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3sv(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3sv *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLshort * v = cmd->v;
+ CALL_VertexAttrib3sv(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3sv(GLuint index, const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3sv);
+ struct marshal_cmd_VertexAttrib3sv *cmd;
+ debug_print_marshal("VertexAttrib3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3sv, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3sv");
+ CALL_VertexAttrib3sv(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Uniform4i64ARB: marshalled asynchronously */
+struct marshal_cmd_Uniform4i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+ GLint64 z;
+ GLint64 w;
+};
+static inline void
+_mesa_unmarshal_Uniform4i64ARB(struct gl_context *ctx, const struct marshal_cmd_Uniform4i64ARB *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ const GLint64 z = cmd->z;
+ const GLint64 w = cmd->w;
+ CALL_Uniform4i64ARB(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4i64ARB(GLint location, GLint64 x, GLint64 y, GLint64 z, GLint64 w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4i64ARB);
+ struct marshal_cmd_Uniform4i64ARB *cmd;
+ debug_print_marshal("Uniform4i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4i64ARB, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4i64ARB");
+ CALL_Uniform4i64ARB(ctx->CurrentServerDispatch, (location, x, y, z, w));
+}
+
+
+/* IsVertexArray: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsVertexArray(GLuint array)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsVertexArray");
+ return CALL_IsVertexArray(ctx->CurrentServerDispatch, (array));
+}
+
+
+/* ProgramUniform3ui64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3ui64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint64 x;
+ GLuint64 y;
+ GLuint64 z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3ui64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3ui64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint64 x = cmd->x;
+ const GLuint64 y = cmd->y;
+ const GLuint64 z = cmd->z;
+ CALL_ProgramUniform3ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3ui64ARB(GLuint program, GLint location, GLuint64 x, GLuint64 y, GLuint64 z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3ui64ARB);
+ struct marshal_cmd_ProgramUniform3ui64ARB *cmd;
+ debug_print_marshal("ProgramUniform3ui64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3ui64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3ui64ARB");
+ CALL_ProgramUniform3ui64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* PushClientAttrib: marshalled asynchronously */
+struct marshal_cmd_PushClientAttrib
+{
+ struct marshal_cmd_base cmd_base;
+ GLbitfield mask;
+};
+static inline void
+_mesa_unmarshal_PushClientAttrib(struct gl_context *ctx, const struct marshal_cmd_PushClientAttrib *cmd)
+{
+ const GLbitfield mask = cmd->mask;
+ CALL_PushClientAttrib(ctx->CurrentServerDispatch, (mask));
+}
+static void GLAPIENTRY
+_mesa_marshal_PushClientAttrib(GLbitfield mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PushClientAttrib);
+ struct marshal_cmd_PushClientAttrib *cmd;
+ debug_print_marshal("PushClientAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PushClientAttrib, cmd_size);
+ cmd->mask = mask;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PushClientAttrib");
+ CALL_PushClientAttrib(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* ProgramUniform4ui: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLuint x;
+ GLuint y;
+ GLuint z;
+ GLuint w;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4ui(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4ui *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLuint x = cmd->x;
+ const GLuint y = cmd->y;
+ const GLuint z = cmd->z;
+ const GLuint w = cmd->w;
+ CALL_ProgramUniform4ui(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4ui(GLuint program, GLint location, GLuint x, GLuint y, GLuint z, GLuint w)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4ui);
+ struct marshal_cmd_ProgramUniform4ui *cmd;
+ debug_print_marshal("ProgramUniform4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4ui, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ cmd->w = w;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4ui");
+ CALL_ProgramUniform4ui(ctx->CurrentServerDispatch, (program, location, x, y, z, w));
+}
+
+
+/* Uniform1f: marshalled asynchronously */
+struct marshal_cmd_Uniform1f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLfloat v0;
+};
+static inline void
+_mesa_unmarshal_Uniform1f(struct gl_context *ctx, const struct marshal_cmd_Uniform1f *cmd)
+{
+ const GLint location = cmd->location;
+ const GLfloat v0 = cmd->v0;
+ CALL_Uniform1f(ctx->CurrentServerDispatch, (location, v0));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1f(GLint location, GLfloat v0)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1f);
+ struct marshal_cmd_Uniform1f *cmd;
+ debug_print_marshal("Uniform1f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1f, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1f");
+ CALL_Uniform1f(ctx->CurrentServerDispatch, (location, v0));
+}
+
+
+/* Uniform1d: marshalled asynchronously */
+struct marshal_cmd_Uniform1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLdouble x;
+};
+static inline void
+_mesa_unmarshal_Uniform1d(struct gl_context *ctx, const struct marshal_cmd_Uniform1d *cmd)
+{
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ CALL_Uniform1d(ctx->CurrentServerDispatch, (location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1d(GLint location, GLdouble x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1d);
+ struct marshal_cmd_Uniform1d *cmd;
+ debug_print_marshal("Uniform1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1d, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1d");
+ CALL_Uniform1d(ctx->CurrentServerDispatch, (location, x));
+}
+
+
+/* Uniform1i: marshalled asynchronously */
+struct marshal_cmd_Uniform1i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint v0;
+};
+static inline void
+_mesa_unmarshal_Uniform1i(struct gl_context *ctx, const struct marshal_cmd_Uniform1i *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint v0 = cmd->v0;
+ CALL_Uniform1i(ctx->CurrentServerDispatch, (location, v0));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform1i(GLint location, GLint v0)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform1i);
+ struct marshal_cmd_Uniform1i *cmd;
+ debug_print_marshal("Uniform1i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform1i, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform1i");
+ CALL_Uniform1i(ctx->CurrentServerDispatch, (location, v0));
+}
+
+
+/* GetPolygonStipple: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPolygonStipple(GLubyte * mask)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPolygonStipple");
+ CALL_GetPolygonStipple(ctx->CurrentServerDispatch, (mask));
+}
+
+
+/* BlitNamedFramebuffer: marshalled asynchronously */
+struct marshal_cmd_BlitNamedFramebuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint readFramebuffer;
+ GLuint drawFramebuffer;
+ GLint srcX0;
+ GLint srcY0;
+ GLint srcX1;
+ GLint srcY1;
+ GLint dstX0;
+ GLint dstY0;
+ GLint dstX1;
+ GLint dstY1;
+ GLbitfield mask;
+ GLenum filter;
+};
+static inline void
+_mesa_unmarshal_BlitNamedFramebuffer(struct gl_context *ctx, const struct marshal_cmd_BlitNamedFramebuffer *cmd)
+{
+ const GLuint readFramebuffer = cmd->readFramebuffer;
+ const GLuint drawFramebuffer = cmd->drawFramebuffer;
+ const GLint srcX0 = cmd->srcX0;
+ const GLint srcY0 = cmd->srcY0;
+ const GLint srcX1 = cmd->srcX1;
+ const GLint srcY1 = cmd->srcY1;
+ const GLint dstX0 = cmd->dstX0;
+ const GLint dstY0 = cmd->dstY0;
+ const GLint dstX1 = cmd->dstX1;
+ const GLint dstY1 = cmd->dstY1;
+ const GLbitfield mask = cmd->mask;
+ const GLenum filter = cmd->filter;
+ CALL_BlitNamedFramebuffer(ctx->CurrentServerDispatch, (readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlitNamedFramebuffer(GLuint readFramebuffer, GLuint drawFramebuffer, GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1, GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1, GLbitfield mask, GLenum filter)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlitNamedFramebuffer);
+ struct marshal_cmd_BlitNamedFramebuffer *cmd;
+ debug_print_marshal("BlitNamedFramebuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlitNamedFramebuffer, cmd_size);
+ cmd->readFramebuffer = readFramebuffer;
+ cmd->drawFramebuffer = drawFramebuffer;
+ cmd->srcX0 = srcX0;
+ cmd->srcY0 = srcY0;
+ cmd->srcX1 = srcX1;
+ cmd->srcY1 = srcY1;
+ cmd->dstX0 = dstX0;
+ cmd->dstY0 = dstY0;
+ cmd->dstX1 = dstX1;
+ cmd->dstY1 = dstY1;
+ cmd->mask = mask;
+ cmd->filter = filter;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlitNamedFramebuffer");
+ CALL_BlitNamedFramebuffer(ctx->CurrentServerDispatch, (readFramebuffer, drawFramebuffer, srcX0, srcY0, srcX1, srcY1, dstX0, dstY0, dstX1, dstY1, mask, filter));
+}
+
+
+/* UseProgram: marshalled asynchronously */
+struct marshal_cmd_UseProgram
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+};
+static inline void
+_mesa_unmarshal_UseProgram(struct gl_context *ctx, const struct marshal_cmd_UseProgram *cmd)
+{
+ const GLuint program = cmd->program;
+ CALL_UseProgram(ctx->CurrentServerDispatch, (program));
+}
+static void GLAPIENTRY
+_mesa_marshal_UseProgram(GLuint program)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UseProgram);
+ struct marshal_cmd_UseProgram *cmd;
+ debug_print_marshal("UseProgram");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UseProgram, cmd_size);
+ cmd->program = program;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UseProgram");
+ CALL_UseProgram(ctx->CurrentServerDispatch, (program));
+}
+
+
+/* GetFragDataLocation: marshalled synchronously */
+static GLint GLAPIENTRY
+_mesa_marshal_GetFragDataLocation(GLuint program, const GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFragDataLocation");
+ return CALL_GetFragDataLocation(ctx->CurrentServerDispatch, (program, name));
+}
+
+
+/* PixelMapuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_PixelMapuiv(GLenum map, GLsizei mapsize, const GLuint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("PixelMapuiv");
+ CALL_PixelMapuiv(ctx->CurrentServerDispatch, (map, mapsize, values));
+}
+
+
+/* ClearNamedBufferSubData: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ClearNamedBufferSubData(GLuint buffer, GLenum internalformat, GLintptr offset, GLsizeiptr size, GLenum format, GLenum type, const GLvoid * data)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClearNamedBufferSubData");
+ CALL_ClearNamedBufferSubData(ctx->CurrentServerDispatch, (buffer, internalformat, offset, size, format, type, data));
+}
+
+
+/* GetNamedFramebufferAttachmentParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedFramebufferAttachmentParameteriv(GLuint framebuffer, GLenum attachment, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedFramebufferAttachmentParameteriv");
+ CALL_GetNamedFramebufferAttachmentParameteriv(ctx->CurrentServerDispatch, (framebuffer, attachment, pname, params));
+}
+
+
+/* GenVertexArrays: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenVertexArrays(GLsizei n, GLuint * arrays)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenVertexArrays");
+ CALL_GenVertexArrays(ctx->CurrentServerDispatch, (n, arrays));
+}
+
+
+/* TexStorageMem2DMultisampleEXT: marshalled asynchronously */
+struct marshal_cmd_TexStorageMem2DMultisampleEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLboolean fixedSampleLocations;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TexStorageMem2DMultisampleEXT(struct gl_context *ctx, const struct marshal_cmd_TexStorageMem2DMultisampleEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLboolean fixedSampleLocations = cmd->fixedSampleLocations;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TexStorageMem2DMultisampleEXT(ctx->CurrentServerDispatch, (target, samples, internalFormat, width, height, fixedSampleLocations, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorageMem2DMultisampleEXT(GLenum target, GLsizei samples, GLenum internalFormat, GLsizei width, GLsizei height, GLboolean fixedSampleLocations, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorageMem2DMultisampleEXT);
+ struct marshal_cmd_TexStorageMem2DMultisampleEXT *cmd;
+ debug_print_marshal("TexStorageMem2DMultisampleEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorageMem2DMultisampleEXT, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->fixedSampleLocations = fixedSampleLocations;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorageMem2DMultisampleEXT");
+ CALL_TexStorageMem2DMultisampleEXT(ctx->CurrentServerDispatch, (target, samples, internalFormat, width, height, fixedSampleLocations, memory, offset));
+}
+
+
+/* Color3s: marshalled asynchronously */
+struct marshal_cmd_Color3s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort red;
+ GLshort green;
+ GLshort blue;
+};
+static inline void
+_mesa_unmarshal_Color3s(struct gl_context *ctx, const struct marshal_cmd_Color3s *cmd)
+{
+ const GLshort red = cmd->red;
+ const GLshort green = cmd->green;
+ const GLshort blue = cmd->blue;
+ CALL_Color3s(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3s(GLshort red, GLshort green, GLshort blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3s);
+ struct marshal_cmd_Color3s *cmd;
+ debug_print_marshal("Color3s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3s, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3s");
+ CALL_Color3s(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* TextureStorage2DMultisample: marshalled asynchronously */
+struct marshal_cmd_TextureStorage2DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TextureStorage2DMultisample(struct gl_context *ctx, const struct marshal_cmd_TextureStorage2DMultisample *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TextureStorage2DMultisample(ctx->CurrentServerDispatch, (texture, samples, internalformat, width, height, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureStorage2DMultisample(GLuint texture, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureStorage2DMultisample);
+ struct marshal_cmd_TextureStorage2DMultisample *cmd;
+ debug_print_marshal("TextureStorage2DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureStorage2DMultisample, cmd_size);
+ cmd->texture = texture;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureStorage2DMultisample");
+ CALL_TextureStorage2DMultisample(ctx->CurrentServerDispatch, (texture, samples, internalformat, width, height, fixedsamplelocations));
+}
+
+
+/* TexCoordPointer: marshalled asynchronously */
+struct marshal_cmd_TexCoordPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_TexCoordPointer(struct gl_context *ctx, const struct marshal_cmd_TexCoordPointer *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_TexCoordPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoordPointer(GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoordPointer);
+ struct marshal_cmd_TexCoordPointer *cmd;
+ debug_print_marshal("TexCoordPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("TexCoordPointer");
+ CALL_TexCoordPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoordPointer, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoordPointer");
+ CALL_TexCoordPointer(ctx->CurrentServerDispatch, (size, type, stride, pointer));
+}
+
+
+/* Color3i: marshalled asynchronously */
+struct marshal_cmd_Color3i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint red;
+ GLint green;
+ GLint blue;
+};
+static inline void
+_mesa_unmarshal_Color3i(struct gl_context *ctx, const struct marshal_cmd_Color3i *cmd)
+{
+ const GLint red = cmd->red;
+ const GLint green = cmd->green;
+ const GLint blue = cmd->blue;
+ CALL_Color3i(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3i(GLint red, GLint green, GLint blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3i);
+ struct marshal_cmd_Color3i *cmd;
+ debug_print_marshal("Color3i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3i, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3i");
+ CALL_Color3i(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* EvalCoord2d: marshalled asynchronously */
+struct marshal_cmd_EvalCoord2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble u;
+ GLdouble v;
+};
+static inline void
+_mesa_unmarshal_EvalCoord2d(struct gl_context *ctx, const struct marshal_cmd_EvalCoord2d *cmd)
+{
+ const GLdouble u = cmd->u;
+ const GLdouble v = cmd->v;
+ CALL_EvalCoord2d(ctx->CurrentServerDispatch, (u, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord2d(GLdouble u, GLdouble v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord2d);
+ struct marshal_cmd_EvalCoord2d *cmd;
+ debug_print_marshal("EvalCoord2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord2d, cmd_size);
+ cmd->u = u;
+ cmd->v = v;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord2d");
+ CALL_EvalCoord2d(ctx->CurrentServerDispatch, (u, v));
+}
+
+
+/* EvalCoord2f: marshalled asynchronously */
+struct marshal_cmd_EvalCoord2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat u;
+ GLfloat v;
+};
+static inline void
+_mesa_unmarshal_EvalCoord2f(struct gl_context *ctx, const struct marshal_cmd_EvalCoord2f *cmd)
+{
+ const GLfloat u = cmd->u;
+ const GLfloat v = cmd->v;
+ CALL_EvalCoord2f(ctx->CurrentServerDispatch, (u, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord2f(GLfloat u, GLfloat v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord2f);
+ struct marshal_cmd_EvalCoord2f *cmd;
+ debug_print_marshal("EvalCoord2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord2f, cmd_size);
+ cmd->u = u;
+ cmd->v = v;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord2f");
+ CALL_EvalCoord2f(ctx->CurrentServerDispatch, (u, v));
+}
+
+
+/* Color3b: marshalled asynchronously */
+struct marshal_cmd_Color3b
+{
+ struct marshal_cmd_base cmd_base;
+ GLbyte red;
+ GLbyte green;
+ GLbyte blue;
+};
+static inline void
+_mesa_unmarshal_Color3b(struct gl_context *ctx, const struct marshal_cmd_Color3b *cmd)
+{
+ const GLbyte red = cmd->red;
+ const GLbyte green = cmd->green;
+ const GLbyte blue = cmd->blue;
+ CALL_Color3b(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3b(GLbyte red, GLbyte green, GLbyte blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3b);
+ struct marshal_cmd_Color3b *cmd;
+ debug_print_marshal("Color3b");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3b, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3b");
+ CALL_Color3b(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* Color3f: marshalled asynchronously */
+struct marshal_cmd_Color3f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat red;
+ GLfloat green;
+ GLfloat blue;
+};
+static inline void
+_mesa_unmarshal_Color3f(struct gl_context *ctx, const struct marshal_cmd_Color3f *cmd)
+{
+ const GLfloat red = cmd->red;
+ const GLfloat green = cmd->green;
+ const GLfloat blue = cmd->blue;
+ CALL_Color3f(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3f(GLfloat red, GLfloat green, GLfloat blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3f);
+ struct marshal_cmd_Color3f *cmd;
+ debug_print_marshal("Color3f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3f, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3f");
+ CALL_Color3f(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* Color3d: marshalled asynchronously */
+struct marshal_cmd_Color3d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble red;
+ GLdouble green;
+ GLdouble blue;
+};
+static inline void
+_mesa_unmarshal_Color3d(struct gl_context *ctx, const struct marshal_cmd_Color3d *cmd)
+{
+ const GLdouble red = cmd->red;
+ const GLdouble green = cmd->green;
+ const GLdouble blue = cmd->blue;
+ CALL_Color3d(ctx->CurrentServerDispatch, (red, green, blue));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3d(GLdouble red, GLdouble green, GLdouble blue)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3d);
+ struct marshal_cmd_Color3d *cmd;
+ debug_print_marshal("Color3d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3d, cmd_size);
+ cmd->red = red;
+ cmd->green = green;
+ cmd->blue = blue;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3d");
+ CALL_Color3d(ctx->CurrentServerDispatch, (red, green, blue));
+}
+
+
+/* GetVertexAttribdv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribdv(GLuint index, GLenum pname, GLdouble * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribdv");
+ CALL_GetVertexAttribdv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* GetBufferPointerv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBufferPointerv(GLenum target, GLenum pname, GLvoid ** params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBufferPointerv");
+ CALL_GetBufferPointerv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GenFramebuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenFramebuffers(GLsizei n, GLuint * framebuffers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenFramebuffers");
+ CALL_GenFramebuffers(ctx->CurrentServerDispatch, (n, framebuffers));
+}
+
+
+/* IsTextureHandleResidentARB: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_IsTextureHandleResidentARB(GLuint64 handle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("IsTextureHandleResidentARB");
+ return CALL_IsTextureHandleResidentARB(ctx->CurrentServerDispatch, (handle));
+}
+
+
+/* GenBuffers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GenBuffers(GLsizei n, GLuint * buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GenBuffers");
+ CALL_GenBuffers(ctx->CurrentServerDispatch, (n, buffer));
+}
+
+
+/* ClearDepthx: marshalled asynchronously */
+struct marshal_cmd_ClearDepthx
+{
+ struct marshal_cmd_base cmd_base;
+ GLclampx depth;
+};
+static inline void
+_mesa_unmarshal_ClearDepthx(struct gl_context *ctx, const struct marshal_cmd_ClearDepthx *cmd)
+{
+ const GLclampx depth = cmd->depth;
+ CALL_ClearDepthx(ctx->CurrentServerDispatch, (depth));
+}
+static void GLAPIENTRY
+_mesa_marshal_ClearDepthx(GLclampx depth)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ClearDepthx);
+ struct marshal_cmd_ClearDepthx *cmd;
+ debug_print_marshal("ClearDepthx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ClearDepthx, cmd_size);
+ cmd->depth = depth;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ClearDepthx");
+ CALL_ClearDepthx(ctx->CurrentServerDispatch, (depth));
+}
+
+
+/* EnableVertexArrayAttrib: marshalled asynchronously */
+struct marshal_cmd_EnableVertexArrayAttrib
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint index;
+};
+static inline void
+_mesa_unmarshal_EnableVertexArrayAttrib(struct gl_context *ctx, const struct marshal_cmd_EnableVertexArrayAttrib *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint index = cmd->index;
+ CALL_EnableVertexArrayAttrib(ctx->CurrentServerDispatch, (vaobj, index));
+}
+static void GLAPIENTRY
+_mesa_marshal_EnableVertexArrayAttrib(GLuint vaobj, GLuint index)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EnableVertexArrayAttrib);
+ struct marshal_cmd_EnableVertexArrayAttrib *cmd;
+ debug_print_marshal("EnableVertexArrayAttrib");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EnableVertexArrayAttrib, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->index = index;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EnableVertexArrayAttrib");
+ CALL_EnableVertexArrayAttrib(ctx->CurrentServerDispatch, (vaobj, index));
+}
+
+
+/* BlendEquationSeparate: marshalled asynchronously */
+struct marshal_cmd_BlendEquationSeparate
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum modeRGB;
+ GLenum modeA;
+};
+static inline void
+_mesa_unmarshal_BlendEquationSeparate(struct gl_context *ctx, const struct marshal_cmd_BlendEquationSeparate *cmd)
+{
+ const GLenum modeRGB = cmd->modeRGB;
+ const GLenum modeA = cmd->modeA;
+ CALL_BlendEquationSeparate(ctx->CurrentServerDispatch, (modeRGB, modeA));
+}
+static void GLAPIENTRY
+_mesa_marshal_BlendEquationSeparate(GLenum modeRGB, GLenum modeA)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BlendEquationSeparate);
+ struct marshal_cmd_BlendEquationSeparate *cmd;
+ debug_print_marshal("BlendEquationSeparate");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BlendEquationSeparate, cmd_size);
+ cmd->modeRGB = modeRGB;
+ cmd->modeA = modeA;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BlendEquationSeparate");
+ CALL_BlendEquationSeparate(ctx->CurrentServerDispatch, (modeRGB, modeA));
+}
+
+
+/* MultiTexCoordP4ui: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoordP4ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum texture;
+ GLenum type;
+ GLuint coords;
+};
+static inline void
+_mesa_unmarshal_MultiTexCoordP4ui(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoordP4ui *cmd)
+{
+ const GLenum texture = cmd->texture;
+ const GLenum type = cmd->type;
+ const GLuint coords = cmd->coords;
+ CALL_MultiTexCoordP4ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoordP4ui(GLenum texture, GLenum type, GLuint coords)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoordP4ui);
+ struct marshal_cmd_MultiTexCoordP4ui *cmd;
+ debug_print_marshal("MultiTexCoordP4ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoordP4ui, cmd_size);
+ cmd->texture = texture;
+ cmd->type = type;
+ cmd->coords = coords;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoordP4ui");
+ CALL_MultiTexCoordP4ui(ctx->CurrentServerDispatch, (texture, type, coords));
+}
+
+
+/* VertexAttribs1fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttribs1fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLsizei n;
+ /* Next safe_mul(n, 4) bytes are GLfloat v[n] */
+};
+static inline void
+_mesa_unmarshal_VertexAttribs1fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttribs1fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLsizei n = cmd->n;
+ const GLfloat * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const GLfloat *) variable_data;
+ variable_data += n * 4;
+ CALL_VertexAttribs1fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribs1fvNV(GLuint index, GLsizei n, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribs1fvNV) + safe_mul(n, 4);
+ struct marshal_cmd_VertexAttribs1fvNV *cmd;
+ debug_print_marshal("VertexAttribs1fvNV");
+ if (unlikely(safe_mul(n, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribs1fvNV, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, n * 4);
+ variable_data += n * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribs1fvNV");
+ CALL_VertexAttribs1fvNV(ctx->CurrentServerDispatch, (index, n, v));
+}
+
+
+/* VertexAttribIPointer: marshalled asynchronously */
+struct marshal_cmd_VertexAttribIPointer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_VertexAttribIPointer(struct gl_context *ctx, const struct marshal_cmd_VertexAttribIPointer *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_VertexAttribIPointer(ctx->CurrentServerDispatch, (index, size, type, stride, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribIPointer(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribIPointer);
+ struct marshal_cmd_VertexAttribIPointer *cmd;
+ debug_print_marshal("VertexAttribIPointer");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("VertexAttribIPointer");
+ CALL_VertexAttribIPointer(ctx->CurrentServerDispatch, (index, size, type, stride, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribIPointer, cmd_size);
+ cmd->index = index;
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribIPointer");
+ CALL_VertexAttribIPointer(ctx->CurrentServerDispatch, (index, size, type, stride, pointer));
+}
+
+
+/* ProgramUniform4fv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLfloat value[count][4] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform4fv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform4fv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 16;
+ CALL_ProgramUniform4fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform4fv(GLuint program, GLint location, GLsizei count, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform4fv) + safe_mul(count, 16);
+ struct marshal_cmd_ProgramUniform4fv *cmd;
+ debug_print_marshal("ProgramUniform4fv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform4fv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform4fv");
+ CALL_ProgramUniform4fv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* RasterPos4sv: marshalled asynchronously */
+struct marshal_cmd_RasterPos4sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[4];
+};
+static inline void
+_mesa_unmarshal_RasterPos4sv(struct gl_context *ctx, const struct marshal_cmd_RasterPos4sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_RasterPos4sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_RasterPos4sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_RasterPos4sv);
+ struct marshal_cmd_RasterPos4sv *cmd;
+ debug_print_marshal("RasterPos4sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_RasterPos4sv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("RasterPos4sv");
+ CALL_RasterPos4sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* CopyTextureSubImage3D: marshalled asynchronously */
+struct marshal_cmd_CopyTextureSubImage3D
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLint level;
+ GLint xoffset;
+ GLint yoffset;
+ GLint zoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_CopyTextureSubImage3D(struct gl_context *ctx, const struct marshal_cmd_CopyTextureSubImage3D *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint yoffset = cmd->yoffset;
+ const GLint zoffset = cmd->zoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_CopyTextureSubImage3D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTextureSubImage3D(GLuint texture, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTextureSubImage3D);
+ struct marshal_cmd_CopyTextureSubImage3D *cmd;
+ debug_print_marshal("CopyTextureSubImage3D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTextureSubImage3D, cmd_size);
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->yoffset = yoffset;
+ cmd->zoffset = zoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTextureSubImage3D");
+ CALL_CopyTextureSubImage3D(ctx->CurrentServerDispatch, (texture, level, xoffset, yoffset, zoffset, x, y, width, height));
+}
+
+
+/* SelectBuffer: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_SelectBuffer(GLsizei size, GLuint * buffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("SelectBuffer");
+ CALL_SelectBuffer(ctx->CurrentServerDispatch, (size, buffer));
+}
+
+
+/* GetSynciv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetSynciv(GLsync sync, GLenum pname, GLsizei bufSize, GLsizei * length, GLint * values)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetSynciv");
+ CALL_GetSynciv(ctx->CurrentServerDispatch, (sync, pname, bufSize, length, values));
+}
+
+
+/* TextureView: marshalled asynchronously */
+struct marshal_cmd_TextureView
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint texture;
+ GLenum target;
+ GLuint origtexture;
+ GLenum internalformat;
+ GLuint minlevel;
+ GLuint numlevels;
+ GLuint minlayer;
+ GLuint numlayers;
+};
+static inline void
+_mesa_unmarshal_TextureView(struct gl_context *ctx, const struct marshal_cmd_TextureView *cmd)
+{
+ const GLuint texture = cmd->texture;
+ const GLenum target = cmd->target;
+ const GLuint origtexture = cmd->origtexture;
+ const GLenum internalformat = cmd->internalformat;
+ const GLuint minlevel = cmd->minlevel;
+ const GLuint numlevels = cmd->numlevels;
+ const GLuint minlayer = cmd->minlayer;
+ const GLuint numlayers = cmd->numlayers;
+ CALL_TextureView(ctx->CurrentServerDispatch, (texture, target, origtexture, internalformat, minlevel, numlevels, minlayer, numlayers));
+}
+static void GLAPIENTRY
+_mesa_marshal_TextureView(GLuint texture, GLenum target, GLuint origtexture, GLenum internalformat, GLuint minlevel, GLuint numlevels, GLuint minlayer, GLuint numlayers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TextureView);
+ struct marshal_cmd_TextureView *cmd;
+ debug_print_marshal("TextureView");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TextureView, cmd_size);
+ cmd->texture = texture;
+ cmd->target = target;
+ cmd->origtexture = origtexture;
+ cmd->internalformat = internalformat;
+ cmd->minlevel = minlevel;
+ cmd->numlevels = numlevels;
+ cmd->minlayer = minlayer;
+ cmd->numlayers = numlayers;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TextureView");
+ CALL_TextureView(ctx->CurrentServerDispatch, (texture, target, origtexture, internalformat, minlevel, numlevels, minlayer, numlayers));
+}
+
+
+/* TexEnviv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexEnviv(GLenum target, GLenum pname, const GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexEnviv");
+ CALL_TexEnviv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TexSubImage3D: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexSubImage3D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint zoffset, GLsizei width, GLsizei height, GLsizei depth, GLenum format, GLenum type, const GLvoid * pixels)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexSubImage3D");
+ CALL_TexSubImage3D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, zoffset, width, height, depth, format, type, pixels));
+}
+
+
+/* Bitmap: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Bitmap(GLsizei width, GLsizei height, GLfloat xorig, GLfloat yorig, GLfloat xmove, GLfloat ymove, const GLubyte * bitmap)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Bitmap");
+ CALL_Bitmap(ctx->CurrentServerDispatch, (width, height, xorig, yorig, xmove, ymove, bitmap));
+}
+
+
+/* VertexAttribDivisor: marshalled asynchronously */
+struct marshal_cmd_VertexAttribDivisor
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLuint divisor;
+};
+static inline void
+_mesa_unmarshal_VertexAttribDivisor(struct gl_context *ctx, const struct marshal_cmd_VertexAttribDivisor *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLuint divisor = cmd->divisor;
+ CALL_VertexAttribDivisor(ctx->CurrentServerDispatch, (index, divisor));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribDivisor(GLuint index, GLuint divisor)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribDivisor);
+ struct marshal_cmd_VertexAttribDivisor *cmd;
+ debug_print_marshal("VertexAttribDivisor");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribDivisor, cmd_size);
+ cmd->index = index;
+ cmd->divisor = divisor;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribDivisor");
+ CALL_VertexAttribDivisor(ctx->CurrentServerDispatch, (index, divisor));
+}
+
+
+/* DrawTransformFeedbackStream: marshalled asynchronously */
+struct marshal_cmd_DrawTransformFeedbackStream
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLuint id;
+ GLuint stream;
+};
+static inline void
+_mesa_unmarshal_DrawTransformFeedbackStream(struct gl_context *ctx, const struct marshal_cmd_DrawTransformFeedbackStream *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLuint id = cmd->id;
+ const GLuint stream = cmd->stream;
+ CALL_DrawTransformFeedbackStream(ctx->CurrentServerDispatch, (mode, id, stream));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawTransformFeedbackStream(GLenum mode, GLuint id, GLuint stream)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawTransformFeedbackStream);
+ struct marshal_cmd_DrawTransformFeedbackStream *cmd;
+ debug_print_marshal("DrawTransformFeedbackStream");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawTransformFeedbackStream, cmd_size);
+ cmd->mode = mode;
+ cmd->id = id;
+ cmd->stream = stream;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawTransformFeedbackStream");
+ CALL_DrawTransformFeedbackStream(ctx->CurrentServerDispatch, (mode, id, stream));
+}
+
+
+/* GetIntegerv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetIntegerv(GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetIntegerv");
+ CALL_GetIntegerv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* EndPerfQueryINTEL: marshalled asynchronously */
+struct marshal_cmd_EndPerfQueryINTEL
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint queryHandle;
+};
+static inline void
+_mesa_unmarshal_EndPerfQueryINTEL(struct gl_context *ctx, const struct marshal_cmd_EndPerfQueryINTEL *cmd)
+{
+ const GLuint queryHandle = cmd->queryHandle;
+ CALL_EndPerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+static void GLAPIENTRY
+_mesa_marshal_EndPerfQueryINTEL(GLuint queryHandle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndPerfQueryINTEL);
+ struct marshal_cmd_EndPerfQueryINTEL *cmd;
+ debug_print_marshal("EndPerfQueryINTEL");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndPerfQueryINTEL, cmd_size);
+ cmd->queryHandle = queryHandle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndPerfQueryINTEL");
+ CALL_EndPerfQueryINTEL(ctx->CurrentServerDispatch, (queryHandle));
+}
+
+
+/* NamedBufferPageCommitmentARB: marshalled asynchronously */
+struct marshal_cmd_NamedBufferPageCommitmentARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizeiptr size;
+ GLboolean commit;
+};
+static inline void
+_mesa_unmarshal_NamedBufferPageCommitmentARB(struct gl_context *ctx, const struct marshal_cmd_NamedBufferPageCommitmentARB *cmd)
+{
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizeiptr size = cmd->size;
+ const GLboolean commit = cmd->commit;
+ CALL_NamedBufferPageCommitmentARB(ctx->CurrentServerDispatch, (buffer, offset, size, commit));
+}
+static void GLAPIENTRY
+_mesa_marshal_NamedBufferPageCommitmentARB(GLuint buffer, GLintptr offset, GLsizeiptr size, GLboolean commit)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_NamedBufferPageCommitmentARB);
+ struct marshal_cmd_NamedBufferPageCommitmentARB *cmd;
+ debug_print_marshal("NamedBufferPageCommitmentARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_NamedBufferPageCommitmentARB, cmd_size);
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->size = size;
+ cmd->commit = commit;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("NamedBufferPageCommitmentARB");
+ CALL_NamedBufferPageCommitmentARB(ctx->CurrentServerDispatch, (buffer, offset, size, commit));
+}
+
+
+/* GetActiveUniform: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveUniform(GLuint program, GLuint index, GLsizei bufSize, GLsizei * length, GLint * size, GLenum * type, GLchar * name)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveUniform");
+ CALL_GetActiveUniform(ctx->CurrentServerDispatch, (program, index, bufSize, length, size, type, name));
+}
+
+
+/* AlphaFuncx: marshalled asynchronously */
+struct marshal_cmd_AlphaFuncx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum func;
+ GLclampx ref;
+};
+static inline void
+_mesa_unmarshal_AlphaFuncx(struct gl_context *ctx, const struct marshal_cmd_AlphaFuncx *cmd)
+{
+ const GLenum func = cmd->func;
+ const GLclampx ref = cmd->ref;
+ CALL_AlphaFuncx(ctx->CurrentServerDispatch, (func, ref));
+}
+static void GLAPIENTRY
+_mesa_marshal_AlphaFuncx(GLenum func, GLclampx ref)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_AlphaFuncx);
+ struct marshal_cmd_AlphaFuncx *cmd;
+ debug_print_marshal("AlphaFuncx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_AlphaFuncx, cmd_size);
+ cmd->func = func;
+ cmd->ref = ref;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("AlphaFuncx");
+ CALL_AlphaFuncx(ctx->CurrentServerDispatch, (func, ref));
+}
+
+
+/* VertexAttribI2ivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI2ivEXT(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI2ivEXT");
+ CALL_VertexAttribI2ivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Map1d: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Map1d(GLenum target, GLdouble u1, GLdouble u2, GLint stride, GLint order, const GLdouble * points)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Map1d");
+ CALL_Map1d(ctx->CurrentServerDispatch, (target, u1, u2, stride, order, points));
+}
+
+
+/* Map1f: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Map1f(GLenum target, GLfloat u1, GLfloat u2, GLint stride, GLint order, const GLfloat * points)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Map1f");
+ CALL_Map1f(ctx->CurrentServerDispatch, (target, u1, u2, stride, order, points));
+}
+
+
+/* AreTexturesResident: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_AreTexturesResident(GLsizei n, const GLuint * textures, GLboolean * residences)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("AreTexturesResident");
+ return CALL_AreTexturesResident(ctx->CurrentServerDispatch, (n, textures, residences));
+}
+
+
+/* VertexArrayVertexBuffer: marshalled asynchronously */
+struct marshal_cmd_VertexArrayVertexBuffer
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint vaobj;
+ GLuint bindingindex;
+ GLuint buffer;
+ GLintptr offset;
+ GLsizei stride;
+};
+static inline void
+_mesa_unmarshal_VertexArrayVertexBuffer(struct gl_context *ctx, const struct marshal_cmd_VertexArrayVertexBuffer *cmd)
+{
+ const GLuint vaobj = cmd->vaobj;
+ const GLuint bindingindex = cmd->bindingindex;
+ const GLuint buffer = cmd->buffer;
+ const GLintptr offset = cmd->offset;
+ const GLsizei stride = cmd->stride;
+ CALL_VertexArrayVertexBuffer(ctx->CurrentServerDispatch, (vaobj, bindingindex, buffer, offset, stride));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexArrayVertexBuffer(GLuint vaobj, GLuint bindingindex, GLuint buffer, GLintptr offset, GLsizei stride)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexArrayVertexBuffer);
+ struct marshal_cmd_VertexArrayVertexBuffer *cmd;
+ debug_print_marshal("VertexArrayVertexBuffer");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexArrayVertexBuffer, cmd_size);
+ cmd->vaobj = vaobj;
+ cmd->bindingindex = bindingindex;
+ cmd->buffer = buffer;
+ cmd->offset = offset;
+ cmd->stride = stride;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexArrayVertexBuffer");
+ CALL_VertexArrayVertexBuffer(ctx->CurrentServerDispatch, (vaobj, bindingindex, buffer, offset, stride));
+}
+
+
+/* PixelTransferf: marshalled asynchronously */
+struct marshal_cmd_PixelTransferf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_PixelTransferf(struct gl_context *ctx, const struct marshal_cmd_PixelTransferf *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_PixelTransferf(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PixelTransferf(GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PixelTransferf);
+ struct marshal_cmd_PixelTransferf *cmd;
+ debug_print_marshal("PixelTransferf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PixelTransferf, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PixelTransferf");
+ CALL_PixelTransferf(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* PixelTransferi: marshalled asynchronously */
+struct marshal_cmd_PixelTransferi
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_PixelTransferi(struct gl_context *ctx, const struct marshal_cmd_PixelTransferi *cmd)
+{
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_PixelTransferi(ctx->CurrentServerDispatch, (pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_PixelTransferi(GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PixelTransferi);
+ struct marshal_cmd_PixelTransferi *cmd;
+ debug_print_marshal("PixelTransferi");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PixelTransferi, cmd_size);
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PixelTransferi");
+ CALL_PixelTransferi(ctx->CurrentServerDispatch, (pname, param));
+}
+
+
+/* GetProgramResourceiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetProgramResourceiv(GLuint program, GLenum programInterface, GLuint index, GLsizei propCount, const GLenum * props, GLsizei bufSize, GLsizei * length, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetProgramResourceiv");
+ CALL_GetProgramResourceiv(ctx->CurrentServerDispatch, (program, programInterface, index, propCount, props, bufSize, length, params));
+}
+
+
+/* VertexAttrib3fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib3fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[3];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib3fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib3fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib3fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib3fvNV(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib3fvNV);
+ struct marshal_cmd_VertexAttrib3fvNV *cmd;
+ debug_print_marshal("VertexAttrib3fvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib3fvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib3fvNV");
+ CALL_VertexAttrib3fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* SecondaryColorP3ui: marshalled asynchronously */
+struct marshal_cmd_SecondaryColorP3ui
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum type;
+ GLuint color;
+};
+static inline void
+_mesa_unmarshal_SecondaryColorP3ui(struct gl_context *ctx, const struct marshal_cmd_SecondaryColorP3ui *cmd)
+{
+ const GLenum type = cmd->type;
+ const GLuint color = cmd->color;
+ CALL_SecondaryColorP3ui(ctx->CurrentServerDispatch, (type, color));
+}
+static void GLAPIENTRY
+_mesa_marshal_SecondaryColorP3ui(GLenum type, GLuint color)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SecondaryColorP3ui);
+ struct marshal_cmd_SecondaryColorP3ui *cmd;
+ debug_print_marshal("SecondaryColorP3ui");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SecondaryColorP3ui, cmd_size);
+ cmd->type = type;
+ cmd->color = color;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SecondaryColorP3ui");
+ CALL_SecondaryColorP3ui(ctx->CurrentServerDispatch, (type, color));
+}
+
+
+/* BindTextures: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_BindTextures(GLuint first, GLsizei count, const GLuint * textures)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("BindTextures");
+ CALL_BindTextures(ctx->CurrentServerDispatch, (first, count, textures));
+}
+
+
+/* VertexAttrib4fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib4fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[4];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib4fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib4fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib4fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib4fvNV(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib4fvNV);
+ struct marshal_cmd_VertexAttrib4fvNV *cmd;
+ debug_print_marshal("VertexAttrib4fvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib4fvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 16);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib4fvNV");
+ CALL_VertexAttrib4fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* Rectiv: marshalled asynchronously */
+struct marshal_cmd_Rectiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v1[2];
+ GLint v2[2];
+};
+static inline void
+_mesa_unmarshal_Rectiv(struct gl_context *ctx, const struct marshal_cmd_Rectiv *cmd)
+{
+ const GLint * v1 = cmd->v1;
+ const GLint * v2 = cmd->v2;
+ CALL_Rectiv(ctx->CurrentServerDispatch, (v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectiv(const GLint * v1, const GLint * v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectiv);
+ struct marshal_cmd_Rectiv *cmd;
+ debug_print_marshal("Rectiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectiv, cmd_size);
+ memcpy(cmd->v1, v1, 8);
+ memcpy(cmd->v2, v2, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectiv");
+ CALL_Rectiv(ctx->CurrentServerDispatch, (v1, v2));
+}
+
+
+/* MultiTexCoord1iv: marshalled asynchronously */
+struct marshal_cmd_MultiTexCoord1iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint v[1];
+};
+static inline void
+_mesa_unmarshal_MultiTexCoord1iv(struct gl_context *ctx, const struct marshal_cmd_MultiTexCoord1iv *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint * v = cmd->v;
+ CALL_MultiTexCoord1iv(ctx->CurrentServerDispatch, (target, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultiTexCoord1iv(GLenum target, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultiTexCoord1iv);
+ struct marshal_cmd_MultiTexCoord1iv *cmd;
+ debug_print_marshal("MultiTexCoord1iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultiTexCoord1iv, cmd_size);
+ cmd->target = target;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultiTexCoord1iv");
+ CALL_MultiTexCoord1iv(ctx->CurrentServerDispatch, (target, v));
+}
+
+
+/* PassTexCoordATI: marshalled asynchronously */
+struct marshal_cmd_PassTexCoordATI
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint dst;
+ GLuint coord;
+ GLenum swizzle;
+};
+static inline void
+_mesa_unmarshal_PassTexCoordATI(struct gl_context *ctx, const struct marshal_cmd_PassTexCoordATI *cmd)
+{
+ const GLuint dst = cmd->dst;
+ const GLuint coord = cmd->coord;
+ const GLenum swizzle = cmd->swizzle;
+ CALL_PassTexCoordATI(ctx->CurrentServerDispatch, (dst, coord, swizzle));
+}
+static void GLAPIENTRY
+_mesa_marshal_PassTexCoordATI(GLuint dst, GLuint coord, GLenum swizzle)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PassTexCoordATI);
+ struct marshal_cmd_PassTexCoordATI *cmd;
+ debug_print_marshal("PassTexCoordATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PassTexCoordATI, cmd_size);
+ cmd->dst = dst;
+ cmd->coord = coord;
+ cmd->swizzle = swizzle;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PassTexCoordATI");
+ CALL_PassTexCoordATI(ctx->CurrentServerDispatch, (dst, coord, swizzle));
+}
+
+
+/* Vertex2fv: marshalled asynchronously */
+struct marshal_cmd_Vertex2fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v[2];
+};
+static inline void
+_mesa_unmarshal_Vertex2fv(struct gl_context *ctx, const struct marshal_cmd_Vertex2fv *cmd)
+{
+ const GLfloat * v = cmd->v;
+ CALL_Vertex2fv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex2fv(const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex2fv);
+ struct marshal_cmd_Vertex2fv *cmd;
+ debug_print_marshal("Vertex2fv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex2fv, cmd_size);
+ memcpy(cmd->v, v, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex2fv");
+ CALL_Vertex2fv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* BindRenderbufferEXT: marshalled asynchronously */
+struct marshal_cmd_BindRenderbufferEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLuint renderbuffer;
+};
+static inline void
+_mesa_unmarshal_BindRenderbufferEXT(struct gl_context *ctx, const struct marshal_cmd_BindRenderbufferEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLuint renderbuffer = cmd->renderbuffer;
+ CALL_BindRenderbufferEXT(ctx->CurrentServerDispatch, (target, renderbuffer));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindRenderbufferEXT(GLenum target, GLuint renderbuffer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindRenderbufferEXT);
+ struct marshal_cmd_BindRenderbufferEXT *cmd;
+ debug_print_marshal("BindRenderbufferEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindRenderbufferEXT, cmd_size);
+ cmd->target = target;
+ cmd->renderbuffer = renderbuffer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindRenderbufferEXT");
+ CALL_BindRenderbufferEXT(ctx->CurrentServerDispatch, (target, renderbuffer));
+}
+
+
+/* Vertex3sv: marshalled asynchronously */
+struct marshal_cmd_Vertex3sv
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort v[3];
+};
+static inline void
+_mesa_unmarshal_Vertex3sv(struct gl_context *ctx, const struct marshal_cmd_Vertex3sv *cmd)
+{
+ const GLshort * v = cmd->v;
+ CALL_Vertex3sv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Vertex3sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Vertex3sv);
+ struct marshal_cmd_Vertex3sv *cmd;
+ debug_print_marshal("Vertex3sv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Vertex3sv, cmd_size);
+ memcpy(cmd->v, v, 6);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Vertex3sv");
+ CALL_Vertex3sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* EvalMesh1: marshalled asynchronously */
+struct marshal_cmd_EvalMesh1
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLint i1;
+ GLint i2;
+};
+static inline void
+_mesa_unmarshal_EvalMesh1(struct gl_context *ctx, const struct marshal_cmd_EvalMesh1 *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLint i1 = cmd->i1;
+ const GLint i2 = cmd->i2;
+ CALL_EvalMesh1(ctx->CurrentServerDispatch, (mode, i1, i2));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalMesh1(GLenum mode, GLint i1, GLint i2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalMesh1);
+ struct marshal_cmd_EvalMesh1 *cmd;
+ debug_print_marshal("EvalMesh1");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalMesh1, cmd_size);
+ cmd->mode = mode;
+ cmd->i1 = i1;
+ cmd->i2 = i2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalMesh1");
+ CALL_EvalMesh1(ctx->CurrentServerDispatch, (mode, i1, i2));
+}
+
+
+/* DiscardFramebufferEXT: marshalled asynchronously */
+struct marshal_cmd_DiscardFramebufferEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei numAttachments;
+ /* Next safe_mul(numAttachments, 4) bytes are GLenum attachments[numAttachments] */
+};
+static inline void
+_mesa_unmarshal_DiscardFramebufferEXT(struct gl_context *ctx, const struct marshal_cmd_DiscardFramebufferEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei numAttachments = cmd->numAttachments;
+ const GLenum * attachments;
+ const char *variable_data = (const char *) (cmd + 1);
+ attachments = (const GLenum *) variable_data;
+ variable_data += numAttachments * 4;
+ CALL_DiscardFramebufferEXT(ctx->CurrentServerDispatch, (target, numAttachments, attachments));
+}
+static void GLAPIENTRY
+_mesa_marshal_DiscardFramebufferEXT(GLenum target, GLsizei numAttachments, const GLenum * attachments)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DiscardFramebufferEXT) + safe_mul(numAttachments, 4);
+ struct marshal_cmd_DiscardFramebufferEXT *cmd;
+ debug_print_marshal("DiscardFramebufferEXT");
+ if (unlikely(safe_mul(numAttachments, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DiscardFramebufferEXT, cmd_size);
+ cmd->target = target;
+ cmd->numAttachments = numAttachments;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, attachments, numAttachments * 4);
+ variable_data += numAttachments * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DiscardFramebufferEXT");
+ CALL_DiscardFramebufferEXT(ctx->CurrentServerDispatch, (target, numAttachments, attachments));
+}
+
+
+/* Uniform2f: marshalled asynchronously */
+struct marshal_cmd_Uniform2f
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLfloat v0;
+ GLfloat v1;
+};
+static inline void
+_mesa_unmarshal_Uniform2f(struct gl_context *ctx, const struct marshal_cmd_Uniform2f *cmd)
+{
+ const GLint location = cmd->location;
+ const GLfloat v0 = cmd->v0;
+ const GLfloat v1 = cmd->v1;
+ CALL_Uniform2f(ctx->CurrentServerDispatch, (location, v0, v1));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2f(GLint location, GLfloat v0, GLfloat v1)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2f);
+ struct marshal_cmd_Uniform2f *cmd;
+ debug_print_marshal("Uniform2f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2f, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2f");
+ CALL_Uniform2f(ctx->CurrentServerDispatch, (location, v0, v1));
+}
+
+
+/* Uniform2d: marshalled asynchronously */
+struct marshal_cmd_Uniform2d
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLdouble x;
+ GLdouble y;
+};
+static inline void
+_mesa_unmarshal_Uniform2d(struct gl_context *ctx, const struct marshal_cmd_Uniform2d *cmd)
+{
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ const GLdouble y = cmd->y;
+ CALL_Uniform2d(ctx->CurrentServerDispatch, (location, x, y));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2d(GLint location, GLdouble x, GLdouble y)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2d);
+ struct marshal_cmd_Uniform2d *cmd;
+ debug_print_marshal("Uniform2d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2d, cmd_size);
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2d");
+ CALL_Uniform2d(ctx->CurrentServerDispatch, (location, x, y));
+}
+
+
+/* ColorPointerEXT: marshalled asynchronously */
+struct marshal_cmd_ColorPointerEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLint size;
+ GLenum type;
+ GLsizei stride;
+ GLsizei count;
+ const GLvoid * pointer;
+};
+static inline void
+_mesa_unmarshal_ColorPointerEXT(struct gl_context *ctx, const struct marshal_cmd_ColorPointerEXT *cmd)
+{
+ const GLint size = cmd->size;
+ const GLenum type = cmd->type;
+ const GLsizei stride = cmd->stride;
+ const GLsizei count = cmd->count;
+ const GLvoid * pointer = cmd->pointer;
+ CALL_ColorPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+static void GLAPIENTRY
+_mesa_marshal_ColorPointerEXT(GLint size, GLenum type, GLsizei stride, GLsizei count, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ColorPointerEXT);
+ struct marshal_cmd_ColorPointerEXT *cmd;
+ debug_print_marshal("ColorPointerEXT");
+ if (_mesa_glthread_is_non_vbo_vertex_attrib_pointer(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("ColorPointerEXT");
+ CALL_ColorPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ColorPointerEXT, cmd_size);
+ cmd->size = size;
+ cmd->type = type;
+ cmd->stride = stride;
+ cmd->count = count;
+ cmd->pointer = pointer;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ColorPointerEXT");
+ CALL_ColorPointerEXT(ctx->CurrentServerDispatch, (size, type, stride, count, pointer));
+}
+
+
+/* LineWidth: marshalled asynchronously */
+struct marshal_cmd_LineWidth
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat width;
+};
+static inline void
+_mesa_unmarshal_LineWidth(struct gl_context *ctx, const struct marshal_cmd_LineWidth *cmd)
+{
+ const GLfloat width = cmd->width;
+ CALL_LineWidth(ctx->CurrentServerDispatch, (width));
+}
+static void GLAPIENTRY
+_mesa_marshal_LineWidth(GLfloat width)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LineWidth);
+ struct marshal_cmd_LineWidth *cmd;
+ debug_print_marshal("LineWidth");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LineWidth, cmd_size);
+ cmd->width = width;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LineWidth");
+ CALL_LineWidth(ctx->CurrentServerDispatch, (width));
+}
+
+
+/* Uniform2i: marshalled asynchronously */
+struct marshal_cmd_Uniform2i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLint v0;
+ GLint v1;
+};
+static inline void
+_mesa_unmarshal_Uniform2i(struct gl_context *ctx, const struct marshal_cmd_Uniform2i *cmd)
+{
+ const GLint location = cmd->location;
+ const GLint v0 = cmd->v0;
+ const GLint v1 = cmd->v1;
+ CALL_Uniform2i(ctx->CurrentServerDispatch, (location, v0, v1));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform2i(GLint location, GLint v0, GLint v1)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform2i);
+ struct marshal_cmd_Uniform2i *cmd;
+ debug_print_marshal("Uniform2i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform2i, cmd_size);
+ cmd->location = location;
+ cmd->v0 = v0;
+ cmd->v1 = v1;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform2i");
+ CALL_Uniform2i(ctx->CurrentServerDispatch, (location, v0, v1));
+}
+
+
+/* MultiDrawElementsBaseVertex: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_MultiDrawElementsBaseVertex(GLenum mode, const GLsizei * count, GLenum type, const GLvoid * const * indices, GLsizei primcount, const GLint * basevertex)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("MultiDrawElementsBaseVertex");
+ CALL_MultiDrawElementsBaseVertex(ctx->CurrentServerDispatch, (mode, count, type, indices, primcount, basevertex));
+}
+
+
+/* Lightxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_Lightxv(GLenum light, GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("Lightxv");
+ CALL_Lightxv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* DepthRangeIndexed: marshalled asynchronously */
+struct marshal_cmd_DepthRangeIndexed
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLclampd n;
+ GLclampd f;
+};
+static inline void
+_mesa_unmarshal_DepthRangeIndexed(struct gl_context *ctx, const struct marshal_cmd_DepthRangeIndexed *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLclampd n = cmd->n;
+ const GLclampd f = cmd->f;
+ CALL_DepthRangeIndexed(ctx->CurrentServerDispatch, (index, n, f));
+}
+static void GLAPIENTRY
+_mesa_marshal_DepthRangeIndexed(GLuint index, GLclampd n, GLclampd f)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DepthRangeIndexed);
+ struct marshal_cmd_DepthRangeIndexed *cmd;
+ debug_print_marshal("DepthRangeIndexed");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DepthRangeIndexed, cmd_size);
+ cmd->index = index;
+ cmd->n = n;
+ cmd->f = f;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DepthRangeIndexed");
+ CALL_DepthRangeIndexed(ctx->CurrentServerDispatch, (index, n, f));
+}
+
+
+/* GetConvolutionParameterfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetConvolutionParameterfv(GLenum target, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetConvolutionParameterfv");
+ CALL_GetConvolutionParameterfv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* GetMaterialfv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetMaterialfv(GLenum face, GLenum pname, GLfloat * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetMaterialfv");
+ CALL_GetMaterialfv(ctx->CurrentServerDispatch, (face, pname, params));
+}
+
+
+/* TexImage3DMultisample: marshalled asynchronously */
+struct marshal_cmd_TexImage3DMultisample
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalformat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLboolean fixedsamplelocations;
+};
+static inline void
+_mesa_unmarshal_TexImage3DMultisample(struct gl_context *ctx, const struct marshal_cmd_TexImage3DMultisample *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalformat = cmd->internalformat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLboolean fixedsamplelocations = cmd->fixedsamplelocations;
+ CALL_TexImage3DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexImage3DMultisample(GLenum target, GLsizei samples, GLenum internalformat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedsamplelocations)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexImage3DMultisample);
+ struct marshal_cmd_TexImage3DMultisample *cmd;
+ debug_print_marshal("TexImage3DMultisample");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexImage3DMultisample, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalformat = internalformat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->fixedsamplelocations = fixedsamplelocations;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexImage3DMultisample");
+ CALL_TexImage3DMultisample(ctx->CurrentServerDispatch, (target, samples, internalformat, width, height, depth, fixedsamplelocations));
+}
+
+
+/* VertexAttrib1fvNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1fvNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLfloat v[1];
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1fvNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1fvNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLfloat * v = cmd->v;
+ CALL_VertexAttrib1fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1fvNV(GLuint index, const GLfloat * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1fvNV);
+ struct marshal_cmd_VertexAttrib1fvNV *cmd;
+ debug_print_marshal("VertexAttrib1fvNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1fvNV, cmd_size);
+ cmd->index = index;
+ memcpy(cmd->v, v, 4);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1fvNV");
+ CALL_VertexAttrib1fvNV(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* GetUniformBlockIndex: marshalled synchronously */
+static GLuint GLAPIENTRY
+_mesa_marshal_GetUniformBlockIndex(GLuint program, const GLchar * uniformBlockName)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformBlockIndex");
+ return CALL_GetUniformBlockIndex(ctx->CurrentServerDispatch, (program, uniformBlockName));
+}
+
+
+/* DetachShader: marshalled asynchronously */
+struct marshal_cmd_DetachShader
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLuint shader;
+};
+static inline void
+_mesa_unmarshal_DetachShader(struct gl_context *ctx, const struct marshal_cmd_DetachShader *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLuint shader = cmd->shader;
+ CALL_DetachShader(ctx->CurrentServerDispatch, (program, shader));
+}
+static void GLAPIENTRY
+_mesa_marshal_DetachShader(GLuint program, GLuint shader)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DetachShader);
+ struct marshal_cmd_DetachShader *cmd;
+ debug_print_marshal("DetachShader");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DetachShader, cmd_size);
+ cmd->program = program;
+ cmd->shader = shader;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DetachShader");
+ CALL_DetachShader(ctx->CurrentServerDispatch, (program, shader));
+}
+
+
+/* CopyTexSubImage2D: marshalled asynchronously */
+struct marshal_cmd_CopyTexSubImage2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLint level;
+ GLint xoffset;
+ GLint yoffset;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_CopyTexSubImage2D(struct gl_context *ctx, const struct marshal_cmd_CopyTexSubImage2D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLint level = cmd->level;
+ const GLint xoffset = cmd->xoffset;
+ const GLint yoffset = cmd->yoffset;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_CopyTexSubImage2D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyTexSubImage2D(GLenum target, GLint level, GLint xoffset, GLint yoffset, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyTexSubImage2D);
+ struct marshal_cmd_CopyTexSubImage2D *cmd;
+ debug_print_marshal("CopyTexSubImage2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyTexSubImage2D, cmd_size);
+ cmd->target = target;
+ cmd->level = level;
+ cmd->xoffset = xoffset;
+ cmd->yoffset = yoffset;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyTexSubImage2D");
+ CALL_CopyTexSubImage2D(ctx->CurrentServerDispatch, (target, level, xoffset, yoffset, x, y, width, height));
+}
+
+
+/* GetNamedFramebufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetNamedFramebufferParameteriv(GLuint framebuffer, GLenum pname, GLint * param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetNamedFramebufferParameteriv");
+ CALL_GetNamedFramebufferParameteriv(ctx->CurrentServerDispatch, (framebuffer, pname, param));
+}
+
+
+/* GetObjectParameterivARB: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetObjectParameterivARB(GLhandleARB obj, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetObjectParameterivARB");
+ CALL_GetObjectParameterivARB(ctx->CurrentServerDispatch, (obj, pname, params));
+}
+
+
+/* Color3iv: marshalled asynchronously */
+struct marshal_cmd_Color3iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint v[3];
+};
+static inline void
+_mesa_unmarshal_Color3iv(struct gl_context *ctx, const struct marshal_cmd_Color3iv *cmd)
+{
+ const GLint * v = cmd->v;
+ CALL_Color3iv(ctx->CurrentServerDispatch, (v));
+}
+static void GLAPIENTRY
+_mesa_marshal_Color3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Color3iv);
+ struct marshal_cmd_Color3iv *cmd;
+ debug_print_marshal("Color3iv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Color3iv, cmd_size);
+ memcpy(cmd->v, v, 12);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Color3iv");
+ CALL_Color3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* DrawElements: marshalled asynchronously */
+struct marshal_cmd_DrawElements
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum mode;
+ GLsizei count;
+ GLenum type;
+ const GLvoid * indices;
+};
+static inline void
+_mesa_unmarshal_DrawElements(struct gl_context *ctx, const struct marshal_cmd_DrawElements *cmd)
+{
+ const GLenum mode = cmd->mode;
+ const GLsizei count = cmd->count;
+ const GLenum type = cmd->type;
+ const GLvoid * indices = cmd->indices;
+ CALL_DrawElements(ctx->CurrentServerDispatch, (mode, count, type, indices));
+}
+static void GLAPIENTRY
+_mesa_marshal_DrawElements(GLenum mode, GLsizei count, GLenum type, const GLvoid * indices)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_DrawElements);
+ struct marshal_cmd_DrawElements *cmd;
+ debug_print_marshal("DrawElements");
+ if (_mesa_glthread_is_non_vbo_draw_elements(ctx)) {
+ _mesa_glthread_finish(ctx);
+ _mesa_glthread_restore_dispatch(ctx);
+ debug_print_sync_fallback("DrawElements");
+ CALL_DrawElements(ctx->CurrentServerDispatch, (mode, count, type, indices));
+ return;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_DrawElements, cmd_size);
+ cmd->mode = mode;
+ cmd->count = count;
+ cmd->type = type;
+ cmd->indices = indices;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("DrawElements");
+ CALL_DrawElements(ctx->CurrentServerDispatch, (mode, count, type, indices));
+}
+
+
+/* ScissorArrayv: marshalled asynchronously */
+struct marshal_cmd_ScissorArrayv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint first;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are int v[count][4] */
+};
+static inline void
+_mesa_unmarshal_ScissorArrayv(struct gl_context *ctx, const struct marshal_cmd_ScissorArrayv *cmd)
+{
+ const GLuint first = cmd->first;
+ const GLsizei count = cmd->count;
+ const int * v;
+ const char *variable_data = (const char *) (cmd + 1);
+ v = (const int *) variable_data;
+ variable_data += count * 16;
+ CALL_ScissorArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+static void GLAPIENTRY
+_mesa_marshal_ScissorArrayv(GLuint first, GLsizei count, const int * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ScissorArrayv) + safe_mul(count, 16);
+ struct marshal_cmd_ScissorArrayv *cmd;
+ debug_print_marshal("ScissorArrayv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ScissorArrayv, cmd_size);
+ cmd->first = first;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, v, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ScissorArrayv");
+ CALL_ScissorArrayv(ctx->CurrentServerDispatch, (first, count, v));
+}
+
+
+/* GetInternalformativ: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, GLsizei bufSize, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetInternalformativ");
+ CALL_GetInternalformativ(ctx->CurrentServerDispatch, (target, internalformat, pname, bufSize, params));
+}
+
+
+/* EvalPoint2: marshalled asynchronously */
+struct marshal_cmd_EvalPoint2
+{
+ struct marshal_cmd_base cmd_base;
+ GLint i;
+ GLint j;
+};
+static inline void
+_mesa_unmarshal_EvalPoint2(struct gl_context *ctx, const struct marshal_cmd_EvalPoint2 *cmd)
+{
+ const GLint i = cmd->i;
+ const GLint j = cmd->j;
+ CALL_EvalPoint2(ctx->CurrentServerDispatch, (i, j));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalPoint2(GLint i, GLint j)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalPoint2);
+ struct marshal_cmd_EvalPoint2 *cmd;
+ debug_print_marshal("EvalPoint2");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalPoint2, cmd_size);
+ cmd->i = i;
+ cmd->j = j;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalPoint2");
+ CALL_EvalPoint2(ctx->CurrentServerDispatch, (i, j));
+}
+
+
+/* EvalPoint1: marshalled asynchronously */
+struct marshal_cmd_EvalPoint1
+{
+ struct marshal_cmd_base cmd_base;
+ GLint i;
+};
+static inline void
+_mesa_unmarshal_EvalPoint1(struct gl_context *ctx, const struct marshal_cmd_EvalPoint1 *cmd)
+{
+ const GLint i = cmd->i;
+ CALL_EvalPoint1(ctx->CurrentServerDispatch, (i));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalPoint1(GLint i)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalPoint1);
+ struct marshal_cmd_EvalPoint1 *cmd;
+ debug_print_marshal("EvalPoint1");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalPoint1, cmd_size);
+ cmd->i = i;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalPoint1");
+ CALL_EvalPoint1(ctx->CurrentServerDispatch, (i));
+}
+
+
+/* VertexAttribLPointer: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribLPointer(GLuint index, GLint size, GLenum type, GLsizei stride, const GLvoid * pointer)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribLPointer");
+ CALL_VertexAttribLPointer(ctx->CurrentServerDispatch, (index, size, type, stride, pointer));
+}
+
+
+/* PopMatrix: marshalled asynchronously */
+struct marshal_cmd_PopMatrix
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_PopMatrix(struct gl_context *ctx, const struct marshal_cmd_PopMatrix *cmd)
+{
+ CALL_PopMatrix(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_PopMatrix(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_PopMatrix);
+ struct marshal_cmd_PopMatrix *cmd;
+ debug_print_marshal("PopMatrix");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_PopMatrix, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("PopMatrix");
+ CALL_PopMatrix(ctx->CurrentServerDispatch, ());
+}
+
+
+/* GetTexGeniv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetTexGeniv(GLenum coord, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTexGeniv");
+ CALL_GetTexGeniv(ctx->CurrentServerDispatch, (coord, pname, params));
+}
+
+
+/* GetFirstPerfQueryIdINTEL: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetFirstPerfQueryIdINTEL(GLuint * queryId)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetFirstPerfQueryIdINTEL");
+ CALL_GetFirstPerfQueryIdINTEL(ctx->CurrentServerDispatch, (queryId));
+}
+
+
+/* UnmapBuffer: marshalled synchronously */
+static GLboolean GLAPIENTRY
+_mesa_marshal_UnmapBuffer(GLenum target)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("UnmapBuffer");
+ return CALL_UnmapBuffer(ctx->CurrentServerDispatch, (target));
+}
+
+
+/* EvalCoord1d: marshalled asynchronously */
+struct marshal_cmd_EvalCoord1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble u;
+};
+static inline void
+_mesa_unmarshal_EvalCoord1d(struct gl_context *ctx, const struct marshal_cmd_EvalCoord1d *cmd)
+{
+ const GLdouble u = cmd->u;
+ CALL_EvalCoord1d(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord1d(GLdouble u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord1d);
+ struct marshal_cmd_EvalCoord1d *cmd;
+ debug_print_marshal("EvalCoord1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord1d, cmd_size);
+ cmd->u = u;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord1d");
+ CALL_EvalCoord1d(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* VertexAttribL1d: marshalled asynchronously */
+struct marshal_cmd_VertexAttribL1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+};
+static inline void
+_mesa_unmarshal_VertexAttribL1d(struct gl_context *ctx, const struct marshal_cmd_VertexAttribL1d *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ CALL_VertexAttribL1d(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribL1d(GLuint index, GLdouble x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttribL1d);
+ struct marshal_cmd_VertexAttribL1d *cmd;
+ debug_print_marshal("VertexAttribL1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttribL1d, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttribL1d");
+ CALL_VertexAttribL1d(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* EvalCoord1f: marshalled asynchronously */
+struct marshal_cmd_EvalCoord1f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat u;
+};
+static inline void
+_mesa_unmarshal_EvalCoord1f(struct gl_context *ctx, const struct marshal_cmd_EvalCoord1f *cmd)
+{
+ const GLfloat u = cmd->u;
+ CALL_EvalCoord1f(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord1f(GLfloat u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord1f);
+ struct marshal_cmd_EvalCoord1f *cmd;
+ debug_print_marshal("EvalCoord1f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord1f, cmd_size);
+ cmd->u = u;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord1f");
+ CALL_EvalCoord1f(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* Materialf: marshalled asynchronously */
+struct marshal_cmd_Materialf
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum pname;
+ GLfloat param;
+};
+static inline void
+_mesa_unmarshal_Materialf(struct gl_context *ctx, const struct marshal_cmd_Materialf *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum pname = cmd->pname;
+ const GLfloat param = cmd->param;
+ CALL_Materialf(ctx->CurrentServerDispatch, (face, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Materialf(GLenum face, GLenum pname, GLfloat param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Materialf);
+ struct marshal_cmd_Materialf *cmd;
+ debug_print_marshal("Materialf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Materialf, cmd_size);
+ cmd->face = face;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Materialf");
+ CALL_Materialf(ctx->CurrentServerDispatch, (face, pname, param));
+}
+
+
+/* Materiali: marshalled asynchronously */
+struct marshal_cmd_Materiali
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_Materiali(struct gl_context *ctx, const struct marshal_cmd_Materiali *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_Materiali(ctx->CurrentServerDispatch, (face, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Materiali(GLenum face, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Materiali);
+ struct marshal_cmd_Materiali *cmd;
+ debug_print_marshal("Materiali");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Materiali, cmd_size);
+ cmd->face = face;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Materiali");
+ CALL_Materiali(ctx->CurrentServerDispatch, (face, pname, param));
+}
+
+
+/* ProgramUniform1uiv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1uiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 4) bytes are GLuint value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1uiv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1uiv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint *) variable_data;
+ variable_data += count * 4;
+ CALL_ProgramUniform1uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1uiv(GLuint program, GLint location, GLsizei count, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1uiv) + safe_mul(count, 4);
+ struct marshal_cmd_ProgramUniform1uiv *cmd;
+ debug_print_marshal("ProgramUniform1uiv");
+ if (unlikely(safe_mul(count, 4) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1uiv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 4);
+ variable_data += count * 4;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1uiv");
+ CALL_ProgramUniform1uiv(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* EvalCoord1dv: marshalled asynchronously */
+struct marshal_cmd_EvalCoord1dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble u[1];
+};
+static inline void
+_mesa_unmarshal_EvalCoord1dv(struct gl_context *ctx, const struct marshal_cmd_EvalCoord1dv *cmd)
+{
+ const GLdouble * u = cmd->u;
+ CALL_EvalCoord1dv(ctx->CurrentServerDispatch, (u));
+}
+static void GLAPIENTRY
+_mesa_marshal_EvalCoord1dv(const GLdouble * u)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EvalCoord1dv);
+ struct marshal_cmd_EvalCoord1dv *cmd;
+ debug_print_marshal("EvalCoord1dv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EvalCoord1dv, cmd_size);
+ memcpy(cmd->u, u, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EvalCoord1dv");
+ CALL_EvalCoord1dv(ctx->CurrentServerDispatch, (u));
+}
+
+
+/* Materialx: marshalled asynchronously */
+struct marshal_cmd_Materialx
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum face;
+ GLenum pname;
+ GLfixed param;
+};
+static inline void
+_mesa_unmarshal_Materialx(struct gl_context *ctx, const struct marshal_cmd_Materialx *cmd)
+{
+ const GLenum face = cmd->face;
+ const GLenum pname = cmd->pname;
+ const GLfixed param = cmd->param;
+ CALL_Materialx(ctx->CurrentServerDispatch, (face, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_Materialx(GLenum face, GLenum pname, GLfixed param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Materialx);
+ struct marshal_cmd_Materialx *cmd;
+ debug_print_marshal("Materialx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Materialx, cmd_size);
+ cmd->face = face;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Materialx");
+ CALL_Materialx(ctx->CurrentServerDispatch, (face, pname, param));
+}
+
+
+/* GetQueryBufferObjectiv: marshalled asynchronously */
+struct marshal_cmd_GetQueryBufferObjectiv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint id;
+ GLuint buffer;
+ GLenum pname;
+ GLintptr offset;
+};
+static inline void
+_mesa_unmarshal_GetQueryBufferObjectiv(struct gl_context *ctx, const struct marshal_cmd_GetQueryBufferObjectiv *cmd)
+{
+ const GLuint id = cmd->id;
+ const GLuint buffer = cmd->buffer;
+ const GLenum pname = cmd->pname;
+ const GLintptr offset = cmd->offset;
+ CALL_GetQueryBufferObjectiv(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_GetQueryBufferObjectiv(GLuint id, GLuint buffer, GLenum pname, GLintptr offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_GetQueryBufferObjectiv);
+ struct marshal_cmd_GetQueryBufferObjectiv *cmd;
+ debug_print_marshal("GetQueryBufferObjectiv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_GetQueryBufferObjectiv, cmd_size);
+ cmd->id = id;
+ cmd->buffer = buffer;
+ cmd->pname = pname;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("GetQueryBufferObjectiv");
+ CALL_GetQueryBufferObjectiv(ctx->CurrentServerDispatch, (id, buffer, pname, offset));
+}
+
+
+/* GetTextureSamplerHandleARB: marshalled synchronously */
+static GLuint64 GLAPIENTRY
+_mesa_marshal_GetTextureSamplerHandleARB(GLuint texture, GLuint sampler)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetTextureSamplerHandleARB");
+ return CALL_GetTextureSamplerHandleARB(ctx->CurrentServerDispatch, (texture, sampler));
+}
+
+
+/* GetLightiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetLightiv(GLenum light, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetLightiv");
+ CALL_GetLightiv(ctx->CurrentServerDispatch, (light, pname, params));
+}
+
+
+/* ProgramUniform3i64ARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform3i64ARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint64 x;
+ GLint64 y;
+ GLint64 z;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform3i64ARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform3i64ARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint64 x = cmd->x;
+ const GLint64 y = cmd->y;
+ const GLint64 z = cmd->z;
+ CALL_ProgramUniform3i64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform3i64ARB(GLuint program, GLint location, GLint64 x, GLint64 y, GLint64 z)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform3i64ARB);
+ struct marshal_cmd_ProgramUniform3i64ARB *cmd;
+ debug_print_marshal("ProgramUniform3i64ARB");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform3i64ARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->z = z;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform3i64ARB");
+ CALL_ProgramUniform3i64ARB(ctx->CurrentServerDispatch, (program, location, x, y, z));
+}
+
+
+/* ProgramUniform1i: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1i
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLint x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1i(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1i *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLint x = cmd->x;
+ CALL_ProgramUniform1i(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1i(GLuint program, GLint location, GLint x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1i);
+ struct marshal_cmd_ProgramUniform1i *cmd;
+ debug_print_marshal("ProgramUniform1i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1i, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1i");
+ CALL_ProgramUniform1i(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* ProgramUniform1f: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1f
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLfloat x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1f(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1f *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLfloat x = cmd->x;
+ CALL_ProgramUniform1f(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1f(GLuint program, GLint location, GLfloat x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1f);
+ struct marshal_cmd_ProgramUniform1f *cmd;
+ debug_print_marshal("ProgramUniform1f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1f, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1f");
+ CALL_ProgramUniform1f(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* ProgramUniform1d: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1d
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLdouble x;
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1d(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1d *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLdouble x = cmd->x;
+ CALL_ProgramUniform1d(ctx->CurrentServerDispatch, (program, location, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1d(GLuint program, GLint location, GLdouble x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1d);
+ struct marshal_cmd_ProgramUniform1d *cmd;
+ debug_print_marshal("ProgramUniform1d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1d, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1d");
+ CALL_ProgramUniform1d(ctx->CurrentServerDispatch, (program, location, x));
+}
+
+
+/* WindowPos3iv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos3iv(const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos3iv");
+ CALL_WindowPos3iv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* CopyConvolutionFilter2D: marshalled asynchronously */
+struct marshal_cmd_CopyConvolutionFilter2D
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLenum internalformat;
+ GLint x;
+ GLint y;
+ GLsizei width;
+ GLsizei height;
+};
+static inline void
+_mesa_unmarshal_CopyConvolutionFilter2D(struct gl_context *ctx, const struct marshal_cmd_CopyConvolutionFilter2D *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLenum internalformat = cmd->internalformat;
+ const GLint x = cmd->x;
+ const GLint y = cmd->y;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ CALL_CopyConvolutionFilter2D(ctx->CurrentServerDispatch, (target, internalformat, x, y, width, height));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyConvolutionFilter2D(GLenum target, GLenum internalformat, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyConvolutionFilter2D);
+ struct marshal_cmd_CopyConvolutionFilter2D *cmd;
+ debug_print_marshal("CopyConvolutionFilter2D");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyConvolutionFilter2D, cmd_size);
+ cmd->target = target;
+ cmd->internalformat = internalformat;
+ cmd->x = x;
+ cmd->y = y;
+ cmd->width = width;
+ cmd->height = height;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyConvolutionFilter2D");
+ CALL_CopyConvolutionFilter2D(ctx->CurrentServerDispatch, (target, internalformat, x, y, width, height));
+}
+
+
+/* CopyBufferSubData: marshalled asynchronously */
+struct marshal_cmd_CopyBufferSubData
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum readTarget;
+ GLenum writeTarget;
+ GLintptr readOffset;
+ GLintptr writeOffset;
+ GLsizeiptr size;
+};
+static inline void
+_mesa_unmarshal_CopyBufferSubData(struct gl_context *ctx, const struct marshal_cmd_CopyBufferSubData *cmd)
+{
+ const GLenum readTarget = cmd->readTarget;
+ const GLenum writeTarget = cmd->writeTarget;
+ const GLintptr readOffset = cmd->readOffset;
+ const GLintptr writeOffset = cmd->writeOffset;
+ const GLsizeiptr size = cmd->size;
+ CALL_CopyBufferSubData(ctx->CurrentServerDispatch, (readTarget, writeTarget, readOffset, writeOffset, size));
+}
+static void GLAPIENTRY
+_mesa_marshal_CopyBufferSubData(GLenum readTarget, GLenum writeTarget, GLintptr readOffset, GLintptr writeOffset, GLsizeiptr size)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_CopyBufferSubData);
+ struct marshal_cmd_CopyBufferSubData *cmd;
+ debug_print_marshal("CopyBufferSubData");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_CopyBufferSubData, cmd_size);
+ cmd->readTarget = readTarget;
+ cmd->writeTarget = writeTarget;
+ cmd->readOffset = readOffset;
+ cmd->writeOffset = writeOffset;
+ cmd->size = size;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("CopyBufferSubData");
+ CALL_CopyBufferSubData(ctx->CurrentServerDispatch, (readTarget, writeTarget, readOffset, writeOffset, size));
+}
+
+
+/* UniformMatrix3x4fv: marshalled asynchronously */
+struct marshal_cmd_UniformMatrix3x4fv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 48) bytes are GLfloat value[count][12] */
+};
+static inline void
+_mesa_unmarshal_UniformMatrix3x4fv(struct gl_context *ctx, const struct marshal_cmd_UniformMatrix3x4fv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLfloat * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLfloat *) variable_data;
+ variable_data += count * 48;
+ CALL_UniformMatrix3x4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_UniformMatrix3x4fv(GLint location, GLsizei count, GLboolean transpose, const GLfloat * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_UniformMatrix3x4fv) + safe_mul(count, 48);
+ struct marshal_cmd_UniformMatrix3x4fv *cmd;
+ debug_print_marshal("UniformMatrix3x4fv");
+ if (unlikely(safe_mul(count, 48) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_UniformMatrix3x4fv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 48);
+ variable_data += count * 48;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("UniformMatrix3x4fv");
+ CALL_UniformMatrix3x4fv(ctx->CurrentServerDispatch, (location, count, transpose, value));
+}
+
+
+/* Recti: marshalled asynchronously */
+struct marshal_cmd_Recti
+{
+ struct marshal_cmd_base cmd_base;
+ GLint x1;
+ GLint y1;
+ GLint x2;
+ GLint y2;
+};
+static inline void
+_mesa_unmarshal_Recti(struct gl_context *ctx, const struct marshal_cmd_Recti *cmd)
+{
+ const GLint x1 = cmd->x1;
+ const GLint y1 = cmd->y1;
+ const GLint x2 = cmd->x2;
+ const GLint y2 = cmd->y2;
+ CALL_Recti(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Recti(GLint x1, GLint y1, GLint x2, GLint y2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Recti);
+ struct marshal_cmd_Recti *cmd;
+ debug_print_marshal("Recti");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Recti, cmd_size);
+ cmd->x1 = x1;
+ cmd->y1 = y1;
+ cmd->x2 = x2;
+ cmd->y2 = y2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Recti");
+ CALL_Recti(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+
+
+/* VertexAttribI3ivEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexAttribI3ivEXT(GLuint index, const GLint * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexAttribI3ivEXT");
+ CALL_VertexAttribI3ivEXT(ctx->CurrentServerDispatch, (index, v));
+}
+
+
+/* DeleteSamplers: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_DeleteSamplers(GLsizei count, const GLuint * samplers)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("DeleteSamplers");
+ CALL_DeleteSamplers(ctx->CurrentServerDispatch, (count, samplers));
+}
+
+
+/* SamplerParameteri: marshalled asynchronously */
+struct marshal_cmd_SamplerParameteri
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint sampler;
+ GLenum pname;
+ GLint param;
+};
+static inline void
+_mesa_unmarshal_SamplerParameteri(struct gl_context *ctx, const struct marshal_cmd_SamplerParameteri *cmd)
+{
+ const GLuint sampler = cmd->sampler;
+ const GLenum pname = cmd->pname;
+ const GLint param = cmd->param;
+ CALL_SamplerParameteri(ctx->CurrentServerDispatch, (sampler, pname, param));
+}
+static void GLAPIENTRY
+_mesa_marshal_SamplerParameteri(GLuint sampler, GLenum pname, GLint param)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_SamplerParameteri);
+ struct marshal_cmd_SamplerParameteri *cmd;
+ debug_print_marshal("SamplerParameteri");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_SamplerParameteri, cmd_size);
+ cmd->sampler = sampler;
+ cmd->pname = pname;
+ cmd->param = param;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("SamplerParameteri");
+ CALL_SamplerParameteri(ctx->CurrentServerDispatch, (sampler, pname, param));
+}
+
+
+/* WindowRectanglesEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowRectanglesEXT(GLenum mode, GLsizei count, const GLint * box)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowRectanglesEXT");
+ CALL_WindowRectanglesEXT(ctx->CurrentServerDispatch, (mode, count, box));
+}
+
+
+/* Rectf: marshalled asynchronously */
+struct marshal_cmd_Rectf
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat x1;
+ GLfloat y1;
+ GLfloat x2;
+ GLfloat y2;
+};
+static inline void
+_mesa_unmarshal_Rectf(struct gl_context *ctx, const struct marshal_cmd_Rectf *cmd)
+{
+ const GLfloat x1 = cmd->x1;
+ const GLfloat y1 = cmd->y1;
+ const GLfloat x2 = cmd->x2;
+ const GLfloat y2 = cmd->y2;
+ CALL_Rectf(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectf(GLfloat x1, GLfloat y1, GLfloat x2, GLfloat y2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectf);
+ struct marshal_cmd_Rectf *cmd;
+ debug_print_marshal("Rectf");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectf, cmd_size);
+ cmd->x1 = x1;
+ cmd->y1 = y1;
+ cmd->x2 = x2;
+ cmd->y2 = y2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectf");
+ CALL_Rectf(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+
+
+/* Rectd: marshalled asynchronously */
+struct marshal_cmd_Rectd
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble x1;
+ GLdouble y1;
+ GLdouble x2;
+ GLdouble y2;
+};
+static inline void
+_mesa_unmarshal_Rectd(struct gl_context *ctx, const struct marshal_cmd_Rectd *cmd)
+{
+ const GLdouble x1 = cmd->x1;
+ const GLdouble y1 = cmd->y1;
+ const GLdouble x2 = cmd->x2;
+ const GLdouble y2 = cmd->y2;
+ CALL_Rectd(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectd(GLdouble x1, GLdouble y1, GLdouble x2, GLdouble y2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectd);
+ struct marshal_cmd_Rectd *cmd;
+ debug_print_marshal("Rectd");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectd, cmd_size);
+ cmd->x1 = x1;
+ cmd->y1 = y1;
+ cmd->x2 = x2;
+ cmd->y2 = y2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectd");
+ CALL_Rectd(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+
+
+/* MultMatrixx: marshalled asynchronously */
+struct marshal_cmd_MultMatrixx
+{
+ struct marshal_cmd_base cmd_base;
+ GLfixed m[16];
+};
+static inline void
+_mesa_unmarshal_MultMatrixx(struct gl_context *ctx, const struct marshal_cmd_MultMatrixx *cmd)
+{
+ const GLfixed * m = cmd->m;
+ CALL_MultMatrixx(ctx->CurrentServerDispatch, (m));
+}
+static void GLAPIENTRY
+_mesa_marshal_MultMatrixx(const GLfixed * m)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MultMatrixx);
+ struct marshal_cmd_MultMatrixx *cmd;
+ debug_print_marshal("MultMatrixx");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MultMatrixx, cmd_size);
+ memcpy(cmd->m, m, 64);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MultMatrixx");
+ CALL_MultMatrixx(ctx->CurrentServerDispatch, (m));
+}
+
+
+/* TexStorageMem3DMultisampleEXT: marshalled asynchronously */
+struct marshal_cmd_TexStorageMem3DMultisampleEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLenum target;
+ GLsizei samples;
+ GLenum internalFormat;
+ GLsizei width;
+ GLsizei height;
+ GLsizei depth;
+ GLboolean fixedSampleLocations;
+ GLuint memory;
+ GLuint64 offset;
+};
+static inline void
+_mesa_unmarshal_TexStorageMem3DMultisampleEXT(struct gl_context *ctx, const struct marshal_cmd_TexStorageMem3DMultisampleEXT *cmd)
+{
+ const GLenum target = cmd->target;
+ const GLsizei samples = cmd->samples;
+ const GLenum internalFormat = cmd->internalFormat;
+ const GLsizei width = cmd->width;
+ const GLsizei height = cmd->height;
+ const GLsizei depth = cmd->depth;
+ const GLboolean fixedSampleLocations = cmd->fixedSampleLocations;
+ const GLuint memory = cmd->memory;
+ const GLuint64 offset = cmd->offset;
+ CALL_TexStorageMem3DMultisampleEXT(ctx->CurrentServerDispatch, (target, samples, internalFormat, width, height, depth, fixedSampleLocations, memory, offset));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexStorageMem3DMultisampleEXT(GLenum target, GLsizei samples, GLenum internalFormat, GLsizei width, GLsizei height, GLsizei depth, GLboolean fixedSampleLocations, GLuint memory, GLuint64 offset)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexStorageMem3DMultisampleEXT);
+ struct marshal_cmd_TexStorageMem3DMultisampleEXT *cmd;
+ debug_print_marshal("TexStorageMem3DMultisampleEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexStorageMem3DMultisampleEXT, cmd_size);
+ cmd->target = target;
+ cmd->samples = samples;
+ cmd->internalFormat = internalFormat;
+ cmd->width = width;
+ cmd->height = height;
+ cmd->depth = depth;
+ cmd->fixedSampleLocations = fixedSampleLocations;
+ cmd->memory = memory;
+ cmd->offset = offset;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexStorageMem3DMultisampleEXT");
+ CALL_TexStorageMem3DMultisampleEXT(ctx->CurrentServerDispatch, (target, samples, internalFormat, width, height, depth, fixedSampleLocations, memory, offset));
+}
+
+
+/* Rects: marshalled asynchronously */
+struct marshal_cmd_Rects
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort x1;
+ GLshort y1;
+ GLshort x2;
+ GLshort y2;
+};
+static inline void
+_mesa_unmarshal_Rects(struct gl_context *ctx, const struct marshal_cmd_Rects *cmd)
+{
+ const GLshort x1 = cmd->x1;
+ const GLshort y1 = cmd->y1;
+ const GLshort x2 = cmd->x2;
+ const GLshort y2 = cmd->y2;
+ CALL_Rects(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rects(GLshort x1, GLshort y1, GLshort x2, GLshort y2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rects);
+ struct marshal_cmd_Rects *cmd;
+ debug_print_marshal("Rects");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rects, cmd_size);
+ cmd->x1 = x1;
+ cmd->y1 = y1;
+ cmd->x2 = x2;
+ cmd->y2 = y2;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rects");
+ CALL_Rects(ctx->CurrentServerDispatch, (x1, y1, x2, y2));
+}
+
+
+/* GetVertexAttribIiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetVertexAttribIiv(GLuint index, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetVertexAttribIiv");
+ CALL_GetVertexAttribIiv(ctx->CurrentServerDispatch, (index, pname, params));
+}
+
+
+/* ClientWaitSync: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_ClientWaitSync(GLsync sync, GLbitfield flags, GLuint64 timeout)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ClientWaitSync");
+ return CALL_ClientWaitSync(ctx->CurrentServerDispatch, (sync, flags, timeout));
+}
+
+
+/* TexCoord4s: marshalled asynchronously */
+struct marshal_cmd_TexCoord4s
+{
+ struct marshal_cmd_base cmd_base;
+ GLshort s;
+ GLshort t;
+ GLshort r;
+ GLshort q;
+};
+static inline void
+_mesa_unmarshal_TexCoord4s(struct gl_context *ctx, const struct marshal_cmd_TexCoord4s *cmd)
+{
+ const GLshort s = cmd->s;
+ const GLshort t = cmd->t;
+ const GLshort r = cmd->r;
+ const GLshort q = cmd->q;
+ CALL_TexCoord4s(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4s(GLshort s, GLshort t, GLshort r, GLshort q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4s);
+ struct marshal_cmd_TexCoord4s *cmd;
+ debug_print_marshal("TexCoord4s");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4s, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4s");
+ CALL_TexCoord4s(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+
+
+/* TexEnvxv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_TexEnvxv(GLenum target, GLenum pname, const GLfixed * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("TexEnvxv");
+ CALL_TexEnvxv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* TexCoord4i: marshalled asynchronously */
+struct marshal_cmd_TexCoord4i
+{
+ struct marshal_cmd_base cmd_base;
+ GLint s;
+ GLint t;
+ GLint r;
+ GLint q;
+};
+static inline void
+_mesa_unmarshal_TexCoord4i(struct gl_context *ctx, const struct marshal_cmd_TexCoord4i *cmd)
+{
+ const GLint s = cmd->s;
+ const GLint t = cmd->t;
+ const GLint r = cmd->r;
+ const GLint q = cmd->q;
+ CALL_TexCoord4i(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4i(GLint s, GLint t, GLint r, GLint q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4i);
+ struct marshal_cmd_TexCoord4i *cmd;
+ debug_print_marshal("TexCoord4i");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4i, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4i");
+ CALL_TexCoord4i(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+
+
+/* ObjectPurgeableAPPLE: marshalled synchronously */
+static GLenum GLAPIENTRY
+_mesa_marshal_ObjectPurgeableAPPLE(GLenum objectType, GLuint name, GLenum option)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ObjectPurgeableAPPLE");
+ return CALL_ObjectPurgeableAPPLE(ctx->CurrentServerDispatch, (objectType, name, option));
+}
+
+
+/* ProgramUniform1ui64vARB: marshalled asynchronously */
+struct marshal_cmd_ProgramUniform1ui64vARB
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 8) bytes are GLuint64 value[count] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniform1ui64vARB(struct gl_context *ctx, const struct marshal_cmd_ProgramUniform1ui64vARB *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLuint64 * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLuint64 *) variable_data;
+ variable_data += count * 8;
+ CALL_ProgramUniform1ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniform1ui64vARB(GLuint program, GLint location, GLsizei count, const GLuint64 * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniform1ui64vARB) + safe_mul(count, 8);
+ struct marshal_cmd_ProgramUniform1ui64vARB *cmd;
+ debug_print_marshal("ProgramUniform1ui64vARB");
+ if (unlikely(safe_mul(count, 8) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniform1ui64vARB, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 8);
+ variable_data += count * 8;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniform1ui64vARB");
+ CALL_ProgramUniform1ui64vARB(ctx->CurrentServerDispatch, (program, location, count, value));
+}
+
+
+/* TexCoord4d: marshalled asynchronously */
+struct marshal_cmd_TexCoord4d
+{
+ struct marshal_cmd_base cmd_base;
+ GLdouble s;
+ GLdouble t;
+ GLdouble r;
+ GLdouble q;
+};
+static inline void
+_mesa_unmarshal_TexCoord4d(struct gl_context *ctx, const struct marshal_cmd_TexCoord4d *cmd)
+{
+ const GLdouble s = cmd->s;
+ const GLdouble t = cmd->t;
+ const GLdouble r = cmd->r;
+ const GLdouble q = cmd->q;
+ CALL_TexCoord4d(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4d(GLdouble s, GLdouble t, GLdouble r, GLdouble q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4d);
+ struct marshal_cmd_TexCoord4d *cmd;
+ debug_print_marshal("TexCoord4d");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4d, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4d");
+ CALL_TexCoord4d(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+
+
+/* TexCoord4f: marshalled asynchronously */
+struct marshal_cmd_TexCoord4f
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat s;
+ GLfloat t;
+ GLfloat r;
+ GLfloat q;
+};
+static inline void
+_mesa_unmarshal_TexCoord4f(struct gl_context *ctx, const struct marshal_cmd_TexCoord4f *cmd)
+{
+ const GLfloat s = cmd->s;
+ const GLfloat t = cmd->t;
+ const GLfloat r = cmd->r;
+ const GLfloat q = cmd->q;
+ CALL_TexCoord4f(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+static void GLAPIENTRY
+_mesa_marshal_TexCoord4f(GLfloat s, GLfloat t, GLfloat r, GLfloat q)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_TexCoord4f);
+ struct marshal_cmd_TexCoord4f *cmd;
+ debug_print_marshal("TexCoord4f");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_TexCoord4f, cmd_size);
+ cmd->s = s;
+ cmd->t = t;
+ cmd->r = r;
+ cmd->q = q;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("TexCoord4f");
+ CALL_TexCoord4f(ctx->CurrentServerDispatch, (s, t, r, q));
+}
+
+
+/* GetBooleanv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetBooleanv(GLenum pname, GLboolean * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetBooleanv");
+ CALL_GetBooleanv(ctx->CurrentServerDispatch, (pname, params));
+}
+
+
+/* ProgramUniformMatrix3dv: marshalled asynchronously */
+struct marshal_cmd_ProgramUniformMatrix3dv
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint program;
+ GLint location;
+ GLsizei count;
+ GLboolean transpose;
+ /* Next safe_mul(count, 72) bytes are GLdouble value[count][9] */
+};
+static inline void
+_mesa_unmarshal_ProgramUniformMatrix3dv(struct gl_context *ctx, const struct marshal_cmd_ProgramUniformMatrix3dv *cmd)
+{
+ const GLuint program = cmd->program;
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLboolean transpose = cmd->transpose;
+ const GLdouble * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLdouble *) variable_data;
+ variable_data += count * 72;
+ CALL_ProgramUniformMatrix3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_ProgramUniformMatrix3dv(GLuint program, GLint location, GLsizei count, GLboolean transpose, const GLdouble * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_ProgramUniformMatrix3dv) + safe_mul(count, 72);
+ struct marshal_cmd_ProgramUniformMatrix3dv *cmd;
+ debug_print_marshal("ProgramUniformMatrix3dv");
+ if (unlikely(safe_mul(count, 72) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_ProgramUniformMatrix3dv, cmd_size);
+ cmd->program = program;
+ cmd->location = location;
+ cmd->count = count;
+ cmd->transpose = transpose;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 72);
+ variable_data += count * 72;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("ProgramUniformMatrix3dv");
+ CALL_ProgramUniformMatrix3dv(ctx->CurrentServerDispatch, (program, location, count, transpose, value));
+}
+
+
+/* LockArraysEXT: marshalled asynchronously */
+struct marshal_cmd_LockArraysEXT
+{
+ struct marshal_cmd_base cmd_base;
+ GLint first;
+ GLsizei count;
+};
+static inline void
+_mesa_unmarshal_LockArraysEXT(struct gl_context *ctx, const struct marshal_cmd_LockArraysEXT *cmd)
+{
+ const GLint first = cmd->first;
+ const GLsizei count = cmd->count;
+ CALL_LockArraysEXT(ctx->CurrentServerDispatch, (first, count));
+}
+static void GLAPIENTRY
+_mesa_marshal_LockArraysEXT(GLint first, GLsizei count)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_LockArraysEXT);
+ struct marshal_cmd_LockArraysEXT *cmd;
+ debug_print_marshal("LockArraysEXT");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_LockArraysEXT, cmd_size);
+ cmd->first = first;
+ cmd->count = count;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("LockArraysEXT");
+ CALL_LockArraysEXT(ctx->CurrentServerDispatch, (first, count));
+}
+
+
+/* GetActiveUniformBlockiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetActiveUniformBlockiv(GLuint program, GLuint uniformBlockIndex, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetActiveUniformBlockiv");
+ CALL_GetActiveUniformBlockiv(ctx->CurrentServerDispatch, (program, uniformBlockIndex, pname, params));
+}
+
+
+/* GetPerfMonitorCountersAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorCountersAMD(GLuint group, GLint * numCounters, GLint * maxActiveCounters, GLsizei countersSize, GLuint * counters)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorCountersAMD");
+ CALL_GetPerfMonitorCountersAMD(ctx->CurrentServerDispatch, (group, numCounters, maxActiveCounters, countersSize, counters));
+}
+
+
+/* ObjectPtrLabel: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_ObjectPtrLabel(const GLvoid * ptr, GLsizei length, const GLchar * label)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("ObjectPtrLabel");
+ CALL_ObjectPtrLabel(ctx->CurrentServerDispatch, (ptr, length, label));
+}
+
+
+/* Rectfv: marshalled asynchronously */
+struct marshal_cmd_Rectfv
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat v1[2];
+ GLfloat v2[2];
+};
+static inline void
+_mesa_unmarshal_Rectfv(struct gl_context *ctx, const struct marshal_cmd_Rectfv *cmd)
+{
+ const GLfloat * v1 = cmd->v1;
+ const GLfloat * v2 = cmd->v2;
+ CALL_Rectfv(ctx->CurrentServerDispatch, (v1, v2));
+}
+static void GLAPIENTRY
+_mesa_marshal_Rectfv(const GLfloat * v1, const GLfloat * v2)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Rectfv);
+ struct marshal_cmd_Rectfv *cmd;
+ debug_print_marshal("Rectfv");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Rectfv, cmd_size);
+ memcpy(cmd->v1, v1, 8);
+ memcpy(cmd->v2, v2, 8);
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Rectfv");
+ CALL_Rectfv(ctx->CurrentServerDispatch, (v1, v2));
+}
+
+
+/* BindImageTexture: marshalled asynchronously */
+struct marshal_cmd_BindImageTexture
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint unit;
+ GLuint texture;
+ GLint level;
+ GLboolean layered;
+ GLint layer;
+ GLenum access;
+ GLenum format;
+};
+static inline void
+_mesa_unmarshal_BindImageTexture(struct gl_context *ctx, const struct marshal_cmd_BindImageTexture *cmd)
+{
+ const GLuint unit = cmd->unit;
+ const GLuint texture = cmd->texture;
+ const GLint level = cmd->level;
+ const GLboolean layered = cmd->layered;
+ const GLint layer = cmd->layer;
+ const GLenum access = cmd->access;
+ const GLenum format = cmd->format;
+ CALL_BindImageTexture(ctx->CurrentServerDispatch, (unit, texture, level, layered, layer, access, format));
+}
+static void GLAPIENTRY
+_mesa_marshal_BindImageTexture(GLuint unit, GLuint texture, GLint level, GLboolean layered, GLint layer, GLenum access, GLenum format)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_BindImageTexture);
+ struct marshal_cmd_BindImageTexture *cmd;
+ debug_print_marshal("BindImageTexture");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_BindImageTexture, cmd_size);
+ cmd->unit = unit;
+ cmd->texture = texture;
+ cmd->level = level;
+ cmd->layered = layered;
+ cmd->layer = layer;
+ cmd->access = access;
+ cmd->format = format;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("BindImageTexture");
+ CALL_BindImageTexture(ctx->CurrentServerDispatch, (unit, texture, level, layered, layer, access, format));
+}
+
+
+/* VertexP4uiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_VertexP4uiv(GLenum type, const GLuint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("VertexP4uiv");
+ CALL_VertexP4uiv(ctx->CurrentServerDispatch, (type, value));
+}
+
+
+/* GetUniformSubroutineuiv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetUniformSubroutineuiv(GLenum shadertype, GLint location, GLuint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetUniformSubroutineuiv");
+ CALL_GetUniformSubroutineuiv(ctx->CurrentServerDispatch, (shadertype, location, params));
+}
+
+
+/* MinSampleShading: marshalled asynchronously */
+struct marshal_cmd_MinSampleShading
+{
+ struct marshal_cmd_base cmd_base;
+ GLfloat value;
+};
+static inline void
+_mesa_unmarshal_MinSampleShading(struct gl_context *ctx, const struct marshal_cmd_MinSampleShading *cmd)
+{
+ const GLfloat value = cmd->value;
+ CALL_MinSampleShading(ctx->CurrentServerDispatch, (value));
+}
+static void GLAPIENTRY
+_mesa_marshal_MinSampleShading(GLfloat value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_MinSampleShading);
+ struct marshal_cmd_MinSampleShading *cmd;
+ debug_print_marshal("MinSampleShading");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_MinSampleShading, cmd_size);
+ cmd->value = value;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("MinSampleShading");
+ CALL_MinSampleShading(ctx->CurrentServerDispatch, (value));
+}
+
+
+/* GetRenderbufferParameteriv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetRenderbufferParameteriv(GLenum target, GLenum pname, GLint * params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetRenderbufferParameteriv");
+ CALL_GetRenderbufferParameteriv(ctx->CurrentServerDispatch, (target, pname, params));
+}
+
+
+/* VertexAttrib1dNV: marshalled asynchronously */
+struct marshal_cmd_VertexAttrib1dNV
+{
+ struct marshal_cmd_base cmd_base;
+ GLuint index;
+ GLdouble x;
+};
+static inline void
+_mesa_unmarshal_VertexAttrib1dNV(struct gl_context *ctx, const struct marshal_cmd_VertexAttrib1dNV *cmd)
+{
+ const GLuint index = cmd->index;
+ const GLdouble x = cmd->x;
+ CALL_VertexAttrib1dNV(ctx->CurrentServerDispatch, (index, x));
+}
+static void GLAPIENTRY
+_mesa_marshal_VertexAttrib1dNV(GLuint index, GLdouble x)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_VertexAttrib1dNV);
+ struct marshal_cmd_VertexAttrib1dNV *cmd;
+ debug_print_marshal("VertexAttrib1dNV");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_VertexAttrib1dNV, cmd_size);
+ cmd->index = index;
+ cmd->x = x;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("VertexAttrib1dNV");
+ CALL_VertexAttrib1dNV(ctx->CurrentServerDispatch, (index, x));
+}
+
+
+/* WindowPos2sv: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_WindowPos2sv(const GLshort * v)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("WindowPos2sv");
+ CALL_WindowPos2sv(ctx->CurrentServerDispatch, (v));
+}
+
+
+/* GetPerfMonitorCounterStringAMD: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_GetPerfMonitorCounterStringAMD(GLuint group, GLuint counter, GLsizei bufSize, GLsizei * length, GLchar * counterString)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("GetPerfMonitorCounterStringAMD");
+ CALL_GetPerfMonitorCounterStringAMD(ctx->CurrentServerDispatch, (group, counter, bufSize, length, counterString));
+}
+
+
+/* EndFragmentShaderATI: marshalled asynchronously */
+struct marshal_cmd_EndFragmentShaderATI
+{
+ struct marshal_cmd_base cmd_base;
+};
+static inline void
+_mesa_unmarshal_EndFragmentShaderATI(struct gl_context *ctx, const struct marshal_cmd_EndFragmentShaderATI *cmd)
+{
+ CALL_EndFragmentShaderATI(ctx->CurrentServerDispatch, ());
+}
+static void GLAPIENTRY
+_mesa_marshal_EndFragmentShaderATI(void)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_EndFragmentShaderATI);
+ struct marshal_cmd_EndFragmentShaderATI *cmd;
+ debug_print_marshal("EndFragmentShaderATI");
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_EndFragmentShaderATI, cmd_size);
+ (void) cmd;
+
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("EndFragmentShaderATI");
+ CALL_EndFragmentShaderATI(ctx->CurrentServerDispatch, ());
+}
+
+
+/* Uniform4iv: marshalled asynchronously */
+struct marshal_cmd_Uniform4iv
+{
+ struct marshal_cmd_base cmd_base;
+ GLint location;
+ GLsizei count;
+ /* Next safe_mul(count, 16) bytes are GLint value[count][4] */
+};
+static inline void
+_mesa_unmarshal_Uniform4iv(struct gl_context *ctx, const struct marshal_cmd_Uniform4iv *cmd)
+{
+ const GLint location = cmd->location;
+ const GLsizei count = cmd->count;
+ const GLint * value;
+ const char *variable_data = (const char *) (cmd + 1);
+ value = (const GLint *) variable_data;
+ variable_data += count * 16;
+ CALL_Uniform4iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+static void GLAPIENTRY
+_mesa_marshal_Uniform4iv(GLint location, GLsizei count, const GLint * value)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ size_t cmd_size = sizeof(struct marshal_cmd_Uniform4iv) + safe_mul(count, 16);
+ struct marshal_cmd_Uniform4iv *cmd;
+ debug_print_marshal("Uniform4iv");
+ if (unlikely(safe_mul(count, 16) < 0)) {
+ goto fallback_to_sync;
+ }
+ if (cmd_size <= MARSHAL_MAX_CMD_SIZE) {
+ cmd = _mesa_glthread_allocate_command(ctx, DISPATCH_CMD_Uniform4iv, cmd_size);
+ cmd->location = location;
+ cmd->count = count;
+ char *variable_data = (char *) (cmd + 1);
+ memcpy(variable_data, value, count * 16);
+ variable_data += count * 16;
+ _mesa_post_marshal_hook(ctx);
+ return;
+ }
+
+fallback_to_sync:
+ _mesa_glthread_finish(ctx);
+ debug_print_sync_fallback("Uniform4iv");
+ CALL_Uniform4iv(ctx->CurrentServerDispatch, (location, count, value));
+}
+
+
+/* CreateMemoryObjectsEXT: marshalled synchronously */
+static void GLAPIENTRY
+_mesa_marshal_CreateMemoryObjectsEXT(GLsizei n, GLuint * memoryObjects)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ _mesa_glthread_finish(ctx);
+ debug_print_sync("CreateMemoryObjectsEXT");
+ CALL_CreateMemoryObjectsEXT(ctx->CurrentServerDispatch, (n, memoryObjects));
+}
+
+
+size_t
+_mesa_unmarshal_dispatch_cmd(struct gl_context *ctx, const void *cmd)
+{
+ const struct marshal_cmd_base *cmd_base = cmd;
+ switch (cmd_base->cmd_id) {
+ case DISPATCH_CMD_MapGrid1d:
+ debug_print_unmarshal("MapGrid1d");
+ _mesa_unmarshal_MapGrid1d(ctx, (const struct marshal_cmd_MapGrid1d *) cmd);
+ break;
+ case DISPATCH_CMD_MapGrid1f:
+ debug_print_unmarshal("MapGrid1f");
+ _mesa_unmarshal_MapGrid1f(ctx, (const struct marshal_cmd_MapGrid1f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3i64vARB:
+ debug_print_unmarshal("ProgramUniform3i64vARB");
+ _mesa_unmarshal_ProgramUniform3i64vARB(ctx, (const struct marshal_cmd_ProgramUniform3i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordP1ui:
+ debug_print_unmarshal("TexCoordP1ui");
+ _mesa_unmarshal_TexCoordP1ui(ctx, (const struct marshal_cmd_TexCoordP1ui *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1dv:
+ debug_print_unmarshal("MultiTexCoord1dv");
+ _mesa_unmarshal_MultiTexCoord1dv(ctx, (const struct marshal_cmd_MultiTexCoord1dv *) cmd);
+ break;
+ case DISPATCH_CMD_AttachShader:
+ debug_print_unmarshal("AttachShader");
+ _mesa_unmarshal_AttachShader(ctx, (const struct marshal_cmd_AttachShader *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3fARB:
+ debug_print_unmarshal("VertexAttrib3fARB");
+ _mesa_unmarshal_VertexAttrib3fARB(ctx, (const struct marshal_cmd_VertexAttrib3fARB *) cmd);
+ break;
+ case DISPATCH_CMD_Indexubv:
+ debug_print_unmarshal("Indexubv");
+ _mesa_unmarshal_Indexubv(ctx, (const struct marshal_cmd_Indexubv *) cmd);
+ break;
+ case DISPATCH_CMD_Color3ubv:
+ debug_print_unmarshal("Color3ubv");
+ _mesa_unmarshal_Color3ubv(ctx, (const struct marshal_cmd_Color3ubv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2ui:
+ debug_print_unmarshal("ProgramUniform2ui");
+ _mesa_unmarshal_ProgramUniform2ui(ctx, (const struct marshal_cmd_ProgramUniform2ui *) cmd);
+ break;
+ case DISPATCH_CMD_RenderbufferStorage:
+ debug_print_unmarshal("RenderbufferStorage");
+ _mesa_unmarshal_RenderbufferStorage(ctx, (const struct marshal_cmd_RenderbufferStorage *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3i:
+ debug_print_unmarshal("Uniform3i");
+ _mesa_unmarshal_Uniform3i(ctx, (const struct marshal_cmd_Uniform3i *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3d:
+ debug_print_unmarshal("Uniform3d");
+ _mesa_unmarshal_Uniform3d(ctx, (const struct marshal_cmd_Uniform3d *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3f:
+ debug_print_unmarshal("Uniform3f");
+ _mesa_unmarshal_Uniform3f(ctx, (const struct marshal_cmd_Uniform3f *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2x4fv:
+ debug_print_unmarshal("UniformMatrix2x4fv");
+ _mesa_unmarshal_UniformMatrix2x4fv(ctx, (const struct marshal_cmd_UniformMatrix2x4fv *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3iv:
+ debug_print_unmarshal("Normal3iv");
+ _mesa_unmarshal_Normal3iv(ctx, (const struct marshal_cmd_Normal3iv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexiOES:
+ debug_print_unmarshal("DrawTexiOES");
+ _mesa_unmarshal_DrawTexiOES(ctx, (const struct marshal_cmd_DrawTexiOES *) cmd);
+ break;
+ case DISPATCH_CMD_Viewport:
+ debug_print_unmarshal("Viewport");
+ _mesa_unmarshal_Viewport(ctx, (const struct marshal_cmd_Viewport *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteVertexArrays:
+ debug_print_unmarshal("DeleteVertexArrays");
+ _mesa_unmarshal_DeleteVertexArrays(ctx, (const struct marshal_cmd_DeleteVertexArrays *) cmd);
+ break;
+ case DISPATCH_CMD_ClearColorIuiEXT:
+ debug_print_unmarshal("ClearColorIuiEXT");
+ _mesa_unmarshal_ClearColorIuiEXT(ctx, (const struct marshal_cmd_ClearColorIuiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_PolygonOffsetx:
+ debug_print_unmarshal("PolygonOffsetx");
+ _mesa_unmarshal_PolygonOffsetx(ctx, (const struct marshal_cmd_PolygonOffsetx *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRangeIndexedfOES:
+ debug_print_unmarshal("DepthRangeIndexedfOES");
+ _mesa_unmarshal_DepthRangeIndexedfOES(ctx, (const struct marshal_cmd_DepthRangeIndexedfOES *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4usv:
+ debug_print_unmarshal("VertexAttrib4usv");
+ _mesa_unmarshal_VertexAttrib4usv(ctx, (const struct marshal_cmd_VertexAttrib4usv *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage1DEXT:
+ debug_print_unmarshal("TextureStorage1DEXT");
+ _mesa_unmarshal_TextureStorage1DEXT(ctx, (const struct marshal_cmd_TextureStorage1DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nub:
+ debug_print_unmarshal("VertexAttrib4Nub");
+ _mesa_unmarshal_VertexAttrib4Nub(ctx, (const struct marshal_cmd_VertexAttrib4Nub *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribP3ui:
+ debug_print_unmarshal("VertexAttribP3ui");
+ _mesa_unmarshal_VertexAttribP3ui(ctx, (const struct marshal_cmd_VertexAttribP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_PointSize:
+ debug_print_unmarshal("PointSize");
+ _mesa_unmarshal_PointSize(ctx, (const struct marshal_cmd_PointSize *) cmd);
+ break;
+ case DISPATCH_CMD_PopName:
+ debug_print_unmarshal("PopName");
+ _mesa_unmarshal_PopName(ctx, (const struct marshal_cmd_PopName *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferTexture:
+ debug_print_unmarshal("FramebufferTexture");
+ _mesa_unmarshal_FramebufferTexture(ctx, (const struct marshal_cmd_FramebufferTexture *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4ubNV:
+ debug_print_unmarshal("VertexAttrib4ubNV");
+ _mesa_unmarshal_VertexAttrib4ubNV(ctx, (const struct marshal_cmd_VertexAttrib4ubNV *) cmd);
+ break;
+ case DISPATCH_CMD_ValidateProgramPipeline:
+ debug_print_unmarshal("ValidateProgramPipeline");
+ _mesa_unmarshal_ValidateProgramPipeline(ctx, (const struct marshal_cmd_ValidateProgramPipeline *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs3dvNV:
+ debug_print_unmarshal("VertexAttribs3dvNV");
+ _mesa_unmarshal_VertexAttribs3dvNV(ctx, (const struct marshal_cmd_VertexAttribs3dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2x4dv:
+ debug_print_unmarshal("ProgramUniformMatrix2x4dv");
+ _mesa_unmarshal_ProgramUniformMatrix2x4dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2x4dv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4iv:
+ debug_print_unmarshal("ProgramUniform4iv");
+ _mesa_unmarshal_ProgramUniform4iv(ctx, (const struct marshal_cmd_ProgramUniform4iv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2iv:
+ debug_print_unmarshal("TexCoord2iv");
+ _mesa_unmarshal_TexCoord2iv(ctx, (const struct marshal_cmd_TexCoord2iv *) cmd);
+ break;
+ case DISPATCH_CMD_TexImage2DMultisample:
+ debug_print_unmarshal("TexImage2DMultisample");
+ _mesa_unmarshal_TexImage2DMultisample(ctx, (const struct marshal_cmd_TexImage2DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_TexParameterx:
+ debug_print_unmarshal("TexParameterx");
+ _mesa_unmarshal_TexParameterx(ctx, (const struct marshal_cmd_TexParameterx *) cmd);
+ break;
+ case DISPATCH_CMD_Rotatef:
+ debug_print_unmarshal("Rotatef");
+ _mesa_unmarshal_Rotatef(ctx, (const struct marshal_cmd_Rotatef *) cmd);
+ break;
+ case DISPATCH_CMD_TexParameterf:
+ debug_print_unmarshal("TexParameterf");
+ _mesa_unmarshal_TexParameterf(ctx, (const struct marshal_cmd_TexParameterf *) cmd);
+ break;
+ case DISPATCH_CMD_TexParameteri:
+ debug_print_unmarshal("TexParameteri");
+ _mesa_unmarshal_TexParameteri(ctx, (const struct marshal_cmd_TexParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_VDPAUFiniNV:
+ debug_print_unmarshal("VDPAUFiniNV");
+ _mesa_unmarshal_VDPAUFiniNV(ctx, (const struct marshal_cmd_VDPAUFiniNV *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4x2fv:
+ debug_print_unmarshal("ProgramUniformMatrix4x2fv");
+ _mesa_unmarshal_ProgramUniformMatrix4x2fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4x2fv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2f:
+ debug_print_unmarshal("ProgramUniform2f");
+ _mesa_unmarshal_ProgramUniform2f(ctx, (const struct marshal_cmd_ProgramUniform2f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2d:
+ debug_print_unmarshal("ProgramUniform2d");
+ _mesa_unmarshal_ProgramUniform2d(ctx, (const struct marshal_cmd_ProgramUniform2d *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2i:
+ debug_print_unmarshal("ProgramUniform2i");
+ _mesa_unmarshal_ProgramUniform2i(ctx, (const struct marshal_cmd_ProgramUniform2i *) cmd);
+ break;
+ case DISPATCH_CMD_Fogx:
+ debug_print_unmarshal("Fogx");
+ _mesa_unmarshal_Fogx(ctx, (const struct marshal_cmd_Fogx *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3ui64ARB:
+ debug_print_unmarshal("Uniform3ui64ARB");
+ _mesa_unmarshal_Uniform3ui64ARB(ctx, (const struct marshal_cmd_Uniform3ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_Fogf:
+ debug_print_unmarshal("Fogf");
+ _mesa_unmarshal_Fogf(ctx, (const struct marshal_cmd_Fogf *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3ui64vARB:
+ debug_print_unmarshal("ProgramUniform3ui64vARB");
+ _mesa_unmarshal_ProgramUniform3ui64vARB(ctx, (const struct marshal_cmd_ProgramUniform3ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_Color4usv:
+ debug_print_unmarshal("Color4usv");
+ _mesa_unmarshal_Color4usv(ctx, (const struct marshal_cmd_Color4usv *) cmd);
+ break;
+ case DISPATCH_CMD_Fogi:
+ debug_print_unmarshal("Fogi");
+ _mesa_unmarshal_Fogi(ctx, (const struct marshal_cmd_Fogi *) cmd);
+ break;
+ case DISPATCH_CMD_DepthFunc:
+ debug_print_unmarshal("DepthFunc");
+ _mesa_unmarshal_DepthFunc(ctx, (const struct marshal_cmd_DepthFunc *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayAttribLFormat:
+ debug_print_unmarshal("VertexArrayAttribLFormat");
+ _mesa_unmarshal_VertexArrayAttribLFormat(ctx, (const struct marshal_cmd_VertexArrayAttribLFormat *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI4uiEXT:
+ debug_print_unmarshal("VertexAttribI4uiEXT");
+ _mesa_unmarshal_VertexAttribI4uiEXT(ctx, (const struct marshal_cmd_VertexAttribI4uiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElementsInstancedBaseVertexBaseInstance:
+ debug_print_unmarshal("DrawElementsInstancedBaseVertexBaseInstance");
+ _mesa_unmarshal_DrawElementsInstancedBaseVertexBaseInstance(ctx, (const struct marshal_cmd_DrawElementsInstancedBaseVertexBaseInstance *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramEnvParameter4dvARB:
+ debug_print_unmarshal("ProgramEnvParameter4dvARB");
+ _mesa_unmarshal_ProgramEnvParameter4dvARB(ctx, (const struct marshal_cmd_ProgramEnvParameter4dvARB *) cmd);
+ break;
+ case DISPATCH_CMD_CopyNamedBufferSubData:
+ debug_print_unmarshal("CopyNamedBufferSubData");
+ _mesa_unmarshal_CopyNamedBufferSubData(ctx, (const struct marshal_cmd_CopyNamedBufferSubData *) cmd);
+ break;
+ case DISPATCH_CMD_BindSampler:
+ debug_print_unmarshal("BindSampler");
+ _mesa_unmarshal_BindSampler(ctx, (const struct marshal_cmd_BindSampler *) cmd);
+ break;
+ case DISPATCH_CMD_GetQueryBufferObjectuiv:
+ debug_print_unmarshal("GetQueryBufferObjectuiv");
+ _mesa_unmarshal_GetQueryBufferObjectuiv(ctx, (const struct marshal_cmd_GetQueryBufferObjectuiv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2fARB:
+ debug_print_unmarshal("MultiTexCoord2fARB");
+ _mesa_unmarshal_MultiTexCoord2fARB(ctx, (const struct marshal_cmd_MultiTexCoord2fARB *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1ui64ARB:
+ debug_print_unmarshal("Uniform1ui64ARB");
+ _mesa_unmarshal_Uniform1ui64ARB(ctx, (const struct marshal_cmd_Uniform1ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3iv:
+ debug_print_unmarshal("MultiTexCoord3iv");
+ _mesa_unmarshal_MultiTexCoord3iv(ctx, (const struct marshal_cmd_MultiTexCoord3iv *) cmd);
+ break;
+ case DISPATCH_CMD_ClearStencil:
+ debug_print_unmarshal("ClearStencil");
+ _mesa_unmarshal_ClearStencil(ctx, (const struct marshal_cmd_ClearStencil *) cmd);
+ break;
+ case DISPATCH_CMD_ClearColorIiEXT:
+ debug_print_unmarshal("ClearColorIiEXT");
+ _mesa_unmarshal_ClearColorIiEXT(ctx, (const struct marshal_cmd_ClearColorIiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_LoadMatrixd:
+ debug_print_unmarshal("LoadMatrixd");
+ _mesa_unmarshal_LoadMatrixd(ctx, (const struct marshal_cmd_LoadMatrixd *) cmd);
+ break;
+ case DISPATCH_CMD_VertexP4ui:
+ debug_print_unmarshal("VertexP4ui");
+ _mesa_unmarshal_VertexP4ui(ctx, (const struct marshal_cmd_VertexP4ui *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage3DMultisample:
+ debug_print_unmarshal("TextureStorage3DMultisample");
+ _mesa_unmarshal_TextureStorage3DMultisample(ctx, (const struct marshal_cmd_TextureStorage3DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_ReleaseShaderCompiler:
+ debug_print_unmarshal("ReleaseShaderCompiler");
+ _mesa_unmarshal_ReleaseShaderCompiler(ctx, (const struct marshal_cmd_ReleaseShaderCompiler *) cmd);
+ break;
+ case DISPATCH_CMD_BlendFuncSeparate:
+ debug_print_unmarshal("BlendFuncSeparate");
+ _mesa_unmarshal_BlendFuncSeparate(ctx, (const struct marshal_cmd_BlendFuncSeparate *) cmd);
+ break;
+ case DISPATCH_CMD_Color3us:
+ debug_print_unmarshal("Color3us");
+ _mesa_unmarshal_Color3us(ctx, (const struct marshal_cmd_Color3us *) cmd);
+ break;
+ case DISPATCH_CMD_LoadMatrixx:
+ debug_print_unmarshal("LoadMatrixx");
+ _mesa_unmarshal_LoadMatrixx(ctx, (const struct marshal_cmd_LoadMatrixx *) cmd);
+ break;
+ case DISPATCH_CMD_Color3ub:
+ debug_print_unmarshal("Color3ub");
+ _mesa_unmarshal_Color3ub(ctx, (const struct marshal_cmd_Color3ub *) cmd);
+ break;
+ case DISPATCH_CMD_Color3ui:
+ debug_print_unmarshal("Color3ui");
+ _mesa_unmarshal_Color3ui(ctx, (const struct marshal_cmd_Color3ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4dvNV:
+ debug_print_unmarshal("VertexAttrib4dvNV");
+ _mesa_unmarshal_VertexAttrib4dvNV(ctx, (const struct marshal_cmd_VertexAttrib4dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_AlphaFragmentOp2ATI:
+ debug_print_unmarshal("AlphaFragmentOp2ATI");
+ _mesa_unmarshal_AlphaFragmentOp2ATI(ctx, (const struct marshal_cmd_AlphaFragmentOp2ATI *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4dv:
+ debug_print_unmarshal("RasterPos4dv");
+ _mesa_unmarshal_RasterPos4dv(ctx, (const struct marshal_cmd_RasterPos4dv *) cmd);
+ break;
+ case DISPATCH_CMD_LineWidthx:
+ debug_print_unmarshal("LineWidthx");
+ _mesa_unmarshal_LineWidthx(ctx, (const struct marshal_cmd_LineWidthx *) cmd);
+ break;
+ case DISPATCH_CMD_Indexdv:
+ debug_print_unmarshal("Indexdv");
+ _mesa_unmarshal_Indexdv(ctx, (const struct marshal_cmd_Indexdv *) cmd);
+ break;
+ case DISPATCH_CMD_DepthMask:
+ debug_print_unmarshal("DepthMask");
+ _mesa_unmarshal_DepthMask(ctx, (const struct marshal_cmd_DepthMask *) cmd);
+ break;
+ case DISPATCH_CMD_BindFragmentShaderATI:
+ debug_print_unmarshal("BindFragmentShaderATI");
+ _mesa_unmarshal_BindFragmentShaderATI(ctx, (const struct marshal_cmd_BindFragmentShaderATI *) cmd);
+ break;
+ case DISPATCH_CMD_BlendFuncSeparateiARB:
+ debug_print_unmarshal("BlendFuncSeparateiARB");
+ _mesa_unmarshal_BlendFuncSeparateiARB(ctx, (const struct marshal_cmd_BlendFuncSeparateiARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexPointer:
+ debug_print_unmarshal("VertexPointer");
+ _mesa_unmarshal_VertexPointer(ctx, (const struct marshal_cmd_VertexPointer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramLocalParameter4dvARB:
+ debug_print_unmarshal("ProgramLocalParameter4dvARB");
+ _mesa_unmarshal_ProgramLocalParameter4dvARB(ctx, (const struct marshal_cmd_ProgramLocalParameter4dvARB *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2dv:
+ debug_print_unmarshal("UniformMatrix2dv");
+ _mesa_unmarshal_UniformMatrix2dv(ctx, (const struct marshal_cmd_UniformMatrix2dv *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3x2dv:
+ debug_print_unmarshal("UniformMatrix3x2dv");
+ _mesa_unmarshal_UniformMatrix3x2dv(ctx, (const struct marshal_cmd_UniformMatrix3x2dv *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos4fMESA:
+ debug_print_unmarshal("WindowPos4fMESA");
+ _mesa_unmarshal_WindowPos4fMESA(ctx, (const struct marshal_cmd_WindowPos4fMESA *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs2fvNV:
+ debug_print_unmarshal("VertexAttribs2fvNV");
+ _mesa_unmarshal_VertexAttribs2fvNV(ctx, (const struct marshal_cmd_VertexAttribs2fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribP4ui:
+ debug_print_unmarshal("VertexAttribP4ui");
+ _mesa_unmarshal_VertexAttribP4ui(ctx, (const struct marshal_cmd_VertexAttribP4ui *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4i:
+ debug_print_unmarshal("Uniform4i");
+ _mesa_unmarshal_Uniform4i(ctx, (const struct marshal_cmd_Uniform4i *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4d:
+ debug_print_unmarshal("Uniform4d");
+ _mesa_unmarshal_Uniform4d(ctx, (const struct marshal_cmd_Uniform4d *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4f:
+ debug_print_unmarshal("Uniform4f");
+ _mesa_unmarshal_Uniform4f(ctx, (const struct marshal_cmd_Uniform4f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3dv:
+ debug_print_unmarshal("ProgramUniform3dv");
+ _mesa_unmarshal_ProgramUniform3dv(ctx, (const struct marshal_cmd_ProgramUniform3dv *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferTexture:
+ debug_print_unmarshal("NamedFramebufferTexture");
+ _mesa_unmarshal_NamedFramebufferTexture(ctx, (const struct marshal_cmd_NamedFramebufferTexture *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3d:
+ debug_print_unmarshal("ProgramUniform3d");
+ _mesa_unmarshal_ProgramUniform3d(ctx, (const struct marshal_cmd_ProgramUniform3d *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3f:
+ debug_print_unmarshal("ProgramUniform3f");
+ _mesa_unmarshal_ProgramUniform3f(ctx, (const struct marshal_cmd_ProgramUniform3f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3i:
+ debug_print_unmarshal("ProgramUniform3i");
+ _mesa_unmarshal_ProgramUniform3i(ctx, (const struct marshal_cmd_ProgramUniform3i *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3s:
+ debug_print_unmarshal("SecondaryColor3s");
+ _mesa_unmarshal_SecondaryColor3s(ctx, (const struct marshal_cmd_SecondaryColor3s *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorageMem2DEXT:
+ debug_print_unmarshal("TexStorageMem2DEXT");
+ _mesa_unmarshal_TexStorageMem2DEXT(ctx, (const struct marshal_cmd_TexStorageMem2DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3x4dv:
+ debug_print_unmarshal("UniformMatrix3x4dv");
+ _mesa_unmarshal_UniformMatrix3x4dv(ctx, (const struct marshal_cmd_UniformMatrix3x4dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3fNV:
+ debug_print_unmarshal("VertexAttrib3fNV");
+ _mesa_unmarshal_VertexAttrib3fNV(ctx, (const struct marshal_cmd_VertexAttrib3fNV *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3b:
+ debug_print_unmarshal("SecondaryColor3b");
+ _mesa_unmarshal_SecondaryColor3b(ctx, (const struct marshal_cmd_SecondaryColor3b *) cmd);
+ break;
+ case DISPATCH_CMD_EnableClientState:
+ debug_print_unmarshal("EnableClientState");
+ _mesa_unmarshal_EnableClientState(ctx, (const struct marshal_cmd_EnableClientState *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3i:
+ debug_print_unmarshal("SecondaryColor3i");
+ _mesa_unmarshal_SecondaryColor3i(ctx, (const struct marshal_cmd_SecondaryColor3i *) cmd);
+ break;
+ case DISPATCH_CMD_FlushMappedBufferRange:
+ debug_print_unmarshal("FlushMappedBufferRange");
+ _mesa_unmarshal_FlushMappedBufferRange(ctx, (const struct marshal_cmd_FlushMappedBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorageMem3DEXT:
+ debug_print_unmarshal("TexStorageMem3DEXT");
+ _mesa_unmarshal_TexStorageMem3DEXT(ctx, (const struct marshal_cmd_TexStorageMem3DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_EndPerfMonitorAMD:
+ debug_print_unmarshal("EndPerfMonitorAMD");
+ _mesa_unmarshal_EndPerfMonitorAMD(ctx, (const struct marshal_cmd_EndPerfMonitorAMD *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs4dvNV:
+ debug_print_unmarshal("VertexAttribs4dvNV");
+ _mesa_unmarshal_VertexAttribs4dvNV(ctx, (const struct marshal_cmd_VertexAttribs4dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2i64vARB:
+ debug_print_unmarshal("Uniform2i64vARB");
+ _mesa_unmarshal_Uniform2i64vARB(ctx, (const struct marshal_cmd_Uniform2i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_Rectdv:
+ debug_print_unmarshal("Rectdv");
+ _mesa_unmarshal_Rectdv(ctx, (const struct marshal_cmd_Rectdv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawArraysInstancedARB:
+ debug_print_unmarshal("DrawArraysInstancedARB");
+ _mesa_unmarshal_DrawArraysInstancedARB(ctx, (const struct marshal_cmd_DrawArraysInstancedARB *) cmd);
+ break;
+ case DISPATCH_CMD_MakeImageHandleNonResidentARB:
+ debug_print_unmarshal("MakeImageHandleNonResidentARB");
+ _mesa_unmarshal_MakeImageHandleNonResidentARB(ctx, (const struct marshal_cmd_MakeImageHandleNonResidentARB *) cmd);
+ break;
+ case DISPATCH_CMD_ImportMemoryFdEXT:
+ debug_print_unmarshal("ImportMemoryFdEXT");
+ _mesa_unmarshal_ImportMemoryFdEXT(ctx, (const struct marshal_cmd_ImportMemoryFdEXT *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorageMem1DEXT:
+ debug_print_unmarshal("TexStorageMem1DEXT");
+ _mesa_unmarshal_TexStorageMem1DEXT(ctx, (const struct marshal_cmd_TexStorageMem1DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_BlendBarrier:
+ debug_print_unmarshal("BlendBarrier");
+ _mesa_unmarshal_BlendBarrier(ctx, (const struct marshal_cmd_BlendBarrier *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2svNV:
+ debug_print_unmarshal("VertexAttrib2svNV");
+ _mesa_unmarshal_VertexAttrib2svNV(ctx, (const struct marshal_cmd_VertexAttrib2svNV *) cmd);
+ break;
+ case DISPATCH_CMD_Disablei:
+ debug_print_unmarshal("Disablei");
+ _mesa_unmarshal_Disablei(ctx, (const struct marshal_cmd_Disablei *) cmd);
+ break;
+ case DISPATCH_CMD_Color3dv:
+ debug_print_unmarshal("Color3dv");
+ _mesa_unmarshal_Color3dv(ctx, (const struct marshal_cmd_Color3dv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1ui64ARB:
+ debug_print_unmarshal("ProgramUniform1ui64ARB");
+ _mesa_unmarshal_ProgramUniform1ui64ARB(ctx, (const struct marshal_cmd_ProgramUniform1ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_BeginQuery:
+ debug_print_unmarshal("BeginQuery");
+ _mesa_unmarshal_BeginQuery(ctx, (const struct marshal_cmd_BeginQuery *) cmd);
+ break;
+ case DISPATCH_CMD_PixelStoref:
+ debug_print_unmarshal("PixelStoref");
+ _mesa_unmarshal_PixelStoref(ctx, (const struct marshal_cmd_PixelStoref *) cmd);
+ break;
+ case DISPATCH_CMD_PixelStorei:
+ debug_print_unmarshal("PixelStorei");
+ _mesa_unmarshal_PixelStorei(ctx, (const struct marshal_cmd_PixelStorei *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs1svNV:
+ debug_print_unmarshal("VertexAttribs1svNV");
+ _mesa_unmarshal_VertexAttribs1svNV(ctx, (const struct marshal_cmd_VertexAttribs1svNV *) cmd);
+ break;
+ case DISPATCH_CMD_DispatchComputeIndirect:
+ debug_print_unmarshal("DispatchComputeIndirect");
+ _mesa_unmarshal_DispatchComputeIndirect(ctx, (const struct marshal_cmd_DispatchComputeIndirect *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateBufferData:
+ debug_print_unmarshal("InvalidateBufferData");
+ _mesa_unmarshal_InvalidateBufferData(ctx, (const struct marshal_cmd_InvalidateBufferData *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1ui64vARB:
+ debug_print_unmarshal("Uniform1ui64vARB");
+ _mesa_unmarshal_Uniform1ui64vARB(ctx, (const struct marshal_cmd_Uniform1ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1svNV:
+ debug_print_unmarshal("VertexAttrib1svNV");
+ _mesa_unmarshal_VertexAttrib1svNV(ctx, (const struct marshal_cmd_VertexAttrib1svNV *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3ubv:
+ debug_print_unmarshal("SecondaryColor3ubv");
+ _mesa_unmarshal_SecondaryColor3ubv(ctx, (const struct marshal_cmd_SecondaryColor3ubv *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4ui64ARB:
+ debug_print_unmarshal("Uniform4ui64ARB");
+ _mesa_unmarshal_Uniform4ui64ARB(ctx, (const struct marshal_cmd_Uniform4ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3fv:
+ debug_print_unmarshal("RasterPos3fv");
+ _mesa_unmarshal_RasterPos3fv(ctx, (const struct marshal_cmd_RasterPos3fv *) cmd);
+ break;
+ case DISPATCH_CMD_BindProgramARB:
+ debug_print_unmarshal("BindProgramARB");
+ _mesa_unmarshal_BindProgramARB(ctx, (const struct marshal_cmd_BindProgramARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3sNV:
+ debug_print_unmarshal("VertexAttrib3sNV");
+ _mesa_unmarshal_VertexAttrib3sNV(ctx, (const struct marshal_cmd_VertexAttrib3sNV *) cmd);
+ break;
+ case DISPATCH_CMD_ColorFragmentOp1ATI:
+ debug_print_unmarshal("ColorFragmentOp1ATI");
+ _mesa_unmarshal_ColorFragmentOp1ATI(ctx, (const struct marshal_cmd_ColorFragmentOp1ATI *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4x3fv:
+ debug_print_unmarshal("ProgramUniformMatrix4x3fv");
+ _mesa_unmarshal_ProgramUniformMatrix4x3fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4x3fv *) cmd);
+ break;
+ case DISPATCH_CMD_PopClientAttrib:
+ debug_print_unmarshal("PopClientAttrib");
+ _mesa_unmarshal_PopClientAttrib(ctx, (const struct marshal_cmd_PopClientAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElementsInstancedARB:
+ debug_print_unmarshal("DrawElementsInstancedARB");
+ _mesa_unmarshal_DrawElementsInstancedARB(ctx, (const struct marshal_cmd_DrawElementsInstancedARB *) cmd);
+ break;
+ case DISPATCH_CMD_DisableVertexArrayAttrib:
+ debug_print_unmarshal("DisableVertexArrayAttrib");
+ _mesa_unmarshal_DisableVertexArrayAttrib(ctx, (const struct marshal_cmd_DisableVertexArrayAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribL4d:
+ debug_print_unmarshal("VertexAttribL4d");
+ _mesa_unmarshal_VertexAttribL4d(ctx, (const struct marshal_cmd_VertexAttribL4d *) cmd);
+ break;
+ case DISPATCH_CMD_ListBase:
+ debug_print_unmarshal("ListBase");
+ _mesa_unmarshal_ListBase(ctx, (const struct marshal_cmd_ListBase *) cmd);
+ break;
+ case DISPATCH_CMD_GenerateMipmap:
+ debug_print_unmarshal("GenerateMipmap");
+ _mesa_unmarshal_GenerateMipmap(ctx, (const struct marshal_cmd_GenerateMipmap *) cmd);
+ break;
+ case DISPATCH_CMD_BindBufferRange:
+ debug_print_unmarshal("BindBufferRange");
+ _mesa_unmarshal_BindBufferRange(ctx, (const struct marshal_cmd_BindBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2x4fv:
+ debug_print_unmarshal("ProgramUniformMatrix2x4fv");
+ _mesa_unmarshal_ProgramUniformMatrix2x4fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2x4fv *) cmd);
+ break;
+ case DISPATCH_CMD_BindBufferBase:
+ debug_print_unmarshal("BindBufferBase");
+ _mesa_unmarshal_BindBufferBase(ctx, (const struct marshal_cmd_BindBufferBase *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2s:
+ debug_print_unmarshal("VertexAttrib2s");
+ _mesa_unmarshal_VertexAttrib2s(ctx, (const struct marshal_cmd_VertexAttrib2s *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3fvEXT:
+ debug_print_unmarshal("SecondaryColor3fvEXT");
+ _mesa_unmarshal_SecondaryColor3fvEXT(ctx, (const struct marshal_cmd_SecondaryColor3fvEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2d:
+ debug_print_unmarshal("VertexAttrib2d");
+ _mesa_unmarshal_VertexAttrib2d(ctx, (const struct marshal_cmd_VertexAttrib2d *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1fv:
+ debug_print_unmarshal("Uniform1fv");
+ _mesa_unmarshal_Uniform1fv(ctx, (const struct marshal_cmd_Uniform1fv *) cmd);
+ break;
+ case DISPATCH_CMD_DepthBoundsEXT:
+ debug_print_unmarshal("DepthBoundsEXT");
+ _mesa_unmarshal_DepthBoundsEXT(ctx, (const struct marshal_cmd_DepthBoundsEXT *) cmd);
+ break;
+ case DISPATCH_CMD_BufferStorageMemEXT:
+ debug_print_unmarshal("BufferStorageMemEXT");
+ _mesa_unmarshal_BufferStorageMemEXT(ctx, (const struct marshal_cmd_BufferStorageMemEXT *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos3fv:
+ debug_print_unmarshal("WindowPos3fv");
+ _mesa_unmarshal_WindowPos3fv(ctx, (const struct marshal_cmd_WindowPos3fv *) cmd);
+ break;
+ case DISPATCH_CMD_NamedRenderbufferStorage:
+ debug_print_unmarshal("NamedRenderbufferStorage");
+ _mesa_unmarshal_NamedRenderbufferStorage(ctx, (const struct marshal_cmd_NamedRenderbufferStorage *) cmd);
+ break;
+ case DISPATCH_CMD_BindRenderbuffer:
+ debug_print_unmarshal("BindRenderbuffer");
+ _mesa_unmarshal_BindRenderbuffer(ctx, (const struct marshal_cmd_BindRenderbuffer *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3fEXT:
+ debug_print_unmarshal("SecondaryColor3fEXT");
+ _mesa_unmarshal_SecondaryColor3fEXT(ctx, (const struct marshal_cmd_SecondaryColor3fEXT *) cmd);
+ break;
+ case DISPATCH_CMD_PrimitiveRestartIndex:
+ debug_print_unmarshal("PrimitiveRestartIndex");
+ _mesa_unmarshal_PrimitiveRestartIndex(ctx, (const struct marshal_cmd_PrimitiveRestartIndex *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorageMem3DEXT:
+ debug_print_unmarshal("TextureStorageMem3DEXT");
+ _mesa_unmarshal_TextureStorageMem3DEXT(ctx, (const struct marshal_cmd_TextureStorageMem3DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ActiveStencilFaceEXT:
+ debug_print_unmarshal("ActiveStencilFaceEXT");
+ _mesa_unmarshal_ActiveStencilFaceEXT(ctx, (const struct marshal_cmd_ActiveStencilFaceEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4dNV:
+ debug_print_unmarshal("VertexAttrib4dNV");
+ _mesa_unmarshal_VertexAttrib4dNV(ctx, (const struct marshal_cmd_VertexAttrib4dNV *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRange:
+ debug_print_unmarshal("DepthRange");
+ _mesa_unmarshal_DepthRange(ctx, (const struct marshal_cmd_DepthRange *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4fNV:
+ debug_print_unmarshal("VertexAttrib4fNV");
+ _mesa_unmarshal_VertexAttrib4fNV(ctx, (const struct marshal_cmd_VertexAttrib4fNV *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4fv:
+ debug_print_unmarshal("Uniform4fv");
+ _mesa_unmarshal_Uniform4fv(ctx, (const struct marshal_cmd_Uniform4fv *) cmd);
+ break;
+ case DISPATCH_CMD_Frustumf:
+ debug_print_unmarshal("Frustumf");
+ _mesa_unmarshal_Frustumf(ctx, (const struct marshal_cmd_Frustumf *) cmd);
+ break;
+ case DISPATCH_CMD_GetQueryBufferObjectui64v:
+ debug_print_unmarshal("GetQueryBufferObjectui64v");
+ _mesa_unmarshal_GetQueryBufferObjectui64v(ctx, (const struct marshal_cmd_GetQueryBufferObjectui64v *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2uiv:
+ debug_print_unmarshal("ProgramUniform2uiv");
+ _mesa_unmarshal_ProgramUniform2uiv(ctx, (const struct marshal_cmd_ProgramUniform2uiv *) cmd);
+ break;
+ case DISPATCH_CMD_Rectsv:
+ debug_print_unmarshal("Rectsv");
+ _mesa_unmarshal_Rectsv(ctx, (const struct marshal_cmd_Rectsv *) cmd);
+ break;
+ case DISPATCH_CMD_Frustumx:
+ debug_print_unmarshal("Frustumx");
+ _mesa_unmarshal_Frustumx(ctx, (const struct marshal_cmd_Frustumx *) cmd);
+ break;
+ case DISPATCH_CMD_CullFace:
+ debug_print_unmarshal("CullFace");
+ _mesa_unmarshal_CullFace(ctx, (const struct marshal_cmd_CullFace *) cmd);
+ break;
+ case DISPATCH_CMD_BindTexture:
+ debug_print_unmarshal("BindTexture");
+ _mesa_unmarshal_BindTexture(ctx, (const struct marshal_cmd_BindTexture *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4fARB:
+ debug_print_unmarshal("MultiTexCoord4fARB");
+ _mesa_unmarshal_MultiTexCoord4fARB(ctx, (const struct marshal_cmd_MultiTexCoord4fARB *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2ui64ARB:
+ debug_print_unmarshal("Uniform2ui64ARB");
+ _mesa_unmarshal_Uniform2ui64ARB(ctx, (const struct marshal_cmd_Uniform2ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_BeginPerfQueryINTEL:
+ debug_print_unmarshal("BeginPerfQueryINTEL");
+ _mesa_unmarshal_BeginPerfQueryINTEL(ctx, (const struct marshal_cmd_BeginPerfQueryINTEL *) cmd);
+ break;
+ case DISPATCH_CMD_NormalPointer:
+ debug_print_unmarshal("NormalPointer");
+ _mesa_unmarshal_NormalPointer(ctx, (const struct marshal_cmd_NormalPointer *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos4iMESA:
+ debug_print_unmarshal("WindowPos4iMESA");
+ _mesa_unmarshal_WindowPos4iMESA(ctx, (const struct marshal_cmd_WindowPos4iMESA *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4bv:
+ debug_print_unmarshal("VertexAttrib4bv");
+ _mesa_unmarshal_VertexAttrib4bv(ctx, (const struct marshal_cmd_VertexAttrib4bv *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3usv:
+ debug_print_unmarshal("SecondaryColor3usv");
+ _mesa_unmarshal_SecondaryColor3usv(ctx, (const struct marshal_cmd_SecondaryColor3usv *) cmd);
+ break;
+ case DISPATCH_CMD_Indexfv:
+ debug_print_unmarshal("Indexfv");
+ _mesa_unmarshal_Indexfv(ctx, (const struct marshal_cmd_Indexfv *) cmd);
+ break;
+ case DISPATCH_CMD_AlphaFragmentOp1ATI:
+ debug_print_unmarshal("AlphaFragmentOp1ATI");
+ _mesa_unmarshal_AlphaFragmentOp1ATI(ctx, (const struct marshal_cmd_AlphaFragmentOp1ATI *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2dv:
+ debug_print_unmarshal("ProgramUniform2dv");
+ _mesa_unmarshal_ProgramUniform2dv(ctx, (const struct marshal_cmd_ProgramUniform2dv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3i:
+ debug_print_unmarshal("MultiTexCoord3i");
+ _mesa_unmarshal_MultiTexCoord3i(ctx, (const struct marshal_cmd_MultiTexCoord3i *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1fv:
+ debug_print_unmarshal("ProgramUniform1fv");
+ _mesa_unmarshal_ProgramUniform1fv(ctx, (const struct marshal_cmd_ProgramUniform1fv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3d:
+ debug_print_unmarshal("MultiTexCoord3d");
+ _mesa_unmarshal_MultiTexCoord3d(ctx, (const struct marshal_cmd_MultiTexCoord3d *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3sv:
+ debug_print_unmarshal("TexCoord3sv");
+ _mesa_unmarshal_TexCoord3sv(ctx, (const struct marshal_cmd_TexCoord3sv *) cmd);
+ break;
+ case DISPATCH_CMD_Minmax:
+ debug_print_unmarshal("Minmax");
+ _mesa_unmarshal_Minmax(ctx, (const struct marshal_cmd_Minmax *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3s:
+ debug_print_unmarshal("MultiTexCoord3s");
+ _mesa_unmarshal_MultiTexCoord3s(ctx, (const struct marshal_cmd_MultiTexCoord3s *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4iv:
+ debug_print_unmarshal("Vertex4iv");
+ _mesa_unmarshal_Vertex4iv(ctx, (const struct marshal_cmd_Vertex4iv *) cmd);
+ break;
+ case DISPATCH_CMD_BufferSubData:
+ debug_print_unmarshal("BufferSubData");
+ _mesa_unmarshal_BufferSubData(ctx, (const struct marshal_cmd_BufferSubData *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4dv:
+ debug_print_unmarshal("TexCoord4dv");
+ _mesa_unmarshal_TexCoord4dv(ctx, (const struct marshal_cmd_TexCoord4dv *) cmd);
+ break;
+ case DISPATCH_CMD_Begin:
+ debug_print_unmarshal("Begin");
+ _mesa_unmarshal_Begin(ctx, (const struct marshal_cmd_Begin *) cmd);
+ break;
+ case DISPATCH_CMD_LightModeli:
+ debug_print_unmarshal("LightModeli");
+ _mesa_unmarshal_LightModeli(ctx, (const struct marshal_cmd_LightModeli *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2fv:
+ debug_print_unmarshal("UniformMatrix2fv");
+ _mesa_unmarshal_UniformMatrix2fv(ctx, (const struct marshal_cmd_UniformMatrix2fv *) cmd);
+ break;
+ case DISPATCH_CMD_LightModelf:
+ debug_print_unmarshal("LightModelf");
+ _mesa_unmarshal_LightModelf(ctx, (const struct marshal_cmd_LightModelf *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage1D:
+ debug_print_unmarshal("TextureStorage1D");
+ _mesa_unmarshal_TextureStorage1D(ctx, (const struct marshal_cmd_TextureStorage1D *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2fvARB:
+ debug_print_unmarshal("MultiTexCoord2fvARB");
+ _mesa_unmarshal_MultiTexCoord2fvARB(ctx, (const struct marshal_cmd_MultiTexCoord2fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4ubv:
+ debug_print_unmarshal("VertexAttrib4ubv");
+ _mesa_unmarshal_VertexAttrib4ubv(ctx, (const struct marshal_cmd_VertexAttrib4ubv *) cmd);
+ break;
+ case DISPATCH_CMD_ColorMask:
+ debug_print_unmarshal("ColorMask");
+ _mesa_unmarshal_ColorMask(ctx, (const struct marshal_cmd_ColorMask *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4x:
+ debug_print_unmarshal("MultiTexCoord4x");
+ _mesa_unmarshal_MultiTexCoord4x(ctx, (const struct marshal_cmd_MultiTexCoord4x *) cmd);
+ break;
+ case DISPATCH_CMD_UniformHandleui64ARB:
+ debug_print_unmarshal("UniformHandleui64ARB");
+ _mesa_unmarshal_UniformHandleui64ARB(ctx, (const struct marshal_cmd_UniformHandleui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs4svNV:
+ debug_print_unmarshal("VertexAttribs4svNV");
+ _mesa_unmarshal_VertexAttribs4svNV(ctx, (const struct marshal_cmd_VertexAttribs4svNV *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElementsInstancedBaseInstance:
+ debug_print_unmarshal("DrawElementsInstancedBaseInstance");
+ _mesa_unmarshal_DrawElementsInstancedBaseInstance(ctx, (const struct marshal_cmd_DrawElementsInstancedBaseInstance *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4fv:
+ debug_print_unmarshal("UniformMatrix4fv");
+ _mesa_unmarshal_UniformMatrix4fv(ctx, (const struct marshal_cmd_UniformMatrix4fv *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3x2fv:
+ debug_print_unmarshal("UniformMatrix3x2fv");
+ _mesa_unmarshal_UniformMatrix3x2fv(ctx, (const struct marshal_cmd_UniformMatrix3x2fv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nuiv:
+ debug_print_unmarshal("VertexAttrib4Nuiv");
+ _mesa_unmarshal_VertexAttrib4Nuiv(ctx, (const struct marshal_cmd_VertexAttrib4Nuiv *) cmd);
+ break;
+ case DISPATCH_CMD_ClientActiveTexture:
+ debug_print_unmarshal("ClientActiveTexture");
+ _mesa_unmarshal_ClientActiveTexture(ctx, (const struct marshal_cmd_ClientActiveTexture *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2sv:
+ debug_print_unmarshal("MultiTexCoord2sv");
+ _mesa_unmarshal_MultiTexCoord2sv(ctx, (const struct marshal_cmd_MultiTexCoord2sv *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferDrawBuffer:
+ debug_print_unmarshal("NamedFramebufferDrawBuffer");
+ _mesa_unmarshal_NamedFramebufferDrawBuffer(ctx, (const struct marshal_cmd_NamedFramebufferDrawBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferTextureLayer:
+ debug_print_unmarshal("NamedFramebufferTextureLayer");
+ _mesa_unmarshal_NamedFramebufferTextureLayer(ctx, (const struct marshal_cmd_NamedFramebufferTextureLayer *) cmd);
+ break;
+ case DISPATCH_CMD_LoadIdentity:
+ debug_print_unmarshal("LoadIdentity");
+ _mesa_unmarshal_LoadIdentity(ctx, (const struct marshal_cmd_LoadIdentity *) cmd);
+ break;
+ case DISPATCH_CMD_ActiveShaderProgram:
+ debug_print_unmarshal("ActiveShaderProgram");
+ _mesa_unmarshal_ActiveShaderProgram(ctx, (const struct marshal_cmd_ActiveShaderProgram *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4ubvNV:
+ debug_print_unmarshal("VertexAttrib4ubvNV");
+ _mesa_unmarshal_VertexAttrib4ubvNV(ctx, (const struct marshal_cmd_VertexAttrib4ubvNV *) cmd);
+ break;
+ case DISPATCH_CMD_FogCoordfEXT:
+ debug_print_unmarshal("FogCoordfEXT");
+ _mesa_unmarshal_FogCoordfEXT(ctx, (const struct marshal_cmd_FogCoordfEXT *) cmd);
+ break;
+ case DISPATCH_CMD_BindTransformFeedback:
+ debug_print_unmarshal("BindTransformFeedback");
+ _mesa_unmarshal_BindTransformFeedback(ctx, (const struct marshal_cmd_BindTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_TextureBufferRange:
+ debug_print_unmarshal("TextureBufferRange");
+ _mesa_unmarshal_TextureBufferRange(ctx, (const struct marshal_cmd_TextureBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4svNV:
+ debug_print_unmarshal("VertexAttrib4svNV");
+ _mesa_unmarshal_VertexAttrib4svNV(ctx, (const struct marshal_cmd_VertexAttrib4svNV *) cmd);
+ break;
+ case DISPATCH_CMD_PatchParameteri:
+ debug_print_unmarshal("PatchParameteri");
+ _mesa_unmarshal_PatchParameteri(ctx, (const struct marshal_cmd_PatchParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_VDPAUSurfaceAccessNV:
+ debug_print_unmarshal("VDPAUSurfaceAccessNV");
+ _mesa_unmarshal_VDPAUSurfaceAccessNV(ctx, (const struct marshal_cmd_VDPAUSurfaceAccessNV *) cmd);
+ break;
+ case DISPATCH_CMD_EdgeFlagPointer:
+ debug_print_unmarshal("EdgeFlagPointer");
+ _mesa_unmarshal_EdgeFlagPointer(ctx, (const struct marshal_cmd_EdgeFlagPointer *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos2f:
+ debug_print_unmarshal("WindowPos2f");
+ _mesa_unmarshal_WindowPos2f(ctx, (const struct marshal_cmd_WindowPos2f *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos2d:
+ debug_print_unmarshal("WindowPos2d");
+ _mesa_unmarshal_WindowPos2d(ctx, (const struct marshal_cmd_WindowPos2d *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos2i:
+ debug_print_unmarshal("WindowPos2i");
+ _mesa_unmarshal_WindowPos2i(ctx, (const struct marshal_cmd_WindowPos2i *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos2s:
+ debug_print_unmarshal("WindowPos2s");
+ _mesa_unmarshal_WindowPos2s(ctx, (const struct marshal_cmd_WindowPos2s *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI1uiEXT:
+ debug_print_unmarshal("VertexAttribI1uiEXT");
+ _mesa_unmarshal_VertexAttribI1uiEXT(ctx, (const struct marshal_cmd_VertexAttribI1uiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteSync:
+ debug_print_unmarshal("DeleteSync");
+ _mesa_unmarshal_DeleteSync(ctx, (const struct marshal_cmd_DeleteSync *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3dv:
+ debug_print_unmarshal("SecondaryColor3dv");
+ _mesa_unmarshal_SecondaryColor3dv(ctx, (const struct marshal_cmd_SecondaryColor3dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3s:
+ debug_print_unmarshal("VertexAttrib3s");
+ _mesa_unmarshal_VertexAttrib3s(ctx, (const struct marshal_cmd_VertexAttrib3s *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4x3fv:
+ debug_print_unmarshal("UniformMatrix4x3fv");
+ _mesa_unmarshal_UniformMatrix4x3fv(ctx, (const struct marshal_cmd_UniformMatrix4x3fv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3d:
+ debug_print_unmarshal("VertexAttrib3d");
+ _mesa_unmarshal_VertexAttrib3d(ctx, (const struct marshal_cmd_VertexAttrib3d *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nbv:
+ debug_print_unmarshal("VertexAttrib4Nbv");
+ _mesa_unmarshal_VertexAttrib4Nbv(ctx, (const struct marshal_cmd_VertexAttrib4Nbv *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateTexImage:
+ debug_print_unmarshal("InvalidateTexImage");
+ _mesa_unmarshal_InvalidateTexImage(ctx, (const struct marshal_cmd_InvalidateTexImage *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4ui:
+ debug_print_unmarshal("Uniform4ui");
+ _mesa_unmarshal_Uniform4ui(ctx, (const struct marshal_cmd_Uniform4ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayAttribFormat:
+ debug_print_unmarshal("VertexArrayAttribFormat");
+ _mesa_unmarshal_VertexArrayAttribFormat(ctx, (const struct marshal_cmd_VertexArrayAttribFormat *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1fARB:
+ debug_print_unmarshal("VertexAttrib1fARB");
+ _mesa_unmarshal_VertexAttrib1fARB(ctx, (const struct marshal_cmd_VertexAttrib1fARB *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexsOES:
+ debug_print_unmarshal("DrawTexsOES");
+ _mesa_unmarshal_DrawTexsOES(ctx, (const struct marshal_cmd_DrawTexsOES *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramParameteri:
+ debug_print_unmarshal("ProgramParameteri");
+ _mesa_unmarshal_ProgramParameteri(ctx, (const struct marshal_cmd_ProgramParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_Color3fv:
+ debug_print_unmarshal("Color3fv");
+ _mesa_unmarshal_Color3fv(ctx, (const struct marshal_cmd_Color3fv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2i:
+ debug_print_unmarshal("MultiTexCoord2i");
+ _mesa_unmarshal_MultiTexCoord2i(ctx, (const struct marshal_cmd_MultiTexCoord2i *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2d:
+ debug_print_unmarshal("MultiTexCoord2d");
+ _mesa_unmarshal_MultiTexCoord2d(ctx, (const struct marshal_cmd_MultiTexCoord2d *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2s:
+ debug_print_unmarshal("MultiTexCoord2s");
+ _mesa_unmarshal_MultiTexCoord2s(ctx, (const struct marshal_cmd_MultiTexCoord2s *) cmd);
+ break;
+ case DISPATCH_CMD_Indexub:
+ debug_print_unmarshal("Indexub");
+ _mesa_unmarshal_Indexub(ctx, (const struct marshal_cmd_Indexub *) cmd);
+ break;
+ case DISPATCH_CMD_PolygonOffsetEXT:
+ debug_print_unmarshal("PolygonOffsetEXT");
+ _mesa_unmarshal_PolygonOffsetEXT(ctx, (const struct marshal_cmd_PolygonOffsetEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Scalex:
+ debug_print_unmarshal("Scalex");
+ _mesa_unmarshal_Scalex(ctx, (const struct marshal_cmd_Scalex *) cmd);
+ break;
+ case DISPATCH_CMD_Scaled:
+ debug_print_unmarshal("Scaled");
+ _mesa_unmarshal_Scaled(ctx, (const struct marshal_cmd_Scaled *) cmd);
+ break;
+ case DISPATCH_CMD_Scalef:
+ debug_print_unmarshal("Scalef");
+ _mesa_unmarshal_Scalef(ctx, (const struct marshal_cmd_Scalef *) cmd);
+ break;
+ case DISPATCH_CMD_IndexPointerEXT:
+ debug_print_unmarshal("IndexPointerEXT");
+ _mesa_unmarshal_IndexPointerEXT(ctx, (const struct marshal_cmd_IndexPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ColorFragmentOp2ATI:
+ debug_print_unmarshal("ColorFragmentOp2ATI");
+ _mesa_unmarshal_ColorFragmentOp2ATI(ctx, (const struct marshal_cmd_ColorFragmentOp2ATI *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2sNV:
+ debug_print_unmarshal("VertexAttrib2sNV");
+ _mesa_unmarshal_VertexAttrib2sNV(ctx, (const struct marshal_cmd_VertexAttrib2sNV *) cmd);
+ break;
+ case DISPATCH_CMD_QueryCounter:
+ debug_print_unmarshal("QueryCounter");
+ _mesa_unmarshal_QueryCounter(ctx, (const struct marshal_cmd_QueryCounter *) cmd);
+ break;
+ case DISPATCH_CMD_NormalPointerEXT:
+ debug_print_unmarshal("NormalPointerEXT");
+ _mesa_unmarshal_NormalPointerEXT(ctx, (const struct marshal_cmd_NormalPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3iv:
+ debug_print_unmarshal("ProgramUniform3iv");
+ _mesa_unmarshal_ProgramUniform3iv(ctx, (const struct marshal_cmd_ProgramUniform3iv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2dv:
+ debug_print_unmarshal("ProgramUniformMatrix2dv");
+ _mesa_unmarshal_ProgramUniformMatrix2dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2dv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElementsBaseVertex:
+ debug_print_unmarshal("DrawElementsBaseVertex");
+ _mesa_unmarshal_DrawElementsBaseVertex(ctx, (const struct marshal_cmd_DrawElementsBaseVertex *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3iv:
+ debug_print_unmarshal("RasterPos3iv");
+ _mesa_unmarshal_RasterPos3iv(ctx, (const struct marshal_cmd_RasterPos3iv *) cmd);
+ break;
+ case DISPATCH_CMD_ColorMaski:
+ debug_print_unmarshal("ColorMaski");
+ _mesa_unmarshal_ColorMaski(ctx, (const struct marshal_cmd_ColorMaski *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2uiv:
+ debug_print_unmarshal("Uniform2uiv");
+ _mesa_unmarshal_Uniform2uiv(ctx, (const struct marshal_cmd_Uniform2uiv *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3s:
+ debug_print_unmarshal("RasterPos3s");
+ _mesa_unmarshal_RasterPos3s(ctx, (const struct marshal_cmd_RasterPos3s *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3d:
+ debug_print_unmarshal("RasterPos3d");
+ _mesa_unmarshal_RasterPos3d(ctx, (const struct marshal_cmd_RasterPos3d *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3f:
+ debug_print_unmarshal("RasterPos3f");
+ _mesa_unmarshal_RasterPos3f(ctx, (const struct marshal_cmd_RasterPos3f *) cmd);
+ break;
+ case DISPATCH_CMD_BindVertexArray:
+ debug_print_unmarshal("BindVertexArray");
+ _mesa_unmarshal_BindVertexArray(ctx, (const struct marshal_cmd_BindVertexArray *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3i:
+ debug_print_unmarshal("RasterPos3i");
+ _mesa_unmarshal_RasterPos3i(ctx, (const struct marshal_cmd_RasterPos3i *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTransformFeedbackStreamInstanced:
+ debug_print_unmarshal("DrawTransformFeedbackStreamInstanced");
+ _mesa_unmarshal_DrawTransformFeedbackStreamInstanced(ctx, (const struct marshal_cmd_DrawTransformFeedbackStreamInstanced *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2fvARB:
+ debug_print_unmarshal("VertexAttrib2fvARB");
+ _mesa_unmarshal_VertexAttrib2fvARB(ctx, (const struct marshal_cmd_VertexAttrib2fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4x3dv:
+ debug_print_unmarshal("ProgramUniformMatrix4x3dv");
+ _mesa_unmarshal_ProgramUniformMatrix4x3dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4x3dv *) cmd);
+ break;
+ case DISPATCH_CMD_LoadName:
+ debug_print_unmarshal("LoadName");
+ _mesa_unmarshal_LoadName(ctx, (const struct marshal_cmd_LoadName *) cmd);
+ break;
+ case DISPATCH_CMD_ClearIndex:
+ debug_print_unmarshal("ClearIndex");
+ _mesa_unmarshal_ClearIndex(ctx, (const struct marshal_cmd_ClearIndex *) cmd);
+ break;
+ case DISPATCH_CMD_FlushMappedNamedBufferRange:
+ debug_print_unmarshal("FlushMappedNamedBufferRange");
+ _mesa_unmarshal_FlushMappedNamedBufferRange(ctx, (const struct marshal_cmd_FlushMappedNamedBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoordP1ui:
+ debug_print_unmarshal("MultiTexCoordP1ui");
+ _mesa_unmarshal_MultiTexCoordP1ui(ctx, (const struct marshal_cmd_MultiTexCoordP1ui *) cmd);
+ break;
+ case DISPATCH_CMD_EvalMesh2:
+ debug_print_unmarshal("EvalMesh2");
+ _mesa_unmarshal_EvalMesh2(ctx, (const struct marshal_cmd_EvalMesh2 *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4fv:
+ debug_print_unmarshal("Vertex4fv");
+ _mesa_unmarshal_Vertex4fv(ctx, (const struct marshal_cmd_Vertex4fv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4i64ARB:
+ debug_print_unmarshal("ProgramUniform4i64ARB");
+ _mesa_unmarshal_ProgramUniform4i64ARB(ctx, (const struct marshal_cmd_ProgramUniform4i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage2D:
+ debug_print_unmarshal("TextureStorage2D");
+ _mesa_unmarshal_TextureStorage2D(ctx, (const struct marshal_cmd_TextureStorage2D *) cmd);
+ break;
+ case DISPATCH_CMD_BindFramebuffer:
+ debug_print_unmarshal("BindFramebuffer");
+ _mesa_unmarshal_BindFramebuffer(ctx, (const struct marshal_cmd_BindFramebuffer *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs3svNV:
+ debug_print_unmarshal("VertexAttribs3svNV");
+ _mesa_unmarshal_VertexAttribs3svNV(ctx, (const struct marshal_cmd_VertexAttribs3svNV *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2sv:
+ debug_print_unmarshal("VertexAttrib2sv");
+ _mesa_unmarshal_VertexAttrib2sv(ctx, (const struct marshal_cmd_VertexAttrib2sv *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1dv:
+ debug_print_unmarshal("Uniform1dv");
+ _mesa_unmarshal_Uniform1dv(ctx, (const struct marshal_cmd_Uniform1dv *) cmd);
+ break;
+ case DISPATCH_CMD_TransformFeedbackBufferRange:
+ debug_print_unmarshal("TransformFeedbackBufferRange");
+ _mesa_unmarshal_TransformFeedbackBufferRange(ctx, (const struct marshal_cmd_TransformFeedbackBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_PassThrough:
+ debug_print_unmarshal("PassThrough");
+ _mesa_unmarshal_PassThrough(ctx, (const struct marshal_cmd_PassThrough *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4fvARB:
+ debug_print_unmarshal("VertexAttrib4fvARB");
+ _mesa_unmarshal_VertexAttrib4fvARB(ctx, (const struct marshal_cmd_VertexAttrib4fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3i64vARB:
+ debug_print_unmarshal("Uniform3i64vARB");
+ _mesa_unmarshal_Uniform3i64vARB(ctx, (const struct marshal_cmd_Uniform3i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexGenxOES:
+ debug_print_unmarshal("TexGenxOES");
+ _mesa_unmarshal_TexGenxOES(ctx, (const struct marshal_cmd_TexGenxOES *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayAttribIFormat:
+ debug_print_unmarshal("VertexArrayAttribIFormat");
+ _mesa_unmarshal_VertexArrayAttribIFormat(ctx, (const struct marshal_cmd_VertexArrayAttribIFormat *) cmd);
+ break;
+ case DISPATCH_CMD_StencilOp:
+ debug_print_unmarshal("StencilOp");
+ _mesa_unmarshal_StencilOp(ctx, (const struct marshal_cmd_StencilOp *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1iv:
+ debug_print_unmarshal("ProgramUniform1iv");
+ _mesa_unmarshal_ProgramUniform1iv(ctx, (const struct marshal_cmd_ProgramUniform1iv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3ui:
+ debug_print_unmarshal("ProgramUniform3ui");
+ _mesa_unmarshal_ProgramUniform3ui(ctx, (const struct marshal_cmd_ProgramUniform3ui *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3sv:
+ debug_print_unmarshal("SecondaryColor3sv");
+ _mesa_unmarshal_SecondaryColor3sv(ctx, (const struct marshal_cmd_SecondaryColor3sv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordP3ui:
+ debug_print_unmarshal("TexCoordP3ui");
+ _mesa_unmarshal_TexCoordP3ui(ctx, (const struct marshal_cmd_TexCoordP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayElementBuffer:
+ debug_print_unmarshal("VertexArrayElementBuffer");
+ _mesa_unmarshal_VertexArrayElementBuffer(ctx, (const struct marshal_cmd_VertexArrayElementBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3i64ARB:
+ debug_print_unmarshal("Uniform3i64ARB");
+ _mesa_unmarshal_Uniform3i64ARB(ctx, (const struct marshal_cmd_Uniform3i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribP1ui:
+ debug_print_unmarshal("VertexAttribP1ui");
+ _mesa_unmarshal_VertexAttribP1ui(ctx, (const struct marshal_cmd_VertexAttribP1ui *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteLists:
+ debug_print_unmarshal("DeleteLists");
+ _mesa_unmarshal_DeleteLists(ctx, (const struct marshal_cmd_DeleteLists *) cmd);
+ break;
+ case DISPATCH_CMD_LogicOp:
+ debug_print_unmarshal("LogicOp");
+ _mesa_unmarshal_LogicOp(ctx, (const struct marshal_cmd_LogicOp *) cmd);
+ break;
+ case DISPATCH_CMD_RenderbufferStorageMultisample:
+ debug_print_unmarshal("RenderbufferStorageMultisample");
+ _mesa_unmarshal_RenderbufferStorageMultisample(ctx, (const struct marshal_cmd_RenderbufferStorageMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos3d:
+ debug_print_unmarshal("WindowPos3d");
+ _mesa_unmarshal_WindowPos3d(ctx, (const struct marshal_cmd_WindowPos3d *) cmd);
+ break;
+ case DISPATCH_CMD_Enablei:
+ debug_print_unmarshal("Enablei");
+ _mesa_unmarshal_Enablei(ctx, (const struct marshal_cmd_Enablei *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos3f:
+ debug_print_unmarshal("WindowPos3f");
+ _mesa_unmarshal_WindowPos3f(ctx, (const struct marshal_cmd_WindowPos3f *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2sv:
+ debug_print_unmarshal("RasterPos2sv");
+ _mesa_unmarshal_RasterPos2sv(ctx, (const struct marshal_cmd_RasterPos2sv *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos3i:
+ debug_print_unmarshal("WindowPos3i");
+ _mesa_unmarshal_WindowPos3i(ctx, (const struct marshal_cmd_WindowPos3i *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4iv:
+ debug_print_unmarshal("MultiTexCoord4iv");
+ _mesa_unmarshal_MultiTexCoord4iv(ctx, (const struct marshal_cmd_MultiTexCoord4iv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1sv:
+ debug_print_unmarshal("TexCoord1sv");
+ _mesa_unmarshal_TexCoord1sv(ctx, (const struct marshal_cmd_TexCoord1sv *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos3s:
+ debug_print_unmarshal("WindowPos3s");
+ _mesa_unmarshal_WindowPos3s(ctx, (const struct marshal_cmd_WindowPos3s *) cmd);
+ break;
+ case DISPATCH_CMD_Orthof:
+ debug_print_unmarshal("Orthof");
+ _mesa_unmarshal_Orthof(ctx, (const struct marshal_cmd_Orthof *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteObjectARB:
+ debug_print_unmarshal("DeleteObjectARB");
+ _mesa_unmarshal_DeleteObjectARB(ctx, (const struct marshal_cmd_DeleteObjectARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2x3dv:
+ debug_print_unmarshal("ProgramUniformMatrix2x3dv");
+ _mesa_unmarshal_ProgramUniformMatrix2x3dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2x3dv *) cmd);
+ break;
+ case DISPATCH_CMD_Color4uiv:
+ debug_print_unmarshal("Color4uiv");
+ _mesa_unmarshal_Color4uiv(ctx, (const struct marshal_cmd_Color4uiv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1sv:
+ debug_print_unmarshal("MultiTexCoord1sv");
+ _mesa_unmarshal_MultiTexCoord1sv(ctx, (const struct marshal_cmd_MultiTexCoord1sv *) cmd);
+ break;
+ case DISPATCH_CMD_Orthox:
+ debug_print_unmarshal("Orthox");
+ _mesa_unmarshal_Orthox(ctx, (const struct marshal_cmd_Orthox *) cmd);
+ break;
+ case DISPATCH_CMD_PushAttrib:
+ debug_print_unmarshal("PushAttrib");
+ _mesa_unmarshal_PushAttrib(ctx, (const struct marshal_cmd_PushAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2i:
+ debug_print_unmarshal("RasterPos2i");
+ _mesa_unmarshal_RasterPos2i(ctx, (const struct marshal_cmd_RasterPos2i *) cmd);
+ break;
+ case DISPATCH_CMD_ClipPlane:
+ debug_print_unmarshal("ClipPlane");
+ _mesa_unmarshal_ClipPlane(ctx, (const struct marshal_cmd_ClipPlane *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2f:
+ debug_print_unmarshal("RasterPos2f");
+ _mesa_unmarshal_RasterPos2f(ctx, (const struct marshal_cmd_RasterPos2f *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2d:
+ debug_print_unmarshal("RasterPos2d");
+ _mesa_unmarshal_RasterPos2d(ctx, (const struct marshal_cmd_RasterPos2d *) cmd);
+ break;
+ case DISPATCH_CMD_MakeImageHandleResidentARB:
+ debug_print_unmarshal("MakeImageHandleResidentARB");
+ _mesa_unmarshal_MakeImageHandleResidentARB(ctx, (const struct marshal_cmd_MakeImageHandleResidentARB *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateSubFramebuffer:
+ debug_print_unmarshal("InvalidateSubFramebuffer");
+ _mesa_unmarshal_InvalidateSubFramebuffer(ctx, (const struct marshal_cmd_InvalidateSubFramebuffer *) cmd);
+ break;
+ case DISPATCH_CMD_Color4ub:
+ debug_print_unmarshal("Color4ub");
+ _mesa_unmarshal_Color4ub(ctx, (const struct marshal_cmd_Color4ub *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2x4dv:
+ debug_print_unmarshal("UniformMatrix2x4dv");
+ _mesa_unmarshal_UniformMatrix2x4dv(ctx, (const struct marshal_cmd_UniformMatrix2x4dv *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2s:
+ debug_print_unmarshal("RasterPos2s");
+ _mesa_unmarshal_RasterPos2s(ctx, (const struct marshal_cmd_RasterPos2s *) cmd);
+ break;
+ case DISPATCH_CMD_DispatchComputeGroupSizeARB:
+ debug_print_unmarshal("DispatchComputeGroupSizeARB");
+ _mesa_unmarshal_DispatchComputeGroupSizeARB(ctx, (const struct marshal_cmd_DispatchComputeGroupSizeARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayBindingDivisor:
+ debug_print_unmarshal("VertexArrayBindingDivisor");
+ _mesa_unmarshal_VertexArrayBindingDivisor(ctx, (const struct marshal_cmd_VertexArrayBindingDivisor *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3dv:
+ debug_print_unmarshal("MultiTexCoord3dv");
+ _mesa_unmarshal_MultiTexCoord3dv(ctx, (const struct marshal_cmd_MultiTexCoord3dv *) cmd);
+ break;
+ case DISPATCH_CMD_BindProgramPipeline:
+ debug_print_unmarshal("BindProgramPipeline");
+ _mesa_unmarshal_BindProgramPipeline(ctx, (const struct marshal_cmd_BindProgramPipeline *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1i:
+ debug_print_unmarshal("MultiTexCoord1i");
+ _mesa_unmarshal_MultiTexCoord1i(ctx, (const struct marshal_cmd_MultiTexCoord1i *) cmd);
+ break;
+ case DISPATCH_CMD_DeletePerfQueryINTEL:
+ debug_print_unmarshal("DeletePerfQueryINTEL");
+ _mesa_unmarshal_DeletePerfQueryINTEL(ctx, (const struct marshal_cmd_DeletePerfQueryINTEL *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1d:
+ debug_print_unmarshal("MultiTexCoord1d");
+ _mesa_unmarshal_MultiTexCoord1d(ctx, (const struct marshal_cmd_MultiTexCoord1d *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1s:
+ debug_print_unmarshal("MultiTexCoord1s");
+ _mesa_unmarshal_MultiTexCoord1s(ctx, (const struct marshal_cmd_MultiTexCoord1s *) cmd);
+ break;
+ case DISPATCH_CMD_BeginConditionalRender:
+ debug_print_unmarshal("BeginConditionalRender");
+ _mesa_unmarshal_BeginConditionalRender(ctx, (const struct marshal_cmd_BeginConditionalRender *) cmd);
+ break;
+ case DISPATCH_CMD_CopyConvolutionFilter1D:
+ debug_print_unmarshal("CopyConvolutionFilter1D");
+ _mesa_unmarshal_CopyConvolutionFilter1D(ctx, (const struct marshal_cmd_CopyConvolutionFilter1D *) cmd);
+ break;
+ case DISPATCH_CMD_ClearBufferfv:
+ debug_print_unmarshal("ClearBufferfv");
+ _mesa_unmarshal_ClearBufferfv(ctx, (const struct marshal_cmd_ClearBufferfv *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4dv:
+ debug_print_unmarshal("UniformMatrix4dv");
+ _mesa_unmarshal_UniformMatrix4dv(ctx, (const struct marshal_cmd_UniformMatrix4dv *) cmd);
+ break;
+ case DISPATCH_CMD_ClearBufferfi:
+ debug_print_unmarshal("ClearBufferfi");
+ _mesa_unmarshal_ClearBufferfi(ctx, (const struct marshal_cmd_ClearBufferfi *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteFragmentShaderATI:
+ debug_print_unmarshal("DeleteFragmentShaderATI");
+ _mesa_unmarshal_DeleteFragmentShaderATI(ctx, (const struct marshal_cmd_DeleteFragmentShaderATI *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElementsInstancedBaseVertex:
+ debug_print_unmarshal("DrawElementsInstancedBaseVertex");
+ _mesa_unmarshal_DrawElementsInstancedBaseVertex(ctx, (const struct marshal_cmd_DrawElementsInstancedBaseVertex *) cmd);
+ break;
+ case DISPATCH_CMD_DisableClientState:
+ debug_print_unmarshal("DisableClientState");
+ _mesa_unmarshal_DisableClientState(ctx, (const struct marshal_cmd_DisableClientState *) cmd);
+ break;
+ case DISPATCH_CMD_TexGeni:
+ debug_print_unmarshal("TexGeni");
+ _mesa_unmarshal_TexGeni(ctx, (const struct marshal_cmd_TexGeni *) cmd);
+ break;
+ case DISPATCH_CMD_TexGenf:
+ debug_print_unmarshal("TexGenf");
+ _mesa_unmarshal_TexGenf(ctx, (const struct marshal_cmd_TexGenf *) cmd);
+ break;
+ case DISPATCH_CMD_TexGend:
+ debug_print_unmarshal("TexGend");
+ _mesa_unmarshal_TexGend(ctx, (const struct marshal_cmd_TexGend *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4i64vARB:
+ debug_print_unmarshal("ProgramUniform4i64vARB");
+ _mesa_unmarshal_ProgramUniform4i64vARB(ctx, (const struct marshal_cmd_ProgramUniform4i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_Color4sv:
+ debug_print_unmarshal("Color4sv");
+ _mesa_unmarshal_Color4sv(ctx, (const struct marshal_cmd_Color4sv *) cmd);
+ break;
+ case DISPATCH_CMD_PixelZoom:
+ debug_print_unmarshal("PixelZoom");
+ _mesa_unmarshal_PixelZoom(ctx, (const struct marshal_cmd_PixelZoom *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramEnvParameter4dARB:
+ debug_print_unmarshal("ProgramEnvParameter4dARB");
+ _mesa_unmarshal_ProgramEnvParameter4dARB(ctx, (const struct marshal_cmd_ProgramEnvParameter4dARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3uiv:
+ debug_print_unmarshal("ProgramUniform3uiv");
+ _mesa_unmarshal_ProgramUniform3uiv(ctx, (const struct marshal_cmd_ProgramUniform3uiv *) cmd);
+ break;
+ case DISPATCH_CMD_IndexPointer:
+ debug_print_unmarshal("IndexPointer");
+ _mesa_unmarshal_IndexPointer(ctx, (const struct marshal_cmd_IndexPointer *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4sNV:
+ debug_print_unmarshal("VertexAttrib4sNV");
+ _mesa_unmarshal_VertexAttrib4sNV(ctx, (const struct marshal_cmd_VertexAttrib4sNV *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3ui64vARB:
+ debug_print_unmarshal("Uniform3ui64vARB");
+ _mesa_unmarshal_Uniform3ui64vARB(ctx, (const struct marshal_cmd_Uniform3ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_BufferPageCommitmentARB:
+ debug_print_unmarshal("BufferPageCommitmentARB");
+ _mesa_unmarshal_BufferPageCommitmentARB(ctx, (const struct marshal_cmd_BufferPageCommitmentARB *) cmd);
+ break;
+ case DISPATCH_CMD_ColorP4ui:
+ debug_print_unmarshal("ColorP4ui");
+ _mesa_unmarshal_ColorP4ui(ctx, (const struct marshal_cmd_ColorP4ui *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage3D:
+ debug_print_unmarshal("TextureStorage3D");
+ _mesa_unmarshal_TextureStorage3D(ctx, (const struct marshal_cmd_TextureStorage3D *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorageMem2DMultisampleEXT:
+ debug_print_unmarshal("TextureStorageMem2DMultisampleEXT");
+ _mesa_unmarshal_TextureStorageMem2DMultisampleEXT(ctx, (const struct marshal_cmd_TextureStorageMem2DMultisampleEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1iv:
+ debug_print_unmarshal("Uniform1iv");
+ _mesa_unmarshal_Uniform1iv(ctx, (const struct marshal_cmd_Uniform1iv *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4uiv:
+ debug_print_unmarshal("Uniform4uiv");
+ _mesa_unmarshal_Uniform4uiv(ctx, (const struct marshal_cmd_Uniform4uiv *) cmd);
+ break;
+ case DISPATCH_CMD_PopDebugGroup:
+ debug_print_unmarshal("PopDebugGroup");
+ _mesa_unmarshal_PopDebugGroup(ctx, (const struct marshal_cmd_PopDebugGroup *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1d:
+ debug_print_unmarshal("VertexAttrib1d");
+ _mesa_unmarshal_VertexAttrib1d(ctx, (const struct marshal_cmd_VertexAttrib1d *) cmd);
+ break;
+ case DISPATCH_CMD_NamedBufferSubData:
+ debug_print_unmarshal("NamedBufferSubData");
+ _mesa_unmarshal_NamedBufferSubData(ctx, (const struct marshal_cmd_NamedBufferSubData *) cmd);
+ break;
+ case DISPATCH_CMD_TexBufferRange:
+ debug_print_unmarshal("TexBufferRange");
+ _mesa_unmarshal_TexBufferRange(ctx, (const struct marshal_cmd_TexBufferRange *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1s:
+ debug_print_unmarshal("VertexAttrib1s");
+ _mesa_unmarshal_VertexAttrib1s(ctx, (const struct marshal_cmd_VertexAttrib1s *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4x3dv:
+ debug_print_unmarshal("UniformMatrix4x3dv");
+ _mesa_unmarshal_UniformMatrix4x3dv(ctx, (const struct marshal_cmd_UniformMatrix4x3dv *) cmd);
+ break;
+ case DISPATCH_CMD_TransformFeedbackBufferBase:
+ debug_print_unmarshal("TransformFeedbackBufferBase");
+ _mesa_unmarshal_TransformFeedbackBufferBase(ctx, (const struct marshal_cmd_TransformFeedbackBufferBase *) cmd);
+ break;
+ case DISPATCH_CMD_FogCoordfvEXT:
+ debug_print_unmarshal("FogCoordfvEXT");
+ _mesa_unmarshal_FogCoordfvEXT(ctx, (const struct marshal_cmd_FogCoordfvEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2ui64vARB:
+ debug_print_unmarshal("Uniform2ui64vARB");
+ _mesa_unmarshal_Uniform2ui64vARB(ctx, (const struct marshal_cmd_Uniform2ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3fARB:
+ debug_print_unmarshal("MultiTexCoord3fARB");
+ _mesa_unmarshal_MultiTexCoord3fARB(ctx, (const struct marshal_cmd_MultiTexCoord3fARB *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2sv:
+ debug_print_unmarshal("Vertex2sv");
+ _mesa_unmarshal_Vertex2sv(ctx, (const struct marshal_cmd_Vertex2sv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2dNV:
+ debug_print_unmarshal("VertexAttrib2dNV");
+ _mesa_unmarshal_VertexAttrib2dNV(ctx, (const struct marshal_cmd_VertexAttrib2dNV *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3svNV:
+ debug_print_unmarshal("VertexAttrib3svNV");
+ _mesa_unmarshal_VertexAttrib3svNV(ctx, (const struct marshal_cmd_VertexAttrib3svNV *) cmd);
+ break;
+ case DISPATCH_CMD_ViewportArrayv:
+ debug_print_unmarshal("ViewportArrayv");
+ _mesa_unmarshal_ViewportArrayv(ctx, (const struct marshal_cmd_ViewportArrayv *) cmd);
+ break;
+ case DISPATCH_CMD_ArrayElement:
+ debug_print_unmarshal("ArrayElement");
+ _mesa_unmarshal_ArrayElement(ctx, (const struct marshal_cmd_ArrayElement *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2dv:
+ debug_print_unmarshal("RasterPos2dv");
+ _mesa_unmarshal_RasterPos2dv(ctx, (const struct marshal_cmd_RasterPos2dv *) cmd);
+ break;
+ case DISPATCH_CMD_EndQuery:
+ debug_print_unmarshal("EndQuery");
+ _mesa_unmarshal_EndQuery(ctx, (const struct marshal_cmd_EndQuery *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1dv:
+ debug_print_unmarshal("TexCoord1dv");
+ _mesa_unmarshal_TexCoord1dv(ctx, (const struct marshal_cmd_TexCoord1dv *) cmd);
+ break;
+ case DISPATCH_CMD_AlphaFragmentOp3ATI:
+ debug_print_unmarshal("AlphaFragmentOp3ATI");
+ _mesa_unmarshal_AlphaFragmentOp3ATI(ctx, (const struct marshal_cmd_AlphaFragmentOp3ATI *) cmd);
+ break;
+ case DISPATCH_CMD_Clear:
+ debug_print_unmarshal("Clear");
+ _mesa_unmarshal_Clear(ctx, (const struct marshal_cmd_Clear *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4sv:
+ debug_print_unmarshal("VertexAttrib4sv");
+ _mesa_unmarshal_VertexAttrib4sv(ctx, (const struct marshal_cmd_VertexAttrib4sv *) cmd);
+ break;
+ case DISPATCH_CMD_Ortho:
+ debug_print_unmarshal("Ortho");
+ _mesa_unmarshal_Ortho(ctx, (const struct marshal_cmd_Ortho *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3uiv:
+ debug_print_unmarshal("Uniform3uiv");
+ _mesa_unmarshal_Uniform3uiv(ctx, (const struct marshal_cmd_Uniform3uiv *) cmd);
+ break;
+ case DISPATCH_CMD_EndQueryIndexed:
+ debug_print_unmarshal("EndQueryIndexed");
+ _mesa_unmarshal_EndQueryIndexed(ctx, (const struct marshal_cmd_EndQueryIndexed *) cmd);
+ break;
+ case DISPATCH_CMD_MultiDrawArraysIndirectCountARB:
+ debug_print_unmarshal("MultiDrawArraysIndirectCountARB");
+ _mesa_unmarshal_MultiDrawArraysIndirectCountARB(ctx, (const struct marshal_cmd_MultiDrawArraysIndirectCountARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2fv:
+ debug_print_unmarshal("ProgramUniformMatrix2fv");
+ _mesa_unmarshal_ProgramUniformMatrix2fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2fv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramLocalParameter4fvARB:
+ debug_print_unmarshal("ProgramLocalParameter4fvARB");
+ _mesa_unmarshal_ProgramLocalParameter4fvARB(ctx, (const struct marshal_cmd_ProgramLocalParameter4fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4dv:
+ debug_print_unmarshal("Uniform4dv");
+ _mesa_unmarshal_Uniform4dv(ctx, (const struct marshal_cmd_Uniform4dv *) cmd);
+ break;
+ case DISPATCH_CMD_LightModelx:
+ debug_print_unmarshal("LightModelx");
+ _mesa_unmarshal_LightModelx(ctx, (const struct marshal_cmd_LightModelx *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI3iEXT:
+ debug_print_unmarshal("VertexAttribI3iEXT");
+ _mesa_unmarshal_VertexAttribI3iEXT(ctx, (const struct marshal_cmd_VertexAttribI3iEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ClearColorx:
+ debug_print_unmarshal("ClearColorx");
+ _mesa_unmarshal_ClearColorx(ctx, (const struct marshal_cmd_ClearColorx *) cmd);
+ break;
+ case DISPATCH_CMD_EndTransformFeedback:
+ debug_print_unmarshal("EndTransformFeedback");
+ _mesa_unmarshal_EndTransformFeedback(ctx, (const struct marshal_cmd_EndTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_ViewportIndexedfv:
+ debug_print_unmarshal("ViewportIndexedfv");
+ _mesa_unmarshal_ViewportIndexedfv(ctx, (const struct marshal_cmd_ViewportIndexedfv *) cmd);
+ break;
+ case DISPATCH_CMD_BindTextureUnit:
+ debug_print_unmarshal("BindTextureUnit");
+ _mesa_unmarshal_BindTextureUnit(ctx, (const struct marshal_cmd_BindTextureUnit *) cmd);
+ break;
+ case DISPATCH_CMD_CallList:
+ debug_print_unmarshal("CallList");
+ _mesa_unmarshal_CallList(ctx, (const struct marshal_cmd_CallList *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteProgram:
+ debug_print_unmarshal("DeleteProgram");
+ _mesa_unmarshal_DeleteProgram(ctx, (const struct marshal_cmd_DeleteProgram *) cmd);
+ break;
+ case DISPATCH_CMD_ClearDepthf:
+ debug_print_unmarshal("ClearDepthf");
+ _mesa_unmarshal_ClearDepthf(ctx, (const struct marshal_cmd_ClearDepthf *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2iv:
+ debug_print_unmarshal("Uniform2iv");
+ _mesa_unmarshal_Uniform2iv(ctx, (const struct marshal_cmd_Uniform2iv *) cmd);
+ break;
+ case DISPATCH_CMD_SampleCoveragex:
+ debug_print_unmarshal("SampleCoveragex");
+ _mesa_unmarshal_SampleCoveragex(ctx, (const struct marshal_cmd_SampleCoveragex *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteFramebuffers:
+ debug_print_unmarshal("DeleteFramebuffers");
+ _mesa_unmarshal_DeleteFramebuffers(ctx, (const struct marshal_cmd_DeleteFramebuffers *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4uiv:
+ debug_print_unmarshal("VertexAttrib4uiv");
+ _mesa_unmarshal_VertexAttrib4uiv(ctx, (const struct marshal_cmd_VertexAttrib4uiv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nsv:
+ debug_print_unmarshal("VertexAttrib4Nsv");
+ _mesa_unmarshal_VertexAttrib4Nsv(ctx, (const struct marshal_cmd_VertexAttrib4Nsv *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4s:
+ debug_print_unmarshal("Vertex4s");
+ _mesa_unmarshal_Vertex4s(ctx, (const struct marshal_cmd_Vertex4s *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI2iEXT:
+ debug_print_unmarshal("VertexAttribI2iEXT");
+ _mesa_unmarshal_VertexAttribI2iEXT(ctx, (const struct marshal_cmd_VertexAttribI2iEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4f:
+ debug_print_unmarshal("Vertex4f");
+ _mesa_unmarshal_Vertex4f(ctx, (const struct marshal_cmd_Vertex4f *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4d:
+ debug_print_unmarshal("Vertex4d");
+ _mesa_unmarshal_Vertex4d(ctx, (const struct marshal_cmd_Vertex4d *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4i:
+ debug_print_unmarshal("Vertex4i");
+ _mesa_unmarshal_Vertex4i(ctx, (const struct marshal_cmd_Vertex4i *) cmd);
+ break;
+ case DISPATCH_CMD_MemoryBarrierByRegion:
+ debug_print_unmarshal("MemoryBarrierByRegion");
+ _mesa_unmarshal_MemoryBarrierByRegion(ctx, (const struct marshal_cmd_MemoryBarrierByRegion *) cmd);
+ break;
+ case DISPATCH_CMD_StencilFuncSeparateATI:
+ debug_print_unmarshal("StencilFuncSeparateATI");
+ _mesa_unmarshal_StencilFuncSeparateATI(ctx, (const struct marshal_cmd_StencilFuncSeparateATI *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4dv:
+ debug_print_unmarshal("Vertex4dv");
+ _mesa_unmarshal_Vertex4dv(ctx, (const struct marshal_cmd_Vertex4dv *) cmd);
+ break;
+ case DISPATCH_CMD_StencilMask:
+ debug_print_unmarshal("StencilMask");
+ _mesa_unmarshal_StencilMask(ctx, (const struct marshal_cmd_StencilMask *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferReadBuffer:
+ debug_print_unmarshal("NamedFramebufferReadBuffer");
+ _mesa_unmarshal_NamedFramebufferReadBuffer(ctx, (const struct marshal_cmd_NamedFramebufferReadBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformHandleui64ARB:
+ debug_print_unmarshal("ProgramUniformHandleui64ARB");
+ _mesa_unmarshal_ProgramUniformHandleui64ARB(ctx, (const struct marshal_cmd_ProgramUniformHandleui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2i64ARB:
+ debug_print_unmarshal("ProgramUniform2i64ARB");
+ _mesa_unmarshal_ProgramUniform2i64ARB(ctx, (const struct marshal_cmd_ProgramUniform2i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_ClearBufferiv:
+ debug_print_unmarshal("ClearBufferiv");
+ _mesa_unmarshal_ClearBufferiv(ctx, (const struct marshal_cmd_ClearBufferiv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2iv:
+ debug_print_unmarshal("ProgramUniform2iv");
+ _mesa_unmarshal_ProgramUniform2iv(ctx, (const struct marshal_cmd_ProgramUniform2iv *) cmd);
+ break;
+ case DISPATCH_CMD_FogCoordPointer:
+ debug_print_unmarshal("FogCoordPointer");
+ _mesa_unmarshal_FogCoordPointer(ctx, (const struct marshal_cmd_FogCoordPointer *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3us:
+ debug_print_unmarshal("SecondaryColor3us");
+ _mesa_unmarshal_SecondaryColor3us(ctx, (const struct marshal_cmd_SecondaryColor3us *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorageMem1DEXT:
+ debug_print_unmarshal("TextureStorageMem1DEXT");
+ _mesa_unmarshal_TextureStorageMem1DEXT(ctx, (const struct marshal_cmd_TextureStorageMem1DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3ub:
+ debug_print_unmarshal("SecondaryColor3ub");
+ _mesa_unmarshal_SecondaryColor3ub(ctx, (const struct marshal_cmd_SecondaryColor3ub *) cmd);
+ break;
+ case DISPATCH_CMD_NamedBufferStorageMemEXT:
+ debug_print_unmarshal("NamedBufferStorageMemEXT");
+ _mesa_unmarshal_NamedBufferStorageMemEXT(ctx, (const struct marshal_cmd_NamedBufferStorageMemEXT *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3ui:
+ debug_print_unmarshal("SecondaryColor3ui");
+ _mesa_unmarshal_SecondaryColor3ui(ctx, (const struct marshal_cmd_SecondaryColor3ui *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4ui64ARB:
+ debug_print_unmarshal("ProgramUniform4ui64ARB");
+ _mesa_unmarshal_ProgramUniform4ui64ARB(ctx, (const struct marshal_cmd_ProgramUniform4ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1sNV:
+ debug_print_unmarshal("VertexAttrib1sNV");
+ _mesa_unmarshal_VertexAttrib1sNV(ctx, (const struct marshal_cmd_VertexAttrib1sNV *) cmd);
+ break;
+ case DISPATCH_CMD_TextureBuffer:
+ debug_print_unmarshal("TextureBuffer");
+ _mesa_unmarshal_TextureBuffer(ctx, (const struct marshal_cmd_TextureBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_InitNames:
+ debug_print_unmarshal("InitNames");
+ _mesa_unmarshal_InitNames(ctx, (const struct marshal_cmd_InitNames *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3sv:
+ debug_print_unmarshal("Normal3sv");
+ _mesa_unmarshal_Normal3sv(ctx, (const struct marshal_cmd_Normal3sv *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteQueries:
+ debug_print_unmarshal("DeleteQueries");
+ _mesa_unmarshal_DeleteQueries(ctx, (const struct marshal_cmd_DeleteQueries *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateFramebuffer:
+ debug_print_unmarshal("InvalidateFramebuffer");
+ _mesa_unmarshal_InvalidateFramebuffer(ctx, (const struct marshal_cmd_InvalidateFramebuffer *) cmd);
+ break;
+ case DISPATCH_CMD_Hint:
+ debug_print_unmarshal("Hint");
+ _mesa_unmarshal_Hint(ctx, (const struct marshal_cmd_Hint *) cmd);
+ break;
+ case DISPATCH_CMD_MemoryBarrier:
+ debug_print_unmarshal("MemoryBarrier");
+ _mesa_unmarshal_MemoryBarrier(ctx, (const struct marshal_cmd_MemoryBarrier *) cmd);
+ break;
+ case DISPATCH_CMD_CopyColorSubTable:
+ debug_print_unmarshal("CopyColorSubTable");
+ _mesa_unmarshal_CopyColorSubTable(ctx, (const struct marshal_cmd_CopyColorSubTable *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexsvOES:
+ debug_print_unmarshal("DrawTexsvOES");
+ _mesa_unmarshal_DrawTexsvOES(ctx, (const struct marshal_cmd_DrawTexsvOES *) cmd);
+ break;
+ case DISPATCH_CMD_Disable:
+ debug_print_unmarshal("Disable");
+ _mesa_unmarshal_Disable(ctx, (const struct marshal_cmd_Disable *) cmd);
+ break;
+ case DISPATCH_CMD_ClearColor:
+ debug_print_unmarshal("ClearColor");
+ _mesa_unmarshal_ClearColor(ctx, (const struct marshal_cmd_ClearColor *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4iv:
+ debug_print_unmarshal("RasterPos4iv");
+ _mesa_unmarshal_RasterPos4iv(ctx, (const struct marshal_cmd_RasterPos4iv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix2x3fv:
+ debug_print_unmarshal("ProgramUniformMatrix2x3fv");
+ _mesa_unmarshal_ProgramUniformMatrix2x3fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix2x3fv *) cmd);
+ break;
+ case DISPATCH_CMD_BindVertexBuffer:
+ debug_print_unmarshal("BindVertexBuffer");
+ _mesa_unmarshal_BindVertexBuffer(ctx, (const struct marshal_cmd_BindVertexBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4i:
+ debug_print_unmarshal("RasterPos4i");
+ _mesa_unmarshal_RasterPos4i(ctx, (const struct marshal_cmd_RasterPos4i *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4d:
+ debug_print_unmarshal("RasterPos4d");
+ _mesa_unmarshal_RasterPos4d(ctx, (const struct marshal_cmd_RasterPos4d *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4f:
+ debug_print_unmarshal("RasterPos4f");
+ _mesa_unmarshal_RasterPos4f(ctx, (const struct marshal_cmd_RasterPos4f *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3dv:
+ debug_print_unmarshal("RasterPos3dv");
+ _mesa_unmarshal_RasterPos3dv(ctx, (const struct marshal_cmd_RasterPos3dv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1iv:
+ debug_print_unmarshal("TexCoord1iv");
+ _mesa_unmarshal_TexCoord1iv(ctx, (const struct marshal_cmd_TexCoord1iv *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4s:
+ debug_print_unmarshal("RasterPos4s");
+ _mesa_unmarshal_RasterPos4s(ctx, (const struct marshal_cmd_RasterPos4s *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3dv:
+ debug_print_unmarshal("VertexAttrib3dv");
+ _mesa_unmarshal_VertexAttrib3dv(ctx, (const struct marshal_cmd_VertexAttrib3dv *) cmd);
+ break;
+ case DISPATCH_CMD_Histogram:
+ debug_print_unmarshal("Histogram");
+ _mesa_unmarshal_Histogram(ctx, (const struct marshal_cmd_Histogram *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2fv:
+ debug_print_unmarshal("Uniform2fv");
+ _mesa_unmarshal_Uniform2fv(ctx, (const struct marshal_cmd_Uniform2fv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3x4dv:
+ debug_print_unmarshal("ProgramUniformMatrix3x4dv");
+ _mesa_unmarshal_ProgramUniformMatrix3x4dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3x4dv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawBuffers:
+ debug_print_unmarshal("DrawBuffers");
+ _mesa_unmarshal_DrawBuffers(ctx, (const struct marshal_cmd_DrawBuffers *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribL1ui64ARB:
+ debug_print_unmarshal("VertexAttribL1ui64ARB");
+ _mesa_unmarshal_VertexAttribL1ui64ARB(ctx, (const struct marshal_cmd_VertexAttribL1ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_Color3uiv:
+ debug_print_unmarshal("Color3uiv");
+ _mesa_unmarshal_Color3uiv(ctx, (const struct marshal_cmd_Color3uiv *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord2fv:
+ debug_print_unmarshal("EvalCoord2fv");
+ _mesa_unmarshal_EvalCoord2fv(ctx, (const struct marshal_cmd_EvalCoord2fv *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage3DEXT:
+ debug_print_unmarshal("TextureStorage3DEXT");
+ _mesa_unmarshal_TextureStorage3DEXT(ctx, (const struct marshal_cmd_TextureStorage3DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2fARB:
+ debug_print_unmarshal("VertexAttrib2fARB");
+ _mesa_unmarshal_VertexAttrib2fARB(ctx, (const struct marshal_cmd_VertexAttrib2fARB *) cmd);
+ break;
+ case DISPATCH_CMD_BeginPerfMonitorAMD:
+ debug_print_unmarshal("BeginPerfMonitorAMD");
+ _mesa_unmarshal_BeginPerfMonitorAMD(ctx, (const struct marshal_cmd_BeginPerfMonitorAMD *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3bv:
+ debug_print_unmarshal("Normal3bv");
+ _mesa_unmarshal_Normal3bv(ctx, (const struct marshal_cmd_Normal3bv *) cmd);
+ break;
+ case DISPATCH_CMD_BeginQueryIndexed:
+ debug_print_unmarshal("BeginQueryIndexed");
+ _mesa_unmarshal_BeginQueryIndexed(ctx, (const struct marshal_cmd_BeginQueryIndexed *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3iv:
+ debug_print_unmarshal("Vertex3iv");
+ _mesa_unmarshal_Vertex3iv(ctx, (const struct marshal_cmd_Vertex3iv *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2x3dv:
+ debug_print_unmarshal("UniformMatrix2x3dv");
+ _mesa_unmarshal_UniformMatrix2x3dv(ctx, (const struct marshal_cmd_UniformMatrix2x3dv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3dv:
+ debug_print_unmarshal("TexCoord3dv");
+ _mesa_unmarshal_TexCoord3dv(ctx, (const struct marshal_cmd_TexCoord3dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexP3ui:
+ debug_print_unmarshal("VertexP3ui");
+ _mesa_unmarshal_VertexP3ui(ctx, (const struct marshal_cmd_VertexP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3fv:
+ debug_print_unmarshal("UniformMatrix3fv");
+ _mesa_unmarshal_UniformMatrix3fv(ctx, (const struct marshal_cmd_UniformMatrix3fv *) cmd);
+ break;
+ case DISPATCH_CMD_PrioritizeTextures:
+ debug_print_unmarshal("PrioritizeTextures");
+ _mesa_unmarshal_PrioritizeTextures(ctx, (const struct marshal_cmd_PrioritizeTextures *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI3uiEXT:
+ debug_print_unmarshal("VertexAttribI3uiEXT");
+ _mesa_unmarshal_VertexAttribI3uiEXT(ctx, (const struct marshal_cmd_VertexAttribI3uiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1i64ARB:
+ debug_print_unmarshal("ProgramUniform1i64ARB");
+ _mesa_unmarshal_ProgramUniform1i64ARB(ctx, (const struct marshal_cmd_ProgramUniform1i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3uiv:
+ debug_print_unmarshal("SecondaryColor3uiv");
+ _mesa_unmarshal_SecondaryColor3uiv(ctx, (const struct marshal_cmd_SecondaryColor3uiv *) cmd);
+ break;
+ case DISPATCH_CMD_EndConditionalRender:
+ debug_print_unmarshal("EndConditionalRender");
+ _mesa_unmarshal_EndConditionalRender(ctx, (const struct marshal_cmd_EndConditionalRender *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramLocalParameter4dARB:
+ debug_print_unmarshal("ProgramLocalParameter4dARB");
+ _mesa_unmarshal_ProgramLocalParameter4dARB(ctx, (const struct marshal_cmd_ProgramLocalParameter4dARB *) cmd);
+ break;
+ case DISPATCH_CMD_Color3sv:
+ debug_print_unmarshal("Color3sv");
+ _mesa_unmarshal_Color3sv(ctx, (const struct marshal_cmd_Color3sv *) cmd);
+ break;
+ case DISPATCH_CMD_BlendEquationSeparateiARB:
+ debug_print_unmarshal("BlendEquationSeparateiARB");
+ _mesa_unmarshal_BlendEquationSeparateiARB(ctx, (const struct marshal_cmd_BlendEquationSeparateiARB *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1fvARB:
+ debug_print_unmarshal("MultiTexCoord1fvARB");
+ _mesa_unmarshal_MultiTexCoord1fvARB(ctx, (const struct marshal_cmd_MultiTexCoord1fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorage2D:
+ debug_print_unmarshal("TexStorage2D");
+ _mesa_unmarshal_TexStorage2D(ctx, (const struct marshal_cmd_TexStorage2D *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferTexture2D:
+ debug_print_unmarshal("FramebufferTexture2D");
+ _mesa_unmarshal_FramebufferTexture2D(ctx, (const struct marshal_cmd_FramebufferTexture2D *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2dv:
+ debug_print_unmarshal("VertexAttrib2dv");
+ _mesa_unmarshal_VertexAttrib2dv(ctx, (const struct marshal_cmd_VertexAttrib2dv *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex4sv:
+ debug_print_unmarshal("Vertex4sv");
+ _mesa_unmarshal_Vertex4sv(ctx, (const struct marshal_cmd_Vertex4sv *) cmd);
+ break;
+ case DISPATCH_CMD_ClampColor:
+ debug_print_unmarshal("ClampColor");
+ _mesa_unmarshal_ClampColor(ctx, (const struct marshal_cmd_ClampColor *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1i64ARB:
+ debug_print_unmarshal("Uniform1i64ARB");
+ _mesa_unmarshal_Uniform1i64ARB(ctx, (const struct marshal_cmd_Uniform1i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_AlphaFunc:
+ debug_print_unmarshal("AlphaFunc");
+ _mesa_unmarshal_AlphaFunc(ctx, (const struct marshal_cmd_AlphaFunc *) cmd);
+ break;
+ case DISPATCH_CMD_EdgeFlag:
+ debug_print_unmarshal("EdgeFlag");
+ _mesa_unmarshal_EdgeFlag(ctx, (const struct marshal_cmd_EdgeFlag *) cmd);
+ break;
+ case DISPATCH_CMD_EdgeFlagv:
+ debug_print_unmarshal("EdgeFlagv");
+ _mesa_unmarshal_EdgeFlagv(ctx, (const struct marshal_cmd_EdgeFlagv *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRangex:
+ debug_print_unmarshal("DepthRangex");
+ _mesa_unmarshal_DepthRangex(ctx, (const struct marshal_cmd_DepthRangex *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRangef:
+ debug_print_unmarshal("DepthRangef");
+ _mesa_unmarshal_DepthRangef(ctx, (const struct marshal_cmd_DepthRangef *) cmd);
+ break;
+ case DISPATCH_CMD_ColorFragmentOp3ATI:
+ debug_print_unmarshal("ColorFragmentOp3ATI");
+ _mesa_unmarshal_ColorFragmentOp3ATI(ctx, (const struct marshal_cmd_ColorFragmentOp3ATI *) cmd);
+ break;
+ case DISPATCH_CMD_ValidateProgram:
+ debug_print_unmarshal("ValidateProgram");
+ _mesa_unmarshal_ValidateProgram(ctx, (const struct marshal_cmd_ValidateProgram *) cmd);
+ break;
+ case DISPATCH_CMD_VertexPointerEXT:
+ debug_print_unmarshal("VertexPointerEXT");
+ _mesa_unmarshal_VertexPointerEXT(ctx, (const struct marshal_cmd_VertexPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Scissor:
+ debug_print_unmarshal("Scissor");
+ _mesa_unmarshal_Scissor(ctx, (const struct marshal_cmd_Scissor *) cmd);
+ break;
+ case DISPATCH_CMD_BeginTransformFeedback:
+ debug_print_unmarshal("BeginTransformFeedback");
+ _mesa_unmarshal_BeginTransformFeedback(ctx, (const struct marshal_cmd_BeginTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2i:
+ debug_print_unmarshal("TexCoord2i");
+ _mesa_unmarshal_TexCoord2i(ctx, (const struct marshal_cmd_TexCoord2i *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayAttribBinding:
+ debug_print_unmarshal("VertexArrayAttribBinding");
+ _mesa_unmarshal_VertexArrayAttribBinding(ctx, (const struct marshal_cmd_VertexArrayAttribBinding *) cmd);
+ break;
+ case DISPATCH_CMD_Color4ui:
+ debug_print_unmarshal("Color4ui");
+ _mesa_unmarshal_Color4ui(ctx, (const struct marshal_cmd_Color4ui *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2f:
+ debug_print_unmarshal("TexCoord2f");
+ _mesa_unmarshal_TexCoord2f(ctx, (const struct marshal_cmd_TexCoord2f *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2d:
+ debug_print_unmarshal("TexCoord2d");
+ _mesa_unmarshal_TexCoord2d(ctx, (const struct marshal_cmd_TexCoord2d *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2s:
+ debug_print_unmarshal("TexCoord2s");
+ _mesa_unmarshal_TexCoord2s(ctx, (const struct marshal_cmd_TexCoord2s *) cmd);
+ break;
+ case DISPATCH_CMD_Color4us:
+ debug_print_unmarshal("Color4us");
+ _mesa_unmarshal_Color4us(ctx, (const struct marshal_cmd_Color4us *) cmd);
+ break;
+ case DISPATCH_CMD_Color3bv:
+ debug_print_unmarshal("Color3bv");
+ _mesa_unmarshal_Color3bv(ctx, (const struct marshal_cmd_Color3bv *) cmd);
+ break;
+ case DISPATCH_CMD_PrimitiveRestartNV:
+ debug_print_unmarshal("PrimitiveRestartNV");
+ _mesa_unmarshal_PrimitiveRestartNV(ctx, (const struct marshal_cmd_PrimitiveRestartNV *) cmd);
+ break;
+ case DISPATCH_CMD_BindBufferOffsetEXT:
+ debug_print_unmarshal("BindBufferOffsetEXT");
+ _mesa_unmarshal_BindBufferOffsetEXT(ctx, (const struct marshal_cmd_BindBufferOffsetEXT *) cmd);
+ break;
+ case DISPATCH_CMD_ProvokingVertex:
+ debug_print_unmarshal("ProvokingVertex");
+ _mesa_unmarshal_ProvokingVertex(ctx, (const struct marshal_cmd_ProvokingVertex *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs4fvNV:
+ debug_print_unmarshal("VertexAttribs4fvNV");
+ _mesa_unmarshal_VertexAttribs4fvNV(ctx, (const struct marshal_cmd_VertexAttribs4fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2i:
+ debug_print_unmarshal("Vertex2i");
+ _mesa_unmarshal_Vertex2i(ctx, (const struct marshal_cmd_Vertex2i *) cmd);
+ break;
+ case DISPATCH_CMD_GetQueryBufferObjecti64v:
+ debug_print_unmarshal("GetQueryBufferObjecti64v");
+ _mesa_unmarshal_GetQueryBufferObjecti64v(ctx, (const struct marshal_cmd_GetQueryBufferObjecti64v *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2fv:
+ debug_print_unmarshal("RasterPos2fv");
+ _mesa_unmarshal_RasterPos2fv(ctx, (const struct marshal_cmd_RasterPos2fv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1fv:
+ debug_print_unmarshal("TexCoord1fv");
+ _mesa_unmarshal_TexCoord1fv(ctx, (const struct marshal_cmd_TexCoord1fv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4dv:
+ debug_print_unmarshal("MultiTexCoord4dv");
+ _mesa_unmarshal_MultiTexCoord4dv(ctx, (const struct marshal_cmd_MultiTexCoord4dv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramEnvParameter4fvARB:
+ debug_print_unmarshal("ProgramEnvParameter4fvARB");
+ _mesa_unmarshal_ProgramEnvParameter4fvARB(ctx, (const struct marshal_cmd_ProgramEnvParameter4fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4fv:
+ debug_print_unmarshal("RasterPos4fv");
+ _mesa_unmarshal_RasterPos4fv(ctx, (const struct marshal_cmd_RasterPos4fv *) cmd);
+ break;
+ case DISPATCH_CMD_PushMatrix:
+ debug_print_unmarshal("PushMatrix");
+ _mesa_unmarshal_PushMatrix(ctx, (const struct marshal_cmd_PushMatrix *) cmd);
+ break;
+ case DISPATCH_CMD_EndList:
+ debug_print_unmarshal("EndList");
+ _mesa_unmarshal_EndList(ctx, (const struct marshal_cmd_EndList *) cmd);
+ break;
+ case DISPATCH_CMD_DrawRangeElements:
+ debug_print_unmarshal("DrawRangeElements");
+ _mesa_unmarshal_DrawRangeElements(ctx, (const struct marshal_cmd_DrawRangeElements *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexfvOES:
+ debug_print_unmarshal("DrawTexfvOES");
+ _mesa_unmarshal_DrawTexfvOES(ctx, (const struct marshal_cmd_DrawTexfvOES *) cmd);
+ break;
+ case DISPATCH_CMD_BlendFunciARB:
+ debug_print_unmarshal("BlendFunciARB");
+ _mesa_unmarshal_BlendFunciARB(ctx, (const struct marshal_cmd_BlendFunciARB *) cmd);
+ break;
+ case DISPATCH_CMD_ClearNamedFramebufferfi:
+ debug_print_unmarshal("ClearNamedFramebufferfi");
+ _mesa_unmarshal_ClearNamedFramebufferfi(ctx, (const struct marshal_cmd_ClearNamedFramebufferfi *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2ui:
+ debug_print_unmarshal("Uniform2ui");
+ _mesa_unmarshal_Uniform2ui(ctx, (const struct marshal_cmd_Uniform2ui *) cmd);
+ break;
+ case DISPATCH_CMD_ScissorIndexed:
+ debug_print_unmarshal("ScissorIndexed");
+ _mesa_unmarshal_ScissorIndexed(ctx, (const struct marshal_cmd_ScissorIndexed *) cmd);
+ break;
+ case DISPATCH_CMD_End:
+ debug_print_unmarshal("End");
+ _mesa_unmarshal_End(ctx, (const struct marshal_cmd_End *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferParameteri:
+ debug_print_unmarshal("NamedFramebufferParameteri");
+ _mesa_unmarshal_NamedFramebufferParameteri(ctx, (const struct marshal_cmd_NamedFramebufferParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_Enable:
+ debug_print_unmarshal("Enable");
+ _mesa_unmarshal_Enable(ctx, (const struct marshal_cmd_Enable *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3x:
+ debug_print_unmarshal("Normal3x");
+ _mesa_unmarshal_Normal3x(ctx, (const struct marshal_cmd_Normal3x *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4fARB:
+ debug_print_unmarshal("VertexAttrib4fARB");
+ _mesa_unmarshal_VertexAttrib4fARB(ctx, (const struct marshal_cmd_VertexAttrib4fARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4fv:
+ debug_print_unmarshal("TexCoord4fv");
+ _mesa_unmarshal_TexCoord4fv(ctx, (const struct marshal_cmd_TexCoord4fv *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateTexSubImage:
+ debug_print_unmarshal("InvalidateTexSubImage");
+ _mesa_unmarshal_InvalidateTexSubImage(ctx, (const struct marshal_cmd_InvalidateTexSubImage *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3s:
+ debug_print_unmarshal("Normal3s");
+ _mesa_unmarshal_Normal3s(ctx, (const struct marshal_cmd_Normal3s *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3i:
+ debug_print_unmarshal("Normal3i");
+ _mesa_unmarshal_Normal3i(ctx, (const struct marshal_cmd_Normal3i *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3b:
+ debug_print_unmarshal("Normal3b");
+ _mesa_unmarshal_Normal3b(ctx, (const struct marshal_cmd_Normal3b *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3d:
+ debug_print_unmarshal("Normal3d");
+ _mesa_unmarshal_Normal3d(ctx, (const struct marshal_cmd_Normal3d *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3f:
+ debug_print_unmarshal("Normal3f");
+ _mesa_unmarshal_Normal3f(ctx, (const struct marshal_cmd_Normal3f *) cmd);
+ break;
+ case DISPATCH_CMD_Indexi:
+ debug_print_unmarshal("Indexi");
+ _mesa_unmarshal_Indexi(ctx, (const struct marshal_cmd_Indexi *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1uiv:
+ debug_print_unmarshal("Uniform1uiv");
+ _mesa_unmarshal_Uniform1uiv(ctx, (const struct marshal_cmd_Uniform1uiv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI2uiEXT:
+ debug_print_unmarshal("VertexAttribI2uiEXT");
+ _mesa_unmarshal_VertexAttribI2uiEXT(ctx, (const struct marshal_cmd_VertexAttribI2uiEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Indexf:
+ debug_print_unmarshal("Indexf");
+ _mesa_unmarshal_Indexf(ctx, (const struct marshal_cmd_Indexf *) cmd);
+ break;
+ case DISPATCH_CMD_Indexd:
+ debug_print_unmarshal("Indexd");
+ _mesa_unmarshal_Indexd(ctx, (const struct marshal_cmd_Indexd *) cmd);
+ break;
+ case DISPATCH_CMD_Indexs:
+ debug_print_unmarshal("Indexs");
+ _mesa_unmarshal_Indexs(ctx, (const struct marshal_cmd_Indexs *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2d:
+ debug_print_unmarshal("Vertex2d");
+ _mesa_unmarshal_Vertex2d(ctx, (const struct marshal_cmd_Vertex2d *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2f:
+ debug_print_unmarshal("Vertex2f");
+ _mesa_unmarshal_Vertex2f(ctx, (const struct marshal_cmd_Vertex2f *) cmd);
+ break;
+ case DISPATCH_CMD_Color4bv:
+ debug_print_unmarshal("Color4bv");
+ _mesa_unmarshal_Color4bv(ctx, (const struct marshal_cmd_Color4bv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3x2dv:
+ debug_print_unmarshal("ProgramUniformMatrix3x2dv");
+ _mesa_unmarshal_ProgramUniformMatrix3x2dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3x2dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2fvNV:
+ debug_print_unmarshal("VertexAttrib2fvNV");
+ _mesa_unmarshal_VertexAttrib2fvNV(ctx, (const struct marshal_cmd_VertexAttrib2fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2s:
+ debug_print_unmarshal("Vertex2s");
+ _mesa_unmarshal_Vertex2s(ctx, (const struct marshal_cmd_Vertex2s *) cmd);
+ break;
+ case DISPATCH_CMD_ActiveTexture:
+ debug_print_unmarshal("ActiveTexture");
+ _mesa_unmarshal_ActiveTexture(ctx, (const struct marshal_cmd_ActiveTexture *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexxOES:
+ debug_print_unmarshal("DrawTexxOES");
+ _mesa_unmarshal_DrawTexxOES(ctx, (const struct marshal_cmd_DrawTexxOES *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoordP3ui:
+ debug_print_unmarshal("MultiTexCoordP3ui");
+ _mesa_unmarshal_MultiTexCoordP3ui(ctx, (const struct marshal_cmd_MultiTexCoordP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_DrawBuffer:
+ debug_print_unmarshal("DrawBuffer");
+ _mesa_unmarshal_DrawBuffer(ctx, (const struct marshal_cmd_DrawBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2dv:
+ debug_print_unmarshal("MultiTexCoord2dv");
+ _mesa_unmarshal_MultiTexCoord2dv(ctx, (const struct marshal_cmd_MultiTexCoord2dv *) cmd);
+ break;
+ case DISPATCH_CMD_BlendFunc:
+ debug_print_unmarshal("BlendFunc");
+ _mesa_unmarshal_BlendFunc(ctx, (const struct marshal_cmd_BlendFunc *) cmd);
+ break;
+ case DISPATCH_CMD_NamedRenderbufferStorageMultisample:
+ debug_print_unmarshal("NamedRenderbufferStorageMultisample");
+ _mesa_unmarshal_NamedRenderbufferStorageMultisample(ctx, (const struct marshal_cmd_NamedRenderbufferStorageMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_ColorMaterial:
+ debug_print_unmarshal("ColorMaterial");
+ _mesa_unmarshal_ColorMaterial(ctx, (const struct marshal_cmd_ColorMaterial *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos3sv:
+ debug_print_unmarshal("RasterPos3sv");
+ _mesa_unmarshal_RasterPos3sv(ctx, (const struct marshal_cmd_RasterPos3sv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordP2ui:
+ debug_print_unmarshal("TexCoordP2ui");
+ _mesa_unmarshal_TexCoordP2ui(ctx, (const struct marshal_cmd_TexCoordP2ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3fvARB:
+ debug_print_unmarshal("VertexAttrib3fvARB");
+ _mesa_unmarshal_VertexAttrib3fvARB(ctx, (const struct marshal_cmd_VertexAttrib3fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3x4fv:
+ debug_print_unmarshal("ProgramUniformMatrix3x4fv");
+ _mesa_unmarshal_ProgramUniformMatrix3x4fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3x4fv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3i:
+ debug_print_unmarshal("TexCoord3i");
+ _mesa_unmarshal_TexCoord3i(ctx, (const struct marshal_cmd_TexCoord3i *) cmd);
+ break;
+ case DISPATCH_CMD_CopyColorTable:
+ debug_print_unmarshal("CopyColorTable");
+ _mesa_unmarshal_CopyColorTable(ctx, (const struct marshal_cmd_CopyColorTable *) cmd);
+ break;
+ case DISPATCH_CMD_Frustum:
+ debug_print_unmarshal("Frustum");
+ _mesa_unmarshal_Frustum(ctx, (const struct marshal_cmd_Frustum *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3d:
+ debug_print_unmarshal("TexCoord3d");
+ _mesa_unmarshal_TexCoord3d(ctx, (const struct marshal_cmd_TexCoord3d *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3f:
+ debug_print_unmarshal("TexCoord3f");
+ _mesa_unmarshal_TexCoord3f(ctx, (const struct marshal_cmd_TexCoord3f *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRangeArrayv:
+ debug_print_unmarshal("DepthRangeArrayv");
+ _mesa_unmarshal_DepthRangeArrayv(ctx, (const struct marshal_cmd_DepthRangeArrayv *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteTextures:
+ debug_print_unmarshal("DeleteTextures");
+ _mesa_unmarshal_DeleteTextures(ctx, (const struct marshal_cmd_DeleteTextures *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordPointerEXT:
+ debug_print_unmarshal("TexCoordPointerEXT");
+ _mesa_unmarshal_TexCoordPointerEXT(ctx, (const struct marshal_cmd_TexCoordPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3s:
+ debug_print_unmarshal("TexCoord3s");
+ _mesa_unmarshal_TexCoord3s(ctx, (const struct marshal_cmd_TexCoord3s *) cmd);
+ break;
+ case DISPATCH_CMD_ClearAccum:
+ debug_print_unmarshal("ClearAccum");
+ _mesa_unmarshal_ClearAccum(ctx, (const struct marshal_cmd_ClearAccum *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4iv:
+ debug_print_unmarshal("TexCoord4iv");
+ _mesa_unmarshal_TexCoord4iv(ctx, (const struct marshal_cmd_TexCoord4iv *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorage3D:
+ debug_print_unmarshal("TexStorage3D");
+ _mesa_unmarshal_TexStorage3D(ctx, (const struct marshal_cmd_TexStorage3D *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2i64ARB:
+ debug_print_unmarshal("Uniform2i64ARB");
+ _mesa_unmarshal_Uniform2i64ARB(ctx, (const struct marshal_cmd_Uniform2i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferTexture3D:
+ debug_print_unmarshal("FramebufferTexture3D");
+ _mesa_unmarshal_FramebufferTexture3D(ctx, (const struct marshal_cmd_FramebufferTexture3D *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2fNV:
+ debug_print_unmarshal("VertexAttrib2fNV");
+ _mesa_unmarshal_VertexAttrib2fNV(ctx, (const struct marshal_cmd_VertexAttrib2fNV *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTexImage2D:
+ debug_print_unmarshal("CopyTexImage2D");
+ _mesa_unmarshal_CopyTexImage2D(ctx, (const struct marshal_cmd_CopyTexImage2D *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3fv:
+ debug_print_unmarshal("Vertex3fv");
+ _mesa_unmarshal_Vertex3fv(ctx, (const struct marshal_cmd_Vertex3fv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2i64vARB:
+ debug_print_unmarshal("ProgramUniform2i64vARB");
+ _mesa_unmarshal_ProgramUniform2i64vARB(ctx, (const struct marshal_cmd_ProgramUniform2i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoordP2ui:
+ debug_print_unmarshal("MultiTexCoordP2ui");
+ _mesa_unmarshal_MultiTexCoordP2ui(ctx, (const struct marshal_cmd_MultiTexCoordP2ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs1dvNV:
+ debug_print_unmarshal("VertexAttribs1dvNV");
+ _mesa_unmarshal_VertexAttribs1dvNV(ctx, (const struct marshal_cmd_VertexAttribs1dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_ImportSemaphoreFdEXT:
+ debug_print_unmarshal("ImportSemaphoreFdEXT");
+ _mesa_unmarshal_ImportSemaphoreFdEXT(ctx, (const struct marshal_cmd_ImportSemaphoreFdEXT *) cmd);
+ break;
+ case DISPATCH_CMD_EdgeFlagPointerEXT:
+ debug_print_unmarshal("EdgeFlagPointerEXT");
+ _mesa_unmarshal_EdgeFlagPointerEXT(ctx, (const struct marshal_cmd_EdgeFlagPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs2svNV:
+ debug_print_unmarshal("VertexAttribs2svNV");
+ _mesa_unmarshal_VertexAttribs2svNV(ctx, (const struct marshal_cmd_VertexAttribs2svNV *) cmd);
+ break;
+ case DISPATCH_CMD_BlendEquationiARB:
+ debug_print_unmarshal("BlendEquationiARB");
+ _mesa_unmarshal_BlendEquationiARB(ctx, (const struct marshal_cmd_BlendEquationiARB *) cmd);
+ break;
+ case DISPATCH_CMD_PointSizex:
+ debug_print_unmarshal("PointSizex");
+ _mesa_unmarshal_PointSizex(ctx, (const struct marshal_cmd_PointSizex *) cmd);
+ break;
+ case DISPATCH_CMD_PolygonMode:
+ debug_print_unmarshal("PolygonMode");
+ _mesa_unmarshal_PolygonMode(ctx, (const struct marshal_cmd_PolygonMode *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3iv:
+ debug_print_unmarshal("SecondaryColor3iv");
+ _mesa_unmarshal_SecondaryColor3iv(ctx, (const struct marshal_cmd_SecondaryColor3iv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI1iEXT:
+ debug_print_unmarshal("VertexAttribI1iEXT");
+ _mesa_unmarshal_VertexAttribI1iEXT(ctx, (const struct marshal_cmd_VertexAttribI1iEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Niv:
+ debug_print_unmarshal("VertexAttrib4Niv");
+ _mesa_unmarshal_VertexAttrib4Niv(ctx, (const struct marshal_cmd_VertexAttrib4Niv *) cmd);
+ break;
+ case DISPATCH_CMD_LinkProgram:
+ debug_print_unmarshal("LinkProgram");
+ _mesa_unmarshal_LinkProgram(ctx, (const struct marshal_cmd_LinkProgram *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4d:
+ debug_print_unmarshal("ProgramUniform4d");
+ _mesa_unmarshal_ProgramUniform4d(ctx, (const struct marshal_cmd_ProgramUniform4d *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4f:
+ debug_print_unmarshal("ProgramUniform4f");
+ _mesa_unmarshal_ProgramUniform4f(ctx, (const struct marshal_cmd_ProgramUniform4f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4i:
+ debug_print_unmarshal("ProgramUniform4i");
+ _mesa_unmarshal_ProgramUniform4i(ctx, (const struct marshal_cmd_ProgramUniform4i *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4d:
+ debug_print_unmarshal("VertexAttrib4d");
+ _mesa_unmarshal_VertexAttrib4d(ctx, (const struct marshal_cmd_VertexAttrib4d *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4ui64vARB:
+ debug_print_unmarshal("ProgramUniform4ui64vARB");
+ _mesa_unmarshal_ProgramUniform4ui64vARB(ctx, (const struct marshal_cmd_ProgramUniform4ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos4sMESA:
+ debug_print_unmarshal("WindowPos4sMESA");
+ _mesa_unmarshal_WindowPos4sMESA(ctx, (const struct marshal_cmd_WindowPos4sMESA *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4s:
+ debug_print_unmarshal("VertexAttrib4s");
+ _mesa_unmarshal_VertexAttrib4s(ctx, (const struct marshal_cmd_VertexAttrib4s *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1i64vARB:
+ debug_print_unmarshal("ProgramUniform1i64vARB");
+ _mesa_unmarshal_ProgramUniform1i64vARB(ctx, (const struct marshal_cmd_ProgramUniform1i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1dvNV:
+ debug_print_unmarshal("VertexAttrib1dvNV");
+ _mesa_unmarshal_VertexAttrib1dvNV(ctx, (const struct marshal_cmd_VertexAttrib1dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorage3DMultisample:
+ debug_print_unmarshal("TexStorage3DMultisample");
+ _mesa_unmarshal_TexStorage3DMultisample(ctx, (const struct marshal_cmd_TexStorage3DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_ScissorIndexedv:
+ debug_print_unmarshal("ScissorIndexedv");
+ _mesa_unmarshal_ScissorIndexedv(ctx, (const struct marshal_cmd_ScissorIndexedv *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2dv:
+ debug_print_unmarshal("Uniform2dv");
+ _mesa_unmarshal_Uniform2dv(ctx, (const struct marshal_cmd_Uniform2dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4dv:
+ debug_print_unmarshal("VertexAttrib4dv");
+ _mesa_unmarshal_VertexAttrib4dv(ctx, (const struct marshal_cmd_VertexAttrib4dv *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord2dv:
+ debug_print_unmarshal("EvalCoord2dv");
+ _mesa_unmarshal_EvalCoord2dv(ctx, (const struct marshal_cmd_EvalCoord2dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1fNV:
+ debug_print_unmarshal("VertexAttrib1fNV");
+ _mesa_unmarshal_VertexAttrib1fNV(ctx, (const struct marshal_cmd_VertexAttrib1fNV *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos2iv:
+ debug_print_unmarshal("RasterPos2iv");
+ _mesa_unmarshal_RasterPos2iv(ctx, (const struct marshal_cmd_RasterPos2iv *) cmd);
+ break;
+ case DISPATCH_CMD_FrontFace:
+ debug_print_unmarshal("FrontFace");
+ _mesa_unmarshal_FrontFace(ctx, (const struct marshal_cmd_FrontFace *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3dv:
+ debug_print_unmarshal("Normal3dv");
+ _mesa_unmarshal_Normal3dv(ctx, (const struct marshal_cmd_Normal3dv *) cmd);
+ break;
+ case DISPATCH_CMD_Lightf:
+ debug_print_unmarshal("Lightf");
+ _mesa_unmarshal_Lightf(ctx, (const struct marshal_cmd_Lightf *) cmd);
+ break;
+ case DISPATCH_CMD_MatrixMode:
+ debug_print_unmarshal("MatrixMode");
+ _mesa_unmarshal_MatrixMode(ctx, (const struct marshal_cmd_MatrixMode *) cmd);
+ break;
+ case DISPATCH_CMD_Lighti:
+ debug_print_unmarshal("Lighti");
+ _mesa_unmarshal_Lighti(ctx, (const struct marshal_cmd_Lighti *) cmd);
+ break;
+ case DISPATCH_CMD_Lightx:
+ debug_print_unmarshal("Lightx");
+ _mesa_unmarshal_Lightx(ctx, (const struct marshal_cmd_Lightx *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3fv:
+ debug_print_unmarshal("ProgramUniform3fv");
+ _mesa_unmarshal_ProgramUniform3fv(ctx, (const struct marshal_cmd_ProgramUniform3fv *) cmd);
+ break;
+ case DISPATCH_CMD_MultMatrixd:
+ debug_print_unmarshal("MultMatrixd");
+ _mesa_unmarshal_MultMatrixd(ctx, (const struct marshal_cmd_MultMatrixd *) cmd);
+ break;
+ case DISPATCH_CMD_MultMatrixf:
+ debug_print_unmarshal("MultMatrixf");
+ _mesa_unmarshal_MultMatrixf(ctx, (const struct marshal_cmd_MultMatrixf *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4ui64vARB:
+ debug_print_unmarshal("Uniform4ui64vARB");
+ _mesa_unmarshal_Uniform4ui64vARB(ctx, (const struct marshal_cmd_Uniform4ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4fvARB:
+ debug_print_unmarshal("MultiTexCoord4fvARB");
+ _mesa_unmarshal_MultiTexCoord4fvARB(ctx, (const struct marshal_cmd_MultiTexCoord4fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix2x3fv:
+ debug_print_unmarshal("UniformMatrix2x3fv");
+ _mesa_unmarshal_UniformMatrix2x3fv(ctx, (const struct marshal_cmd_UniformMatrix2x3fv *) cmd);
+ break;
+ case DISPATCH_CMD_SamplerParameterf:
+ debug_print_unmarshal("SamplerParameterf");
+ _mesa_unmarshal_SamplerParameterf(ctx, (const struct marshal_cmd_SamplerParameterf *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3dv:
+ debug_print_unmarshal("UniformMatrix3dv");
+ _mesa_unmarshal_UniformMatrix3dv(ctx, (const struct marshal_cmd_UniformMatrix3dv *) cmd);
+ break;
+ case DISPATCH_CMD_PointParameterx:
+ debug_print_unmarshal("PointParameterx");
+ _mesa_unmarshal_PointParameterx(ctx, (const struct marshal_cmd_PointParameterx *) cmd);
+ break;
+ case DISPATCH_CMD_DrawArrays:
+ debug_print_unmarshal("DrawArrays");
+ _mesa_unmarshal_DrawArrays(ctx, (const struct marshal_cmd_DrawArrays *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3dv:
+ debug_print_unmarshal("Uniform3dv");
+ _mesa_unmarshal_Uniform3dv(ctx, (const struct marshal_cmd_Uniform3dv *) cmd);
+ break;
+ case DISPATCH_CMD_PointParameteri:
+ debug_print_unmarshal("PointParameteri");
+ _mesa_unmarshal_PointParameteri(ctx, (const struct marshal_cmd_PointParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_PointParameterf:
+ debug_print_unmarshal("PointParameterf");
+ _mesa_unmarshal_PointParameterf(ctx, (const struct marshal_cmd_PointParameterf *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribBinding:
+ debug_print_unmarshal("VertexAttribBinding");
+ _mesa_unmarshal_VertexAttribBinding(ctx, (const struct marshal_cmd_VertexAttribBinding *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1dv:
+ debug_print_unmarshal("ProgramUniform1dv");
+ _mesa_unmarshal_ProgramUniform1dv(ctx, (const struct marshal_cmd_ProgramUniform1dv *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteBuffers:
+ debug_print_unmarshal("DeleteBuffers");
+ _mesa_unmarshal_DeleteBuffers(ctx, (const struct marshal_cmd_DeleteBuffers *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribP2ui:
+ debug_print_unmarshal("VertexAttribP2ui");
+ _mesa_unmarshal_VertexAttribP2ui(ctx, (const struct marshal_cmd_VertexAttribP2ui *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4dv:
+ debug_print_unmarshal("ProgramUniform4dv");
+ _mesa_unmarshal_ProgramUniform4dv(ctx, (const struct marshal_cmd_ProgramUniform4dv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexivOES:
+ debug_print_unmarshal("DrawTexivOES");
+ _mesa_unmarshal_DrawTexivOES(ctx, (const struct marshal_cmd_DrawTexivOES *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTexImage1D:
+ debug_print_unmarshal("CopyTexImage1D");
+ _mesa_unmarshal_CopyTexImage1D(ctx, (const struct marshal_cmd_CopyTexImage1D *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribFormat:
+ debug_print_unmarshal("VertexAttribFormat");
+ _mesa_unmarshal_VertexAttribFormat(ctx, (const struct marshal_cmd_VertexAttribFormat *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3i:
+ debug_print_unmarshal("Vertex3i");
+ _mesa_unmarshal_Vertex3i(ctx, (const struct marshal_cmd_Vertex3i *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3f:
+ debug_print_unmarshal("Vertex3f");
+ _mesa_unmarshal_Vertex3f(ctx, (const struct marshal_cmd_Vertex3f *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3d:
+ debug_print_unmarshal("Vertex3d");
+ _mesa_unmarshal_Vertex3d(ctx, (const struct marshal_cmd_Vertex3d *) cmd);
+ break;
+ case DISPATCH_CMD_ReadBuffer:
+ debug_print_unmarshal("ReadBuffer");
+ _mesa_unmarshal_ReadBuffer(ctx, (const struct marshal_cmd_ReadBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_ConvolutionParameteri:
+ debug_print_unmarshal("ConvolutionParameteri");
+ _mesa_unmarshal_ConvolutionParameteri(ctx, (const struct marshal_cmd_ConvolutionParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3s:
+ debug_print_unmarshal("Vertex3s");
+ _mesa_unmarshal_Vertex3s(ctx, (const struct marshal_cmd_Vertex3s *) cmd);
+ break;
+ case DISPATCH_CMD_ConvolutionParameterf:
+ debug_print_unmarshal("ConvolutionParameterf");
+ _mesa_unmarshal_ConvolutionParameterf(ctx, (const struct marshal_cmd_ConvolutionParameterf *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3fv:
+ debug_print_unmarshal("TexCoord3fv");
+ _mesa_unmarshal_TexCoord3fv(ctx, (const struct marshal_cmd_TexCoord3fv *) cmd);
+ break;
+ case DISPATCH_CMD_TextureBarrierNV:
+ debug_print_unmarshal("TextureBarrierNV");
+ _mesa_unmarshal_TextureBarrierNV(ctx, (const struct marshal_cmd_TextureBarrierNV *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramLocalParameter4fARB:
+ debug_print_unmarshal("ProgramLocalParameter4fARB");
+ _mesa_unmarshal_ProgramLocalParameter4fARB(ctx, (const struct marshal_cmd_ProgramLocalParameter4fARB *) cmd);
+ break;
+ case DISPATCH_CMD_PauseTransformFeedback:
+ debug_print_unmarshal("PauseTransformFeedback");
+ _mesa_unmarshal_PauseTransformFeedback(ctx, (const struct marshal_cmd_PauseTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteShader:
+ debug_print_unmarshal("DeleteShader");
+ _mesa_unmarshal_DeleteShader(ctx, (const struct marshal_cmd_DeleteShader *) cmd);
+ break;
+ case DISPATCH_CMD_NamedFramebufferRenderbuffer:
+ debug_print_unmarshal("NamedFramebufferRenderbuffer");
+ _mesa_unmarshal_NamedFramebufferRenderbuffer(ctx, (const struct marshal_cmd_NamedFramebufferRenderbuffer *) cmd);
+ break;
+ case DISPATCH_CMD_CompileShader:
+ debug_print_unmarshal("CompileShader");
+ _mesa_unmarshal_CompileShader(ctx, (const struct marshal_cmd_CompileShader *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2iv:
+ debug_print_unmarshal("Vertex2iv");
+ _mesa_unmarshal_Vertex2iv(ctx, (const struct marshal_cmd_Vertex2iv *) cmd);
+ break;
+ case DISPATCH_CMD_ResetMinmax:
+ debug_print_unmarshal("ResetMinmax");
+ _mesa_unmarshal_ResetMinmax(ctx, (const struct marshal_cmd_ResetMinmax *) cmd);
+ break;
+ case DISPATCH_CMD_SampleCoverage:
+ debug_print_unmarshal("SampleCoverage");
+ _mesa_unmarshal_SampleCoverage(ctx, (const struct marshal_cmd_SampleCoverage *) cmd);
+ break;
+ case DISPATCH_CMD_GenerateTextureMipmap:
+ debug_print_unmarshal("GenerateTextureMipmap");
+ _mesa_unmarshal_GenerateTextureMipmap(ctx, (const struct marshal_cmd_GenerateTextureMipmap *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteProgramsARB:
+ debug_print_unmarshal("DeleteProgramsARB");
+ _mesa_unmarshal_DeleteProgramsARB(ctx, (const struct marshal_cmd_DeleteProgramsARB *) cmd);
+ break;
+ case DISPATCH_CMD_ShadeModel:
+ debug_print_unmarshal("ShadeModel");
+ _mesa_unmarshal_ShadeModel(ctx, (const struct marshal_cmd_ShadeModel *) cmd);
+ break;
+ case DISPATCH_CMD_DispatchCompute:
+ debug_print_unmarshal("DispatchCompute");
+ _mesa_unmarshal_DispatchCompute(ctx, (const struct marshal_cmd_DispatchCompute *) cmd);
+ break;
+ case DISPATCH_CMD_UseProgramStages:
+ debug_print_unmarshal("UseProgramStages");
+ _mesa_unmarshal_UseProgramStages(ctx, (const struct marshal_cmd_UseProgramStages *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4fv:
+ debug_print_unmarshal("ProgramUniformMatrix4fv");
+ _mesa_unmarshal_ProgramUniformMatrix4fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4fv *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferRenderbuffer:
+ debug_print_unmarshal("FramebufferRenderbuffer");
+ _mesa_unmarshal_FramebufferRenderbuffer(ctx, (const struct marshal_cmd_FramebufferRenderbuffer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramStringARB:
+ debug_print_unmarshal("ProgramStringARB");
+ _mesa_unmarshal_ProgramStringARB(ctx, (const struct marshal_cmd_ProgramStringARB *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTextureSubImage2D:
+ debug_print_unmarshal("CopyTextureSubImage2D");
+ _mesa_unmarshal_CopyTextureSubImage2D(ctx, (const struct marshal_cmd_CopyTextureSubImage2D *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4s:
+ debug_print_unmarshal("MultiTexCoord4s");
+ _mesa_unmarshal_MultiTexCoord4s(ctx, (const struct marshal_cmd_MultiTexCoord4s *) cmd);
+ break;
+ case DISPATCH_CMD_ViewportIndexedf:
+ debug_print_unmarshal("ViewportIndexedf");
+ _mesa_unmarshal_ViewportIndexedf(ctx, (const struct marshal_cmd_ViewportIndexedf *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4i:
+ debug_print_unmarshal("MultiTexCoord4i");
+ _mesa_unmarshal_MultiTexCoord4i(ctx, (const struct marshal_cmd_MultiTexCoord4i *) cmd);
+ break;
+ case DISPATCH_CMD_DebugMessageControl:
+ debug_print_unmarshal("DebugMessageControl");
+ _mesa_unmarshal_DebugMessageControl(ctx, (const struct marshal_cmd_DebugMessageControl *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4d:
+ debug_print_unmarshal("MultiTexCoord4d");
+ _mesa_unmarshal_MultiTexCoord4d(ctx, (const struct marshal_cmd_MultiTexCoord4d *) cmd);
+ break;
+ case DISPATCH_CMD_Translatex:
+ debug_print_unmarshal("Translatex");
+ _mesa_unmarshal_Translatex(ctx, (const struct marshal_cmd_Translatex *) cmd);
+ break;
+ case DISPATCH_CMD_MultiDrawElementsIndirectCountARB:
+ debug_print_unmarshal("MultiDrawElementsIndirectCountARB");
+ _mesa_unmarshal_MultiDrawElementsIndirectCountARB(ctx, (const struct marshal_cmd_MultiDrawElementsIndirectCountARB *) cmd);
+ break;
+ case DISPATCH_CMD_Indexsv:
+ debug_print_unmarshal("Indexsv");
+ _mesa_unmarshal_Indexsv(ctx, (const struct marshal_cmd_Indexsv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1fvARB:
+ debug_print_unmarshal("VertexAttrib1fvARB");
+ _mesa_unmarshal_VertexAttrib1fvARB(ctx, (const struct marshal_cmd_VertexAttrib1fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2dv:
+ debug_print_unmarshal("TexCoord2dv");
+ _mesa_unmarshal_TexCoord2dv(ctx, (const struct marshal_cmd_TexCoord2dv *) cmd);
+ break;
+ case DISPATCH_CMD_Translated:
+ debug_print_unmarshal("Translated");
+ _mesa_unmarshal_Translated(ctx, (const struct marshal_cmd_Translated *) cmd);
+ break;
+ case DISPATCH_CMD_Translatef:
+ debug_print_unmarshal("Translatef");
+ _mesa_unmarshal_Translatef(ctx, (const struct marshal_cmd_Translatef *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4uiv:
+ debug_print_unmarshal("ProgramUniform4uiv");
+ _mesa_unmarshal_ProgramUniform4uiv(ctx, (const struct marshal_cmd_ProgramUniform4uiv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1fARB:
+ debug_print_unmarshal("MultiTexCoord1fARB");
+ _mesa_unmarshal_MultiTexCoord1fARB(ctx, (const struct marshal_cmd_MultiTexCoord1fARB *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3d:
+ debug_print_unmarshal("SecondaryColor3d");
+ _mesa_unmarshal_SecondaryColor3d(ctx, (const struct marshal_cmd_SecondaryColor3d *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferParameteri:
+ debug_print_unmarshal("FramebufferParameteri");
+ _mesa_unmarshal_FramebufferParameteri(ctx, (const struct marshal_cmd_FramebufferParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs4ubvNV:
+ debug_print_unmarshal("VertexAttribs4ubvNV");
+ _mesa_unmarshal_VertexAttribs4ubvNV(ctx, (const struct marshal_cmd_VertexAttribs4ubvNV *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTexSubImage1D:
+ debug_print_unmarshal("CopyTexSubImage1D");
+ _mesa_unmarshal_CopyTexSubImage1D(ctx, (const struct marshal_cmd_CopyTexSubImage1D *) cmd);
+ break;
+ case DISPATCH_CMD_StencilFunc:
+ debug_print_unmarshal("StencilFunc");
+ _mesa_unmarshal_StencilFunc(ctx, (const struct marshal_cmd_StencilFunc *) cmd);
+ break;
+ case DISPATCH_CMD_CopyPixels:
+ debug_print_unmarshal("CopyPixels");
+ _mesa_unmarshal_CopyPixels(ctx, (const struct marshal_cmd_CopyPixels *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nubv:
+ debug_print_unmarshal("VertexAttrib4Nubv");
+ _mesa_unmarshal_VertexAttrib4Nubv(ctx, (const struct marshal_cmd_VertexAttrib4Nubv *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4x2dv:
+ debug_print_unmarshal("UniformMatrix4x2dv");
+ _mesa_unmarshal_UniformMatrix4x2dv(ctx, (const struct marshal_cmd_UniformMatrix4x2dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribPointer:
+ debug_print_unmarshal("VertexAttribPointer");
+ _mesa_unmarshal_VertexAttribPointer(ctx, (const struct marshal_cmd_VertexAttribPointer *) cmd);
+ break;
+ case DISPATCH_CMD_IndexMask:
+ debug_print_unmarshal("IndexMask");
+ _mesa_unmarshal_IndexMask(ctx, (const struct marshal_cmd_IndexMask *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribIFormat:
+ debug_print_unmarshal("VertexAttribIFormat");
+ _mesa_unmarshal_VertexAttribIFormat(ctx, (const struct marshal_cmd_VertexAttribIFormat *) cmd);
+ break;
+ case DISPATCH_CMD_DrawArraysInstancedBaseInstance:
+ debug_print_unmarshal("DrawArraysInstancedBaseInstance");
+ _mesa_unmarshal_DrawArraysInstancedBaseInstance(ctx, (const struct marshal_cmd_DrawArraysInstancedBaseInstance *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorageMem3DMultisampleEXT:
+ debug_print_unmarshal("TextureStorageMem3DMultisampleEXT");
+ _mesa_unmarshal_TextureStorageMem3DMultisampleEXT(ctx, (const struct marshal_cmd_TextureStorageMem3DMultisampleEXT *) cmd);
+ break;
+ case DISPATCH_CMD_PopAttrib:
+ debug_print_unmarshal("PopAttrib");
+ _mesa_unmarshal_PopAttrib(ctx, (const struct marshal_cmd_PopAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3ui:
+ debug_print_unmarshal("Uniform3ui");
+ _mesa_unmarshal_Uniform3ui(ctx, (const struct marshal_cmd_Uniform3ui *) cmd);
+ break;
+ case DISPATCH_CMD_Color4dv:
+ debug_print_unmarshal("Color4dv");
+ _mesa_unmarshal_Color4dv(ctx, (const struct marshal_cmd_Color4dv *) cmd);
+ break;
+ case DISPATCH_CMD_DisableVertexAttribArray:
+ debug_print_unmarshal("DisableVertexAttribArray");
+ _mesa_unmarshal_DisableVertexAttribArray(ctx, (const struct marshal_cmd_DisableVertexAttribArray *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3x2fv:
+ debug_print_unmarshal("ProgramUniformMatrix3x2fv");
+ _mesa_unmarshal_ProgramUniformMatrix3x2fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3x2fv *) cmd);
+ break;
+ case DISPATCH_CMD_ClipPlanex:
+ debug_print_unmarshal("ClipPlanex");
+ _mesa_unmarshal_ClipPlanex(ctx, (const struct marshal_cmd_ClipPlanex *) cmd);
+ break;
+ case DISPATCH_CMD_ClipPlanef:
+ debug_print_unmarshal("ClipPlanef");
+ _mesa_unmarshal_ClipPlanef(ctx, (const struct marshal_cmd_ClipPlanef *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1ui:
+ debug_print_unmarshal("ProgramUniform1ui");
+ _mesa_unmarshal_ProgramUniform1ui(ctx, (const struct marshal_cmd_ProgramUniform1ui *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColorPointer:
+ debug_print_unmarshal("SecondaryColorPointer");
+ _mesa_unmarshal_SecondaryColorPointer(ctx, (const struct marshal_cmd_SecondaryColorPointer *) cmd);
+ break;
+ case DISPATCH_CMD_LineStipple:
+ debug_print_unmarshal("LineStipple");
+ _mesa_unmarshal_LineStipple(ctx, (const struct marshal_cmd_LineStipple *) cmd);
+ break;
+ case DISPATCH_CMD_BeginFragmentShaderATI:
+ debug_print_unmarshal("BeginFragmentShaderATI");
+ _mesa_unmarshal_BeginFragmentShaderATI(ctx, (const struct marshal_cmd_BeginFragmentShaderATI *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorageMem2DEXT:
+ debug_print_unmarshal("TextureStorageMem2DEXT");
+ _mesa_unmarshal_TextureStorageMem2DEXT(ctx, (const struct marshal_cmd_TextureStorageMem2DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_WaitSync:
+ debug_print_unmarshal("WaitSync");
+ _mesa_unmarshal_WaitSync(ctx, (const struct marshal_cmd_WaitSync *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1i64vARB:
+ debug_print_unmarshal("Uniform1i64vARB");
+ _mesa_unmarshal_Uniform1i64vARB(ctx, (const struct marshal_cmd_Uniform1i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_NewList:
+ debug_print_unmarshal("NewList");
+ _mesa_unmarshal_NewList(ctx, (const struct marshal_cmd_NewList *) cmd);
+ break;
+ case DISPATCH_CMD_TexBuffer:
+ debug_print_unmarshal("TexBuffer");
+ _mesa_unmarshal_TexBuffer(ctx, (const struct marshal_cmd_TexBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4sv:
+ debug_print_unmarshal("TexCoord4sv");
+ _mesa_unmarshal_TexCoord4sv(ctx, (const struct marshal_cmd_TexCoord4sv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1f:
+ debug_print_unmarshal("TexCoord1f");
+ _mesa_unmarshal_TexCoord1f(ctx, (const struct marshal_cmd_TexCoord1f *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1d:
+ debug_print_unmarshal("TexCoord1d");
+ _mesa_unmarshal_TexCoord1d(ctx, (const struct marshal_cmd_TexCoord1d *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1i:
+ debug_print_unmarshal("TexCoord1i");
+ _mesa_unmarshal_TexCoord1i(ctx, (const struct marshal_cmd_TexCoord1i *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord1s:
+ debug_print_unmarshal("TexCoord1s");
+ _mesa_unmarshal_TexCoord1s(ctx, (const struct marshal_cmd_TexCoord1s *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1ui:
+ debug_print_unmarshal("Uniform1ui");
+ _mesa_unmarshal_Uniform1ui(ctx, (const struct marshal_cmd_Uniform1ui *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorage1D:
+ debug_print_unmarshal("TexStorage1D");
+ _mesa_unmarshal_TexStorage1D(ctx, (const struct marshal_cmd_TexStorage1D *) cmd);
+ break;
+ case DISPATCH_CMD_BlitFramebuffer:
+ debug_print_unmarshal("BlitFramebuffer");
+ _mesa_unmarshal_BlitFramebuffer(ctx, (const struct marshal_cmd_BlitFramebuffer *) cmd);
+ break;
+ case DISPATCH_CMD_TextureParameterf:
+ debug_print_unmarshal("TextureParameterf");
+ _mesa_unmarshal_TextureParameterf(ctx, (const struct marshal_cmd_TextureParameterf *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferTexture1D:
+ debug_print_unmarshal("FramebufferTexture1D");
+ _mesa_unmarshal_FramebufferTexture1D(ctx, (const struct marshal_cmd_FramebufferTexture1D *) cmd);
+ break;
+ case DISPATCH_CMD_TextureParameteri:
+ debug_print_unmarshal("TextureParameteri");
+ _mesa_unmarshal_TextureParameteri(ctx, (const struct marshal_cmd_TextureParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordP4ui:
+ debug_print_unmarshal("TexCoordP4ui");
+ _mesa_unmarshal_TexCoordP4ui(ctx, (const struct marshal_cmd_TexCoordP4ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1sv:
+ debug_print_unmarshal("VertexAttrib1sv");
+ _mesa_unmarshal_VertexAttrib1sv(ctx, (const struct marshal_cmd_VertexAttrib1sv *) cmd);
+ break;
+ case DISPATCH_CMD_WindowPos4dMESA:
+ debug_print_unmarshal("WindowPos4dMESA");
+ _mesa_unmarshal_WindowPos4dMESA(ctx, (const struct marshal_cmd_WindowPos4dMESA *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3dv:
+ debug_print_unmarshal("Vertex3dv");
+ _mesa_unmarshal_Vertex3dv(ctx, (const struct marshal_cmd_Vertex3dv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribL2d:
+ debug_print_unmarshal("VertexAttribL2d");
+ _mesa_unmarshal_VertexAttribL2d(ctx, (const struct marshal_cmd_VertexAttribL2d *) cmd);
+ break;
+ case DISPATCH_CMD_BlendColor:
+ debug_print_unmarshal("BlendColor");
+ _mesa_unmarshal_BlendColor(ctx, (const struct marshal_cmd_BlendColor *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs2dvNV:
+ debug_print_unmarshal("VertexAttribs2dvNV");
+ _mesa_unmarshal_VertexAttribs2dvNV(ctx, (const struct marshal_cmd_VertexAttribs2dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib2dvNV:
+ debug_print_unmarshal("VertexAttrib2dvNV");
+ _mesa_unmarshal_VertexAttrib2dvNV(ctx, (const struct marshal_cmd_VertexAttrib2dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_ResetHistogram:
+ debug_print_unmarshal("ResetHistogram");
+ _mesa_unmarshal_ResetHistogram(ctx, (const struct marshal_cmd_ResetHistogram *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2sv:
+ debug_print_unmarshal("TexCoord2sv");
+ _mesa_unmarshal_TexCoord2sv(ctx, (const struct marshal_cmd_TexCoord2sv *) cmd);
+ break;
+ case DISPATCH_CMD_StencilMaskSeparate:
+ debug_print_unmarshal("StencilMaskSeparate");
+ _mesa_unmarshal_StencilMaskSeparate(ctx, (const struct marshal_cmd_StencilMaskSeparate *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3sv:
+ debug_print_unmarshal("MultiTexCoord3sv");
+ _mesa_unmarshal_MultiTexCoord3sv(ctx, (const struct marshal_cmd_MultiTexCoord3sv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord3iv:
+ debug_print_unmarshal("TexCoord3iv");
+ _mesa_unmarshal_TexCoord3iv(ctx, (const struct marshal_cmd_TexCoord3iv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord4sv:
+ debug_print_unmarshal("MultiTexCoord4sv");
+ _mesa_unmarshal_MultiTexCoord4sv(ctx, (const struct marshal_cmd_MultiTexCoord4sv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexBindingDivisor:
+ debug_print_unmarshal("VertexBindingDivisor");
+ _mesa_unmarshal_VertexBindingDivisor(ctx, (const struct marshal_cmd_VertexBindingDivisor *) cmd);
+ break;
+ case DISPATCH_CMD_PrimitiveBoundingBox:
+ debug_print_unmarshal("PrimitiveBoundingBox");
+ _mesa_unmarshal_PrimitiveBoundingBox(ctx, (const struct marshal_cmd_PrimitiveBoundingBox *) cmd);
+ break;
+ case DISPATCH_CMD_UniformBlockBinding:
+ debug_print_unmarshal("UniformBlockBinding");
+ _mesa_unmarshal_UniformBlockBinding(ctx, (const struct marshal_cmd_UniformBlockBinding *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4Nusv:
+ debug_print_unmarshal("VertexAttrib4Nusv");
+ _mesa_unmarshal_VertexAttrib4Nusv(ctx, (const struct marshal_cmd_VertexAttrib4Nusv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexP2ui:
+ debug_print_unmarshal("VertexP2ui");
+ _mesa_unmarshal_VertexP2ui(ctx, (const struct marshal_cmd_VertexP2ui *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2fv:
+ debug_print_unmarshal("ProgramUniform2fv");
+ _mesa_unmarshal_ProgramUniform2fv(ctx, (const struct marshal_cmd_ProgramUniform2fv *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage2DEXT:
+ debug_print_unmarshal("TextureStorage2DEXT");
+ _mesa_unmarshal_TextureStorage2DEXT(ctx, (const struct marshal_cmd_TextureStorage2DEXT *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTransformFeedbackInstanced:
+ debug_print_unmarshal("DrawTransformFeedbackInstanced");
+ _mesa_unmarshal_DrawTransformFeedbackInstanced(ctx, (const struct marshal_cmd_DrawTransformFeedbackInstanced *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTextureSubImage1D:
+ debug_print_unmarshal("CopyTextureSubImage1D");
+ _mesa_unmarshal_CopyTextureSubImage1D(ctx, (const struct marshal_cmd_CopyTextureSubImage1D *) cmd);
+ break;
+ case DISPATCH_CMD_ResumeTransformFeedback:
+ debug_print_unmarshal("ResumeTransformFeedback");
+ _mesa_unmarshal_ResumeTransformFeedback(ctx, (const struct marshal_cmd_ResumeTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2dv:
+ debug_print_unmarshal("Vertex2dv");
+ _mesa_unmarshal_Vertex2dv(ctx, (const struct marshal_cmd_Vertex2dv *) cmd);
+ break;
+ case DISPATCH_CMD_SampleMaski:
+ debug_print_unmarshal("SampleMaski");
+ _mesa_unmarshal_SampleMaski(ctx, (const struct marshal_cmd_SampleMaski *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord2iv:
+ debug_print_unmarshal("MultiTexCoord2iv");
+ _mesa_unmarshal_MultiTexCoord2iv(ctx, (const struct marshal_cmd_MultiTexCoord2iv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTransformFeedback:
+ debug_print_unmarshal("DrawTransformFeedback");
+ _mesa_unmarshal_DrawTransformFeedback(ctx, (const struct marshal_cmd_DrawTransformFeedback *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs3fvNV:
+ debug_print_unmarshal("VertexAttribs3fvNV");
+ _mesa_unmarshal_VertexAttribs3fvNV(ctx, (const struct marshal_cmd_VertexAttribs3fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2ui64vARB:
+ debug_print_unmarshal("ProgramUniform2ui64vARB");
+ _mesa_unmarshal_ProgramUniform2ui64vARB(ctx, (const struct marshal_cmd_ProgramUniform2ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_MapGrid2d:
+ debug_print_unmarshal("MapGrid2d");
+ _mesa_unmarshal_MapGrid2d(ctx, (const struct marshal_cmd_MapGrid2d *) cmd);
+ break;
+ case DISPATCH_CMD_MapGrid2f:
+ debug_print_unmarshal("MapGrid2f");
+ _mesa_unmarshal_MapGrid2f(ctx, (const struct marshal_cmd_MapGrid2f *) cmd);
+ break;
+ case DISPATCH_CMD_SampleMapATI:
+ debug_print_unmarshal("SampleMapATI");
+ _mesa_unmarshal_SampleMapATI(ctx, (const struct marshal_cmd_SampleMapATI *) cmd);
+ break;
+ case DISPATCH_CMD_Color3usv:
+ debug_print_unmarshal("Color3usv");
+ _mesa_unmarshal_Color3usv(ctx, (const struct marshal_cmd_Color3usv *) cmd);
+ break;
+ case DISPATCH_CMD_CopyImageSubData:
+ debug_print_unmarshal("CopyImageSubData");
+ _mesa_unmarshal_CopyImageSubData(ctx, (const struct marshal_cmd_CopyImageSubData *) cmd);
+ break;
+ case DISPATCH_CMD_StencilOpSeparate:
+ debug_print_unmarshal("StencilOpSeparate");
+ _mesa_unmarshal_StencilOpSeparate(ctx, (const struct marshal_cmd_StencilOpSeparate *) cmd);
+ break;
+ case DISPATCH_CMD_ClipControl:
+ debug_print_unmarshal("ClipControl");
+ _mesa_unmarshal_ClipControl(ctx, (const struct marshal_cmd_ClipControl *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexfOES:
+ debug_print_unmarshal("DrawTexfOES");
+ _mesa_unmarshal_DrawTexfOES(ctx, (const struct marshal_cmd_DrawTexfOES *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4i64vARB:
+ debug_print_unmarshal("Uniform4i64vARB");
+ _mesa_unmarshal_Uniform4i64vARB(ctx, (const struct marshal_cmd_Uniform4i64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_AttachObjectARB:
+ debug_print_unmarshal("AttachObjectARB");
+ _mesa_unmarshal_AttachObjectARB(ctx, (const struct marshal_cmd_AttachObjectARB *) cmd);
+ break;
+ case DISPATCH_CMD_Accum:
+ debug_print_unmarshal("Accum");
+ _mesa_unmarshal_Accum(ctx, (const struct marshal_cmd_Accum *) cmd);
+ break;
+ case DISPATCH_CMD_Color4x:
+ debug_print_unmarshal("Color4x");
+ _mesa_unmarshal_Color4x(ctx, (const struct marshal_cmd_Color4x *) cmd);
+ break;
+ case DISPATCH_CMD_Color4s:
+ debug_print_unmarshal("Color4s");
+ _mesa_unmarshal_Color4s(ctx, (const struct marshal_cmd_Color4s *) cmd);
+ break;
+ case DISPATCH_CMD_EnableVertexAttribArray:
+ debug_print_unmarshal("EnableVertexAttribArray");
+ _mesa_unmarshal_EnableVertexAttribArray(ctx, (const struct marshal_cmd_EnableVertexAttribArray *) cmd);
+ break;
+ case DISPATCH_CMD_Color4i:
+ debug_print_unmarshal("Color4i");
+ _mesa_unmarshal_Color4i(ctx, (const struct marshal_cmd_Color4i *) cmd);
+ break;
+ case DISPATCH_CMD_Color4f:
+ debug_print_unmarshal("Color4f");
+ _mesa_unmarshal_Color4f(ctx, (const struct marshal_cmd_Color4f *) cmd);
+ break;
+ case DISPATCH_CMD_ShaderStorageBlockBinding:
+ debug_print_unmarshal("ShaderStorageBlockBinding");
+ _mesa_unmarshal_ShaderStorageBlockBinding(ctx, (const struct marshal_cmd_ShaderStorageBlockBinding *) cmd);
+ break;
+ case DISPATCH_CMD_Color4d:
+ debug_print_unmarshal("Color4d");
+ _mesa_unmarshal_Color4d(ctx, (const struct marshal_cmd_Color4d *) cmd);
+ break;
+ case DISPATCH_CMD_Color4b:
+ debug_print_unmarshal("Color4b");
+ _mesa_unmarshal_Color4b(ctx, (const struct marshal_cmd_Color4b *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord1fv:
+ debug_print_unmarshal("EvalCoord1fv");
+ _mesa_unmarshal_EvalCoord1fv(ctx, (const struct marshal_cmd_EvalCoord1fv *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribLFormat:
+ debug_print_unmarshal("VertexAttribLFormat");
+ _mesa_unmarshal_VertexAttribLFormat(ctx, (const struct marshal_cmd_VertexAttribLFormat *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribL3d:
+ debug_print_unmarshal("VertexAttribL3d");
+ _mesa_unmarshal_VertexAttribL3d(ctx, (const struct marshal_cmd_VertexAttribL3d *) cmd);
+ break;
+ case DISPATCH_CMD_StencilFuncSeparate:
+ debug_print_unmarshal("StencilFuncSeparate");
+ _mesa_unmarshal_StencilFuncSeparate(ctx, (const struct marshal_cmd_StencilFuncSeparate *) cmd);
+ break;
+ case DISPATCH_CMD_ShaderSource:
+ debug_print_unmarshal("ShaderSource");
+ _mesa_unmarshal_ShaderSource(ctx, (const struct marshal_cmd_ShaderSource *) cmd);
+ break;
+ case DISPATCH_CMD_Normal3fv:
+ debug_print_unmarshal("Normal3fv");
+ _mesa_unmarshal_Normal3fv(ctx, (const struct marshal_cmd_Normal3fv *) cmd);
+ break;
+ case DISPATCH_CMD_NormalP3ui:
+ debug_print_unmarshal("NormalP3ui");
+ _mesa_unmarshal_NormalP3ui(ctx, (const struct marshal_cmd_NormalP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord3fvARB:
+ debug_print_unmarshal("MultiTexCoord3fvARB");
+ _mesa_unmarshal_MultiTexCoord3fvARB(ctx, (const struct marshal_cmd_MultiTexCoord3fvARB *) cmd);
+ break;
+ case DISPATCH_CMD_BufferData:
+ debug_print_unmarshal("BufferData");
+ _mesa_unmarshal_BufferData(ctx, (const struct marshal_cmd_BufferData *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3fv:
+ debug_print_unmarshal("Uniform3fv");
+ _mesa_unmarshal_Uniform3fv(ctx, (const struct marshal_cmd_Uniform3fv *) cmd);
+ break;
+ case DISPATCH_CMD_BlendEquation:
+ debug_print_unmarshal("BlendEquation");
+ _mesa_unmarshal_BlendEquation(ctx, (const struct marshal_cmd_BlendEquation *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3dNV:
+ debug_print_unmarshal("VertexAttrib3dNV");
+ _mesa_unmarshal_VertexAttrib3dNV(ctx, (const struct marshal_cmd_VertexAttrib3dNV *) cmd);
+ break;
+ case DISPATCH_CMD_PushName:
+ debug_print_unmarshal("PushName");
+ _mesa_unmarshal_PushName(ctx, (const struct marshal_cmd_PushName *) cmd);
+ break;
+ case DISPATCH_CMD_DeleteRenderbuffers:
+ debug_print_unmarshal("DeleteRenderbuffers");
+ _mesa_unmarshal_DeleteRenderbuffers(ctx, (const struct marshal_cmd_DeleteRenderbuffers *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1dv:
+ debug_print_unmarshal("VertexAttrib1dv");
+ _mesa_unmarshal_VertexAttrib1dv(ctx, (const struct marshal_cmd_VertexAttrib1dv *) cmd);
+ break;
+ case DISPATCH_CMD_Rotated:
+ debug_print_unmarshal("Rotated");
+ _mesa_unmarshal_Rotated(ctx, (const struct marshal_cmd_Rotated *) cmd);
+ break;
+ case DISPATCH_CMD_Color4iv:
+ debug_print_unmarshal("Color4iv");
+ _mesa_unmarshal_Color4iv(ctx, (const struct marshal_cmd_Color4iv *) cmd);
+ break;
+ case DISPATCH_CMD_Rotatex:
+ debug_print_unmarshal("Rotatex");
+ _mesa_unmarshal_Rotatex(ctx, (const struct marshal_cmd_Rotatex *) cmd);
+ break;
+ case DISPATCH_CMD_FramebufferTextureLayer:
+ debug_print_unmarshal("FramebufferTextureLayer");
+ _mesa_unmarshal_FramebufferTextureLayer(ctx, (const struct marshal_cmd_FramebufferTextureLayer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3fv:
+ debug_print_unmarshal("ProgramUniformMatrix3fv");
+ _mesa_unmarshal_ProgramUniformMatrix3fv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3fv *) cmd);
+ break;
+ case DISPATCH_CMD_LoadMatrixf:
+ debug_print_unmarshal("LoadMatrixf");
+ _mesa_unmarshal_LoadMatrixf(ctx, (const struct marshal_cmd_LoadMatrixf *) cmd);
+ break;
+ case DISPATCH_CMD_MakeTextureHandleResidentARB:
+ debug_print_unmarshal("MakeTextureHandleResidentARB");
+ _mesa_unmarshal_MakeTextureHandleResidentARB(ctx, (const struct marshal_cmd_MakeTextureHandleResidentARB *) cmd);
+ break;
+ case DISPATCH_CMD_DrawRangeElementsBaseVertex:
+ debug_print_unmarshal("DrawRangeElementsBaseVertex");
+ _mesa_unmarshal_DrawRangeElementsBaseVertex(ctx, (const struct marshal_cmd_DrawRangeElementsBaseVertex *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4dv:
+ debug_print_unmarshal("ProgramUniformMatrix4dv");
+ _mesa_unmarshal_ProgramUniformMatrix4dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4dv *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColor3bv:
+ debug_print_unmarshal("SecondaryColor3bv");
+ _mesa_unmarshal_SecondaryColor3bv(ctx, (const struct marshal_cmd_SecondaryColor3bv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTexxvOES:
+ debug_print_unmarshal("DrawTexxvOES");
+ _mesa_unmarshal_DrawTexxvOES(ctx, (const struct marshal_cmd_DrawTexxvOES *) cmd);
+ break;
+ case DISPATCH_CMD_Color4ubv:
+ debug_print_unmarshal("Color4ubv");
+ _mesa_unmarshal_Color4ubv(ctx, (const struct marshal_cmd_Color4ubv *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord2fv:
+ debug_print_unmarshal("TexCoord2fv");
+ _mesa_unmarshal_TexCoord2fv(ctx, (const struct marshal_cmd_TexCoord2fv *) cmd);
+ break;
+ case DISPATCH_CMD_FogCoorddv:
+ debug_print_unmarshal("FogCoorddv");
+ _mesa_unmarshal_FogCoorddv(ctx, (const struct marshal_cmd_FogCoorddv *) cmd);
+ break;
+ case DISPATCH_CMD_VDPAUUnregisterSurfaceNV:
+ debug_print_unmarshal("VDPAUUnregisterSurfaceNV");
+ _mesa_unmarshal_VDPAUUnregisterSurfaceNV(ctx, (const struct marshal_cmd_VDPAUUnregisterSurfaceNV *) cmd);
+ break;
+ case DISPATCH_CMD_ColorP3ui:
+ debug_print_unmarshal("ColorP3ui");
+ _mesa_unmarshal_ColorP3ui(ctx, (const struct marshal_cmd_ColorP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_ClearBufferuiv:
+ debug_print_unmarshal("ClearBufferuiv");
+ _mesa_unmarshal_ClearBufferuiv(ctx, (const struct marshal_cmd_ClearBufferuiv *) cmd);
+ break;
+ case DISPATCH_CMD_Flush:
+ debug_print_unmarshal("Flush");
+ _mesa_unmarshal_Flush(ctx, (const struct marshal_cmd_Flush *) cmd);
+ break;
+ case DISPATCH_CMD_MakeTextureHandleNonResidentARB:
+ debug_print_unmarshal("MakeTextureHandleNonResidentARB");
+ _mesa_unmarshal_MakeTextureHandleNonResidentARB(ctx, (const struct marshal_cmd_MakeTextureHandleNonResidentARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribI4iEXT:
+ debug_print_unmarshal("VertexAttribI4iEXT");
+ _mesa_unmarshal_VertexAttribI4iEXT(ctx, (const struct marshal_cmd_VertexAttribI4iEXT *) cmd);
+ break;
+ case DISPATCH_CMD_FogCoordd:
+ debug_print_unmarshal("FogCoordd");
+ _mesa_unmarshal_FogCoordd(ctx, (const struct marshal_cmd_FogCoordd *) cmd);
+ break;
+ case DISPATCH_CMD_BindFramebufferEXT:
+ debug_print_unmarshal("BindFramebufferEXT");
+ _mesa_unmarshal_BindFramebufferEXT(ctx, (const struct marshal_cmd_BindFramebufferEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform3iv:
+ debug_print_unmarshal("Uniform3iv");
+ _mesa_unmarshal_Uniform3iv(ctx, (const struct marshal_cmd_Uniform3iv *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorage2DMultisample:
+ debug_print_unmarshal("TexStorage2DMultisample");
+ _mesa_unmarshal_TexStorage2DMultisample(ctx, (const struct marshal_cmd_TexStorage2DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_UnlockArraysEXT:
+ debug_print_unmarshal("UnlockArraysEXT");
+ _mesa_unmarshal_UnlockArraysEXT(ctx, (const struct marshal_cmd_UnlockArraysEXT *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4iv:
+ debug_print_unmarshal("VertexAttrib4iv");
+ _mesa_unmarshal_VertexAttrib4iv(ctx, (const struct marshal_cmd_VertexAttrib4iv *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTexSubImage3D:
+ debug_print_unmarshal("CopyTexSubImage3D");
+ _mesa_unmarshal_CopyTexSubImage3D(ctx, (const struct marshal_cmd_CopyTexSubImage3D *) cmd);
+ break;
+ case DISPATCH_CMD_PolygonOffsetClampEXT:
+ debug_print_unmarshal("PolygonOffsetClampEXT");
+ _mesa_unmarshal_PolygonOffsetClampEXT(ctx, (const struct marshal_cmd_PolygonOffsetClampEXT *) cmd);
+ break;
+ case DISPATCH_CMD_DetachObjectARB:
+ debug_print_unmarshal("DetachObjectARB");
+ _mesa_unmarshal_DetachObjectARB(ctx, (const struct marshal_cmd_DetachObjectARB *) cmd);
+ break;
+ case DISPATCH_CMD_Indexiv:
+ debug_print_unmarshal("Indexiv");
+ _mesa_unmarshal_Indexiv(ctx, (const struct marshal_cmd_Indexiv *) cmd);
+ break;
+ case DISPATCH_CMD_TexEnvi:
+ debug_print_unmarshal("TexEnvi");
+ _mesa_unmarshal_TexEnvi(ctx, (const struct marshal_cmd_TexEnvi *) cmd);
+ break;
+ case DISPATCH_CMD_TexEnvf:
+ debug_print_unmarshal("TexEnvf");
+ _mesa_unmarshal_TexEnvf(ctx, (const struct marshal_cmd_TexEnvf *) cmd);
+ break;
+ case DISPATCH_CMD_TexEnvx:
+ debug_print_unmarshal("TexEnvx");
+ _mesa_unmarshal_TexEnvx(ctx, (const struct marshal_cmd_TexEnvx *) cmd);
+ break;
+ case DISPATCH_CMD_InvalidateBufferSubData:
+ debug_print_unmarshal("InvalidateBufferSubData");
+ _mesa_unmarshal_InvalidateBufferSubData(ctx, (const struct marshal_cmd_InvalidateBufferSubData *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix4x2fv:
+ debug_print_unmarshal("UniformMatrix4x2fv");
+ _mesa_unmarshal_UniformMatrix4x2fv(ctx, (const struct marshal_cmd_UniformMatrix4x2fv *) cmd);
+ break;
+ case DISPATCH_CMD_PolygonOffset:
+ debug_print_unmarshal("PolygonOffset");
+ _mesa_unmarshal_PolygonOffset(ctx, (const struct marshal_cmd_PolygonOffset *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix4x2dv:
+ debug_print_unmarshal("ProgramUniformMatrix4x2dv");
+ _mesa_unmarshal_ProgramUniformMatrix4x2dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix4x2dv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramEnvParameter4fARB:
+ debug_print_unmarshal("ProgramEnvParameter4fARB");
+ _mesa_unmarshal_ProgramEnvParameter4fARB(ctx, (const struct marshal_cmd_ProgramEnvParameter4fARB *) cmd);
+ break;
+ case DISPATCH_CMD_ClearDepth:
+ debug_print_unmarshal("ClearDepth");
+ _mesa_unmarshal_ClearDepth(ctx, (const struct marshal_cmd_ClearDepth *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3dvNV:
+ debug_print_unmarshal("VertexAttrib3dvNV");
+ _mesa_unmarshal_VertexAttrib3dvNV(ctx, (const struct marshal_cmd_VertexAttrib3dvNV *) cmd);
+ break;
+ case DISPATCH_CMD_Color4fv:
+ debug_print_unmarshal("Color4fv");
+ _mesa_unmarshal_Color4fv(ctx, (const struct marshal_cmd_Color4fv *) cmd);
+ break;
+ case DISPATCH_CMD_ColorPointer:
+ debug_print_unmarshal("ColorPointer");
+ _mesa_unmarshal_ColorPointer(ctx, (const struct marshal_cmd_ColorPointer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform2ui64ARB:
+ debug_print_unmarshal("ProgramUniform2ui64ARB");
+ _mesa_unmarshal_ProgramUniform2ui64ARB(ctx, (const struct marshal_cmd_ProgramUniform2ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3sv:
+ debug_print_unmarshal("VertexAttrib3sv");
+ _mesa_unmarshal_VertexAttrib3sv(ctx, (const struct marshal_cmd_VertexAttrib3sv *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4i64ARB:
+ debug_print_unmarshal("Uniform4i64ARB");
+ _mesa_unmarshal_Uniform4i64ARB(ctx, (const struct marshal_cmd_Uniform4i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3ui64ARB:
+ debug_print_unmarshal("ProgramUniform3ui64ARB");
+ _mesa_unmarshal_ProgramUniform3ui64ARB(ctx, (const struct marshal_cmd_ProgramUniform3ui64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_PushClientAttrib:
+ debug_print_unmarshal("PushClientAttrib");
+ _mesa_unmarshal_PushClientAttrib(ctx, (const struct marshal_cmd_PushClientAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4ui:
+ debug_print_unmarshal("ProgramUniform4ui");
+ _mesa_unmarshal_ProgramUniform4ui(ctx, (const struct marshal_cmd_ProgramUniform4ui *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1f:
+ debug_print_unmarshal("Uniform1f");
+ _mesa_unmarshal_Uniform1f(ctx, (const struct marshal_cmd_Uniform1f *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1d:
+ debug_print_unmarshal("Uniform1d");
+ _mesa_unmarshal_Uniform1d(ctx, (const struct marshal_cmd_Uniform1d *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform1i:
+ debug_print_unmarshal("Uniform1i");
+ _mesa_unmarshal_Uniform1i(ctx, (const struct marshal_cmd_Uniform1i *) cmd);
+ break;
+ case DISPATCH_CMD_BlitNamedFramebuffer:
+ debug_print_unmarshal("BlitNamedFramebuffer");
+ _mesa_unmarshal_BlitNamedFramebuffer(ctx, (const struct marshal_cmd_BlitNamedFramebuffer *) cmd);
+ break;
+ case DISPATCH_CMD_UseProgram:
+ debug_print_unmarshal("UseProgram");
+ _mesa_unmarshal_UseProgram(ctx, (const struct marshal_cmd_UseProgram *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorageMem2DMultisampleEXT:
+ debug_print_unmarshal("TexStorageMem2DMultisampleEXT");
+ _mesa_unmarshal_TexStorageMem2DMultisampleEXT(ctx, (const struct marshal_cmd_TexStorageMem2DMultisampleEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Color3s:
+ debug_print_unmarshal("Color3s");
+ _mesa_unmarshal_Color3s(ctx, (const struct marshal_cmd_Color3s *) cmd);
+ break;
+ case DISPATCH_CMD_TextureStorage2DMultisample:
+ debug_print_unmarshal("TextureStorage2DMultisample");
+ _mesa_unmarshal_TextureStorage2DMultisample(ctx, (const struct marshal_cmd_TextureStorage2DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoordPointer:
+ debug_print_unmarshal("TexCoordPointer");
+ _mesa_unmarshal_TexCoordPointer(ctx, (const struct marshal_cmd_TexCoordPointer *) cmd);
+ break;
+ case DISPATCH_CMD_Color3i:
+ debug_print_unmarshal("Color3i");
+ _mesa_unmarshal_Color3i(ctx, (const struct marshal_cmd_Color3i *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord2d:
+ debug_print_unmarshal("EvalCoord2d");
+ _mesa_unmarshal_EvalCoord2d(ctx, (const struct marshal_cmd_EvalCoord2d *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord2f:
+ debug_print_unmarshal("EvalCoord2f");
+ _mesa_unmarshal_EvalCoord2f(ctx, (const struct marshal_cmd_EvalCoord2f *) cmd);
+ break;
+ case DISPATCH_CMD_Color3b:
+ debug_print_unmarshal("Color3b");
+ _mesa_unmarshal_Color3b(ctx, (const struct marshal_cmd_Color3b *) cmd);
+ break;
+ case DISPATCH_CMD_Color3f:
+ debug_print_unmarshal("Color3f");
+ _mesa_unmarshal_Color3f(ctx, (const struct marshal_cmd_Color3f *) cmd);
+ break;
+ case DISPATCH_CMD_Color3d:
+ debug_print_unmarshal("Color3d");
+ _mesa_unmarshal_Color3d(ctx, (const struct marshal_cmd_Color3d *) cmd);
+ break;
+ case DISPATCH_CMD_ClearDepthx:
+ debug_print_unmarshal("ClearDepthx");
+ _mesa_unmarshal_ClearDepthx(ctx, (const struct marshal_cmd_ClearDepthx *) cmd);
+ break;
+ case DISPATCH_CMD_EnableVertexArrayAttrib:
+ debug_print_unmarshal("EnableVertexArrayAttrib");
+ _mesa_unmarshal_EnableVertexArrayAttrib(ctx, (const struct marshal_cmd_EnableVertexArrayAttrib *) cmd);
+ break;
+ case DISPATCH_CMD_BlendEquationSeparate:
+ debug_print_unmarshal("BlendEquationSeparate");
+ _mesa_unmarshal_BlendEquationSeparate(ctx, (const struct marshal_cmd_BlendEquationSeparate *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoordP4ui:
+ debug_print_unmarshal("MultiTexCoordP4ui");
+ _mesa_unmarshal_MultiTexCoordP4ui(ctx, (const struct marshal_cmd_MultiTexCoordP4ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribs1fvNV:
+ debug_print_unmarshal("VertexAttribs1fvNV");
+ _mesa_unmarshal_VertexAttribs1fvNV(ctx, (const struct marshal_cmd_VertexAttribs1fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribIPointer:
+ debug_print_unmarshal("VertexAttribIPointer");
+ _mesa_unmarshal_VertexAttribIPointer(ctx, (const struct marshal_cmd_VertexAttribIPointer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform4fv:
+ debug_print_unmarshal("ProgramUniform4fv");
+ _mesa_unmarshal_ProgramUniform4fv(ctx, (const struct marshal_cmd_ProgramUniform4fv *) cmd);
+ break;
+ case DISPATCH_CMD_RasterPos4sv:
+ debug_print_unmarshal("RasterPos4sv");
+ _mesa_unmarshal_RasterPos4sv(ctx, (const struct marshal_cmd_RasterPos4sv *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTextureSubImage3D:
+ debug_print_unmarshal("CopyTextureSubImage3D");
+ _mesa_unmarshal_CopyTextureSubImage3D(ctx, (const struct marshal_cmd_CopyTextureSubImage3D *) cmd);
+ break;
+ case DISPATCH_CMD_TextureView:
+ debug_print_unmarshal("TextureView");
+ _mesa_unmarshal_TextureView(ctx, (const struct marshal_cmd_TextureView *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribDivisor:
+ debug_print_unmarshal("VertexAttribDivisor");
+ _mesa_unmarshal_VertexAttribDivisor(ctx, (const struct marshal_cmd_VertexAttribDivisor *) cmd);
+ break;
+ case DISPATCH_CMD_DrawTransformFeedbackStream:
+ debug_print_unmarshal("DrawTransformFeedbackStream");
+ _mesa_unmarshal_DrawTransformFeedbackStream(ctx, (const struct marshal_cmd_DrawTransformFeedbackStream *) cmd);
+ break;
+ case DISPATCH_CMD_EndPerfQueryINTEL:
+ debug_print_unmarshal("EndPerfQueryINTEL");
+ _mesa_unmarshal_EndPerfQueryINTEL(ctx, (const struct marshal_cmd_EndPerfQueryINTEL *) cmd);
+ break;
+ case DISPATCH_CMD_NamedBufferPageCommitmentARB:
+ debug_print_unmarshal("NamedBufferPageCommitmentARB");
+ _mesa_unmarshal_NamedBufferPageCommitmentARB(ctx, (const struct marshal_cmd_NamedBufferPageCommitmentARB *) cmd);
+ break;
+ case DISPATCH_CMD_AlphaFuncx:
+ debug_print_unmarshal("AlphaFuncx");
+ _mesa_unmarshal_AlphaFuncx(ctx, (const struct marshal_cmd_AlphaFuncx *) cmd);
+ break;
+ case DISPATCH_CMD_VertexArrayVertexBuffer:
+ debug_print_unmarshal("VertexArrayVertexBuffer");
+ _mesa_unmarshal_VertexArrayVertexBuffer(ctx, (const struct marshal_cmd_VertexArrayVertexBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_PixelTransferf:
+ debug_print_unmarshal("PixelTransferf");
+ _mesa_unmarshal_PixelTransferf(ctx, (const struct marshal_cmd_PixelTransferf *) cmd);
+ break;
+ case DISPATCH_CMD_PixelTransferi:
+ debug_print_unmarshal("PixelTransferi");
+ _mesa_unmarshal_PixelTransferi(ctx, (const struct marshal_cmd_PixelTransferi *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib3fvNV:
+ debug_print_unmarshal("VertexAttrib3fvNV");
+ _mesa_unmarshal_VertexAttrib3fvNV(ctx, (const struct marshal_cmd_VertexAttrib3fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_SecondaryColorP3ui:
+ debug_print_unmarshal("SecondaryColorP3ui");
+ _mesa_unmarshal_SecondaryColorP3ui(ctx, (const struct marshal_cmd_SecondaryColorP3ui *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib4fvNV:
+ debug_print_unmarshal("VertexAttrib4fvNV");
+ _mesa_unmarshal_VertexAttrib4fvNV(ctx, (const struct marshal_cmd_VertexAttrib4fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_Rectiv:
+ debug_print_unmarshal("Rectiv");
+ _mesa_unmarshal_Rectiv(ctx, (const struct marshal_cmd_Rectiv *) cmd);
+ break;
+ case DISPATCH_CMD_MultiTexCoord1iv:
+ debug_print_unmarshal("MultiTexCoord1iv");
+ _mesa_unmarshal_MultiTexCoord1iv(ctx, (const struct marshal_cmd_MultiTexCoord1iv *) cmd);
+ break;
+ case DISPATCH_CMD_PassTexCoordATI:
+ debug_print_unmarshal("PassTexCoordATI");
+ _mesa_unmarshal_PassTexCoordATI(ctx, (const struct marshal_cmd_PassTexCoordATI *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex2fv:
+ debug_print_unmarshal("Vertex2fv");
+ _mesa_unmarshal_Vertex2fv(ctx, (const struct marshal_cmd_Vertex2fv *) cmd);
+ break;
+ case DISPATCH_CMD_BindRenderbufferEXT:
+ debug_print_unmarshal("BindRenderbufferEXT");
+ _mesa_unmarshal_BindRenderbufferEXT(ctx, (const struct marshal_cmd_BindRenderbufferEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Vertex3sv:
+ debug_print_unmarshal("Vertex3sv");
+ _mesa_unmarshal_Vertex3sv(ctx, (const struct marshal_cmd_Vertex3sv *) cmd);
+ break;
+ case DISPATCH_CMD_EvalMesh1:
+ debug_print_unmarshal("EvalMesh1");
+ _mesa_unmarshal_EvalMesh1(ctx, (const struct marshal_cmd_EvalMesh1 *) cmd);
+ break;
+ case DISPATCH_CMD_DiscardFramebufferEXT:
+ debug_print_unmarshal("DiscardFramebufferEXT");
+ _mesa_unmarshal_DiscardFramebufferEXT(ctx, (const struct marshal_cmd_DiscardFramebufferEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2f:
+ debug_print_unmarshal("Uniform2f");
+ _mesa_unmarshal_Uniform2f(ctx, (const struct marshal_cmd_Uniform2f *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2d:
+ debug_print_unmarshal("Uniform2d");
+ _mesa_unmarshal_Uniform2d(ctx, (const struct marshal_cmd_Uniform2d *) cmd);
+ break;
+ case DISPATCH_CMD_ColorPointerEXT:
+ debug_print_unmarshal("ColorPointerEXT");
+ _mesa_unmarshal_ColorPointerEXT(ctx, (const struct marshal_cmd_ColorPointerEXT *) cmd);
+ break;
+ case DISPATCH_CMD_LineWidth:
+ debug_print_unmarshal("LineWidth");
+ _mesa_unmarshal_LineWidth(ctx, (const struct marshal_cmd_LineWidth *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform2i:
+ debug_print_unmarshal("Uniform2i");
+ _mesa_unmarshal_Uniform2i(ctx, (const struct marshal_cmd_Uniform2i *) cmd);
+ break;
+ case DISPATCH_CMD_DepthRangeIndexed:
+ debug_print_unmarshal("DepthRangeIndexed");
+ _mesa_unmarshal_DepthRangeIndexed(ctx, (const struct marshal_cmd_DepthRangeIndexed *) cmd);
+ break;
+ case DISPATCH_CMD_TexImage3DMultisample:
+ debug_print_unmarshal("TexImage3DMultisample");
+ _mesa_unmarshal_TexImage3DMultisample(ctx, (const struct marshal_cmd_TexImage3DMultisample *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1fvNV:
+ debug_print_unmarshal("VertexAttrib1fvNV");
+ _mesa_unmarshal_VertexAttrib1fvNV(ctx, (const struct marshal_cmd_VertexAttrib1fvNV *) cmd);
+ break;
+ case DISPATCH_CMD_DetachShader:
+ debug_print_unmarshal("DetachShader");
+ _mesa_unmarshal_DetachShader(ctx, (const struct marshal_cmd_DetachShader *) cmd);
+ break;
+ case DISPATCH_CMD_CopyTexSubImage2D:
+ debug_print_unmarshal("CopyTexSubImage2D");
+ _mesa_unmarshal_CopyTexSubImage2D(ctx, (const struct marshal_cmd_CopyTexSubImage2D *) cmd);
+ break;
+ case DISPATCH_CMD_Color3iv:
+ debug_print_unmarshal("Color3iv");
+ _mesa_unmarshal_Color3iv(ctx, (const struct marshal_cmd_Color3iv *) cmd);
+ break;
+ case DISPATCH_CMD_DrawElements:
+ debug_print_unmarshal("DrawElements");
+ _mesa_unmarshal_DrawElements(ctx, (const struct marshal_cmd_DrawElements *) cmd);
+ break;
+ case DISPATCH_CMD_ScissorArrayv:
+ debug_print_unmarshal("ScissorArrayv");
+ _mesa_unmarshal_ScissorArrayv(ctx, (const struct marshal_cmd_ScissorArrayv *) cmd);
+ break;
+ case DISPATCH_CMD_EvalPoint2:
+ debug_print_unmarshal("EvalPoint2");
+ _mesa_unmarshal_EvalPoint2(ctx, (const struct marshal_cmd_EvalPoint2 *) cmd);
+ break;
+ case DISPATCH_CMD_EvalPoint1:
+ debug_print_unmarshal("EvalPoint1");
+ _mesa_unmarshal_EvalPoint1(ctx, (const struct marshal_cmd_EvalPoint1 *) cmd);
+ break;
+ case DISPATCH_CMD_PopMatrix:
+ debug_print_unmarshal("PopMatrix");
+ _mesa_unmarshal_PopMatrix(ctx, (const struct marshal_cmd_PopMatrix *) cmd);
+ break;
+ case DISPATCH_CMD_NamedBufferData:
+ debug_print_unmarshal("NamedBufferData");
+ _mesa_unmarshal_NamedBufferData(ctx, (const struct marshal_cmd_NamedBufferData *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord1d:
+ debug_print_unmarshal("EvalCoord1d");
+ _mesa_unmarshal_EvalCoord1d(ctx, (const struct marshal_cmd_EvalCoord1d *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttribL1d:
+ debug_print_unmarshal("VertexAttribL1d");
+ _mesa_unmarshal_VertexAttribL1d(ctx, (const struct marshal_cmd_VertexAttribL1d *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord1f:
+ debug_print_unmarshal("EvalCoord1f");
+ _mesa_unmarshal_EvalCoord1f(ctx, (const struct marshal_cmd_EvalCoord1f *) cmd);
+ break;
+ case DISPATCH_CMD_Materialf:
+ debug_print_unmarshal("Materialf");
+ _mesa_unmarshal_Materialf(ctx, (const struct marshal_cmd_Materialf *) cmd);
+ break;
+ case DISPATCH_CMD_Materiali:
+ debug_print_unmarshal("Materiali");
+ _mesa_unmarshal_Materiali(ctx, (const struct marshal_cmd_Materiali *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1uiv:
+ debug_print_unmarshal("ProgramUniform1uiv");
+ _mesa_unmarshal_ProgramUniform1uiv(ctx, (const struct marshal_cmd_ProgramUniform1uiv *) cmd);
+ break;
+ case DISPATCH_CMD_EvalCoord1dv:
+ debug_print_unmarshal("EvalCoord1dv");
+ _mesa_unmarshal_EvalCoord1dv(ctx, (const struct marshal_cmd_EvalCoord1dv *) cmd);
+ break;
+ case DISPATCH_CMD_Materialx:
+ debug_print_unmarshal("Materialx");
+ _mesa_unmarshal_Materialx(ctx, (const struct marshal_cmd_Materialx *) cmd);
+ break;
+ case DISPATCH_CMD_GetQueryBufferObjectiv:
+ debug_print_unmarshal("GetQueryBufferObjectiv");
+ _mesa_unmarshal_GetQueryBufferObjectiv(ctx, (const struct marshal_cmd_GetQueryBufferObjectiv *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform3i64ARB:
+ debug_print_unmarshal("ProgramUniform3i64ARB");
+ _mesa_unmarshal_ProgramUniform3i64ARB(ctx, (const struct marshal_cmd_ProgramUniform3i64ARB *) cmd);
+ break;
+ case DISPATCH_CMD_BindBuffer:
+ debug_print_unmarshal("BindBuffer");
+ _mesa_unmarshal_BindBuffer(ctx, (const struct marshal_cmd_BindBuffer *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1i:
+ debug_print_unmarshal("ProgramUniform1i");
+ _mesa_unmarshal_ProgramUniform1i(ctx, (const struct marshal_cmd_ProgramUniform1i *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1f:
+ debug_print_unmarshal("ProgramUniform1f");
+ _mesa_unmarshal_ProgramUniform1f(ctx, (const struct marshal_cmd_ProgramUniform1f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1d:
+ debug_print_unmarshal("ProgramUniform1d");
+ _mesa_unmarshal_ProgramUniform1d(ctx, (const struct marshal_cmd_ProgramUniform1d *) cmd);
+ break;
+ case DISPATCH_CMD_CopyConvolutionFilter2D:
+ debug_print_unmarshal("CopyConvolutionFilter2D");
+ _mesa_unmarshal_CopyConvolutionFilter2D(ctx, (const struct marshal_cmd_CopyConvolutionFilter2D *) cmd);
+ break;
+ case DISPATCH_CMD_CopyBufferSubData:
+ debug_print_unmarshal("CopyBufferSubData");
+ _mesa_unmarshal_CopyBufferSubData(ctx, (const struct marshal_cmd_CopyBufferSubData *) cmd);
+ break;
+ case DISPATCH_CMD_UniformMatrix3x4fv:
+ debug_print_unmarshal("UniformMatrix3x4fv");
+ _mesa_unmarshal_UniformMatrix3x4fv(ctx, (const struct marshal_cmd_UniformMatrix3x4fv *) cmd);
+ break;
+ case DISPATCH_CMD_Recti:
+ debug_print_unmarshal("Recti");
+ _mesa_unmarshal_Recti(ctx, (const struct marshal_cmd_Recti *) cmd);
+ break;
+ case DISPATCH_CMD_SamplerParameteri:
+ debug_print_unmarshal("SamplerParameteri");
+ _mesa_unmarshal_SamplerParameteri(ctx, (const struct marshal_cmd_SamplerParameteri *) cmd);
+ break;
+ case DISPATCH_CMD_Rectf:
+ debug_print_unmarshal("Rectf");
+ _mesa_unmarshal_Rectf(ctx, (const struct marshal_cmd_Rectf *) cmd);
+ break;
+ case DISPATCH_CMD_Rectd:
+ debug_print_unmarshal("Rectd");
+ _mesa_unmarshal_Rectd(ctx, (const struct marshal_cmd_Rectd *) cmd);
+ break;
+ case DISPATCH_CMD_MultMatrixx:
+ debug_print_unmarshal("MultMatrixx");
+ _mesa_unmarshal_MultMatrixx(ctx, (const struct marshal_cmd_MultMatrixx *) cmd);
+ break;
+ case DISPATCH_CMD_TexStorageMem3DMultisampleEXT:
+ debug_print_unmarshal("TexStorageMem3DMultisampleEXT");
+ _mesa_unmarshal_TexStorageMem3DMultisampleEXT(ctx, (const struct marshal_cmd_TexStorageMem3DMultisampleEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Rects:
+ debug_print_unmarshal("Rects");
+ _mesa_unmarshal_Rects(ctx, (const struct marshal_cmd_Rects *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4s:
+ debug_print_unmarshal("TexCoord4s");
+ _mesa_unmarshal_TexCoord4s(ctx, (const struct marshal_cmd_TexCoord4s *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4i:
+ debug_print_unmarshal("TexCoord4i");
+ _mesa_unmarshal_TexCoord4i(ctx, (const struct marshal_cmd_TexCoord4i *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniform1ui64vARB:
+ debug_print_unmarshal("ProgramUniform1ui64vARB");
+ _mesa_unmarshal_ProgramUniform1ui64vARB(ctx, (const struct marshal_cmd_ProgramUniform1ui64vARB *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4d:
+ debug_print_unmarshal("TexCoord4d");
+ _mesa_unmarshal_TexCoord4d(ctx, (const struct marshal_cmd_TexCoord4d *) cmd);
+ break;
+ case DISPATCH_CMD_TexCoord4f:
+ debug_print_unmarshal("TexCoord4f");
+ _mesa_unmarshal_TexCoord4f(ctx, (const struct marshal_cmd_TexCoord4f *) cmd);
+ break;
+ case DISPATCH_CMD_ProgramUniformMatrix3dv:
+ debug_print_unmarshal("ProgramUniformMatrix3dv");
+ _mesa_unmarshal_ProgramUniformMatrix3dv(ctx, (const struct marshal_cmd_ProgramUniformMatrix3dv *) cmd);
+ break;
+ case DISPATCH_CMD_LockArraysEXT:
+ debug_print_unmarshal("LockArraysEXT");
+ _mesa_unmarshal_LockArraysEXT(ctx, (const struct marshal_cmd_LockArraysEXT *) cmd);
+ break;
+ case DISPATCH_CMD_Rectfv:
+ debug_print_unmarshal("Rectfv");
+ _mesa_unmarshal_Rectfv(ctx, (const struct marshal_cmd_Rectfv *) cmd);
+ break;
+ case DISPATCH_CMD_BindImageTexture:
+ debug_print_unmarshal("BindImageTexture");
+ _mesa_unmarshal_BindImageTexture(ctx, (const struct marshal_cmd_BindImageTexture *) cmd);
+ break;
+ case DISPATCH_CMD_MinSampleShading:
+ debug_print_unmarshal("MinSampleShading");
+ _mesa_unmarshal_MinSampleShading(ctx, (const struct marshal_cmd_MinSampleShading *) cmd);
+ break;
+ case DISPATCH_CMD_VertexAttrib1dNV:
+ debug_print_unmarshal("VertexAttrib1dNV");
+ _mesa_unmarshal_VertexAttrib1dNV(ctx, (const struct marshal_cmd_VertexAttrib1dNV *) cmd);
+ break;
+ case DISPATCH_CMD_EndFragmentShaderATI:
+ debug_print_unmarshal("EndFragmentShaderATI");
+ _mesa_unmarshal_EndFragmentShaderATI(ctx, (const struct marshal_cmd_EndFragmentShaderATI *) cmd);
+ break;
+ case DISPATCH_CMD_Uniform4iv:
+ debug_print_unmarshal("Uniform4iv");
+ _mesa_unmarshal_Uniform4iv(ctx, (const struct marshal_cmd_Uniform4iv *) cmd);
+ break;
+ default:
+ assert(!"Unrecognized command ID");
+ break;
+ }
+
+ return cmd_base->cmd_size;
+}
+
+
+struct _glapi_table *
+_mesa_create_marshal_table(const struct gl_context *ctx)
+{
+ struct _glapi_table *table;
+
+ table = _mesa_alloc_dispatch_table();
+ if (table == NULL)
+ return NULL;
+
+ SET_MapGrid1d(table, _mesa_marshal_MapGrid1d);
+ SET_MapGrid1f(table, _mesa_marshal_MapGrid1f);
+ SET_ProgramUniform3i64vARB(table, _mesa_marshal_ProgramUniform3i64vARB);
+ SET_GetProgramResourceLocationIndex(table, _mesa_marshal_GetProgramResourceLocationIndex);
+ SET_TexCoordP1ui(table, _mesa_marshal_TexCoordP1ui);
+ SET_PolygonStipple(table, _mesa_marshal_PolygonStipple);
+ SET_MultiTexCoord1dv(table, _mesa_marshal_MultiTexCoord1dv);
+ SET_IsEnabled(table, _mesa_marshal_IsEnabled);
+ SET_AttachShader(table, _mesa_marshal_AttachShader);
+ SET_VertexAttrib3fARB(table, _mesa_marshal_VertexAttrib3fARB);
+ SET_Indexubv(table, _mesa_marshal_Indexubv);
+ SET_GetCompressedTextureImage(table, _mesa_marshal_GetCompressedTextureImage);
+ SET_MultiTexCoordP3uiv(table, _mesa_marshal_MultiTexCoordP3uiv);
+ SET_VertexAttribI4usv(table, _mesa_marshal_VertexAttribI4usv);
+ SET_Color3ubv(table, _mesa_marshal_Color3ubv);
+ SET_GetClipPlanex(table, _mesa_marshal_GetClipPlanex);
+ SET_ProgramUniform2ui(table, _mesa_marshal_ProgramUniform2ui);
+ SET_TexCoordP1uiv(table, _mesa_marshal_TexCoordP1uiv);
+ SET_RenderbufferStorage(table, _mesa_marshal_RenderbufferStorage);
+ SET_GetClipPlanef(table, _mesa_marshal_GetClipPlanef);
+ SET_GetPerfQueryDataINTEL(table, _mesa_marshal_GetPerfQueryDataINTEL);
+ SET_DrawArraysIndirect(table, _mesa_marshal_DrawArraysIndirect);
+ SET_Uniform3i(table, _mesa_marshal_Uniform3i);
+ SET_VDPAUGetSurfaceivNV(table, _mesa_marshal_VDPAUGetSurfaceivNV);
+ SET_Uniform3d(table, _mesa_marshal_Uniform3d);
+ SET_Uniform3f(table, _mesa_marshal_Uniform3f);
+ SET_UniformMatrix2x4fv(table, _mesa_marshal_UniformMatrix2x4fv);
+ SET_QueryMatrixxOES(table, _mesa_marshal_QueryMatrixxOES);
+ SET_Normal3iv(table, _mesa_marshal_Normal3iv);
+ SET_DrawTexiOES(table, _mesa_marshal_DrawTexiOES);
+ SET_Viewport(table, _mesa_marshal_Viewport);
+ SET_CreateProgramPipelines(table, _mesa_marshal_CreateProgramPipelines);
+ SET_DeleteVertexArrays(table, _mesa_marshal_DeleteVertexArrays);
+ SET_ClearColorIuiEXT(table, _mesa_marshal_ClearColorIuiEXT);
+ SET_GetnConvolutionFilterARB(table, _mesa_marshal_GetnConvolutionFilterARB);
+ SET_PolygonOffsetx(table, _mesa_marshal_PolygonOffsetx);
+ SET_GetLightxv(table, _mesa_marshal_GetLightxv);
+ SET_GetConvolutionParameteriv(table, _mesa_marshal_GetConvolutionParameteriv);
+ SET_DepthRangeIndexedfOES(table, _mesa_marshal_DepthRangeIndexedfOES);
+ SET_GetProgramResourceLocation(table, _mesa_marshal_GetProgramResourceLocation);
+ SET_GetSubroutineUniformLocation(table, _mesa_marshal_GetSubroutineUniformLocation);
+ SET_VertexAttrib4usv(table, _mesa_marshal_VertexAttrib4usv);
+ SET_TextureStorage1DEXT(table, _mesa_marshal_TextureStorage1DEXT);
+ SET_VertexAttrib4Nub(table, _mesa_marshal_VertexAttrib4Nub);
+ SET_VertexAttribP3ui(table, _mesa_marshal_VertexAttribP3ui);
+ SET_PointSize(table, _mesa_marshal_PointSize);
+ SET_PopName(table, _mesa_marshal_PopName);
+ SET_FramebufferTexture(table, _mesa_marshal_FramebufferTexture);
+ SET_CreateTransformFeedbacks(table, _mesa_marshal_CreateTransformFeedbacks);
+ SET_VertexAttrib4ubNV(table, _mesa_marshal_VertexAttrib4ubNV);
+ SET_ValidateProgramPipeline(table, _mesa_marshal_ValidateProgramPipeline);
+ SET_BindFragDataLocationIndexed(table, _mesa_marshal_BindFragDataLocationIndexed);
+ SET_GetClipPlane(table, _mesa_marshal_GetClipPlane);
+ SET_DeleteSemaphoresEXT(table, _mesa_marshal_DeleteSemaphoresEXT);
+ SET_TexCoordP4uiv(table, _mesa_marshal_TexCoordP4uiv);
+ SET_VertexAttribs3dvNV(table, _mesa_marshal_VertexAttribs3dvNV);
+ SET_ProgramUniformMatrix2x4dv(table, _mesa_marshal_ProgramUniformMatrix2x4dv);
+ SET_GenQueries(table, _mesa_marshal_GenQueries);
+ SET_ProgramUniform4iv(table, _mesa_marshal_ProgramUniform4iv);
+ SET_ObjectUnpurgeableAPPLE(table, _mesa_marshal_ObjectUnpurgeableAPPLE);
+ SET_GetCompressedTextureSubImage(table, _mesa_marshal_GetCompressedTextureSubImage);
+ SET_TexCoord2iv(table, _mesa_marshal_TexCoord2iv);
+ SET_TexImage2DMultisample(table, _mesa_marshal_TexImage2DMultisample);
+ SET_TexParameterx(table, _mesa_marshal_TexParameterx);
+ SET_Rotatef(table, _mesa_marshal_Rotatef);
+ SET_TexParameterf(table, _mesa_marshal_TexParameterf);
+ SET_TexParameteri(table, _mesa_marshal_TexParameteri);
+ SET_GetUniformiv(table, _mesa_marshal_GetUniformiv);
+ SET_ClearBufferSubData(table, _mesa_marshal_ClearBufferSubData);
+ SET_TextureParameterfv(table, _mesa_marshal_TextureParameterfv);
+ SET_VDPAUFiniNV(table, _mesa_marshal_VDPAUFiniNV);
+ SET_ProgramUniformMatrix4x2fv(table, _mesa_marshal_ProgramUniformMatrix4x2fv);
+ SET_ProgramUniform2f(table, _mesa_marshal_ProgramUniform2f);
+ SET_ProgramUniform2d(table, _mesa_marshal_ProgramUniform2d);
+ SET_ProgramUniform2i(table, _mesa_marshal_ProgramUniform2i);
+ SET_Fogx(table, _mesa_marshal_Fogx);
+ SET_Uniform3ui64ARB(table, _mesa_marshal_Uniform3ui64ARB);
+ SET_Fogf(table, _mesa_marshal_Fogf);
+ SET_TexSubImage1D(table, _mesa_marshal_TexSubImage1D);
+ SET_ProgramUniform3ui64vARB(table, _mesa_marshal_ProgramUniform3ui64vARB);
+ SET_Color4usv(table, _mesa_marshal_Color4usv);
+ SET_Fogi(table, _mesa_marshal_Fogi);
+ SET_DepthFunc(table, _mesa_marshal_DepthFunc);
+ SET_GetSamplerParameterIiv(table, _mesa_marshal_GetSamplerParameterIiv);
+ SET_VertexArrayAttribLFormat(table, _mesa_marshal_VertexArrayAttribLFormat);
+ SET_VertexAttribI4uiEXT(table, _mesa_marshal_VertexAttribI4uiEXT);
+ SET_DrawElementsInstancedBaseVertexBaseInstance(table, _mesa_marshal_DrawElementsInstancedBaseVertexBaseInstance);
+ SET_ProgramEnvParameter4dvARB(table, _mesa_marshal_ProgramEnvParameter4dvARB);
+ SET_ColorTableParameteriv(table, _mesa_marshal_ColorTableParameteriv);
+ SET_BindSamplers(table, _mesa_marshal_BindSamplers);
+ SET_GetnCompressedTexImageARB(table, _mesa_marshal_GetnCompressedTexImageARB);
+ SET_CopyNamedBufferSubData(table, _mesa_marshal_CopyNamedBufferSubData);
+ SET_BindSampler(table, _mesa_marshal_BindSampler);
+ SET_GetUniformuiv(table, _mesa_marshal_GetUniformuiv);
+ SET_GetQueryBufferObjectuiv(table, _mesa_marshal_GetQueryBufferObjectuiv);
+ SET_MultiTexCoord2fARB(table, _mesa_marshal_MultiTexCoord2fARB);
+ SET_Uniform1ui64ARB(table, _mesa_marshal_Uniform1ui64ARB);
+ SET_GetTextureImage(table, _mesa_marshal_GetTextureImage);
+ SET_MultiTexCoord3iv(table, _mesa_marshal_MultiTexCoord3iv);
+ SET_Finish(table, _mesa_marshal_Finish);
+ SET_ClearStencil(table, _mesa_marshal_ClearStencil);
+ SET_ClearColorIiEXT(table, _mesa_marshal_ClearColorIiEXT);
+ SET_LoadMatrixd(table, _mesa_marshal_LoadMatrixd);
+ SET_VDPAURegisterOutputSurfaceNV(table, _mesa_marshal_VDPAURegisterOutputSurfaceNV);
+ SET_VertexP4ui(table, _mesa_marshal_VertexP4ui);
+ SET_GetProgramResourceIndex(table, _mesa_marshal_GetProgramResourceIndex);
+ SET_TextureStorage3DMultisample(table, _mesa_marshal_TextureStorage3DMultisample);
+ SET_GetnUniformivARB(table, _mesa_marshal_GetnUniformivARB);
+ SET_ReleaseShaderCompiler(table, _mesa_marshal_ReleaseShaderCompiler);
+ SET_BlendFuncSeparate(table, _mesa_marshal_BlendFuncSeparate);
+ SET_Color3us(table, _mesa_marshal_Color3us);
+ SET_LoadMatrixx(table, _mesa_marshal_LoadMatrixx);
+ SET_BufferStorage(table, _mesa_marshal_BufferStorage);
+ SET_Color3ub(table, _mesa_marshal_Color3ub);
+ SET_Color3ui(table, _mesa_marshal_Color3ui);
+ SET_VertexAttrib4dvNV(table, _mesa_marshal_VertexAttrib4dvNV);
+ SET_AlphaFragmentOp2ATI(table, _mesa_marshal_AlphaFragmentOp2ATI);
+ SET_RasterPos4dv(table, _mesa_marshal_RasterPos4dv);
+ SET_DeleteProgramPipelines(table, _mesa_marshal_DeleteProgramPipelines);
+ SET_LineWidthx(table, _mesa_marshal_LineWidthx);
+ SET_GetTransformFeedbacki_v(table, _mesa_marshal_GetTransformFeedbacki_v);
+ SET_Indexdv(table, _mesa_marshal_Indexdv);
+ SET_GetnPixelMapfvARB(table, _mesa_marshal_GetnPixelMapfvARB);
+ SET_EGLImageTargetTexture2DOES(table, _mesa_marshal_EGLImageTargetTexture2DOES);
+ SET_DepthMask(table, _mesa_marshal_DepthMask);
+ SET_WindowPos4ivMESA(table, _mesa_marshal_WindowPos4ivMESA);
+ SET_GetShaderInfoLog(table, _mesa_marshal_GetShaderInfoLog);
+ SET_BindFragmentShaderATI(table, _mesa_marshal_BindFragmentShaderATI);
+ SET_BlendFuncSeparateiARB(table, _mesa_marshal_BlendFuncSeparateiARB);
+ SET_EGLImageTargetRenderbufferStorageOES(table, _mesa_marshal_EGLImageTargetRenderbufferStorageOES);
+ SET_GenTransformFeedbacks(table, _mesa_marshal_GenTransformFeedbacks);
+ SET_VertexPointer(table, _mesa_marshal_VertexPointer);
+ SET_GetCompressedTexImage(table, _mesa_marshal_GetCompressedTexImage);
+ SET_ProgramLocalParameter4dvARB(table, _mesa_marshal_ProgramLocalParameter4dvARB);
+ SET_UniformMatrix2dv(table, _mesa_marshal_UniformMatrix2dv);
+ SET_GetQueryObjectui64v(table, _mesa_marshal_GetQueryObjectui64v);
+ SET_VertexAttribP1uiv(table, _mesa_marshal_VertexAttribP1uiv);
+ SET_IsProgram(table, _mesa_marshal_IsProgram);
+ SET_BindBuffersBase(table, _mesa_marshal_BindBuffersBase);
+ SET_GenTextures(table, _mesa_marshal_GenTextures);
+ SET_UnmapNamedBuffer(table, _mesa_marshal_UnmapNamedBuffer);
+ SET_UniformMatrix3x2dv(table, _mesa_marshal_UniformMatrix3x2dv);
+ SET_WindowPos4fMESA(table, _mesa_marshal_WindowPos4fMESA);
+ SET_VertexAttribs2fvNV(table, _mesa_marshal_VertexAttribs2fvNV);
+ SET_VertexAttribP4ui(table, _mesa_marshal_VertexAttribP4ui);
+ SET_StringMarkerGREMEDY(table, _mesa_marshal_StringMarkerGREMEDY);
+ SET_Uniform4i(table, _mesa_marshal_Uniform4i);
+ SET_Uniform4d(table, _mesa_marshal_Uniform4d);
+ SET_Uniform4f(table, _mesa_marshal_Uniform4f);
+ SET_ProgramUniform3dv(table, _mesa_marshal_ProgramUniform3dv);
+ SET_GetNamedBufferParameteri64v(table, _mesa_marshal_GetNamedBufferParameteri64v);
+ SET_NamedFramebufferTexture(table, _mesa_marshal_NamedFramebufferTexture);
+ SET_ProgramUniform3d(table, _mesa_marshal_ProgramUniform3d);
+ SET_ProgramUniform3f(table, _mesa_marshal_ProgramUniform3f);
+ SET_ProgramUniform3i(table, _mesa_marshal_ProgramUniform3i);
+ SET_PointParameterfv(table, _mesa_marshal_PointParameterfv);
+ SET_GetHistogramParameterfv(table, _mesa_marshal_GetHistogramParameterfv);
+ SET_GetString(table, _mesa_marshal_GetString);
+ SET_VDPAUUnmapSurfacesNV(table, _mesa_marshal_VDPAUUnmapSurfacesNV);
+ SET_GetnHistogramARB(table, _mesa_marshal_GetnHistogramARB);
+ SET_SecondaryColor3s(table, _mesa_marshal_SecondaryColor3s);
+ SET_TexStorageMem2DEXT(table, _mesa_marshal_TexStorageMem2DEXT);
+ SET_VertexAttribP2uiv(table, _mesa_marshal_VertexAttribP2uiv);
+ SET_UniformMatrix3x4dv(table, _mesa_marshal_UniformMatrix3x4dv);
+ SET_VertexAttrib3fNV(table, _mesa_marshal_VertexAttrib3fNV);
+ SET_SecondaryColor3b(table, _mesa_marshal_SecondaryColor3b);
+ SET_EnableClientState(table, _mesa_marshal_EnableClientState);
+ SET_GetActiveSubroutineName(table, _mesa_marshal_GetActiveSubroutineName);
+ SET_SecondaryColor3i(table, _mesa_marshal_SecondaryColor3i);
+ SET_FlushMappedBufferRange(table, _mesa_marshal_FlushMappedBufferRange);
+ SET_TexStorageMem3DEXT(table, _mesa_marshal_TexStorageMem3DEXT);
+ SET_Lightfv(table, _mesa_marshal_Lightfv);
+ SET_GetFramebufferAttachmentParameteriv(table, _mesa_marshal_GetFramebufferAttachmentParameteriv);
+ SET_ColorSubTable(table, _mesa_marshal_ColorSubTable);
+ SET_GetVertexArrayIndexed64iv(table, _mesa_marshal_GetVertexArrayIndexed64iv);
+ SET_EndPerfMonitorAMD(table, _mesa_marshal_EndPerfMonitorAMD);
+ SET_CreateBuffers(table, _mesa_marshal_CreateBuffers);
+ SET_VertexAttribs4dvNV(table, _mesa_marshal_VertexAttribs4dvNV);
+ SET_Uniform2i64vARB(table, _mesa_marshal_Uniform2i64vARB);
+ SET_GetMultisamplefv(table, _mesa_marshal_GetMultisamplefv);
+ SET_GetActiveSubroutineUniformName(table, _mesa_marshal_GetActiveSubroutineUniformName);
+ SET_Rectdv(table, _mesa_marshal_Rectdv);
+ SET_DrawArraysInstancedARB(table, _mesa_marshal_DrawArraysInstancedARB);
+ SET_MakeImageHandleNonResidentARB(table, _mesa_marshal_MakeImageHandleNonResidentARB);
+ SET_ImportMemoryFdEXT(table, _mesa_marshal_ImportMemoryFdEXT);
+ SET_ProgramEnvParameters4fvEXT(table, _mesa_marshal_ProgramEnvParameters4fvEXT);
+ SET_TexStorageMem1DEXT(table, _mesa_marshal_TexStorageMem1DEXT);
+ SET_BlendBarrier(table, _mesa_marshal_BlendBarrier);
+ SET_VertexAttrib2svNV(table, _mesa_marshal_VertexAttrib2svNV);
+ SET_SecondaryColorP3uiv(table, _mesa_marshal_SecondaryColorP3uiv);
+ SET_GetnPixelMapuivARB(table, _mesa_marshal_GetnPixelMapuivARB);
+ SET_GetSamplerParameterIuiv(table, _mesa_marshal_GetSamplerParameterIuiv);
+ SET_Disablei(table, _mesa_marshal_Disablei);
+ SET_CompressedTexSubImage3D(table, _mesa_marshal_CompressedTexSubImage3D);
+ SET_WindowPos4svMESA(table, _mesa_marshal_WindowPos4svMESA);
+ SET_ObjectLabel(table, _mesa_marshal_ObjectLabel);
+ SET_Color3dv(table, _mesa_marshal_Color3dv);
+ SET_ProgramUniform1ui64ARB(table, _mesa_marshal_ProgramUniform1ui64ARB);
+ SET_BeginQuery(table, _mesa_marshal_BeginQuery);
+ SET_VertexP3uiv(table, _mesa_marshal_VertexP3uiv);
+ SET_GetUniformLocation(table, _mesa_marshal_GetUniformLocation);
+ SET_PixelStoref(table, _mesa_marshal_PixelStoref);
+ SET_WindowPos2iv(table, _mesa_marshal_WindowPos2iv);
+ SET_PixelStorei(table, _mesa_marshal_PixelStorei);
+ SET_VertexAttribs1svNV(table, _mesa_marshal_VertexAttribs1svNV);
+ SET_CheckNamedFramebufferStatus(table, _mesa_marshal_CheckNamedFramebufferStatus);
+ SET_UniformSubroutinesuiv(table, _mesa_marshal_UniformSubroutinesuiv);
+ SET_CheckFramebufferStatus(table, _mesa_marshal_CheckFramebufferStatus);
+ SET_DispatchComputeIndirect(table, _mesa_marshal_DispatchComputeIndirect);
+ SET_InvalidateBufferData(table, _mesa_marshal_InvalidateBufferData);
+ SET_GetUniformdv(table, _mesa_marshal_GetUniformdv);
+ SET_ProgramLocalParameters4fvEXT(table, _mesa_marshal_ProgramLocalParameters4fvEXT);
+ SET_VertexAttribL1dv(table, _mesa_marshal_VertexAttribL1dv);
+ SET_Uniform1ui64vARB(table, _mesa_marshal_Uniform1ui64vARB);
+ SET_IsFramebuffer(table, _mesa_marshal_IsFramebuffer);
+ SET_GetDoublev(table, _mesa_marshal_GetDoublev);
+ SET_GetObjectLabel(table, _mesa_marshal_GetObjectLabel);
+ SET_ColorP3uiv(table, _mesa_marshal_ColorP3uiv);
+ SET_GetTextureSubImage(table, _mesa_marshal_GetTextureSubImage);
+ SET_VertexAttribI4ivEXT(table, _mesa_marshal_VertexAttribI4ivEXT);
+ SET_VertexAttrib1svNV(table, _mesa_marshal_VertexAttrib1svNV);
+ SET_SecondaryColor3ubv(table, _mesa_marshal_SecondaryColor3ubv);
+ SET_GetDebugMessageLog(table, _mesa_marshal_GetDebugMessageLog);
+ SET_Uniform4ui64ARB(table, _mesa_marshal_Uniform4ui64ARB);
+ SET_RasterPos3fv(table, _mesa_marshal_RasterPos3fv);
+ SET_GetShaderSource(table, _mesa_marshal_GetShaderSource);
+ SET_BindProgramARB(table, _mesa_marshal_BindProgramARB);
+ SET_VertexAttrib3sNV(table, _mesa_marshal_VertexAttrib3sNV);
+ SET_ColorFragmentOp1ATI(table, _mesa_marshal_ColorFragmentOp1ATI);
+ SET_ProgramUniformMatrix4x3fv(table, _mesa_marshal_ProgramUniformMatrix4x3fv);
+ SET_PopClientAttrib(table, _mesa_marshal_PopClientAttrib);
+ SET_DrawElementsInstancedARB(table, _mesa_marshal_DrawElementsInstancedARB);
+ SET_GetQueryObjectuiv(table, _mesa_marshal_GetQueryObjectuiv);
+ SET_VertexAttribI4bv(table, _mesa_marshal_VertexAttribI4bv);
+ SET_DisableVertexArrayAttrib(table, _mesa_marshal_DisableVertexArrayAttrib);
+ SET_VertexAttribL4d(table, _mesa_marshal_VertexAttribL4d);
+ SET_ListBase(table, _mesa_marshal_ListBase);
+ SET_GenerateMipmap(table, _mesa_marshal_GenerateMipmap);
+ SET_BindBufferRange(table, _mesa_marshal_BindBufferRange);
+ SET_ProgramUniformMatrix2x4fv(table, _mesa_marshal_ProgramUniformMatrix2x4fv);
+ SET_BindBufferBase(table, _mesa_marshal_BindBufferBase);
+ SET_GetQueryObjectiv(table, _mesa_marshal_GetQueryObjectiv);
+ SET_VertexAttrib2s(table, _mesa_marshal_VertexAttrib2s);
+ SET_SecondaryColor3fvEXT(table, _mesa_marshal_SecondaryColor3fvEXT);
+ SET_VertexAttrib2d(table, _mesa_marshal_VertexAttrib2d);
+ SET_ClearNamedFramebufferiv(table, _mesa_marshal_ClearNamedFramebufferiv);
+ SET_Uniform1fv(table, _mesa_marshal_Uniform1fv);
+ SET_GetProgramPipelineInfoLog(table, _mesa_marshal_GetProgramPipelineInfoLog);
+ SET_DepthBoundsEXT(table, _mesa_marshal_DepthBoundsEXT);
+ SET_BufferStorageMemEXT(table, _mesa_marshal_BufferStorageMemEXT);
+ SET_WindowPos3fv(table, _mesa_marshal_WindowPos3fv);
+ SET_GetHistogramParameteriv(table, _mesa_marshal_GetHistogramParameteriv);
+ SET_PointParameteriv(table, _mesa_marshal_PointParameteriv);
+ SET_NamedRenderbufferStorage(table, _mesa_marshal_NamedRenderbufferStorage);
+ SET_GetProgramivARB(table, _mesa_marshal_GetProgramivARB);
+ SET_BindRenderbuffer(table, _mesa_marshal_BindRenderbuffer);
+ SET_SecondaryColor3fEXT(table, _mesa_marshal_SecondaryColor3fEXT);
+ SET_PrimitiveRestartIndex(table, _mesa_marshal_PrimitiveRestartIndex);
+ SET_TextureStorageMem3DEXT(table, _mesa_marshal_TextureStorageMem3DEXT);
+ SET_VertexAttribI4ubv(table, _mesa_marshal_VertexAttribI4ubv);
+ SET_GetGraphicsResetStatusARB(table, _mesa_marshal_GetGraphicsResetStatusARB);
+ SET_CreateRenderbuffers(table, _mesa_marshal_CreateRenderbuffers);
+ SET_ActiveStencilFaceEXT(table, _mesa_marshal_ActiveStencilFaceEXT);
+ SET_VertexAttrib4dNV(table, _mesa_marshal_VertexAttrib4dNV);
+ SET_DepthRange(table, _mesa_marshal_DepthRange);
+ SET_VertexAttrib4fNV(table, _mesa_marshal_VertexAttrib4fNV);
+ SET_Uniform4fv(table, _mesa_marshal_Uniform4fv);
+ SET_SamplerParameterIiv(table, _mesa_marshal_SamplerParameterIiv);
+ SET_Frustumf(table, _mesa_marshal_Frustumf);
+ SET_GetQueryBufferObjectui64v(table, _mesa_marshal_GetQueryBufferObjectui64v);
+ SET_ProgramUniform2uiv(table, _mesa_marshal_ProgramUniform2uiv);
+ SET_Rectsv(table, _mesa_marshal_Rectsv);
+ SET_Frustumx(table, _mesa_marshal_Frustumx);
+ SET_CullFace(table, _mesa_marshal_CullFace);
+ SET_BindTexture(table, _mesa_marshal_BindTexture);
+ SET_MultiTexCoord4fARB(table, _mesa_marshal_MultiTexCoord4fARB);
+ SET_Uniform2ui64ARB(table, _mesa_marshal_Uniform2ui64ARB);
+ SET_MultiTexCoordP2uiv(table, _mesa_marshal_MultiTexCoordP2uiv);
+ SET_BeginPerfQueryINTEL(table, _mesa_marshal_BeginPerfQueryINTEL);
+ SET_NormalPointer(table, _mesa_marshal_NormalPointer);
+ SET_WindowPos4iMESA(table, _mesa_marshal_WindowPos4iMESA);
+ SET_VertexAttrib4bv(table, _mesa_marshal_VertexAttrib4bv);
+ SET_SecondaryColor3usv(table, _mesa_marshal_SecondaryColor3usv);
+ SET_GetPixelMapuiv(table, _mesa_marshal_GetPixelMapuiv);
+ SET_MapNamedBuffer(table, _mesa_marshal_MapNamedBuffer);
+ SET_Indexfv(table, _mesa_marshal_Indexfv);
+ SET_AlphaFragmentOp1ATI(table, _mesa_marshal_AlphaFragmentOp1ATI);
+ SET_GetFloatv(table, _mesa_marshal_GetFloatv);
+ SET_ProgramUniform2dv(table, _mesa_marshal_ProgramUniform2dv);
+ SET_MultiTexCoord3i(table, _mesa_marshal_MultiTexCoord3i);
+ SET_ProgramUniform1fv(table, _mesa_marshal_ProgramUniform1fv);
+ SET_MultiTexCoord3d(table, _mesa_marshal_MultiTexCoord3d);
+ SET_TexCoord3sv(table, _mesa_marshal_TexCoord3sv);
+ SET_Fogfv(table, _mesa_marshal_Fogfv);
+ SET_Minmax(table, _mesa_marshal_Minmax);
+ SET_MultiTexCoord3s(table, _mesa_marshal_MultiTexCoord3s);
+ SET_Vertex4iv(table, _mesa_marshal_Vertex4iv);
+ SET_BufferSubData(table, _mesa_marshal_BufferSubData);
+ SET_TexCoord4dv(table, _mesa_marshal_TexCoord4dv);
+ SET_Begin(table, _mesa_marshal_Begin);
+ SET_LightModeli(table, _mesa_marshal_LightModeli);
+ SET_UniformMatrix2fv(table, _mesa_marshal_UniformMatrix2fv);
+ SET_LightModelf(table, _mesa_marshal_LightModelf);
+ SET_GetTexParameterfv(table, _mesa_marshal_GetTexParameterfv);
+ SET_TextureStorage1D(table, _mesa_marshal_TextureStorage1D);
+ SET_MultiTexCoord2fvARB(table, _mesa_marshal_MultiTexCoord2fvARB);
+ SET_VertexAttrib4ubv(table, _mesa_marshal_VertexAttrib4ubv);
+ SET_GetnTexImageARB(table, _mesa_marshal_GetnTexImageARB);
+ SET_ColorMask(table, _mesa_marshal_ColorMask);
+ SET_MultiTexCoord4x(table, _mesa_marshal_MultiTexCoord4x);
+ SET_UniformHandleui64ARB(table, _mesa_marshal_UniformHandleui64ARB);
+ SET_VertexAttribs4svNV(table, _mesa_marshal_VertexAttribs4svNV);
+ SET_DrawElementsInstancedBaseInstance(table, _mesa_marshal_DrawElementsInstancedBaseInstance);
+ SET_UniformMatrix4fv(table, _mesa_marshal_UniformMatrix4fv);
+ SET_UniformMatrix3x2fv(table, _mesa_marshal_UniformMatrix3x2fv);
+ SET_VertexAttrib4Nuiv(table, _mesa_marshal_VertexAttrib4Nuiv);
+ SET_ClientActiveTexture(table, _mesa_marshal_ClientActiveTexture);
+ SET_GetUniformIndices(table, _mesa_marshal_GetUniformIndices);
+ SET_MultiTexCoord2sv(table, _mesa_marshal_MultiTexCoord2sv);
+ SET_NamedBufferStorage(table, _mesa_marshal_NamedBufferStorage);
+ SET_NamedFramebufferDrawBuffer(table, _mesa_marshal_NamedFramebufferDrawBuffer);
+ SET_NamedFramebufferTextureLayer(table, _mesa_marshal_NamedFramebufferTextureLayer);
+ SET_LoadIdentity(table, _mesa_marshal_LoadIdentity);
+ SET_ActiveShaderProgram(table, _mesa_marshal_ActiveShaderProgram);
+ SET_BindImageTextures(table, _mesa_marshal_BindImageTextures);
+ SET_DeleteTransformFeedbacks(table, _mesa_marshal_DeleteTransformFeedbacks);
+ SET_VertexAttrib4ubvNV(table, _mesa_marshal_VertexAttrib4ubvNV);
+ SET_FogCoordfEXT(table, _mesa_marshal_FogCoordfEXT);
+ SET_GetMapfv(table, _mesa_marshal_GetMapfv);
+ SET_GetProgramInfoLog(table, _mesa_marshal_GetProgramInfoLog);
+ SET_BindTransformFeedback(table, _mesa_marshal_BindTransformFeedback);
+ SET_GetPixelMapfv(table, _mesa_marshal_GetPixelMapfv);
+ SET_TextureBufferRange(table, _mesa_marshal_TextureBufferRange);
+ SET_VertexAttrib4svNV(table, _mesa_marshal_VertexAttrib4svNV);
+ SET_PatchParameteri(table, _mesa_marshal_PatchParameteri);
+ SET_GetNamedBufferSubData(table, _mesa_marshal_GetNamedBufferSubData);
+ SET_VDPAUSurfaceAccessNV(table, _mesa_marshal_VDPAUSurfaceAccessNV);
+ SET_EdgeFlagPointer(table, _mesa_marshal_EdgeFlagPointer);
+ SET_WindowPos2f(table, _mesa_marshal_WindowPos2f);
+ SET_WindowPos2d(table, _mesa_marshal_WindowPos2d);
+ SET_GetVertexAttribLdv(table, _mesa_marshal_GetVertexAttribLdv);
+ SET_WindowPos2i(table, _mesa_marshal_WindowPos2i);
+ SET_WindowPos2s(table, _mesa_marshal_WindowPos2s);
+ SET_VertexAttribI1uiEXT(table, _mesa_marshal_VertexAttribI1uiEXT);
+ SET_DeleteSync(table, _mesa_marshal_DeleteSync);
+ SET_WindowPos4fvMESA(table, _mesa_marshal_WindowPos4fvMESA);
+ SET_CompressedTexImage3D(table, _mesa_marshal_CompressedTexImage3D);
+ SET_GenSemaphoresEXT(table, _mesa_marshal_GenSemaphoresEXT);
+ SET_VertexAttribI1uiv(table, _mesa_marshal_VertexAttribI1uiv);
+ SET_SecondaryColor3dv(table, _mesa_marshal_SecondaryColor3dv);
+ SET_GetnPixelMapusvARB(table, _mesa_marshal_GetnPixelMapusvARB);
+ SET_VertexAttrib3s(table, _mesa_marshal_VertexAttrib3s);
+ SET_UniformMatrix4x3fv(table, _mesa_marshal_UniformMatrix4x3fv);
+ SET_GetQueryiv(table, _mesa_marshal_GetQueryiv);
+ SET_VertexAttrib3d(table, _mesa_marshal_VertexAttrib3d);
+ SET_MapNamedBufferRange(table, _mesa_marshal_MapNamedBufferRange);
+ SET_MapBuffer(table, _mesa_marshal_MapBuffer);
+ SET_GetProgramStageiv(table, _mesa_marshal_GetProgramStageiv);
+ SET_VertexAttrib4Nbv(table, _mesa_marshal_VertexAttrib4Nbv);
+ SET_ProgramBinary(table, _mesa_marshal_ProgramBinary);
+ SET_InvalidateTexImage(table, _mesa_marshal_InvalidateTexImage);
+ SET_Uniform4ui(table, _mesa_marshal_Uniform4ui);
+ SET_VertexArrayAttribFormat(table, _mesa_marshal_VertexArrayAttribFormat);
+ SET_VertexAttrib1fARB(table, _mesa_marshal_VertexAttrib1fARB);
+ SET_GetBooleani_v(table, _mesa_marshal_GetBooleani_v);
+ SET_DrawTexsOES(table, _mesa_marshal_DrawTexsOES);
+ SET_GetObjectPtrLabel(table, _mesa_marshal_GetObjectPtrLabel);
+ SET_ProgramParameteri(table, _mesa_marshal_ProgramParameteri);
+ SET_Color3fv(table, _mesa_marshal_Color3fv);
+ SET_GetnMapfvARB(table, _mesa_marshal_GetnMapfvARB);
+ SET_MultiTexCoord2i(table, _mesa_marshal_MultiTexCoord2i);
+ SET_MultiTexCoord2d(table, _mesa_marshal_MultiTexCoord2d);
+ SET_SamplerParameterIuiv(table, _mesa_marshal_SamplerParameterIuiv);
+ SET_MultiTexCoord2s(table, _mesa_marshal_MultiTexCoord2s);
+ SET_GetInternalformati64v(table, _mesa_marshal_GetInternalformati64v);
+ SET_VDPAURegisterVideoSurfaceNV(table, _mesa_marshal_VDPAURegisterVideoSurfaceNV);
+ SET_Indexub(table, _mesa_marshal_Indexub);
+ SET_GetPerfMonitorCounterDataAMD(table, _mesa_marshal_GetPerfMonitorCounterDataAMD);
+ SET_MultTransposeMatrixf(table, _mesa_marshal_MultTransposeMatrixf);
+ SET_PolygonOffsetEXT(table, _mesa_marshal_PolygonOffsetEXT);
+ SET_Scalex(table, _mesa_marshal_Scalex);
+ SET_Scaled(table, _mesa_marshal_Scaled);
+ SET_Scalef(table, _mesa_marshal_Scalef);
+ SET_IndexPointerEXT(table, _mesa_marshal_IndexPointerEXT);
+ SET_GetUniformfv(table, _mesa_marshal_GetUniformfv);
+ SET_ColorFragmentOp2ATI(table, _mesa_marshal_ColorFragmentOp2ATI);
+ SET_VertexAttrib2sNV(table, _mesa_marshal_VertexAttrib2sNV);
+ SET_ReadPixels(table, _mesa_marshal_ReadPixels);
+ SET_QueryCounter(table, _mesa_marshal_QueryCounter);
+ SET_NormalPointerEXT(table, _mesa_marshal_NormalPointerEXT);
+ SET_GetSubroutineIndex(table, _mesa_marshal_GetSubroutineIndex);
+ SET_ProgramUniform3iv(table, _mesa_marshal_ProgramUniform3iv);
+ SET_ProgramUniformMatrix2dv(table, _mesa_marshal_ProgramUniformMatrix2dv);
+ SET_ClearTexSubImage(table, _mesa_marshal_ClearTexSubImage);
+ SET_GetActiveUniformBlockName(table, _mesa_marshal_GetActiveUniformBlockName);
+ SET_DrawElementsBaseVertex(table, _mesa_marshal_DrawElementsBaseVertex);
+ SET_RasterPos3iv(table, _mesa_marshal_RasterPos3iv);
+ SET_ColorMaski(table, _mesa_marshal_ColorMaski);
+ SET_Uniform2uiv(table, _mesa_marshal_Uniform2uiv);
+ SET_RasterPos3s(table, _mesa_marshal_RasterPos3s);
+ SET_RasterPos3d(table, _mesa_marshal_RasterPos3d);
+ SET_RasterPos3f(table, _mesa_marshal_RasterPos3f);
+ SET_BindVertexArray(table, _mesa_marshal_BindVertexArray);
+ SET_RasterPos3i(table, _mesa_marshal_RasterPos3i);
+ SET_VertexAttribL3dv(table, _mesa_marshal_VertexAttribL3dv);
+ SET_GetTexParameteriv(table, _mesa_marshal_GetTexParameteriv);
+ SET_DrawTransformFeedbackStreamInstanced(table, _mesa_marshal_DrawTransformFeedbackStreamInstanced);
+ SET_VertexAttrib2fvARB(table, _mesa_marshal_VertexAttrib2fvARB);
+ SET_GetProgramResourceName(table, _mesa_marshal_GetProgramResourceName);
+ SET_ProgramUniformMatrix4x3dv(table, _mesa_marshal_ProgramUniformMatrix4x3dv);
+ SET_ColorTable(table, _mesa_marshal_ColorTable);
+ SET_LoadName(table, _mesa_marshal_LoadName);
+ SET_GetnUniformuivARB(table, _mesa_marshal_GetnUniformuivARB);
+ SET_ClearIndex(table, _mesa_marshal_ClearIndex);
+ SET_ConvolutionParameterfv(table, _mesa_marshal_ConvolutionParameterfv);
+ SET_GetTexGendv(table, _mesa_marshal_GetTexGendv);
+ SET_FlushMappedNamedBufferRange(table, _mesa_marshal_FlushMappedNamedBufferRange);
+ SET_MultiTexCoordP1ui(table, _mesa_marshal_MultiTexCoordP1ui);
+ SET_EvalMesh2(table, _mesa_marshal_EvalMesh2);
+ SET_Vertex4fv(table, _mesa_marshal_Vertex4fv);
+ SET_ProgramUniform4i64ARB(table, _mesa_marshal_ProgramUniform4i64ARB);
+ SET_SelectPerfMonitorCountersAMD(table, _mesa_marshal_SelectPerfMonitorCountersAMD);
+ SET_TextureStorage2D(table, _mesa_marshal_TextureStorage2D);
+ SET_GetTextureParameterIiv(table, _mesa_marshal_GetTextureParameterIiv);
+ SET_BindFramebuffer(table, _mesa_marshal_BindFramebuffer);
+ SET_GetMinmax(table, _mesa_marshal_GetMinmax);
+ SET_VertexAttribs3svNV(table, _mesa_marshal_VertexAttribs3svNV);
+ SET_GetActiveUniformsiv(table, _mesa_marshal_GetActiveUniformsiv);
+ SET_VertexAttrib2sv(table, _mesa_marshal_VertexAttrib2sv);
+ SET_GetProgramEnvParameterdvARB(table, _mesa_marshal_GetProgramEnvParameterdvARB);
+ SET_Uniform1dv(table, _mesa_marshal_Uniform1dv);
+ SET_TransformFeedbackBufferRange(table, _mesa_marshal_TransformFeedbackBufferRange);
+ SET_PushDebugGroup(table, _mesa_marshal_PushDebugGroup);
+ SET_GetPerfMonitorGroupStringAMD(table, _mesa_marshal_GetPerfMonitorGroupStringAMD);
+ SET_GetError(table, _mesa_marshal_GetError);
+ SET_PassThrough(table, _mesa_marshal_PassThrough);
+ SET_PatchParameterfv(table, _mesa_marshal_PatchParameterfv);
+ SET_GetObjectParameterivAPPLE(table, _mesa_marshal_GetObjectParameterivAPPLE);
+ SET_BindBuffersRange(table, _mesa_marshal_BindBuffersRange);
+ SET_VertexAttrib4fvARB(table, _mesa_marshal_VertexAttrib4fvARB);
+ SET_Uniform3i64vARB(table, _mesa_marshal_Uniform3i64vARB);
+ SET_WindowPos3dv(table, _mesa_marshal_WindowPos3dv);
+ SET_TexGenxOES(table, _mesa_marshal_TexGenxOES);
+ SET_VertexArrayAttribIFormat(table, _mesa_marshal_VertexArrayAttribIFormat);
+ SET_StencilOp(table, _mesa_marshal_StencilOp);
+ SET_ProgramUniform1iv(table, _mesa_marshal_ProgramUniform1iv);
+ SET_ProgramUniform3ui(table, _mesa_marshal_ProgramUniform3ui);
+ SET_SecondaryColor3sv(table, _mesa_marshal_SecondaryColor3sv);
+ SET_TexCoordP3ui(table, _mesa_marshal_TexCoordP3ui);
+ SET_VertexArrayElementBuffer(table, _mesa_marshal_VertexArrayElementBuffer);
+ SET_Fogxv(table, _mesa_marshal_Fogxv);
+ SET_Uniform3i64ARB(table, _mesa_marshal_Uniform3i64ARB);
+ SET_VertexAttribP1ui(table, _mesa_marshal_VertexAttribP1ui);
+ SET_GetImageHandleARB(table, _mesa_marshal_GetImageHandleARB);
+ SET_DeleteLists(table, _mesa_marshal_DeleteLists);
+ SET_LogicOp(table, _mesa_marshal_LogicOp);
+ SET_RenderbufferStorageMultisample(table, _mesa_marshal_RenderbufferStorageMultisample);
+ SET_GetTransformFeedbacki64_v(table, _mesa_marshal_GetTransformFeedbacki64_v);
+ SET_WindowPos3d(table, _mesa_marshal_WindowPos3d);
+ SET_Enablei(table, _mesa_marshal_Enablei);
+ SET_WindowPos3f(table, _mesa_marshal_WindowPos3f);
+ SET_GenProgramsARB(table, _mesa_marshal_GenProgramsARB);
+ SET_RasterPos2sv(table, _mesa_marshal_RasterPos2sv);
+ SET_WindowPos3i(table, _mesa_marshal_WindowPos3i);
+ SET_MultiTexCoord4iv(table, _mesa_marshal_MultiTexCoord4iv);
+ SET_TexCoord1sv(table, _mesa_marshal_TexCoord1sv);
+ SET_WindowPos3s(table, _mesa_marshal_WindowPos3s);
+ SET_PixelMapusv(table, _mesa_marshal_PixelMapusv);
+ SET_DebugMessageInsert(table, _mesa_marshal_DebugMessageInsert);
+ SET_Orthof(table, _mesa_marshal_Orthof);
+ SET_CompressedTexImage2D(table, _mesa_marshal_CompressedTexImage2D);
+ SET_DeleteObjectARB(table, _mesa_marshal_DeleteObjectARB);
+ SET_ProgramUniformMatrix2x3dv(table, _mesa_marshal_ProgramUniformMatrix2x3dv);
+ SET_GetVertexArrayiv(table, _mesa_marshal_GetVertexArrayiv);
+ SET_IsSync(table, _mesa_marshal_IsSync);
+ SET_Color4uiv(table, _mesa_marshal_Color4uiv);
+ SET_MultiTexCoord1sv(table, _mesa_marshal_MultiTexCoord1sv);
+ SET_Orthox(table, _mesa_marshal_Orthox);
+ SET_PushAttrib(table, _mesa_marshal_PushAttrib);
+ SET_RasterPos2i(table, _mesa_marshal_RasterPos2i);
+ SET_ClipPlane(table, _mesa_marshal_ClipPlane);
+ SET_RasterPos2f(table, _mesa_marshal_RasterPos2f);
+ SET_GetActiveSubroutineUniformiv(table, _mesa_marshal_GetActiveSubroutineUniformiv);
+ SET_RasterPos2d(table, _mesa_marshal_RasterPos2d);
+ SET_MakeImageHandleResidentARB(table, _mesa_marshal_MakeImageHandleResidentARB);
+ SET_InvalidateSubFramebuffer(table, _mesa_marshal_InvalidateSubFramebuffer);
+ SET_Color4ub(table, _mesa_marshal_Color4ub);
+ SET_UniformMatrix2x4dv(table, _mesa_marshal_UniformMatrix2x4dv);
+ SET_RasterPos2s(table, _mesa_marshal_RasterPos2s);
+ SET_DispatchComputeGroupSizeARB(table, _mesa_marshal_DispatchComputeGroupSizeARB);
+ SET_VertexP2uiv(table, _mesa_marshal_VertexP2uiv);
+ SET_VertexArrayBindingDivisor(table, _mesa_marshal_VertexArrayBindingDivisor);
+ SET_MultiTexCoord3dv(table, _mesa_marshal_MultiTexCoord3dv);
+ SET_BindProgramPipeline(table, _mesa_marshal_BindProgramPipeline);
+ SET_VertexAttribP4uiv(table, _mesa_marshal_VertexAttribP4uiv);
+ SET_DebugMessageCallback(table, _mesa_marshal_DebugMessageCallback);
+ SET_MultiTexCoord1i(table, _mesa_marshal_MultiTexCoord1i);
+ SET_WindowPos2dv(table, _mesa_marshal_WindowPos2dv);
+ SET_TexParameterIuiv(table, _mesa_marshal_TexParameterIuiv);
+ SET_DeletePerfQueryINTEL(table, _mesa_marshal_DeletePerfQueryINTEL);
+ SET_MultiTexCoord1d(table, _mesa_marshal_MultiTexCoord1d);
+ SET_MultiTexCoord1s(table, _mesa_marshal_MultiTexCoord1s);
+ SET_BeginConditionalRender(table, _mesa_marshal_BeginConditionalRender);
+ SET_GetShaderiv(table, _mesa_marshal_GetShaderiv);
+ SET_CopyConvolutionFilter1D(table, _mesa_marshal_CopyConvolutionFilter1D);
+ SET_ClearBufferfv(table, _mesa_marshal_ClearBufferfv);
+ SET_UniformMatrix4dv(table, _mesa_marshal_UniformMatrix4dv);
+ SET_CreateShaderObjectARB(table, _mesa_marshal_CreateShaderObjectARB);
+ SET_GetTexParameterxv(table, _mesa_marshal_GetTexParameterxv);
+ SET_GetAttachedShaders(table, _mesa_marshal_GetAttachedShaders);
+ SET_ClearBufferfi(table, _mesa_marshal_ClearBufferfi);
+ SET_Materialiv(table, _mesa_marshal_Materialiv);
+ SET_DeleteFragmentShaderATI(table, _mesa_marshal_DeleteFragmentShaderATI);
+ SET_VertexArrayVertexBuffers(table, _mesa_marshal_VertexArrayVertexBuffers);
+ SET_DrawElementsInstancedBaseVertex(table, _mesa_marshal_DrawElementsInstancedBaseVertex);
+ SET_DisableClientState(table, _mesa_marshal_DisableClientState);
+ SET_TexGeni(table, _mesa_marshal_TexGeni);
+ SET_TexGenf(table, _mesa_marshal_TexGenf);
+ SET_TexGend(table, _mesa_marshal_TexGend);
+ SET_ProgramUniform4i64vARB(table, _mesa_marshal_ProgramUniform4i64vARB);
+ SET_Color4sv(table, _mesa_marshal_Color4sv);
+ SET_LoadTransposeMatrixf(table, _mesa_marshal_LoadTransposeMatrixf);
+ SET_LoadTransposeMatrixd(table, _mesa_marshal_LoadTransposeMatrixd);
+ SET_PixelZoom(table, _mesa_marshal_PixelZoom);
+ SET_ProgramEnvParameter4dARB(table, _mesa_marshal_ProgramEnvParameter4dARB);
+ SET_ColorTableParameterfv(table, _mesa_marshal_ColorTableParameterfv);
+ SET_IsSemaphoreEXT(table, _mesa_marshal_IsSemaphoreEXT);
+ SET_IsTexture(table, _mesa_marshal_IsTexture);
+ SET_ProgramUniform3uiv(table, _mesa_marshal_ProgramUniform3uiv);
+ SET_IndexPointer(table, _mesa_marshal_IndexPointer);
+ SET_VertexAttrib4sNV(table, _mesa_marshal_VertexAttrib4sNV);
+ SET_GetMapdv(table, _mesa_marshal_GetMapdv);
+ SET_Uniform3ui64vARB(table, _mesa_marshal_Uniform3ui64vARB);
+ SET_GetInteger64i_v(table, _mesa_marshal_GetInteger64i_v);
+ SET_BufferPageCommitmentARB(table, _mesa_marshal_BufferPageCommitmentARB);
+ SET_IsBuffer(table, _mesa_marshal_IsBuffer);
+ SET_ColorP4ui(table, _mesa_marshal_ColorP4ui);
+ SET_TextureStorage3D(table, _mesa_marshal_TextureStorage3D);
+ SET_TexCoordP3uiv(table, _mesa_marshal_TexCoordP3uiv);
+ SET_GetnUniformui64vARB(table, _mesa_marshal_GetnUniformui64vARB);
+ SET_TextureStorageMem2DMultisampleEXT(table, _mesa_marshal_TextureStorageMem2DMultisampleEXT);
+ SET_Uniform1iv(table, _mesa_marshal_Uniform1iv);
+ SET_Uniform4uiv(table, _mesa_marshal_Uniform4uiv);
+ SET_PopDebugGroup(table, _mesa_marshal_PopDebugGroup);
+ SET_VertexAttrib1d(table, _mesa_marshal_VertexAttrib1d);
+ SET_CompressedTexImage1D(table, _mesa_marshal_CompressedTexImage1D);
+ SET_NamedBufferSubData(table, _mesa_marshal_NamedBufferSubData);
+ SET_TexBufferRange(table, _mesa_marshal_TexBufferRange);
+ SET_VertexAttrib1s(table, _mesa_marshal_VertexAttrib1s);
+ SET_MultiDrawElementsIndirect(table, _mesa_marshal_MultiDrawElementsIndirect);
+ SET_UniformMatrix4x3dv(table, _mesa_marshal_UniformMatrix4x3dv);
+ SET_TransformFeedbackBufferBase(table, _mesa_marshal_TransformFeedbackBufferBase);
+ SET_FogCoordfvEXT(table, _mesa_marshal_FogCoordfvEXT);
+ SET_Uniform2ui64vARB(table, _mesa_marshal_Uniform2ui64vARB);
+ SET_GetColorTableParameterfv(table, _mesa_marshal_GetColorTableParameterfv);
+ SET_MultiTexCoord3fARB(table, _mesa_marshal_MultiTexCoord3fARB);
+ SET_GetTexLevelParameterfv(table, _mesa_marshal_GetTexLevelParameterfv);
+ SET_Vertex2sv(table, _mesa_marshal_Vertex2sv);
+ SET_GetnMapdvARB(table, _mesa_marshal_GetnMapdvARB);
+ SET_VertexAttrib2dNV(table, _mesa_marshal_VertexAttrib2dNV);
+ SET_VertexAttrib3svNV(table, _mesa_marshal_VertexAttrib3svNV);
+ SET_GetTexEnviv(table, _mesa_marshal_GetTexEnviv);
+ SET_ViewportArrayv(table, _mesa_marshal_ViewportArrayv);
+ SET_SeparableFilter2D(table, _mesa_marshal_SeparableFilter2D);
+ SET_ArrayElement(table, _mesa_marshal_ArrayElement);
+ SET_TexImage2D(table, _mesa_marshal_TexImage2D);
+ SET_RasterPos2dv(table, _mesa_marshal_RasterPos2dv);
+ SET_Fogiv(table, _mesa_marshal_Fogiv);
+ SET_EndQuery(table, _mesa_marshal_EndQuery);
+ SET_TexCoord1dv(table, _mesa_marshal_TexCoord1dv);
+ SET_AlphaFragmentOp3ATI(table, _mesa_marshal_AlphaFragmentOp3ATI);
+ SET_Clear(table, _mesa_marshal_Clear);
+ SET_VertexAttrib4sv(table, _mesa_marshal_VertexAttrib4sv);
+ SET_Ortho(table, _mesa_marshal_Ortho);
+ SET_Uniform3uiv(table, _mesa_marshal_Uniform3uiv);
+ SET_GetUniformi64vARB(table, _mesa_marshal_GetUniformi64vARB);
+ SET_EndQueryIndexed(table, _mesa_marshal_EndQueryIndexed);
+ SET_TexParameterxv(table, _mesa_marshal_TexParameterxv);
+ SET_MultiDrawArraysIndirectCountARB(table, _mesa_marshal_MultiDrawArraysIndirectCountARB);
+ SET_ProgramUniformMatrix2fv(table, _mesa_marshal_ProgramUniformMatrix2fv);
+ SET_ProgramLocalParameter4fvARB(table, _mesa_marshal_ProgramLocalParameter4fvARB);
+ SET_Uniform4dv(table, _mesa_marshal_Uniform4dv);
+ SET_GetUnsignedBytevEXT(table, _mesa_marshal_GetUnsignedBytevEXT);
+ SET_LightModelx(table, _mesa_marshal_LightModelx);
+ SET_VertexAttribI3iEXT(table, _mesa_marshal_VertexAttribI3iEXT);
+ SET_ClearColorx(table, _mesa_marshal_ClearColorx);
+ SET_EndTransformFeedback(table, _mesa_marshal_EndTransformFeedback);
+ SET_VertexAttribL2dv(table, _mesa_marshal_VertexAttribL2dv);
+ SET_GetActiveUniformName(table, _mesa_marshal_GetActiveUniformName);
+ SET_GetProgramBinary(table, _mesa_marshal_GetProgramBinary);
+ SET_ViewportIndexedfv(table, _mesa_marshal_ViewportIndexedfv);
+ SET_BindTextureUnit(table, _mesa_marshal_BindTextureUnit);
+ SET_CallList(table, _mesa_marshal_CallList);
+ SET_Materialfv(table, _mesa_marshal_Materialfv);
+ SET_DeleteProgram(table, _mesa_marshal_DeleteProgram);
+ SET_GetActiveAtomicCounterBufferiv(table, _mesa_marshal_GetActiveAtomicCounterBufferiv);
+ SET_ClearDepthf(table, _mesa_marshal_ClearDepthf);
+ SET_GetTextureHandleARB(table, _mesa_marshal_GetTextureHandleARB);
+ SET_GetConvolutionFilter(table, _mesa_marshal_GetConvolutionFilter);
+ SET_MultiModeDrawElementsIBM(table, _mesa_marshal_MultiModeDrawElementsIBM);
+ SET_Uniform2iv(table, _mesa_marshal_Uniform2iv);
+ SET_GetFixedv(table, _mesa_marshal_GetFixedv);
+ SET_SampleCoveragex(table, _mesa_marshal_SampleCoveragex);
+ SET_GetPerfQueryInfoINTEL(table, _mesa_marshal_GetPerfQueryInfoINTEL);
+ SET_DeleteFramebuffers(table, _mesa_marshal_DeleteFramebuffers);
+ SET_VertexAttrib4uiv(table, _mesa_marshal_VertexAttrib4uiv);
+ SET_VertexAttrib4Nsv(table, _mesa_marshal_VertexAttrib4Nsv);
+ SET_Vertex4s(table, _mesa_marshal_Vertex4s);
+ SET_VertexAttribI2iEXT(table, _mesa_marshal_VertexAttribI2iEXT);
+ SET_Vertex4f(table, _mesa_marshal_Vertex4f);
+ SET_Vertex4d(table, _mesa_marshal_Vertex4d);
+ SET_VertexAttribL4dv(table, _mesa_marshal_VertexAttribL4dv);
+ SET_GetnUniformi64vARB(table, _mesa_marshal_GetnUniformi64vARB);
+ SET_GetTexGenfv(table, _mesa_marshal_GetTexGenfv);
+ SET_Vertex4i(table, _mesa_marshal_Vertex4i);
+ SET_MemoryBarrierByRegion(table, _mesa_marshal_MemoryBarrierByRegion);
+ SET_StencilFuncSeparateATI(table, _mesa_marshal_StencilFuncSeparateATI);
+ SET_GetVertexAttribIuiv(table, _mesa_marshal_GetVertexAttribIuiv);
+ SET_LightModelfv(table, _mesa_marshal_LightModelfv);
+ SET_Vertex4dv(table, _mesa_marshal_Vertex4dv);
+ SET_GetInfoLogARB(table, _mesa_marshal_GetInfoLogARB);
+ SET_StencilMask(table, _mesa_marshal_StencilMask);
+ SET_NamedFramebufferReadBuffer(table, _mesa_marshal_NamedFramebufferReadBuffer);
+ SET_ProgramUniformHandleui64ARB(table, _mesa_marshal_ProgramUniformHandleui64ARB);
+ SET_ProgramUniform2i64ARB(table, _mesa_marshal_ProgramUniform2i64ARB);
+ SET_IsList(table, _mesa_marshal_IsList);
+ SET_ClearBufferiv(table, _mesa_marshal_ClearBufferiv);
+ SET_GetIntegeri_v(table, _mesa_marshal_GetIntegeri_v);
+ SET_ProgramUniform2iv(table, _mesa_marshal_ProgramUniform2iv);
+ SET_CreateVertexArrays(table, _mesa_marshal_CreateVertexArrays);
+ SET_FogCoordPointer(table, _mesa_marshal_FogCoordPointer);
+ SET_SecondaryColor3us(table, _mesa_marshal_SecondaryColor3us);
+ SET_TextureStorageMem1DEXT(table, _mesa_marshal_TextureStorageMem1DEXT);
+ SET_SecondaryColor3ub(table, _mesa_marshal_SecondaryColor3ub);
+ SET_NamedBufferStorageMemEXT(table, _mesa_marshal_NamedBufferStorageMemEXT);
+ SET_SecondaryColor3ui(table, _mesa_marshal_SecondaryColor3ui);
+ SET_ProgramUniform4ui64ARB(table, _mesa_marshal_ProgramUniform4ui64ARB);
+ SET_VertexAttrib1sNV(table, _mesa_marshal_VertexAttrib1sNV);
+ SET_SignalSemaphoreEXT(table, _mesa_marshal_SignalSemaphoreEXT);
+ SET_TextureBuffer(table, _mesa_marshal_TextureBuffer);
+ SET_InitNames(table, _mesa_marshal_InitNames);
+ SET_Normal3sv(table, _mesa_marshal_Normal3sv);
+ SET_DeleteQueries(table, _mesa_marshal_DeleteQueries);
+ SET_InvalidateFramebuffer(table, _mesa_marshal_InvalidateFramebuffer);
+ SET_Hint(table, _mesa_marshal_Hint);
+ SET_MemoryBarrier(table, _mesa_marshal_MemoryBarrier);
+ SET_CopyColorSubTable(table, _mesa_marshal_CopyColorSubTable);
+ SET_GetObjectParameterfvARB(table, _mesa_marshal_GetObjectParameterfvARB);
+ SET_GetTexEnvxv(table, _mesa_marshal_GetTexEnvxv);
+ SET_DrawTexsvOES(table, _mesa_marshal_DrawTexsvOES);
+ SET_Disable(table, _mesa_marshal_Disable);
+ SET_ClearColor(table, _mesa_marshal_ClearColor);
+ SET_GetTextureParameterIuiv(table, _mesa_marshal_GetTextureParameterIuiv);
+ SET_RasterPos4iv(table, _mesa_marshal_RasterPos4iv);
+ SET_VDPAUIsSurfaceNV(table, _mesa_marshal_VDPAUIsSurfaceNV);
+ SET_ProgramUniformMatrix2x3fv(table, _mesa_marshal_ProgramUniformMatrix2x3fv);
+ SET_BindVertexBuffer(table, _mesa_marshal_BindVertexBuffer);
+ SET_RasterPos4i(table, _mesa_marshal_RasterPos4i);
+ SET_RasterPos4d(table, _mesa_marshal_RasterPos4d);
+ SET_RasterPos4f(table, _mesa_marshal_RasterPos4f);
+ SET_VDPAUMapSurfacesNV(table, _mesa_marshal_VDPAUMapSurfacesNV);
+ SET_GetQueryIndexediv(table, _mesa_marshal_GetQueryIndexediv);
+ SET_RasterPos3dv(table, _mesa_marshal_RasterPos3dv);
+ SET_GetProgramiv(table, _mesa_marshal_GetProgramiv);
+ SET_TexCoord1iv(table, _mesa_marshal_TexCoord1iv);
+ SET_RasterPos4s(table, _mesa_marshal_RasterPos4s);
+ SET_VertexAttrib3dv(table, _mesa_marshal_VertexAttrib3dv);
+ SET_Histogram(table, _mesa_marshal_Histogram);
+ SET_Uniform2fv(table, _mesa_marshal_Uniform2fv);
+ SET_ProgramUniformMatrix3x4dv(table, _mesa_marshal_ProgramUniformMatrix3x4dv);
+ SET_DrawBuffers(table, _mesa_marshal_DrawBuffers);
+ SET_VertexAttribL1ui64ARB(table, _mesa_marshal_VertexAttribL1ui64ARB);
+ SET_GetnPolygonStippleARB(table, _mesa_marshal_GetnPolygonStippleARB);
+ SET_Color3uiv(table, _mesa_marshal_Color3uiv);
+ SET_EvalCoord2fv(table, _mesa_marshal_EvalCoord2fv);
+ SET_TextureStorage3DEXT(table, _mesa_marshal_TextureStorage3DEXT);
+ SET_VertexAttrib2fARB(table, _mesa_marshal_VertexAttrib2fARB);
+ SET_SpecializeShaderARB(table, _mesa_marshal_SpecializeShaderARB);
+ SET_BeginPerfMonitorAMD(table, _mesa_marshal_BeginPerfMonitorAMD);
+ SET_WindowPos2fv(table, _mesa_marshal_WindowPos2fv);
+ SET_TexImage3D(table, _mesa_marshal_TexImage3D);
+ SET_GetPerfQueryIdByNameINTEL(table, _mesa_marshal_GetPerfQueryIdByNameINTEL);
+ SET_BindFragDataLocation(table, _mesa_marshal_BindFragDataLocation);
+ SET_LightModeliv(table, _mesa_marshal_LightModeliv);
+ SET_Normal3bv(table, _mesa_marshal_Normal3bv);
+ SET_BeginQueryIndexed(table, _mesa_marshal_BeginQueryIndexed);
+ SET_ClearNamedBufferData(table, _mesa_marshal_ClearNamedBufferData);
+ SET_Vertex3iv(table, _mesa_marshal_Vertex3iv);
+ SET_UniformMatrix2x3dv(table, _mesa_marshal_UniformMatrix2x3dv);
+ SET_UniformHandleui64vARB(table, _mesa_marshal_UniformHandleui64vARB);
+ SET_TexCoord3dv(table, _mesa_marshal_TexCoord3dv);
+ SET_GetProgramStringARB(table, _mesa_marshal_GetProgramStringARB);
+ SET_VertexP3ui(table, _mesa_marshal_VertexP3ui);
+ SET_CreateProgramObjectARB(table, _mesa_marshal_CreateProgramObjectARB);
+ SET_UniformMatrix3fv(table, _mesa_marshal_UniformMatrix3fv);
+ SET_PrioritizeTextures(table, _mesa_marshal_PrioritizeTextures);
+ SET_VertexAttribI3uiEXT(table, _mesa_marshal_VertexAttribI3uiEXT);
+ SET_ProgramUniform1i64ARB(table, _mesa_marshal_ProgramUniform1i64ARB);
+ SET_GetMaterialxv(table, _mesa_marshal_GetMaterialxv);
+ SET_SecondaryColor3uiv(table, _mesa_marshal_SecondaryColor3uiv);
+ SET_EndConditionalRender(table, _mesa_marshal_EndConditionalRender);
+ SET_ProgramLocalParameter4dARB(table, _mesa_marshal_ProgramLocalParameter4dARB);
+ SET_Color3sv(table, _mesa_marshal_Color3sv);
+ SET_GenFragmentShadersATI(table, _mesa_marshal_GenFragmentShadersATI);
+ SET_GetNamedBufferParameteriv(table, _mesa_marshal_GetNamedBufferParameteriv);
+ SET_BlendEquationSeparateiARB(table, _mesa_marshal_BlendEquationSeparateiARB);
+ SET_MultiTexCoord1fvARB(table, _mesa_marshal_MultiTexCoord1fvARB);
+ SET_TexStorage2D(table, _mesa_marshal_TexStorage2D);
+ SET_FramebufferTexture2D(table, _mesa_marshal_FramebufferTexture2D);
+ SET_GetSamplerParameterfv(table, _mesa_marshal_GetSamplerParameterfv);
+ SET_VertexAttrib2dv(table, _mesa_marshal_VertexAttrib2dv);
+ SET_Vertex4sv(table, _mesa_marshal_Vertex4sv);
+ SET_GetQueryObjecti64v(table, _mesa_marshal_GetQueryObjecti64v);
+ SET_ClampColor(table, _mesa_marshal_ClampColor);
+ SET_Uniform1i64ARB(table, _mesa_marshal_Uniform1i64ARB);
+ SET_DepthRangeArrayfvOES(table, _mesa_marshal_DepthRangeArrayfvOES);
+ SET_ConvolutionFilter1D(table, _mesa_marshal_ConvolutionFilter1D);
+ SET_DrawElementsIndirect(table, _mesa_marshal_DrawElementsIndirect);
+ SET_WindowPos3sv(table, _mesa_marshal_WindowPos3sv);
+ SET_CallLists(table, _mesa_marshal_CallLists);
+ SET_AlphaFunc(table, _mesa_marshal_AlphaFunc);
+ SET_GetTextureParameterfv(table, _mesa_marshal_GetTextureParameterfv);
+ SET_EdgeFlag(table, _mesa_marshal_EdgeFlag);
+ SET_EdgeFlagv(table, _mesa_marshal_EdgeFlagv);
+ SET_DepthRangex(table, _mesa_marshal_DepthRangex);
+ SET_ProgramUniformHandleui64vARB(table, _mesa_marshal_ProgramUniformHandleui64vARB);
+ SET_VDPAUInitNV(table, _mesa_marshal_VDPAUInitNV);
+ SET_GetBufferParameteri64v(table, _mesa_marshal_GetBufferParameteri64v);
+ SET_CreateProgram(table, _mesa_marshal_CreateProgram);
+ SET_DepthRangef(table, _mesa_marshal_DepthRangef);
+ SET_TextureParameteriv(table, _mesa_marshal_TextureParameteriv);
+ SET_ColorFragmentOp3ATI(table, _mesa_marshal_ColorFragmentOp3ATI);
+ SET_ValidateProgram(table, _mesa_marshal_ValidateProgram);
+ SET_VertexPointerEXT(table, _mesa_marshal_VertexPointerEXT);
+ SET_VertexAttribI4sv(table, _mesa_marshal_VertexAttribI4sv);
+ SET_Scissor(table, _mesa_marshal_Scissor);
+ SET_BeginTransformFeedback(table, _mesa_marshal_BeginTransformFeedback);
+ SET_TexCoord2i(table, _mesa_marshal_TexCoord2i);
+ SET_VertexArrayAttribBinding(table, _mesa_marshal_VertexArrayAttribBinding);
+ SET_Color4ui(table, _mesa_marshal_Color4ui);
+ SET_TexCoord2f(table, _mesa_marshal_TexCoord2f);
+ SET_TexCoord2d(table, _mesa_marshal_TexCoord2d);
+ SET_GetTransformFeedbackiv(table, _mesa_marshal_GetTransformFeedbackiv);
+ SET_TexCoord2s(table, _mesa_marshal_TexCoord2s);
+ SET_PointSizePointerOES(table, _mesa_marshal_PointSizePointerOES);
+ SET_Color4us(table, _mesa_marshal_Color4us);
+ SET_Color3bv(table, _mesa_marshal_Color3bv);
+ SET_PrimitiveRestartNV(table, _mesa_marshal_PrimitiveRestartNV);
+ SET_BindBufferOffsetEXT(table, _mesa_marshal_BindBufferOffsetEXT);
+ SET_ProvokingVertex(table, _mesa_marshal_ProvokingVertex);
+ SET_VertexAttribs4fvNV(table, _mesa_marshal_VertexAttribs4fvNV);
+ SET_Vertex2i(table, _mesa_marshal_Vertex2i);
+ SET_GetQueryBufferObjecti64v(table, _mesa_marshal_GetQueryBufferObjecti64v);
+ SET_InterleavedArrays(table, _mesa_marshal_InterleavedArrays);
+ SET_RasterPos2fv(table, _mesa_marshal_RasterPos2fv);
+ SET_TexCoord1fv(table, _mesa_marshal_TexCoord1fv);
+ SET_MultiTexCoord4dv(table, _mesa_marshal_MultiTexCoord4dv);
+ SET_ProgramEnvParameter4fvARB(table, _mesa_marshal_ProgramEnvParameter4fvARB);
+ SET_RasterPos4fv(table, _mesa_marshal_RasterPos4fv);
+ SET_PushMatrix(table, _mesa_marshal_PushMatrix);
+ SET_EndList(table, _mesa_marshal_EndList);
+ SET_DrawRangeElements(table, _mesa_marshal_DrawRangeElements);
+ SET_GetTexGenxvOES(table, _mesa_marshal_GetTexGenxvOES);
+ SET_GetHandleARB(table, _mesa_marshal_GetHandleARB);
+ SET_DrawTexfvOES(table, _mesa_marshal_DrawTexfvOES);
+ SET_BlendFunciARB(table, _mesa_marshal_BlendFunciARB);
+ SET_ClearNamedFramebufferfi(table, _mesa_marshal_ClearNamedFramebufferfi);
+ SET_ClearNamedFramebufferfv(table, _mesa_marshal_ClearNamedFramebufferfv);
+ SET_Uniform2ui(table, _mesa_marshal_Uniform2ui);
+ SET_ScissorIndexed(table, _mesa_marshal_ScissorIndexed);
+ SET_End(table, _mesa_marshal_End);
+ SET_NamedFramebufferParameteri(table, _mesa_marshal_NamedFramebufferParameteri);
+ SET_BindVertexBuffers(table, _mesa_marshal_BindVertexBuffers);
+ SET_GetSamplerParameteriv(table, _mesa_marshal_GetSamplerParameteriv);
+ SET_GenProgramPipelines(table, _mesa_marshal_GenProgramPipelines);
+ SET_Enable(table, _mesa_marshal_Enable);
+ SET_IsProgramPipeline(table, _mesa_marshal_IsProgramPipeline);
+ SET_ShaderBinary(table, _mesa_marshal_ShaderBinary);
+ SET_TextureSubImage1D(table, _mesa_marshal_TextureSubImage1D);
+ SET_Normal3x(table, _mesa_marshal_Normal3x);
+ SET_VertexAttrib4fARB(table, _mesa_marshal_VertexAttrib4fARB);
+ SET_TexCoord4fv(table, _mesa_marshal_TexCoord4fv);
+ SET_ReadnPixelsARB(table, _mesa_marshal_ReadnPixelsARB);
+ SET_InvalidateTexSubImage(table, _mesa_marshal_InvalidateTexSubImage);
+ SET_Normal3s(table, _mesa_marshal_Normal3s);
+ SET_Materialxv(table, _mesa_marshal_Materialxv);
+ SET_Normal3i(table, _mesa_marshal_Normal3i);
+ SET_Normal3b(table, _mesa_marshal_Normal3b);
+ SET_Normal3d(table, _mesa_marshal_Normal3d);
+ SET_Normal3f(table, _mesa_marshal_Normal3f);
+ SET_Indexi(table, _mesa_marshal_Indexi);
+ SET_Uniform1uiv(table, _mesa_marshal_Uniform1uiv);
+ SET_VertexAttribI2uiEXT(table, _mesa_marshal_VertexAttribI2uiEXT);
+ SET_IsRenderbuffer(table, _mesa_marshal_IsRenderbuffer);
+ SET_NormalP3uiv(table, _mesa_marshal_NormalP3uiv);
+ SET_Indexf(table, _mesa_marshal_Indexf);
+ SET_Indexd(table, _mesa_marshal_Indexd);
+ SET_GetMaterialiv(table, _mesa_marshal_GetMaterialiv);
+ SET_Indexs(table, _mesa_marshal_Indexs);
+ SET_MultiTexCoordP1uiv(table, _mesa_marshal_MultiTexCoordP1uiv);
+ SET_ConvolutionFilter2D(table, _mesa_marshal_ConvolutionFilter2D);
+ SET_Vertex2d(table, _mesa_marshal_Vertex2d);
+ SET_Vertex2f(table, _mesa_marshal_Vertex2f);
+ SET_Color4bv(table, _mesa_marshal_Color4bv);
+ SET_ProgramUniformMatrix3x2dv(table, _mesa_marshal_ProgramUniformMatrix3x2dv);
+ SET_VertexAttrib2fvNV(table, _mesa_marshal_VertexAttrib2fvNV);
+ SET_Vertex2s(table, _mesa_marshal_Vertex2s);
+ SET_ActiveTexture(table, _mesa_marshal_ActiveTexture);
+ SET_InvalidateNamedFramebufferSubData(table, _mesa_marshal_InvalidateNamedFramebufferSubData);
+ SET_ColorP4uiv(table, _mesa_marshal_ColorP4uiv);
+ SET_DrawTexxOES(table, _mesa_marshal_DrawTexxOES);
+ SET_MultiTexCoordP3ui(table, _mesa_marshal_MultiTexCoordP3ui);
+ SET_GetAttribLocation(table, _mesa_marshal_GetAttribLocation);
+ SET_DrawBuffer(table, _mesa_marshal_DrawBuffer);
+ SET_GetPointerv(table, _mesa_marshal_GetPointerv);
+ SET_MultiTexCoord2dv(table, _mesa_marshal_MultiTexCoord2dv);
+ SET_IsSampler(table, _mesa_marshal_IsSampler);
+ SET_BlendFunc(table, _mesa_marshal_BlendFunc);
+ SET_NamedRenderbufferStorageMultisample(table, _mesa_marshal_NamedRenderbufferStorageMultisample);
+ SET_ColorMaterial(table, _mesa_marshal_ColorMaterial);
+ SET_RasterPos3sv(table, _mesa_marshal_RasterPos3sv);
+ SET_TexCoordP2ui(table, _mesa_marshal_TexCoordP2ui);
+ SET_TexParameteriv(table, _mesa_marshal_TexParameteriv);
+ SET_WaitSemaphoreEXT(table, _mesa_marshal_WaitSemaphoreEXT);
+ SET_VertexAttrib3fvARB(table, _mesa_marshal_VertexAttrib3fvARB);
+ SET_ProgramUniformMatrix3x4fv(table, _mesa_marshal_ProgramUniformMatrix3x4fv);
+ SET_GetColorTable(table, _mesa_marshal_GetColorTable);
+ SET_TexCoord3i(table, _mesa_marshal_TexCoord3i);
+ SET_CopyColorTable(table, _mesa_marshal_CopyColorTable);
+ SET_Frustum(table, _mesa_marshal_Frustum);
+ SET_TexCoord3d(table, _mesa_marshal_TexCoord3d);
+ SET_GetTextureParameteriv(table, _mesa_marshal_GetTextureParameteriv);
+ SET_TexCoord3f(table, _mesa_marshal_TexCoord3f);
+ SET_DepthRangeArrayv(table, _mesa_marshal_DepthRangeArrayv);
+ SET_DeleteTextures(table, _mesa_marshal_DeleteTextures);
+ SET_TexCoordPointerEXT(table, _mesa_marshal_TexCoordPointerEXT);
+ SET_TexCoord3s(table, _mesa_marshal_TexCoord3s);
+ SET_GetTexLevelParameteriv(table, _mesa_marshal_GetTexLevelParameteriv);
+ SET_TextureParameterIuiv(table, _mesa_marshal_TextureParameterIuiv);
+ SET_GenPerfMonitorsAMD(table, _mesa_marshal_GenPerfMonitorsAMD);
+ SET_ClearAccum(table, _mesa_marshal_ClearAccum);
+ SET_TexCoord4iv(table, _mesa_marshal_TexCoord4iv);
+ SET_TexStorage3D(table, _mesa_marshal_TexStorage3D);
+ SET_Uniform2i64ARB(table, _mesa_marshal_Uniform2i64ARB);
+ SET_FramebufferTexture3D(table, _mesa_marshal_FramebufferTexture3D);
+ SET_GetBufferParameteriv(table, _mesa_marshal_GetBufferParameteriv);
+ SET_VertexAttrib2fNV(table, _mesa_marshal_VertexAttrib2fNV);
+ SET_CopyTexImage2D(table, _mesa_marshal_CopyTexImage2D);
+ SET_Vertex3fv(table, _mesa_marshal_Vertex3fv);
+ SET_WindowPos4dvMESA(table, _mesa_marshal_WindowPos4dvMESA);
+ SET_ProgramUniform2i64vARB(table, _mesa_marshal_ProgramUniform2i64vARB);
+ SET_MultiTexCoordP2ui(table, _mesa_marshal_MultiTexCoordP2ui);
+ SET_VertexAttribs1dvNV(table, _mesa_marshal_VertexAttribs1dvNV);
+ SET_ImportSemaphoreFdEXT(table, _mesa_marshal_ImportSemaphoreFdEXT);
+ SET_IsQuery(table, _mesa_marshal_IsQuery);
+ SET_EdgeFlagPointerEXT(table, _mesa_marshal_EdgeFlagPointerEXT);
+ SET_VertexAttribs2svNV(table, _mesa_marshal_VertexAttribs2svNV);
+ SET_CreateShaderProgramv(table, _mesa_marshal_CreateShaderProgramv);
+ SET_BlendEquationiARB(table, _mesa_marshal_BlendEquationiARB);
+ SET_VertexAttribI4uivEXT(table, _mesa_marshal_VertexAttribI4uivEXT);
+ SET_PointSizex(table, _mesa_marshal_PointSizex);
+ SET_PolygonMode(table, _mesa_marshal_PolygonMode);
+ SET_SecondaryColor3iv(table, _mesa_marshal_SecondaryColor3iv);
+ SET_VertexAttribI1iEXT(table, _mesa_marshal_VertexAttribI1iEXT);
+ SET_VertexAttrib4Niv(table, _mesa_marshal_VertexAttrib4Niv);
+ SET_GetnUniformdvARB(table, _mesa_marshal_GetnUniformdvARB);
+ SET_LinkProgram(table, _mesa_marshal_LinkProgram);
+ SET_ProgramUniform4d(table, _mesa_marshal_ProgramUniform4d);
+ SET_ProgramUniform4f(table, _mesa_marshal_ProgramUniform4f);
+ SET_ProgramUniform4i(table, _mesa_marshal_ProgramUniform4i);
+ SET_GetFramebufferParameteriv(table, _mesa_marshal_GetFramebufferParameteriv);
+ SET_GetNamedBufferPointerv(table, _mesa_marshal_GetNamedBufferPointerv);
+ SET_VertexAttrib4d(table, _mesa_marshal_VertexAttrib4d);
+ SET_ProgramUniform4ui64vARB(table, _mesa_marshal_ProgramUniform4ui64vARB);
+ SET_WindowPos4sMESA(table, _mesa_marshal_WindowPos4sMESA);
+ SET_VertexAttrib4s(table, _mesa_marshal_VertexAttrib4s);
+ SET_ProgramUniform1i64vARB(table, _mesa_marshal_ProgramUniform1i64vARB);
+ SET_VertexAttrib1dvNV(table, _mesa_marshal_VertexAttrib1dvNV);
+ SET_GetSemaphoreParameterui64vEXT(table, _mesa_marshal_GetSemaphoreParameterui64vEXT);
+ SET_TexStorage3DMultisample(table, _mesa_marshal_TexStorage3DMultisample);
+ SET_SamplerParameteriv(table, _mesa_marshal_SamplerParameteriv);
+ SET_VertexAttribP3uiv(table, _mesa_marshal_VertexAttribP3uiv);
+ SET_ScissorIndexedv(table, _mesa_marshal_ScissorIndexedv);
+ SET_GetStringi(table, _mesa_marshal_GetStringi);
+ SET_Uniform2dv(table, _mesa_marshal_Uniform2dv);
+ SET_VertexAttrib4dv(table, _mesa_marshal_VertexAttrib4dv);
+ SET_CreateTextures(table, _mesa_marshal_CreateTextures);
+ SET_EvalCoord2dv(table, _mesa_marshal_EvalCoord2dv);
+ SET_VertexAttrib1fNV(table, _mesa_marshal_VertexAttrib1fNV);
+ SET_CompressedTexSubImage1D(table, _mesa_marshal_CompressedTexSubImage1D);
+ SET_GetSeparableFilter(table, _mesa_marshal_GetSeparableFilter);
+ SET_FeedbackBuffer(table, _mesa_marshal_FeedbackBuffer);
+ SET_RasterPos2iv(table, _mesa_marshal_RasterPos2iv);
+ SET_TexImage1D(table, _mesa_marshal_TexImage1D);
+ SET_MultiDrawElementsEXT(table, _mesa_marshal_MultiDrawElementsEXT);
+ SET_GetnSeparableFilterARB(table, _mesa_marshal_GetnSeparableFilterARB);
+ SET_FrontFace(table, _mesa_marshal_FrontFace);
+ SET_MultiModeDrawArraysIBM(table, _mesa_marshal_MultiModeDrawArraysIBM);
+ SET_Normal3dv(table, _mesa_marshal_Normal3dv);
+ SET_Lightf(table, _mesa_marshal_Lightf);
+ SET_MatrixMode(table, _mesa_marshal_MatrixMode);
+ SET_GetPixelMapusv(table, _mesa_marshal_GetPixelMapusv);
+ SET_Lighti(table, _mesa_marshal_Lighti);
+ SET_GetFragDataIndex(table, _mesa_marshal_GetFragDataIndex);
+ SET_Lightx(table, _mesa_marshal_Lightx);
+ SET_ProgramUniform3fv(table, _mesa_marshal_ProgramUniform3fv);
+ SET_MultMatrixd(table, _mesa_marshal_MultMatrixd);
+ SET_MultMatrixf(table, _mesa_marshal_MultMatrixf);
+ SET_Uniform4ui64vARB(table, _mesa_marshal_Uniform4ui64vARB);
+ SET_MultiTexCoord4fvARB(table, _mesa_marshal_MultiTexCoord4fvARB);
+ SET_UniformMatrix2x3fv(table, _mesa_marshal_UniformMatrix2x3fv);
+ SET_SamplerParameterf(table, _mesa_marshal_SamplerParameterf);
+ SET_UniformMatrix3dv(table, _mesa_marshal_UniformMatrix3dv);
+ SET_PointParameterx(table, _mesa_marshal_PointParameterx);
+ SET_DrawArrays(table, _mesa_marshal_DrawArrays);
+ SET_Uniform3dv(table, _mesa_marshal_Uniform3dv);
+ SET_PointParameteri(table, _mesa_marshal_PointParameteri);
+ SET_PointParameterf(table, _mesa_marshal_PointParameterf);
+ SET_VertexAttribBinding(table, _mesa_marshal_VertexAttribBinding);
+ SET_TextureSubImage2D(table, _mesa_marshal_TextureSubImage2D);
+ SET_CreateShader(table, _mesa_marshal_CreateShader);
+ SET_ProgramUniform1dv(table, _mesa_marshal_ProgramUniform1dv);
+ SET_GetProgramEnvParameterfvARB(table, _mesa_marshal_GetProgramEnvParameterfvARB);
+ SET_DeleteBuffers(table, _mesa_marshal_DeleteBuffers);
+ SET_GetBufferSubData(table, _mesa_marshal_GetBufferSubData);
+ SET_GetNamedRenderbufferParameteriv(table, _mesa_marshal_GetNamedRenderbufferParameteriv);
+ SET_GetPerfMonitorGroupsAMD(table, _mesa_marshal_GetPerfMonitorGroupsAMD);
+ SET_VertexAttribP2ui(table, _mesa_marshal_VertexAttribP2ui);
+ SET_ProgramUniform4dv(table, _mesa_marshal_ProgramUniform4dv);
+ SET_GetMinmaxParameteriv(table, _mesa_marshal_GetMinmaxParameteriv);
+ SET_DrawTexivOES(table, _mesa_marshal_DrawTexivOES);
+ SET_CopyTexImage1D(table, _mesa_marshal_CopyTexImage1D);
+ SET_InvalidateNamedFramebufferData(table, _mesa_marshal_InvalidateNamedFramebufferData);
+ SET_SemaphoreParameterui64vEXT(table, _mesa_marshal_SemaphoreParameterui64vEXT);
+ SET_GetnColorTableARB(table, _mesa_marshal_GetnColorTableARB);
+ SET_VertexAttribFormat(table, _mesa_marshal_VertexAttribFormat);
+ SET_Vertex3i(table, _mesa_marshal_Vertex3i);
+ SET_Vertex3f(table, _mesa_marshal_Vertex3f);
+ SET_Vertex3d(table, _mesa_marshal_Vertex3d);
+ SET_GetProgramPipelineiv(table, _mesa_marshal_GetProgramPipelineiv);
+ SET_ReadBuffer(table, _mesa_marshal_ReadBuffer);
+ SET_ConvolutionParameteri(table, _mesa_marshal_ConvolutionParameteri);
+ SET_GetTexParameterIiv(table, _mesa_marshal_GetTexParameterIiv);
+ SET_Vertex3s(table, _mesa_marshal_Vertex3s);
+ SET_ConvolutionParameterf(table, _mesa_marshal_ConvolutionParameterf);
+ SET_GetColorTableParameteriv(table, _mesa_marshal_GetColorTableParameteriv);
+ SET_GetTransformFeedbackVarying(table, _mesa_marshal_GetTransformFeedbackVarying);
+ SET_GetNextPerfQueryIdINTEL(table, _mesa_marshal_GetNextPerfQueryIdINTEL);
+ SET_TexCoord3fv(table, _mesa_marshal_TexCoord3fv);
+ SET_TextureBarrierNV(table, _mesa_marshal_TextureBarrierNV);
+ SET_GetProgramInterfaceiv(table, _mesa_marshal_GetProgramInterfaceiv);
+ SET_VertexAttribL1ui64vARB(table, _mesa_marshal_VertexAttribL1ui64vARB);
+ SET_ProgramLocalParameter4fARB(table, _mesa_marshal_ProgramLocalParameter4fARB);
+ SET_PauseTransformFeedback(table, _mesa_marshal_PauseTransformFeedback);
+ SET_DeleteShader(table, _mesa_marshal_DeleteShader);
+ SET_NamedFramebufferRenderbuffer(table, _mesa_marshal_NamedFramebufferRenderbuffer);
+ SET_CompileShader(table, _mesa_marshal_CompileShader);
+ SET_Vertex2iv(table, _mesa_marshal_Vertex2iv);
+ SET_GetVertexArrayIndexediv(table, _mesa_marshal_GetVertexArrayIndexediv);
+ SET_TexParameterIiv(table, _mesa_marshal_TexParameterIiv);
+ SET_TexGendv(table, _mesa_marshal_TexGendv);
+ SET_ResetMinmax(table, _mesa_marshal_ResetMinmax);
+ SET_SampleCoverage(table, _mesa_marshal_SampleCoverage);
+ SET_GenerateTextureMipmap(table, _mesa_marshal_GenerateTextureMipmap);
+ SET_DeleteProgramsARB(table, _mesa_marshal_DeleteProgramsARB);
+ SET_ShadeModel(table, _mesa_marshal_ShadeModel);
+ SET_CreateQueries(table, _mesa_marshal_CreateQueries);
+ SET_MultiDrawArrays(table, _mesa_marshal_MultiDrawArrays);
+ SET_GetProgramLocalParameterdvARB(table, _mesa_marshal_GetProgramLocalParameterdvARB);
+ SET_MapBufferRange(table, _mesa_marshal_MapBufferRange);
+ SET_DispatchCompute(table, _mesa_marshal_DispatchCompute);
+ SET_UseProgramStages(table, _mesa_marshal_UseProgramStages);
+ SET_ProgramUniformMatrix4fv(table, _mesa_marshal_ProgramUniformMatrix4fv);
+ SET_FramebufferRenderbuffer(table, _mesa_marshal_FramebufferRenderbuffer);
+ SET_IsProgramARB(table, _mesa_marshal_IsProgramARB);
+ SET_Map2d(table, _mesa_marshal_Map2d);
+ SET_Map2f(table, _mesa_marshal_Map2f);
+ SET_ProgramStringARB(table, _mesa_marshal_ProgramStringARB);
+ SET_CopyTextureSubImage2D(table, _mesa_marshal_CopyTextureSubImage2D);
+ SET_MultiTexCoord4s(table, _mesa_marshal_MultiTexCoord4s);
+ SET_ViewportIndexedf(table, _mesa_marshal_ViewportIndexedf);
+ SET_MultiTexCoord4i(table, _mesa_marshal_MultiTexCoord4i);
+ SET_DebugMessageControl(table, _mesa_marshal_DebugMessageControl);
+ SET_MultiTexCoord4d(table, _mesa_marshal_MultiTexCoord4d);
+ SET_GetHistogram(table, _mesa_marshal_GetHistogram);
+ SET_Translatex(table, _mesa_marshal_Translatex);
+ SET_MultiDrawElementsIndirectCountARB(table, _mesa_marshal_MultiDrawElementsIndirectCountARB);
+ SET_Indexsv(table, _mesa_marshal_Indexsv);
+ SET_VertexAttrib1fvARB(table, _mesa_marshal_VertexAttrib1fvARB);
+ SET_TexCoord2dv(table, _mesa_marshal_TexCoord2dv);
+ SET_Translated(table, _mesa_marshal_Translated);
+ SET_Translatef(table, _mesa_marshal_Translatef);
+ SET_MultTransposeMatrixd(table, _mesa_marshal_MultTransposeMatrixd);
+ SET_ProgramUniform4uiv(table, _mesa_marshal_ProgramUniform4uiv);
+ SET_GetPerfCounterInfoINTEL(table, _mesa_marshal_GetPerfCounterInfoINTEL);
+ SET_RenderMode(table, _mesa_marshal_RenderMode);
+ SET_MultiTexCoord1fARB(table, _mesa_marshal_MultiTexCoord1fARB);
+ SET_SecondaryColor3d(table, _mesa_marshal_SecondaryColor3d);
+ SET_FramebufferParameteri(table, _mesa_marshal_FramebufferParameteri);
+ SET_VertexAttribs4ubvNV(table, _mesa_marshal_VertexAttribs4ubvNV);
+ SET_LightModelxv(table, _mesa_marshal_LightModelxv);
+ SET_CopyTexSubImage1D(table, _mesa_marshal_CopyTexSubImage1D);
+ SET_TextureSubImage3D(table, _mesa_marshal_TextureSubImage3D);
+ SET_StencilFunc(table, _mesa_marshal_StencilFunc);
+ SET_CopyPixels(table, _mesa_marshal_CopyPixels);
+ SET_TexGenxvOES(table, _mesa_marshal_TexGenxvOES);
+ SET_GetTextureLevelParameterfv(table, _mesa_marshal_GetTextureLevelParameterfv);
+ SET_VertexAttrib4Nubv(table, _mesa_marshal_VertexAttrib4Nubv);
+ SET_UniformMatrix4x2dv(table, _mesa_marshal_UniformMatrix4x2dv);
+ SET_VertexAttribPointer(table, _mesa_marshal_VertexAttribPointer);
+ SET_IndexMask(table, _mesa_marshal_IndexMask);
+ SET_VertexAttribIFormat(table, _mesa_marshal_VertexAttribIFormat);
+ SET_DrawArraysInstancedBaseInstance(table, _mesa_marshal_DrawArraysInstancedBaseInstance);
+ SET_TextureStorageMem3DMultisampleEXT(table, _mesa_marshal_TextureStorageMem3DMultisampleEXT);
+ SET_CompressedTextureSubImage3D(table, _mesa_marshal_CompressedTextureSubImage3D);
+ SET_PopAttrib(table, _mesa_marshal_PopAttrib);
+ SET_Uniform3ui(table, _mesa_marshal_Uniform3ui);
+ SET_DeletePerfMonitorsAMD(table, _mesa_marshal_DeletePerfMonitorsAMD);
+ SET_Color4dv(table, _mesa_marshal_Color4dv);
+ SET_DisableVertexAttribArray(table, _mesa_marshal_DisableVertexAttribArray);
+ SET_ProgramUniformMatrix3x2fv(table, _mesa_marshal_ProgramUniformMatrix3x2fv);
+ SET_GetDoublei_v(table, _mesa_marshal_GetDoublei_v);
+ SET_IsTransformFeedback(table, _mesa_marshal_IsTransformFeedback);
+ SET_GetMemoryObjectParameterivEXT(table, _mesa_marshal_GetMemoryObjectParameterivEXT);
+ SET_ClipPlanex(table, _mesa_marshal_ClipPlanex);
+ SET_GetLightfv(table, _mesa_marshal_GetLightfv);
+ SET_ClipPlanef(table, _mesa_marshal_ClipPlanef);
+ SET_ProgramUniform1ui(table, _mesa_marshal_ProgramUniform1ui);
+ SET_SecondaryColorPointer(table, _mesa_marshal_SecondaryColorPointer);
+ SET_LineStipple(table, _mesa_marshal_LineStipple);
+ SET_BeginFragmentShaderATI(table, _mesa_marshal_BeginFragmentShaderATI);
+ SET_GenRenderbuffers(table, _mesa_marshal_GenRenderbuffers);
+ SET_GetMinmaxParameterfv(table, _mesa_marshal_GetMinmaxParameterfv);
+ SET_TextureStorageMem2DEXT(table, _mesa_marshal_TextureStorageMem2DEXT);
+ SET_IsEnabledi(table, _mesa_marshal_IsEnabledi);
+ SET_WaitSync(table, _mesa_marshal_WaitSync);
+ SET_GetVertexAttribPointerv(table, _mesa_marshal_GetVertexAttribPointerv);
+ SET_Uniform1i64vARB(table, _mesa_marshal_Uniform1i64vARB);
+ SET_CreatePerfQueryINTEL(table, _mesa_marshal_CreatePerfQueryINTEL);
+ SET_NewList(table, _mesa_marshal_NewList);
+ SET_TexBuffer(table, _mesa_marshal_TexBuffer);
+ SET_TexCoord4sv(table, _mesa_marshal_TexCoord4sv);
+ SET_TexCoord1f(table, _mesa_marshal_TexCoord1f);
+ SET_TexCoord1d(table, _mesa_marshal_TexCoord1d);
+ SET_TexCoord1i(table, _mesa_marshal_TexCoord1i);
+ SET_GetnUniformfvARB(table, _mesa_marshal_GetnUniformfvARB);
+ SET_TexCoord1s(table, _mesa_marshal_TexCoord1s);
+ SET_Uniform1ui(table, _mesa_marshal_Uniform1ui);
+ SET_TexStorage1D(table, _mesa_marshal_TexStorage1D);
+ SET_BlitFramebuffer(table, _mesa_marshal_BlitFramebuffer);
+ SET_TextureParameterf(table, _mesa_marshal_TextureParameterf);
+ SET_FramebufferTexture1D(table, _mesa_marshal_FramebufferTexture1D);
+ SET_TextureParameteri(table, _mesa_marshal_TextureParameteri);
+ SET_GetMapiv(table, _mesa_marshal_GetMapiv);
+ SET_GetUniformui64vARB(table, _mesa_marshal_GetUniformui64vARB);
+ SET_TexCoordP4ui(table, _mesa_marshal_TexCoordP4ui);
+ SET_VertexAttrib1sv(table, _mesa_marshal_VertexAttrib1sv);
+ SET_WindowPos4dMESA(table, _mesa_marshal_WindowPos4dMESA);
+ SET_Vertex3dv(table, _mesa_marshal_Vertex3dv);
+ SET_VertexAttribL2d(table, _mesa_marshal_VertexAttribL2d);
+ SET_GetnMapivARB(table, _mesa_marshal_GetnMapivARB);
+ SET_GetVertexAttribfv(table, _mesa_marshal_GetVertexAttribfv);
+ SET_MultiTexCoordP4uiv(table, _mesa_marshal_MultiTexCoordP4uiv);
+ SET_TexGeniv(table, _mesa_marshal_TexGeniv);
+ SET_IsMemoryObjectEXT(table, _mesa_marshal_IsMemoryObjectEXT);
+ SET_BlendColor(table, _mesa_marshal_BlendColor);
+ SET_VertexAttribs2dvNV(table, _mesa_marshal_VertexAttribs2dvNV);
+ SET_VertexAttrib2dvNV(table, _mesa_marshal_VertexAttrib2dvNV);
+ SET_NamedFramebufferDrawBuffers(table, _mesa_marshal_NamedFramebufferDrawBuffers);
+ SET_ResetHistogram(table, _mesa_marshal_ResetHistogram);
+ SET_CompressedTexSubImage2D(table, _mesa_marshal_CompressedTexSubImage2D);
+ SET_TexCoord2sv(table, _mesa_marshal_TexCoord2sv);
+ SET_StencilMaskSeparate(table, _mesa_marshal_StencilMaskSeparate);
+ SET_MultiTexCoord3sv(table, _mesa_marshal_MultiTexCoord3sv);
+ SET_TexCoord3iv(table, _mesa_marshal_TexCoord3iv);
+ SET_MultiTexCoord4sv(table, _mesa_marshal_MultiTexCoord4sv);
+ SET_VertexBindingDivisor(table, _mesa_marshal_VertexBindingDivisor);
+ SET_PrimitiveBoundingBox(table, _mesa_marshal_PrimitiveBoundingBox);
+ SET_GetPerfMonitorCounterInfoAMD(table, _mesa_marshal_GetPerfMonitorCounterInfoAMD);
+ SET_UniformBlockBinding(table, _mesa_marshal_UniformBlockBinding);
+ SET_FenceSync(table, _mesa_marshal_FenceSync);
+ SET_CompressedTextureSubImage2D(table, _mesa_marshal_CompressedTextureSubImage2D);
+ SET_VertexAttrib4Nusv(table, _mesa_marshal_VertexAttrib4Nusv);
+ SET_SetFragmentShaderConstantATI(table, _mesa_marshal_SetFragmentShaderConstantATI);
+ SET_VertexP2ui(table, _mesa_marshal_VertexP2ui);
+ SET_ProgramUniform2fv(table, _mesa_marshal_ProgramUniform2fv);
+ SET_GetTextureLevelParameteriv(table, _mesa_marshal_GetTextureLevelParameteriv);
+ SET_GetTexEnvfv(table, _mesa_marshal_GetTexEnvfv);
+ SET_BindAttribLocation(table, _mesa_marshal_BindAttribLocation);
+ SET_TextureStorage2DEXT(table, _mesa_marshal_TextureStorage2DEXT);
+ SET_TextureParameterIiv(table, _mesa_marshal_TextureParameterIiv);
+ SET_DrawTransformFeedbackInstanced(table, _mesa_marshal_DrawTransformFeedbackInstanced);
+ SET_CopyTextureSubImage1D(table, _mesa_marshal_CopyTextureSubImage1D);
+ SET_ResumeTransformFeedback(table, _mesa_marshal_ResumeTransformFeedback);
+ SET_VertexAttribI1iv(table, _mesa_marshal_VertexAttribI1iv);
+ SET_Vertex2dv(table, _mesa_marshal_Vertex2dv);
+ SET_VertexAttribI2uivEXT(table, _mesa_marshal_VertexAttribI2uivEXT);
+ SET_SampleMaski(table, _mesa_marshal_SampleMaski);
+ SET_GetFloati_v(table, _mesa_marshal_GetFloati_v);
+ SET_MultiTexCoord2iv(table, _mesa_marshal_MultiTexCoord2iv);
+ SET_DrawPixels(table, _mesa_marshal_DrawPixels);
+ SET_CreateFramebuffers(table, _mesa_marshal_CreateFramebuffers);
+ SET_DrawTransformFeedback(table, _mesa_marshal_DrawTransformFeedback);
+ SET_VertexAttribs3fvNV(table, _mesa_marshal_VertexAttribs3fvNV);
+ SET_GenLists(table, _mesa_marshal_GenLists);
+ SET_ProgramUniform2ui64vARB(table, _mesa_marshal_ProgramUniform2ui64vARB);
+ SET_MapGrid2d(table, _mesa_marshal_MapGrid2d);
+ SET_MapGrid2f(table, _mesa_marshal_MapGrid2f);
+ SET_SampleMapATI(table, _mesa_marshal_SampleMapATI);
+ SET_GetActiveAttrib(table, _mesa_marshal_GetActiveAttrib);
+ SET_PixelMapfv(table, _mesa_marshal_PixelMapfv);
+ SET_ClearBufferData(table, _mesa_marshal_ClearBufferData);
+ SET_Color3usv(table, _mesa_marshal_Color3usv);
+ SET_CopyImageSubData(table, _mesa_marshal_CopyImageSubData);
+ SET_StencilOpSeparate(table, _mesa_marshal_StencilOpSeparate);
+ SET_GenSamplers(table, _mesa_marshal_GenSamplers);
+ SET_ClipControl(table, _mesa_marshal_ClipControl);
+ SET_DrawTexfOES(table, _mesa_marshal_DrawTexfOES);
+ SET_Uniform4i64vARB(table, _mesa_marshal_Uniform4i64vARB);
+ SET_AttachObjectARB(table, _mesa_marshal_AttachObjectARB);
+ SET_Accum(table, _mesa_marshal_Accum);
+ SET_GetTexImage(table, _mesa_marshal_GetTexImage);
+ SET_Color4x(table, _mesa_marshal_Color4x);
+ SET_ConvolutionParameteriv(table, _mesa_marshal_ConvolutionParameteriv);
+ SET_Color4s(table, _mesa_marshal_Color4s);
+ SET_EnableVertexAttribArray(table, _mesa_marshal_EnableVertexAttribArray);
+ SET_Color4i(table, _mesa_marshal_Color4i);
+ SET_Color4f(table, _mesa_marshal_Color4f);
+ SET_ShaderStorageBlockBinding(table, _mesa_marshal_ShaderStorageBlockBinding);
+ SET_Color4d(table, _mesa_marshal_Color4d);
+ SET_Color4b(table, _mesa_marshal_Color4b);
+ SET_MemoryObjectParameterivEXT(table, _mesa_marshal_MemoryObjectParameterivEXT);
+ SET_GetAttachedObjectsARB(table, _mesa_marshal_GetAttachedObjectsARB);
+ SET_EvalCoord1fv(table, _mesa_marshal_EvalCoord1fv);
+ SET_VertexAttribLFormat(table, _mesa_marshal_VertexAttribLFormat);
+ SET_VertexAttribL3d(table, _mesa_marshal_VertexAttribL3d);
+ SET_ClearNamedFramebufferuiv(table, _mesa_marshal_ClearNamedFramebufferuiv);
+ SET_StencilFuncSeparate(table, _mesa_marshal_StencilFuncSeparate);
+ SET_ShaderSource(table, _mesa_marshal_ShaderSource);
+ SET_Normal3fv(table, _mesa_marshal_Normal3fv);
+ SET_NormalP3ui(table, _mesa_marshal_NormalP3ui);
+ SET_CreateSamplers(table, _mesa_marshal_CreateSamplers);
+ SET_MultiTexCoord3fvARB(table, _mesa_marshal_MultiTexCoord3fvARB);
+ SET_BufferData(table, _mesa_marshal_BufferData);
+ SET_TexSubImage2D(table, _mesa_marshal_TexSubImage2D);
+ SET_TexGenfv(table, _mesa_marshal_TexGenfv);
+ SET_GetVertexAttribiv(table, _mesa_marshal_GetVertexAttribiv);
+ SET_TexCoordP2uiv(table, _mesa_marshal_TexCoordP2uiv);
+ SET_Uniform3fv(table, _mesa_marshal_Uniform3fv);
+ SET_BlendEquation(table, _mesa_marshal_BlendEquation);
+ SET_VertexAttrib3dNV(table, _mesa_marshal_VertexAttrib3dNV);
+ SET_PushName(table, _mesa_marshal_PushName);
+ SET_DeleteRenderbuffers(table, _mesa_marshal_DeleteRenderbuffers);
+ SET_VertexAttrib1dv(table, _mesa_marshal_VertexAttrib1dv);
+ SET_IsShader(table, _mesa_marshal_IsShader);
+ SET_Rotated(table, _mesa_marshal_Rotated);
+ SET_Color4iv(table, _mesa_marshal_Color4iv);
+ SET_PointParameterxv(table, _mesa_marshal_PointParameterxv);
+ SET_Rotatex(table, _mesa_marshal_Rotatex);
+ SET_FramebufferTextureLayer(table, _mesa_marshal_FramebufferTextureLayer);
+ SET_TexEnvfv(table, _mesa_marshal_TexEnvfv);
+ SET_ProgramUniformMatrix3fv(table, _mesa_marshal_ProgramUniformMatrix3fv);
+ SET_DeleteMemoryObjectsEXT(table, _mesa_marshal_DeleteMemoryObjectsEXT);
+ SET_LoadMatrixf(table, _mesa_marshal_LoadMatrixf);
+ SET_GetProgramLocalParameterfvARB(table, _mesa_marshal_GetProgramLocalParameterfvARB);
+ SET_MakeTextureHandleResidentARB(table, _mesa_marshal_MakeTextureHandleResidentARB);
+ SET_MultiDrawArraysIndirect(table, _mesa_marshal_MultiDrawArraysIndirect);
+ SET_DrawRangeElementsBaseVertex(table, _mesa_marshal_DrawRangeElementsBaseVertex);
+ SET_ProgramUniformMatrix4dv(table, _mesa_marshal_ProgramUniformMatrix4dv);
+ SET_SecondaryColor3bv(table, _mesa_marshal_SecondaryColor3bv);
+ SET_DrawTexxvOES(table, _mesa_marshal_DrawTexxvOES);
+ SET_TexParameterfv(table, _mesa_marshal_TexParameterfv);
+ SET_Color4ubv(table, _mesa_marshal_Color4ubv);
+ SET_TexCoord2fv(table, _mesa_marshal_TexCoord2fv);
+ SET_FogCoorddv(table, _mesa_marshal_FogCoorddv);
+ SET_VDPAUUnregisterSurfaceNV(table, _mesa_marshal_VDPAUUnregisterSurfaceNV);
+ SET_ColorP3ui(table, _mesa_marshal_ColorP3ui);
+ SET_ClearBufferuiv(table, _mesa_marshal_ClearBufferuiv);
+ SET_GetUnsignedBytei_vEXT(table, _mesa_marshal_GetUnsignedBytei_vEXT);
+ SET_GetShaderPrecisionFormat(table, _mesa_marshal_GetShaderPrecisionFormat);
+ SET_Flush(table, _mesa_marshal_Flush);
+ SET_MakeTextureHandleNonResidentARB(table, _mesa_marshal_MakeTextureHandleNonResidentARB);
+ SET_VertexAttribI4iEXT(table, _mesa_marshal_VertexAttribI4iEXT);
+ SET_VertexAttribI3uivEXT(table, _mesa_marshal_VertexAttribI3uivEXT);
+ SET_FogCoordd(table, _mesa_marshal_FogCoordd);
+ SET_BindFramebufferEXT(table, _mesa_marshal_BindFramebufferEXT);
+ SET_Uniform3iv(table, _mesa_marshal_Uniform3iv);
+ SET_TexStorage2DMultisample(table, _mesa_marshal_TexStorage2DMultisample);
+ SET_UnlockArraysEXT(table, _mesa_marshal_UnlockArraysEXT);
+ SET_GetVertexAttribLui64vARB(table, _mesa_marshal_GetVertexAttribLui64vARB);
+ SET_VertexAttrib4iv(table, _mesa_marshal_VertexAttrib4iv);
+ SET_CopyTexSubImage3D(table, _mesa_marshal_CopyTexSubImage3D);
+ SET_PolygonOffsetClampEXT(table, _mesa_marshal_PolygonOffsetClampEXT);
+ SET_GetInteger64v(table, _mesa_marshal_GetInteger64v);
+ SET_DetachObjectARB(table, _mesa_marshal_DetachObjectARB);
+ SET_Indexiv(table, _mesa_marshal_Indexiv);
+ SET_TexEnvi(table, _mesa_marshal_TexEnvi);
+ SET_TexEnvf(table, _mesa_marshal_TexEnvf);
+ SET_TexEnvx(table, _mesa_marshal_TexEnvx);
+ SET_InvalidateBufferSubData(table, _mesa_marshal_InvalidateBufferSubData);
+ SET_UniformMatrix4x2fv(table, _mesa_marshal_UniformMatrix4x2fv);
+ SET_ClearTexImage(table, _mesa_marshal_ClearTexImage);
+ SET_PolygonOffset(table, _mesa_marshal_PolygonOffset);
+ SET_SamplerParameterfv(table, _mesa_marshal_SamplerParameterfv);
+ SET_CompressedTextureSubImage1D(table, _mesa_marshal_CompressedTextureSubImage1D);
+ SET_ProgramUniformMatrix4x2dv(table, _mesa_marshal_ProgramUniformMatrix4x2dv);
+ SET_ProgramEnvParameter4fARB(table, _mesa_marshal_ProgramEnvParameter4fARB);
+ SET_ClearDepth(table, _mesa_marshal_ClearDepth);
+ SET_VertexAttrib3dvNV(table, _mesa_marshal_VertexAttrib3dvNV);
+ SET_Color4fv(table, _mesa_marshal_Color4fv);
+ SET_GetnMinmaxARB(table, _mesa_marshal_GetnMinmaxARB);
+ SET_IsImageHandleResidentARB(table, _mesa_marshal_IsImageHandleResidentARB);
+ SET_ColorPointer(table, _mesa_marshal_ColorPointer);
+ SET_ProgramUniform2ui64ARB(table, _mesa_marshal_ProgramUniform2ui64ARB);
+ SET_Lightiv(table, _mesa_marshal_Lightiv);
+ SET_GetTexParameterIuiv(table, _mesa_marshal_GetTexParameterIuiv);
+ SET_TransformFeedbackVaryings(table, _mesa_marshal_TransformFeedbackVaryings);
+ SET_VertexAttrib3sv(table, _mesa_marshal_VertexAttrib3sv);
+ SET_Uniform4i64ARB(table, _mesa_marshal_Uniform4i64ARB);
+ SET_IsVertexArray(table, _mesa_marshal_IsVertexArray);
+ SET_ProgramUniform3ui64ARB(table, _mesa_marshal_ProgramUniform3ui64ARB);
+ SET_PushClientAttrib(table, _mesa_marshal_PushClientAttrib);
+ SET_ProgramUniform4ui(table, _mesa_marshal_ProgramUniform4ui);
+ SET_Uniform1f(table, _mesa_marshal_Uniform1f);
+ SET_Uniform1d(table, _mesa_marshal_Uniform1d);
+ SET_Uniform1i(table, _mesa_marshal_Uniform1i);
+ SET_GetPolygonStipple(table, _mesa_marshal_GetPolygonStipple);
+ SET_BlitNamedFramebuffer(table, _mesa_marshal_BlitNamedFramebuffer);
+ SET_UseProgram(table, _mesa_marshal_UseProgram);
+ SET_GetFragDataLocation(table, _mesa_marshal_GetFragDataLocation);
+ SET_PixelMapuiv(table, _mesa_marshal_PixelMapuiv);
+ SET_ClearNamedBufferSubData(table, _mesa_marshal_ClearNamedBufferSubData);
+ SET_GetNamedFramebufferAttachmentParameteriv(table, _mesa_marshal_GetNamedFramebufferAttachmentParameteriv);
+ SET_GenVertexArrays(table, _mesa_marshal_GenVertexArrays);
+ SET_TexStorageMem2DMultisampleEXT(table, _mesa_marshal_TexStorageMem2DMultisampleEXT);
+ SET_Color3s(table, _mesa_marshal_Color3s);
+ SET_TextureStorage2DMultisample(table, _mesa_marshal_TextureStorage2DMultisample);
+ SET_TexCoordPointer(table, _mesa_marshal_TexCoordPointer);
+ SET_Color3i(table, _mesa_marshal_Color3i);
+ SET_EvalCoord2d(table, _mesa_marshal_EvalCoord2d);
+ SET_EvalCoord2f(table, _mesa_marshal_EvalCoord2f);
+ SET_Color3b(table, _mesa_marshal_Color3b);
+ SET_Color3f(table, _mesa_marshal_Color3f);
+ SET_Color3d(table, _mesa_marshal_Color3d);
+ SET_GetVertexAttribdv(table, _mesa_marshal_GetVertexAttribdv);
+ SET_GetBufferPointerv(table, _mesa_marshal_GetBufferPointerv);
+ SET_GenFramebuffers(table, _mesa_marshal_GenFramebuffers);
+ SET_IsTextureHandleResidentARB(table, _mesa_marshal_IsTextureHandleResidentARB);
+ SET_GenBuffers(table, _mesa_marshal_GenBuffers);
+ SET_ClearDepthx(table, _mesa_marshal_ClearDepthx);
+ SET_EnableVertexArrayAttrib(table, _mesa_marshal_EnableVertexArrayAttrib);
+ SET_BlendEquationSeparate(table, _mesa_marshal_BlendEquationSeparate);
+ SET_MultiTexCoordP4ui(table, _mesa_marshal_MultiTexCoordP4ui);
+ SET_VertexAttribs1fvNV(table, _mesa_marshal_VertexAttribs1fvNV);
+ SET_VertexAttribIPointer(table, _mesa_marshal_VertexAttribIPointer);
+ SET_ProgramUniform4fv(table, _mesa_marshal_ProgramUniform4fv);
+ SET_RasterPos4sv(table, _mesa_marshal_RasterPos4sv);
+ SET_CopyTextureSubImage3D(table, _mesa_marshal_CopyTextureSubImage3D);
+ SET_SelectBuffer(table, _mesa_marshal_SelectBuffer);
+ SET_GetSynciv(table, _mesa_marshal_GetSynciv);
+ SET_TextureView(table, _mesa_marshal_TextureView);
+ SET_TexEnviv(table, _mesa_marshal_TexEnviv);
+ SET_TexSubImage3D(table, _mesa_marshal_TexSubImage3D);
+ SET_Bitmap(table, _mesa_marshal_Bitmap);
+ SET_VertexAttribDivisor(table, _mesa_marshal_VertexAttribDivisor);
+ SET_DrawTransformFeedbackStream(table, _mesa_marshal_DrawTransformFeedbackStream);
+ SET_GetIntegerv(table, _mesa_marshal_GetIntegerv);
+ SET_EndPerfQueryINTEL(table, _mesa_marshal_EndPerfQueryINTEL);
+ SET_NamedBufferPageCommitmentARB(table, _mesa_marshal_NamedBufferPageCommitmentARB);
+ SET_GetActiveUniform(table, _mesa_marshal_GetActiveUniform);
+ SET_AlphaFuncx(table, _mesa_marshal_AlphaFuncx);
+ SET_VertexAttribI2ivEXT(table, _mesa_marshal_VertexAttribI2ivEXT);
+ SET_Map1d(table, _mesa_marshal_Map1d);
+ SET_Map1f(table, _mesa_marshal_Map1f);
+ SET_AreTexturesResident(table, _mesa_marshal_AreTexturesResident);
+ SET_VertexArrayVertexBuffer(table, _mesa_marshal_VertexArrayVertexBuffer);
+ SET_PixelTransferf(table, _mesa_marshal_PixelTransferf);
+ SET_PixelTransferi(table, _mesa_marshal_PixelTransferi);
+ SET_GetProgramResourceiv(table, _mesa_marshal_GetProgramResourceiv);
+ SET_VertexAttrib3fvNV(table, _mesa_marshal_VertexAttrib3fvNV);
+ SET_SecondaryColorP3ui(table, _mesa_marshal_SecondaryColorP3ui);
+ SET_BindTextures(table, _mesa_marshal_BindTextures);
+ SET_VertexAttrib4fvNV(table, _mesa_marshal_VertexAttrib4fvNV);
+ SET_Rectiv(table, _mesa_marshal_Rectiv);
+ SET_MultiTexCoord1iv(table, _mesa_marshal_MultiTexCoord1iv);
+ SET_PassTexCoordATI(table, _mesa_marshal_PassTexCoordATI);
+ SET_Vertex2fv(table, _mesa_marshal_Vertex2fv);
+ SET_BindRenderbufferEXT(table, _mesa_marshal_BindRenderbufferEXT);
+ SET_Vertex3sv(table, _mesa_marshal_Vertex3sv);
+ SET_EvalMesh1(table, _mesa_marshal_EvalMesh1);
+ SET_DiscardFramebufferEXT(table, _mesa_marshal_DiscardFramebufferEXT);
+ SET_Uniform2f(table, _mesa_marshal_Uniform2f);
+ SET_Uniform2d(table, _mesa_marshal_Uniform2d);
+ SET_ColorPointerEXT(table, _mesa_marshal_ColorPointerEXT);
+ SET_LineWidth(table, _mesa_marshal_LineWidth);
+ SET_Uniform2i(table, _mesa_marshal_Uniform2i);
+ SET_MultiDrawElementsBaseVertex(table, _mesa_marshal_MultiDrawElementsBaseVertex);
+ SET_Lightxv(table, _mesa_marshal_Lightxv);
+ SET_DepthRangeIndexed(table, _mesa_marshal_DepthRangeIndexed);
+ SET_GetConvolutionParameterfv(table, _mesa_marshal_GetConvolutionParameterfv);
+ SET_GetMaterialfv(table, _mesa_marshal_GetMaterialfv);
+ SET_TexImage3DMultisample(table, _mesa_marshal_TexImage3DMultisample);
+ SET_VertexAttrib1fvNV(table, _mesa_marshal_VertexAttrib1fvNV);
+ SET_GetUniformBlockIndex(table, _mesa_marshal_GetUniformBlockIndex);
+ SET_DetachShader(table, _mesa_marshal_DetachShader);
+ SET_CopyTexSubImage2D(table, _mesa_marshal_CopyTexSubImage2D);
+ SET_GetNamedFramebufferParameteriv(table, _mesa_marshal_GetNamedFramebufferParameteriv);
+ SET_GetObjectParameterivARB(table, _mesa_marshal_GetObjectParameterivARB);
+ SET_Color3iv(table, _mesa_marshal_Color3iv);
+ SET_DrawElements(table, _mesa_marshal_DrawElements);
+ SET_ScissorArrayv(table, _mesa_marshal_ScissorArrayv);
+ SET_GetInternalformativ(table, _mesa_marshal_GetInternalformativ);
+ SET_EvalPoint2(table, _mesa_marshal_EvalPoint2);
+ SET_EvalPoint1(table, _mesa_marshal_EvalPoint1);
+ SET_VertexAttribLPointer(table, _mesa_marshal_VertexAttribLPointer);
+ SET_PopMatrix(table, _mesa_marshal_PopMatrix);
+ SET_NamedBufferData(table, _mesa_marshal_NamedBufferData);
+ SET_GetTexGeniv(table, _mesa_marshal_GetTexGeniv);
+ SET_GetFirstPerfQueryIdINTEL(table, _mesa_marshal_GetFirstPerfQueryIdINTEL);
+ SET_UnmapBuffer(table, _mesa_marshal_UnmapBuffer);
+ SET_EvalCoord1d(table, _mesa_marshal_EvalCoord1d);
+ SET_VertexAttribL1d(table, _mesa_marshal_VertexAttribL1d);
+ SET_EvalCoord1f(table, _mesa_marshal_EvalCoord1f);
+ SET_Materialf(table, _mesa_marshal_Materialf);
+ SET_Materiali(table, _mesa_marshal_Materiali);
+ SET_ProgramUniform1uiv(table, _mesa_marshal_ProgramUniform1uiv);
+ SET_EvalCoord1dv(table, _mesa_marshal_EvalCoord1dv);
+ SET_Materialx(table, _mesa_marshal_Materialx);
+ SET_GetQueryBufferObjectiv(table, _mesa_marshal_GetQueryBufferObjectiv);
+ SET_GetTextureSamplerHandleARB(table, _mesa_marshal_GetTextureSamplerHandleARB);
+ SET_GetLightiv(table, _mesa_marshal_GetLightiv);
+ SET_ProgramUniform3i64ARB(table, _mesa_marshal_ProgramUniform3i64ARB);
+ SET_BindBuffer(table, _mesa_marshal_BindBuffer);
+ SET_ProgramUniform1i(table, _mesa_marshal_ProgramUniform1i);
+ SET_ProgramUniform1f(table, _mesa_marshal_ProgramUniform1f);
+ SET_ProgramUniform1d(table, _mesa_marshal_ProgramUniform1d);
+ SET_WindowPos3iv(table, _mesa_marshal_WindowPos3iv);
+ SET_CopyConvolutionFilter2D(table, _mesa_marshal_CopyConvolutionFilter2D);
+ SET_CopyBufferSubData(table, _mesa_marshal_CopyBufferSubData);
+ SET_UniformMatrix3x4fv(table, _mesa_marshal_UniformMatrix3x4fv);
+ SET_Recti(table, _mesa_marshal_Recti);
+ SET_VertexAttribI3ivEXT(table, _mesa_marshal_VertexAttribI3ivEXT);
+ SET_DeleteSamplers(table, _mesa_marshal_DeleteSamplers);
+ SET_SamplerParameteri(table, _mesa_marshal_SamplerParameteri);
+ SET_WindowRectanglesEXT(table, _mesa_marshal_WindowRectanglesEXT);
+ SET_Rectf(table, _mesa_marshal_Rectf);
+ SET_Rectd(table, _mesa_marshal_Rectd);
+ SET_MultMatrixx(table, _mesa_marshal_MultMatrixx);
+ SET_TexStorageMem3DMultisampleEXT(table, _mesa_marshal_TexStorageMem3DMultisampleEXT);
+ SET_Rects(table, _mesa_marshal_Rects);
+ SET_GetVertexAttribIiv(table, _mesa_marshal_GetVertexAttribIiv);
+ SET_ClientWaitSync(table, _mesa_marshal_ClientWaitSync);
+ SET_TexCoord4s(table, _mesa_marshal_TexCoord4s);
+ SET_TexEnvxv(table, _mesa_marshal_TexEnvxv);
+ SET_TexCoord4i(table, _mesa_marshal_TexCoord4i);
+ SET_ObjectPurgeableAPPLE(table, _mesa_marshal_ObjectPurgeableAPPLE);
+ SET_ProgramUniform1ui64vARB(table, _mesa_marshal_ProgramUniform1ui64vARB);
+ SET_TexCoord4d(table, _mesa_marshal_TexCoord4d);
+ SET_TexCoord4f(table, _mesa_marshal_TexCoord4f);
+ SET_GetBooleanv(table, _mesa_marshal_GetBooleanv);
+ SET_ProgramUniformMatrix3dv(table, _mesa_marshal_ProgramUniformMatrix3dv);
+ SET_LockArraysEXT(table, _mesa_marshal_LockArraysEXT);
+ SET_GetActiveUniformBlockiv(table, _mesa_marshal_GetActiveUniformBlockiv);
+ SET_GetPerfMonitorCountersAMD(table, _mesa_marshal_GetPerfMonitorCountersAMD);
+ SET_ObjectPtrLabel(table, _mesa_marshal_ObjectPtrLabel);
+ SET_Rectfv(table, _mesa_marshal_Rectfv);
+ SET_BindImageTexture(table, _mesa_marshal_BindImageTexture);
+ SET_VertexP4uiv(table, _mesa_marshal_VertexP4uiv);
+ SET_GetUniformSubroutineuiv(table, _mesa_marshal_GetUniformSubroutineuiv);
+ SET_MinSampleShading(table, _mesa_marshal_MinSampleShading);
+ SET_GetRenderbufferParameteriv(table, _mesa_marshal_GetRenderbufferParameteriv);
+ SET_VertexAttrib1dNV(table, _mesa_marshal_VertexAttrib1dNV);
+ SET_WindowPos2sv(table, _mesa_marshal_WindowPos2sv);
+ SET_GetPerfMonitorCounterStringAMD(table, _mesa_marshal_GetPerfMonitorCounterStringAMD);
+ SET_EndFragmentShaderATI(table, _mesa_marshal_EndFragmentShaderATI);
+ SET_Uniform4iv(table, _mesa_marshal_Uniform4iv);
+ SET_CreateMemoryObjectsEXT(table, _mesa_marshal_CreateMemoryObjectsEXT);
+
+ return table;
+}
+
+
diff --git a/prebuilt-intermediates/main/marshal_generated.h b/prebuilt-intermediates/main/marshal_generated.h
new file mode 100644
index 0000000..490dece
--- /dev/null
+++ b/prebuilt-intermediates/main/marshal_generated.h
@@ -0,0 +1,935 @@
+/* DO NOT EDIT - This file generated automatically by gl_marshal_h.py script */
+
+/*
+ * Copyright (C) 2012 Intel Corporation
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * INTEL CORPORATION,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+
+#ifndef MARSHAL_GENERATABLE_H
+#define MARSHAL_GENERATABLE_H
+
+enum marshal_dispatch_cmd_id
+{
+ DISPATCH_CMD_MapGrid1d,
+ DISPATCH_CMD_MapGrid1f,
+ DISPATCH_CMD_ProgramUniform3i64vARB,
+ DISPATCH_CMD_TexCoordP1ui,
+ DISPATCH_CMD_MultiTexCoord1dv,
+ DISPATCH_CMD_AttachShader,
+ DISPATCH_CMD_VertexAttrib3fARB,
+ DISPATCH_CMD_Indexubv,
+ DISPATCH_CMD_Color3ubv,
+ DISPATCH_CMD_ProgramUniform2ui,
+ DISPATCH_CMD_RenderbufferStorage,
+ DISPATCH_CMD_Uniform3i,
+ DISPATCH_CMD_Uniform3d,
+ DISPATCH_CMD_Uniform3f,
+ DISPATCH_CMD_UniformMatrix2x4fv,
+ DISPATCH_CMD_Normal3iv,
+ DISPATCH_CMD_DrawTexiOES,
+ DISPATCH_CMD_Viewport,
+ DISPATCH_CMD_DeleteVertexArrays,
+ DISPATCH_CMD_ClearColorIuiEXT,
+ DISPATCH_CMD_PolygonOffsetx,
+ DISPATCH_CMD_DepthRangeIndexedfOES,
+ DISPATCH_CMD_VertexAttrib4usv,
+ DISPATCH_CMD_TextureStorage1DEXT,
+ DISPATCH_CMD_VertexAttrib4Nub,
+ DISPATCH_CMD_VertexAttribP3ui,
+ DISPATCH_CMD_PointSize,
+ DISPATCH_CMD_PopName,
+ DISPATCH_CMD_FramebufferTexture,
+ DISPATCH_CMD_VertexAttrib4ubNV,
+ DISPATCH_CMD_ValidateProgramPipeline,
+ DISPATCH_CMD_VertexAttribs3dvNV,
+ DISPATCH_CMD_ProgramUniformMatrix2x4dv,
+ DISPATCH_CMD_ProgramUniform4iv,
+ DISPATCH_CMD_TexCoord2iv,
+ DISPATCH_CMD_TexImage2DMultisample,
+ DISPATCH_CMD_TexParameterx,
+ DISPATCH_CMD_Rotatef,
+ DISPATCH_CMD_TexParameterf,
+ DISPATCH_CMD_TexParameteri,
+ DISPATCH_CMD_VDPAUFiniNV,
+ DISPATCH_CMD_ProgramUniformMatrix4x2fv,
+ DISPATCH_CMD_ProgramUniform2f,
+ DISPATCH_CMD_ProgramUniform2d,
+ DISPATCH_CMD_ProgramUniform2i,
+ DISPATCH_CMD_Fogx,
+ DISPATCH_CMD_Uniform3ui64ARB,
+ DISPATCH_CMD_Fogf,
+ DISPATCH_CMD_ProgramUniform3ui64vARB,
+ DISPATCH_CMD_Color4usv,
+ DISPATCH_CMD_Fogi,
+ DISPATCH_CMD_DepthFunc,
+ DISPATCH_CMD_VertexArrayAttribLFormat,
+ DISPATCH_CMD_VertexAttribI4uiEXT,
+ DISPATCH_CMD_DrawElementsInstancedBaseVertexBaseInstance,
+ DISPATCH_CMD_ProgramEnvParameter4dvARB,
+ DISPATCH_CMD_CopyNamedBufferSubData,
+ DISPATCH_CMD_BindSampler,
+ DISPATCH_CMD_GetQueryBufferObjectuiv,
+ DISPATCH_CMD_MultiTexCoord2fARB,
+ DISPATCH_CMD_Uniform1ui64ARB,
+ DISPATCH_CMD_MultiTexCoord3iv,
+ DISPATCH_CMD_ClearStencil,
+ DISPATCH_CMD_ClearColorIiEXT,
+ DISPATCH_CMD_LoadMatrixd,
+ DISPATCH_CMD_VertexP4ui,
+ DISPATCH_CMD_TextureStorage3DMultisample,
+ DISPATCH_CMD_ReleaseShaderCompiler,
+ DISPATCH_CMD_BlendFuncSeparate,
+ DISPATCH_CMD_Color3us,
+ DISPATCH_CMD_LoadMatrixx,
+ DISPATCH_CMD_Color3ub,
+ DISPATCH_CMD_Color3ui,
+ DISPATCH_CMD_VertexAttrib4dvNV,
+ DISPATCH_CMD_AlphaFragmentOp2ATI,
+ DISPATCH_CMD_RasterPos4dv,
+ DISPATCH_CMD_LineWidthx,
+ DISPATCH_CMD_Indexdv,
+ DISPATCH_CMD_DepthMask,
+ DISPATCH_CMD_BindFragmentShaderATI,
+ DISPATCH_CMD_BlendFuncSeparateiARB,
+ DISPATCH_CMD_VertexPointer,
+ DISPATCH_CMD_ProgramLocalParameter4dvARB,
+ DISPATCH_CMD_UniformMatrix2dv,
+ DISPATCH_CMD_UniformMatrix3x2dv,
+ DISPATCH_CMD_WindowPos4fMESA,
+ DISPATCH_CMD_VertexAttribs2fvNV,
+ DISPATCH_CMD_VertexAttribP4ui,
+ DISPATCH_CMD_Uniform4i,
+ DISPATCH_CMD_Uniform4d,
+ DISPATCH_CMD_Uniform4f,
+ DISPATCH_CMD_ProgramUniform3dv,
+ DISPATCH_CMD_NamedFramebufferTexture,
+ DISPATCH_CMD_ProgramUniform3d,
+ DISPATCH_CMD_ProgramUniform3f,
+ DISPATCH_CMD_ProgramUniform3i,
+ DISPATCH_CMD_SecondaryColor3s,
+ DISPATCH_CMD_TexStorageMem2DEXT,
+ DISPATCH_CMD_UniformMatrix3x4dv,
+ DISPATCH_CMD_VertexAttrib3fNV,
+ DISPATCH_CMD_SecondaryColor3b,
+ DISPATCH_CMD_EnableClientState,
+ DISPATCH_CMD_SecondaryColor3i,
+ DISPATCH_CMD_FlushMappedBufferRange,
+ DISPATCH_CMD_TexStorageMem3DEXT,
+ DISPATCH_CMD_EndPerfMonitorAMD,
+ DISPATCH_CMD_VertexAttribs4dvNV,
+ DISPATCH_CMD_Uniform2i64vARB,
+ DISPATCH_CMD_Rectdv,
+ DISPATCH_CMD_DrawArraysInstancedARB,
+ DISPATCH_CMD_MakeImageHandleNonResidentARB,
+ DISPATCH_CMD_ImportMemoryFdEXT,
+ DISPATCH_CMD_TexStorageMem1DEXT,
+ DISPATCH_CMD_BlendBarrier,
+ DISPATCH_CMD_VertexAttrib2svNV,
+ DISPATCH_CMD_Disablei,
+ DISPATCH_CMD_Color3dv,
+ DISPATCH_CMD_ProgramUniform1ui64ARB,
+ DISPATCH_CMD_BeginQuery,
+ DISPATCH_CMD_PixelStoref,
+ DISPATCH_CMD_PixelStorei,
+ DISPATCH_CMD_VertexAttribs1svNV,
+ DISPATCH_CMD_DispatchComputeIndirect,
+ DISPATCH_CMD_InvalidateBufferData,
+ DISPATCH_CMD_Uniform1ui64vARB,
+ DISPATCH_CMD_VertexAttrib1svNV,
+ DISPATCH_CMD_SecondaryColor3ubv,
+ DISPATCH_CMD_Uniform4ui64ARB,
+ DISPATCH_CMD_RasterPos3fv,
+ DISPATCH_CMD_BindProgramARB,
+ DISPATCH_CMD_VertexAttrib3sNV,
+ DISPATCH_CMD_ColorFragmentOp1ATI,
+ DISPATCH_CMD_ProgramUniformMatrix4x3fv,
+ DISPATCH_CMD_PopClientAttrib,
+ DISPATCH_CMD_DrawElementsInstancedARB,
+ DISPATCH_CMD_DisableVertexArrayAttrib,
+ DISPATCH_CMD_VertexAttribL4d,
+ DISPATCH_CMD_ListBase,
+ DISPATCH_CMD_GenerateMipmap,
+ DISPATCH_CMD_BindBufferRange,
+ DISPATCH_CMD_ProgramUniformMatrix2x4fv,
+ DISPATCH_CMD_BindBufferBase,
+ DISPATCH_CMD_VertexAttrib2s,
+ DISPATCH_CMD_SecondaryColor3fvEXT,
+ DISPATCH_CMD_VertexAttrib2d,
+ DISPATCH_CMD_Uniform1fv,
+ DISPATCH_CMD_DepthBoundsEXT,
+ DISPATCH_CMD_BufferStorageMemEXT,
+ DISPATCH_CMD_WindowPos3fv,
+ DISPATCH_CMD_NamedRenderbufferStorage,
+ DISPATCH_CMD_BindRenderbuffer,
+ DISPATCH_CMD_SecondaryColor3fEXT,
+ DISPATCH_CMD_PrimitiveRestartIndex,
+ DISPATCH_CMD_TextureStorageMem3DEXT,
+ DISPATCH_CMD_ActiveStencilFaceEXT,
+ DISPATCH_CMD_VertexAttrib4dNV,
+ DISPATCH_CMD_DepthRange,
+ DISPATCH_CMD_VertexAttrib4fNV,
+ DISPATCH_CMD_Uniform4fv,
+ DISPATCH_CMD_Frustumf,
+ DISPATCH_CMD_GetQueryBufferObjectui64v,
+ DISPATCH_CMD_ProgramUniform2uiv,
+ DISPATCH_CMD_Rectsv,
+ DISPATCH_CMD_Frustumx,
+ DISPATCH_CMD_CullFace,
+ DISPATCH_CMD_BindTexture,
+ DISPATCH_CMD_MultiTexCoord4fARB,
+ DISPATCH_CMD_Uniform2ui64ARB,
+ DISPATCH_CMD_BeginPerfQueryINTEL,
+ DISPATCH_CMD_NormalPointer,
+ DISPATCH_CMD_WindowPos4iMESA,
+ DISPATCH_CMD_VertexAttrib4bv,
+ DISPATCH_CMD_SecondaryColor3usv,
+ DISPATCH_CMD_Indexfv,
+ DISPATCH_CMD_AlphaFragmentOp1ATI,
+ DISPATCH_CMD_ProgramUniform2dv,
+ DISPATCH_CMD_MultiTexCoord3i,
+ DISPATCH_CMD_ProgramUniform1fv,
+ DISPATCH_CMD_MultiTexCoord3d,
+ DISPATCH_CMD_TexCoord3sv,
+ DISPATCH_CMD_Minmax,
+ DISPATCH_CMD_MultiTexCoord3s,
+ DISPATCH_CMD_Vertex4iv,
+ DISPATCH_CMD_BufferSubData,
+ DISPATCH_CMD_TexCoord4dv,
+ DISPATCH_CMD_Begin,
+ DISPATCH_CMD_LightModeli,
+ DISPATCH_CMD_UniformMatrix2fv,
+ DISPATCH_CMD_LightModelf,
+ DISPATCH_CMD_TextureStorage1D,
+ DISPATCH_CMD_MultiTexCoord2fvARB,
+ DISPATCH_CMD_VertexAttrib4ubv,
+ DISPATCH_CMD_ColorMask,
+ DISPATCH_CMD_MultiTexCoord4x,
+ DISPATCH_CMD_UniformHandleui64ARB,
+ DISPATCH_CMD_VertexAttribs4svNV,
+ DISPATCH_CMD_DrawElementsInstancedBaseInstance,
+ DISPATCH_CMD_UniformMatrix4fv,
+ DISPATCH_CMD_UniformMatrix3x2fv,
+ DISPATCH_CMD_VertexAttrib4Nuiv,
+ DISPATCH_CMD_ClientActiveTexture,
+ DISPATCH_CMD_MultiTexCoord2sv,
+ DISPATCH_CMD_NamedFramebufferDrawBuffer,
+ DISPATCH_CMD_NamedFramebufferTextureLayer,
+ DISPATCH_CMD_LoadIdentity,
+ DISPATCH_CMD_ActiveShaderProgram,
+ DISPATCH_CMD_VertexAttrib4ubvNV,
+ DISPATCH_CMD_FogCoordfEXT,
+ DISPATCH_CMD_BindTransformFeedback,
+ DISPATCH_CMD_TextureBufferRange,
+ DISPATCH_CMD_VertexAttrib4svNV,
+ DISPATCH_CMD_PatchParameteri,
+ DISPATCH_CMD_VDPAUSurfaceAccessNV,
+ DISPATCH_CMD_EdgeFlagPointer,
+ DISPATCH_CMD_WindowPos2f,
+ DISPATCH_CMD_WindowPos2d,
+ DISPATCH_CMD_WindowPos2i,
+ DISPATCH_CMD_WindowPos2s,
+ DISPATCH_CMD_VertexAttribI1uiEXT,
+ DISPATCH_CMD_DeleteSync,
+ DISPATCH_CMD_SecondaryColor3dv,
+ DISPATCH_CMD_VertexAttrib3s,
+ DISPATCH_CMD_UniformMatrix4x3fv,
+ DISPATCH_CMD_VertexAttrib3d,
+ DISPATCH_CMD_VertexAttrib4Nbv,
+ DISPATCH_CMD_InvalidateTexImage,
+ DISPATCH_CMD_Uniform4ui,
+ DISPATCH_CMD_VertexArrayAttribFormat,
+ DISPATCH_CMD_VertexAttrib1fARB,
+ DISPATCH_CMD_DrawTexsOES,
+ DISPATCH_CMD_ProgramParameteri,
+ DISPATCH_CMD_Color3fv,
+ DISPATCH_CMD_MultiTexCoord2i,
+ DISPATCH_CMD_MultiTexCoord2d,
+ DISPATCH_CMD_MultiTexCoord2s,
+ DISPATCH_CMD_Indexub,
+ DISPATCH_CMD_PolygonOffsetEXT,
+ DISPATCH_CMD_Scalex,
+ DISPATCH_CMD_Scaled,
+ DISPATCH_CMD_Scalef,
+ DISPATCH_CMD_IndexPointerEXT,
+ DISPATCH_CMD_ColorFragmentOp2ATI,
+ DISPATCH_CMD_VertexAttrib2sNV,
+ DISPATCH_CMD_QueryCounter,
+ DISPATCH_CMD_NormalPointerEXT,
+ DISPATCH_CMD_ProgramUniform3iv,
+ DISPATCH_CMD_ProgramUniformMatrix2dv,
+ DISPATCH_CMD_DrawElementsBaseVertex,
+ DISPATCH_CMD_RasterPos3iv,
+ DISPATCH_CMD_ColorMaski,
+ DISPATCH_CMD_Uniform2uiv,
+ DISPATCH_CMD_RasterPos3s,
+ DISPATCH_CMD_RasterPos3d,
+ DISPATCH_CMD_RasterPos3f,
+ DISPATCH_CMD_BindVertexArray,
+ DISPATCH_CMD_RasterPos3i,
+ DISPATCH_CMD_DrawTransformFeedbackStreamInstanced,
+ DISPATCH_CMD_VertexAttrib2fvARB,
+ DISPATCH_CMD_ProgramUniformMatrix4x3dv,
+ DISPATCH_CMD_LoadName,
+ DISPATCH_CMD_ClearIndex,
+ DISPATCH_CMD_FlushMappedNamedBufferRange,
+ DISPATCH_CMD_MultiTexCoordP1ui,
+ DISPATCH_CMD_EvalMesh2,
+ DISPATCH_CMD_Vertex4fv,
+ DISPATCH_CMD_ProgramUniform4i64ARB,
+ DISPATCH_CMD_TextureStorage2D,
+ DISPATCH_CMD_BindFramebuffer,
+ DISPATCH_CMD_VertexAttribs3svNV,
+ DISPATCH_CMD_VertexAttrib2sv,
+ DISPATCH_CMD_Uniform1dv,
+ DISPATCH_CMD_TransformFeedbackBufferRange,
+ DISPATCH_CMD_PassThrough,
+ DISPATCH_CMD_VertexAttrib4fvARB,
+ DISPATCH_CMD_Uniform3i64vARB,
+ DISPATCH_CMD_TexGenxOES,
+ DISPATCH_CMD_VertexArrayAttribIFormat,
+ DISPATCH_CMD_StencilOp,
+ DISPATCH_CMD_ProgramUniform1iv,
+ DISPATCH_CMD_ProgramUniform3ui,
+ DISPATCH_CMD_SecondaryColor3sv,
+ DISPATCH_CMD_TexCoordP3ui,
+ DISPATCH_CMD_VertexArrayElementBuffer,
+ DISPATCH_CMD_Uniform3i64ARB,
+ DISPATCH_CMD_VertexAttribP1ui,
+ DISPATCH_CMD_DeleteLists,
+ DISPATCH_CMD_LogicOp,
+ DISPATCH_CMD_RenderbufferStorageMultisample,
+ DISPATCH_CMD_WindowPos3d,
+ DISPATCH_CMD_Enablei,
+ DISPATCH_CMD_WindowPos3f,
+ DISPATCH_CMD_RasterPos2sv,
+ DISPATCH_CMD_WindowPos3i,
+ DISPATCH_CMD_MultiTexCoord4iv,
+ DISPATCH_CMD_TexCoord1sv,
+ DISPATCH_CMD_WindowPos3s,
+ DISPATCH_CMD_Orthof,
+ DISPATCH_CMD_DeleteObjectARB,
+ DISPATCH_CMD_ProgramUniformMatrix2x3dv,
+ DISPATCH_CMD_Color4uiv,
+ DISPATCH_CMD_MultiTexCoord1sv,
+ DISPATCH_CMD_Orthox,
+ DISPATCH_CMD_PushAttrib,
+ DISPATCH_CMD_RasterPos2i,
+ DISPATCH_CMD_ClipPlane,
+ DISPATCH_CMD_RasterPos2f,
+ DISPATCH_CMD_RasterPos2d,
+ DISPATCH_CMD_MakeImageHandleResidentARB,
+ DISPATCH_CMD_InvalidateSubFramebuffer,
+ DISPATCH_CMD_Color4ub,
+ DISPATCH_CMD_UniformMatrix2x4dv,
+ DISPATCH_CMD_RasterPos2s,
+ DISPATCH_CMD_DispatchComputeGroupSizeARB,
+ DISPATCH_CMD_VertexArrayBindingDivisor,
+ DISPATCH_CMD_MultiTexCoord3dv,
+ DISPATCH_CMD_BindProgramPipeline,
+ DISPATCH_CMD_MultiTexCoord1i,
+ DISPATCH_CMD_DeletePerfQueryINTEL,
+ DISPATCH_CMD_MultiTexCoord1d,
+ DISPATCH_CMD_MultiTexCoord1s,
+ DISPATCH_CMD_BeginConditionalRender,
+ DISPATCH_CMD_CopyConvolutionFilter1D,
+ DISPATCH_CMD_ClearBufferfv,
+ DISPATCH_CMD_UniformMatrix4dv,
+ DISPATCH_CMD_ClearBufferfi,
+ DISPATCH_CMD_DeleteFragmentShaderATI,
+ DISPATCH_CMD_DrawElementsInstancedBaseVertex,
+ DISPATCH_CMD_DisableClientState,
+ DISPATCH_CMD_TexGeni,
+ DISPATCH_CMD_TexGenf,
+ DISPATCH_CMD_TexGend,
+ DISPATCH_CMD_ProgramUniform4i64vARB,
+ DISPATCH_CMD_Color4sv,
+ DISPATCH_CMD_PixelZoom,
+ DISPATCH_CMD_ProgramEnvParameter4dARB,
+ DISPATCH_CMD_ProgramUniform3uiv,
+ DISPATCH_CMD_IndexPointer,
+ DISPATCH_CMD_VertexAttrib4sNV,
+ DISPATCH_CMD_Uniform3ui64vARB,
+ DISPATCH_CMD_BufferPageCommitmentARB,
+ DISPATCH_CMD_ColorP4ui,
+ DISPATCH_CMD_TextureStorage3D,
+ DISPATCH_CMD_TextureStorageMem2DMultisampleEXT,
+ DISPATCH_CMD_Uniform1iv,
+ DISPATCH_CMD_Uniform4uiv,
+ DISPATCH_CMD_PopDebugGroup,
+ DISPATCH_CMD_VertexAttrib1d,
+ DISPATCH_CMD_NamedBufferSubData,
+ DISPATCH_CMD_TexBufferRange,
+ DISPATCH_CMD_VertexAttrib1s,
+ DISPATCH_CMD_UniformMatrix4x3dv,
+ DISPATCH_CMD_TransformFeedbackBufferBase,
+ DISPATCH_CMD_FogCoordfvEXT,
+ DISPATCH_CMD_Uniform2ui64vARB,
+ DISPATCH_CMD_MultiTexCoord3fARB,
+ DISPATCH_CMD_Vertex2sv,
+ DISPATCH_CMD_VertexAttrib2dNV,
+ DISPATCH_CMD_VertexAttrib3svNV,
+ DISPATCH_CMD_ViewportArrayv,
+ DISPATCH_CMD_ArrayElement,
+ DISPATCH_CMD_RasterPos2dv,
+ DISPATCH_CMD_EndQuery,
+ DISPATCH_CMD_TexCoord1dv,
+ DISPATCH_CMD_AlphaFragmentOp3ATI,
+ DISPATCH_CMD_Clear,
+ DISPATCH_CMD_VertexAttrib4sv,
+ DISPATCH_CMD_Ortho,
+ DISPATCH_CMD_Uniform3uiv,
+ DISPATCH_CMD_EndQueryIndexed,
+ DISPATCH_CMD_MultiDrawArraysIndirectCountARB,
+ DISPATCH_CMD_ProgramUniformMatrix2fv,
+ DISPATCH_CMD_ProgramLocalParameter4fvARB,
+ DISPATCH_CMD_Uniform4dv,
+ DISPATCH_CMD_LightModelx,
+ DISPATCH_CMD_VertexAttribI3iEXT,
+ DISPATCH_CMD_ClearColorx,
+ DISPATCH_CMD_EndTransformFeedback,
+ DISPATCH_CMD_ViewportIndexedfv,
+ DISPATCH_CMD_BindTextureUnit,
+ DISPATCH_CMD_CallList,
+ DISPATCH_CMD_DeleteProgram,
+ DISPATCH_CMD_ClearDepthf,
+ DISPATCH_CMD_Uniform2iv,
+ DISPATCH_CMD_SampleCoveragex,
+ DISPATCH_CMD_DeleteFramebuffers,
+ DISPATCH_CMD_VertexAttrib4uiv,
+ DISPATCH_CMD_VertexAttrib4Nsv,
+ DISPATCH_CMD_Vertex4s,
+ DISPATCH_CMD_VertexAttribI2iEXT,
+ DISPATCH_CMD_Vertex4f,
+ DISPATCH_CMD_Vertex4d,
+ DISPATCH_CMD_Vertex4i,
+ DISPATCH_CMD_MemoryBarrierByRegion,
+ DISPATCH_CMD_StencilFuncSeparateATI,
+ DISPATCH_CMD_Vertex4dv,
+ DISPATCH_CMD_StencilMask,
+ DISPATCH_CMD_NamedFramebufferReadBuffer,
+ DISPATCH_CMD_ProgramUniformHandleui64ARB,
+ DISPATCH_CMD_ProgramUniform2i64ARB,
+ DISPATCH_CMD_ClearBufferiv,
+ DISPATCH_CMD_ProgramUniform2iv,
+ DISPATCH_CMD_FogCoordPointer,
+ DISPATCH_CMD_SecondaryColor3us,
+ DISPATCH_CMD_TextureStorageMem1DEXT,
+ DISPATCH_CMD_SecondaryColor3ub,
+ DISPATCH_CMD_NamedBufferStorageMemEXT,
+ DISPATCH_CMD_SecondaryColor3ui,
+ DISPATCH_CMD_ProgramUniform4ui64ARB,
+ DISPATCH_CMD_VertexAttrib1sNV,
+ DISPATCH_CMD_TextureBuffer,
+ DISPATCH_CMD_InitNames,
+ DISPATCH_CMD_Normal3sv,
+ DISPATCH_CMD_DeleteQueries,
+ DISPATCH_CMD_InvalidateFramebuffer,
+ DISPATCH_CMD_Hint,
+ DISPATCH_CMD_MemoryBarrier,
+ DISPATCH_CMD_CopyColorSubTable,
+ DISPATCH_CMD_DrawTexsvOES,
+ DISPATCH_CMD_Disable,
+ DISPATCH_CMD_ClearColor,
+ DISPATCH_CMD_RasterPos4iv,
+ DISPATCH_CMD_ProgramUniformMatrix2x3fv,
+ DISPATCH_CMD_BindVertexBuffer,
+ DISPATCH_CMD_RasterPos4i,
+ DISPATCH_CMD_RasterPos4d,
+ DISPATCH_CMD_RasterPos4f,
+ DISPATCH_CMD_RasterPos3dv,
+ DISPATCH_CMD_TexCoord1iv,
+ DISPATCH_CMD_RasterPos4s,
+ DISPATCH_CMD_VertexAttrib3dv,
+ DISPATCH_CMD_Histogram,
+ DISPATCH_CMD_Uniform2fv,
+ DISPATCH_CMD_ProgramUniformMatrix3x4dv,
+ DISPATCH_CMD_DrawBuffers,
+ DISPATCH_CMD_VertexAttribL1ui64ARB,
+ DISPATCH_CMD_Color3uiv,
+ DISPATCH_CMD_EvalCoord2fv,
+ DISPATCH_CMD_TextureStorage3DEXT,
+ DISPATCH_CMD_VertexAttrib2fARB,
+ DISPATCH_CMD_BeginPerfMonitorAMD,
+ DISPATCH_CMD_Normal3bv,
+ DISPATCH_CMD_BeginQueryIndexed,
+ DISPATCH_CMD_Vertex3iv,
+ DISPATCH_CMD_UniformMatrix2x3dv,
+ DISPATCH_CMD_TexCoord3dv,
+ DISPATCH_CMD_VertexP3ui,
+ DISPATCH_CMD_UniformMatrix3fv,
+ DISPATCH_CMD_PrioritizeTextures,
+ DISPATCH_CMD_VertexAttribI3uiEXT,
+ DISPATCH_CMD_ProgramUniform1i64ARB,
+ DISPATCH_CMD_SecondaryColor3uiv,
+ DISPATCH_CMD_EndConditionalRender,
+ DISPATCH_CMD_ProgramLocalParameter4dARB,
+ DISPATCH_CMD_Color3sv,
+ DISPATCH_CMD_BlendEquationSeparateiARB,
+ DISPATCH_CMD_MultiTexCoord1fvARB,
+ DISPATCH_CMD_TexStorage2D,
+ DISPATCH_CMD_FramebufferTexture2D,
+ DISPATCH_CMD_VertexAttrib2dv,
+ DISPATCH_CMD_Vertex4sv,
+ DISPATCH_CMD_ClampColor,
+ DISPATCH_CMD_Uniform1i64ARB,
+ DISPATCH_CMD_AlphaFunc,
+ DISPATCH_CMD_EdgeFlag,
+ DISPATCH_CMD_EdgeFlagv,
+ DISPATCH_CMD_DepthRangex,
+ DISPATCH_CMD_DepthRangef,
+ DISPATCH_CMD_ColorFragmentOp3ATI,
+ DISPATCH_CMD_ValidateProgram,
+ DISPATCH_CMD_VertexPointerEXT,
+ DISPATCH_CMD_Scissor,
+ DISPATCH_CMD_BeginTransformFeedback,
+ DISPATCH_CMD_TexCoord2i,
+ DISPATCH_CMD_VertexArrayAttribBinding,
+ DISPATCH_CMD_Color4ui,
+ DISPATCH_CMD_TexCoord2f,
+ DISPATCH_CMD_TexCoord2d,
+ DISPATCH_CMD_TexCoord2s,
+ DISPATCH_CMD_Color4us,
+ DISPATCH_CMD_Color3bv,
+ DISPATCH_CMD_PrimitiveRestartNV,
+ DISPATCH_CMD_BindBufferOffsetEXT,
+ DISPATCH_CMD_ProvokingVertex,
+ DISPATCH_CMD_VertexAttribs4fvNV,
+ DISPATCH_CMD_Vertex2i,
+ DISPATCH_CMD_GetQueryBufferObjecti64v,
+ DISPATCH_CMD_RasterPos2fv,
+ DISPATCH_CMD_TexCoord1fv,
+ DISPATCH_CMD_MultiTexCoord4dv,
+ DISPATCH_CMD_ProgramEnvParameter4fvARB,
+ DISPATCH_CMD_RasterPos4fv,
+ DISPATCH_CMD_PushMatrix,
+ DISPATCH_CMD_EndList,
+ DISPATCH_CMD_DrawRangeElements,
+ DISPATCH_CMD_DrawTexfvOES,
+ DISPATCH_CMD_BlendFunciARB,
+ DISPATCH_CMD_ClearNamedFramebufferfi,
+ DISPATCH_CMD_Uniform2ui,
+ DISPATCH_CMD_ScissorIndexed,
+ DISPATCH_CMD_End,
+ DISPATCH_CMD_NamedFramebufferParameteri,
+ DISPATCH_CMD_Enable,
+ DISPATCH_CMD_Normal3x,
+ DISPATCH_CMD_VertexAttrib4fARB,
+ DISPATCH_CMD_TexCoord4fv,
+ DISPATCH_CMD_InvalidateTexSubImage,
+ DISPATCH_CMD_Normal3s,
+ DISPATCH_CMD_Normal3i,
+ DISPATCH_CMD_Normal3b,
+ DISPATCH_CMD_Normal3d,
+ DISPATCH_CMD_Normal3f,
+ DISPATCH_CMD_Indexi,
+ DISPATCH_CMD_Uniform1uiv,
+ DISPATCH_CMD_VertexAttribI2uiEXT,
+ DISPATCH_CMD_Indexf,
+ DISPATCH_CMD_Indexd,
+ DISPATCH_CMD_Indexs,
+ DISPATCH_CMD_Vertex2d,
+ DISPATCH_CMD_Vertex2f,
+ DISPATCH_CMD_Color4bv,
+ DISPATCH_CMD_ProgramUniformMatrix3x2dv,
+ DISPATCH_CMD_VertexAttrib2fvNV,
+ DISPATCH_CMD_Vertex2s,
+ DISPATCH_CMD_ActiveTexture,
+ DISPATCH_CMD_DrawTexxOES,
+ DISPATCH_CMD_MultiTexCoordP3ui,
+ DISPATCH_CMD_DrawBuffer,
+ DISPATCH_CMD_MultiTexCoord2dv,
+ DISPATCH_CMD_BlendFunc,
+ DISPATCH_CMD_NamedRenderbufferStorageMultisample,
+ DISPATCH_CMD_ColorMaterial,
+ DISPATCH_CMD_RasterPos3sv,
+ DISPATCH_CMD_TexCoordP2ui,
+ DISPATCH_CMD_VertexAttrib3fvARB,
+ DISPATCH_CMD_ProgramUniformMatrix3x4fv,
+ DISPATCH_CMD_TexCoord3i,
+ DISPATCH_CMD_CopyColorTable,
+ DISPATCH_CMD_Frustum,
+ DISPATCH_CMD_TexCoord3d,
+ DISPATCH_CMD_TexCoord3f,
+ DISPATCH_CMD_DepthRangeArrayv,
+ DISPATCH_CMD_DeleteTextures,
+ DISPATCH_CMD_TexCoordPointerEXT,
+ DISPATCH_CMD_TexCoord3s,
+ DISPATCH_CMD_ClearAccum,
+ DISPATCH_CMD_TexCoord4iv,
+ DISPATCH_CMD_TexStorage3D,
+ DISPATCH_CMD_Uniform2i64ARB,
+ DISPATCH_CMD_FramebufferTexture3D,
+ DISPATCH_CMD_VertexAttrib2fNV,
+ DISPATCH_CMD_CopyTexImage2D,
+ DISPATCH_CMD_Vertex3fv,
+ DISPATCH_CMD_ProgramUniform2i64vARB,
+ DISPATCH_CMD_MultiTexCoordP2ui,
+ DISPATCH_CMD_VertexAttribs1dvNV,
+ DISPATCH_CMD_ImportSemaphoreFdEXT,
+ DISPATCH_CMD_EdgeFlagPointerEXT,
+ DISPATCH_CMD_VertexAttribs2svNV,
+ DISPATCH_CMD_BlendEquationiARB,
+ DISPATCH_CMD_PointSizex,
+ DISPATCH_CMD_PolygonMode,
+ DISPATCH_CMD_SecondaryColor3iv,
+ DISPATCH_CMD_VertexAttribI1iEXT,
+ DISPATCH_CMD_VertexAttrib4Niv,
+ DISPATCH_CMD_LinkProgram,
+ DISPATCH_CMD_ProgramUniform4d,
+ DISPATCH_CMD_ProgramUniform4f,
+ DISPATCH_CMD_ProgramUniform4i,
+ DISPATCH_CMD_VertexAttrib4d,
+ DISPATCH_CMD_ProgramUniform4ui64vARB,
+ DISPATCH_CMD_WindowPos4sMESA,
+ DISPATCH_CMD_VertexAttrib4s,
+ DISPATCH_CMD_ProgramUniform1i64vARB,
+ DISPATCH_CMD_VertexAttrib1dvNV,
+ DISPATCH_CMD_TexStorage3DMultisample,
+ DISPATCH_CMD_ScissorIndexedv,
+ DISPATCH_CMD_Uniform2dv,
+ DISPATCH_CMD_VertexAttrib4dv,
+ DISPATCH_CMD_EvalCoord2dv,
+ DISPATCH_CMD_VertexAttrib1fNV,
+ DISPATCH_CMD_RasterPos2iv,
+ DISPATCH_CMD_FrontFace,
+ DISPATCH_CMD_Normal3dv,
+ DISPATCH_CMD_Lightf,
+ DISPATCH_CMD_MatrixMode,
+ DISPATCH_CMD_Lighti,
+ DISPATCH_CMD_Lightx,
+ DISPATCH_CMD_ProgramUniform3fv,
+ DISPATCH_CMD_MultMatrixd,
+ DISPATCH_CMD_MultMatrixf,
+ DISPATCH_CMD_Uniform4ui64vARB,
+ DISPATCH_CMD_MultiTexCoord4fvARB,
+ DISPATCH_CMD_UniformMatrix2x3fv,
+ DISPATCH_CMD_SamplerParameterf,
+ DISPATCH_CMD_UniformMatrix3dv,
+ DISPATCH_CMD_PointParameterx,
+ DISPATCH_CMD_DrawArrays,
+ DISPATCH_CMD_Uniform3dv,
+ DISPATCH_CMD_PointParameteri,
+ DISPATCH_CMD_PointParameterf,
+ DISPATCH_CMD_VertexAttribBinding,
+ DISPATCH_CMD_ProgramUniform1dv,
+ DISPATCH_CMD_DeleteBuffers,
+ DISPATCH_CMD_VertexAttribP2ui,
+ DISPATCH_CMD_ProgramUniform4dv,
+ DISPATCH_CMD_DrawTexivOES,
+ DISPATCH_CMD_CopyTexImage1D,
+ DISPATCH_CMD_VertexAttribFormat,
+ DISPATCH_CMD_Vertex3i,
+ DISPATCH_CMD_Vertex3f,
+ DISPATCH_CMD_Vertex3d,
+ DISPATCH_CMD_ReadBuffer,
+ DISPATCH_CMD_ConvolutionParameteri,
+ DISPATCH_CMD_Vertex3s,
+ DISPATCH_CMD_ConvolutionParameterf,
+ DISPATCH_CMD_TexCoord3fv,
+ DISPATCH_CMD_TextureBarrierNV,
+ DISPATCH_CMD_ProgramLocalParameter4fARB,
+ DISPATCH_CMD_PauseTransformFeedback,
+ DISPATCH_CMD_DeleteShader,
+ DISPATCH_CMD_NamedFramebufferRenderbuffer,
+ DISPATCH_CMD_CompileShader,
+ DISPATCH_CMD_Vertex2iv,
+ DISPATCH_CMD_ResetMinmax,
+ DISPATCH_CMD_SampleCoverage,
+ DISPATCH_CMD_GenerateTextureMipmap,
+ DISPATCH_CMD_DeleteProgramsARB,
+ DISPATCH_CMD_ShadeModel,
+ DISPATCH_CMD_DispatchCompute,
+ DISPATCH_CMD_UseProgramStages,
+ DISPATCH_CMD_ProgramUniformMatrix4fv,
+ DISPATCH_CMD_FramebufferRenderbuffer,
+ DISPATCH_CMD_ProgramStringARB,
+ DISPATCH_CMD_CopyTextureSubImage2D,
+ DISPATCH_CMD_MultiTexCoord4s,
+ DISPATCH_CMD_ViewportIndexedf,
+ DISPATCH_CMD_MultiTexCoord4i,
+ DISPATCH_CMD_DebugMessageControl,
+ DISPATCH_CMD_MultiTexCoord4d,
+ DISPATCH_CMD_Translatex,
+ DISPATCH_CMD_MultiDrawElementsIndirectCountARB,
+ DISPATCH_CMD_Indexsv,
+ DISPATCH_CMD_VertexAttrib1fvARB,
+ DISPATCH_CMD_TexCoord2dv,
+ DISPATCH_CMD_Translated,
+ DISPATCH_CMD_Translatef,
+ DISPATCH_CMD_ProgramUniform4uiv,
+ DISPATCH_CMD_MultiTexCoord1fARB,
+ DISPATCH_CMD_SecondaryColor3d,
+ DISPATCH_CMD_FramebufferParameteri,
+ DISPATCH_CMD_VertexAttribs4ubvNV,
+ DISPATCH_CMD_CopyTexSubImage1D,
+ DISPATCH_CMD_StencilFunc,
+ DISPATCH_CMD_CopyPixels,
+ DISPATCH_CMD_VertexAttrib4Nubv,
+ DISPATCH_CMD_UniformMatrix4x2dv,
+ DISPATCH_CMD_VertexAttribPointer,
+ DISPATCH_CMD_IndexMask,
+ DISPATCH_CMD_VertexAttribIFormat,
+ DISPATCH_CMD_DrawArraysInstancedBaseInstance,
+ DISPATCH_CMD_TextureStorageMem3DMultisampleEXT,
+ DISPATCH_CMD_PopAttrib,
+ DISPATCH_CMD_Uniform3ui,
+ DISPATCH_CMD_Color4dv,
+ DISPATCH_CMD_DisableVertexAttribArray,
+ DISPATCH_CMD_ProgramUniformMatrix3x2fv,
+ DISPATCH_CMD_ClipPlanex,
+ DISPATCH_CMD_ClipPlanef,
+ DISPATCH_CMD_ProgramUniform1ui,
+ DISPATCH_CMD_SecondaryColorPointer,
+ DISPATCH_CMD_LineStipple,
+ DISPATCH_CMD_BeginFragmentShaderATI,
+ DISPATCH_CMD_TextureStorageMem2DEXT,
+ DISPATCH_CMD_WaitSync,
+ DISPATCH_CMD_Uniform1i64vARB,
+ DISPATCH_CMD_NewList,
+ DISPATCH_CMD_TexBuffer,
+ DISPATCH_CMD_TexCoord4sv,
+ DISPATCH_CMD_TexCoord1f,
+ DISPATCH_CMD_TexCoord1d,
+ DISPATCH_CMD_TexCoord1i,
+ DISPATCH_CMD_TexCoord1s,
+ DISPATCH_CMD_Uniform1ui,
+ DISPATCH_CMD_TexStorage1D,
+ DISPATCH_CMD_BlitFramebuffer,
+ DISPATCH_CMD_TextureParameterf,
+ DISPATCH_CMD_FramebufferTexture1D,
+ DISPATCH_CMD_TextureParameteri,
+ DISPATCH_CMD_TexCoordP4ui,
+ DISPATCH_CMD_VertexAttrib1sv,
+ DISPATCH_CMD_WindowPos4dMESA,
+ DISPATCH_CMD_Vertex3dv,
+ DISPATCH_CMD_VertexAttribL2d,
+ DISPATCH_CMD_BlendColor,
+ DISPATCH_CMD_VertexAttribs2dvNV,
+ DISPATCH_CMD_VertexAttrib2dvNV,
+ DISPATCH_CMD_ResetHistogram,
+ DISPATCH_CMD_TexCoord2sv,
+ DISPATCH_CMD_StencilMaskSeparate,
+ DISPATCH_CMD_MultiTexCoord3sv,
+ DISPATCH_CMD_TexCoord3iv,
+ DISPATCH_CMD_MultiTexCoord4sv,
+ DISPATCH_CMD_VertexBindingDivisor,
+ DISPATCH_CMD_PrimitiveBoundingBox,
+ DISPATCH_CMD_UniformBlockBinding,
+ DISPATCH_CMD_VertexAttrib4Nusv,
+ DISPATCH_CMD_VertexP2ui,
+ DISPATCH_CMD_ProgramUniform2fv,
+ DISPATCH_CMD_TextureStorage2DEXT,
+ DISPATCH_CMD_DrawTransformFeedbackInstanced,
+ DISPATCH_CMD_CopyTextureSubImage1D,
+ DISPATCH_CMD_ResumeTransformFeedback,
+ DISPATCH_CMD_Vertex2dv,
+ DISPATCH_CMD_SampleMaski,
+ DISPATCH_CMD_MultiTexCoord2iv,
+ DISPATCH_CMD_DrawTransformFeedback,
+ DISPATCH_CMD_VertexAttribs3fvNV,
+ DISPATCH_CMD_ProgramUniform2ui64vARB,
+ DISPATCH_CMD_MapGrid2d,
+ DISPATCH_CMD_MapGrid2f,
+ DISPATCH_CMD_SampleMapATI,
+ DISPATCH_CMD_Color3usv,
+ DISPATCH_CMD_CopyImageSubData,
+ DISPATCH_CMD_StencilOpSeparate,
+ DISPATCH_CMD_ClipControl,
+ DISPATCH_CMD_DrawTexfOES,
+ DISPATCH_CMD_Uniform4i64vARB,
+ DISPATCH_CMD_AttachObjectARB,
+ DISPATCH_CMD_Accum,
+ DISPATCH_CMD_Color4x,
+ DISPATCH_CMD_Color4s,
+ DISPATCH_CMD_EnableVertexAttribArray,
+ DISPATCH_CMD_Color4i,
+ DISPATCH_CMD_Color4f,
+ DISPATCH_CMD_ShaderStorageBlockBinding,
+ DISPATCH_CMD_Color4d,
+ DISPATCH_CMD_Color4b,
+ DISPATCH_CMD_EvalCoord1fv,
+ DISPATCH_CMD_VertexAttribLFormat,
+ DISPATCH_CMD_VertexAttribL3d,
+ DISPATCH_CMD_StencilFuncSeparate,
+ DISPATCH_CMD_ShaderSource,
+ DISPATCH_CMD_Normal3fv,
+ DISPATCH_CMD_NormalP3ui,
+ DISPATCH_CMD_MultiTexCoord3fvARB,
+ DISPATCH_CMD_BufferData,
+ DISPATCH_CMD_Uniform3fv,
+ DISPATCH_CMD_BlendEquation,
+ DISPATCH_CMD_VertexAttrib3dNV,
+ DISPATCH_CMD_PushName,
+ DISPATCH_CMD_DeleteRenderbuffers,
+ DISPATCH_CMD_VertexAttrib1dv,
+ DISPATCH_CMD_Rotated,
+ DISPATCH_CMD_Color4iv,
+ DISPATCH_CMD_Rotatex,
+ DISPATCH_CMD_FramebufferTextureLayer,
+ DISPATCH_CMD_ProgramUniformMatrix3fv,
+ DISPATCH_CMD_LoadMatrixf,
+ DISPATCH_CMD_MakeTextureHandleResidentARB,
+ DISPATCH_CMD_DrawRangeElementsBaseVertex,
+ DISPATCH_CMD_ProgramUniformMatrix4dv,
+ DISPATCH_CMD_SecondaryColor3bv,
+ DISPATCH_CMD_DrawTexxvOES,
+ DISPATCH_CMD_Color4ubv,
+ DISPATCH_CMD_TexCoord2fv,
+ DISPATCH_CMD_FogCoorddv,
+ DISPATCH_CMD_VDPAUUnregisterSurfaceNV,
+ DISPATCH_CMD_ColorP3ui,
+ DISPATCH_CMD_ClearBufferuiv,
+ DISPATCH_CMD_Flush,
+ DISPATCH_CMD_MakeTextureHandleNonResidentARB,
+ DISPATCH_CMD_VertexAttribI4iEXT,
+ DISPATCH_CMD_FogCoordd,
+ DISPATCH_CMD_BindFramebufferEXT,
+ DISPATCH_CMD_Uniform3iv,
+ DISPATCH_CMD_TexStorage2DMultisample,
+ DISPATCH_CMD_UnlockArraysEXT,
+ DISPATCH_CMD_VertexAttrib4iv,
+ DISPATCH_CMD_CopyTexSubImage3D,
+ DISPATCH_CMD_PolygonOffsetClampEXT,
+ DISPATCH_CMD_DetachObjectARB,
+ DISPATCH_CMD_Indexiv,
+ DISPATCH_CMD_TexEnvi,
+ DISPATCH_CMD_TexEnvf,
+ DISPATCH_CMD_TexEnvx,
+ DISPATCH_CMD_InvalidateBufferSubData,
+ DISPATCH_CMD_UniformMatrix4x2fv,
+ DISPATCH_CMD_PolygonOffset,
+ DISPATCH_CMD_ProgramUniformMatrix4x2dv,
+ DISPATCH_CMD_ProgramEnvParameter4fARB,
+ DISPATCH_CMD_ClearDepth,
+ DISPATCH_CMD_VertexAttrib3dvNV,
+ DISPATCH_CMD_Color4fv,
+ DISPATCH_CMD_ColorPointer,
+ DISPATCH_CMD_ProgramUniform2ui64ARB,
+ DISPATCH_CMD_VertexAttrib3sv,
+ DISPATCH_CMD_Uniform4i64ARB,
+ DISPATCH_CMD_ProgramUniform3ui64ARB,
+ DISPATCH_CMD_PushClientAttrib,
+ DISPATCH_CMD_ProgramUniform4ui,
+ DISPATCH_CMD_Uniform1f,
+ DISPATCH_CMD_Uniform1d,
+ DISPATCH_CMD_Uniform1i,
+ DISPATCH_CMD_BlitNamedFramebuffer,
+ DISPATCH_CMD_UseProgram,
+ DISPATCH_CMD_TexStorageMem2DMultisampleEXT,
+ DISPATCH_CMD_Color3s,
+ DISPATCH_CMD_TextureStorage2DMultisample,
+ DISPATCH_CMD_TexCoordPointer,
+ DISPATCH_CMD_Color3i,
+ DISPATCH_CMD_EvalCoord2d,
+ DISPATCH_CMD_EvalCoord2f,
+ DISPATCH_CMD_Color3b,
+ DISPATCH_CMD_Color3f,
+ DISPATCH_CMD_Color3d,
+ DISPATCH_CMD_ClearDepthx,
+ DISPATCH_CMD_EnableVertexArrayAttrib,
+ DISPATCH_CMD_BlendEquationSeparate,
+ DISPATCH_CMD_MultiTexCoordP4ui,
+ DISPATCH_CMD_VertexAttribs1fvNV,
+ DISPATCH_CMD_VertexAttribIPointer,
+ DISPATCH_CMD_ProgramUniform4fv,
+ DISPATCH_CMD_RasterPos4sv,
+ DISPATCH_CMD_CopyTextureSubImage3D,
+ DISPATCH_CMD_TextureView,
+ DISPATCH_CMD_VertexAttribDivisor,
+ DISPATCH_CMD_DrawTransformFeedbackStream,
+ DISPATCH_CMD_EndPerfQueryINTEL,
+ DISPATCH_CMD_NamedBufferPageCommitmentARB,
+ DISPATCH_CMD_AlphaFuncx,
+ DISPATCH_CMD_VertexArrayVertexBuffer,
+ DISPATCH_CMD_PixelTransferf,
+ DISPATCH_CMD_PixelTransferi,
+ DISPATCH_CMD_VertexAttrib3fvNV,
+ DISPATCH_CMD_SecondaryColorP3ui,
+ DISPATCH_CMD_VertexAttrib4fvNV,
+ DISPATCH_CMD_Rectiv,
+ DISPATCH_CMD_MultiTexCoord1iv,
+ DISPATCH_CMD_PassTexCoordATI,
+ DISPATCH_CMD_Vertex2fv,
+ DISPATCH_CMD_BindRenderbufferEXT,
+ DISPATCH_CMD_Vertex3sv,
+ DISPATCH_CMD_EvalMesh1,
+ DISPATCH_CMD_DiscardFramebufferEXT,
+ DISPATCH_CMD_Uniform2f,
+ DISPATCH_CMD_Uniform2d,
+ DISPATCH_CMD_ColorPointerEXT,
+ DISPATCH_CMD_LineWidth,
+ DISPATCH_CMD_Uniform2i,
+ DISPATCH_CMD_DepthRangeIndexed,
+ DISPATCH_CMD_TexImage3DMultisample,
+ DISPATCH_CMD_VertexAttrib1fvNV,
+ DISPATCH_CMD_DetachShader,
+ DISPATCH_CMD_CopyTexSubImage2D,
+ DISPATCH_CMD_Color3iv,
+ DISPATCH_CMD_DrawElements,
+ DISPATCH_CMD_ScissorArrayv,
+ DISPATCH_CMD_EvalPoint2,
+ DISPATCH_CMD_EvalPoint1,
+ DISPATCH_CMD_PopMatrix,
+ DISPATCH_CMD_NamedBufferData,
+ DISPATCH_CMD_EvalCoord1d,
+ DISPATCH_CMD_VertexAttribL1d,
+ DISPATCH_CMD_EvalCoord1f,
+ DISPATCH_CMD_Materialf,
+ DISPATCH_CMD_Materiali,
+ DISPATCH_CMD_ProgramUniform1uiv,
+ DISPATCH_CMD_EvalCoord1dv,
+ DISPATCH_CMD_Materialx,
+ DISPATCH_CMD_GetQueryBufferObjectiv,
+ DISPATCH_CMD_ProgramUniform3i64ARB,
+ DISPATCH_CMD_BindBuffer,
+ DISPATCH_CMD_ProgramUniform1i,
+ DISPATCH_CMD_ProgramUniform1f,
+ DISPATCH_CMD_ProgramUniform1d,
+ DISPATCH_CMD_CopyConvolutionFilter2D,
+ DISPATCH_CMD_CopyBufferSubData,
+ DISPATCH_CMD_UniformMatrix3x4fv,
+ DISPATCH_CMD_Recti,
+ DISPATCH_CMD_SamplerParameteri,
+ DISPATCH_CMD_Rectf,
+ DISPATCH_CMD_Rectd,
+ DISPATCH_CMD_MultMatrixx,
+ DISPATCH_CMD_TexStorageMem3DMultisampleEXT,
+ DISPATCH_CMD_Rects,
+ DISPATCH_CMD_TexCoord4s,
+ DISPATCH_CMD_TexCoord4i,
+ DISPATCH_CMD_ProgramUniform1ui64vARB,
+ DISPATCH_CMD_TexCoord4d,
+ DISPATCH_CMD_TexCoord4f,
+ DISPATCH_CMD_ProgramUniformMatrix3dv,
+ DISPATCH_CMD_LockArraysEXT,
+ DISPATCH_CMD_Rectfv,
+ DISPATCH_CMD_BindImageTexture,
+ DISPATCH_CMD_MinSampleShading,
+ DISPATCH_CMD_VertexAttrib1dNV,
+ DISPATCH_CMD_EndFragmentShaderATI,
+ DISPATCH_CMD_Uniform4iv,
+};
+
+#endif /* MARSHAL_GENERATABLE_H */
+
diff --git a/prebuilt-intermediates/main/remap_helper.h b/prebuilt-intermediates/main/remap_helper.h
new file mode 100644
index 0000000..62170c2
--- /dev/null
+++ b/prebuilt-intermediates/main/remap_helper.h
@@ -0,0 +1,8244 @@
+/* DO NOT EDIT - This file generated automatically by remap_helper.py (from Mesa) script */
+
+/*
+ * Copyright (C) 2009 Chia-I Wu <olv@0xlab.org>
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * Chia-I Wu,
+ * AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "main/dispatch.h"
+#include "main/remap.h"
+
+/* this is internal to remap.c */
+#ifndef need_MESA_remap_table
+#error Only remap.c should include this file!
+#endif /* need_MESA_remap_table */
+
+
+static const char _mesa_function_pool[] =
+ /* _mesa_function_pool[0]: MapGrid1d (offset 224) */
+ "idd\0"
+ "glMapGrid1d\0"
+ "\0"
+ /* _mesa_function_pool[17]: MapGrid1f (offset 225) */
+ "iff\0"
+ "glMapGrid1f\0"
+ "\0"
+ /* _mesa_function_pool[34]: ReplacementCodeuiVertex3fvSUN (dynamic) */
+ "pp\0"
+ "glReplacementCodeuiVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[70]: ProgramUniform3i64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[101]: GetProgramResourceLocationIndex (will be remapped) */
+ "iip\0"
+ "glGetProgramResourceLocationIndex\0"
+ "glGetProgramResourceLocationIndexEXT\0"
+ "\0"
+ /* _mesa_function_pool[177]: TexCoordP1ui (will be remapped) */
+ "ii\0"
+ "glTexCoordP1ui\0"
+ "\0"
+ /* _mesa_function_pool[196]: PolygonStipple (offset 175) */
+ "p\0"
+ "glPolygonStipple\0"
+ "\0"
+ /* _mesa_function_pool[216]: ListParameterfSGIX (dynamic) */
+ "iif\0"
+ "glListParameterfSGIX\0"
+ "\0"
+ /* _mesa_function_pool[242]: MultiTexCoord1dv (offset 377) */
+ "ip\0"
+ "glMultiTexCoord1dv\0"
+ "glMultiTexCoord1dvARB\0"
+ "\0"
+ /* _mesa_function_pool[287]: IsEnabled (offset 286) */
+ "i\0"
+ "glIsEnabled\0"
+ "\0"
+ /* _mesa_function_pool[302]: GetTexFilterFuncSGIS (dynamic) */
+ "iip\0"
+ "glGetTexFilterFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[330]: AttachShader (will be remapped) */
+ "ii\0"
+ "glAttachShader\0"
+ "\0"
+ /* _mesa_function_pool[349]: VertexAttrib3fARB (will be remapped) */
+ "ifff\0"
+ "glVertexAttrib3f\0"
+ "glVertexAttrib3fARB\0"
+ "\0"
+ /* _mesa_function_pool[392]: Indexubv (offset 316) */
+ "p\0"
+ "glIndexubv\0"
+ "\0"
+ /* _mesa_function_pool[406]: GetCompressedTextureImage (will be remapped) */
+ "iiip\0"
+ "glGetCompressedTextureImage\0"
+ "\0"
+ /* _mesa_function_pool[440]: MultiTexCoordP3uiv (will be remapped) */
+ "iip\0"
+ "glMultiTexCoordP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[466]: VertexAttribI4usv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4usvEXT\0"
+ "glVertexAttribI4usv\0"
+ "\0"
+ /* _mesa_function_pool[513]: Color3ubv (offset 20) */
+ "p\0"
+ "glColor3ubv\0"
+ "\0"
+ /* _mesa_function_pool[528]: GetCombinerOutputParameterfvNV (dynamic) */
+ "iiip\0"
+ "glGetCombinerOutputParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[567]: Binormal3ivEXT (dynamic) */
+ "p\0"
+ "glBinormal3ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[587]: GetImageTransformParameterfvHP (dynamic) */
+ "iip\0"
+ "glGetImageTransformParameterfvHP\0"
+ "\0"
+ /* _mesa_function_pool[625]: GetClipPlanex (will be remapped) */
+ "ip\0"
+ "glGetClipPlanexOES\0"
+ "glGetClipPlanex\0"
+ "\0"
+ /* _mesa_function_pool[664]: ProgramUniform2ui (will be remapped) */
+ "iiii\0"
+ "glProgramUniform2ui\0"
+ "glProgramUniform2uiEXT\0"
+ "\0"
+ /* _mesa_function_pool[713]: TexCoordP1uiv (will be remapped) */
+ "ip\0"
+ "glTexCoordP1uiv\0"
+ "\0"
+ /* _mesa_function_pool[733]: RenderbufferStorage (will be remapped) */
+ "iiii\0"
+ "glRenderbufferStorage\0"
+ "glRenderbufferStorageEXT\0"
+ "glRenderbufferStorageOES\0"
+ "\0"
+ /* _mesa_function_pool[811]: GetClipPlanef (will be remapped) */
+ "ip\0"
+ "glGetClipPlanefOES\0"
+ "glGetClipPlanef\0"
+ "\0"
+ /* _mesa_function_pool[850]: GetPerfQueryDataINTEL (will be remapped) */
+ "iiipp\0"
+ "glGetPerfQueryDataINTEL\0"
+ "\0"
+ /* _mesa_function_pool[881]: DrawArraysIndirect (will be remapped) */
+ "ip\0"
+ "glDrawArraysIndirect\0"
+ "\0"
+ /* _mesa_function_pool[906]: Uniform3i (will be remapped) */
+ "iiii\0"
+ "glUniform3i\0"
+ "glUniform3iARB\0"
+ "\0"
+ /* _mesa_function_pool[939]: DeleteVertexArraysAPPLE (dynamic) */
+ "ip\0"
+ "glDeleteVertexArraysAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[969]: VDPAUGetSurfaceivNV (will be remapped) */
+ "iiipp\0"
+ "glVDPAUGetSurfaceivNV\0"
+ "\0"
+ /* _mesa_function_pool[998]: Uniform3d (will be remapped) */
+ "iddd\0"
+ "glUniform3d\0"
+ "\0"
+ /* _mesa_function_pool[1016]: Uniform3f (will be remapped) */
+ "ifff\0"
+ "glUniform3f\0"
+ "glUniform3fARB\0"
+ "\0"
+ /* _mesa_function_pool[1049]: UniformMatrix2x4fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2x4fv\0"
+ "\0"
+ /* _mesa_function_pool[1076]: QueryMatrixxOES (will be remapped) */
+ "pp\0"
+ "glQueryMatrixxOES\0"
+ "\0"
+ /* _mesa_function_pool[1098]: Normal3iv (offset 59) */
+ "p\0"
+ "glNormal3iv\0"
+ "\0"
+ /* _mesa_function_pool[1113]: DrawTexiOES (will be remapped) */
+ "iiiii\0"
+ "glDrawTexiOES\0"
+ "\0"
+ /* _mesa_function_pool[1134]: Viewport (offset 305) */
+ "iiii\0"
+ "glViewport\0"
+ "\0"
+ /* _mesa_function_pool[1151]: ReplacementCodeuiTexCoord2fNormal3fVertex3fvSUN (dynamic) */
+ "pppp\0"
+ "glReplacementCodeuiTexCoord2fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[1207]: CreateProgramPipelines (will be remapped) */
+ "ip\0"
+ "glCreateProgramPipelines\0"
+ "\0"
+ /* _mesa_function_pool[1236]: FragmentLightModelivSGIX (dynamic) */
+ "ip\0"
+ "glFragmentLightModelivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[1267]: DeleteVertexArrays (will be remapped) */
+ "ip\0"
+ "glDeleteVertexArrays\0"
+ "glDeleteVertexArraysOES\0"
+ "\0"
+ /* _mesa_function_pool[1316]: ClearColorIuiEXT (will be remapped) */
+ "iiii\0"
+ "glClearColorIuiEXT\0"
+ "\0"
+ /* _mesa_function_pool[1341]: GetnConvolutionFilterARB (will be remapped) */
+ "iiiip\0"
+ "glGetnConvolutionFilterARB\0"
+ "\0"
+ /* _mesa_function_pool[1375]: PolygonOffsetx (will be remapped) */
+ "ii\0"
+ "glPolygonOffsetxOES\0"
+ "glPolygonOffsetx\0"
+ "\0"
+ /* _mesa_function_pool[1416]: GetLightxv (will be remapped) */
+ "iip\0"
+ "glGetLightxvOES\0"
+ "glGetLightxv\0"
+ "\0"
+ /* _mesa_function_pool[1450]: GetConvolutionParameteriv (offset 358) */
+ "iip\0"
+ "glGetConvolutionParameteriv\0"
+ "glGetConvolutionParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[1514]: DepthRangeIndexedfOES (will be remapped) */
+ "iff\0"
+ "glDepthRangeIndexedfOES\0"
+ "\0"
+ /* _mesa_function_pool[1543]: GetProgramResourceLocation (will be remapped) */
+ "iip\0"
+ "glGetProgramResourceLocation\0"
+ "\0"
+ /* _mesa_function_pool[1577]: GetSubroutineUniformLocation (will be remapped) */
+ "iip\0"
+ "glGetSubroutineUniformLocation\0"
+ "\0"
+ /* _mesa_function_pool[1613]: VertexAttrib4usv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4usv\0"
+ "glVertexAttrib4usvARB\0"
+ "\0"
+ /* _mesa_function_pool[1658]: TextureStorage1DEXT (will be remapped) */
+ "iiiii\0"
+ "glTextureStorage1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[1687]: VertexAttrib4Nub (will be remapped) */
+ "iiiii\0"
+ "glVertexAttrib4Nub\0"
+ "glVertexAttrib4NubARB\0"
+ "\0"
+ /* _mesa_function_pool[1735]: VertexAttribP3ui (will be remapped) */
+ "iiii\0"
+ "glVertexAttribP3ui\0"
+ "\0"
+ /* _mesa_function_pool[1760]: Color4ubVertex3fSUN (dynamic) */
+ "iiiifff\0"
+ "glColor4ubVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[1791]: PointSize (offset 173) */
+ "f\0"
+ "glPointSize\0"
+ "\0"
+ /* _mesa_function_pool[1806]: TexCoord2fVertex3fSUN (dynamic) */
+ "fffff\0"
+ "glTexCoord2fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[1837]: PopName (offset 200) */
+ "\0"
+ "glPopName\0"
+ "\0"
+ /* _mesa_function_pool[1849]: FramebufferTexture (will be remapped) */
+ "iiii\0"
+ "glFramebufferTexture\0"
+ "glFramebufferTextureEXT\0"
+ "glFramebufferTextureOES\0"
+ "\0"
+ /* _mesa_function_pool[1924]: CreateTransformFeedbacks (will be remapped) */
+ "ip\0"
+ "glCreateTransformFeedbacks\0"
+ "\0"
+ /* _mesa_function_pool[1955]: VertexAttrib4ubNV (will be remapped) */
+ "iiiii\0"
+ "glVertexAttrib4ubNV\0"
+ "\0"
+ /* _mesa_function_pool[1982]: ValidateProgramPipeline (will be remapped) */
+ "i\0"
+ "glValidateProgramPipeline\0"
+ "glValidateProgramPipelineEXT\0"
+ "\0"
+ /* _mesa_function_pool[2040]: BindFragDataLocationIndexed (will be remapped) */
+ "iiip\0"
+ "glBindFragDataLocationIndexed\0"
+ "glBindFragDataLocationIndexedEXT\0"
+ "\0"
+ /* _mesa_function_pool[2109]: GetClipPlane (offset 259) */
+ "ip\0"
+ "glGetClipPlane\0"
+ "\0"
+ /* _mesa_function_pool[2128]: CombinerParameterfvNV (dynamic) */
+ "ip\0"
+ "glCombinerParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[2156]: DeleteSemaphoresEXT (will be remapped) */
+ "ip\0"
+ "glDeleteSemaphoresEXT\0"
+ "\0"
+ /* _mesa_function_pool[2182]: TexCoordP4uiv (will be remapped) */
+ "ip\0"
+ "glTexCoordP4uiv\0"
+ "\0"
+ /* _mesa_function_pool[2202]: VertexAttribs3dvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs3dvNV\0"
+ "\0"
+ /* _mesa_function_pool[2228]: ProgramUniformMatrix2x4dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2x4dv\0"
+ "\0"
+ /* _mesa_function_pool[2263]: GenQueries (will be remapped) */
+ "ip\0"
+ "glGenQueries\0"
+ "glGenQueriesARB\0"
+ "glGenQueriesEXT\0"
+ "\0"
+ /* _mesa_function_pool[2312]: ProgramUniform4iv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4iv\0"
+ "glProgramUniform4ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[2361]: ObjectUnpurgeableAPPLE (will be remapped) */
+ "iii\0"
+ "glObjectUnpurgeableAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[2391]: GetCompressedTextureSubImage (will be remapped) */
+ "iiiiiiiiip\0"
+ "glGetCompressedTextureSubImage\0"
+ "\0"
+ /* _mesa_function_pool[2434]: TexCoord2iv (offset 107) */
+ "p\0"
+ "glTexCoord2iv\0"
+ "\0"
+ /* _mesa_function_pool[2451]: TexImage2DMultisample (will be remapped) */
+ "iiiiii\0"
+ "glTexImage2DMultisample\0"
+ "\0"
+ /* _mesa_function_pool[2483]: TexParameterx (will be remapped) */
+ "iii\0"
+ "glTexParameterxOES\0"
+ "glTexParameterx\0"
+ "\0"
+ /* _mesa_function_pool[2523]: Rotatef (offset 300) */
+ "ffff\0"
+ "glRotatef\0"
+ "\0"
+ /* _mesa_function_pool[2539]: TexParameterf (offset 178) */
+ "iif\0"
+ "glTexParameterf\0"
+ "\0"
+ /* _mesa_function_pool[2560]: TexParameteri (offset 180) */
+ "iii\0"
+ "glTexParameteri\0"
+ "\0"
+ /* _mesa_function_pool[2581]: GetUniformiv (will be remapped) */
+ "iip\0"
+ "glGetUniformiv\0"
+ "glGetUniformivARB\0"
+ "\0"
+ /* _mesa_function_pool[2619]: ClearBufferSubData (will be remapped) */
+ "iiiiiip\0"
+ "glClearBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[2649]: TextureParameterfv (will be remapped) */
+ "iip\0"
+ "glTextureParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[2675]: VDPAUFiniNV (will be remapped) */
+ "\0"
+ "glVDPAUFiniNV\0"
+ "\0"
+ /* _mesa_function_pool[2691]: GlobalAlphaFactordSUN (dynamic) */
+ "d\0"
+ "glGlobalAlphaFactordSUN\0"
+ "\0"
+ /* _mesa_function_pool[2718]: ProgramUniformMatrix4x2fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4x2fv\0"
+ "glProgramUniformMatrix4x2fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[2784]: ProgramUniform2f (will be remapped) */
+ "iiff\0"
+ "glProgramUniform2f\0"
+ "glProgramUniform2fEXT\0"
+ "\0"
+ /* _mesa_function_pool[2831]: ProgramUniform2d (will be remapped) */
+ "iidd\0"
+ "glProgramUniform2d\0"
+ "\0"
+ /* _mesa_function_pool[2856]: ProgramUniform2i (will be remapped) */
+ "iiii\0"
+ "glProgramUniform2i\0"
+ "glProgramUniform2iEXT\0"
+ "\0"
+ /* _mesa_function_pool[2903]: Fogx (will be remapped) */
+ "ii\0"
+ "glFogxOES\0"
+ "glFogx\0"
+ "\0"
+ /* _mesa_function_pool[2924]: Uniform3ui64ARB (will be remapped) */
+ "iiii\0"
+ "glUniform3ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[2948]: Fogf (offset 153) */
+ "if\0"
+ "glFogf\0"
+ "\0"
+ /* _mesa_function_pool[2959]: TexSubImage1D (offset 332) */
+ "iiiiiip\0"
+ "glTexSubImage1D\0"
+ "glTexSubImage1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[3003]: ProgramUniform3ui64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[3035]: Color4usv (offset 40) */
+ "p\0"
+ "glColor4usv\0"
+ "\0"
+ /* _mesa_function_pool[3050]: Fogi (offset 155) */
+ "ii\0"
+ "glFogi\0"
+ "\0"
+ /* _mesa_function_pool[3061]: FinalCombinerInputNV (dynamic) */
+ "iiii\0"
+ "glFinalCombinerInputNV\0"
+ "\0"
+ /* _mesa_function_pool[3090]: DepthFunc (offset 245) */
+ "i\0"
+ "glDepthFunc\0"
+ "\0"
+ /* _mesa_function_pool[3105]: GetSamplerParameterIiv (will be remapped) */
+ "iip\0"
+ "glGetSamplerParameterIiv\0"
+ "glGetSamplerParameterIivEXT\0"
+ "glGetSamplerParameterIivOES\0"
+ "\0"
+ /* _mesa_function_pool[3191]: VertexArrayAttribLFormat (will be remapped) */
+ "iiiii\0"
+ "glVertexArrayAttribLFormat\0"
+ "\0"
+ /* _mesa_function_pool[3225]: VertexAttribI4uiEXT (will be remapped) */
+ "iiiii\0"
+ "glVertexAttribI4uiEXT\0"
+ "glVertexAttribI4ui\0"
+ "\0"
+ /* _mesa_function_pool[3273]: DrawElementsInstancedBaseVertexBaseInstance (will be remapped) */
+ "iiipiii\0"
+ "glDrawElementsInstancedBaseVertexBaseInstance\0"
+ "glDrawElementsInstancedBaseVertexBaseInstanceEXT\0"
+ "\0"
+ /* _mesa_function_pool[3377]: ProgramEnvParameter4dvARB (will be remapped) */
+ "iip\0"
+ "glProgramEnvParameter4dvARB\0"
+ "glProgramParameter4dvNV\0"
+ "\0"
+ /* _mesa_function_pool[3434]: ColorTableParameteriv (offset 341) */
+ "iip\0"
+ "glColorTableParameteriv\0"
+ "glColorTableParameterivSGI\0"
+ "\0"
+ /* _mesa_function_pool[3490]: BindSamplers (will be remapped) */
+ "iip\0"
+ "glBindSamplers\0"
+ "\0"
+ /* _mesa_function_pool[3510]: GetnCompressedTexImageARB (will be remapped) */
+ "iiip\0"
+ "glGetnCompressedTexImageARB\0"
+ "\0"
+ /* _mesa_function_pool[3544]: CopyNamedBufferSubData (will be remapped) */
+ "iiiii\0"
+ "glCopyNamedBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[3576]: BindSampler (will be remapped) */
+ "ii\0"
+ "glBindSampler\0"
+ "\0"
+ /* _mesa_function_pool[3594]: GetUniformuiv (will be remapped) */
+ "iip\0"
+ "glGetUniformuivEXT\0"
+ "glGetUniformuiv\0"
+ "\0"
+ /* _mesa_function_pool[3634]: GetQueryBufferObjectuiv (will be remapped) */
+ "iiii\0"
+ "glGetQueryBufferObjectuiv\0"
+ "\0"
+ /* _mesa_function_pool[3666]: MultiTexCoord2fARB (offset 386) */
+ "iff\0"
+ "glMultiTexCoord2f\0"
+ "glMultiTexCoord2fARB\0"
+ "\0"
+ /* _mesa_function_pool[3710]: Uniform1ui64ARB (will be remapped) */
+ "ii\0"
+ "glUniform1ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[3732]: GetTextureImage (will be remapped) */
+ "iiiiip\0"
+ "glGetTextureImage\0"
+ "\0"
+ /* _mesa_function_pool[3758]: MultiTexCoord3iv (offset 397) */
+ "ip\0"
+ "glMultiTexCoord3iv\0"
+ "glMultiTexCoord3ivARB\0"
+ "\0"
+ /* _mesa_function_pool[3803]: Finish (offset 216) */
+ "\0"
+ "glFinish\0"
+ "\0"
+ /* _mesa_function_pool[3814]: ClearStencil (offset 207) */
+ "i\0"
+ "glClearStencil\0"
+ "\0"
+ /* _mesa_function_pool[3832]: ClearColorIiEXT (will be remapped) */
+ "iiii\0"
+ "glClearColorIiEXT\0"
+ "\0"
+ /* _mesa_function_pool[3856]: LoadMatrixd (offset 292) */
+ "p\0"
+ "glLoadMatrixd\0"
+ "\0"
+ /* _mesa_function_pool[3873]: VDPAURegisterOutputSurfaceNV (will be remapped) */
+ "piip\0"
+ "glVDPAURegisterOutputSurfaceNV\0"
+ "\0"
+ /* _mesa_function_pool[3910]: VertexP4ui (will be remapped) */
+ "ii\0"
+ "glVertexP4ui\0"
+ "\0"
+ /* _mesa_function_pool[3927]: GetProgramResourceIndex (will be remapped) */
+ "iip\0"
+ "glGetProgramResourceIndex\0"
+ "\0"
+ /* _mesa_function_pool[3958]: SpriteParameterfvSGIX (dynamic) */
+ "ip\0"
+ "glSpriteParameterfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[3986]: TextureStorage3DMultisample (will be remapped) */
+ "iiiiiii\0"
+ "glTextureStorage3DMultisample\0"
+ "\0"
+ /* _mesa_function_pool[4025]: GetnUniformivARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformivARB\0"
+ "glGetnUniformiv\0"
+ "glGetnUniformivKHR\0"
+ "\0"
+ /* _mesa_function_pool[4085]: ReleaseShaderCompiler (will be remapped) */
+ "\0"
+ "glReleaseShaderCompiler\0"
+ "\0"
+ /* _mesa_function_pool[4111]: BlendFuncSeparate (will be remapped) */
+ "iiii\0"
+ "glBlendFuncSeparate\0"
+ "glBlendFuncSeparateEXT\0"
+ "glBlendFuncSeparateINGR\0"
+ "glBlendFuncSeparateOES\0"
+ "\0"
+ /* _mesa_function_pool[4207]: Color3us (offset 23) */
+ "iii\0"
+ "glColor3us\0"
+ "\0"
+ /* _mesa_function_pool[4223]: LoadMatrixx (will be remapped) */
+ "p\0"
+ "glLoadMatrixxOES\0"
+ "glLoadMatrixx\0"
+ "\0"
+ /* _mesa_function_pool[4257]: BufferStorage (will be remapped) */
+ "iipi\0"
+ "glBufferStorage\0"
+ "glBufferStorageEXT\0"
+ "\0"
+ /* _mesa_function_pool[4298]: Color3ub (offset 19) */
+ "iii\0"
+ "glColor3ub\0"
+ "\0"
+ /* _mesa_function_pool[4314]: GetInstrumentsSGIX (dynamic) */
+ "\0"
+ "glGetInstrumentsSGIX\0"
+ "\0"
+ /* _mesa_function_pool[4337]: Color3ui (offset 21) */
+ "iii\0"
+ "glColor3ui\0"
+ "\0"
+ /* _mesa_function_pool[4353]: VertexAttrib4dvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4dvNV\0"
+ "\0"
+ /* _mesa_function_pool[4377]: AlphaFragmentOp2ATI (will be remapped) */
+ "iiiiiiiii\0"
+ "glAlphaFragmentOp2ATI\0"
+ "\0"
+ /* _mesa_function_pool[4410]: RasterPos4dv (offset 79) */
+ "p\0"
+ "glRasterPos4dv\0"
+ "\0"
+ /* _mesa_function_pool[4428]: DeleteProgramPipelines (will be remapped) */
+ "ip\0"
+ "glDeleteProgramPipelines\0"
+ "glDeleteProgramPipelinesEXT\0"
+ "\0"
+ /* _mesa_function_pool[4485]: LineWidthx (will be remapped) */
+ "i\0"
+ "glLineWidthxOES\0"
+ "glLineWidthx\0"
+ "\0"
+ /* _mesa_function_pool[4517]: GetTransformFeedbacki_v (will be remapped) */
+ "iiip\0"
+ "glGetTransformFeedbacki_v\0"
+ "\0"
+ /* _mesa_function_pool[4549]: Indexdv (offset 45) */
+ "p\0"
+ "glIndexdv\0"
+ "\0"
+ /* _mesa_function_pool[4562]: GetnPixelMapfvARB (will be remapped) */
+ "iip\0"
+ "glGetnPixelMapfvARB\0"
+ "\0"
+ /* _mesa_function_pool[4587]: EGLImageTargetTexture2DOES (will be remapped) */
+ "ip\0"
+ "glEGLImageTargetTexture2DOES\0"
+ "\0"
+ /* _mesa_function_pool[4620]: DepthMask (offset 211) */
+ "i\0"
+ "glDepthMask\0"
+ "\0"
+ /* _mesa_function_pool[4635]: WindowPos4ivMESA (will be remapped) */
+ "p\0"
+ "glWindowPos4ivMESA\0"
+ "\0"
+ /* _mesa_function_pool[4657]: GetShaderInfoLog (will be remapped) */
+ "iipp\0"
+ "glGetShaderInfoLog\0"
+ "\0"
+ /* _mesa_function_pool[4682]: BindFragmentShaderATI (will be remapped) */
+ "i\0"
+ "glBindFragmentShaderATI\0"
+ "\0"
+ /* _mesa_function_pool[4709]: BlendFuncSeparateiARB (will be remapped) */
+ "iiiii\0"
+ "glBlendFuncSeparateiARB\0"
+ "glBlendFuncSeparateIndexedAMD\0"
+ "glBlendFuncSeparatei\0"
+ "glBlendFuncSeparateiEXT\0"
+ "glBlendFuncSeparateiOES\0"
+ "\0"
+ /* _mesa_function_pool[4839]: PixelTexGenParameteriSGIS (dynamic) */
+ "ii\0"
+ "glPixelTexGenParameteriSGIS\0"
+ "\0"
+ /* _mesa_function_pool[4871]: EGLImageTargetRenderbufferStorageOES (will be remapped) */
+ "ip\0"
+ "glEGLImageTargetRenderbufferStorageOES\0"
+ "\0"
+ /* _mesa_function_pool[4914]: GenTransformFeedbacks (will be remapped) */
+ "ip\0"
+ "glGenTransformFeedbacks\0"
+ "\0"
+ /* _mesa_function_pool[4942]: VertexPointer (offset 321) */
+ "iiip\0"
+ "glVertexPointer\0"
+ "\0"
+ /* _mesa_function_pool[4964]: GetCompressedTexImage (will be remapped) */
+ "iip\0"
+ "glGetCompressedTexImage\0"
+ "glGetCompressedTexImageARB\0"
+ "\0"
+ /* _mesa_function_pool[5020]: ProgramLocalParameter4dvARB (will be remapped) */
+ "iip\0"
+ "glProgramLocalParameter4dvARB\0"
+ "\0"
+ /* _mesa_function_pool[5055]: UniformMatrix2dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2dv\0"
+ "\0"
+ /* _mesa_function_pool[5080]: GetQueryObjectui64v (will be remapped) */
+ "iip\0"
+ "glGetQueryObjectui64v\0"
+ "glGetQueryObjectui64vEXT\0"
+ "\0"
+ /* _mesa_function_pool[5132]: VertexAttribP1uiv (will be remapped) */
+ "iiip\0"
+ "glVertexAttribP1uiv\0"
+ "\0"
+ /* _mesa_function_pool[5158]: IsProgram (will be remapped) */
+ "i\0"
+ "glIsProgram\0"
+ "\0"
+ /* _mesa_function_pool[5173]: TexCoordPointerListIBM (dynamic) */
+ "iiipi\0"
+ "glTexCoordPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[5205]: ResizeBuffersMESA (will be remapped) */
+ "\0"
+ "glResizeBuffersMESA\0"
+ "\0"
+ /* _mesa_function_pool[5227]: BindBuffersBase (will be remapped) */
+ "iiip\0"
+ "glBindBuffersBase\0"
+ "\0"
+ /* _mesa_function_pool[5251]: GenTextures (offset 328) */
+ "ip\0"
+ "glGenTextures\0"
+ "glGenTexturesEXT\0"
+ "\0"
+ /* _mesa_function_pool[5286]: IndexPointerListIBM (dynamic) */
+ "iipi\0"
+ "glIndexPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[5314]: UnmapNamedBuffer (will be remapped) */
+ "i\0"
+ "glUnmapNamedBuffer\0"
+ "\0"
+ /* _mesa_function_pool[5336]: UniformMatrix3x2dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3x2dv\0"
+ "\0"
+ /* _mesa_function_pool[5363]: WindowPos4fMESA (will be remapped) */
+ "ffff\0"
+ "glWindowPos4fMESA\0"
+ "\0"
+ /* _mesa_function_pool[5387]: VertexAttribs2fvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs2fvNV\0"
+ "\0"
+ /* _mesa_function_pool[5413]: VertexAttribP4ui (will be remapped) */
+ "iiii\0"
+ "glVertexAttribP4ui\0"
+ "\0"
+ /* _mesa_function_pool[5438]: StringMarkerGREMEDY (will be remapped) */
+ "ip\0"
+ "glStringMarkerGREMEDY\0"
+ "\0"
+ /* _mesa_function_pool[5464]: Uniform4i (will be remapped) */
+ "iiiii\0"
+ "glUniform4i\0"
+ "glUniform4iARB\0"
+ "\0"
+ /* _mesa_function_pool[5498]: Uniform4d (will be remapped) */
+ "idddd\0"
+ "glUniform4d\0"
+ "\0"
+ /* _mesa_function_pool[5517]: Uniform4f (will be remapped) */
+ "iffff\0"
+ "glUniform4f\0"
+ "glUniform4fARB\0"
+ "\0"
+ /* _mesa_function_pool[5551]: ProgramUniform3dv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3dv\0"
+ "\0"
+ /* _mesa_function_pool[5577]: GetNamedBufferParameteri64v (will be remapped) */
+ "iip\0"
+ "glGetNamedBufferParameteri64v\0"
+ "\0"
+ /* _mesa_function_pool[5612]: NamedFramebufferTexture (will be remapped) */
+ "iiii\0"
+ "glNamedFramebufferTexture\0"
+ "\0"
+ /* _mesa_function_pool[5644]: ProgramUniform3d (will be remapped) */
+ "iiddd\0"
+ "glProgramUniform3d\0"
+ "\0"
+ /* _mesa_function_pool[5670]: ProgramUniform3f (will be remapped) */
+ "iifff\0"
+ "glProgramUniform3f\0"
+ "glProgramUniform3fEXT\0"
+ "\0"
+ /* _mesa_function_pool[5718]: ProgramUniform3i (will be remapped) */
+ "iiiii\0"
+ "glProgramUniform3i\0"
+ "glProgramUniform3iEXT\0"
+ "\0"
+ /* _mesa_function_pool[5766]: PointParameterfv (will be remapped) */
+ "ip\0"
+ "glPointParameterfv\0"
+ "glPointParameterfvARB\0"
+ "glPointParameterfvEXT\0"
+ "glPointParameterfvSGIS\0"
+ "\0"
+ /* _mesa_function_pool[5856]: GetHistogramParameterfv (offset 362) */
+ "iip\0"
+ "glGetHistogramParameterfv\0"
+ "glGetHistogramParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[5916]: GetString (offset 275) */
+ "i\0"
+ "glGetString\0"
+ "\0"
+ /* _mesa_function_pool[5931]: ColorPointervINTEL (dynamic) */
+ "iip\0"
+ "glColorPointervINTEL\0"
+ "\0"
+ /* _mesa_function_pool[5957]: VDPAUUnmapSurfacesNV (will be remapped) */
+ "ip\0"
+ "glVDPAUUnmapSurfacesNV\0"
+ "\0"
+ /* _mesa_function_pool[5984]: GetnHistogramARB (will be remapped) */
+ "iiiiip\0"
+ "glGetnHistogramARB\0"
+ "\0"
+ /* _mesa_function_pool[6011]: ReplacementCodeuiColor4fNormal3fVertex3fvSUN (dynamic) */
+ "pppp\0"
+ "glReplacementCodeuiColor4fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[6064]: SecondaryColor3s (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3s\0"
+ "glSecondaryColor3sEXT\0"
+ "\0"
+ /* _mesa_function_pool[6110]: TexStorageMem2DEXT (will be remapped) */
+ "iiiiiii\0"
+ "glTexStorageMem2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[6140]: VertexAttribP2uiv (will be remapped) */
+ "iiip\0"
+ "glVertexAttribP2uiv\0"
+ "\0"
+ /* _mesa_function_pool[6166]: UniformMatrix3x4dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3x4dv\0"
+ "\0"
+ /* _mesa_function_pool[6193]: VertexAttrib3fNV (will be remapped) */
+ "ifff\0"
+ "glVertexAttrib3fNV\0"
+ "\0"
+ /* _mesa_function_pool[6218]: SecondaryColor3b (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3b\0"
+ "glSecondaryColor3bEXT\0"
+ "\0"
+ /* _mesa_function_pool[6264]: EnableClientState (offset 313) */
+ "i\0"
+ "glEnableClientState\0"
+ "\0"
+ /* _mesa_function_pool[6287]: Color4ubVertex2fvSUN (dynamic) */
+ "pp\0"
+ "glColor4ubVertex2fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[6314]: GetActiveSubroutineName (will be remapped) */
+ "iiiipp\0"
+ "glGetActiveSubroutineName\0"
+ "\0"
+ /* _mesa_function_pool[6348]: SecondaryColor3i (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3i\0"
+ "glSecondaryColor3iEXT\0"
+ "\0"
+ /* _mesa_function_pool[6394]: TexFilterFuncSGIS (dynamic) */
+ "iiip\0"
+ "glTexFilterFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[6420]: GetFragmentMaterialfvSGIX (dynamic) */
+ "iip\0"
+ "glGetFragmentMaterialfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[6453]: DetailTexFuncSGIS (dynamic) */
+ "iip\0"
+ "glDetailTexFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[6478]: FlushMappedBufferRange (will be remapped) */
+ "iii\0"
+ "glFlushMappedBufferRange\0"
+ "glFlushMappedBufferRangeEXT\0"
+ "\0"
+ /* _mesa_function_pool[6536]: TexStorageMem3DEXT (will be remapped) */
+ "iiiiiiii\0"
+ "glTexStorageMem3DEXT\0"
+ "\0"
+ /* _mesa_function_pool[6567]: Lightfv (offset 160) */
+ "iip\0"
+ "glLightfv\0"
+ "\0"
+ /* _mesa_function_pool[6582]: GetFramebufferAttachmentParameteriv (will be remapped) */
+ "iiip\0"
+ "glGetFramebufferAttachmentParameteriv\0"
+ "glGetFramebufferAttachmentParameterivEXT\0"
+ "glGetFramebufferAttachmentParameterivOES\0"
+ "\0"
+ /* _mesa_function_pool[6708]: ColorSubTable (offset 346) */
+ "iiiiip\0"
+ "glColorSubTable\0"
+ "glColorSubTableEXT\0"
+ "\0"
+ /* _mesa_function_pool[6751]: GetVertexArrayIndexed64iv (will be remapped) */
+ "iiip\0"
+ "glGetVertexArrayIndexed64iv\0"
+ "\0"
+ /* _mesa_function_pool[6785]: EndPerfMonitorAMD (will be remapped) */
+ "i\0"
+ "glEndPerfMonitorAMD\0"
+ "\0"
+ /* _mesa_function_pool[6808]: ReadInstrumentsSGIX (dynamic) */
+ "i\0"
+ "glReadInstrumentsSGIX\0"
+ "\0"
+ /* _mesa_function_pool[6833]: CreateBuffers (will be remapped) */
+ "ip\0"
+ "glCreateBuffers\0"
+ "\0"
+ /* _mesa_function_pool[6853]: MapParameterivNV (dynamic) */
+ "iip\0"
+ "glMapParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[6877]: VertexAttribs4dvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs4dvNV\0"
+ "\0"
+ /* _mesa_function_pool[6903]: Uniform2i64vARB (will be remapped) */
+ "iip\0"
+ "glUniform2i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[6926]: GetMultisamplefv (will be remapped) */
+ "iip\0"
+ "glGetMultisamplefv\0"
+ "\0"
+ /* _mesa_function_pool[6950]: WeightbvARB (dynamic) */
+ "ip\0"
+ "glWeightbvARB\0"
+ "\0"
+ /* _mesa_function_pool[6968]: GetActiveSubroutineUniformName (will be remapped) */
+ "iiiipp\0"
+ "glGetActiveSubroutineUniformName\0"
+ "\0"
+ /* _mesa_function_pool[7009]: Rectdv (offset 87) */
+ "pp\0"
+ "glRectdv\0"
+ "\0"
+ /* _mesa_function_pool[7022]: DrawArraysInstancedARB (will be remapped) */
+ "iiii\0"
+ "glDrawArraysInstancedARB\0"
+ "glDrawArraysInstancedEXT\0"
+ "glDrawArraysInstanced\0"
+ "\0"
+ /* _mesa_function_pool[7100]: MakeImageHandleNonResidentARB (will be remapped) */
+ "i\0"
+ "glMakeImageHandleNonResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[7135]: ImportMemoryFdEXT (will be remapped) */
+ "iiii\0"
+ "glImportMemoryFdEXT\0"
+ "\0"
+ /* _mesa_function_pool[7161]: ProgramEnvParameters4fvEXT (will be remapped) */
+ "iiip\0"
+ "glProgramEnvParameters4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[7196]: TexStorageMem1DEXT (will be remapped) */
+ "iiiiii\0"
+ "glTexStorageMem1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[7225]: BlendBarrier (will be remapped) */
+ "\0"
+ "glBlendBarrier\0"
+ "glBlendBarrierKHR\0"
+ "\0"
+ /* _mesa_function_pool[7260]: VertexAttrib2svNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2svNV\0"
+ "\0"
+ /* _mesa_function_pool[7284]: SecondaryColorP3uiv (will be remapped) */
+ "ip\0"
+ "glSecondaryColorP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[7310]: GetnPixelMapuivARB (will be remapped) */
+ "iip\0"
+ "glGetnPixelMapuivARB\0"
+ "\0"
+ /* _mesa_function_pool[7336]: GetSamplerParameterIuiv (will be remapped) */
+ "iip\0"
+ "glGetSamplerParameterIuiv\0"
+ "glGetSamplerParameterIuivEXT\0"
+ "glGetSamplerParameterIuivOES\0"
+ "\0"
+ /* _mesa_function_pool[7425]: Disablei (will be remapped) */
+ "ii\0"
+ "glDisableIndexedEXT\0"
+ "glDisablei\0"
+ "glDisableiEXT\0"
+ "glDisableiOES\0"
+ "\0"
+ /* _mesa_function_pool[7488]: CompressedTexSubImage3D (will be remapped) */
+ "iiiiiiiiiip\0"
+ "glCompressedTexSubImage3D\0"
+ "glCompressedTexSubImage3DARB\0"
+ "glCompressedTexSubImage3DOES\0"
+ "\0"
+ /* _mesa_function_pool[7585]: WindowPos4svMESA (will be remapped) */
+ "p\0"
+ "glWindowPos4svMESA\0"
+ "\0"
+ /* _mesa_function_pool[7607]: ObjectLabel (will be remapped) */
+ "iiip\0"
+ "glObjectLabel\0"
+ "glObjectLabelKHR\0"
+ "\0"
+ /* _mesa_function_pool[7644]: Color3dv (offset 12) */
+ "p\0"
+ "glColor3dv\0"
+ "\0"
+ /* _mesa_function_pool[7658]: ProgramUniform1ui64ARB (will be remapped) */
+ "iii\0"
+ "glProgramUniform1ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[7688]: BeginQuery (will be remapped) */
+ "ii\0"
+ "glBeginQuery\0"
+ "glBeginQueryARB\0"
+ "glBeginQueryEXT\0"
+ "\0"
+ /* _mesa_function_pool[7737]: VertexP3uiv (will be remapped) */
+ "ip\0"
+ "glVertexP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[7755]: GetUniformLocation (will be remapped) */
+ "ip\0"
+ "glGetUniformLocation\0"
+ "glGetUniformLocationARB\0"
+ "\0"
+ /* _mesa_function_pool[7804]: PixelStoref (offset 249) */
+ "if\0"
+ "glPixelStoref\0"
+ "\0"
+ /* _mesa_function_pool[7822]: WindowPos2iv (will be remapped) */
+ "p\0"
+ "glWindowPos2iv\0"
+ "glWindowPos2ivARB\0"
+ "glWindowPos2ivMESA\0"
+ "\0"
+ /* _mesa_function_pool[7877]: PixelStorei (offset 250) */
+ "ii\0"
+ "glPixelStorei\0"
+ "\0"
+ /* _mesa_function_pool[7895]: AsyncMarkerSGIX (dynamic) */
+ "i\0"
+ "glAsyncMarkerSGIX\0"
+ "\0"
+ /* _mesa_function_pool[7916]: VertexAttribs1svNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs1svNV\0"
+ "\0"
+ /* _mesa_function_pool[7942]: CheckNamedFramebufferStatus (will be remapped) */
+ "ii\0"
+ "glCheckNamedFramebufferStatus\0"
+ "\0"
+ /* _mesa_function_pool[7976]: RequestResidentProgramsNV (will be remapped) */
+ "ip\0"
+ "glRequestResidentProgramsNV\0"
+ "\0"
+ /* _mesa_function_pool[8008]: UniformSubroutinesuiv (will be remapped) */
+ "iip\0"
+ "glUniformSubroutinesuiv\0"
+ "\0"
+ /* _mesa_function_pool[8037]: ListParameterivSGIX (dynamic) */
+ "iip\0"
+ "glListParameterivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[8064]: TexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */
+ "pppp\0"
+ "glTexCoord2fColor4fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[8110]: CheckFramebufferStatus (will be remapped) */
+ "i\0"
+ "glCheckFramebufferStatus\0"
+ "glCheckFramebufferStatusEXT\0"
+ "glCheckFramebufferStatusOES\0"
+ "\0"
+ /* _mesa_function_pool[8194]: DispatchComputeIndirect (will be remapped) */
+ "i\0"
+ "glDispatchComputeIndirect\0"
+ "\0"
+ /* _mesa_function_pool[8223]: InvalidateBufferData (will be remapped) */
+ "i\0"
+ "glInvalidateBufferData\0"
+ "\0"
+ /* _mesa_function_pool[8249]: GetUniformdv (will be remapped) */
+ "iip\0"
+ "glGetUniformdv\0"
+ "\0"
+ /* _mesa_function_pool[8269]: ProgramLocalParameters4fvEXT (will be remapped) */
+ "iiip\0"
+ "glProgramLocalParameters4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[8306]: VertexAttribL1dv (will be remapped) */
+ "ip\0"
+ "glVertexAttribL1dv\0"
+ "\0"
+ /* _mesa_function_pool[8329]: Uniform1ui64vARB (will be remapped) */
+ "iip\0"
+ "glUniform1ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[8353]: IsFramebuffer (will be remapped) */
+ "i\0"
+ "glIsFramebuffer\0"
+ "glIsFramebufferEXT\0"
+ "glIsFramebufferOES\0"
+ "\0"
+ /* _mesa_function_pool[8410]: GetPixelTexGenParameterfvSGIS (dynamic) */
+ "ip\0"
+ "glGetPixelTexGenParameterfvSGIS\0"
+ "\0"
+ /* _mesa_function_pool[8446]: GetDoublev (offset 260) */
+ "ip\0"
+ "glGetDoublev\0"
+ "\0"
+ /* _mesa_function_pool[8463]: GetObjectLabel (will be remapped) */
+ "iiipp\0"
+ "glGetObjectLabel\0"
+ "glGetObjectLabelKHR\0"
+ "\0"
+ /* _mesa_function_pool[8507]: ColorP3uiv (will be remapped) */
+ "ip\0"
+ "glColorP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[8524]: CombinerParameteriNV (dynamic) */
+ "ii\0"
+ "glCombinerParameteriNV\0"
+ "\0"
+ /* _mesa_function_pool[8551]: GetTextureSubImage (will be remapped) */
+ "iiiiiiiiiiip\0"
+ "glGetTextureSubImage\0"
+ "\0"
+ /* _mesa_function_pool[8586]: Normal3fVertex3fvSUN (dynamic) */
+ "pp\0"
+ "glNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[8613]: VertexAttribI4ivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4ivEXT\0"
+ "glVertexAttribI4iv\0"
+ "\0"
+ /* _mesa_function_pool[8658]: VertexAttrib1svNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1svNV\0"
+ "\0"
+ /* _mesa_function_pool[8682]: SecondaryColor3ubv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3ubv\0"
+ "glSecondaryColor3ubvEXT\0"
+ "\0"
+ /* _mesa_function_pool[8730]: GetDebugMessageLog (will be remapped) */
+ "iipppppp\0"
+ "glGetDebugMessageLogARB\0"
+ "glGetDebugMessageLog\0"
+ "glGetDebugMessageLogKHR\0"
+ "\0"
+ /* _mesa_function_pool[8809]: DeformationMap3fSGIX (dynamic) */
+ "iffiiffiiffiip\0"
+ "glDeformationMap3fSGIX\0"
+ "\0"
+ /* _mesa_function_pool[8848]: MatrixIndexubvARB (dynamic) */
+ "ip\0"
+ "glMatrixIndexubvARB\0"
+ "\0"
+ /* _mesa_function_pool[8872]: Color4fNormal3fVertex3fSUN (dynamic) */
+ "ffffffffff\0"
+ "glColor4fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[8913]: PixelTexGenParameterfSGIS (dynamic) */
+ "if\0"
+ "glPixelTexGenParameterfSGIS\0"
+ "\0"
+ /* _mesa_function_pool[8945]: Uniform4ui64ARB (will be remapped) */
+ "iiiii\0"
+ "glUniform4ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[8970]: RasterPos3fv (offset 73) */
+ "p\0"
+ "glRasterPos3fv\0"
+ "\0"
+ /* _mesa_function_pool[8988]: TexCoord2fVertex3fvSUN (dynamic) */
+ "pp\0"
+ "glTexCoord2fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[9017]: Color4ubVertex3fvSUN (dynamic) */
+ "pp\0"
+ "glColor4ubVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[9044]: GetShaderSource (will be remapped) */
+ "iipp\0"
+ "glGetShaderSource\0"
+ "glGetShaderSourceARB\0"
+ "\0"
+ /* _mesa_function_pool[9089]: BindProgramARB (will be remapped) */
+ "ii\0"
+ "glBindProgramARB\0"
+ "glBindProgramNV\0"
+ "\0"
+ /* _mesa_function_pool[9126]: VertexAttrib3sNV (will be remapped) */
+ "iiii\0"
+ "glVertexAttrib3sNV\0"
+ "\0"
+ /* _mesa_function_pool[9151]: ColorFragmentOp1ATI (will be remapped) */
+ "iiiiiii\0"
+ "glColorFragmentOp1ATI\0"
+ "\0"
+ /* _mesa_function_pool[9182]: ProgramUniformMatrix4x3fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4x3fv\0"
+ "glProgramUniformMatrix4x3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[9248]: PopClientAttrib (offset 334) */
+ "\0"
+ "glPopClientAttrib\0"
+ "\0"
+ /* _mesa_function_pool[9268]: DrawElementsInstancedARB (will be remapped) */
+ "iiipi\0"
+ "glDrawElementsInstancedARB\0"
+ "glDrawElementsInstancedEXT\0"
+ "glDrawElementsInstanced\0"
+ "\0"
+ /* _mesa_function_pool[9353]: GetQueryObjectuiv (will be remapped) */
+ "iip\0"
+ "glGetQueryObjectuiv\0"
+ "glGetQueryObjectuivARB\0"
+ "glGetQueryObjectuivEXT\0"
+ "\0"
+ /* _mesa_function_pool[9424]: VertexAttribI4bv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4bvEXT\0"
+ "glVertexAttribI4bv\0"
+ "\0"
+ /* _mesa_function_pool[9469]: FogCoordPointerListIBM (dynamic) */
+ "iipi\0"
+ "glFogCoordPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[9500]: DisableVertexArrayAttrib (will be remapped) */
+ "ii\0"
+ "glDisableVertexArrayAttrib\0"
+ "\0"
+ /* _mesa_function_pool[9531]: VertexAttribL4d (will be remapped) */
+ "idddd\0"
+ "glVertexAttribL4d\0"
+ "\0"
+ /* _mesa_function_pool[9556]: Binormal3sEXT (dynamic) */
+ "iii\0"
+ "glBinormal3sEXT\0"
+ "\0"
+ /* _mesa_function_pool[9577]: ListBase (offset 6) */
+ "i\0"
+ "glListBase\0"
+ "\0"
+ /* _mesa_function_pool[9591]: GenerateMipmap (will be remapped) */
+ "i\0"
+ "glGenerateMipmap\0"
+ "glGenerateMipmapEXT\0"
+ "glGenerateMipmapOES\0"
+ "\0"
+ /* _mesa_function_pool[9651]: BindBufferRange (will be remapped) */
+ "iiiii\0"
+ "glBindBufferRange\0"
+ "glBindBufferRangeEXT\0"
+ "\0"
+ /* _mesa_function_pool[9697]: ProgramUniformMatrix2x4fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2x4fv\0"
+ "glProgramUniformMatrix2x4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[9763]: BindBufferBase (will be remapped) */
+ "iii\0"
+ "glBindBufferBase\0"
+ "glBindBufferBaseEXT\0"
+ "\0"
+ /* _mesa_function_pool[9805]: GetQueryObjectiv (will be remapped) */
+ "iip\0"
+ "glGetQueryObjectiv\0"
+ "glGetQueryObjectivARB\0"
+ "glGetQueryObjectivEXT\0"
+ "\0"
+ /* _mesa_function_pool[9873]: VertexAttrib2s (will be remapped) */
+ "iii\0"
+ "glVertexAttrib2s\0"
+ "glVertexAttrib2sARB\0"
+ "\0"
+ /* _mesa_function_pool[9915]: SecondaryColor3fvEXT (will be remapped) */
+ "p\0"
+ "glSecondaryColor3fv\0"
+ "glSecondaryColor3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[9961]: VertexAttrib2d (will be remapped) */
+ "idd\0"
+ "glVertexAttrib2d\0"
+ "glVertexAttrib2dARB\0"
+ "\0"
+ /* _mesa_function_pool[10003]: ClearNamedFramebufferiv (will be remapped) */
+ "iiip\0"
+ "glClearNamedFramebufferiv\0"
+ "\0"
+ /* _mesa_function_pool[10035]: Uniform1fv (will be remapped) */
+ "iip\0"
+ "glUniform1fv\0"
+ "glUniform1fvARB\0"
+ "\0"
+ /* _mesa_function_pool[10069]: GetProgramPipelineInfoLog (will be remapped) */
+ "iipp\0"
+ "glGetProgramPipelineInfoLog\0"
+ "glGetProgramPipelineInfoLogEXT\0"
+ "\0"
+ /* _mesa_function_pool[10134]: TextureMaterialEXT (dynamic) */
+ "ii\0"
+ "glTextureMaterialEXT\0"
+ "\0"
+ /* _mesa_function_pool[10159]: DepthBoundsEXT (will be remapped) */
+ "dd\0"
+ "glDepthBoundsEXT\0"
+ "\0"
+ /* _mesa_function_pool[10180]: BufferStorageMemEXT (will be remapped) */
+ "iiii\0"
+ "glBufferStorageMemEXT\0"
+ "\0"
+ /* _mesa_function_pool[10208]: WindowPos3fv (will be remapped) */
+ "p\0"
+ "glWindowPos3fv\0"
+ "glWindowPos3fvARB\0"
+ "glWindowPos3fvMESA\0"
+ "\0"
+ /* _mesa_function_pool[10263]: BindVertexArrayAPPLE (dynamic) */
+ "i\0"
+ "glBindVertexArrayAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[10289]: GetHistogramParameteriv (offset 363) */
+ "iip\0"
+ "glGetHistogramParameteriv\0"
+ "glGetHistogramParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[10349]: PointParameteriv (will be remapped) */
+ "ip\0"
+ "glPointParameteriv\0"
+ "glPointParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[10393]: NamedRenderbufferStorage (will be remapped) */
+ "iiii\0"
+ "glNamedRenderbufferStorage\0"
+ "\0"
+ /* _mesa_function_pool[10426]: GetProgramivARB (will be remapped) */
+ "iip\0"
+ "glGetProgramivARB\0"
+ "\0"
+ /* _mesa_function_pool[10449]: BindRenderbuffer (will be remapped) */
+ "ii\0"
+ "glBindRenderbuffer\0"
+ "glBindRenderbufferOES\0"
+ "\0"
+ /* _mesa_function_pool[10494]: SecondaryColor3fEXT (will be remapped) */
+ "fff\0"
+ "glSecondaryColor3f\0"
+ "glSecondaryColor3fEXT\0"
+ "\0"
+ /* _mesa_function_pool[10540]: PrimitiveRestartIndex (will be remapped) */
+ "i\0"
+ "glPrimitiveRestartIndex\0"
+ "glPrimitiveRestartIndexNV\0"
+ "\0"
+ /* _mesa_function_pool[10593]: TextureStorageMem3DEXT (will be remapped) */
+ "iiiiiiii\0"
+ "glTextureStorageMem3DEXT\0"
+ "\0"
+ /* _mesa_function_pool[10628]: VertexAttribI4ubv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4ubvEXT\0"
+ "glVertexAttribI4ubv\0"
+ "\0"
+ /* _mesa_function_pool[10675]: GetGraphicsResetStatusARB (will be remapped) */
+ "\0"
+ "glGetGraphicsResetStatusARB\0"
+ "glGetGraphicsResetStatus\0"
+ "glGetGraphicsResetStatusKHR\0"
+ "\0"
+ /* _mesa_function_pool[10758]: CreateRenderbuffers (will be remapped) */
+ "ip\0"
+ "glCreateRenderbuffers\0"
+ "\0"
+ /* _mesa_function_pool[10784]: ActiveStencilFaceEXT (will be remapped) */
+ "i\0"
+ "glActiveStencilFaceEXT\0"
+ "\0"
+ /* _mesa_function_pool[10810]: VertexAttrib4dNV (will be remapped) */
+ "idddd\0"
+ "glVertexAttrib4dNV\0"
+ "\0"
+ /* _mesa_function_pool[10836]: DepthRange (offset 288) */
+ "dd\0"
+ "glDepthRange\0"
+ "\0"
+ /* _mesa_function_pool[10853]: TexBumpParameterivATI (will be remapped) */
+ "ip\0"
+ "glTexBumpParameterivATI\0"
+ "\0"
+ /* _mesa_function_pool[10881]: VertexAttrib4fNV (will be remapped) */
+ "iffff\0"
+ "glVertexAttrib4fNV\0"
+ "\0"
+ /* _mesa_function_pool[10907]: Uniform4fv (will be remapped) */
+ "iip\0"
+ "glUniform4fv\0"
+ "glUniform4fvARB\0"
+ "\0"
+ /* _mesa_function_pool[10941]: DrawMeshArraysSUN (dynamic) */
+ "iiii\0"
+ "glDrawMeshArraysSUN\0"
+ "\0"
+ /* _mesa_function_pool[10967]: SamplerParameterIiv (will be remapped) */
+ "iip\0"
+ "glSamplerParameterIiv\0"
+ "glSamplerParameterIivEXT\0"
+ "glSamplerParameterIivOES\0"
+ "\0"
+ /* _mesa_function_pool[11044]: GetMapControlPointsNV (dynamic) */
+ "iiiiiip\0"
+ "glGetMapControlPointsNV\0"
+ "\0"
+ /* _mesa_function_pool[11077]: SpriteParameterivSGIX (dynamic) */
+ "ip\0"
+ "glSpriteParameterivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[11105]: Frustumf (will be remapped) */
+ "ffffff\0"
+ "glFrustumfOES\0"
+ "glFrustumf\0"
+ "\0"
+ /* _mesa_function_pool[11138]: GetQueryBufferObjectui64v (will be remapped) */
+ "iiii\0"
+ "glGetQueryBufferObjectui64v\0"
+ "\0"
+ /* _mesa_function_pool[11172]: ProgramUniform2uiv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2uiv\0"
+ "glProgramUniform2uivEXT\0"
+ "\0"
+ /* _mesa_function_pool[11223]: Rectsv (offset 93) */
+ "pp\0"
+ "glRectsv\0"
+ "\0"
+ /* _mesa_function_pool[11236]: Frustumx (will be remapped) */
+ "iiiiii\0"
+ "glFrustumxOES\0"
+ "glFrustumx\0"
+ "\0"
+ /* _mesa_function_pool[11269]: CullFace (offset 152) */
+ "i\0"
+ "glCullFace\0"
+ "\0"
+ /* _mesa_function_pool[11283]: BindTexture (offset 307) */
+ "ii\0"
+ "glBindTexture\0"
+ "glBindTextureEXT\0"
+ "\0"
+ /* _mesa_function_pool[11318]: MultiTexCoord4fARB (offset 402) */
+ "iffff\0"
+ "glMultiTexCoord4f\0"
+ "glMultiTexCoord4fARB\0"
+ "\0"
+ /* _mesa_function_pool[11364]: Uniform2ui64ARB (will be remapped) */
+ "iii\0"
+ "glUniform2ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[11387]: MultiTexCoordP2uiv (will be remapped) */
+ "iip\0"
+ "glMultiTexCoordP2uiv\0"
+ "\0"
+ /* _mesa_function_pool[11413]: BeginPerfQueryINTEL (will be remapped) */
+ "i\0"
+ "glBeginPerfQueryINTEL\0"
+ "\0"
+ /* _mesa_function_pool[11438]: NormalPointer (offset 318) */
+ "iip\0"
+ "glNormalPointer\0"
+ "\0"
+ /* _mesa_function_pool[11459]: TangentPointerEXT (dynamic) */
+ "iip\0"
+ "glTangentPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[11484]: WindowPos4iMESA (will be remapped) */
+ "iiii\0"
+ "glWindowPos4iMESA\0"
+ "\0"
+ /* _mesa_function_pool[11508]: ReferencePlaneSGIX (dynamic) */
+ "p\0"
+ "glReferencePlaneSGIX\0"
+ "\0"
+ /* _mesa_function_pool[11532]: VertexAttrib4bv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4bv\0"
+ "glVertexAttrib4bvARB\0"
+ "\0"
+ /* _mesa_function_pool[11575]: ReplacementCodeuivSUN (dynamic) */
+ "p\0"
+ "glReplacementCodeuivSUN\0"
+ "\0"
+ /* _mesa_function_pool[11602]: SecondaryColor3usv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3usv\0"
+ "glSecondaryColor3usvEXT\0"
+ "\0"
+ /* _mesa_function_pool[11650]: GetPixelMapuiv (offset 272) */
+ "ip\0"
+ "glGetPixelMapuiv\0"
+ "\0"
+ /* _mesa_function_pool[11671]: MapNamedBuffer (will be remapped) */
+ "ii\0"
+ "glMapNamedBuffer\0"
+ "\0"
+ /* _mesa_function_pool[11692]: Indexfv (offset 47) */
+ "p\0"
+ "glIndexfv\0"
+ "\0"
+ /* _mesa_function_pool[11705]: AlphaFragmentOp1ATI (will be remapped) */
+ "iiiiii\0"
+ "glAlphaFragmentOp1ATI\0"
+ "\0"
+ /* _mesa_function_pool[11735]: ListParameteriSGIX (dynamic) */
+ "iii\0"
+ "glListParameteriSGIX\0"
+ "\0"
+ /* _mesa_function_pool[11761]: GetFloatv (offset 262) */
+ "ip\0"
+ "glGetFloatv\0"
+ "\0"
+ /* _mesa_function_pool[11777]: ProgramUniform2dv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2dv\0"
+ "\0"
+ /* _mesa_function_pool[11803]: MultiTexCoord3i (offset 396) */
+ "iiii\0"
+ "glMultiTexCoord3i\0"
+ "glMultiTexCoord3iARB\0"
+ "\0"
+ /* _mesa_function_pool[11848]: ProgramUniform1fv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1fv\0"
+ "glProgramUniform1fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[11897]: MultiTexCoord3d (offset 392) */
+ "iddd\0"
+ "glMultiTexCoord3d\0"
+ "glMultiTexCoord3dARB\0"
+ "\0"
+ /* _mesa_function_pool[11942]: TexCoord3sv (offset 117) */
+ "p\0"
+ "glTexCoord3sv\0"
+ "\0"
+ /* _mesa_function_pool[11959]: Fogfv (offset 154) */
+ "ip\0"
+ "glFogfv\0"
+ "\0"
+ /* _mesa_function_pool[11971]: Minmax (offset 368) */
+ "iii\0"
+ "glMinmax\0"
+ "glMinmaxEXT\0"
+ "\0"
+ /* _mesa_function_pool[11997]: MultiTexCoord3s (offset 398) */
+ "iiii\0"
+ "glMultiTexCoord3s\0"
+ "glMultiTexCoord3sARB\0"
+ "\0"
+ /* _mesa_function_pool[12042]: FinishTextureSUNX (dynamic) */
+ "\0"
+ "glFinishTextureSUNX\0"
+ "\0"
+ /* _mesa_function_pool[12064]: GetFinalCombinerInputParameterfvNV (dynamic) */
+ "iip\0"
+ "glGetFinalCombinerInputParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[12106]: PollInstrumentsSGIX (dynamic) */
+ "p\0"
+ "glPollInstrumentsSGIX\0"
+ "\0"
+ /* _mesa_function_pool[12131]: Vertex4iv (offset 147) */
+ "p\0"
+ "glVertex4iv\0"
+ "\0"
+ /* _mesa_function_pool[12146]: BufferSubData (will be remapped) */
+ "iiip\0"
+ "glBufferSubData\0"
+ "glBufferSubDataARB\0"
+ "\0"
+ /* _mesa_function_pool[12187]: TexCoord4dv (offset 119) */
+ "p\0"
+ "glTexCoord4dv\0"
+ "\0"
+ /* _mesa_function_pool[12204]: Normal3fVertex3fSUN (dynamic) */
+ "ffffff\0"
+ "glNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[12234]: Begin (offset 7) */
+ "i\0"
+ "glBegin\0"
+ "\0"
+ /* _mesa_function_pool[12245]: LightModeli (offset 165) */
+ "ii\0"
+ "glLightModeli\0"
+ "\0"
+ /* _mesa_function_pool[12263]: UniformMatrix2fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2fv\0"
+ "glUniformMatrix2fvARB\0"
+ "\0"
+ /* _mesa_function_pool[12310]: LightModelf (offset 163) */
+ "if\0"
+ "glLightModelf\0"
+ "\0"
+ /* _mesa_function_pool[12328]: GetTexParameterfv (offset 282) */
+ "iip\0"
+ "glGetTexParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[12353]: TextureStorage1D (will be remapped) */
+ "iiii\0"
+ "glTextureStorage1D\0"
+ "\0"
+ /* _mesa_function_pool[12378]: BinormalPointerEXT (dynamic) */
+ "iip\0"
+ "glBinormalPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[12404]: GetCombinerInputParameterivNV (dynamic) */
+ "iiiip\0"
+ "glGetCombinerInputParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[12443]: DeleteAsyncMarkersSGIX (dynamic) */
+ "ii\0"
+ "glDeleteAsyncMarkersSGIX\0"
+ "\0"
+ /* _mesa_function_pool[12472]: MultiTexCoord2fvARB (offset 387) */
+ "ip\0"
+ "glMultiTexCoord2fv\0"
+ "glMultiTexCoord2fvARB\0"
+ "\0"
+ /* _mesa_function_pool[12517]: VertexAttrib4ubv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4ubv\0"
+ "glVertexAttrib4ubvARB\0"
+ "\0"
+ /* _mesa_function_pool[12562]: GetnTexImageARB (will be remapped) */
+ "iiiiip\0"
+ "glGetnTexImageARB\0"
+ "\0"
+ /* _mesa_function_pool[12588]: ColorMask (offset 210) */
+ "iiii\0"
+ "glColorMask\0"
+ "\0"
+ /* _mesa_function_pool[12606]: GenAsyncMarkersSGIX (dynamic) */
+ "i\0"
+ "glGenAsyncMarkersSGIX\0"
+ "\0"
+ /* _mesa_function_pool[12631]: MultiTexCoord4x (will be remapped) */
+ "iiiii\0"
+ "glMultiTexCoord4xOES\0"
+ "glMultiTexCoord4x\0"
+ "\0"
+ /* _mesa_function_pool[12677]: ReplacementCodeuiVertex3fSUN (dynamic) */
+ "ifff\0"
+ "glReplacementCodeuiVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[12714]: UniformHandleui64ARB (will be remapped) */
+ "ii\0"
+ "glUniformHandleui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[12741]: VertexAttribs4svNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs4svNV\0"
+ "\0"
+ /* _mesa_function_pool[12767]: DrawElementsInstancedBaseInstance (will be remapped) */
+ "iiipii\0"
+ "glDrawElementsInstancedBaseInstance\0"
+ "glDrawElementsInstancedBaseInstanceEXT\0"
+ "\0"
+ /* _mesa_function_pool[12850]: UniformMatrix4fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4fv\0"
+ "glUniformMatrix4fvARB\0"
+ "\0"
+ /* _mesa_function_pool[12897]: UniformMatrix3x2fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3x2fv\0"
+ "\0"
+ /* _mesa_function_pool[12924]: VertexAttrib4Nuiv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Nuiv\0"
+ "glVertexAttrib4NuivARB\0"
+ "\0"
+ /* _mesa_function_pool[12971]: ClientActiveTexture (offset 375) */
+ "i\0"
+ "glClientActiveTexture\0"
+ "glClientActiveTextureARB\0"
+ "\0"
+ /* _mesa_function_pool[13021]: GetUniformIndices (will be remapped) */
+ "iipp\0"
+ "glGetUniformIndices\0"
+ "\0"
+ /* _mesa_function_pool[13047]: GetTexBumpParameterivATI (will be remapped) */
+ "ip\0"
+ "glGetTexBumpParameterivATI\0"
+ "\0"
+ /* _mesa_function_pool[13078]: Binormal3bEXT (dynamic) */
+ "iii\0"
+ "glBinormal3bEXT\0"
+ "\0"
+ /* _mesa_function_pool[13099]: CombinerParameterivNV (dynamic) */
+ "ip\0"
+ "glCombinerParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[13127]: MultiTexCoord2sv (offset 391) */
+ "ip\0"
+ "glMultiTexCoord2sv\0"
+ "glMultiTexCoord2svARB\0"
+ "\0"
+ /* _mesa_function_pool[13172]: NamedBufferStorage (will be remapped) */
+ "iipi\0"
+ "glNamedBufferStorage\0"
+ "\0"
+ /* _mesa_function_pool[13199]: NamedFramebufferDrawBuffer (will be remapped) */
+ "ii\0"
+ "glNamedFramebufferDrawBuffer\0"
+ "\0"
+ /* _mesa_function_pool[13232]: NamedFramebufferTextureLayer (will be remapped) */
+ "iiiii\0"
+ "glNamedFramebufferTextureLayer\0"
+ "\0"
+ /* _mesa_function_pool[13270]: LoadIdentity (offset 290) */
+ "\0"
+ "glLoadIdentity\0"
+ "\0"
+ /* _mesa_function_pool[13287]: ActiveShaderProgram (will be remapped) */
+ "ii\0"
+ "glActiveShaderProgram\0"
+ "glActiveShaderProgramEXT\0"
+ "\0"
+ /* _mesa_function_pool[13338]: BindImageTextures (will be remapped) */
+ "iip\0"
+ "glBindImageTextures\0"
+ "\0"
+ /* _mesa_function_pool[13363]: DeleteTransformFeedbacks (will be remapped) */
+ "ip\0"
+ "glDeleteTransformFeedbacks\0"
+ "\0"
+ /* _mesa_function_pool[13394]: VertexAttrib4ubvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4ubvNV\0"
+ "\0"
+ /* _mesa_function_pool[13419]: FogCoordfEXT (will be remapped) */
+ "f\0"
+ "glFogCoordf\0"
+ "glFogCoordfEXT\0"
+ "\0"
+ /* _mesa_function_pool[13449]: GetMapfv (offset 267) */
+ "iip\0"
+ "glGetMapfv\0"
+ "\0"
+ /* _mesa_function_pool[13465]: GetProgramInfoLog (will be remapped) */
+ "iipp\0"
+ "glGetProgramInfoLog\0"
+ "\0"
+ /* _mesa_function_pool[13491]: BindTransformFeedback (will be remapped) */
+ "ii\0"
+ "glBindTransformFeedback\0"
+ "\0"
+ /* _mesa_function_pool[13519]: TexCoord4fColor4fNormal3fVertex4fvSUN (dynamic) */
+ "pppp\0"
+ "glTexCoord4fColor4fNormal3fVertex4fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[13565]: GetPixelMapfv (offset 271) */
+ "ip\0"
+ "glGetPixelMapfv\0"
+ "\0"
+ /* _mesa_function_pool[13585]: TextureBufferRange (will be remapped) */
+ "iiiii\0"
+ "glTextureBufferRange\0"
+ "\0"
+ /* _mesa_function_pool[13613]: WeightivARB (dynamic) */
+ "ip\0"
+ "glWeightivARB\0"
+ "\0"
+ /* _mesa_function_pool[13631]: VertexAttrib4svNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4svNV\0"
+ "\0"
+ /* _mesa_function_pool[13655]: PatchParameteri (will be remapped) */
+ "ii\0"
+ "glPatchParameteri\0"
+ "glPatchParameteriEXT\0"
+ "glPatchParameteriOES\0"
+ "\0"
+ /* _mesa_function_pool[13719]: ReplacementCodeuiTexCoord2fVertex3fSUN (dynamic) */
+ "ifffff\0"
+ "glReplacementCodeuiTexCoord2fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[13768]: GetNamedBufferSubData (will be remapped) */
+ "iiip\0"
+ "glGetNamedBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[13798]: VDPAUSurfaceAccessNV (will be remapped) */
+ "ii\0"
+ "glVDPAUSurfaceAccessNV\0"
+ "\0"
+ /* _mesa_function_pool[13825]: EdgeFlagPointer (offset 312) */
+ "ip\0"
+ "glEdgeFlagPointer\0"
+ "\0"
+ /* _mesa_function_pool[13847]: WindowPos2f (will be remapped) */
+ "ff\0"
+ "glWindowPos2f\0"
+ "glWindowPos2fARB\0"
+ "glWindowPos2fMESA\0"
+ "\0"
+ /* _mesa_function_pool[13900]: WindowPos2d (will be remapped) */
+ "dd\0"
+ "glWindowPos2d\0"
+ "glWindowPos2dARB\0"
+ "glWindowPos2dMESA\0"
+ "\0"
+ /* _mesa_function_pool[13953]: GetVertexAttribLdv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribLdv\0"
+ "\0"
+ /* _mesa_function_pool[13979]: WindowPos2i (will be remapped) */
+ "ii\0"
+ "glWindowPos2i\0"
+ "glWindowPos2iARB\0"
+ "glWindowPos2iMESA\0"
+ "\0"
+ /* _mesa_function_pool[14032]: WindowPos2s (will be remapped) */
+ "ii\0"
+ "glWindowPos2s\0"
+ "glWindowPos2sARB\0"
+ "glWindowPos2sMESA\0"
+ "\0"
+ /* _mesa_function_pool[14085]: VertexAttribI1uiEXT (will be remapped) */
+ "ii\0"
+ "glVertexAttribI1uiEXT\0"
+ "glVertexAttribI1ui\0"
+ "\0"
+ /* _mesa_function_pool[14130]: DeleteSync (will be remapped) */
+ "i\0"
+ "glDeleteSync\0"
+ "\0"
+ /* _mesa_function_pool[14146]: WindowPos4fvMESA (will be remapped) */
+ "p\0"
+ "glWindowPos4fvMESA\0"
+ "\0"
+ /* _mesa_function_pool[14168]: CompressedTexImage3D (will be remapped) */
+ "iiiiiiiip\0"
+ "glCompressedTexImage3D\0"
+ "glCompressedTexImage3DARB\0"
+ "glCompressedTexImage3DOES\0"
+ "\0"
+ /* _mesa_function_pool[14254]: GenSemaphoresEXT (will be remapped) */
+ "ip\0"
+ "glGenSemaphoresEXT\0"
+ "\0"
+ /* _mesa_function_pool[14277]: VertexAttribI1uiv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI1uivEXT\0"
+ "glVertexAttribI1uiv\0"
+ "\0"
+ /* _mesa_function_pool[14324]: SecondaryColor3dv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3dv\0"
+ "glSecondaryColor3dvEXT\0"
+ "\0"
+ /* _mesa_function_pool[14370]: GetListParameterivSGIX (dynamic) */
+ "iip\0"
+ "glGetListParameterivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[14400]: GetnPixelMapusvARB (will be remapped) */
+ "iip\0"
+ "glGetnPixelMapusvARB\0"
+ "\0"
+ /* _mesa_function_pool[14426]: VertexAttrib3s (will be remapped) */
+ "iiii\0"
+ "glVertexAttrib3s\0"
+ "glVertexAttrib3sARB\0"
+ "\0"
+ /* _mesa_function_pool[14469]: UniformMatrix4x3fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4x3fv\0"
+ "\0"
+ /* _mesa_function_pool[14496]: Binormal3dEXT (dynamic) */
+ "ddd\0"
+ "glBinormal3dEXT\0"
+ "\0"
+ /* _mesa_function_pool[14517]: GetQueryiv (will be remapped) */
+ "iip\0"
+ "glGetQueryiv\0"
+ "glGetQueryivARB\0"
+ "glGetQueryivEXT\0"
+ "\0"
+ /* _mesa_function_pool[14567]: VertexAttrib3d (will be remapped) */
+ "iddd\0"
+ "glVertexAttrib3d\0"
+ "glVertexAttrib3dARB\0"
+ "\0"
+ /* _mesa_function_pool[14610]: ImageTransformParameterfHP (dynamic) */
+ "iif\0"
+ "glImageTransformParameterfHP\0"
+ "\0"
+ /* _mesa_function_pool[14644]: MapNamedBufferRange (will be remapped) */
+ "iiii\0"
+ "glMapNamedBufferRange\0"
+ "\0"
+ /* _mesa_function_pool[14672]: MapBuffer (will be remapped) */
+ "ii\0"
+ "glMapBuffer\0"
+ "glMapBufferARB\0"
+ "glMapBufferOES\0"
+ "\0"
+ /* _mesa_function_pool[14718]: GetProgramStageiv (will be remapped) */
+ "iiip\0"
+ "glGetProgramStageiv\0"
+ "\0"
+ /* _mesa_function_pool[14744]: VertexAttrib4Nbv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Nbv\0"
+ "glVertexAttrib4NbvARB\0"
+ "\0"
+ /* _mesa_function_pool[14789]: ProgramBinary (will be remapped) */
+ "iipi\0"
+ "glProgramBinary\0"
+ "glProgramBinaryOES\0"
+ "\0"
+ /* _mesa_function_pool[14830]: InvalidateTexImage (will be remapped) */
+ "ii\0"
+ "glInvalidateTexImage\0"
+ "\0"
+ /* _mesa_function_pool[14855]: Uniform4ui (will be remapped) */
+ "iiiii\0"
+ "glUniform4uiEXT\0"
+ "glUniform4ui\0"
+ "\0"
+ /* _mesa_function_pool[14891]: VertexArrayAttribFormat (will be remapped) */
+ "iiiiii\0"
+ "glVertexArrayAttribFormat\0"
+ "\0"
+ /* _mesa_function_pool[14925]: VertexAttrib1fARB (will be remapped) */
+ "if\0"
+ "glVertexAttrib1f\0"
+ "glVertexAttrib1fARB\0"
+ "\0"
+ /* _mesa_function_pool[14966]: GetBooleani_v (will be remapped) */
+ "iip\0"
+ "glGetBooleanIndexedvEXT\0"
+ "glGetBooleani_v\0"
+ "\0"
+ /* _mesa_function_pool[15011]: DrawTexsOES (will be remapped) */
+ "iiiii\0"
+ "glDrawTexsOES\0"
+ "\0"
+ /* _mesa_function_pool[15032]: GetObjectPtrLabel (will be remapped) */
+ "pipp\0"
+ "glGetObjectPtrLabel\0"
+ "glGetObjectPtrLabelKHR\0"
+ "\0"
+ /* _mesa_function_pool[15081]: ProgramParameteri (will be remapped) */
+ "iii\0"
+ "glProgramParameteri\0"
+ "glProgramParameteriEXT\0"
+ "\0"
+ /* _mesa_function_pool[15129]: SecondaryColorPointerListIBM (dynamic) */
+ "iiipi\0"
+ "glSecondaryColorPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[15167]: Color3fv (offset 14) */
+ "p\0"
+ "glColor3fv\0"
+ "\0"
+ /* _mesa_function_pool[15181]: ReplacementCodeubSUN (dynamic) */
+ "i\0"
+ "glReplacementCodeubSUN\0"
+ "\0"
+ /* _mesa_function_pool[15207]: GetnMapfvARB (will be remapped) */
+ "iiip\0"
+ "glGetnMapfvARB\0"
+ "\0"
+ /* _mesa_function_pool[15228]: MultiTexCoord2i (offset 388) */
+ "iii\0"
+ "glMultiTexCoord2i\0"
+ "glMultiTexCoord2iARB\0"
+ "\0"
+ /* _mesa_function_pool[15272]: MultiTexCoord2d (offset 384) */
+ "idd\0"
+ "glMultiTexCoord2d\0"
+ "glMultiTexCoord2dARB\0"
+ "\0"
+ /* _mesa_function_pool[15316]: SamplerParameterIuiv (will be remapped) */
+ "iip\0"
+ "glSamplerParameterIuiv\0"
+ "glSamplerParameterIuivEXT\0"
+ "glSamplerParameterIuivOES\0"
+ "\0"
+ /* _mesa_function_pool[15396]: MultiTexCoord2s (offset 390) */
+ "iii\0"
+ "glMultiTexCoord2s\0"
+ "glMultiTexCoord2sARB\0"
+ "\0"
+ /* _mesa_function_pool[15440]: GetInternalformati64v (will be remapped) */
+ "iiiip\0"
+ "glGetInternalformati64v\0"
+ "\0"
+ /* _mesa_function_pool[15471]: VDPAURegisterVideoSurfaceNV (will be remapped) */
+ "piip\0"
+ "glVDPAURegisterVideoSurfaceNV\0"
+ "\0"
+ /* _mesa_function_pool[15507]: TexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */
+ "ffffffffffff\0"
+ "glTexCoord2fColor4fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[15560]: Indexub (offset 315) */
+ "i\0"
+ "glIndexub\0"
+ "\0"
+ /* _mesa_function_pool[15573]: GetPerfMonitorCounterDataAMD (will be remapped) */
+ "iiipp\0"
+ "glGetPerfMonitorCounterDataAMD\0"
+ "\0"
+ /* _mesa_function_pool[15611]: MultTransposeMatrixf (will be remapped) */
+ "p\0"
+ "glMultTransposeMatrixf\0"
+ "glMultTransposeMatrixfARB\0"
+ "\0"
+ /* _mesa_function_pool[15663]: PolygonOffsetEXT (will be remapped) */
+ "ff\0"
+ "glPolygonOffsetEXT\0"
+ "\0"
+ /* _mesa_function_pool[15686]: Scalex (will be remapped) */
+ "iii\0"
+ "glScalexOES\0"
+ "glScalex\0"
+ "\0"
+ /* _mesa_function_pool[15712]: Scaled (offset 301) */
+ "ddd\0"
+ "glScaled\0"
+ "\0"
+ /* _mesa_function_pool[15726]: Scalef (offset 302) */
+ "fff\0"
+ "glScalef\0"
+ "\0"
+ /* _mesa_function_pool[15740]: IndexPointerEXT (will be remapped) */
+ "iiip\0"
+ "glIndexPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[15764]: GetUniformfv (will be remapped) */
+ "iip\0"
+ "glGetUniformfv\0"
+ "glGetUniformfvARB\0"
+ "\0"
+ /* _mesa_function_pool[15802]: ColorFragmentOp2ATI (will be remapped) */
+ "iiiiiiiiii\0"
+ "glColorFragmentOp2ATI\0"
+ "\0"
+ /* _mesa_function_pool[15836]: VertexAttrib2sNV (will be remapped) */
+ "iii\0"
+ "glVertexAttrib2sNV\0"
+ "\0"
+ /* _mesa_function_pool[15860]: ReadPixels (offset 256) */
+ "iiiiiip\0"
+ "glReadPixels\0"
+ "\0"
+ /* _mesa_function_pool[15882]: NormalPointerListIBM (dynamic) */
+ "iipi\0"
+ "glNormalPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[15911]: QueryCounter (will be remapped) */
+ "ii\0"
+ "glQueryCounter\0"
+ "glQueryCounterEXT\0"
+ "\0"
+ /* _mesa_function_pool[15948]: NormalPointerEXT (will be remapped) */
+ "iiip\0"
+ "glNormalPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[15973]: GetSubroutineIndex (will be remapped) */
+ "iip\0"
+ "glGetSubroutineIndex\0"
+ "\0"
+ /* _mesa_function_pool[15999]: ProgramUniform3iv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3iv\0"
+ "glProgramUniform3ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[16048]: ProgramUniformMatrix2dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2dv\0"
+ "\0"
+ /* _mesa_function_pool[16081]: ClearTexSubImage (will be remapped) */
+ "iiiiiiiiiip\0"
+ "glClearTexSubImage\0"
+ "\0"
+ /* _mesa_function_pool[16113]: GetActiveUniformBlockName (will be remapped) */
+ "iiipp\0"
+ "glGetActiveUniformBlockName\0"
+ "\0"
+ /* _mesa_function_pool[16148]: DrawElementsBaseVertex (will be remapped) */
+ "iiipi\0"
+ "glDrawElementsBaseVertex\0"
+ "glDrawElementsBaseVertexEXT\0"
+ "glDrawElementsBaseVertexOES\0"
+ "\0"
+ /* _mesa_function_pool[16236]: RasterPos3iv (offset 75) */
+ "p\0"
+ "glRasterPos3iv\0"
+ "\0"
+ /* _mesa_function_pool[16254]: ColorMaski (will be remapped) */
+ "iiiii\0"
+ "glColorMaskIndexedEXT\0"
+ "glColorMaski\0"
+ "glColorMaskiEXT\0"
+ "glColorMaskiOES\0"
+ "\0"
+ /* _mesa_function_pool[16328]: Uniform2uiv (will be remapped) */
+ "iip\0"
+ "glUniform2uivEXT\0"
+ "glUniform2uiv\0"
+ "\0"
+ /* _mesa_function_pool[16364]: RasterPos3s (offset 76) */
+ "iii\0"
+ "glRasterPos3s\0"
+ "\0"
+ /* _mesa_function_pool[16383]: RasterPos3d (offset 70) */
+ "ddd\0"
+ "glRasterPos3d\0"
+ "\0"
+ /* _mesa_function_pool[16402]: RasterPos3f (offset 72) */
+ "fff\0"
+ "glRasterPos3f\0"
+ "\0"
+ /* _mesa_function_pool[16421]: BindVertexArray (will be remapped) */
+ "i\0"
+ "glBindVertexArray\0"
+ "glBindVertexArrayOES\0"
+ "\0"
+ /* _mesa_function_pool[16463]: RasterPos3i (offset 74) */
+ "iii\0"
+ "glRasterPos3i\0"
+ "\0"
+ /* _mesa_function_pool[16482]: VertexAttribL3dv (will be remapped) */
+ "ip\0"
+ "glVertexAttribL3dv\0"
+ "\0"
+ /* _mesa_function_pool[16505]: GetTexParameteriv (offset 283) */
+ "iip\0"
+ "glGetTexParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[16530]: DrawTransformFeedbackStreamInstanced (will be remapped) */
+ "iiii\0"
+ "glDrawTransformFeedbackStreamInstanced\0"
+ "\0"
+ /* _mesa_function_pool[16575]: VertexAttrib2fvARB (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2fv\0"
+ "glVertexAttrib2fvARB\0"
+ "\0"
+ /* _mesa_function_pool[16618]: VertexPointerListIBM (dynamic) */
+ "iiipi\0"
+ "glVertexPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[16648]: GetProgramResourceName (will be remapped) */
+ "iiiipp\0"
+ "glGetProgramResourceName\0"
+ "\0"
+ /* _mesa_function_pool[16681]: TexCoord2fNormal3fVertex3fSUN (dynamic) */
+ "ffffffff\0"
+ "glTexCoord2fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[16723]: ProgramUniformMatrix4x3dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4x3dv\0"
+ "\0"
+ /* _mesa_function_pool[16758]: IsFenceNV (dynamic) */
+ "i\0"
+ "glIsFenceNV\0"
+ "\0"
+ /* _mesa_function_pool[16773]: ColorTable (offset 339) */
+ "iiiiip\0"
+ "glColorTable\0"
+ "glColorTableSGI\0"
+ "glColorTableEXT\0"
+ "\0"
+ /* _mesa_function_pool[16826]: LoadName (offset 198) */
+ "i\0"
+ "glLoadName\0"
+ "\0"
+ /* _mesa_function_pool[16840]: Color3fVertex3fSUN (dynamic) */
+ "ffffff\0"
+ "glColor3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[16869]: GetnUniformuivARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformuivARB\0"
+ "glGetnUniformuiv\0"
+ "glGetnUniformuivKHR\0"
+ "\0"
+ /* _mesa_function_pool[16932]: ClearIndex (offset 205) */
+ "f\0"
+ "glClearIndex\0"
+ "\0"
+ /* _mesa_function_pool[16948]: ConvolutionParameterfv (offset 351) */
+ "iip\0"
+ "glConvolutionParameterfv\0"
+ "glConvolutionParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[17006]: TbufferMask3DFX (dynamic) */
+ "i\0"
+ "glTbufferMask3DFX\0"
+ "\0"
+ /* _mesa_function_pool[17027]: GetTexGendv (offset 278) */
+ "iip\0"
+ "glGetTexGendv\0"
+ "\0"
+ /* _mesa_function_pool[17046]: FlushMappedNamedBufferRange (will be remapped) */
+ "iii\0"
+ "glFlushMappedNamedBufferRange\0"
+ "\0"
+ /* _mesa_function_pool[17081]: MultiTexCoordP1ui (will be remapped) */
+ "iii\0"
+ "glMultiTexCoordP1ui\0"
+ "\0"
+ /* _mesa_function_pool[17106]: EvalMesh2 (offset 238) */
+ "iiiii\0"
+ "glEvalMesh2\0"
+ "\0"
+ /* _mesa_function_pool[17125]: Vertex4fv (offset 145) */
+ "p\0"
+ "glVertex4fv\0"
+ "\0"
+ /* _mesa_function_pool[17140]: ProgramUniform4i64ARB (will be remapped) */
+ "iiiiii\0"
+ "glProgramUniform4i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[17172]: SelectPerfMonitorCountersAMD (will be remapped) */
+ "iiiip\0"
+ "glSelectPerfMonitorCountersAMD\0"
+ "\0"
+ /* _mesa_function_pool[17210]: TextureStorage2D (will be remapped) */
+ "iiiii\0"
+ "glTextureStorage2D\0"
+ "\0"
+ /* _mesa_function_pool[17236]: GetTextureParameterIiv (will be remapped) */
+ "iip\0"
+ "glGetTextureParameterIiv\0"
+ "\0"
+ /* _mesa_function_pool[17266]: BindFramebuffer (will be remapped) */
+ "ii\0"
+ "glBindFramebuffer\0"
+ "glBindFramebufferOES\0"
+ "\0"
+ /* _mesa_function_pool[17309]: ReplacementCodeuiNormal3fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glReplacementCodeuiNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[17354]: GetMinmax (offset 364) */
+ "iiiip\0"
+ "glGetMinmax\0"
+ "glGetMinmaxEXT\0"
+ "\0"
+ /* _mesa_function_pool[17388]: Color3fVertex3fvSUN (dynamic) */
+ "pp\0"
+ "glColor3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[17414]: VertexAttribs3svNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs3svNV\0"
+ "\0"
+ /* _mesa_function_pool[17440]: GetActiveUniformsiv (will be remapped) */
+ "iipip\0"
+ "glGetActiveUniformsiv\0"
+ "\0"
+ /* _mesa_function_pool[17469]: VertexAttrib2sv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2sv\0"
+ "glVertexAttrib2svARB\0"
+ "\0"
+ /* _mesa_function_pool[17512]: GetProgramEnvParameterdvARB (will be remapped) */
+ "iip\0"
+ "glGetProgramEnvParameterdvARB\0"
+ "\0"
+ /* _mesa_function_pool[17547]: GetSharpenTexFuncSGIS (dynamic) */
+ "ip\0"
+ "glGetSharpenTexFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[17575]: Uniform1dv (will be remapped) */
+ "iip\0"
+ "glUniform1dv\0"
+ "\0"
+ /* _mesa_function_pool[17593]: PixelTransformParameterfvEXT (dynamic) */
+ "iip\0"
+ "glPixelTransformParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[17629]: TransformFeedbackBufferRange (will be remapped) */
+ "iiiii\0"
+ "glTransformFeedbackBufferRange\0"
+ "\0"
+ /* _mesa_function_pool[17667]: PushDebugGroup (will be remapped) */
+ "iiip\0"
+ "glPushDebugGroup\0"
+ "glPushDebugGroupKHR\0"
+ "\0"
+ /* _mesa_function_pool[17710]: ReplacementCodeuiNormal3fVertex3fSUN (dynamic) */
+ "iffffff\0"
+ "glReplacementCodeuiNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[17758]: GetPerfMonitorGroupStringAMD (will be remapped) */
+ "iipp\0"
+ "glGetPerfMonitorGroupStringAMD\0"
+ "\0"
+ /* _mesa_function_pool[17795]: GetError (offset 261) */
+ "\0"
+ "glGetError\0"
+ "\0"
+ /* _mesa_function_pool[17808]: PassThrough (offset 199) */
+ "f\0"
+ "glPassThrough\0"
+ "\0"
+ /* _mesa_function_pool[17825]: GetListParameterfvSGIX (dynamic) */
+ "iip\0"
+ "glGetListParameterfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[17855]: PatchParameterfv (will be remapped) */
+ "ip\0"
+ "glPatchParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[17878]: GetObjectParameterivAPPLE (will be remapped) */
+ "iiip\0"
+ "glGetObjectParameterivAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[17912]: GlobalAlphaFactorubSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactorubSUN\0"
+ "\0"
+ /* _mesa_function_pool[17940]: BindBuffersRange (will be remapped) */
+ "iiippp\0"
+ "glBindBuffersRange\0"
+ "\0"
+ /* _mesa_function_pool[17967]: VertexAttrib4fvARB (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4fv\0"
+ "glVertexAttrib4fvARB\0"
+ "\0"
+ /* _mesa_function_pool[18010]: Uniform3i64vARB (will be remapped) */
+ "iip\0"
+ "glUniform3i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[18033]: WindowPos3dv (will be remapped) */
+ "p\0"
+ "glWindowPos3dv\0"
+ "glWindowPos3dvARB\0"
+ "glWindowPos3dvMESA\0"
+ "\0"
+ /* _mesa_function_pool[18088]: TexGenxOES (will be remapped) */
+ "iii\0"
+ "glTexGenxOES\0"
+ "\0"
+ /* _mesa_function_pool[18106]: VertexArrayAttribIFormat (will be remapped) */
+ "iiiii\0"
+ "glVertexArrayAttribIFormat\0"
+ "\0"
+ /* _mesa_function_pool[18140]: DeleteFencesNV (dynamic) */
+ "ip\0"
+ "glDeleteFencesNV\0"
+ "\0"
+ /* _mesa_function_pool[18161]: GetImageTransformParameterivHP (dynamic) */
+ "iip\0"
+ "glGetImageTransformParameterivHP\0"
+ "\0"
+ /* _mesa_function_pool[18199]: StencilOp (offset 244) */
+ "iii\0"
+ "glStencilOp\0"
+ "\0"
+ /* _mesa_function_pool[18216]: Binormal3fEXT (dynamic) */
+ "fff\0"
+ "glBinormal3fEXT\0"
+ "\0"
+ /* _mesa_function_pool[18237]: ProgramUniform1iv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1iv\0"
+ "glProgramUniform1ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[18286]: ProgramUniform3ui (will be remapped) */
+ "iiiii\0"
+ "glProgramUniform3ui\0"
+ "glProgramUniform3uiEXT\0"
+ "\0"
+ /* _mesa_function_pool[18336]: SecondaryColor3sv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3sv\0"
+ "glSecondaryColor3svEXT\0"
+ "\0"
+ /* _mesa_function_pool[18382]: TexCoordP3ui (will be remapped) */
+ "ii\0"
+ "glTexCoordP3ui\0"
+ "\0"
+ /* _mesa_function_pool[18401]: VertexArrayElementBuffer (will be remapped) */
+ "ii\0"
+ "glVertexArrayElementBuffer\0"
+ "\0"
+ /* _mesa_function_pool[18432]: Fogxv (will be remapped) */
+ "ip\0"
+ "glFogxvOES\0"
+ "glFogxv\0"
+ "\0"
+ /* _mesa_function_pool[18455]: VertexPointervINTEL (dynamic) */
+ "iip\0"
+ "glVertexPointervINTEL\0"
+ "\0"
+ /* _mesa_function_pool[18482]: Uniform3i64ARB (will be remapped) */
+ "iiii\0"
+ "glUniform3i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[18505]: VertexAttribP1ui (will be remapped) */
+ "iiii\0"
+ "glVertexAttribP1ui\0"
+ "\0"
+ /* _mesa_function_pool[18530]: GetImageHandleARB (will be remapped) */
+ "iiiii\0"
+ "glGetImageHandleARB\0"
+ "\0"
+ /* _mesa_function_pool[18557]: DeleteLists (offset 4) */
+ "ii\0"
+ "glDeleteLists\0"
+ "\0"
+ /* _mesa_function_pool[18575]: LogicOp (offset 242) */
+ "i\0"
+ "glLogicOp\0"
+ "\0"
+ /* _mesa_function_pool[18588]: RenderbufferStorageMultisample (will be remapped) */
+ "iiiii\0"
+ "glRenderbufferStorageMultisample\0"
+ "glRenderbufferStorageMultisampleEXT\0"
+ "\0"
+ /* _mesa_function_pool[18664]: GetTransformFeedbacki64_v (will be remapped) */
+ "iiip\0"
+ "glGetTransformFeedbacki64_v\0"
+ "\0"
+ /* _mesa_function_pool[18698]: WindowPos3d (will be remapped) */
+ "ddd\0"
+ "glWindowPos3d\0"
+ "glWindowPos3dARB\0"
+ "glWindowPos3dMESA\0"
+ "\0"
+ /* _mesa_function_pool[18752]: Enablei (will be remapped) */
+ "ii\0"
+ "glEnableIndexedEXT\0"
+ "glEnablei\0"
+ "glEnableiEXT\0"
+ "glEnableiOES\0"
+ "\0"
+ /* _mesa_function_pool[18811]: WindowPos3f (will be remapped) */
+ "fff\0"
+ "glWindowPos3f\0"
+ "glWindowPos3fARB\0"
+ "glWindowPos3fMESA\0"
+ "\0"
+ /* _mesa_function_pool[18865]: GenProgramsARB (will be remapped) */
+ "ip\0"
+ "glGenProgramsARB\0"
+ "glGenProgramsNV\0"
+ "\0"
+ /* _mesa_function_pool[18902]: RasterPos2sv (offset 69) */
+ "p\0"
+ "glRasterPos2sv\0"
+ "\0"
+ /* _mesa_function_pool[18920]: WindowPos3i (will be remapped) */
+ "iii\0"
+ "glWindowPos3i\0"
+ "glWindowPos3iARB\0"
+ "glWindowPos3iMESA\0"
+ "\0"
+ /* _mesa_function_pool[18974]: MultiTexCoord4iv (offset 405) */
+ "ip\0"
+ "glMultiTexCoord4iv\0"
+ "glMultiTexCoord4ivARB\0"
+ "\0"
+ /* _mesa_function_pool[19019]: TexCoord1sv (offset 101) */
+ "p\0"
+ "glTexCoord1sv\0"
+ "\0"
+ /* _mesa_function_pool[19036]: WindowPos3s (will be remapped) */
+ "iii\0"
+ "glWindowPos3s\0"
+ "glWindowPos3sARB\0"
+ "glWindowPos3sMESA\0"
+ "\0"
+ /* _mesa_function_pool[19090]: PixelMapusv (offset 253) */
+ "iip\0"
+ "glPixelMapusv\0"
+ "\0"
+ /* _mesa_function_pool[19109]: DebugMessageInsert (will be remapped) */
+ "iiiiip\0"
+ "glDebugMessageInsertARB\0"
+ "glDebugMessageInsert\0"
+ "glDebugMessageInsertKHR\0"
+ "\0"
+ /* _mesa_function_pool[19186]: Orthof (will be remapped) */
+ "ffffff\0"
+ "glOrthofOES\0"
+ "glOrthof\0"
+ "\0"
+ /* _mesa_function_pool[19215]: CompressedTexImage2D (will be remapped) */
+ "iiiiiiip\0"
+ "glCompressedTexImage2D\0"
+ "glCompressedTexImage2DARB\0"
+ "\0"
+ /* _mesa_function_pool[19274]: DeleteObjectARB (will be remapped) */
+ "i\0"
+ "glDeleteObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[19295]: ProgramUniformMatrix2x3dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2x3dv\0"
+ "\0"
+ /* _mesa_function_pool[19330]: GetVertexArrayiv (will be remapped) */
+ "iip\0"
+ "glGetVertexArrayiv\0"
+ "\0"
+ /* _mesa_function_pool[19354]: IsSync (will be remapped) */
+ "i\0"
+ "glIsSync\0"
+ "\0"
+ /* _mesa_function_pool[19366]: Color4uiv (offset 38) */
+ "p\0"
+ "glColor4uiv\0"
+ "\0"
+ /* _mesa_function_pool[19381]: MultiTexCoord1sv (offset 383) */
+ "ip\0"
+ "glMultiTexCoord1sv\0"
+ "glMultiTexCoord1svARB\0"
+ "\0"
+ /* _mesa_function_pool[19426]: Orthox (will be remapped) */
+ "iiiiii\0"
+ "glOrthoxOES\0"
+ "glOrthox\0"
+ "\0"
+ /* _mesa_function_pool[19455]: PushAttrib (offset 219) */
+ "i\0"
+ "glPushAttrib\0"
+ "\0"
+ /* _mesa_function_pool[19471]: RasterPos2i (offset 66) */
+ "ii\0"
+ "glRasterPos2i\0"
+ "\0"
+ /* _mesa_function_pool[19489]: ClipPlane (offset 150) */
+ "ip\0"
+ "glClipPlane\0"
+ "\0"
+ /* _mesa_function_pool[19505]: TexCoord2fColor3fVertex3fSUN (dynamic) */
+ "ffffffff\0"
+ "glTexCoord2fColor3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[19546]: GetProgramivNV (will be remapped) */
+ "iip\0"
+ "glGetProgramivNV\0"
+ "\0"
+ /* _mesa_function_pool[19568]: RasterPos2f (offset 64) */
+ "ff\0"
+ "glRasterPos2f\0"
+ "\0"
+ /* _mesa_function_pool[19586]: GetActiveSubroutineUniformiv (will be remapped) */
+ "iiiip\0"
+ "glGetActiveSubroutineUniformiv\0"
+ "\0"
+ /* _mesa_function_pool[19624]: RasterPos2d (offset 62) */
+ "dd\0"
+ "glRasterPos2d\0"
+ "\0"
+ /* _mesa_function_pool[19642]: MakeImageHandleResidentARB (will be remapped) */
+ "ii\0"
+ "glMakeImageHandleResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[19675]: InvalidateSubFramebuffer (will be remapped) */
+ "iipiiii\0"
+ "glInvalidateSubFramebuffer\0"
+ "\0"
+ /* _mesa_function_pool[19711]: Color4ub (offset 35) */
+ "iiii\0"
+ "glColor4ub\0"
+ "\0"
+ /* _mesa_function_pool[19728]: UniformMatrix2x4dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2x4dv\0"
+ "\0"
+ /* _mesa_function_pool[19755]: RasterPos2s (offset 68) */
+ "ii\0"
+ "glRasterPos2s\0"
+ "\0"
+ /* _mesa_function_pool[19773]: DispatchComputeGroupSizeARB (will be remapped) */
+ "iiiiii\0"
+ "glDispatchComputeGroupSizeARB\0"
+ "\0"
+ /* _mesa_function_pool[19811]: VertexP2uiv (will be remapped) */
+ "ip\0"
+ "glVertexP2uiv\0"
+ "\0"
+ /* _mesa_function_pool[19829]: Color4fNormal3fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glColor4fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[19864]: VertexArrayBindingDivisor (will be remapped) */
+ "iii\0"
+ "glVertexArrayBindingDivisor\0"
+ "\0"
+ /* _mesa_function_pool[19897]: GetVertexAttribivNV (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribivNV\0"
+ "\0"
+ /* _mesa_function_pool[19924]: TexSubImage4DSGIS (dynamic) */
+ "iiiiiiiiiiiip\0"
+ "glTexSubImage4DSGIS\0"
+ "\0"
+ /* _mesa_function_pool[19959]: MultiTexCoord3dv (offset 393) */
+ "ip\0"
+ "glMultiTexCoord3dv\0"
+ "glMultiTexCoord3dvARB\0"
+ "\0"
+ /* _mesa_function_pool[20004]: BindProgramPipeline (will be remapped) */
+ "i\0"
+ "glBindProgramPipeline\0"
+ "glBindProgramPipelineEXT\0"
+ "\0"
+ /* _mesa_function_pool[20054]: VertexAttribP4uiv (will be remapped) */
+ "iiip\0"
+ "glVertexAttribP4uiv\0"
+ "\0"
+ /* _mesa_function_pool[20080]: DebugMessageCallback (will be remapped) */
+ "pp\0"
+ "glDebugMessageCallbackARB\0"
+ "glDebugMessageCallback\0"
+ "glDebugMessageCallbackKHR\0"
+ "\0"
+ /* _mesa_function_pool[20159]: MultiTexCoord1i (offset 380) */
+ "ii\0"
+ "glMultiTexCoord1i\0"
+ "glMultiTexCoord1iARB\0"
+ "\0"
+ /* _mesa_function_pool[20202]: WindowPos2dv (will be remapped) */
+ "p\0"
+ "glWindowPos2dv\0"
+ "glWindowPos2dvARB\0"
+ "glWindowPos2dvMESA\0"
+ "\0"
+ /* _mesa_function_pool[20257]: TexParameterIuiv (will be remapped) */
+ "iip\0"
+ "glTexParameterIuivEXT\0"
+ "glTexParameterIuiv\0"
+ "glTexParameterIuivOES\0"
+ "\0"
+ /* _mesa_function_pool[20325]: DeletePerfQueryINTEL (will be remapped) */
+ "i\0"
+ "glDeletePerfQueryINTEL\0"
+ "\0"
+ /* _mesa_function_pool[20351]: MultiTexCoord1d (offset 376) */
+ "id\0"
+ "glMultiTexCoord1d\0"
+ "glMultiTexCoord1dARB\0"
+ "\0"
+ /* _mesa_function_pool[20394]: GenVertexArraysAPPLE (dynamic) */
+ "ip\0"
+ "glGenVertexArraysAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[20421]: MultiTexCoord1s (offset 382) */
+ "ii\0"
+ "glMultiTexCoord1s\0"
+ "glMultiTexCoord1sARB\0"
+ "\0"
+ /* _mesa_function_pool[20464]: BeginConditionalRender (will be remapped) */
+ "ii\0"
+ "glBeginConditionalRender\0"
+ "glBeginConditionalRenderNV\0"
+ "\0"
+ /* _mesa_function_pool[20520]: LoadPaletteFromModelViewMatrixOES (dynamic) */
+ "\0"
+ "glLoadPaletteFromModelViewMatrixOES\0"
+ "\0"
+ /* _mesa_function_pool[20558]: GetShaderiv (will be remapped) */
+ "iip\0"
+ "glGetShaderiv\0"
+ "\0"
+ /* _mesa_function_pool[20577]: GetMapAttribParameterfvNV (dynamic) */
+ "iiip\0"
+ "glGetMapAttribParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[20611]: CopyConvolutionFilter1D (offset 354) */
+ "iiiii\0"
+ "glCopyConvolutionFilter1D\0"
+ "glCopyConvolutionFilter1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[20673]: ClearBufferfv (will be remapped) */
+ "iip\0"
+ "glClearBufferfv\0"
+ "\0"
+ /* _mesa_function_pool[20694]: UniformMatrix4dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4dv\0"
+ "\0"
+ /* _mesa_function_pool[20719]: InstrumentsBufferSGIX (dynamic) */
+ "ip\0"
+ "glInstrumentsBufferSGIX\0"
+ "\0"
+ /* _mesa_function_pool[20747]: CreateShaderObjectARB (will be remapped) */
+ "i\0"
+ "glCreateShaderObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[20774]: GetTexParameterxv (will be remapped) */
+ "iip\0"
+ "glGetTexParameterxvOES\0"
+ "glGetTexParameterxv\0"
+ "\0"
+ /* _mesa_function_pool[20822]: GetAttachedShaders (will be remapped) */
+ "iipp\0"
+ "glGetAttachedShaders\0"
+ "\0"
+ /* _mesa_function_pool[20849]: ClearBufferfi (will be remapped) */
+ "iifi\0"
+ "glClearBufferfi\0"
+ "\0"
+ /* _mesa_function_pool[20871]: Materialiv (offset 172) */
+ "iip\0"
+ "glMaterialiv\0"
+ "\0"
+ /* _mesa_function_pool[20889]: DeleteFragmentShaderATI (will be remapped) */
+ "i\0"
+ "glDeleteFragmentShaderATI\0"
+ "\0"
+ /* _mesa_function_pool[20918]: VertexArrayVertexBuffers (will be remapped) */
+ "iiippp\0"
+ "glVertexArrayVertexBuffers\0"
+ "\0"
+ /* _mesa_function_pool[20953]: DrawElementsInstancedBaseVertex (will be remapped) */
+ "iiipii\0"
+ "glDrawElementsInstancedBaseVertex\0"
+ "glDrawElementsInstancedBaseVertexEXT\0"
+ "glDrawElementsInstancedBaseVertexOES\0"
+ "\0"
+ /* _mesa_function_pool[21069]: DisableClientState (offset 309) */
+ "i\0"
+ "glDisableClientState\0"
+ "\0"
+ /* _mesa_function_pool[21093]: TexGeni (offset 192) */
+ "iii\0"
+ "glTexGeni\0"
+ "glTexGeniOES\0"
+ "\0"
+ /* _mesa_function_pool[21121]: TexGenf (offset 190) */
+ "iif\0"
+ "glTexGenf\0"
+ "glTexGenfOES\0"
+ "\0"
+ /* _mesa_function_pool[21149]: TexGend (offset 188) */
+ "iid\0"
+ "glTexGend\0"
+ "\0"
+ /* _mesa_function_pool[21164]: GetVertexAttribfvNV (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribfvNV\0"
+ "\0"
+ /* _mesa_function_pool[21191]: ProgramUniform4i64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[21222]: ColorPointerListIBM (dynamic) */
+ "iiipi\0"
+ "glColorPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[21251]: Color4sv (offset 34) */
+ "p\0"
+ "glColor4sv\0"
+ "\0"
+ /* _mesa_function_pool[21265]: GetCombinerInputParameterfvNV (dynamic) */
+ "iiiip\0"
+ "glGetCombinerInputParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[21304]: LoadTransposeMatrixf (will be remapped) */
+ "p\0"
+ "glLoadTransposeMatrixf\0"
+ "glLoadTransposeMatrixfARB\0"
+ "\0"
+ /* _mesa_function_pool[21356]: LoadTransposeMatrixd (will be remapped) */
+ "p\0"
+ "glLoadTransposeMatrixd\0"
+ "glLoadTransposeMatrixdARB\0"
+ "\0"
+ /* _mesa_function_pool[21408]: PixelZoom (offset 246) */
+ "ff\0"
+ "glPixelZoom\0"
+ "\0"
+ /* _mesa_function_pool[21424]: ProgramEnvParameter4dARB (will be remapped) */
+ "iidddd\0"
+ "glProgramEnvParameter4dARB\0"
+ "glProgramParameter4dNV\0"
+ "\0"
+ /* _mesa_function_pool[21482]: ColorTableParameterfv (offset 340) */
+ "iip\0"
+ "glColorTableParameterfv\0"
+ "glColorTableParameterfvSGI\0"
+ "\0"
+ /* _mesa_function_pool[21538]: IsSemaphoreEXT (will be remapped) */
+ "i\0"
+ "glIsSemaphoreEXT\0"
+ "\0"
+ /* _mesa_function_pool[21558]: IsTexture (offset 330) */
+ "i\0"
+ "glIsTexture\0"
+ "glIsTextureEXT\0"
+ "\0"
+ /* _mesa_function_pool[21588]: ProgramUniform3uiv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3uiv\0"
+ "glProgramUniform3uivEXT\0"
+ "\0"
+ /* _mesa_function_pool[21639]: IndexPointer (offset 314) */
+ "iip\0"
+ "glIndexPointer\0"
+ "\0"
+ /* _mesa_function_pool[21659]: ImageTransformParameterivHP (dynamic) */
+ "iip\0"
+ "glImageTransformParameterivHP\0"
+ "\0"
+ /* _mesa_function_pool[21694]: VertexAttrib4sNV (will be remapped) */
+ "iiiii\0"
+ "glVertexAttrib4sNV\0"
+ "\0"
+ /* _mesa_function_pool[21720]: GetMapdv (offset 266) */
+ "iip\0"
+ "glGetMapdv\0"
+ "\0"
+ /* _mesa_function_pool[21736]: Uniform3ui64vARB (will be remapped) */
+ "iip\0"
+ "glUniform3ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[21760]: GetInteger64i_v (will be remapped) */
+ "iip\0"
+ "glGetInteger64i_v\0"
+ "\0"
+ /* _mesa_function_pool[21783]: ReplacementCodeuiColor4ubVertex3fSUN (dynamic) */
+ "iiiiifff\0"
+ "glReplacementCodeuiColor4ubVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[21832]: BufferPageCommitmentARB (will be remapped) */
+ "iiii\0"
+ "glBufferPageCommitmentARB\0"
+ "\0"
+ /* _mesa_function_pool[21864]: IsBuffer (will be remapped) */
+ "i\0"
+ "glIsBuffer\0"
+ "glIsBufferARB\0"
+ "\0"
+ /* _mesa_function_pool[21892]: ColorP4ui (will be remapped) */
+ "ii\0"
+ "glColorP4ui\0"
+ "\0"
+ /* _mesa_function_pool[21908]: TextureStorage3D (will be remapped) */
+ "iiiiii\0"
+ "glTextureStorage3D\0"
+ "\0"
+ /* _mesa_function_pool[21935]: SpriteParameteriSGIX (dynamic) */
+ "ii\0"
+ "glSpriteParameteriSGIX\0"
+ "\0"
+ /* _mesa_function_pool[21962]: TexCoordP3uiv (will be remapped) */
+ "ip\0"
+ "glTexCoordP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[21982]: WeightusvARB (dynamic) */
+ "ip\0"
+ "glWeightusvARB\0"
+ "\0"
+ /* _mesa_function_pool[22001]: GetnUniformui64vARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[22029]: EvalMapsNV (dynamic) */
+ "ii\0"
+ "glEvalMapsNV\0"
+ "\0"
+ /* _mesa_function_pool[22046]: TextureStorageMem2DMultisampleEXT (will be remapped) */
+ "iiiiiiii\0"
+ "glTextureStorageMem2DMultisampleEXT\0"
+ "\0"
+ /* _mesa_function_pool[22092]: ReplacementCodeuiSUN (dynamic) */
+ "i\0"
+ "glReplacementCodeuiSUN\0"
+ "\0"
+ /* _mesa_function_pool[22118]: GlobalAlphaFactoruiSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactoruiSUN\0"
+ "\0"
+ /* _mesa_function_pool[22146]: Uniform1iv (will be remapped) */
+ "iip\0"
+ "glUniform1iv\0"
+ "glUniform1ivARB\0"
+ "\0"
+ /* _mesa_function_pool[22180]: Uniform4uiv (will be remapped) */
+ "iip\0"
+ "glUniform4uivEXT\0"
+ "glUniform4uiv\0"
+ "\0"
+ /* _mesa_function_pool[22216]: PopDebugGroup (will be remapped) */
+ "\0"
+ "glPopDebugGroup\0"
+ "glPopDebugGroupKHR\0"
+ "\0"
+ /* _mesa_function_pool[22253]: VertexAttrib1d (will be remapped) */
+ "id\0"
+ "glVertexAttrib1d\0"
+ "glVertexAttrib1dARB\0"
+ "\0"
+ /* _mesa_function_pool[22294]: CompressedTexImage1D (will be remapped) */
+ "iiiiiip\0"
+ "glCompressedTexImage1D\0"
+ "glCompressedTexImage1DARB\0"
+ "\0"
+ /* _mesa_function_pool[22352]: NamedBufferSubData (will be remapped) */
+ "iiip\0"
+ "glNamedBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[22379]: TexBufferRange (will be remapped) */
+ "iiiii\0"
+ "glTexBufferRange\0"
+ "glTexBufferRangeEXT\0"
+ "glTexBufferRangeOES\0"
+ "\0"
+ /* _mesa_function_pool[22443]: VertexAttrib1s (will be remapped) */
+ "ii\0"
+ "glVertexAttrib1s\0"
+ "glVertexAttrib1sARB\0"
+ "\0"
+ /* _mesa_function_pool[22484]: MultiDrawElementsIndirect (will be remapped) */
+ "iipii\0"
+ "glMultiDrawElementsIndirect\0"
+ "\0"
+ /* _mesa_function_pool[22519]: UniformMatrix4x3dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4x3dv\0"
+ "\0"
+ /* _mesa_function_pool[22546]: TransformFeedbackBufferBase (will be remapped) */
+ "iii\0"
+ "glTransformFeedbackBufferBase\0"
+ "\0"
+ /* _mesa_function_pool[22581]: FogCoordfvEXT (will be remapped) */
+ "p\0"
+ "glFogCoordfv\0"
+ "glFogCoordfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[22613]: Uniform2ui64vARB (will be remapped) */
+ "iip\0"
+ "glUniform2ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[22637]: GetColorTableParameterfv (offset 344) */
+ "iip\0"
+ "glGetColorTableParameterfv\0"
+ "glGetColorTableParameterfvSGI\0"
+ "glGetColorTableParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[22729]: MultiTexCoord3fARB (offset 394) */
+ "ifff\0"
+ "glMultiTexCoord3f\0"
+ "glMultiTexCoord3fARB\0"
+ "\0"
+ /* _mesa_function_pool[22774]: GetTexLevelParameterfv (offset 284) */
+ "iiip\0"
+ "glGetTexLevelParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[22805]: Vertex2sv (offset 133) */
+ "p\0"
+ "glVertex2sv\0"
+ "\0"
+ /* _mesa_function_pool[22820]: GetnMapdvARB (will be remapped) */
+ "iiip\0"
+ "glGetnMapdvARB\0"
+ "\0"
+ /* _mesa_function_pool[22841]: VertexAttrib2dNV (will be remapped) */
+ "idd\0"
+ "glVertexAttrib2dNV\0"
+ "\0"
+ /* _mesa_function_pool[22865]: GetTrackMatrixivNV (will be remapped) */
+ "iiip\0"
+ "glGetTrackMatrixivNV\0"
+ "\0"
+ /* _mesa_function_pool[22892]: VertexAttrib3svNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3svNV\0"
+ "\0"
+ /* _mesa_function_pool[22916]: GetTexEnviv (offset 277) */
+ "iip\0"
+ "glGetTexEnviv\0"
+ "\0"
+ /* _mesa_function_pool[22935]: ViewportArrayv (will be remapped) */
+ "iip\0"
+ "glViewportArrayv\0"
+ "glViewportArrayvOES\0"
+ "\0"
+ /* _mesa_function_pool[22977]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN (dynamic) */
+ "iffffffffffff\0"
+ "glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[23048]: SeparableFilter2D (offset 360) */
+ "iiiiiipp\0"
+ "glSeparableFilter2D\0"
+ "glSeparableFilter2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[23101]: ReplacementCodeuiColor4ubVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glReplacementCodeuiColor4ubVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[23146]: ArrayElement (offset 306) */
+ "i\0"
+ "glArrayElement\0"
+ "glArrayElementEXT\0"
+ "\0"
+ /* _mesa_function_pool[23182]: TexImage2D (offset 183) */
+ "iiiiiiiip\0"
+ "glTexImage2D\0"
+ "\0"
+ /* _mesa_function_pool[23206]: FragmentMaterialiSGIX (dynamic) */
+ "iii\0"
+ "glFragmentMaterialiSGIX\0"
+ "\0"
+ /* _mesa_function_pool[23235]: RasterPos2dv (offset 63) */
+ "p\0"
+ "glRasterPos2dv\0"
+ "\0"
+ /* _mesa_function_pool[23253]: Fogiv (offset 156) */
+ "ip\0"
+ "glFogiv\0"
+ "\0"
+ /* _mesa_function_pool[23265]: EndQuery (will be remapped) */
+ "i\0"
+ "glEndQuery\0"
+ "glEndQueryARB\0"
+ "glEndQueryEXT\0"
+ "\0"
+ /* _mesa_function_pool[23307]: TexCoord1dv (offset 95) */
+ "p\0"
+ "glTexCoord1dv\0"
+ "\0"
+ /* _mesa_function_pool[23324]: AlphaFragmentOp3ATI (will be remapped) */
+ "iiiiiiiiiiii\0"
+ "glAlphaFragmentOp3ATI\0"
+ "\0"
+ /* _mesa_function_pool[23360]: GetVertexAttribdvNV (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribdvNV\0"
+ "\0"
+ /* _mesa_function_pool[23387]: Clear (offset 203) */
+ "i\0"
+ "glClear\0"
+ "\0"
+ /* _mesa_function_pool[23398]: VertexAttrib4sv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4sv\0"
+ "glVertexAttrib4svARB\0"
+ "\0"
+ /* _mesa_function_pool[23441]: Ortho (offset 296) */
+ "dddddd\0"
+ "glOrtho\0"
+ "\0"
+ /* _mesa_function_pool[23457]: Uniform3uiv (will be remapped) */
+ "iip\0"
+ "glUniform3uivEXT\0"
+ "glUniform3uiv\0"
+ "\0"
+ /* _mesa_function_pool[23493]: MatrixIndexPointerARB (dynamic) */
+ "iiip\0"
+ "glMatrixIndexPointerARB\0"
+ "glMatrixIndexPointerOES\0"
+ "\0"
+ /* _mesa_function_pool[23547]: GetUniformi64vARB (will be remapped) */
+ "iip\0"
+ "glGetUniformi64vARB\0"
+ "\0"
+ /* _mesa_function_pool[23572]: EndQueryIndexed (will be remapped) */
+ "ii\0"
+ "glEndQueryIndexed\0"
+ "\0"
+ /* _mesa_function_pool[23594]: TexParameterxv (will be remapped) */
+ "iip\0"
+ "glTexParameterxvOES\0"
+ "glTexParameterxv\0"
+ "\0"
+ /* _mesa_function_pool[23636]: SampleMaskSGIS (will be remapped) */
+ "fi\0"
+ "glSampleMaskSGIS\0"
+ "glSampleMaskEXT\0"
+ "\0"
+ /* _mesa_function_pool[23673]: MultiDrawArraysIndirectCountARB (will be remapped) */
+ "iiiii\0"
+ "glMultiDrawArraysIndirectCountARB\0"
+ "glMultiDrawArraysIndirectCount\0"
+ "\0"
+ /* _mesa_function_pool[23745]: ProgramUniformMatrix2fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2fv\0"
+ "glProgramUniformMatrix2fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[23807]: ProgramLocalParameter4fvARB (will be remapped) */
+ "iip\0"
+ "glProgramLocalParameter4fvARB\0"
+ "\0"
+ /* _mesa_function_pool[23842]: GetProgramStringNV (will be remapped) */
+ "iip\0"
+ "glGetProgramStringNV\0"
+ "\0"
+ /* _mesa_function_pool[23868]: Binormal3svEXT (dynamic) */
+ "p\0"
+ "glBinormal3svEXT\0"
+ "\0"
+ /* _mesa_function_pool[23888]: Uniform4dv (will be remapped) */
+ "iip\0"
+ "glUniform4dv\0"
+ "\0"
+ /* _mesa_function_pool[23906]: GetUnsignedBytevEXT (will be remapped) */
+ "ip\0"
+ "glGetUnsignedBytevEXT\0"
+ "\0"
+ /* _mesa_function_pool[23932]: LightModelx (will be remapped) */
+ "ii\0"
+ "glLightModelxOES\0"
+ "glLightModelx\0"
+ "\0"
+ /* _mesa_function_pool[23967]: VertexAttribI3iEXT (will be remapped) */
+ "iiii\0"
+ "glVertexAttribI3iEXT\0"
+ "glVertexAttribI3i\0"
+ "\0"
+ /* _mesa_function_pool[24012]: ClearColorx (will be remapped) */
+ "iiii\0"
+ "glClearColorxOES\0"
+ "glClearColorx\0"
+ "\0"
+ /* _mesa_function_pool[24049]: EndTransformFeedback (will be remapped) */
+ "\0"
+ "glEndTransformFeedback\0"
+ "glEndTransformFeedbackEXT\0"
+ "\0"
+ /* _mesa_function_pool[24100]: VertexAttribL2dv (will be remapped) */
+ "ip\0"
+ "glVertexAttribL2dv\0"
+ "\0"
+ /* _mesa_function_pool[24123]: GetActiveUniformName (will be remapped) */
+ "iiipp\0"
+ "glGetActiveUniformName\0"
+ "\0"
+ /* _mesa_function_pool[24153]: GetProgramBinary (will be remapped) */
+ "iippp\0"
+ "glGetProgramBinary\0"
+ "glGetProgramBinaryOES\0"
+ "\0"
+ /* _mesa_function_pool[24201]: ViewportIndexedfv (will be remapped) */
+ "ip\0"
+ "glViewportIndexedfv\0"
+ "glViewportIndexedfvOES\0"
+ "\0"
+ /* _mesa_function_pool[24248]: BindTextureUnit (will be remapped) */
+ "ii\0"
+ "glBindTextureUnit\0"
+ "\0"
+ /* _mesa_function_pool[24270]: CallList (offset 2) */
+ "i\0"
+ "glCallList\0"
+ "\0"
+ /* _mesa_function_pool[24284]: Materialfv (offset 170) */
+ "iip\0"
+ "glMaterialfv\0"
+ "\0"
+ /* _mesa_function_pool[24302]: DeleteProgram (will be remapped) */
+ "i\0"
+ "glDeleteProgram\0"
+ "\0"
+ /* _mesa_function_pool[24321]: GetActiveAtomicCounterBufferiv (will be remapped) */
+ "iiip\0"
+ "glGetActiveAtomicCounterBufferiv\0"
+ "\0"
+ /* _mesa_function_pool[24360]: ClearDepthf (will be remapped) */
+ "f\0"
+ "glClearDepthf\0"
+ "glClearDepthfOES\0"
+ "\0"
+ /* _mesa_function_pool[24394]: VertexWeightfEXT (dynamic) */
+ "f\0"
+ "glVertexWeightfEXT\0"
+ "\0"
+ /* _mesa_function_pool[24416]: FlushVertexArrayRangeNV (dynamic) */
+ "\0"
+ "glFlushVertexArrayRangeNV\0"
+ "\0"
+ /* _mesa_function_pool[24444]: GetTextureHandleARB (will be remapped) */
+ "i\0"
+ "glGetTextureHandleARB\0"
+ "\0"
+ /* _mesa_function_pool[24469]: GetConvolutionFilter (offset 356) */
+ "iiip\0"
+ "glGetConvolutionFilter\0"
+ "glGetConvolutionFilterEXT\0"
+ "\0"
+ /* _mesa_function_pool[24524]: MultiModeDrawElementsIBM (will be remapped) */
+ "ppipii\0"
+ "glMultiModeDrawElementsIBM\0"
+ "\0"
+ /* _mesa_function_pool[24559]: Uniform2iv (will be remapped) */
+ "iip\0"
+ "glUniform2iv\0"
+ "glUniform2ivARB\0"
+ "\0"
+ /* _mesa_function_pool[24593]: GetFixedv (will be remapped) */
+ "ip\0"
+ "glGetFixedvOES\0"
+ "glGetFixedv\0"
+ "\0"
+ /* _mesa_function_pool[24624]: ProgramParameters4dvNV (will be remapped) */
+ "iiip\0"
+ "glProgramParameters4dvNV\0"
+ "\0"
+ /* _mesa_function_pool[24655]: Binormal3dvEXT (dynamic) */
+ "p\0"
+ "glBinormal3dvEXT\0"
+ "\0"
+ /* _mesa_function_pool[24675]: SampleCoveragex (will be remapped) */
+ "ii\0"
+ "glSampleCoveragexOES\0"
+ "glSampleCoveragex\0"
+ "\0"
+ /* _mesa_function_pool[24718]: GetPerfQueryInfoINTEL (will be remapped) */
+ "iippppp\0"
+ "glGetPerfQueryInfoINTEL\0"
+ "\0"
+ /* _mesa_function_pool[24751]: DeleteFramebuffers (will be remapped) */
+ "ip\0"
+ "glDeleteFramebuffers\0"
+ "glDeleteFramebuffersEXT\0"
+ "glDeleteFramebuffersOES\0"
+ "\0"
+ /* _mesa_function_pool[24824]: CombinerInputNV (dynamic) */
+ "iiiiii\0"
+ "glCombinerInputNV\0"
+ "\0"
+ /* _mesa_function_pool[24850]: VertexAttrib4uiv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4uiv\0"
+ "glVertexAttrib4uivARB\0"
+ "\0"
+ /* _mesa_function_pool[24895]: VertexAttrib4Nsv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Nsv\0"
+ "glVertexAttrib4NsvARB\0"
+ "\0"
+ /* _mesa_function_pool[24940]: Vertex4s (offset 148) */
+ "iiii\0"
+ "glVertex4s\0"
+ "\0"
+ /* _mesa_function_pool[24957]: VertexAttribI2iEXT (will be remapped) */
+ "iii\0"
+ "glVertexAttribI2iEXT\0"
+ "glVertexAttribI2i\0"
+ "\0"
+ /* _mesa_function_pool[25001]: Vertex4f (offset 144) */
+ "ffff\0"
+ "glVertex4f\0"
+ "\0"
+ /* _mesa_function_pool[25018]: Vertex4d (offset 142) */
+ "dddd\0"
+ "glVertex4d\0"
+ "\0"
+ /* _mesa_function_pool[25035]: VertexAttribL4dv (will be remapped) */
+ "ip\0"
+ "glVertexAttribL4dv\0"
+ "\0"
+ /* _mesa_function_pool[25058]: GetnUniformi64vARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformi64vARB\0"
+ "\0"
+ /* _mesa_function_pool[25085]: GetTexGenfv (offset 279) */
+ "iip\0"
+ "glGetTexGenfv\0"
+ "glGetTexGenfvOES\0"
+ "\0"
+ /* _mesa_function_pool[25121]: Vertex4i (offset 146) */
+ "iiii\0"
+ "glVertex4i\0"
+ "\0"
+ /* _mesa_function_pool[25138]: VertexWeightPointerEXT (dynamic) */
+ "iiip\0"
+ "glVertexWeightPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[25169]: MemoryBarrierByRegion (will be remapped) */
+ "i\0"
+ "glMemoryBarrierByRegion\0"
+ "\0"
+ /* _mesa_function_pool[25196]: StencilFuncSeparateATI (will be remapped) */
+ "iiii\0"
+ "glStencilFuncSeparateATI\0"
+ "\0"
+ /* _mesa_function_pool[25227]: GetVertexAttribIuiv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribIuivEXT\0"
+ "glGetVertexAttribIuiv\0"
+ "\0"
+ /* _mesa_function_pool[25279]: LightModelfv (offset 164) */
+ "ip\0"
+ "glLightModelfv\0"
+ "\0"
+ /* _mesa_function_pool[25298]: Vertex4dv (offset 143) */
+ "p\0"
+ "glVertex4dv\0"
+ "\0"
+ /* _mesa_function_pool[25313]: ProgramParameters4fvNV (will be remapped) */
+ "iiip\0"
+ "glProgramParameters4fvNV\0"
+ "\0"
+ /* _mesa_function_pool[25344]: GetInfoLogARB (will be remapped) */
+ "iipp\0"
+ "glGetInfoLogARB\0"
+ "\0"
+ /* _mesa_function_pool[25366]: StencilMask (offset 209) */
+ "i\0"
+ "glStencilMask\0"
+ "\0"
+ /* _mesa_function_pool[25383]: NamedFramebufferReadBuffer (will be remapped) */
+ "ii\0"
+ "glNamedFramebufferReadBuffer\0"
+ "\0"
+ /* _mesa_function_pool[25416]: ProgramUniformHandleui64ARB (will be remapped) */
+ "iii\0"
+ "glProgramUniformHandleui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[25451]: ProgramUniform2i64ARB (will be remapped) */
+ "iiii\0"
+ "glProgramUniform2i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[25481]: IsList (offset 287) */
+ "i\0"
+ "glIsList\0"
+ "\0"
+ /* _mesa_function_pool[25493]: ClearBufferiv (will be remapped) */
+ "iip\0"
+ "glClearBufferiv\0"
+ "\0"
+ /* _mesa_function_pool[25514]: GetIntegeri_v (will be remapped) */
+ "iip\0"
+ "glGetIntegerIndexedvEXT\0"
+ "glGetIntegeri_v\0"
+ "\0"
+ /* _mesa_function_pool[25559]: ProgramUniform2iv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2iv\0"
+ "glProgramUniform2ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[25608]: CreateVertexArrays (will be remapped) */
+ "ip\0"
+ "glCreateVertexArrays\0"
+ "\0"
+ /* _mesa_function_pool[25633]: FogCoordPointer (will be remapped) */
+ "iip\0"
+ "glFogCoordPointer\0"
+ "glFogCoordPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[25677]: SecondaryColor3us (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3us\0"
+ "glSecondaryColor3usEXT\0"
+ "\0"
+ /* _mesa_function_pool[25725]: DeformationMap3dSGIX (dynamic) */
+ "iddiiddiiddiip\0"
+ "glDeformationMap3dSGIX\0"
+ "\0"
+ /* _mesa_function_pool[25764]: TextureStorageMem1DEXT (will be remapped) */
+ "iiiiii\0"
+ "glTextureStorageMem1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[25797]: TextureNormalEXT (dynamic) */
+ "i\0"
+ "glTextureNormalEXT\0"
+ "\0"
+ /* _mesa_function_pool[25819]: SecondaryColor3ub (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3ub\0"
+ "glSecondaryColor3ubEXT\0"
+ "\0"
+ /* _mesa_function_pool[25867]: NamedBufferStorageMemEXT (will be remapped) */
+ "iiii\0"
+ "glNamedBufferStorageMemEXT\0"
+ "\0"
+ /* _mesa_function_pool[25900]: SecondaryColor3ui (will be remapped) */
+ "iii\0"
+ "glSecondaryColor3ui\0"
+ "glSecondaryColor3uiEXT\0"
+ "\0"
+ /* _mesa_function_pool[25948]: ProgramUniform4ui64ARB (will be remapped) */
+ "iiiiii\0"
+ "glProgramUniform4ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[25981]: Binormal3fvEXT (dynamic) */
+ "p\0"
+ "glBinormal3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[26001]: TexCoordPointervINTEL (dynamic) */
+ "iip\0"
+ "glTexCoordPointervINTEL\0"
+ "\0"
+ /* _mesa_function_pool[26030]: VertexAttrib1sNV (will be remapped) */
+ "ii\0"
+ "glVertexAttrib1sNV\0"
+ "\0"
+ /* _mesa_function_pool[26053]: Tangent3bEXT (dynamic) */
+ "iii\0"
+ "glTangent3bEXT\0"
+ "\0"
+ /* _mesa_function_pool[26073]: SignalSemaphoreEXT (will be remapped) */
+ "iipipp\0"
+ "glSignalSemaphoreEXT\0"
+ "\0"
+ /* _mesa_function_pool[26102]: TextureBuffer (will be remapped) */
+ "iii\0"
+ "glTextureBuffer\0"
+ "\0"
+ /* _mesa_function_pool[26123]: FragmentLightModelfSGIX (dynamic) */
+ "if\0"
+ "glFragmentLightModelfSGIX\0"
+ "\0"
+ /* _mesa_function_pool[26153]: InitNames (offset 197) */
+ "\0"
+ "glInitNames\0"
+ "\0"
+ /* _mesa_function_pool[26167]: Normal3sv (offset 61) */
+ "p\0"
+ "glNormal3sv\0"
+ "\0"
+ /* _mesa_function_pool[26182]: DeleteQueries (will be remapped) */
+ "ip\0"
+ "glDeleteQueries\0"
+ "glDeleteQueriesARB\0"
+ "glDeleteQueriesEXT\0"
+ "\0"
+ /* _mesa_function_pool[26240]: InvalidateFramebuffer (will be remapped) */
+ "iip\0"
+ "glInvalidateFramebuffer\0"
+ "\0"
+ /* _mesa_function_pool[26269]: Hint (offset 158) */
+ "ii\0"
+ "glHint\0"
+ "\0"
+ /* _mesa_function_pool[26280]: MemoryBarrier (will be remapped) */
+ "i\0"
+ "glMemoryBarrier\0"
+ "\0"
+ /* _mesa_function_pool[26299]: CopyColorSubTable (offset 347) */
+ "iiiii\0"
+ "glCopyColorSubTable\0"
+ "glCopyColorSubTableEXT\0"
+ "\0"
+ /* _mesa_function_pool[26349]: WeightdvARB (dynamic) */
+ "ip\0"
+ "glWeightdvARB\0"
+ "\0"
+ /* _mesa_function_pool[26367]: GetObjectParameterfvARB (will be remapped) */
+ "iip\0"
+ "glGetObjectParameterfvARB\0"
+ "\0"
+ /* _mesa_function_pool[26398]: GetTexEnvxv (will be remapped) */
+ "iip\0"
+ "glGetTexEnvxvOES\0"
+ "glGetTexEnvxv\0"
+ "\0"
+ /* _mesa_function_pool[26434]: DrawTexsvOES (will be remapped) */
+ "p\0"
+ "glDrawTexsvOES\0"
+ "\0"
+ /* _mesa_function_pool[26452]: Disable (offset 214) */
+ "i\0"
+ "glDisable\0"
+ "\0"
+ /* _mesa_function_pool[26465]: ClearColor (offset 206) */
+ "ffff\0"
+ "glClearColor\0"
+ "\0"
+ /* _mesa_function_pool[26484]: WeightuivARB (dynamic) */
+ "ip\0"
+ "glWeightuivARB\0"
+ "\0"
+ /* _mesa_function_pool[26503]: GetTextureParameterIuiv (will be remapped) */
+ "iip\0"
+ "glGetTextureParameterIuiv\0"
+ "\0"
+ /* _mesa_function_pool[26534]: RasterPos4iv (offset 83) */
+ "p\0"
+ "glRasterPos4iv\0"
+ "\0"
+ /* _mesa_function_pool[26552]: VDPAUIsSurfaceNV (will be remapped) */
+ "i\0"
+ "glVDPAUIsSurfaceNV\0"
+ "\0"
+ /* _mesa_function_pool[26574]: ProgramUniformMatrix2x3fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix2x3fv\0"
+ "glProgramUniformMatrix2x3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[26640]: BindVertexBuffer (will be remapped) */
+ "iiii\0"
+ "glBindVertexBuffer\0"
+ "\0"
+ /* _mesa_function_pool[26665]: Binormal3iEXT (dynamic) */
+ "iii\0"
+ "glBinormal3iEXT\0"
+ "\0"
+ /* _mesa_function_pool[26686]: RasterPos4i (offset 82) */
+ "iiii\0"
+ "glRasterPos4i\0"
+ "\0"
+ /* _mesa_function_pool[26706]: RasterPos4d (offset 78) */
+ "dddd\0"
+ "glRasterPos4d\0"
+ "\0"
+ /* _mesa_function_pool[26726]: RasterPos4f (offset 80) */
+ "ffff\0"
+ "glRasterPos4f\0"
+ "\0"
+ /* _mesa_function_pool[26746]: VDPAUMapSurfacesNV (will be remapped) */
+ "ip\0"
+ "glVDPAUMapSurfacesNV\0"
+ "\0"
+ /* _mesa_function_pool[26771]: GetQueryIndexediv (will be remapped) */
+ "iiip\0"
+ "glGetQueryIndexediv\0"
+ "\0"
+ /* _mesa_function_pool[26797]: RasterPos3dv (offset 71) */
+ "p\0"
+ "glRasterPos3dv\0"
+ "\0"
+ /* _mesa_function_pool[26815]: GetProgramiv (will be remapped) */
+ "iip\0"
+ "glGetProgramiv\0"
+ "\0"
+ /* _mesa_function_pool[26835]: TexCoord1iv (offset 99) */
+ "p\0"
+ "glTexCoord1iv\0"
+ "\0"
+ /* _mesa_function_pool[26852]: RasterPos4s (offset 84) */
+ "iiii\0"
+ "glRasterPos4s\0"
+ "\0"
+ /* _mesa_function_pool[26872]: PixelTexGenParameterfvSGIS (dynamic) */
+ "ip\0"
+ "glPixelTexGenParameterfvSGIS\0"
+ "\0"
+ /* _mesa_function_pool[26905]: VertexAttrib3dv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3dv\0"
+ "glVertexAttrib3dvARB\0"
+ "\0"
+ /* _mesa_function_pool[26948]: Histogram (offset 367) */
+ "iiii\0"
+ "glHistogram\0"
+ "glHistogramEXT\0"
+ "\0"
+ /* _mesa_function_pool[26981]: Uniform2fv (will be remapped) */
+ "iip\0"
+ "glUniform2fv\0"
+ "glUniform2fvARB\0"
+ "\0"
+ /* _mesa_function_pool[27015]: TexImage4DSGIS (dynamic) */
+ "iiiiiiiiiip\0"
+ "glTexImage4DSGIS\0"
+ "\0"
+ /* _mesa_function_pool[27045]: ProgramUniformMatrix3x4dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3x4dv\0"
+ "\0"
+ /* _mesa_function_pool[27080]: DrawBuffers (will be remapped) */
+ "ip\0"
+ "glDrawBuffers\0"
+ "glDrawBuffersARB\0"
+ "glDrawBuffersATI\0"
+ "glDrawBuffersNV\0"
+ "glDrawBuffersEXT\0"
+ "\0"
+ /* _mesa_function_pool[27165]: VertexAttribL1ui64ARB (will be remapped) */
+ "ii\0"
+ "glVertexAttribL1ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[27193]: GetnPolygonStippleARB (will be remapped) */
+ "ip\0"
+ "glGetnPolygonStippleARB\0"
+ "\0"
+ /* _mesa_function_pool[27221]: Color3uiv (offset 22) */
+ "p\0"
+ "glColor3uiv\0"
+ "\0"
+ /* _mesa_function_pool[27236]: EvalCoord2fv (offset 235) */
+ "p\0"
+ "glEvalCoord2fv\0"
+ "\0"
+ /* _mesa_function_pool[27254]: TextureStorage3DEXT (will be remapped) */
+ "iiiiiii\0"
+ "glTextureStorage3DEXT\0"
+ "\0"
+ /* _mesa_function_pool[27285]: VertexAttrib2fARB (will be remapped) */
+ "iff\0"
+ "glVertexAttrib2f\0"
+ "glVertexAttrib2fARB\0"
+ "\0"
+ /* _mesa_function_pool[27327]: SpecializeShaderARB (will be remapped) */
+ "ipipp\0"
+ "glSpecializeShaderARB\0"
+ "glSpecializeShader\0"
+ "\0"
+ /* _mesa_function_pool[27375]: BeginPerfMonitorAMD (will be remapped) */
+ "i\0"
+ "glBeginPerfMonitorAMD\0"
+ "\0"
+ /* _mesa_function_pool[27400]: WindowPos2fv (will be remapped) */
+ "p\0"
+ "glWindowPos2fv\0"
+ "glWindowPos2fvARB\0"
+ "glWindowPos2fvMESA\0"
+ "\0"
+ /* _mesa_function_pool[27455]: Tangent3fEXT (dynamic) */
+ "fff\0"
+ "glTangent3fEXT\0"
+ "\0"
+ /* _mesa_function_pool[27475]: TexImage3D (offset 371) */
+ "iiiiiiiiip\0"
+ "glTexImage3D\0"
+ "glTexImage3DEXT\0"
+ "glTexImage3DOES\0"
+ "\0"
+ /* _mesa_function_pool[27532]: GetPerfQueryIdByNameINTEL (will be remapped) */
+ "pp\0"
+ "glGetPerfQueryIdByNameINTEL\0"
+ "\0"
+ /* _mesa_function_pool[27564]: BindFragDataLocation (will be remapped) */
+ "iip\0"
+ "glBindFragDataLocationEXT\0"
+ "glBindFragDataLocation\0"
+ "\0"
+ /* _mesa_function_pool[27618]: LightModeliv (offset 166) */
+ "ip\0"
+ "glLightModeliv\0"
+ "\0"
+ /* _mesa_function_pool[27637]: Normal3bv (offset 53) */
+ "p\0"
+ "glNormal3bv\0"
+ "\0"
+ /* _mesa_function_pool[27652]: BeginQueryIndexed (will be remapped) */
+ "iii\0"
+ "glBeginQueryIndexed\0"
+ "\0"
+ /* _mesa_function_pool[27677]: ClearNamedBufferData (will be remapped) */
+ "iiiip\0"
+ "glClearNamedBufferData\0"
+ "\0"
+ /* _mesa_function_pool[27707]: Vertex3iv (offset 139) */
+ "p\0"
+ "glVertex3iv\0"
+ "\0"
+ /* _mesa_function_pool[27722]: UniformMatrix2x3dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2x3dv\0"
+ "\0"
+ /* _mesa_function_pool[27749]: UniformHandleui64vARB (will be remapped) */
+ "iip\0"
+ "glUniformHandleui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[27778]: TexCoord3dv (offset 111) */
+ "p\0"
+ "glTexCoord3dv\0"
+ "\0"
+ /* _mesa_function_pool[27795]: GetProgramStringARB (will be remapped) */
+ "iip\0"
+ "glGetProgramStringARB\0"
+ "\0"
+ /* _mesa_function_pool[27822]: VertexP3ui (will be remapped) */
+ "ii\0"
+ "glVertexP3ui\0"
+ "\0"
+ /* _mesa_function_pool[27839]: CreateProgramObjectARB (will be remapped) */
+ "\0"
+ "glCreateProgramObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[27866]: UniformMatrix3fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3fv\0"
+ "glUniformMatrix3fvARB\0"
+ "\0"
+ /* _mesa_function_pool[27913]: PrioritizeTextures (offset 331) */
+ "ipp\0"
+ "glPrioritizeTextures\0"
+ "glPrioritizeTexturesEXT\0"
+ "\0"
+ /* _mesa_function_pool[27963]: VertexAttribI3uiEXT (will be remapped) */
+ "iiii\0"
+ "glVertexAttribI3uiEXT\0"
+ "glVertexAttribI3ui\0"
+ "\0"
+ /* _mesa_function_pool[28010]: ProgramUniform1i64ARB (will be remapped) */
+ "iii\0"
+ "glProgramUniform1i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[28039]: GetProgramNamedParameterfvNV (will be remapped) */
+ "iipp\0"
+ "glGetProgramNamedParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[28076]: GetMaterialxv (will be remapped) */
+ "iip\0"
+ "glGetMaterialxvOES\0"
+ "glGetMaterialxv\0"
+ "\0"
+ /* _mesa_function_pool[28116]: MatrixIndexusvARB (dynamic) */
+ "ip\0"
+ "glMatrixIndexusvARB\0"
+ "\0"
+ /* _mesa_function_pool[28140]: SecondaryColor3uiv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3uiv\0"
+ "glSecondaryColor3uivEXT\0"
+ "\0"
+ /* _mesa_function_pool[28188]: EndConditionalRender (will be remapped) */
+ "\0"
+ "glEndConditionalRender\0"
+ "glEndConditionalRenderNV\0"
+ "\0"
+ /* _mesa_function_pool[28238]: ProgramLocalParameter4dARB (will be remapped) */
+ "iidddd\0"
+ "glProgramLocalParameter4dARB\0"
+ "\0"
+ /* _mesa_function_pool[28275]: Color3sv (offset 18) */
+ "p\0"
+ "glColor3sv\0"
+ "\0"
+ /* _mesa_function_pool[28289]: GenFragmentShadersATI (will be remapped) */
+ "i\0"
+ "glGenFragmentShadersATI\0"
+ "\0"
+ /* _mesa_function_pool[28316]: GetNamedBufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetNamedBufferParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[28349]: BlendEquationSeparateiARB (will be remapped) */
+ "iii\0"
+ "glBlendEquationSeparateiARB\0"
+ "glBlendEquationSeparateIndexedAMD\0"
+ "glBlendEquationSeparatei\0"
+ "glBlendEquationSeparateiEXT\0"
+ "glBlendEquationSeparateiOES\0"
+ "\0"
+ /* _mesa_function_pool[28497]: TestFenceNV (dynamic) */
+ "i\0"
+ "glTestFenceNV\0"
+ "\0"
+ /* _mesa_function_pool[28514]: MultiTexCoord1fvARB (offset 379) */
+ "ip\0"
+ "glMultiTexCoord1fv\0"
+ "glMultiTexCoord1fvARB\0"
+ "\0"
+ /* _mesa_function_pool[28559]: TexStorage2D (will be remapped) */
+ "iiiii\0"
+ "glTexStorage2D\0"
+ "\0"
+ /* _mesa_function_pool[28581]: GetPixelTexGenParameterivSGIS (dynamic) */
+ "ip\0"
+ "glGetPixelTexGenParameterivSGIS\0"
+ "\0"
+ /* _mesa_function_pool[28617]: FramebufferTexture2D (will be remapped) */
+ "iiiii\0"
+ "glFramebufferTexture2D\0"
+ "glFramebufferTexture2DEXT\0"
+ "glFramebufferTexture2DOES\0"
+ "\0"
+ /* _mesa_function_pool[28699]: GetSamplerParameterfv (will be remapped) */
+ "iip\0"
+ "glGetSamplerParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[28728]: VertexAttrib2dv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2dv\0"
+ "glVertexAttrib2dvARB\0"
+ "\0"
+ /* _mesa_function_pool[28771]: Vertex4sv (offset 149) */
+ "p\0"
+ "glVertex4sv\0"
+ "\0"
+ /* _mesa_function_pool[28786]: GetQueryObjecti64v (will be remapped) */
+ "iip\0"
+ "glGetQueryObjecti64v\0"
+ "glGetQueryObjecti64vEXT\0"
+ "\0"
+ /* _mesa_function_pool[28836]: ClampColor (will be remapped) */
+ "ii\0"
+ "glClampColorARB\0"
+ "glClampColor\0"
+ "\0"
+ /* _mesa_function_pool[28869]: TextureRangeAPPLE (dynamic) */
+ "iip\0"
+ "glTextureRangeAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[28894]: Uniform1i64ARB (will be remapped) */
+ "ii\0"
+ "glUniform1i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[28915]: DepthRangeArrayfvOES (will be remapped) */
+ "iip\0"
+ "glDepthRangeArrayfvOES\0"
+ "\0"
+ /* _mesa_function_pool[28943]: ConvolutionFilter1D (offset 348) */
+ "iiiiip\0"
+ "glConvolutionFilter1D\0"
+ "glConvolutionFilter1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[28998]: DrawElementsIndirect (will be remapped) */
+ "iip\0"
+ "glDrawElementsIndirect\0"
+ "\0"
+ /* _mesa_function_pool[29026]: WindowPos3sv (will be remapped) */
+ "p\0"
+ "glWindowPos3sv\0"
+ "glWindowPos3svARB\0"
+ "glWindowPos3svMESA\0"
+ "\0"
+ /* _mesa_function_pool[29081]: FragmentMaterialfvSGIX (dynamic) */
+ "iip\0"
+ "glFragmentMaterialfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[29111]: CallLists (offset 3) */
+ "iip\0"
+ "glCallLists\0"
+ "\0"
+ /* _mesa_function_pool[29128]: AlphaFunc (offset 240) */
+ "if\0"
+ "glAlphaFunc\0"
+ "\0"
+ /* _mesa_function_pool[29144]: GetTextureParameterfv (will be remapped) */
+ "iip\0"
+ "glGetTextureParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[29173]: EdgeFlag (offset 41) */
+ "i\0"
+ "glEdgeFlag\0"
+ "\0"
+ /* _mesa_function_pool[29187]: TexCoord2fNormal3fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glTexCoord2fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[29225]: EdgeFlagv (offset 42) */
+ "p\0"
+ "glEdgeFlagv\0"
+ "\0"
+ /* _mesa_function_pool[29240]: DepthRangex (will be remapped) */
+ "ii\0"
+ "glDepthRangexOES\0"
+ "glDepthRangex\0"
+ "\0"
+ /* _mesa_function_pool[29275]: ReplacementCodeubvSUN (dynamic) */
+ "p\0"
+ "glReplacementCodeubvSUN\0"
+ "\0"
+ /* _mesa_function_pool[29302]: ProgramUniformHandleui64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniformHandleui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[29339]: VDPAUInitNV (will be remapped) */
+ "pp\0"
+ "glVDPAUInitNV\0"
+ "\0"
+ /* _mesa_function_pool[29357]: GetBufferParameteri64v (will be remapped) */
+ "iip\0"
+ "glGetBufferParameteri64v\0"
+ "\0"
+ /* _mesa_function_pool[29387]: CreateProgram (will be remapped) */
+ "\0"
+ "glCreateProgram\0"
+ "\0"
+ /* _mesa_function_pool[29405]: DepthRangef (will be remapped) */
+ "ff\0"
+ "glDepthRangef\0"
+ "glDepthRangefOES\0"
+ "\0"
+ /* _mesa_function_pool[29440]: TextureParameteriv (will be remapped) */
+ "iip\0"
+ "glTextureParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[29466]: ColorFragmentOp3ATI (will be remapped) */
+ "iiiiiiiiiiiii\0"
+ "glColorFragmentOp3ATI\0"
+ "\0"
+ /* _mesa_function_pool[29503]: ValidateProgram (will be remapped) */
+ "i\0"
+ "glValidateProgram\0"
+ "glValidateProgramARB\0"
+ "\0"
+ /* _mesa_function_pool[29545]: VertexPointerEXT (will be remapped) */
+ "iiiip\0"
+ "glVertexPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[29571]: VertexAttribI4sv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4svEXT\0"
+ "glVertexAttribI4sv\0"
+ "\0"
+ /* _mesa_function_pool[29616]: Scissor (offset 176) */
+ "iiii\0"
+ "glScissor\0"
+ "\0"
+ /* _mesa_function_pool[29632]: BeginTransformFeedback (will be remapped) */
+ "i\0"
+ "glBeginTransformFeedback\0"
+ "glBeginTransformFeedbackEXT\0"
+ "\0"
+ /* _mesa_function_pool[29688]: TexCoord2i (offset 106) */
+ "ii\0"
+ "glTexCoord2i\0"
+ "\0"
+ /* _mesa_function_pool[29705]: VertexArrayAttribBinding (will be remapped) */
+ "iii\0"
+ "glVertexArrayAttribBinding\0"
+ "\0"
+ /* _mesa_function_pool[29737]: Color4ui (offset 37) */
+ "iiii\0"
+ "glColor4ui\0"
+ "\0"
+ /* _mesa_function_pool[29754]: TexCoord2f (offset 104) */
+ "ff\0"
+ "glTexCoord2f\0"
+ "\0"
+ /* _mesa_function_pool[29771]: TexCoord2d (offset 102) */
+ "dd\0"
+ "glTexCoord2d\0"
+ "\0"
+ /* _mesa_function_pool[29788]: GetTransformFeedbackiv (will be remapped) */
+ "iip\0"
+ "glGetTransformFeedbackiv\0"
+ "\0"
+ /* _mesa_function_pool[29818]: TexCoord2s (offset 108) */
+ "ii\0"
+ "glTexCoord2s\0"
+ "\0"
+ /* _mesa_function_pool[29835]: PointSizePointerOES (will be remapped) */
+ "iip\0"
+ "glPointSizePointerOES\0"
+ "\0"
+ /* _mesa_function_pool[29862]: Color4us (offset 39) */
+ "iiii\0"
+ "glColor4us\0"
+ "\0"
+ /* _mesa_function_pool[29879]: Color3bv (offset 10) */
+ "p\0"
+ "glColor3bv\0"
+ "\0"
+ /* _mesa_function_pool[29893]: PrimitiveRestartNV (will be remapped) */
+ "\0"
+ "glPrimitiveRestartNV\0"
+ "\0"
+ /* _mesa_function_pool[29916]: BindBufferOffsetEXT (will be remapped) */
+ "iiii\0"
+ "glBindBufferOffsetEXT\0"
+ "\0"
+ /* _mesa_function_pool[29944]: ProvokingVertex (will be remapped) */
+ "i\0"
+ "glProvokingVertexEXT\0"
+ "glProvokingVertex\0"
+ "\0"
+ /* _mesa_function_pool[29986]: VertexAttribs4fvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs4fvNV\0"
+ "\0"
+ /* _mesa_function_pool[30012]: MapControlPointsNV (dynamic) */
+ "iiiiiiiip\0"
+ "glMapControlPointsNV\0"
+ "\0"
+ /* _mesa_function_pool[30044]: Vertex2i (offset 130) */
+ "ii\0"
+ "glVertex2i\0"
+ "\0"
+ /* _mesa_function_pool[30059]: HintPGI (dynamic) */
+ "ii\0"
+ "glHintPGI\0"
+ "\0"
+ /* _mesa_function_pool[30073]: GetQueryBufferObjecti64v (will be remapped) */
+ "iiii\0"
+ "glGetQueryBufferObjecti64v\0"
+ "\0"
+ /* _mesa_function_pool[30106]: InterleavedArrays (offset 317) */
+ "iip\0"
+ "glInterleavedArrays\0"
+ "\0"
+ /* _mesa_function_pool[30131]: RasterPos2fv (offset 65) */
+ "p\0"
+ "glRasterPos2fv\0"
+ "\0"
+ /* _mesa_function_pool[30149]: TexCoord1fv (offset 97) */
+ "p\0"
+ "glTexCoord1fv\0"
+ "\0"
+ /* _mesa_function_pool[30166]: ProgramNamedParameter4fNV (will be remapped) */
+ "iipffff\0"
+ "glProgramNamedParameter4fNV\0"
+ "\0"
+ /* _mesa_function_pool[30203]: MultiTexCoord4dv (offset 401) */
+ "ip\0"
+ "glMultiTexCoord4dv\0"
+ "glMultiTexCoord4dvARB\0"
+ "\0"
+ /* _mesa_function_pool[30248]: ProgramEnvParameter4fvARB (will be remapped) */
+ "iip\0"
+ "glProgramEnvParameter4fvARB\0"
+ "glProgramParameter4fvNV\0"
+ "\0"
+ /* _mesa_function_pool[30305]: RasterPos4fv (offset 81) */
+ "p\0"
+ "glRasterPos4fv\0"
+ "\0"
+ /* _mesa_function_pool[30323]: FragmentLightModeliSGIX (dynamic) */
+ "ii\0"
+ "glFragmentLightModeliSGIX\0"
+ "\0"
+ /* _mesa_function_pool[30353]: PushMatrix (offset 298) */
+ "\0"
+ "glPushMatrix\0"
+ "\0"
+ /* _mesa_function_pool[30368]: EndList (offset 1) */
+ "\0"
+ "glEndList\0"
+ "\0"
+ /* _mesa_function_pool[30380]: DrawRangeElements (offset 338) */
+ "iiiiip\0"
+ "glDrawRangeElements\0"
+ "glDrawRangeElementsEXT\0"
+ "\0"
+ /* _mesa_function_pool[30431]: GetTexGenxvOES (will be remapped) */
+ "iip\0"
+ "glGetTexGenxvOES\0"
+ "\0"
+ /* _mesa_function_pool[30453]: GetHandleARB (will be remapped) */
+ "i\0"
+ "glGetHandleARB\0"
+ "\0"
+ /* _mesa_function_pool[30471]: DrawTexfvOES (will be remapped) */
+ "p\0"
+ "glDrawTexfvOES\0"
+ "\0"
+ /* _mesa_function_pool[30489]: BlendFunciARB (will be remapped) */
+ "iii\0"
+ "glBlendFunciARB\0"
+ "glBlendFuncIndexedAMD\0"
+ "glBlendFunci\0"
+ "glBlendFunciEXT\0"
+ "glBlendFunciOES\0"
+ "\0"
+ /* _mesa_function_pool[30577]: ClearNamedFramebufferfi (will be remapped) */
+ "iiifi\0"
+ "glClearNamedFramebufferfi\0"
+ "\0"
+ /* _mesa_function_pool[30610]: ClearNamedFramebufferfv (will be remapped) */
+ "iiip\0"
+ "glClearNamedFramebufferfv\0"
+ "\0"
+ /* _mesa_function_pool[30642]: GlobalAlphaFactorbSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactorbSUN\0"
+ "\0"
+ /* _mesa_function_pool[30669]: Uniform2ui (will be remapped) */
+ "iii\0"
+ "glUniform2uiEXT\0"
+ "glUniform2ui\0"
+ "\0"
+ /* _mesa_function_pool[30703]: ScissorIndexed (will be remapped) */
+ "iiiii\0"
+ "glScissorIndexed\0"
+ "glScissorIndexedOES\0"
+ "\0"
+ /* _mesa_function_pool[30747]: End (offset 43) */
+ "\0"
+ "glEnd\0"
+ "\0"
+ /* _mesa_function_pool[30755]: NamedFramebufferParameteri (will be remapped) */
+ "iii\0"
+ "glNamedFramebufferParameteri\0"
+ "\0"
+ /* _mesa_function_pool[30789]: BindVertexBuffers (will be remapped) */
+ "iippp\0"
+ "glBindVertexBuffers\0"
+ "\0"
+ /* _mesa_function_pool[30816]: GetSamplerParameteriv (will be remapped) */
+ "iip\0"
+ "glGetSamplerParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[30845]: GenProgramPipelines (will be remapped) */
+ "ip\0"
+ "glGenProgramPipelines\0"
+ "glGenProgramPipelinesEXT\0"
+ "\0"
+ /* _mesa_function_pool[30896]: Enable (offset 215) */
+ "i\0"
+ "glEnable\0"
+ "\0"
+ /* _mesa_function_pool[30908]: IsProgramPipeline (will be remapped) */
+ "i\0"
+ "glIsProgramPipeline\0"
+ "glIsProgramPipelineEXT\0"
+ "\0"
+ /* _mesa_function_pool[30954]: ShaderBinary (will be remapped) */
+ "ipipi\0"
+ "glShaderBinary\0"
+ "\0"
+ /* _mesa_function_pool[30976]: GetFragmentMaterialivSGIX (dynamic) */
+ "iip\0"
+ "glGetFragmentMaterialivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[31009]: WeightPointerARB (dynamic) */
+ "iiip\0"
+ "glWeightPointerARB\0"
+ "glWeightPointerOES\0"
+ "\0"
+ /* _mesa_function_pool[31053]: TextureSubImage1D (will be remapped) */
+ "iiiiiip\0"
+ "glTextureSubImage1D\0"
+ "\0"
+ /* _mesa_function_pool[31082]: Normal3x (will be remapped) */
+ "iii\0"
+ "glNormal3xOES\0"
+ "glNormal3x\0"
+ "\0"
+ /* _mesa_function_pool[31112]: VertexAttrib4fARB (will be remapped) */
+ "iffff\0"
+ "glVertexAttrib4f\0"
+ "glVertexAttrib4fARB\0"
+ "\0"
+ /* _mesa_function_pool[31156]: TexCoord4fv (offset 121) */
+ "p\0"
+ "glTexCoord4fv\0"
+ "\0"
+ /* _mesa_function_pool[31173]: ReadnPixelsARB (will be remapped) */
+ "iiiiiiip\0"
+ "glReadnPixelsARB\0"
+ "glReadnPixels\0"
+ "glReadnPixelsKHR\0"
+ "\0"
+ /* _mesa_function_pool[31231]: InvalidateTexSubImage (will be remapped) */
+ "iiiiiiii\0"
+ "glInvalidateTexSubImage\0"
+ "\0"
+ /* _mesa_function_pool[31265]: Normal3s (offset 60) */
+ "iii\0"
+ "glNormal3s\0"
+ "\0"
+ /* _mesa_function_pool[31281]: Materialxv (will be remapped) */
+ "iip\0"
+ "glMaterialxvOES\0"
+ "glMaterialxv\0"
+ "\0"
+ /* _mesa_function_pool[31315]: Normal3i (offset 58) */
+ "iii\0"
+ "glNormal3i\0"
+ "\0"
+ /* _mesa_function_pool[31331]: ProgramNamedParameter4fvNV (will be remapped) */
+ "iipp\0"
+ "glProgramNamedParameter4fvNV\0"
+ "\0"
+ /* _mesa_function_pool[31366]: Normal3b (offset 52) */
+ "iii\0"
+ "glNormal3b\0"
+ "\0"
+ /* _mesa_function_pool[31382]: Normal3d (offset 54) */
+ "ddd\0"
+ "glNormal3d\0"
+ "\0"
+ /* _mesa_function_pool[31398]: Normal3f (offset 56) */
+ "fff\0"
+ "glNormal3f\0"
+ "\0"
+ /* _mesa_function_pool[31414]: Indexi (offset 48) */
+ "i\0"
+ "glIndexi\0"
+ "\0"
+ /* _mesa_function_pool[31426]: Uniform1uiv (will be remapped) */
+ "iip\0"
+ "glUniform1uivEXT\0"
+ "glUniform1uiv\0"
+ "\0"
+ /* _mesa_function_pool[31462]: VertexAttribI2uiEXT (will be remapped) */
+ "iii\0"
+ "glVertexAttribI2uiEXT\0"
+ "glVertexAttribI2ui\0"
+ "\0"
+ /* _mesa_function_pool[31508]: IsRenderbuffer (will be remapped) */
+ "i\0"
+ "glIsRenderbuffer\0"
+ "glIsRenderbufferEXT\0"
+ "glIsRenderbufferOES\0"
+ "\0"
+ /* _mesa_function_pool[31568]: NormalP3uiv (will be remapped) */
+ "ip\0"
+ "glNormalP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[31586]: Indexf (offset 46) */
+ "f\0"
+ "glIndexf\0"
+ "\0"
+ /* _mesa_function_pool[31598]: Indexd (offset 44) */
+ "d\0"
+ "glIndexd\0"
+ "\0"
+ /* _mesa_function_pool[31610]: GetMaterialiv (offset 270) */
+ "iip\0"
+ "glGetMaterialiv\0"
+ "\0"
+ /* _mesa_function_pool[31631]: Indexs (offset 50) */
+ "i\0"
+ "glIndexs\0"
+ "\0"
+ /* _mesa_function_pool[31643]: MultiTexCoordP1uiv (will be remapped) */
+ "iip\0"
+ "glMultiTexCoordP1uiv\0"
+ "\0"
+ /* _mesa_function_pool[31669]: ConvolutionFilter2D (offset 349) */
+ "iiiiiip\0"
+ "glConvolutionFilter2D\0"
+ "glConvolutionFilter2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[31725]: Vertex2d (offset 126) */
+ "dd\0"
+ "glVertex2d\0"
+ "\0"
+ /* _mesa_function_pool[31740]: Vertex2f (offset 128) */
+ "ff\0"
+ "glVertex2f\0"
+ "\0"
+ /* _mesa_function_pool[31755]: Color4bv (offset 26) */
+ "p\0"
+ "glColor4bv\0"
+ "\0"
+ /* _mesa_function_pool[31769]: ProgramUniformMatrix3x2dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3x2dv\0"
+ "\0"
+ /* _mesa_function_pool[31804]: VertexAttrib2fvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2fvNV\0"
+ "\0"
+ /* _mesa_function_pool[31828]: Vertex2s (offset 132) */
+ "ii\0"
+ "glVertex2s\0"
+ "\0"
+ /* _mesa_function_pool[31843]: ActiveTexture (offset 374) */
+ "i\0"
+ "glActiveTexture\0"
+ "glActiveTextureARB\0"
+ "\0"
+ /* _mesa_function_pool[31881]: GlobalAlphaFactorfSUN (dynamic) */
+ "f\0"
+ "glGlobalAlphaFactorfSUN\0"
+ "\0"
+ /* _mesa_function_pool[31908]: InvalidateNamedFramebufferSubData (will be remapped) */
+ "iipiiii\0"
+ "glInvalidateNamedFramebufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[31953]: ColorP4uiv (will be remapped) */
+ "ip\0"
+ "glColorP4uiv\0"
+ "\0"
+ /* _mesa_function_pool[31970]: DrawTexxOES (will be remapped) */
+ "iiiii\0"
+ "glDrawTexxOES\0"
+ "\0"
+ /* _mesa_function_pool[31991]: SetFenceNV (dynamic) */
+ "ii\0"
+ "glSetFenceNV\0"
+ "\0"
+ /* _mesa_function_pool[32008]: PixelTexGenParameterivSGIS (dynamic) */
+ "ip\0"
+ "glPixelTexGenParameterivSGIS\0"
+ "\0"
+ /* _mesa_function_pool[32041]: MultiTexCoordP3ui (will be remapped) */
+ "iii\0"
+ "glMultiTexCoordP3ui\0"
+ "\0"
+ /* _mesa_function_pool[32066]: GetAttribLocation (will be remapped) */
+ "ip\0"
+ "glGetAttribLocation\0"
+ "glGetAttribLocationARB\0"
+ "\0"
+ /* _mesa_function_pool[32113]: GetCombinerStageParameterfvNV (dynamic) */
+ "iip\0"
+ "glGetCombinerStageParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[32150]: DrawBuffer (offset 202) */
+ "i\0"
+ "glDrawBuffer\0"
+ "\0"
+ /* _mesa_function_pool[32166]: GetPointerv (offset 329) */
+ "ip\0"
+ "glGetPointerv\0"
+ "glGetPointervKHR\0"
+ "glGetPointervEXT\0"
+ "\0"
+ /* _mesa_function_pool[32218]: MultiTexCoord2dv (offset 385) */
+ "ip\0"
+ "glMultiTexCoord2dv\0"
+ "glMultiTexCoord2dvARB\0"
+ "\0"
+ /* _mesa_function_pool[32263]: IsSampler (will be remapped) */
+ "i\0"
+ "glIsSampler\0"
+ "\0"
+ /* _mesa_function_pool[32278]: BlendFunc (offset 241) */
+ "ii\0"
+ "glBlendFunc\0"
+ "\0"
+ /* _mesa_function_pool[32294]: NamedRenderbufferStorageMultisample (will be remapped) */
+ "iiiii\0"
+ "glNamedRenderbufferStorageMultisample\0"
+ "\0"
+ /* _mesa_function_pool[32339]: Tangent3fvEXT (dynamic) */
+ "p\0"
+ "glTangent3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[32358]: ColorMaterial (offset 151) */
+ "ii\0"
+ "glColorMaterial\0"
+ "\0"
+ /* _mesa_function_pool[32378]: RasterPos3sv (offset 77) */
+ "p\0"
+ "glRasterPos3sv\0"
+ "\0"
+ /* _mesa_function_pool[32396]: TexCoordP2ui (will be remapped) */
+ "ii\0"
+ "glTexCoordP2ui\0"
+ "\0"
+ /* _mesa_function_pool[32415]: TexParameteriv (offset 181) */
+ "iip\0"
+ "glTexParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[32437]: WaitSemaphoreEXT (will be remapped) */
+ "iipipp\0"
+ "glWaitSemaphoreEXT\0"
+ "\0"
+ /* _mesa_function_pool[32464]: VertexAttrib3fvARB (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3fv\0"
+ "glVertexAttrib3fvARB\0"
+ "\0"
+ /* _mesa_function_pool[32507]: ProgramUniformMatrix3x4fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3x4fv\0"
+ "glProgramUniformMatrix3x4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[32573]: PixelTransformParameterfEXT (dynamic) */
+ "iif\0"
+ "glPixelTransformParameterfEXT\0"
+ "\0"
+ /* _mesa_function_pool[32608]: TextureColorMaskSGIS (dynamic) */
+ "iiii\0"
+ "glTextureColorMaskSGIS\0"
+ "\0"
+ /* _mesa_function_pool[32637]: GetColorTable (offset 343) */
+ "iiip\0"
+ "glGetColorTable\0"
+ "glGetColorTableSGI\0"
+ "glGetColorTableEXT\0"
+ "\0"
+ /* _mesa_function_pool[32697]: TexCoord3i (offset 114) */
+ "iii\0"
+ "glTexCoord3i\0"
+ "\0"
+ /* _mesa_function_pool[32715]: CopyColorTable (offset 342) */
+ "iiiii\0"
+ "glCopyColorTable\0"
+ "glCopyColorTableSGI\0"
+ "\0"
+ /* _mesa_function_pool[32759]: Frustum (offset 289) */
+ "dddddd\0"
+ "glFrustum\0"
+ "\0"
+ /* _mesa_function_pool[32777]: TexCoord3d (offset 110) */
+ "ddd\0"
+ "glTexCoord3d\0"
+ "\0"
+ /* _mesa_function_pool[32795]: GetTextureParameteriv (will be remapped) */
+ "iip\0"
+ "glGetTextureParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[32824]: TexCoord3f (offset 112) */
+ "fff\0"
+ "glTexCoord3f\0"
+ "\0"
+ /* _mesa_function_pool[32842]: DepthRangeArrayv (will be remapped) */
+ "iip\0"
+ "glDepthRangeArrayv\0"
+ "\0"
+ /* _mesa_function_pool[32866]: DeleteTextures (offset 327) */
+ "ip\0"
+ "glDeleteTextures\0"
+ "glDeleteTexturesEXT\0"
+ "\0"
+ /* _mesa_function_pool[32907]: TexCoordPointerEXT (will be remapped) */
+ "iiiip\0"
+ "glTexCoordPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[32935]: TexCoord3s (offset 116) */
+ "iii\0"
+ "glTexCoord3s\0"
+ "\0"
+ /* _mesa_function_pool[32953]: GetTexLevelParameteriv (offset 285) */
+ "iiip\0"
+ "glGetTexLevelParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[32984]: TextureParameterIuiv (will be remapped) */
+ "iip\0"
+ "glTextureParameterIuiv\0"
+ "\0"
+ /* _mesa_function_pool[33012]: CombinerStageParameterfvNV (dynamic) */
+ "iip\0"
+ "glCombinerStageParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[33046]: GenPerfMonitorsAMD (will be remapped) */
+ "ip\0"
+ "glGenPerfMonitorsAMD\0"
+ "\0"
+ /* _mesa_function_pool[33071]: ClearAccum (offset 204) */
+ "ffff\0"
+ "glClearAccum\0"
+ "\0"
+ /* _mesa_function_pool[33090]: DeformSGIX (dynamic) */
+ "i\0"
+ "glDeformSGIX\0"
+ "\0"
+ /* _mesa_function_pool[33106]: TexCoord4iv (offset 123) */
+ "p\0"
+ "glTexCoord4iv\0"
+ "\0"
+ /* _mesa_function_pool[33123]: TexStorage3D (will be remapped) */
+ "iiiiii\0"
+ "glTexStorage3D\0"
+ "\0"
+ /* _mesa_function_pool[33146]: Uniform2i64ARB (will be remapped) */
+ "iii\0"
+ "glUniform2i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[33168]: FramebufferTexture3D (will be remapped) */
+ "iiiiii\0"
+ "glFramebufferTexture3D\0"
+ "glFramebufferTexture3DEXT\0"
+ "glFramebufferTexture3DOES\0"
+ "\0"
+ /* _mesa_function_pool[33251]: FragmentLightModelfvSGIX (dynamic) */
+ "ip\0"
+ "glFragmentLightModelfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[33282]: GetBufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetBufferParameteriv\0"
+ "glGetBufferParameterivARB\0"
+ "\0"
+ /* _mesa_function_pool[33336]: VertexAttrib2fNV (will be remapped) */
+ "iff\0"
+ "glVertexAttrib2fNV\0"
+ "\0"
+ /* _mesa_function_pool[33360]: GetFragmentLightfvSGIX (dynamic) */
+ "iip\0"
+ "glGetFragmentLightfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[33390]: CopyTexImage2D (offset 324) */
+ "iiiiiiii\0"
+ "glCopyTexImage2D\0"
+ "glCopyTexImage2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[33437]: Vertex3fv (offset 137) */
+ "p\0"
+ "glVertex3fv\0"
+ "\0"
+ /* _mesa_function_pool[33452]: WindowPos4dvMESA (will be remapped) */
+ "p\0"
+ "glWindowPos4dvMESA\0"
+ "\0"
+ /* _mesa_function_pool[33474]: ProgramUniform2i64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[33505]: MultiTexCoordP2ui (will be remapped) */
+ "iii\0"
+ "glMultiTexCoordP2ui\0"
+ "\0"
+ /* _mesa_function_pool[33530]: VertexAttribs1dvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs1dvNV\0"
+ "\0"
+ /* _mesa_function_pool[33556]: ImportSemaphoreFdEXT (will be remapped) */
+ "iii\0"
+ "glImportSemaphoreFdEXT\0"
+ "\0"
+ /* _mesa_function_pool[33584]: IsQuery (will be remapped) */
+ "i\0"
+ "glIsQuery\0"
+ "glIsQueryARB\0"
+ "glIsQueryEXT\0"
+ "\0"
+ /* _mesa_function_pool[33623]: EdgeFlagPointerEXT (will be remapped) */
+ "iip\0"
+ "glEdgeFlagPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[33649]: VertexAttribs2svNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs2svNV\0"
+ "\0"
+ /* _mesa_function_pool[33675]: CreateShaderProgramv (will be remapped) */
+ "iip\0"
+ "glCreateShaderProgramv\0"
+ "glCreateShaderProgramvEXT\0"
+ "\0"
+ /* _mesa_function_pool[33729]: BlendEquationiARB (will be remapped) */
+ "ii\0"
+ "glBlendEquationiARB\0"
+ "glBlendEquationIndexedAMD\0"
+ "glBlendEquationi\0"
+ "glBlendEquationiEXT\0"
+ "glBlendEquationiOES\0"
+ "\0"
+ /* _mesa_function_pool[33836]: VertexAttribI4uivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI4uivEXT\0"
+ "glVertexAttribI4uiv\0"
+ "\0"
+ /* _mesa_function_pool[33883]: PointSizex (will be remapped) */
+ "i\0"
+ "glPointSizexOES\0"
+ "glPointSizex\0"
+ "\0"
+ /* _mesa_function_pool[33915]: PolygonMode (offset 174) */
+ "ii\0"
+ "glPolygonMode\0"
+ "\0"
+ /* _mesa_function_pool[33933]: SecondaryColor3iv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3iv\0"
+ "glSecondaryColor3ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[33979]: VertexAttribI1iEXT (will be remapped) */
+ "ii\0"
+ "glVertexAttribI1iEXT\0"
+ "glVertexAttribI1i\0"
+ "\0"
+ /* _mesa_function_pool[34022]: VertexAttrib4Niv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Niv\0"
+ "glVertexAttrib4NivARB\0"
+ "\0"
+ /* _mesa_function_pool[34067]: GetMapAttribParameterivNV (dynamic) */
+ "iiip\0"
+ "glGetMapAttribParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[34101]: GetnUniformdvARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformdvARB\0"
+ "\0"
+ /* _mesa_function_pool[34126]: LinkProgram (will be remapped) */
+ "i\0"
+ "glLinkProgram\0"
+ "glLinkProgramARB\0"
+ "\0"
+ /* _mesa_function_pool[34160]: ProgramUniform4d (will be remapped) */
+ "iidddd\0"
+ "glProgramUniform4d\0"
+ "\0"
+ /* _mesa_function_pool[34187]: ProgramUniform4f (will be remapped) */
+ "iiffff\0"
+ "glProgramUniform4f\0"
+ "glProgramUniform4fEXT\0"
+ "\0"
+ /* _mesa_function_pool[34236]: ProgramUniform4i (will be remapped) */
+ "iiiiii\0"
+ "glProgramUniform4i\0"
+ "glProgramUniform4iEXT\0"
+ "\0"
+ /* _mesa_function_pool[34285]: GetFramebufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetFramebufferParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[34318]: ListParameterfvSGIX (dynamic) */
+ "iip\0"
+ "glListParameterfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[34345]: GetNamedBufferPointerv (will be remapped) */
+ "iip\0"
+ "glGetNamedBufferPointerv\0"
+ "\0"
+ /* _mesa_function_pool[34375]: VertexAttrib4d (will be remapped) */
+ "idddd\0"
+ "glVertexAttrib4d\0"
+ "glVertexAttrib4dARB\0"
+ "\0"
+ /* _mesa_function_pool[34419]: ProgramUniform4ui64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[34451]: WindowPos4sMESA (will be remapped) */
+ "iiii\0"
+ "glWindowPos4sMESA\0"
+ "\0"
+ /* _mesa_function_pool[34475]: VertexAttrib4s (will be remapped) */
+ "iiiii\0"
+ "glVertexAttrib4s\0"
+ "glVertexAttrib4sARB\0"
+ "\0"
+ /* _mesa_function_pool[34519]: ProgramUniform1i64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[34550]: VertexAttrib1dvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1dvNV\0"
+ "\0"
+ /* _mesa_function_pool[34574]: ReplacementCodePointerSUN (dynamic) */
+ "iip\0"
+ "glReplacementCodePointerSUN\0"
+ "\0"
+ /* _mesa_function_pool[34607]: GetSemaphoreParameterui64vEXT (will be remapped) */
+ "iip\0"
+ "glGetSemaphoreParameterui64vEXT\0"
+ "\0"
+ /* _mesa_function_pool[34644]: TexStorage3DMultisample (will be remapped) */
+ "iiiiiii\0"
+ "glTexStorage3DMultisample\0"
+ "glTexStorage3DMultisampleOES\0"
+ "\0"
+ /* _mesa_function_pool[34708]: Binormal3bvEXT (dynamic) */
+ "p\0"
+ "glBinormal3bvEXT\0"
+ "\0"
+ /* _mesa_function_pool[34728]: SamplerParameteriv (will be remapped) */
+ "iip\0"
+ "glSamplerParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[34754]: VertexAttribP3uiv (will be remapped) */
+ "iiip\0"
+ "glVertexAttribP3uiv\0"
+ "\0"
+ /* _mesa_function_pool[34780]: ScissorIndexedv (will be remapped) */
+ "ip\0"
+ "glScissorIndexedv\0"
+ "glScissorIndexedvOES\0"
+ "\0"
+ /* _mesa_function_pool[34823]: Color4ubVertex2fSUN (dynamic) */
+ "iiiiff\0"
+ "glColor4ubVertex2fSUN\0"
+ "\0"
+ /* _mesa_function_pool[34853]: FragmentColorMaterialSGIX (dynamic) */
+ "ii\0"
+ "glFragmentColorMaterialSGIX\0"
+ "\0"
+ /* _mesa_function_pool[34885]: GetStringi (will be remapped) */
+ "ii\0"
+ "glGetStringi\0"
+ "\0"
+ /* _mesa_function_pool[34902]: Uniform2dv (will be remapped) */
+ "iip\0"
+ "glUniform2dv\0"
+ "\0"
+ /* _mesa_function_pool[34920]: VertexAttrib4dv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4dv\0"
+ "glVertexAttrib4dvARB\0"
+ "\0"
+ /* _mesa_function_pool[34963]: CreateTextures (will be remapped) */
+ "iip\0"
+ "glCreateTextures\0"
+ "\0"
+ /* _mesa_function_pool[34985]: EvalCoord2dv (offset 233) */
+ "p\0"
+ "glEvalCoord2dv\0"
+ "\0"
+ /* _mesa_function_pool[35003]: VertexAttrib1fNV (will be remapped) */
+ "if\0"
+ "glVertexAttrib1fNV\0"
+ "\0"
+ /* _mesa_function_pool[35026]: CompressedTexSubImage1D (will be remapped) */
+ "iiiiiip\0"
+ "glCompressedTexSubImage1D\0"
+ "glCompressedTexSubImage1DARB\0"
+ "\0"
+ /* _mesa_function_pool[35090]: GetSeparableFilter (offset 359) */
+ "iiippp\0"
+ "glGetSeparableFilter\0"
+ "glGetSeparableFilterEXT\0"
+ "\0"
+ /* _mesa_function_pool[35143]: ReplacementCodeusSUN (dynamic) */
+ "i\0"
+ "glReplacementCodeusSUN\0"
+ "\0"
+ /* _mesa_function_pool[35169]: FeedbackBuffer (offset 194) */
+ "iip\0"
+ "glFeedbackBuffer\0"
+ "\0"
+ /* _mesa_function_pool[35191]: RasterPos2iv (offset 67) */
+ "p\0"
+ "glRasterPos2iv\0"
+ "\0"
+ /* _mesa_function_pool[35209]: TexImage1D (offset 182) */
+ "iiiiiiip\0"
+ "glTexImage1D\0"
+ "\0"
+ /* _mesa_function_pool[35232]: MultiDrawElementsEXT (will be remapped) */
+ "ipipi\0"
+ "glMultiDrawElements\0"
+ "glMultiDrawElementsEXT\0"
+ "\0"
+ /* _mesa_function_pool[35282]: GetnSeparableFilterARB (will be remapped) */
+ "iiiipipp\0"
+ "glGetnSeparableFilterARB\0"
+ "\0"
+ /* _mesa_function_pool[35317]: FrontFace (offset 157) */
+ "i\0"
+ "glFrontFace\0"
+ "\0"
+ /* _mesa_function_pool[35332]: MultiModeDrawArraysIBM (will be remapped) */
+ "pppii\0"
+ "glMultiModeDrawArraysIBM\0"
+ "\0"
+ /* _mesa_function_pool[35364]: Tangent3ivEXT (dynamic) */
+ "p\0"
+ "glTangent3ivEXT\0"
+ "\0"
+ /* _mesa_function_pool[35383]: LightEnviSGIX (dynamic) */
+ "ii\0"
+ "glLightEnviSGIX\0"
+ "\0"
+ /* _mesa_function_pool[35403]: Normal3dv (offset 55) */
+ "p\0"
+ "glNormal3dv\0"
+ "\0"
+ /* _mesa_function_pool[35418]: Lightf (offset 159) */
+ "iif\0"
+ "glLightf\0"
+ "\0"
+ /* _mesa_function_pool[35432]: MatrixMode (offset 293) */
+ "i\0"
+ "glMatrixMode\0"
+ "\0"
+ /* _mesa_function_pool[35448]: GetPixelMapusv (offset 273) */
+ "ip\0"
+ "glGetPixelMapusv\0"
+ "\0"
+ /* _mesa_function_pool[35469]: Lighti (offset 161) */
+ "iii\0"
+ "glLighti\0"
+ "\0"
+ /* _mesa_function_pool[35483]: VertexAttribPointerNV (will be remapped) */
+ "iiiip\0"
+ "glVertexAttribPointerNV\0"
+ "\0"
+ /* _mesa_function_pool[35514]: GetFragDataIndex (will be remapped) */
+ "ip\0"
+ "glGetFragDataIndex\0"
+ "glGetFragDataIndexEXT\0"
+ "\0"
+ /* _mesa_function_pool[35559]: Lightx (will be remapped) */
+ "iii\0"
+ "glLightxOES\0"
+ "glLightx\0"
+ "\0"
+ /* _mesa_function_pool[35585]: ProgramUniform3fv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform3fv\0"
+ "glProgramUniform3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[35634]: MultMatrixd (offset 295) */
+ "p\0"
+ "glMultMatrixd\0"
+ "\0"
+ /* _mesa_function_pool[35651]: MultMatrixf (offset 294) */
+ "p\0"
+ "glMultMatrixf\0"
+ "\0"
+ /* _mesa_function_pool[35668]: Uniform4ui64vARB (will be remapped) */
+ "iip\0"
+ "glUniform4ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[35692]: MultiTexCoord4fvARB (offset 403) */
+ "ip\0"
+ "glMultiTexCoord4fv\0"
+ "glMultiTexCoord4fvARB\0"
+ "\0"
+ /* _mesa_function_pool[35737]: UniformMatrix2x3fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix2x3fv\0"
+ "\0"
+ /* _mesa_function_pool[35764]: TrackMatrixNV (will be remapped) */
+ "iiii\0"
+ "glTrackMatrixNV\0"
+ "\0"
+ /* _mesa_function_pool[35786]: SamplerParameterf (will be remapped) */
+ "iif\0"
+ "glSamplerParameterf\0"
+ "\0"
+ /* _mesa_function_pool[35811]: UniformMatrix3dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3dv\0"
+ "\0"
+ /* _mesa_function_pool[35836]: PointParameterx (will be remapped) */
+ "ii\0"
+ "glPointParameterxOES\0"
+ "glPointParameterx\0"
+ "\0"
+ /* _mesa_function_pool[35879]: DrawArrays (offset 310) */
+ "iii\0"
+ "glDrawArrays\0"
+ "glDrawArraysEXT\0"
+ "\0"
+ /* _mesa_function_pool[35913]: Uniform3dv (will be remapped) */
+ "iip\0"
+ "glUniform3dv\0"
+ "\0"
+ /* _mesa_function_pool[35931]: PointParameteri (will be remapped) */
+ "ii\0"
+ "glPointParameteri\0"
+ "glPointParameteriNV\0"
+ "\0"
+ /* _mesa_function_pool[35973]: PointParameterf (will be remapped) */
+ "if\0"
+ "glPointParameterf\0"
+ "glPointParameterfARB\0"
+ "glPointParameterfEXT\0"
+ "glPointParameterfSGIS\0"
+ "\0"
+ /* _mesa_function_pool[36059]: GlobalAlphaFactorsSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactorsSUN\0"
+ "\0"
+ /* _mesa_function_pool[36086]: VertexAttribBinding (will be remapped) */
+ "ii\0"
+ "glVertexAttribBinding\0"
+ "\0"
+ /* _mesa_function_pool[36112]: TextureSubImage2D (will be remapped) */
+ "iiiiiiiip\0"
+ "glTextureSubImage2D\0"
+ "\0"
+ /* _mesa_function_pool[36143]: ReplacementCodeuiTexCoord2fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glReplacementCodeuiTexCoord2fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[36190]: CreateShader (will be remapped) */
+ "i\0"
+ "glCreateShader\0"
+ "\0"
+ /* _mesa_function_pool[36208]: GetProgramParameterdvNV (will be remapped) */
+ "iiip\0"
+ "glGetProgramParameterdvNV\0"
+ "\0"
+ /* _mesa_function_pool[36240]: ProgramUniform1dv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1dv\0"
+ "\0"
+ /* _mesa_function_pool[36266]: GetProgramEnvParameterfvARB (will be remapped) */
+ "iip\0"
+ "glGetProgramEnvParameterfvARB\0"
+ "\0"
+ /* _mesa_function_pool[36301]: DeleteBuffers (will be remapped) */
+ "ip\0"
+ "glDeleteBuffers\0"
+ "glDeleteBuffersARB\0"
+ "\0"
+ /* _mesa_function_pool[36340]: GetBufferSubData (will be remapped) */
+ "iiip\0"
+ "glGetBufferSubData\0"
+ "glGetBufferSubDataARB\0"
+ "\0"
+ /* _mesa_function_pool[36387]: GetNamedRenderbufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetNamedRenderbufferParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[36426]: GetPerfMonitorGroupsAMD (will be remapped) */
+ "pip\0"
+ "glGetPerfMonitorGroupsAMD\0"
+ "\0"
+ /* _mesa_function_pool[36457]: FlushRasterSGIX (dynamic) */
+ "\0"
+ "glFlushRasterSGIX\0"
+ "\0"
+ /* _mesa_function_pool[36477]: VertexAttribP2ui (will be remapped) */
+ "iiii\0"
+ "glVertexAttribP2ui\0"
+ "\0"
+ /* _mesa_function_pool[36502]: ProgramUniform4dv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4dv\0"
+ "\0"
+ /* _mesa_function_pool[36528]: GetMinmaxParameteriv (offset 366) */
+ "iip\0"
+ "glGetMinmaxParameteriv\0"
+ "glGetMinmaxParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[36582]: DrawTexivOES (will be remapped) */
+ "p\0"
+ "glDrawTexivOES\0"
+ "\0"
+ /* _mesa_function_pool[36600]: CopyTexImage1D (offset 323) */
+ "iiiiiii\0"
+ "glCopyTexImage1D\0"
+ "glCopyTexImage1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[36646]: InvalidateNamedFramebufferData (will be remapped) */
+ "iip\0"
+ "glInvalidateNamedFramebufferData\0"
+ "\0"
+ /* _mesa_function_pool[36684]: SemaphoreParameterui64vEXT (will be remapped) */
+ "iip\0"
+ "glSemaphoreParameterui64vEXT\0"
+ "\0"
+ /* _mesa_function_pool[36718]: GetnColorTableARB (will be remapped) */
+ "iiiip\0"
+ "glGetnColorTableARB\0"
+ "\0"
+ /* _mesa_function_pool[36745]: VertexAttribFormat (will be remapped) */
+ "iiiii\0"
+ "glVertexAttribFormat\0"
+ "\0"
+ /* _mesa_function_pool[36773]: Vertex3i (offset 138) */
+ "iii\0"
+ "glVertex3i\0"
+ "\0"
+ /* _mesa_function_pool[36789]: Vertex3f (offset 136) */
+ "fff\0"
+ "glVertex3f\0"
+ "\0"
+ /* _mesa_function_pool[36805]: Vertex3d (offset 134) */
+ "ddd\0"
+ "glVertex3d\0"
+ "\0"
+ /* _mesa_function_pool[36821]: GetProgramPipelineiv (will be remapped) */
+ "iip\0"
+ "glGetProgramPipelineiv\0"
+ "glGetProgramPipelineivEXT\0"
+ "\0"
+ /* _mesa_function_pool[36875]: ReadBuffer (offset 254) */
+ "i\0"
+ "glReadBuffer\0"
+ "glReadBufferNV\0"
+ "\0"
+ /* _mesa_function_pool[36906]: ConvolutionParameteri (offset 352) */
+ "iii\0"
+ "glConvolutionParameteri\0"
+ "glConvolutionParameteriEXT\0"
+ "\0"
+ /* _mesa_function_pool[36962]: GetTexParameterIiv (will be remapped) */
+ "iip\0"
+ "glGetTexParameterIivEXT\0"
+ "glGetTexParameterIiv\0"
+ "glGetTexParameterIivOES\0"
+ "\0"
+ /* _mesa_function_pool[37036]: Vertex3s (offset 140) */
+ "iii\0"
+ "glVertex3s\0"
+ "\0"
+ /* _mesa_function_pool[37052]: ConvolutionParameterf (offset 350) */
+ "iif\0"
+ "glConvolutionParameterf\0"
+ "glConvolutionParameterfEXT\0"
+ "\0"
+ /* _mesa_function_pool[37108]: GetColorTableParameteriv (offset 345) */
+ "iip\0"
+ "glGetColorTableParameteriv\0"
+ "glGetColorTableParameterivSGI\0"
+ "glGetColorTableParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[37200]: GetTransformFeedbackVarying (will be remapped) */
+ "iiipppp\0"
+ "glGetTransformFeedbackVarying\0"
+ "glGetTransformFeedbackVaryingEXT\0"
+ "\0"
+ /* _mesa_function_pool[37272]: GetNextPerfQueryIdINTEL (will be remapped) */
+ "ip\0"
+ "glGetNextPerfQueryIdINTEL\0"
+ "\0"
+ /* _mesa_function_pool[37302]: TexCoord3fv (offset 113) */
+ "p\0"
+ "glTexCoord3fv\0"
+ "\0"
+ /* _mesa_function_pool[37319]: TextureBarrierNV (will be remapped) */
+ "\0"
+ "glTextureBarrier\0"
+ "glTextureBarrierNV\0"
+ "\0"
+ /* _mesa_function_pool[37357]: GetProgramInterfaceiv (will be remapped) */
+ "iiip\0"
+ "glGetProgramInterfaceiv\0"
+ "\0"
+ /* _mesa_function_pool[37387]: ReplacementCodeuiColor4fNormal3fVertex3fSUN (dynamic) */
+ "iffffffffff\0"
+ "glReplacementCodeuiColor4fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[37446]: VertexAttribL1ui64vARB (will be remapped) */
+ "ip\0"
+ "glVertexAttribL1ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[37475]: ProgramLocalParameter4fARB (will be remapped) */
+ "iiffff\0"
+ "glProgramLocalParameter4fARB\0"
+ "\0"
+ /* _mesa_function_pool[37512]: PauseTransformFeedback (will be remapped) */
+ "\0"
+ "glPauseTransformFeedback\0"
+ "\0"
+ /* _mesa_function_pool[37539]: DeleteShader (will be remapped) */
+ "i\0"
+ "glDeleteShader\0"
+ "\0"
+ /* _mesa_function_pool[37557]: NamedFramebufferRenderbuffer (will be remapped) */
+ "iiii\0"
+ "glNamedFramebufferRenderbuffer\0"
+ "\0"
+ /* _mesa_function_pool[37594]: CompileShader (will be remapped) */
+ "i\0"
+ "glCompileShader\0"
+ "glCompileShaderARB\0"
+ "\0"
+ /* _mesa_function_pool[37632]: Vertex2iv (offset 131) */
+ "p\0"
+ "glVertex2iv\0"
+ "\0"
+ /* _mesa_function_pool[37647]: GetVertexArrayIndexediv (will be remapped) */
+ "iiip\0"
+ "glGetVertexArrayIndexediv\0"
+ "\0"
+ /* _mesa_function_pool[37679]: TexParameterIiv (will be remapped) */
+ "iip\0"
+ "glTexParameterIivEXT\0"
+ "glTexParameterIiv\0"
+ "glTexParameterIivOES\0"
+ "\0"
+ /* _mesa_function_pool[37744]: TexGendv (offset 189) */
+ "iip\0"
+ "glTexGendv\0"
+ "\0"
+ /* _mesa_function_pool[37760]: TextureLightEXT (dynamic) */
+ "i\0"
+ "glTextureLightEXT\0"
+ "\0"
+ /* _mesa_function_pool[37781]: ResetMinmax (offset 370) */
+ "i\0"
+ "glResetMinmax\0"
+ "glResetMinmaxEXT\0"
+ "\0"
+ /* _mesa_function_pool[37815]: SampleCoverage (will be remapped) */
+ "fi\0"
+ "glSampleCoverage\0"
+ "glSampleCoverageARB\0"
+ "\0"
+ /* _mesa_function_pool[37856]: SpriteParameterfSGIX (dynamic) */
+ "if\0"
+ "glSpriteParameterfSGIX\0"
+ "\0"
+ /* _mesa_function_pool[37883]: GenerateTextureMipmap (will be remapped) */
+ "i\0"
+ "glGenerateTextureMipmap\0"
+ "\0"
+ /* _mesa_function_pool[37910]: DeleteProgramsARB (will be remapped) */
+ "ip\0"
+ "glDeleteProgramsARB\0"
+ "glDeleteProgramsNV\0"
+ "\0"
+ /* _mesa_function_pool[37953]: ShadeModel (offset 177) */
+ "i\0"
+ "glShadeModel\0"
+ "\0"
+ /* _mesa_function_pool[37969]: CreateQueries (will be remapped) */
+ "iip\0"
+ "glCreateQueries\0"
+ "\0"
+ /* _mesa_function_pool[37990]: FogFuncSGIS (dynamic) */
+ "ip\0"
+ "glFogFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[38008]: TexCoord4fVertex4fSUN (dynamic) */
+ "ffffffff\0"
+ "glTexCoord4fVertex4fSUN\0"
+ "\0"
+ /* _mesa_function_pool[38042]: MultiDrawArrays (will be remapped) */
+ "ippi\0"
+ "glMultiDrawArrays\0"
+ "glMultiDrawArraysEXT\0"
+ "\0"
+ /* _mesa_function_pool[38087]: GetProgramLocalParameterdvARB (will be remapped) */
+ "iip\0"
+ "glGetProgramLocalParameterdvARB\0"
+ "\0"
+ /* _mesa_function_pool[38124]: BufferParameteriAPPLE (will be remapped) */
+ "iii\0"
+ "glBufferParameteriAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[38153]: MapBufferRange (will be remapped) */
+ "iiii\0"
+ "glMapBufferRange\0"
+ "glMapBufferRangeEXT\0"
+ "\0"
+ /* _mesa_function_pool[38196]: DispatchCompute (will be remapped) */
+ "iii\0"
+ "glDispatchCompute\0"
+ "\0"
+ /* _mesa_function_pool[38219]: UseProgramStages (will be remapped) */
+ "iii\0"
+ "glUseProgramStages\0"
+ "glUseProgramStagesEXT\0"
+ "\0"
+ /* _mesa_function_pool[38265]: ProgramUniformMatrix4fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4fv\0"
+ "glProgramUniformMatrix4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[38327]: FinishAsyncSGIX (dynamic) */
+ "p\0"
+ "glFinishAsyncSGIX\0"
+ "\0"
+ /* _mesa_function_pool[38348]: FramebufferRenderbuffer (will be remapped) */
+ "iiii\0"
+ "glFramebufferRenderbuffer\0"
+ "glFramebufferRenderbufferEXT\0"
+ "glFramebufferRenderbufferOES\0"
+ "\0"
+ /* _mesa_function_pool[38438]: IsProgramARB (will be remapped) */
+ "i\0"
+ "glIsProgramARB\0"
+ "glIsProgramNV\0"
+ "\0"
+ /* _mesa_function_pool[38470]: Map2d (offset 222) */
+ "iddiiddiip\0"
+ "glMap2d\0"
+ "\0"
+ /* _mesa_function_pool[38490]: Map2f (offset 223) */
+ "iffiiffiip\0"
+ "glMap2f\0"
+ "\0"
+ /* _mesa_function_pool[38510]: ProgramStringARB (will be remapped) */
+ "iiip\0"
+ "glProgramStringARB\0"
+ "\0"
+ /* _mesa_function_pool[38535]: CopyTextureSubImage2D (will be remapped) */
+ "iiiiiiii\0"
+ "glCopyTextureSubImage2D\0"
+ "\0"
+ /* _mesa_function_pool[38569]: MultiTexCoord4s (offset 406) */
+ "iiiii\0"
+ "glMultiTexCoord4s\0"
+ "glMultiTexCoord4sARB\0"
+ "\0"
+ /* _mesa_function_pool[38615]: ViewportIndexedf (will be remapped) */
+ "iffff\0"
+ "glViewportIndexedf\0"
+ "glViewportIndexedfOES\0"
+ "\0"
+ /* _mesa_function_pool[38663]: MultiTexCoord4i (offset 404) */
+ "iiiii\0"
+ "glMultiTexCoord4i\0"
+ "glMultiTexCoord4iARB\0"
+ "\0"
+ /* _mesa_function_pool[38709]: ApplyTextureEXT (dynamic) */
+ "i\0"
+ "glApplyTextureEXT\0"
+ "\0"
+ /* _mesa_function_pool[38730]: DebugMessageControl (will be remapped) */
+ "iiiipi\0"
+ "glDebugMessageControlARB\0"
+ "glDebugMessageControl\0"
+ "glDebugMessageControlKHR\0"
+ "\0"
+ /* _mesa_function_pool[38810]: MultiTexCoord4d (offset 400) */
+ "idddd\0"
+ "glMultiTexCoord4d\0"
+ "glMultiTexCoord4dARB\0"
+ "\0"
+ /* _mesa_function_pool[38856]: GetHistogram (offset 361) */
+ "iiiip\0"
+ "glGetHistogram\0"
+ "glGetHistogramEXT\0"
+ "\0"
+ /* _mesa_function_pool[38896]: Translatex (will be remapped) */
+ "iii\0"
+ "glTranslatexOES\0"
+ "glTranslatex\0"
+ "\0"
+ /* _mesa_function_pool[38930]: MultiDrawElementsIndirectCountARB (will be remapped) */
+ "iiiiii\0"
+ "glMultiDrawElementsIndirectCountARB\0"
+ "glMultiDrawElementsIndirectCount\0"
+ "\0"
+ /* _mesa_function_pool[39007]: IglooInterfaceSGIX (dynamic) */
+ "ip\0"
+ "glIglooInterfaceSGIX\0"
+ "\0"
+ /* _mesa_function_pool[39032]: Indexsv (offset 51) */
+ "p\0"
+ "glIndexsv\0"
+ "\0"
+ /* _mesa_function_pool[39045]: VertexAttrib1fvARB (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1fv\0"
+ "glVertexAttrib1fvARB\0"
+ "\0"
+ /* _mesa_function_pool[39088]: TexCoord2dv (offset 103) */
+ "p\0"
+ "glTexCoord2dv\0"
+ "\0"
+ /* _mesa_function_pool[39105]: GetDetailTexFuncSGIS (dynamic) */
+ "ip\0"
+ "glGetDetailTexFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[39132]: Translated (offset 303) */
+ "ddd\0"
+ "glTranslated\0"
+ "\0"
+ /* _mesa_function_pool[39150]: Translatef (offset 304) */
+ "fff\0"
+ "glTranslatef\0"
+ "\0"
+ /* _mesa_function_pool[39168]: MultTransposeMatrixd (will be remapped) */
+ "p\0"
+ "glMultTransposeMatrixd\0"
+ "glMultTransposeMatrixdARB\0"
+ "\0"
+ /* _mesa_function_pool[39220]: ProgramUniform4uiv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4uiv\0"
+ "glProgramUniform4uivEXT\0"
+ "\0"
+ /* _mesa_function_pool[39271]: GetPerfCounterInfoINTEL (will be remapped) */
+ "iiipipppppp\0"
+ "glGetPerfCounterInfoINTEL\0"
+ "\0"
+ /* _mesa_function_pool[39310]: RenderMode (offset 196) */
+ "i\0"
+ "glRenderMode\0"
+ "\0"
+ /* _mesa_function_pool[39326]: MultiTexCoord1fARB (offset 378) */
+ "if\0"
+ "glMultiTexCoord1f\0"
+ "glMultiTexCoord1fARB\0"
+ "\0"
+ /* _mesa_function_pool[39369]: SecondaryColor3d (will be remapped) */
+ "ddd\0"
+ "glSecondaryColor3d\0"
+ "glSecondaryColor3dEXT\0"
+ "\0"
+ /* _mesa_function_pool[39415]: FramebufferParameteri (will be remapped) */
+ "iii\0"
+ "glFramebufferParameteri\0"
+ "\0"
+ /* _mesa_function_pool[39444]: VertexAttribs4ubvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs4ubvNV\0"
+ "\0"
+ /* _mesa_function_pool[39471]: WeightsvARB (dynamic) */
+ "ip\0"
+ "glWeightsvARB\0"
+ "\0"
+ /* _mesa_function_pool[39489]: LightModelxv (will be remapped) */
+ "ip\0"
+ "glLightModelxvOES\0"
+ "glLightModelxv\0"
+ "\0"
+ /* _mesa_function_pool[39526]: CopyTexSubImage1D (offset 325) */
+ "iiiiii\0"
+ "glCopyTexSubImage1D\0"
+ "glCopyTexSubImage1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[39577]: TextureSubImage3D (will be remapped) */
+ "iiiiiiiiiip\0"
+ "glTextureSubImage3D\0"
+ "\0"
+ /* _mesa_function_pool[39610]: StencilFunc (offset 243) */
+ "iii\0"
+ "glStencilFunc\0"
+ "\0"
+ /* _mesa_function_pool[39629]: CopyPixels (offset 255) */
+ "iiiii\0"
+ "glCopyPixels\0"
+ "\0"
+ /* _mesa_function_pool[39649]: TexGenxvOES (will be remapped) */
+ "iip\0"
+ "glTexGenxvOES\0"
+ "\0"
+ /* _mesa_function_pool[39668]: GetTextureLevelParameterfv (will be remapped) */
+ "iiip\0"
+ "glGetTextureLevelParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[39703]: VertexAttrib4Nubv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Nubv\0"
+ "glVertexAttrib4NubvARB\0"
+ "\0"
+ /* _mesa_function_pool[39750]: GetFogFuncSGIS (dynamic) */
+ "p\0"
+ "glGetFogFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[39770]: UniformMatrix4x2dv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4x2dv\0"
+ "\0"
+ /* _mesa_function_pool[39797]: VertexAttribPointer (will be remapped) */
+ "iiiiip\0"
+ "glVertexAttribPointer\0"
+ "glVertexAttribPointerARB\0"
+ "\0"
+ /* _mesa_function_pool[39852]: IndexMask (offset 212) */
+ "i\0"
+ "glIndexMask\0"
+ "\0"
+ /* _mesa_function_pool[39867]: SharpenTexFuncSGIS (dynamic) */
+ "iip\0"
+ "glSharpenTexFuncSGIS\0"
+ "\0"
+ /* _mesa_function_pool[39893]: VertexAttribIFormat (will be remapped) */
+ "iiii\0"
+ "glVertexAttribIFormat\0"
+ "\0"
+ /* _mesa_function_pool[39921]: CombinerOutputNV (dynamic) */
+ "iiiiiiiiii\0"
+ "glCombinerOutputNV\0"
+ "\0"
+ /* _mesa_function_pool[39952]: DrawArraysInstancedBaseInstance (will be remapped) */
+ "iiiii\0"
+ "glDrawArraysInstancedBaseInstance\0"
+ "glDrawArraysInstancedBaseInstanceEXT\0"
+ "\0"
+ /* _mesa_function_pool[40030]: TextureStorageMem3DMultisampleEXT (will be remapped) */
+ "iiiiiiiii\0"
+ "glTextureStorageMem3DMultisampleEXT\0"
+ "\0"
+ /* _mesa_function_pool[40077]: CompressedTextureSubImage3D (will be remapped) */
+ "iiiiiiiiiip\0"
+ "glCompressedTextureSubImage3D\0"
+ "\0"
+ /* _mesa_function_pool[40120]: PopAttrib (offset 218) */
+ "\0"
+ "glPopAttrib\0"
+ "\0"
+ /* _mesa_function_pool[40134]: SamplePatternSGIS (will be remapped) */
+ "i\0"
+ "glSamplePatternSGIS\0"
+ "glSamplePatternEXT\0"
+ "\0"
+ /* _mesa_function_pool[40176]: Uniform3ui (will be remapped) */
+ "iiii\0"
+ "glUniform3uiEXT\0"
+ "glUniform3ui\0"
+ "\0"
+ /* _mesa_function_pool[40211]: DeletePerfMonitorsAMD (will be remapped) */
+ "ip\0"
+ "glDeletePerfMonitorsAMD\0"
+ "\0"
+ /* _mesa_function_pool[40239]: Color4dv (offset 28) */
+ "p\0"
+ "glColor4dv\0"
+ "\0"
+ /* _mesa_function_pool[40253]: AreProgramsResidentNV (will be remapped) */
+ "ipp\0"
+ "glAreProgramsResidentNV\0"
+ "\0"
+ /* _mesa_function_pool[40282]: DisableVertexAttribArray (will be remapped) */
+ "i\0"
+ "glDisableVertexAttribArray\0"
+ "glDisableVertexAttribArrayARB\0"
+ "\0"
+ /* _mesa_function_pool[40342]: ProgramUniformMatrix3x2fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3x2fv\0"
+ "glProgramUniformMatrix3x2fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[40408]: GetDoublei_v (will be remapped) */
+ "iip\0"
+ "glGetDoublei_v\0"
+ "\0"
+ /* _mesa_function_pool[40428]: IsTransformFeedback (will be remapped) */
+ "i\0"
+ "glIsTransformFeedback\0"
+ "\0"
+ /* _mesa_function_pool[40453]: GetMemoryObjectParameterivEXT (will be remapped) */
+ "iip\0"
+ "glGetMemoryObjectParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[40490]: ClipPlanex (will be remapped) */
+ "ip\0"
+ "glClipPlanexOES\0"
+ "glClipPlanex\0"
+ "\0"
+ /* _mesa_function_pool[40523]: ReplacementCodeuiColor3fVertex3fSUN (dynamic) */
+ "iffffff\0"
+ "glReplacementCodeuiColor3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[40570]: GetLightfv (offset 264) */
+ "iip\0"
+ "glGetLightfv\0"
+ "\0"
+ /* _mesa_function_pool[40588]: ClipPlanef (will be remapped) */
+ "ip\0"
+ "glClipPlanefOES\0"
+ "glClipPlanef\0"
+ "\0"
+ /* _mesa_function_pool[40621]: ProgramUniform1ui (will be remapped) */
+ "iii\0"
+ "glProgramUniform1ui\0"
+ "glProgramUniform1uiEXT\0"
+ "\0"
+ /* _mesa_function_pool[40669]: SecondaryColorPointer (will be remapped) */
+ "iiip\0"
+ "glSecondaryColorPointer\0"
+ "glSecondaryColorPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[40726]: Tangent3svEXT (dynamic) */
+ "p\0"
+ "glTangent3svEXT\0"
+ "\0"
+ /* _mesa_function_pool[40745]: Tangent3iEXT (dynamic) */
+ "iii\0"
+ "glTangent3iEXT\0"
+ "\0"
+ /* _mesa_function_pool[40765]: LineStipple (offset 167) */
+ "ii\0"
+ "glLineStipple\0"
+ "\0"
+ /* _mesa_function_pool[40783]: FragmentLightfSGIX (dynamic) */
+ "iif\0"
+ "glFragmentLightfSGIX\0"
+ "\0"
+ /* _mesa_function_pool[40809]: BeginFragmentShaderATI (will be remapped) */
+ "\0"
+ "glBeginFragmentShaderATI\0"
+ "\0"
+ /* _mesa_function_pool[40836]: GenRenderbuffers (will be remapped) */
+ "ip\0"
+ "glGenRenderbuffers\0"
+ "glGenRenderbuffersEXT\0"
+ "glGenRenderbuffersOES\0"
+ "\0"
+ /* _mesa_function_pool[40903]: GetMinmaxParameterfv (offset 365) */
+ "iip\0"
+ "glGetMinmaxParameterfv\0"
+ "glGetMinmaxParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[40957]: TextureStorageMem2DEXT (will be remapped) */
+ "iiiiiii\0"
+ "glTextureStorageMem2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[40991]: IsEnabledi (will be remapped) */
+ "ii\0"
+ "glIsEnabledIndexedEXT\0"
+ "glIsEnabledi\0"
+ "glIsEnablediEXT\0"
+ "glIsEnablediOES\0"
+ "\0"
+ /* _mesa_function_pool[41062]: FragmentMaterialivSGIX (dynamic) */
+ "iip\0"
+ "glFragmentMaterialivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[41092]: WaitSync (will be remapped) */
+ "iii\0"
+ "glWaitSync\0"
+ "\0"
+ /* _mesa_function_pool[41108]: GetVertexAttribPointerv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribPointerv\0"
+ "glGetVertexAttribPointervARB\0"
+ "glGetVertexAttribPointervNV\0"
+ "\0"
+ /* _mesa_function_pool[41196]: Uniform1i64vARB (will be remapped) */
+ "iip\0"
+ "glUniform1i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[41219]: CreatePerfQueryINTEL (will be remapped) */
+ "ip\0"
+ "glCreatePerfQueryINTEL\0"
+ "\0"
+ /* _mesa_function_pool[41246]: NewList (dynamic) */
+ "ii\0"
+ "glNewList\0"
+ "\0"
+ /* _mesa_function_pool[41260]: TexBuffer (will be remapped) */
+ "iii\0"
+ "glTexBufferARB\0"
+ "glTexBuffer\0"
+ "glTexBufferEXT\0"
+ "glTexBufferOES\0"
+ "\0"
+ /* _mesa_function_pool[41322]: TexCoord4sv (offset 125) */
+ "p\0"
+ "glTexCoord4sv\0"
+ "\0"
+ /* _mesa_function_pool[41339]: TexCoord1f (offset 96) */
+ "f\0"
+ "glTexCoord1f\0"
+ "\0"
+ /* _mesa_function_pool[41355]: TexCoord1d (offset 94) */
+ "d\0"
+ "glTexCoord1d\0"
+ "\0"
+ /* _mesa_function_pool[41371]: TexCoord1i (offset 98) */
+ "i\0"
+ "glTexCoord1i\0"
+ "\0"
+ /* _mesa_function_pool[41387]: GetnUniformfvARB (will be remapped) */
+ "iiip\0"
+ "glGetnUniformfvARB\0"
+ "glGetnUniformfv\0"
+ "glGetnUniformfvKHR\0"
+ "\0"
+ /* _mesa_function_pool[41447]: TexCoord1s (offset 100) */
+ "i\0"
+ "glTexCoord1s\0"
+ "\0"
+ /* _mesa_function_pool[41463]: GlobalAlphaFactoriSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactoriSUN\0"
+ "\0"
+ /* _mesa_function_pool[41490]: Uniform1ui (will be remapped) */
+ "ii\0"
+ "glUniform1uiEXT\0"
+ "glUniform1ui\0"
+ "\0"
+ /* _mesa_function_pool[41523]: TexStorage1D (will be remapped) */
+ "iiii\0"
+ "glTexStorage1D\0"
+ "\0"
+ /* _mesa_function_pool[41544]: BlitFramebuffer (will be remapped) */
+ "iiiiiiiiii\0"
+ "glBlitFramebuffer\0"
+ "glBlitFramebufferEXT\0"
+ "\0"
+ /* _mesa_function_pool[41595]: TextureParameterf (will be remapped) */
+ "iif\0"
+ "glTextureParameterf\0"
+ "\0"
+ /* _mesa_function_pool[41620]: FramebufferTexture1D (will be remapped) */
+ "iiiii\0"
+ "glFramebufferTexture1D\0"
+ "glFramebufferTexture1DEXT\0"
+ "\0"
+ /* _mesa_function_pool[41676]: TextureParameteri (will be remapped) */
+ "iii\0"
+ "glTextureParameteri\0"
+ "\0"
+ /* _mesa_function_pool[41701]: GetMapiv (offset 268) */
+ "iip\0"
+ "glGetMapiv\0"
+ "\0"
+ /* _mesa_function_pool[41717]: GetUniformui64vARB (will be remapped) */
+ "iip\0"
+ "glGetUniformui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[41743]: TexCoordP4ui (will be remapped) */
+ "ii\0"
+ "glTexCoordP4ui\0"
+ "\0"
+ /* _mesa_function_pool[41762]: VertexAttrib1sv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1sv\0"
+ "glVertexAttrib1svARB\0"
+ "\0"
+ /* _mesa_function_pool[41805]: WindowPos4dMESA (will be remapped) */
+ "dddd\0"
+ "glWindowPos4dMESA\0"
+ "\0"
+ /* _mesa_function_pool[41829]: Vertex3dv (offset 135) */
+ "p\0"
+ "glVertex3dv\0"
+ "\0"
+ /* _mesa_function_pool[41844]: CreateShaderProgramEXT (will be remapped) */
+ "ip\0"
+ "glCreateShaderProgramEXT\0"
+ "\0"
+ /* _mesa_function_pool[41873]: VertexAttribL2d (will be remapped) */
+ "idd\0"
+ "glVertexAttribL2d\0"
+ "\0"
+ /* _mesa_function_pool[41896]: GetnMapivARB (will be remapped) */
+ "iiip\0"
+ "glGetnMapivARB\0"
+ "\0"
+ /* _mesa_function_pool[41917]: MapParameterfvNV (dynamic) */
+ "iip\0"
+ "glMapParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[41941]: GetVertexAttribfv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribfv\0"
+ "glGetVertexAttribfvARB\0"
+ "\0"
+ /* _mesa_function_pool[41989]: MultiTexCoordP4uiv (will be remapped) */
+ "iip\0"
+ "glMultiTexCoordP4uiv\0"
+ "\0"
+ /* _mesa_function_pool[42015]: TexGeniv (offset 193) */
+ "iip\0"
+ "glTexGeniv\0"
+ "glTexGenivOES\0"
+ "\0"
+ /* _mesa_function_pool[42045]: IsMemoryObjectEXT (will be remapped) */
+ "i\0"
+ "glIsMemoryObjectEXT\0"
+ "\0"
+ /* _mesa_function_pool[42068]: WeightubvARB (dynamic) */
+ "ip\0"
+ "glWeightubvARB\0"
+ "\0"
+ /* _mesa_function_pool[42087]: BlendColor (offset 336) */
+ "ffff\0"
+ "glBlendColor\0"
+ "glBlendColorEXT\0"
+ "\0"
+ /* _mesa_function_pool[42122]: VertexAttribs2dvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs2dvNV\0"
+ "\0"
+ /* _mesa_function_pool[42148]: VertexAttrib2dvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib2dvNV\0"
+ "\0"
+ /* _mesa_function_pool[42172]: NamedFramebufferDrawBuffers (will be remapped) */
+ "iip\0"
+ "glNamedFramebufferDrawBuffers\0"
+ "\0"
+ /* _mesa_function_pool[42207]: ResetHistogram (offset 369) */
+ "i\0"
+ "glResetHistogram\0"
+ "glResetHistogramEXT\0"
+ "\0"
+ /* _mesa_function_pool[42247]: CompressedTexSubImage2D (will be remapped) */
+ "iiiiiiiip\0"
+ "glCompressedTexSubImage2D\0"
+ "glCompressedTexSubImage2DARB\0"
+ "\0"
+ /* _mesa_function_pool[42313]: TexCoord2sv (offset 109) */
+ "p\0"
+ "glTexCoord2sv\0"
+ "\0"
+ /* _mesa_function_pool[42330]: StencilMaskSeparate (will be remapped) */
+ "ii\0"
+ "glStencilMaskSeparate\0"
+ "\0"
+ /* _mesa_function_pool[42356]: MultiTexCoord3sv (offset 399) */
+ "ip\0"
+ "glMultiTexCoord3sv\0"
+ "glMultiTexCoord3svARB\0"
+ "\0"
+ /* _mesa_function_pool[42401]: GetMapParameterfvNV (dynamic) */
+ "iip\0"
+ "glGetMapParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[42428]: TexCoord3iv (offset 115) */
+ "p\0"
+ "glTexCoord3iv\0"
+ "\0"
+ /* _mesa_function_pool[42445]: MultiTexCoord4sv (offset 407) */
+ "ip\0"
+ "glMultiTexCoord4sv\0"
+ "glMultiTexCoord4svARB\0"
+ "\0"
+ /* _mesa_function_pool[42490]: VertexBindingDivisor (will be remapped) */
+ "ii\0"
+ "glVertexBindingDivisor\0"
+ "\0"
+ /* _mesa_function_pool[42517]: PrimitiveBoundingBox (will be remapped) */
+ "ffffffff\0"
+ "glPrimitiveBoundingBox\0"
+ "glPrimitiveBoundingBoxARB\0"
+ "glPrimitiveBoundingBoxEXT\0"
+ "glPrimitiveBoundingBoxOES\0"
+ "\0"
+ /* _mesa_function_pool[42628]: GetPerfMonitorCounterInfoAMD (will be remapped) */
+ "iiip\0"
+ "glGetPerfMonitorCounterInfoAMD\0"
+ "\0"
+ /* _mesa_function_pool[42665]: UniformBlockBinding (will be remapped) */
+ "iii\0"
+ "glUniformBlockBinding\0"
+ "\0"
+ /* _mesa_function_pool[42692]: FenceSync (will be remapped) */
+ "ii\0"
+ "glFenceSync\0"
+ "\0"
+ /* _mesa_function_pool[42708]: CompressedTextureSubImage2D (will be remapped) */
+ "iiiiiiiip\0"
+ "glCompressedTextureSubImage2D\0"
+ "\0"
+ /* _mesa_function_pool[42749]: VertexAttrib4Nusv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4Nusv\0"
+ "glVertexAttrib4NusvARB\0"
+ "\0"
+ /* _mesa_function_pool[42796]: SetFragmentShaderConstantATI (will be remapped) */
+ "ip\0"
+ "glSetFragmentShaderConstantATI\0"
+ "\0"
+ /* _mesa_function_pool[42831]: VertexP2ui (will be remapped) */
+ "ii\0"
+ "glVertexP2ui\0"
+ "\0"
+ /* _mesa_function_pool[42848]: ProgramUniform2fv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2fv\0"
+ "glProgramUniform2fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[42897]: GetTextureLevelParameteriv (will be remapped) */
+ "iiip\0"
+ "glGetTextureLevelParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[42932]: GetTexEnvfv (offset 276) */
+ "iip\0"
+ "glGetTexEnvfv\0"
+ "\0"
+ /* _mesa_function_pool[42951]: BindAttribLocation (will be remapped) */
+ "iip\0"
+ "glBindAttribLocation\0"
+ "glBindAttribLocationARB\0"
+ "\0"
+ /* _mesa_function_pool[43001]: TextureStorage2DEXT (will be remapped) */
+ "iiiiii\0"
+ "glTextureStorage2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[43031]: TextureParameterIiv (will be remapped) */
+ "iip\0"
+ "glTextureParameterIiv\0"
+ "\0"
+ /* _mesa_function_pool[43058]: FragmentLightiSGIX (dynamic) */
+ "iii\0"
+ "glFragmentLightiSGIX\0"
+ "\0"
+ /* _mesa_function_pool[43084]: DrawTransformFeedbackInstanced (will be remapped) */
+ "iii\0"
+ "glDrawTransformFeedbackInstanced\0"
+ "\0"
+ /* _mesa_function_pool[43122]: CopyTextureSubImage1D (will be remapped) */
+ "iiiiii\0"
+ "glCopyTextureSubImage1D\0"
+ "\0"
+ /* _mesa_function_pool[43154]: PollAsyncSGIX (dynamic) */
+ "p\0"
+ "glPollAsyncSGIX\0"
+ "\0"
+ /* _mesa_function_pool[43173]: ResumeTransformFeedback (will be remapped) */
+ "\0"
+ "glResumeTransformFeedback\0"
+ "\0"
+ /* _mesa_function_pool[43201]: GetProgramNamedParameterdvNV (will be remapped) */
+ "iipp\0"
+ "glGetProgramNamedParameterdvNV\0"
+ "\0"
+ /* _mesa_function_pool[43238]: VertexAttribI1iv (will be remapped) */
+ "ip\0"
+ "glVertexAttribI1ivEXT\0"
+ "glVertexAttribI1iv\0"
+ "\0"
+ /* _mesa_function_pool[43283]: Vertex2dv (offset 127) */
+ "p\0"
+ "glVertex2dv\0"
+ "\0"
+ /* _mesa_function_pool[43298]: VertexAttribI2uivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI2uivEXT\0"
+ "glVertexAttribI2uiv\0"
+ "\0"
+ /* _mesa_function_pool[43345]: SampleMaski (will be remapped) */
+ "ii\0"
+ "glSampleMaski\0"
+ "\0"
+ /* _mesa_function_pool[43363]: GetFloati_v (will be remapped) */
+ "iip\0"
+ "glGetFloati_v\0"
+ "glGetFloati_vOES\0"
+ "\0"
+ /* _mesa_function_pool[43399]: MultiTexCoord2iv (offset 389) */
+ "ip\0"
+ "glMultiTexCoord2iv\0"
+ "glMultiTexCoord2ivARB\0"
+ "\0"
+ /* _mesa_function_pool[43444]: DrawPixels (offset 257) */
+ "iiiip\0"
+ "glDrawPixels\0"
+ "\0"
+ /* _mesa_function_pool[43464]: ReplacementCodeuiTexCoord2fNormal3fVertex3fSUN (dynamic) */
+ "iffffffff\0"
+ "glReplacementCodeuiTexCoord2fNormal3fVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[43524]: CreateFramebuffers (will be remapped) */
+ "ip\0"
+ "glCreateFramebuffers\0"
+ "\0"
+ /* _mesa_function_pool[43549]: DrawTransformFeedback (will be remapped) */
+ "ii\0"
+ "glDrawTransformFeedback\0"
+ "\0"
+ /* _mesa_function_pool[43577]: VertexAttribs3fvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs3fvNV\0"
+ "\0"
+ /* _mesa_function_pool[43603]: GenLists (offset 5) */
+ "i\0"
+ "glGenLists\0"
+ "\0"
+ /* _mesa_function_pool[43617]: ProgramUniform2ui64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform2ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[43649]: MapGrid2d (offset 226) */
+ "iddidd\0"
+ "glMapGrid2d\0"
+ "\0"
+ /* _mesa_function_pool[43669]: MapGrid2f (offset 227) */
+ "iffiff\0"
+ "glMapGrid2f\0"
+ "\0"
+ /* _mesa_function_pool[43689]: SampleMapATI (will be remapped) */
+ "iii\0"
+ "glSampleMapATI\0"
+ "\0"
+ /* _mesa_function_pool[43709]: TexBumpParameterfvATI (will be remapped) */
+ "ip\0"
+ "glTexBumpParameterfvATI\0"
+ "\0"
+ /* _mesa_function_pool[43737]: GetActiveAttrib (will be remapped) */
+ "iiipppp\0"
+ "glGetActiveAttrib\0"
+ "glGetActiveAttribARB\0"
+ "\0"
+ /* _mesa_function_pool[43785]: TexCoord2fColor4ubVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glTexCoord2fColor4ubVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[43823]: PixelMapfv (offset 251) */
+ "iip\0"
+ "glPixelMapfv\0"
+ "\0"
+ /* _mesa_function_pool[43841]: ClearBufferData (will be remapped) */
+ "iiiip\0"
+ "glClearBufferData\0"
+ "\0"
+ /* _mesa_function_pool[43866]: Color3usv (offset 24) */
+ "p\0"
+ "glColor3usv\0"
+ "\0"
+ /* _mesa_function_pool[43881]: CopyImageSubData (will be remapped) */
+ "iiiiiiiiiiiiiii\0"
+ "glCopyImageSubData\0"
+ "glCopyImageSubDataEXT\0"
+ "glCopyImageSubDataOES\0"
+ "\0"
+ /* _mesa_function_pool[43961]: StencilOpSeparate (will be remapped) */
+ "iiii\0"
+ "glStencilOpSeparate\0"
+ "glStencilOpSeparateATI\0"
+ "\0"
+ /* _mesa_function_pool[44010]: GenSamplers (will be remapped) */
+ "ip\0"
+ "glGenSamplers\0"
+ "\0"
+ /* _mesa_function_pool[44028]: ClipControl (will be remapped) */
+ "ii\0"
+ "glClipControl\0"
+ "\0"
+ /* _mesa_function_pool[44046]: DrawTexfOES (will be remapped) */
+ "fffff\0"
+ "glDrawTexfOES\0"
+ "\0"
+ /* _mesa_function_pool[44067]: Uniform4i64vARB (will be remapped) */
+ "iip\0"
+ "glUniform4i64vARB\0"
+ "\0"
+ /* _mesa_function_pool[44090]: AttachObjectARB (will be remapped) */
+ "ii\0"
+ "glAttachObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[44112]: GetFragmentLightivSGIX (dynamic) */
+ "iip\0"
+ "glGetFragmentLightivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[44142]: Accum (offset 213) */
+ "if\0"
+ "glAccum\0"
+ "\0"
+ /* _mesa_function_pool[44154]: GetTexImage (offset 281) */
+ "iiiip\0"
+ "glGetTexImage\0"
+ "\0"
+ /* _mesa_function_pool[44175]: Color4x (will be remapped) */
+ "iiii\0"
+ "glColor4xOES\0"
+ "glColor4x\0"
+ "\0"
+ /* _mesa_function_pool[44204]: ConvolutionParameteriv (offset 353) */
+ "iip\0"
+ "glConvolutionParameteriv\0"
+ "glConvolutionParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[44262]: Color4s (offset 33) */
+ "iiii\0"
+ "glColor4s\0"
+ "\0"
+ /* _mesa_function_pool[44278]: CullParameterdvEXT (dynamic) */
+ "ip\0"
+ "glCullParameterdvEXT\0"
+ "\0"
+ /* _mesa_function_pool[44303]: EnableVertexAttribArray (will be remapped) */
+ "i\0"
+ "glEnableVertexAttribArray\0"
+ "glEnableVertexAttribArrayARB\0"
+ "\0"
+ /* _mesa_function_pool[44361]: Color4i (offset 31) */
+ "iiii\0"
+ "glColor4i\0"
+ "\0"
+ /* _mesa_function_pool[44377]: Color4f (offset 29) */
+ "ffff\0"
+ "glColor4f\0"
+ "\0"
+ /* _mesa_function_pool[44393]: ShaderStorageBlockBinding (will be remapped) */
+ "iii\0"
+ "glShaderStorageBlockBinding\0"
+ "\0"
+ /* _mesa_function_pool[44426]: Color4d (offset 27) */
+ "dddd\0"
+ "glColor4d\0"
+ "\0"
+ /* _mesa_function_pool[44442]: Color4b (offset 25) */
+ "iiii\0"
+ "glColor4b\0"
+ "\0"
+ /* _mesa_function_pool[44458]: MemoryObjectParameterivEXT (will be remapped) */
+ "iip\0"
+ "glMemoryObjectParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[44492]: LoadProgramNV (will be remapped) */
+ "iiip\0"
+ "glLoadProgramNV\0"
+ "\0"
+ /* _mesa_function_pool[44514]: GetAttachedObjectsARB (will be remapped) */
+ "iipp\0"
+ "glGetAttachedObjectsARB\0"
+ "\0"
+ /* _mesa_function_pool[44544]: EvalCoord1fv (offset 231) */
+ "p\0"
+ "glEvalCoord1fv\0"
+ "\0"
+ /* _mesa_function_pool[44562]: VertexAttribLFormat (will be remapped) */
+ "iiii\0"
+ "glVertexAttribLFormat\0"
+ "\0"
+ /* _mesa_function_pool[44590]: VertexAttribL3d (will be remapped) */
+ "iddd\0"
+ "glVertexAttribL3d\0"
+ "\0"
+ /* _mesa_function_pool[44614]: ClearNamedFramebufferuiv (will be remapped) */
+ "iiip\0"
+ "glClearNamedFramebufferuiv\0"
+ "\0"
+ /* _mesa_function_pool[44647]: StencilFuncSeparate (will be remapped) */
+ "iiii\0"
+ "glStencilFuncSeparate\0"
+ "\0"
+ /* _mesa_function_pool[44675]: ShaderSource (will be remapped) */
+ "iipp\0"
+ "glShaderSource\0"
+ "glShaderSourceARB\0"
+ "\0"
+ /* _mesa_function_pool[44714]: Normal3fv (offset 57) */
+ "p\0"
+ "glNormal3fv\0"
+ "\0"
+ /* _mesa_function_pool[44729]: ImageTransformParameterfvHP (dynamic) */
+ "iip\0"
+ "glImageTransformParameterfvHP\0"
+ "\0"
+ /* _mesa_function_pool[44764]: NormalP3ui (will be remapped) */
+ "ii\0"
+ "glNormalP3ui\0"
+ "\0"
+ /* _mesa_function_pool[44781]: CreateSamplers (will be remapped) */
+ "ip\0"
+ "glCreateSamplers\0"
+ "\0"
+ /* _mesa_function_pool[44802]: MultiTexCoord3fvARB (offset 395) */
+ "ip\0"
+ "glMultiTexCoord3fv\0"
+ "glMultiTexCoord3fvARB\0"
+ "\0"
+ /* _mesa_function_pool[44847]: GetProgramParameterfvNV (will be remapped) */
+ "iiip\0"
+ "glGetProgramParameterfvNV\0"
+ "\0"
+ /* _mesa_function_pool[44879]: BufferData (will be remapped) */
+ "iipi\0"
+ "glBufferData\0"
+ "glBufferDataARB\0"
+ "\0"
+ /* _mesa_function_pool[44914]: TexSubImage2D (offset 333) */
+ "iiiiiiiip\0"
+ "glTexSubImage2D\0"
+ "glTexSubImage2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[44960]: FragmentLightivSGIX (dynamic) */
+ "iip\0"
+ "glFragmentLightivSGIX\0"
+ "\0"
+ /* _mesa_function_pool[44987]: GetTexParameterPointervAPPLE (dynamic) */
+ "iip\0"
+ "glGetTexParameterPointervAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[45023]: TexGenfv (offset 191) */
+ "iip\0"
+ "glTexGenfv\0"
+ "glTexGenfvOES\0"
+ "\0"
+ /* _mesa_function_pool[45053]: GetVertexAttribiv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribiv\0"
+ "glGetVertexAttribivARB\0"
+ "\0"
+ /* _mesa_function_pool[45101]: TexCoordP2uiv (will be remapped) */
+ "ip\0"
+ "glTexCoordP2uiv\0"
+ "\0"
+ /* _mesa_function_pool[45121]: ReplacementCodeuiColor3fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glReplacementCodeuiColor3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[45165]: Uniform3fv (will be remapped) */
+ "iip\0"
+ "glUniform3fv\0"
+ "glUniform3fvARB\0"
+ "\0"
+ /* _mesa_function_pool[45199]: BlendEquation (offset 337) */
+ "i\0"
+ "glBlendEquation\0"
+ "glBlendEquationEXT\0"
+ "glBlendEquationOES\0"
+ "\0"
+ /* _mesa_function_pool[45256]: VertexAttrib3dNV (will be remapped) */
+ "iddd\0"
+ "glVertexAttrib3dNV\0"
+ "\0"
+ /* _mesa_function_pool[45281]: ReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN (dynamic) */
+ "ppppp\0"
+ "glReplacementCodeuiTexCoord2fColor4fNormal3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[45345]: IndexFuncEXT (dynamic) */
+ "if\0"
+ "glIndexFuncEXT\0"
+ "\0"
+ /* _mesa_function_pool[45364]: UseShaderProgramEXT (will be remapped) */
+ "ii\0"
+ "glUseShaderProgramEXT\0"
+ "\0"
+ /* _mesa_function_pool[45390]: PushName (offset 201) */
+ "i\0"
+ "glPushName\0"
+ "\0"
+ /* _mesa_function_pool[45404]: GenFencesNV (dynamic) */
+ "ip\0"
+ "glGenFencesNV\0"
+ "\0"
+ /* _mesa_function_pool[45422]: CullParameterfvEXT (dynamic) */
+ "ip\0"
+ "glCullParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[45447]: DeleteRenderbuffers (will be remapped) */
+ "ip\0"
+ "glDeleteRenderbuffers\0"
+ "glDeleteRenderbuffersEXT\0"
+ "glDeleteRenderbuffersOES\0"
+ "\0"
+ /* _mesa_function_pool[45523]: VertexAttrib1dv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1dv\0"
+ "glVertexAttrib1dvARB\0"
+ "\0"
+ /* _mesa_function_pool[45566]: ImageTransformParameteriHP (dynamic) */
+ "iii\0"
+ "glImageTransformParameteriHP\0"
+ "\0"
+ /* _mesa_function_pool[45600]: IsShader (will be remapped) */
+ "i\0"
+ "glIsShader\0"
+ "\0"
+ /* _mesa_function_pool[45614]: Rotated (offset 299) */
+ "dddd\0"
+ "glRotated\0"
+ "\0"
+ /* _mesa_function_pool[45630]: Color4iv (offset 32) */
+ "p\0"
+ "glColor4iv\0"
+ "\0"
+ /* _mesa_function_pool[45644]: PointParameterxv (will be remapped) */
+ "ip\0"
+ "glPointParameterxvOES\0"
+ "glPointParameterxv\0"
+ "\0"
+ /* _mesa_function_pool[45689]: Rotatex (will be remapped) */
+ "iiii\0"
+ "glRotatexOES\0"
+ "glRotatex\0"
+ "\0"
+ /* _mesa_function_pool[45718]: FramebufferTextureLayer (will be remapped) */
+ "iiiii\0"
+ "glFramebufferTextureLayer\0"
+ "glFramebufferTextureLayerEXT\0"
+ "\0"
+ /* _mesa_function_pool[45780]: TexEnvfv (offset 185) */
+ "iip\0"
+ "glTexEnvfv\0"
+ "\0"
+ /* _mesa_function_pool[45796]: ProgramUniformMatrix3fv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3fv\0"
+ "glProgramUniformMatrix3fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[45858]: DeleteMemoryObjectsEXT (will be remapped) */
+ "ip\0"
+ "glDeleteMemoryObjectsEXT\0"
+ "\0"
+ /* _mesa_function_pool[45887]: LoadMatrixf (offset 291) */
+ "p\0"
+ "glLoadMatrixf\0"
+ "\0"
+ /* _mesa_function_pool[45904]: GetProgramLocalParameterfvARB (will be remapped) */
+ "iip\0"
+ "glGetProgramLocalParameterfvARB\0"
+ "\0"
+ /* _mesa_function_pool[45941]: MakeTextureHandleResidentARB (will be remapped) */
+ "i\0"
+ "glMakeTextureHandleResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[45975]: MultiDrawArraysIndirect (will be remapped) */
+ "ipii\0"
+ "glMultiDrawArraysIndirect\0"
+ "\0"
+ /* _mesa_function_pool[46007]: DrawRangeElementsBaseVertex (will be remapped) */
+ "iiiiipi\0"
+ "glDrawRangeElementsBaseVertex\0"
+ "glDrawRangeElementsBaseVertexEXT\0"
+ "glDrawRangeElementsBaseVertexOES\0"
+ "\0"
+ /* _mesa_function_pool[46112]: ProgramUniformMatrix4dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4dv\0"
+ "\0"
+ /* _mesa_function_pool[46145]: MatrixIndexuivARB (dynamic) */
+ "ip\0"
+ "glMatrixIndexuivARB\0"
+ "\0"
+ /* _mesa_function_pool[46169]: Tangent3sEXT (dynamic) */
+ "iii\0"
+ "glTangent3sEXT\0"
+ "\0"
+ /* _mesa_function_pool[46189]: SecondaryColor3bv (will be remapped) */
+ "p\0"
+ "glSecondaryColor3bv\0"
+ "glSecondaryColor3bvEXT\0"
+ "\0"
+ /* _mesa_function_pool[46235]: GlobalAlphaFactorusSUN (dynamic) */
+ "i\0"
+ "glGlobalAlphaFactorusSUN\0"
+ "\0"
+ /* _mesa_function_pool[46263]: GetCombinerOutputParameterivNV (dynamic) */
+ "iiip\0"
+ "glGetCombinerOutputParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[46302]: DrawTexxvOES (will be remapped) */
+ "p\0"
+ "glDrawTexxvOES\0"
+ "\0"
+ /* _mesa_function_pool[46320]: TexParameterfv (offset 179) */
+ "iip\0"
+ "glTexParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[46342]: Color4ubv (offset 36) */
+ "p\0"
+ "glColor4ubv\0"
+ "\0"
+ /* _mesa_function_pool[46357]: TexCoord2fv (offset 105) */
+ "p\0"
+ "glTexCoord2fv\0"
+ "\0"
+ /* _mesa_function_pool[46374]: FogCoorddv (will be remapped) */
+ "p\0"
+ "glFogCoorddv\0"
+ "glFogCoorddvEXT\0"
+ "\0"
+ /* _mesa_function_pool[46406]: VDPAUUnregisterSurfaceNV (will be remapped) */
+ "i\0"
+ "glVDPAUUnregisterSurfaceNV\0"
+ "\0"
+ /* _mesa_function_pool[46436]: ColorP3ui (will be remapped) */
+ "ii\0"
+ "glColorP3ui\0"
+ "\0"
+ /* _mesa_function_pool[46452]: ClearBufferuiv (will be remapped) */
+ "iip\0"
+ "glClearBufferuiv\0"
+ "\0"
+ /* _mesa_function_pool[46474]: GetUnsignedBytei_vEXT (will be remapped) */
+ "iip\0"
+ "glGetUnsignedBytei_vEXT\0"
+ "\0"
+ /* _mesa_function_pool[46503]: GetShaderPrecisionFormat (will be remapped) */
+ "iipp\0"
+ "glGetShaderPrecisionFormat\0"
+ "\0"
+ /* _mesa_function_pool[46536]: ProgramNamedParameter4dvNV (will be remapped) */
+ "iipp\0"
+ "glProgramNamedParameter4dvNV\0"
+ "\0"
+ /* _mesa_function_pool[46571]: Flush (offset 217) */
+ "\0"
+ "glFlush\0"
+ "\0"
+ /* _mesa_function_pool[46581]: MakeTextureHandleNonResidentARB (will be remapped) */
+ "i\0"
+ "glMakeTextureHandleNonResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[46618]: VertexAttribI4iEXT (will be remapped) */
+ "iiiii\0"
+ "glVertexAttribI4iEXT\0"
+ "glVertexAttribI4i\0"
+ "\0"
+ /* _mesa_function_pool[46664]: VertexAttribI3uivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI3uivEXT\0"
+ "glVertexAttribI3uiv\0"
+ "\0"
+ /* _mesa_function_pool[46711]: FogCoordd (will be remapped) */
+ "d\0"
+ "glFogCoordd\0"
+ "glFogCoorddEXT\0"
+ "\0"
+ /* _mesa_function_pool[46741]: BindFramebufferEXT (will be remapped) */
+ "ii\0"
+ "glBindFramebufferEXT\0"
+ "\0"
+ /* _mesa_function_pool[46766]: Uniform3iv (will be remapped) */
+ "iip\0"
+ "glUniform3iv\0"
+ "glUniform3ivARB\0"
+ "\0"
+ /* _mesa_function_pool[46800]: TexStorage2DMultisample (will be remapped) */
+ "iiiiii\0"
+ "glTexStorage2DMultisample\0"
+ "\0"
+ /* _mesa_function_pool[46834]: UnlockArraysEXT (will be remapped) */
+ "\0"
+ "glUnlockArraysEXT\0"
+ "\0"
+ /* _mesa_function_pool[46854]: GetVertexAttribLui64vARB (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribLui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[46886]: VertexAttrib4iv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4iv\0"
+ "glVertexAttrib4ivARB\0"
+ "\0"
+ /* _mesa_function_pool[46929]: CopyTexSubImage3D (offset 373) */
+ "iiiiiiiii\0"
+ "glCopyTexSubImage3D\0"
+ "glCopyTexSubImage3DEXT\0"
+ "glCopyTexSubImage3DOES\0"
+ "\0"
+ /* _mesa_function_pool[47006]: PolygonOffsetClampEXT (will be remapped) */
+ "fff\0"
+ "glPolygonOffsetClampEXT\0"
+ "glPolygonOffsetClamp\0"
+ "\0"
+ /* _mesa_function_pool[47056]: GetInteger64v (will be remapped) */
+ "ip\0"
+ "glGetInteger64v\0"
+ "\0"
+ /* _mesa_function_pool[47076]: DetachObjectARB (will be remapped) */
+ "ii\0"
+ "glDetachObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[47098]: Indexiv (offset 49) */
+ "p\0"
+ "glIndexiv\0"
+ "\0"
+ /* _mesa_function_pool[47111]: TexEnvi (offset 186) */
+ "iii\0"
+ "glTexEnvi\0"
+ "\0"
+ /* _mesa_function_pool[47126]: TexEnvf (offset 184) */
+ "iif\0"
+ "glTexEnvf\0"
+ "\0"
+ /* _mesa_function_pool[47141]: TexEnvx (will be remapped) */
+ "iii\0"
+ "glTexEnvxOES\0"
+ "glTexEnvx\0"
+ "\0"
+ /* _mesa_function_pool[47169]: LoadIdentityDeformationMapSGIX (dynamic) */
+ "i\0"
+ "glLoadIdentityDeformationMapSGIX\0"
+ "\0"
+ /* _mesa_function_pool[47205]: StopInstrumentsSGIX (dynamic) */
+ "i\0"
+ "glStopInstrumentsSGIX\0"
+ "\0"
+ /* _mesa_function_pool[47230]: TexCoord4fColor4fNormal3fVertex4fSUN (dynamic) */
+ "fffffffffffffff\0"
+ "glTexCoord4fColor4fNormal3fVertex4fSUN\0"
+ "\0"
+ /* _mesa_function_pool[47286]: InvalidateBufferSubData (will be remapped) */
+ "iii\0"
+ "glInvalidateBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[47317]: UniformMatrix4x2fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix4x2fv\0"
+ "\0"
+ /* _mesa_function_pool[47344]: ClearTexImage (will be remapped) */
+ "iiiip\0"
+ "glClearTexImage\0"
+ "\0"
+ /* _mesa_function_pool[47367]: PolygonOffset (offset 319) */
+ "ff\0"
+ "glPolygonOffset\0"
+ "\0"
+ /* _mesa_function_pool[47387]: NormalPointervINTEL (dynamic) */
+ "ip\0"
+ "glNormalPointervINTEL\0"
+ "\0"
+ /* _mesa_function_pool[47413]: SamplerParameterfv (will be remapped) */
+ "iip\0"
+ "glSamplerParameterfv\0"
+ "\0"
+ /* _mesa_function_pool[47439]: CompressedTextureSubImage1D (will be remapped) */
+ "iiiiiip\0"
+ "glCompressedTextureSubImage1D\0"
+ "\0"
+ /* _mesa_function_pool[47478]: ProgramUniformMatrix4x2dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix4x2dv\0"
+ "\0"
+ /* _mesa_function_pool[47513]: ProgramEnvParameter4fARB (will be remapped) */
+ "iiffff\0"
+ "glProgramEnvParameter4fARB\0"
+ "glProgramParameter4fNV\0"
+ "\0"
+ /* _mesa_function_pool[47571]: ClearDepth (offset 208) */
+ "d\0"
+ "glClearDepth\0"
+ "\0"
+ /* _mesa_function_pool[47587]: VertexAttrib3dvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3dvNV\0"
+ "\0"
+ /* _mesa_function_pool[47611]: Color4fv (offset 30) */
+ "p\0"
+ "glColor4fv\0"
+ "\0"
+ /* _mesa_function_pool[47625]: GetnMinmaxARB (will be remapped) */
+ "iiiiip\0"
+ "glGetnMinmaxARB\0"
+ "\0"
+ /* _mesa_function_pool[47649]: IsImageHandleResidentARB (will be remapped) */
+ "i\0"
+ "glIsImageHandleResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[47679]: ColorPointer (offset 308) */
+ "iiip\0"
+ "glColorPointer\0"
+ "\0"
+ /* _mesa_function_pool[47700]: ProgramUniform2ui64ARB (will be remapped) */
+ "iiii\0"
+ "glProgramUniform2ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[47731]: Lightiv (offset 162) */
+ "iip\0"
+ "glLightiv\0"
+ "\0"
+ /* _mesa_function_pool[47746]: GetTexParameterIuiv (will be remapped) */
+ "iip\0"
+ "glGetTexParameterIuivEXT\0"
+ "glGetTexParameterIuiv\0"
+ "glGetTexParameterIuivOES\0"
+ "\0"
+ /* _mesa_function_pool[47823]: TransformFeedbackVaryings (will be remapped) */
+ "iipi\0"
+ "glTransformFeedbackVaryings\0"
+ "glTransformFeedbackVaryingsEXT\0"
+ "\0"
+ /* _mesa_function_pool[47888]: VertexAttrib3sv (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3sv\0"
+ "glVertexAttrib3svARB\0"
+ "\0"
+ /* _mesa_function_pool[47931]: Uniform4i64ARB (will be remapped) */
+ "iiiii\0"
+ "glUniform4i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[47955]: IsVertexArray (will be remapped) */
+ "i\0"
+ "glIsVertexArray\0"
+ "glIsVertexArrayOES\0"
+ "\0"
+ /* _mesa_function_pool[47993]: ProgramUniform3ui64ARB (will be remapped) */
+ "iiiii\0"
+ "glProgramUniform3ui64ARB\0"
+ "\0"
+ /* _mesa_function_pool[48025]: PushClientAttrib (offset 335) */
+ "i\0"
+ "glPushClientAttrib\0"
+ "\0"
+ /* _mesa_function_pool[48047]: ProgramUniform4ui (will be remapped) */
+ "iiiiii\0"
+ "glProgramUniform4ui\0"
+ "glProgramUniform4uiEXT\0"
+ "\0"
+ /* _mesa_function_pool[48098]: Uniform1f (will be remapped) */
+ "if\0"
+ "glUniform1f\0"
+ "glUniform1fARB\0"
+ "\0"
+ /* _mesa_function_pool[48129]: Uniform1d (will be remapped) */
+ "id\0"
+ "glUniform1d\0"
+ "\0"
+ /* _mesa_function_pool[48145]: FragmentMaterialfSGIX (dynamic) */
+ "iif\0"
+ "glFragmentMaterialfSGIX\0"
+ "\0"
+ /* _mesa_function_pool[48174]: Uniform1i (will be remapped) */
+ "ii\0"
+ "glUniform1i\0"
+ "glUniform1iARB\0"
+ "\0"
+ /* _mesa_function_pool[48205]: GetPolygonStipple (offset 274) */
+ "p\0"
+ "glGetPolygonStipple\0"
+ "\0"
+ /* _mesa_function_pool[48228]: Tangent3dvEXT (dynamic) */
+ "p\0"
+ "glTangent3dvEXT\0"
+ "\0"
+ /* _mesa_function_pool[48247]: BlitNamedFramebuffer (will be remapped) */
+ "iiiiiiiiiiii\0"
+ "glBlitNamedFramebuffer\0"
+ "\0"
+ /* _mesa_function_pool[48284]: PixelTexGenSGIX (dynamic) */
+ "i\0"
+ "glPixelTexGenSGIX\0"
+ "\0"
+ /* _mesa_function_pool[48305]: ReplacementCodeusvSUN (dynamic) */
+ "p\0"
+ "glReplacementCodeusvSUN\0"
+ "\0"
+ /* _mesa_function_pool[48332]: UseProgram (will be remapped) */
+ "i\0"
+ "glUseProgram\0"
+ "glUseProgramObjectARB\0"
+ "\0"
+ /* _mesa_function_pool[48370]: StartInstrumentsSGIX (dynamic) */
+ "\0"
+ "glStartInstrumentsSGIX\0"
+ "\0"
+ /* _mesa_function_pool[48395]: FlushMappedBufferRangeAPPLE (will be remapped) */
+ "iii\0"
+ "glFlushMappedBufferRangeAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[48430]: GetFragDataLocation (will be remapped) */
+ "ip\0"
+ "glGetFragDataLocationEXT\0"
+ "glGetFragDataLocation\0"
+ "\0"
+ /* _mesa_function_pool[48481]: PixelMapuiv (offset 252) */
+ "iip\0"
+ "glPixelMapuiv\0"
+ "\0"
+ /* _mesa_function_pool[48500]: ClearNamedBufferSubData (will be remapped) */
+ "iiiiiip\0"
+ "glClearNamedBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[48535]: VertexWeightfvEXT (dynamic) */
+ "p\0"
+ "glVertexWeightfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[48558]: GetFenceivNV (dynamic) */
+ "iip\0"
+ "glGetFenceivNV\0"
+ "\0"
+ /* _mesa_function_pool[48578]: CurrentPaletteMatrixARB (dynamic) */
+ "i\0"
+ "glCurrentPaletteMatrixARB\0"
+ "glCurrentPaletteMatrixOES\0"
+ "\0"
+ /* _mesa_function_pool[48633]: GetNamedFramebufferAttachmentParameteriv (will be remapped) */
+ "iiip\0"
+ "glGetNamedFramebufferAttachmentParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[48682]: GenVertexArrays (will be remapped) */
+ "ip\0"
+ "glGenVertexArrays\0"
+ "glGenVertexArraysOES\0"
+ "\0"
+ /* _mesa_function_pool[48725]: TexStorageMem2DMultisampleEXT (will be remapped) */
+ "iiiiiiii\0"
+ "glTexStorageMem2DMultisampleEXT\0"
+ "\0"
+ /* _mesa_function_pool[48767]: TexCoord2fColor4ubVertex3fSUN (dynamic) */
+ "ffiiiifff\0"
+ "glTexCoord2fColor4ubVertex3fSUN\0"
+ "\0"
+ /* _mesa_function_pool[48810]: TagSampleBufferSGIX (dynamic) */
+ "\0"
+ "glTagSampleBufferSGIX\0"
+ "\0"
+ /* _mesa_function_pool[48834]: Color3s (offset 17) */
+ "iii\0"
+ "glColor3s\0"
+ "\0"
+ /* _mesa_function_pool[48849]: TextureStorage2DMultisample (will be remapped) */
+ "iiiiii\0"
+ "glTextureStorage2DMultisample\0"
+ "\0"
+ /* _mesa_function_pool[48887]: TexCoordPointer (offset 320) */
+ "iiip\0"
+ "glTexCoordPointer\0"
+ "\0"
+ /* _mesa_function_pool[48911]: Color3i (offset 15) */
+ "iii\0"
+ "glColor3i\0"
+ "\0"
+ /* _mesa_function_pool[48926]: EvalCoord2d (offset 232) */
+ "dd\0"
+ "glEvalCoord2d\0"
+ "\0"
+ /* _mesa_function_pool[48944]: EvalCoord2f (offset 234) */
+ "ff\0"
+ "glEvalCoord2f\0"
+ "\0"
+ /* _mesa_function_pool[48962]: Color3b (offset 9) */
+ "iii\0"
+ "glColor3b\0"
+ "\0"
+ /* _mesa_function_pool[48977]: ExecuteProgramNV (will be remapped) */
+ "iip\0"
+ "glExecuteProgramNV\0"
+ "\0"
+ /* _mesa_function_pool[49001]: Color3f (offset 13) */
+ "fff\0"
+ "glColor3f\0"
+ "\0"
+ /* _mesa_function_pool[49016]: Color3d (offset 11) */
+ "ddd\0"
+ "glColor3d\0"
+ "\0"
+ /* _mesa_function_pool[49031]: GetVertexAttribdv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribdv\0"
+ "glGetVertexAttribdvARB\0"
+ "\0"
+ /* _mesa_function_pool[49079]: GetBufferPointerv (will be remapped) */
+ "iip\0"
+ "glGetBufferPointerv\0"
+ "glGetBufferPointervARB\0"
+ "glGetBufferPointervOES\0"
+ "\0"
+ /* _mesa_function_pool[49150]: GenFramebuffers (will be remapped) */
+ "ip\0"
+ "glGenFramebuffers\0"
+ "glGenFramebuffersEXT\0"
+ "glGenFramebuffersOES\0"
+ "\0"
+ /* _mesa_function_pool[49214]: IsTextureHandleResidentARB (will be remapped) */
+ "i\0"
+ "glIsTextureHandleResidentARB\0"
+ "\0"
+ /* _mesa_function_pool[49246]: GenBuffers (will be remapped) */
+ "ip\0"
+ "glGenBuffers\0"
+ "glGenBuffersARB\0"
+ "\0"
+ /* _mesa_function_pool[49279]: ClearDepthx (will be remapped) */
+ "i\0"
+ "glClearDepthxOES\0"
+ "glClearDepthx\0"
+ "\0"
+ /* _mesa_function_pool[49313]: EnableVertexArrayAttrib (will be remapped) */
+ "ii\0"
+ "glEnableVertexArrayAttrib\0"
+ "\0"
+ /* _mesa_function_pool[49343]: BlendEquationSeparate (will be remapped) */
+ "ii\0"
+ "glBlendEquationSeparate\0"
+ "glBlendEquationSeparateEXT\0"
+ "glBlendEquationSeparateATI\0"
+ "glBlendEquationSeparateOES\0"
+ "\0"
+ /* _mesa_function_pool[49452]: PixelTransformParameteriEXT (dynamic) */
+ "iii\0"
+ "glPixelTransformParameteriEXT\0"
+ "\0"
+ /* _mesa_function_pool[49487]: MultiTexCoordP4ui (will be remapped) */
+ "iii\0"
+ "glMultiTexCoordP4ui\0"
+ "\0"
+ /* _mesa_function_pool[49512]: VertexAttribs1fvNV (will be remapped) */
+ "iip\0"
+ "glVertexAttribs1fvNV\0"
+ "\0"
+ /* _mesa_function_pool[49538]: VertexAttribIPointer (will be remapped) */
+ "iiiip\0"
+ "glVertexAttribIPointerEXT\0"
+ "glVertexAttribIPointer\0"
+ "\0"
+ /* _mesa_function_pool[49594]: ProgramUniform4fv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform4fv\0"
+ "glProgramUniform4fvEXT\0"
+ "\0"
+ /* _mesa_function_pool[49643]: FrameZoomSGIX (dynamic) */
+ "i\0"
+ "glFrameZoomSGIX\0"
+ "\0"
+ /* _mesa_function_pool[49662]: RasterPos4sv (offset 85) */
+ "p\0"
+ "glRasterPos4sv\0"
+ "\0"
+ /* _mesa_function_pool[49680]: CopyTextureSubImage3D (will be remapped) */
+ "iiiiiiiii\0"
+ "glCopyTextureSubImage3D\0"
+ "\0"
+ /* _mesa_function_pool[49715]: SelectBuffer (offset 195) */
+ "ip\0"
+ "glSelectBuffer\0"
+ "\0"
+ /* _mesa_function_pool[49734]: GetSynciv (will be remapped) */
+ "iiipp\0"
+ "glGetSynciv\0"
+ "\0"
+ /* _mesa_function_pool[49753]: TextureView (will be remapped) */
+ "iiiiiiii\0"
+ "glTextureView\0"
+ "\0"
+ /* _mesa_function_pool[49777]: TexEnviv (offset 187) */
+ "iip\0"
+ "glTexEnviv\0"
+ "\0"
+ /* _mesa_function_pool[49793]: TexSubImage3D (offset 372) */
+ "iiiiiiiiiip\0"
+ "glTexSubImage3D\0"
+ "glTexSubImage3DEXT\0"
+ "glTexSubImage3DOES\0"
+ "\0"
+ /* _mesa_function_pool[49860]: Bitmap (offset 8) */
+ "iiffffp\0"
+ "glBitmap\0"
+ "\0"
+ /* _mesa_function_pool[49878]: VertexAttribDivisor (will be remapped) */
+ "ii\0"
+ "glVertexAttribDivisorARB\0"
+ "glVertexAttribDivisor\0"
+ "\0"
+ /* _mesa_function_pool[49929]: DrawTransformFeedbackStream (will be remapped) */
+ "iii\0"
+ "glDrawTransformFeedbackStream\0"
+ "\0"
+ /* _mesa_function_pool[49964]: GetIntegerv (offset 263) */
+ "ip\0"
+ "glGetIntegerv\0"
+ "\0"
+ /* _mesa_function_pool[49982]: EndPerfQueryINTEL (will be remapped) */
+ "i\0"
+ "glEndPerfQueryINTEL\0"
+ "\0"
+ /* _mesa_function_pool[50005]: FragmentLightfvSGIX (dynamic) */
+ "iip\0"
+ "glFragmentLightfvSGIX\0"
+ "\0"
+ /* _mesa_function_pool[50032]: NamedBufferPageCommitmentARB (will be remapped) */
+ "iiii\0"
+ "glNamedBufferPageCommitmentARB\0"
+ "\0"
+ /* _mesa_function_pool[50069]: TexCoord2fColor3fVertex3fvSUN (dynamic) */
+ "ppp\0"
+ "glTexCoord2fColor3fVertex3fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[50106]: GetActiveUniform (will be remapped) */
+ "iiipppp\0"
+ "glGetActiveUniform\0"
+ "glGetActiveUniformARB\0"
+ "\0"
+ /* _mesa_function_pool[50156]: AlphaFuncx (will be remapped) */
+ "ii\0"
+ "glAlphaFuncxOES\0"
+ "glAlphaFuncx\0"
+ "\0"
+ /* _mesa_function_pool[50189]: VertexAttribI2ivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI2ivEXT\0"
+ "glVertexAttribI2iv\0"
+ "\0"
+ /* _mesa_function_pool[50234]: VertexBlendARB (dynamic) */
+ "i\0"
+ "glVertexBlendARB\0"
+ "\0"
+ /* _mesa_function_pool[50254]: Map1d (offset 220) */
+ "iddiip\0"
+ "glMap1d\0"
+ "\0"
+ /* _mesa_function_pool[50270]: Map1f (offset 221) */
+ "iffiip\0"
+ "glMap1f\0"
+ "\0"
+ /* _mesa_function_pool[50286]: AreTexturesResident (offset 322) */
+ "ipp\0"
+ "glAreTexturesResident\0"
+ "glAreTexturesResidentEXT\0"
+ "\0"
+ /* _mesa_function_pool[50338]: VertexArrayVertexBuffer (will be remapped) */
+ "iiiii\0"
+ "glVertexArrayVertexBuffer\0"
+ "\0"
+ /* _mesa_function_pool[50371]: PixelTransferf (offset 247) */
+ "if\0"
+ "glPixelTransferf\0"
+ "\0"
+ /* _mesa_function_pool[50392]: PixelTransferi (offset 248) */
+ "ii\0"
+ "glPixelTransferi\0"
+ "\0"
+ /* _mesa_function_pool[50413]: GetProgramResourceiv (will be remapped) */
+ "iiiipipp\0"
+ "glGetProgramResourceiv\0"
+ "\0"
+ /* _mesa_function_pool[50446]: VertexAttrib3fvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib3fvNV\0"
+ "\0"
+ /* _mesa_function_pool[50470]: GetFinalCombinerInputParameterivNV (dynamic) */
+ "iip\0"
+ "glGetFinalCombinerInputParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[50512]: SecondaryColorP3ui (will be remapped) */
+ "ii\0"
+ "glSecondaryColorP3ui\0"
+ "\0"
+ /* _mesa_function_pool[50537]: BindTextures (will be remapped) */
+ "iip\0"
+ "glBindTextures\0"
+ "\0"
+ /* _mesa_function_pool[50557]: GetMapParameterivNV (dynamic) */
+ "iip\0"
+ "glGetMapParameterivNV\0"
+ "\0"
+ /* _mesa_function_pool[50584]: VertexAttrib4fvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib4fvNV\0"
+ "\0"
+ /* _mesa_function_pool[50608]: Rectiv (offset 91) */
+ "pp\0"
+ "glRectiv\0"
+ "\0"
+ /* _mesa_function_pool[50621]: MultiTexCoord1iv (offset 381) */
+ "ip\0"
+ "glMultiTexCoord1iv\0"
+ "glMultiTexCoord1ivARB\0"
+ "\0"
+ /* _mesa_function_pool[50666]: PassTexCoordATI (will be remapped) */
+ "iii\0"
+ "glPassTexCoordATI\0"
+ "\0"
+ /* _mesa_function_pool[50689]: Tangent3dEXT (dynamic) */
+ "ddd\0"
+ "glTangent3dEXT\0"
+ "\0"
+ /* _mesa_function_pool[50709]: Vertex2fv (offset 129) */
+ "p\0"
+ "glVertex2fv\0"
+ "\0"
+ /* _mesa_function_pool[50724]: BindRenderbufferEXT (will be remapped) */
+ "ii\0"
+ "glBindRenderbufferEXT\0"
+ "\0"
+ /* _mesa_function_pool[50750]: Vertex3sv (offset 141) */
+ "p\0"
+ "glVertex3sv\0"
+ "\0"
+ /* _mesa_function_pool[50765]: EvalMesh1 (offset 236) */
+ "iii\0"
+ "glEvalMesh1\0"
+ "\0"
+ /* _mesa_function_pool[50782]: DiscardFramebufferEXT (will be remapped) */
+ "iip\0"
+ "glDiscardFramebufferEXT\0"
+ "\0"
+ /* _mesa_function_pool[50811]: Uniform2f (will be remapped) */
+ "iff\0"
+ "glUniform2f\0"
+ "glUniform2fARB\0"
+ "\0"
+ /* _mesa_function_pool[50843]: Uniform2d (will be remapped) */
+ "idd\0"
+ "glUniform2d\0"
+ "\0"
+ /* _mesa_function_pool[50860]: ColorPointerEXT (will be remapped) */
+ "iiiip\0"
+ "glColorPointerEXT\0"
+ "\0"
+ /* _mesa_function_pool[50885]: LineWidth (offset 168) */
+ "f\0"
+ "glLineWidth\0"
+ "\0"
+ /* _mesa_function_pool[50900]: Uniform2i (will be remapped) */
+ "iii\0"
+ "glUniform2i\0"
+ "glUniform2iARB\0"
+ "\0"
+ /* _mesa_function_pool[50932]: MultiDrawElementsBaseVertex (will be remapped) */
+ "ipipip\0"
+ "glMultiDrawElementsBaseVertex\0"
+ "glMultiDrawElementsBaseVertexEXT\0"
+ "\0"
+ /* _mesa_function_pool[51003]: Lightxv (will be remapped) */
+ "iip\0"
+ "glLightxvOES\0"
+ "glLightxv\0"
+ "\0"
+ /* _mesa_function_pool[51031]: DepthRangeIndexed (will be remapped) */
+ "idd\0"
+ "glDepthRangeIndexed\0"
+ "\0"
+ /* _mesa_function_pool[51056]: GetConvolutionParameterfv (offset 357) */
+ "iip\0"
+ "glGetConvolutionParameterfv\0"
+ "glGetConvolutionParameterfvEXT\0"
+ "\0"
+ /* _mesa_function_pool[51120]: GetTexBumpParameterfvATI (will be remapped) */
+ "ip\0"
+ "glGetTexBumpParameterfvATI\0"
+ "\0"
+ /* _mesa_function_pool[51151]: ProgramNamedParameter4dNV (will be remapped) */
+ "iipdddd\0"
+ "glProgramNamedParameter4dNV\0"
+ "\0"
+ /* _mesa_function_pool[51188]: GetMaterialfv (offset 269) */
+ "iip\0"
+ "glGetMaterialfv\0"
+ "\0"
+ /* _mesa_function_pool[51209]: TexImage3DMultisample (will be remapped) */
+ "iiiiiii\0"
+ "glTexImage3DMultisample\0"
+ "\0"
+ /* _mesa_function_pool[51242]: VertexAttrib1fvNV (will be remapped) */
+ "ip\0"
+ "glVertexAttrib1fvNV\0"
+ "\0"
+ /* _mesa_function_pool[51266]: GetUniformBlockIndex (will be remapped) */
+ "ip\0"
+ "glGetUniformBlockIndex\0"
+ "\0"
+ /* _mesa_function_pool[51293]: DetachShader (will be remapped) */
+ "ii\0"
+ "glDetachShader\0"
+ "\0"
+ /* _mesa_function_pool[51312]: CopyTexSubImage2D (offset 326) */
+ "iiiiiiii\0"
+ "glCopyTexSubImage2D\0"
+ "glCopyTexSubImage2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[51365]: GetNamedFramebufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetNamedFramebufferParameteriv\0"
+ "\0"
+ /* _mesa_function_pool[51403]: GetObjectParameterivARB (will be remapped) */
+ "iip\0"
+ "glGetObjectParameterivARB\0"
+ "\0"
+ /* _mesa_function_pool[51434]: Color3iv (offset 16) */
+ "p\0"
+ "glColor3iv\0"
+ "\0"
+ /* _mesa_function_pool[51448]: DrawElements (offset 311) */
+ "iiip\0"
+ "glDrawElements\0"
+ "\0"
+ /* _mesa_function_pool[51469]: ScissorArrayv (will be remapped) */
+ "iip\0"
+ "glScissorArrayv\0"
+ "glScissorArrayvOES\0"
+ "\0"
+ /* _mesa_function_pool[51509]: GetInternalformativ (will be remapped) */
+ "iiiip\0"
+ "glGetInternalformativ\0"
+ "\0"
+ /* _mesa_function_pool[51538]: EvalPoint2 (offset 239) */
+ "ii\0"
+ "glEvalPoint2\0"
+ "\0"
+ /* _mesa_function_pool[51555]: EvalPoint1 (offset 237) */
+ "i\0"
+ "glEvalPoint1\0"
+ "\0"
+ /* _mesa_function_pool[51571]: VertexAttribLPointer (will be remapped) */
+ "iiiip\0"
+ "glVertexAttribLPointer\0"
+ "\0"
+ /* _mesa_function_pool[51601]: PopMatrix (offset 297) */
+ "\0"
+ "glPopMatrix\0"
+ "\0"
+ /* _mesa_function_pool[51615]: FinishFenceNV (dynamic) */
+ "i\0"
+ "glFinishFenceNV\0"
+ "\0"
+ /* _mesa_function_pool[51634]: Tangent3bvEXT (dynamic) */
+ "p\0"
+ "glTangent3bvEXT\0"
+ "\0"
+ /* _mesa_function_pool[51653]: NamedBufferData (will be remapped) */
+ "iipi\0"
+ "glNamedBufferData\0"
+ "\0"
+ /* _mesa_function_pool[51677]: GetTexGeniv (offset 280) */
+ "iip\0"
+ "glGetTexGeniv\0"
+ "glGetTexGenivOES\0"
+ "\0"
+ /* _mesa_function_pool[51713]: GetFirstPerfQueryIdINTEL (will be remapped) */
+ "p\0"
+ "glGetFirstPerfQueryIdINTEL\0"
+ "\0"
+ /* _mesa_function_pool[51743]: ActiveProgramEXT (will be remapped) */
+ "i\0"
+ "glActiveProgramEXT\0"
+ "\0"
+ /* _mesa_function_pool[51765]: PixelTransformParameterivEXT (dynamic) */
+ "iip\0"
+ "glPixelTransformParameterivEXT\0"
+ "\0"
+ /* _mesa_function_pool[51801]: TexCoord4fVertex4fvSUN (dynamic) */
+ "pp\0"
+ "glTexCoord4fVertex4fvSUN\0"
+ "\0"
+ /* _mesa_function_pool[51830]: UnmapBuffer (will be remapped) */
+ "i\0"
+ "glUnmapBuffer\0"
+ "glUnmapBufferARB\0"
+ "glUnmapBufferOES\0"
+ "\0"
+ /* _mesa_function_pool[51881]: EvalCoord1d (offset 228) */
+ "d\0"
+ "glEvalCoord1d\0"
+ "\0"
+ /* _mesa_function_pool[51898]: VertexAttribL1d (will be remapped) */
+ "id\0"
+ "glVertexAttribL1d\0"
+ "\0"
+ /* _mesa_function_pool[51920]: EvalCoord1f (offset 230) */
+ "f\0"
+ "glEvalCoord1f\0"
+ "\0"
+ /* _mesa_function_pool[51937]: IndexMaterialEXT (dynamic) */
+ "ii\0"
+ "glIndexMaterialEXT\0"
+ "\0"
+ /* _mesa_function_pool[51960]: Materialf (offset 169) */
+ "iif\0"
+ "glMaterialf\0"
+ "\0"
+ /* _mesa_function_pool[51977]: Materiali (offset 171) */
+ "iii\0"
+ "glMateriali\0"
+ "\0"
+ /* _mesa_function_pool[51994]: ProgramUniform1uiv (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1uiv\0"
+ "glProgramUniform1uivEXT\0"
+ "\0"
+ /* _mesa_function_pool[52045]: EvalCoord1dv (offset 229) */
+ "p\0"
+ "glEvalCoord1dv\0"
+ "\0"
+ /* _mesa_function_pool[52063]: Materialx (will be remapped) */
+ "iii\0"
+ "glMaterialxOES\0"
+ "glMaterialx\0"
+ "\0"
+ /* _mesa_function_pool[52095]: GetQueryBufferObjectiv (will be remapped) */
+ "iiii\0"
+ "glGetQueryBufferObjectiv\0"
+ "\0"
+ /* _mesa_function_pool[52126]: GetTextureSamplerHandleARB (will be remapped) */
+ "ii\0"
+ "glGetTextureSamplerHandleARB\0"
+ "\0"
+ /* _mesa_function_pool[52159]: GetLightiv (offset 265) */
+ "iip\0"
+ "glGetLightiv\0"
+ "\0"
+ /* _mesa_function_pool[52177]: ProgramUniform3i64ARB (will be remapped) */
+ "iiiii\0"
+ "glProgramUniform3i64ARB\0"
+ "\0"
+ /* _mesa_function_pool[52208]: BindBuffer (will be remapped) */
+ "ii\0"
+ "glBindBuffer\0"
+ "glBindBufferARB\0"
+ "\0"
+ /* _mesa_function_pool[52241]: ProgramUniform1i (will be remapped) */
+ "iii\0"
+ "glProgramUniform1i\0"
+ "glProgramUniform1iEXT\0"
+ "\0"
+ /* _mesa_function_pool[52287]: ProgramUniform1f (will be remapped) */
+ "iif\0"
+ "glProgramUniform1f\0"
+ "glProgramUniform1fEXT\0"
+ "\0"
+ /* _mesa_function_pool[52333]: ProgramUniform1d (will be remapped) */
+ "iid\0"
+ "glProgramUniform1d\0"
+ "\0"
+ /* _mesa_function_pool[52357]: WindowPos3iv (will be remapped) */
+ "p\0"
+ "glWindowPos3iv\0"
+ "glWindowPos3ivARB\0"
+ "glWindowPos3ivMESA\0"
+ "\0"
+ /* _mesa_function_pool[52412]: CopyConvolutionFilter2D (offset 355) */
+ "iiiiii\0"
+ "glCopyConvolutionFilter2D\0"
+ "glCopyConvolutionFilter2DEXT\0"
+ "\0"
+ /* _mesa_function_pool[52475]: CopyBufferSubData (will be remapped) */
+ "iiiii\0"
+ "glCopyBufferSubData\0"
+ "\0"
+ /* _mesa_function_pool[52502]: WeightfvARB (dynamic) */
+ "ip\0"
+ "glWeightfvARB\0"
+ "\0"
+ /* _mesa_function_pool[52520]: UniformMatrix3x4fv (will be remapped) */
+ "iiip\0"
+ "glUniformMatrix3x4fv\0"
+ "\0"
+ /* _mesa_function_pool[52547]: Recti (offset 90) */
+ "iiii\0"
+ "glRecti\0"
+ "\0"
+ /* _mesa_function_pool[52561]: VertexAttribI3ivEXT (will be remapped) */
+ "ip\0"
+ "glVertexAttribI3ivEXT\0"
+ "glVertexAttribI3iv\0"
+ "\0"
+ /* _mesa_function_pool[52606]: DeleteSamplers (will be remapped) */
+ "ip\0"
+ "glDeleteSamplers\0"
+ "\0"
+ /* _mesa_function_pool[52627]: SamplerParameteri (will be remapped) */
+ "iii\0"
+ "glSamplerParameteri\0"
+ "\0"
+ /* _mesa_function_pool[52652]: WindowRectanglesEXT (will be remapped) */
+ "iip\0"
+ "glWindowRectanglesEXT\0"
+ "\0"
+ /* _mesa_function_pool[52679]: Rectf (offset 88) */
+ "ffff\0"
+ "glRectf\0"
+ "\0"
+ /* _mesa_function_pool[52693]: Rectd (offset 86) */
+ "dddd\0"
+ "glRectd\0"
+ "\0"
+ /* _mesa_function_pool[52707]: MultMatrixx (will be remapped) */
+ "p\0"
+ "glMultMatrixxOES\0"
+ "glMultMatrixx\0"
+ "\0"
+ /* _mesa_function_pool[52741]: TexStorageMem3DMultisampleEXT (will be remapped) */
+ "iiiiiiiii\0"
+ "glTexStorageMem3DMultisampleEXT\0"
+ "\0"
+ /* _mesa_function_pool[52784]: Rects (offset 92) */
+ "iiii\0"
+ "glRects\0"
+ "\0"
+ /* _mesa_function_pool[52798]: CombinerParameterfNV (dynamic) */
+ "if\0"
+ "glCombinerParameterfNV\0"
+ "\0"
+ /* _mesa_function_pool[52825]: GetVertexAttribIiv (will be remapped) */
+ "iip\0"
+ "glGetVertexAttribIivEXT\0"
+ "glGetVertexAttribIiv\0"
+ "\0"
+ /* _mesa_function_pool[52875]: ClientWaitSync (will be remapped) */
+ "iii\0"
+ "glClientWaitSync\0"
+ "\0"
+ /* _mesa_function_pool[52897]: TexCoord4s (offset 124) */
+ "iiii\0"
+ "glTexCoord4s\0"
+ "\0"
+ /* _mesa_function_pool[52916]: TexEnvxv (will be remapped) */
+ "iip\0"
+ "glTexEnvxvOES\0"
+ "glTexEnvxv\0"
+ "\0"
+ /* _mesa_function_pool[52946]: TexCoord4i (offset 122) */
+ "iiii\0"
+ "glTexCoord4i\0"
+ "\0"
+ /* _mesa_function_pool[52965]: ObjectPurgeableAPPLE (will be remapped) */
+ "iii\0"
+ "glObjectPurgeableAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[52993]: ProgramUniform1ui64vARB (will be remapped) */
+ "iiip\0"
+ "glProgramUniform1ui64vARB\0"
+ "\0"
+ /* _mesa_function_pool[53025]: TexCoord4d (offset 118) */
+ "dddd\0"
+ "glTexCoord4d\0"
+ "\0"
+ /* _mesa_function_pool[53044]: TexCoord4f (offset 120) */
+ "ffff\0"
+ "glTexCoord4f\0"
+ "\0"
+ /* _mesa_function_pool[53063]: GetBooleanv (offset 258) */
+ "ip\0"
+ "glGetBooleanv\0"
+ "\0"
+ /* _mesa_function_pool[53081]: IsAsyncMarkerSGIX (dynamic) */
+ "i\0"
+ "glIsAsyncMarkerSGIX\0"
+ "\0"
+ /* _mesa_function_pool[53104]: ProgramUniformMatrix3dv (will be remapped) */
+ "iiiip\0"
+ "glProgramUniformMatrix3dv\0"
+ "\0"
+ /* _mesa_function_pool[53137]: IsVertexArrayAPPLE (dynamic) */
+ "i\0"
+ "glIsVertexArrayAPPLE\0"
+ "\0"
+ /* _mesa_function_pool[53161]: LockArraysEXT (will be remapped) */
+ "ii\0"
+ "glLockArraysEXT\0"
+ "\0"
+ /* _mesa_function_pool[53181]: GetActiveUniformBlockiv (will be remapped) */
+ "iiip\0"
+ "glGetActiveUniformBlockiv\0"
+ "\0"
+ /* _mesa_function_pool[53213]: GetPerfMonitorCountersAMD (will be remapped) */
+ "ippip\0"
+ "glGetPerfMonitorCountersAMD\0"
+ "\0"
+ /* _mesa_function_pool[53248]: ObjectPtrLabel (will be remapped) */
+ "pip\0"
+ "glObjectPtrLabel\0"
+ "glObjectPtrLabelKHR\0"
+ "\0"
+ /* _mesa_function_pool[53290]: Rectfv (offset 89) */
+ "pp\0"
+ "glRectfv\0"
+ "\0"
+ /* _mesa_function_pool[53303]: BindImageTexture (will be remapped) */
+ "iiiiiii\0"
+ "glBindImageTexture\0"
+ "\0"
+ /* _mesa_function_pool[53331]: VertexP4uiv (will be remapped) */
+ "ip\0"
+ "glVertexP4uiv\0"
+ "\0"
+ /* _mesa_function_pool[53349]: GetUniformSubroutineuiv (will be remapped) */
+ "iip\0"
+ "glGetUniformSubroutineuiv\0"
+ "\0"
+ /* _mesa_function_pool[53380]: MinSampleShading (will be remapped) */
+ "f\0"
+ "glMinSampleShadingARB\0"
+ "glMinSampleShading\0"
+ "glMinSampleShadingOES\0"
+ "\0"
+ /* _mesa_function_pool[53446]: GetRenderbufferParameteriv (will be remapped) */
+ "iip\0"
+ "glGetRenderbufferParameteriv\0"
+ "glGetRenderbufferParameterivEXT\0"
+ "glGetRenderbufferParameterivOES\0"
+ "\0"
+ /* _mesa_function_pool[53544]: EdgeFlagPointerListIBM (dynamic) */
+ "ipi\0"
+ "glEdgeFlagPointerListIBM\0"
+ "\0"
+ /* _mesa_function_pool[53574]: VertexAttrib1dNV (will be remapped) */
+ "id\0"
+ "glVertexAttrib1dNV\0"
+ "\0"
+ /* _mesa_function_pool[53597]: WindowPos2sv (will be remapped) */
+ "p\0"
+ "glWindowPos2sv\0"
+ "glWindowPos2svARB\0"
+ "glWindowPos2svMESA\0"
+ "\0"
+ /* _mesa_function_pool[53652]: VertexArrayRangeNV (dynamic) */
+ "ip\0"
+ "glVertexArrayRangeNV\0"
+ "\0"
+ /* _mesa_function_pool[53677]: GetPerfMonitorCounterStringAMD (will be remapped) */
+ "iiipp\0"
+ "glGetPerfMonitorCounterStringAMD\0"
+ "\0"
+ /* _mesa_function_pool[53717]: EndFragmentShaderATI (will be remapped) */
+ "\0"
+ "glEndFragmentShaderATI\0"
+ "\0"
+ /* _mesa_function_pool[53742]: Uniform4iv (will be remapped) */
+ "iip\0"
+ "glUniform4iv\0"
+ "glUniform4ivARB\0"
+ "\0"
+ /* _mesa_function_pool[53776]: CreateMemoryObjectsEXT (will be remapped) */
+ "ip\0"
+ "glCreateMemoryObjectsEXT\0"
+ "\0"
+ ;
+
+/* these functions need to be remapped */
+static const struct gl_function_pool_remap MESA_remap_table_functions[] = {
+ { 22294, CompressedTexImage1D_remap_index },
+ { 19215, CompressedTexImage2D_remap_index },
+ { 14168, CompressedTexImage3D_remap_index },
+ { 35026, CompressedTexSubImage1D_remap_index },
+ { 42247, CompressedTexSubImage2D_remap_index },
+ { 7488, CompressedTexSubImage3D_remap_index },
+ { 4964, GetCompressedTexImage_remap_index },
+ { 21356, LoadTransposeMatrixd_remap_index },
+ { 21304, LoadTransposeMatrixf_remap_index },
+ { 39168, MultTransposeMatrixd_remap_index },
+ { 15611, MultTransposeMatrixf_remap_index },
+ { 37815, SampleCoverage_remap_index },
+ { 4111, BlendFuncSeparate_remap_index },
+ { 25633, FogCoordPointer_remap_index },
+ { 46711, FogCoordd_remap_index },
+ { 46374, FogCoorddv_remap_index },
+ { 38042, MultiDrawArrays_remap_index },
+ { 35973, PointParameterf_remap_index },
+ { 5766, PointParameterfv_remap_index },
+ { 35931, PointParameteri_remap_index },
+ { 10349, PointParameteriv_remap_index },
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+ { 15471, VDPAURegisterVideoSurfaceNV_remap_index },
+ { 13798, VDPAUSurfaceAccessNV_remap_index },
+ { 5957, VDPAUUnmapSurfacesNV_remap_index },
+ { 46406, VDPAUUnregisterSurfaceNV_remap_index },
+ { 11413, BeginPerfQueryINTEL_remap_index },
+ { 41219, CreatePerfQueryINTEL_remap_index },
+ { 20325, DeletePerfQueryINTEL_remap_index },
+ { 49982, EndPerfQueryINTEL_remap_index },
+ { 51713, GetFirstPerfQueryIdINTEL_remap_index },
+ { 37272, GetNextPerfQueryIdINTEL_remap_index },
+ { 39271, GetPerfCounterInfoINTEL_remap_index },
+ { 850, GetPerfQueryDataINTEL_remap_index },
+ { 27532, GetPerfQueryIdByNameINTEL_remap_index },
+ { 24718, GetPerfQueryInfoINTEL_remap_index },
+ { 47006, PolygonOffsetClampEXT_remap_index },
+ { 52652, WindowRectanglesEXT_remap_index },
+ { 10180, BufferStorageMemEXT_remap_index },
+ { 53776, CreateMemoryObjectsEXT_remap_index },
+ { 45858, DeleteMemoryObjectsEXT_remap_index },
+ { 2156, DeleteSemaphoresEXT_remap_index },
+ { 14254, GenSemaphoresEXT_remap_index },
+ { 40453, GetMemoryObjectParameterivEXT_remap_index },
+ { 34607, GetSemaphoreParameterui64vEXT_remap_index },
+ { 46474, GetUnsignedBytei_vEXT_remap_index },
+ { 23906, GetUnsignedBytevEXT_remap_index },
+ { 42045, IsMemoryObjectEXT_remap_index },
+ { 21538, IsSemaphoreEXT_remap_index },
+ { 44458, MemoryObjectParameterivEXT_remap_index },
+ { 25867, NamedBufferStorageMemEXT_remap_index },
+ { 36684, SemaphoreParameterui64vEXT_remap_index },
+ { 26073, SignalSemaphoreEXT_remap_index },
+ { 7196, TexStorageMem1DEXT_remap_index },
+ { 6110, TexStorageMem2DEXT_remap_index },
+ { 48725, TexStorageMem2DMultisampleEXT_remap_index },
+ { 6536, TexStorageMem3DEXT_remap_index },
+ { 52741, TexStorageMem3DMultisampleEXT_remap_index },
+ { 25764, TextureStorageMem1DEXT_remap_index },
+ { 40957, TextureStorageMem2DEXT_remap_index },
+ { 22046, TextureStorageMem2DMultisampleEXT_remap_index },
+ { 10593, TextureStorageMem3DEXT_remap_index },
+ { 40030, TextureStorageMem3DMultisampleEXT_remap_index },
+ { 32437, WaitSemaphoreEXT_remap_index },
+ { 7135, ImportMemoryFdEXT_remap_index },
+ { 33556, ImportSemaphoreFdEXT_remap_index },
+ { 25196, StencilFuncSeparateATI_remap_index },
+ { 7161, ProgramEnvParameters4fvEXT_remap_index },
+ { 8269, ProgramLocalParameters4fvEXT_remap_index },
+ { 4871, EGLImageTargetRenderbufferStorageOES_remap_index },
+ { 4587, EGLImageTargetTexture2DOES_remap_index },
+ { 50156, AlphaFuncx_remap_index },
+ { 24012, ClearColorx_remap_index },
+ { 49279, ClearDepthx_remap_index },
+ { 44175, Color4x_remap_index },
+ { 29240, DepthRangex_remap_index },
+ { 2903, Fogx_remap_index },
+ { 18432, Fogxv_remap_index },
+ { 11105, Frustumf_remap_index },
+ { 11236, Frustumx_remap_index },
+ { 23932, LightModelx_remap_index },
+ { 39489, LightModelxv_remap_index },
+ { 35559, Lightx_remap_index },
+ { 51003, Lightxv_remap_index },
+ { 4485, LineWidthx_remap_index },
+ { 4223, LoadMatrixx_remap_index },
+ { 52063, Materialx_remap_index },
+ { 31281, Materialxv_remap_index },
+ { 52707, MultMatrixx_remap_index },
+ { 12631, MultiTexCoord4x_remap_index },
+ { 31082, Normal3x_remap_index },
+ { 19186, Orthof_remap_index },
+ { 19426, Orthox_remap_index },
+ { 33883, PointSizex_remap_index },
+ { 1375, PolygonOffsetx_remap_index },
+ { 45689, Rotatex_remap_index },
+ { 24675, SampleCoveragex_remap_index },
+ { 15686, Scalex_remap_index },
+ { 47141, TexEnvx_remap_index },
+ { 52916, TexEnvxv_remap_index },
+ { 2483, TexParameterx_remap_index },
+ { 38896, Translatex_remap_index },
+ { 40588, ClipPlanef_remap_index },
+ { 40490, ClipPlanex_remap_index },
+ { 811, GetClipPlanef_remap_index },
+ { 625, GetClipPlanex_remap_index },
+ { 24593, GetFixedv_remap_index },
+ { 1416, GetLightxv_remap_index },
+ { 28076, GetMaterialxv_remap_index },
+ { 26398, GetTexEnvxv_remap_index },
+ { 20774, GetTexParameterxv_remap_index },
+ { 35836, PointParameterx_remap_index },
+ { 45644, PointParameterxv_remap_index },
+ { 23594, TexParameterxv_remap_index },
+ { 7225, BlendBarrier_remap_index },
+ { 42517, PrimitiveBoundingBox_remap_index },
+ { -1, -1 }
+};
+
diff --git a/prebuilt-intermediates/nir/nir_builder_opcodes.h b/prebuilt-intermediates/nir/nir_builder_opcodes.h
new file mode 100644
index 0000000..5ae0df2
--- /dev/null
+++ b/prebuilt-intermediates/nir/nir_builder_opcodes.h
@@ -0,0 +1,1029 @@
+/* Copyright (C) 2015 Broadcom
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef _NIR_BUILDER_OPCODES_
+#define _NIR_BUILDER_OPCODES_
+
+
+
+static inline nir_ssa_def *
+nir_b2f(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_b2f, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_b2i(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_b2i, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_fequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_fequal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_fequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_fequal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_fequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_fequal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_iequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_iequal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_iequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_iequal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ball_iequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ball_iequal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_fnequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_fnequal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_fnequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_fnequal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_fnequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_fnequal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_inequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_inequal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_inequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_inequal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bany_inequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bany_inequal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_bcsel, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_bfi(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_bfi, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_bfm(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_bfm, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bit_count(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_bit_count, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_bitfield_insert(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
+{
+ return nir_build_alu(build, nir_op_bitfield_insert, src0, src1, src2, src3);
+}
+static inline nir_ssa_def *
+nir_bitfield_reverse(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_bitfield_reverse, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_extract_i16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_extract_i16, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_extract_i8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_extract_i8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_extract_u16(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_extract_u16, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_extract_u8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_extract_u8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2b(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2b, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2f16_rtne(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2f16_rtne, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2f16_rtz(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2f16_rtz, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2f16_undef(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2f16_undef, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2f32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2f32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2f64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2f64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2i16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2i16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2i32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2i32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2i64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2i64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2i8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2i8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2u16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2u16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2u32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2u32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2u64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2u64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_f2u8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_f2u8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fabs(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fabs, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fadd(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fadd, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fall_equal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fall_equal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fall_equal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fall_equal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fall_equal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fall_equal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fand(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fand, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fany_nequal2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fany_nequal2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fany_nequal3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fany_nequal3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fany_nequal4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fany_nequal4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fceil(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fceil, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fcos(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fcos, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fcsel(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_fcsel, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_fddx(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddx, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fddx_coarse(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddx_coarse, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fddx_fine(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddx_fine, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fddy(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddy, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fddy_coarse(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddy_coarse, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fddy_fine(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fddy_fine, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdiv, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot_replicated2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot_replicated2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot_replicated3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot_replicated3, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdot_replicated4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdot_replicated4, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdph(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdph, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fdph_replicated(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fdph_replicated, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_feq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_feq, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fexp2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fexp2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ffloor(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ffloor, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ffma(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_ffma, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_ffract(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ffract, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fge, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_find_lsb(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_find_lsb, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_flog2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_flog2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_flrp(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_flrp, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_flt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_flt, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fmax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fmax, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fmin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fmin, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fmod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fmod, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fmov(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fmov, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fmul(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fmul, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fne(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fne, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fneg(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fneg, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise1_1(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise1_1, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise1_2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise1_2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise1_3(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise1_3, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise1_4(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise1_4, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise2_1(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise2_1, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise2_2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise2_2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise2_3(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise2_3, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise2_4(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise2_4, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise3_1(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise3_1, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise3_2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise3_2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise3_3(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise3_3, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise3_4(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise3_4, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise4_1(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise4_1, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise4_2(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise4_2, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise4_3(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise4_3, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnoise4_4(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnoise4_4, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fnot(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fnot, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_for(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_for, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fpow(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fpow, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fquantize2f16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fquantize2f16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_frcp(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_frcp, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_frem(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_frem, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fround_even(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fround_even, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_frsq(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_frsq, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fsat(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fsat, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fsign(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fsign, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fsin(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fsin, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fsqrt(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_fsqrt, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fsub(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fsub, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ftrunc(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ftrunc, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_fxor(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_fxor, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2b(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2b, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2f16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2f16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2f32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2f32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2f64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2f64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2i16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2i16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2i32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2i32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2i64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2i64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_i2i8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_i2i8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_iabs(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_iabs, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_iadd(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_iadd, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_iand(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_iand, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ibfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_ibfe, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_ibitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_ibitfield_extract, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_idiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_idiv, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ieq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ieq, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ifind_msb(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ifind_msb, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ige(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ige, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ilt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ilt, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_imax, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_imin, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_imod, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imov(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_imov, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imul(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_imul, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_imul_high(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_imul_high, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ine(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ine, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ineg(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ineg, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_inot(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_inot, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ior(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ior, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_irem(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_irem, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ishl(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ishl, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ishr(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ishr, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_isign(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_isign, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_isub(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_isub, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ixor(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ixor, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ldexp(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ldexp, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_64_2x32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_64_2x32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_64_2x32_split(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_pack_64_2x32_split, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_half_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_half_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_half_2x16_split(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_pack_half_2x16_split, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_snorm_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_snorm_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_snorm_4x8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_snorm_4x8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_unorm_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_unorm_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_unorm_4x8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_unorm_4x8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_uvec2_to_uint(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_uvec2_to_uint, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_pack_uvec4_to_uint(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_pack_uvec4_to_uint, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_seq(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_seq, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_sge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_sge, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_slt(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_slt, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_sne(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_sne, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2f16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2f16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2f32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2f32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2f64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2f64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2u16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2u16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2u32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2u32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2u64(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2u64, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_u2u8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_u2u8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_uadd_carry(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_uadd_carry, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ubfe(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_ubfe, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_ubitfield_extract(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_ubitfield_extract, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_udiv(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_udiv, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ufind_msb(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_ufind_msb, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_uge(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_uge, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ult(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ult, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umax(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umax, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umax_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umax_4x8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umin(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umin, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umin_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umin_4x8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umod(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umod, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umul_high(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umul_high, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_umul_unorm_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_umul_unorm_4x8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_64_2x32(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_64_2x32, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_64_2x32_split_x(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_64_2x32_split_x, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_64_2x32_split_y(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_64_2x32_split_y, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_half_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_half_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_half_2x16_split_x(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_half_2x16_split_x, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_half_2x16_split_y(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_half_2x16_split_y, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_snorm_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_snorm_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_snorm_4x8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_snorm_4x8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_unorm_2x16(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_unorm_2x16, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_unpack_unorm_4x8(nir_builder *build, nir_ssa_def *src0)
+{
+ return nir_build_alu(build, nir_op_unpack_unorm_4x8, src0, NULL, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_usadd_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_usadd_4x8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ushr(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ushr, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_ussub_4x8(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_ussub_4x8, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_usub_borrow(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_usub_borrow, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_vec2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
+{
+ return nir_build_alu(build, nir_op_vec2, src0, src1, NULL, NULL);
+}
+static inline nir_ssa_def *
+nir_vec3(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2)
+{
+ return nir_build_alu(build, nir_op_vec3, src0, src1, src2, NULL);
+}
+static inline nir_ssa_def *
+nir_vec4(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
+{
+ return nir_build_alu(build, nir_op_vec4, src0, src1, src2, src3);
+}
+
+#endif /* _NIR_BUILDER_OPCODES_ */
diff --git a/prebuilt-intermediates/nir/nir_constant_expressions.c b/prebuilt-intermediates/nir/nir_constant_expressions.c
new file mode 100644
index 0000000..feac640
--- /dev/null
+++ b/prebuilt-intermediates/nir/nir_constant_expressions.c
@@ -0,0 +1,13745 @@
+/*
+ * Copyright (C) 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Jason Ekstrand (jason@jlekstrand.net)
+ */
+
+#include <math.h>
+#include "main/core.h"
+#include "util/rounding.h" /* for _mesa_roundeven */
+#include "util/half_float.h"
+#include "nir_constant_expressions.h"
+
+/**
+ * Evaluate one component of packSnorm4x8.
+ */
+static uint8_t
+pack_snorm_1x8(float x)
+{
+ /* From section 8.4 of the GLSL 4.30 spec:
+ *
+ * packSnorm4x8
+ * ------------
+ * The conversion for component c of v to fixed point is done as
+ * follows:
+ *
+ * packSnorm4x8: round(clamp(c, -1, +1) * 127.0)
+ *
+ * We must first cast the float to an int, because casting a negative
+ * float to a uint is undefined.
+ */
+ return (uint8_t) (int)
+ _mesa_roundevenf(CLAMP(x, -1.0f, +1.0f) * 127.0f);
+}
+
+/**
+ * Evaluate one component of packSnorm2x16.
+ */
+static uint16_t
+pack_snorm_1x16(float x)
+{
+ /* From section 8.4 of the GLSL ES 3.00 spec:
+ *
+ * packSnorm2x16
+ * -------------
+ * The conversion for component c of v to fixed point is done as
+ * follows:
+ *
+ * packSnorm2x16: round(clamp(c, -1, +1) * 32767.0)
+ *
+ * We must first cast the float to an int, because casting a negative
+ * float to a uint is undefined.
+ */
+ return (uint16_t) (int)
+ _mesa_roundevenf(CLAMP(x, -1.0f, +1.0f) * 32767.0f);
+}
+
+/**
+ * Evaluate one component of unpackSnorm4x8.
+ */
+static float
+unpack_snorm_1x8(uint8_t u)
+{
+ /* From section 8.4 of the GLSL 4.30 spec:
+ *
+ * unpackSnorm4x8
+ * --------------
+ * The conversion for unpacked fixed-point value f to floating point is
+ * done as follows:
+ *
+ * unpackSnorm4x8: clamp(f / 127.0, -1, +1)
+ */
+ return CLAMP((int8_t) u / 127.0f, -1.0f, +1.0f);
+}
+
+/**
+ * Evaluate one component of unpackSnorm2x16.
+ */
+static float
+unpack_snorm_1x16(uint16_t u)
+{
+ /* From section 8.4 of the GLSL ES 3.00 spec:
+ *
+ * unpackSnorm2x16
+ * ---------------
+ * The conversion for unpacked fixed-point value f to floating point is
+ * done as follows:
+ *
+ * unpackSnorm2x16: clamp(f / 32767.0, -1, +1)
+ */
+ return CLAMP((int16_t) u / 32767.0f, -1.0f, +1.0f);
+}
+
+/**
+ * Evaluate one component packUnorm4x8.
+ */
+static uint8_t
+pack_unorm_1x8(float x)
+{
+ /* From section 8.4 of the GLSL 4.30 spec:
+ *
+ * packUnorm4x8
+ * ------------
+ * The conversion for component c of v to fixed point is done as
+ * follows:
+ *
+ * packUnorm4x8: round(clamp(c, 0, +1) * 255.0)
+ */
+ return (uint8_t) (int)
+ _mesa_roundevenf(CLAMP(x, 0.0f, 1.0f) * 255.0f);
+}
+
+/**
+ * Evaluate one component packUnorm2x16.
+ */
+static uint16_t
+pack_unorm_1x16(float x)
+{
+ /* From section 8.4 of the GLSL ES 3.00 spec:
+ *
+ * packUnorm2x16
+ * -------------
+ * The conversion for component c of v to fixed point is done as
+ * follows:
+ *
+ * packUnorm2x16: round(clamp(c, 0, +1) * 65535.0)
+ */
+ return (uint16_t) (int)
+ _mesa_roundevenf(CLAMP(x, 0.0f, 1.0f) * 65535.0f);
+}
+
+/**
+ * Evaluate one component of unpackUnorm4x8.
+ */
+static float
+unpack_unorm_1x8(uint8_t u)
+{
+ /* From section 8.4 of the GLSL 4.30 spec:
+ *
+ * unpackUnorm4x8
+ * --------------
+ * The conversion for unpacked fixed-point value f to floating point is
+ * done as follows:
+ *
+ * unpackUnorm4x8: f / 255.0
+ */
+ return (float) u / 255.0f;
+}
+
+/**
+ * Evaluate one component of unpackUnorm2x16.
+ */
+static float
+unpack_unorm_1x16(uint16_t u)
+{
+ /* From section 8.4 of the GLSL ES 3.00 spec:
+ *
+ * unpackUnorm2x16
+ * ---------------
+ * The conversion for unpacked fixed-point value f to floating point is
+ * done as follows:
+ *
+ * unpackUnorm2x16: f / 65535.0
+ */
+ return (float) u / 65535.0f;
+}
+
+/**
+ * Evaluate one component of packHalf2x16.
+ */
+static uint16_t
+pack_half_1x16(float x)
+{
+ return _mesa_float_to_half(x);
+}
+
+/**
+ * Evaluate one component of unpackHalf2x16.
+ */
+static float
+unpack_half_1x16(uint16_t u)
+{
+ return _mesa_half_to_float(u);
+}
+
+/* Some typed vector structures to make things like src0.y work */
+typedef float float16_t;
+typedef float float32_t;
+typedef double float64_t;
+typedef bool bool32_t;
+struct float16_vec {
+ float16_t x;
+ float16_t y;
+ float16_t z;
+ float16_t w;
+};
+struct float32_vec {
+ float32_t x;
+ float32_t y;
+ float32_t z;
+ float32_t w;
+};
+struct float64_vec {
+ float64_t x;
+ float64_t y;
+ float64_t z;
+ float64_t w;
+};
+struct int8_vec {
+ int8_t x;
+ int8_t y;
+ int8_t z;
+ int8_t w;
+};
+struct int16_vec {
+ int16_t x;
+ int16_t y;
+ int16_t z;
+ int16_t w;
+};
+struct int32_vec {
+ int32_t x;
+ int32_t y;
+ int32_t z;
+ int32_t w;
+};
+struct int64_vec {
+ int64_t x;
+ int64_t y;
+ int64_t z;
+ int64_t w;
+};
+struct uint8_vec {
+ uint8_t x;
+ uint8_t y;
+ uint8_t z;
+ uint8_t w;
+};
+struct uint16_vec {
+ uint16_t x;
+ uint16_t y;
+ uint16_t z;
+ uint16_t w;
+};
+struct uint32_vec {
+ uint32_t x;
+ uint32_t y;
+ uint32_t z;
+ uint32_t w;
+};
+struct uint64_vec {
+ uint64_t x;
+ uint64_t y;
+ uint64_t z;
+ uint64_t w;
+};
+
+struct bool32_vec {
+ bool x;
+ bool y;
+ bool z;
+ bool w;
+};
+
+
+
+static nir_const_value
+evaluate_b2f(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ float16_t dst = src0 ? 1.0 : 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ float32_t dst = src0 ? 1.0 : 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ float64_t dst = src0 ? 1.0 : 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_b2i(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ int8_t dst = src0 ? 1 : 0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ int16_t dst = src0 ? 1 : 0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ int32_t dst = src0 ? 1 : 0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+
+ int64_t dst = src0 ? 1 : 0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_fequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ 0,
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ 0,
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_fequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_fequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ _mesa_half_to_float(_src[0].u16[3]),
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ _src[0].f64[3],
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_iequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ 0,
+ 0,
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ 0,
+ 0,
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ 0,
+ 0,
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ 0,
+ 0,
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_iequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ _src[0].i8[2],
+ 0,
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ _src[1].i8[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ _src[0].i16[2],
+ 0,
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ _src[1].i16[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ _src[0].i32[2],
+ 0,
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ _src[1].i32[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ _src[0].i64[2],
+ 0,
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ _src[1].i64[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ball_iequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ _src[0].i8[2],
+ _src[0].i8[3],
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ _src[1].i8[2],
+ _src[1].i8[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ _src[0].i16[2],
+ _src[0].i16[3],
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ _src[1].i16[2],
+ _src[1].i16[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ _src[0].i32[2],
+ _src[0].i32[3],
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ _src[1].i32[2],
+ _src[1].i32[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ _src[0].i64[2],
+ _src[0].i64[3],
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ _src[1].i64[2],
+ _src[1].i64[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_fnequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ 0,
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ 0,
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_fnequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_fnequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ _mesa_half_to_float(_src[0].u16[3]),
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ _src[0].f64[3],
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_inequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ 0,
+ 0,
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ 0,
+ 0,
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ 0,
+ 0,
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ 0,
+ 0,
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ 0,
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_inequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ _src[0].i8[2],
+ 0,
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ _src[1].i8[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ _src[0].i16[2],
+ 0,
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ _src[1].i16[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ _src[0].i32[2],
+ 0,
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ _src[1].i32[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ _src[0].i64[2],
+ 0,
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ _src[1].i64[2],
+ 0,
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bany_inequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct int8_vec src0 = {
+ _src[0].i8[0],
+ _src[0].i8[1],
+ _src[0].i8[2],
+ _src[0].i8[3],
+ };
+
+ const struct int8_vec src1 = {
+ _src[1].i8[0],
+ _src[1].i8[1],
+ _src[1].i8[2],
+ _src[1].i8[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct int16_vec src0 = {
+ _src[0].i16[0],
+ _src[0].i16[1],
+ _src[0].i16[2],
+ _src[0].i16[3],
+ };
+
+ const struct int16_vec src1 = {
+ _src[1].i16[0],
+ _src[1].i16[1],
+ _src[1].i16[2],
+ _src[1].i16[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct int32_vec src0 = {
+ _src[0].i32[0],
+ _src[0].i32[1],
+ _src[0].i32[2],
+ _src[0].i32[3],
+ };
+
+ const struct int32_vec src1 = {
+ _src[1].i32[0],
+ _src[1].i32[1],
+ _src[1].i32[2],
+ _src[1].i32[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct int64_vec src0 = {
+ _src[0].i64[0],
+ _src[0].i64[1],
+ _src[0].i64[2],
+ _src[0].i64[3],
+ };
+
+ const struct int64_vec src1 = {
+ _src[1].i64[0],
+ _src[1].i64[1],
+ _src[1].i64[2],
+ _src[1].i64[3],
+ };
+
+ struct bool32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w));
+
+ _dst_val.u32[0] = dst.x ? NIR_TRUE : NIR_FALSE;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bcsel(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+ const uint8_t src1 =
+ _src[1].u8[_i];
+ const uint8_t src2 =
+ _src[2].u8[_i];
+
+ uint8_t dst = src0 ? src1 : src2;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+ const uint16_t src1 =
+ _src[1].u16[_i];
+ const uint16_t src2 =
+ _src[2].u16[_i];
+
+ uint16_t dst = src0 ? src1 : src2;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+ const uint32_t src1 =
+ _src[1].u32[_i];
+ const uint32_t src2 =
+ _src[2].u32[_i];
+
+ uint32_t dst = src0 ? src1 : src2;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const bool src0 = _src[0].u32[_i] != 0;
+ const uint64_t src1 =
+ _src[1].u64[_i];
+ const uint64_t src2 =
+ _src[2].u64[_i];
+
+ uint64_t dst = src0 ? src1 : src2;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bfi(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+ const uint32_t src2 =
+ _src[2].u32[_i];
+
+ uint32_t dst;
+
+
+unsigned mask = src0, insert = src1, base = src2;
+if (mask == 0) {
+ dst = base;
+} else {
+ unsigned tmp = mask;
+ while (!(tmp & 1)) {
+ tmp >>= 1;
+ insert <<= 1;
+ }
+ dst = (base & ~mask) | (insert & mask);
+}
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bfm(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ uint32_t dst;
+
+
+int bits = src0, offset = src1;
+if (offset < 0 || bits < 0 || offset > 31 || bits > 31 || offset + bits > 32)
+ dst = 0; /* undefined */
+else
+ dst = ((1u << bits) - 1) << offset;
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bit_count(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint32_t dst;
+
+
+dst = 0;
+for (unsigned bit = 0; bit < 32; bit++) {
+ if ((src0 >> bit) & 1)
+ dst++;
+}
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bitfield_insert(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+ const int32_t src2 =
+ _src[2].i32[_i];
+ const int32_t src3 =
+ _src[3].i32[_i];
+
+ uint32_t dst;
+
+
+unsigned base = src0, insert = src1;
+int offset = src2, bits = src3;
+if (bits == 0) {
+ dst = base;
+} else if (offset < 0 || bits < 0 || bits + offset > 32) {
+ dst = 0;
+} else {
+ unsigned mask = ((1ull << bits) - 1) << offset;
+ dst = (base & ~mask) | ((insert << offset) & mask);
+}
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_bitfield_reverse(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint32_t dst;
+
+
+/* we're not winning any awards for speed here, but that's ok */
+dst = 0;
+for (unsigned bit = 0; bit < 32; bit++)
+ dst |= ((src0 >> bit) & 1) << (31 - bit);
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_extract_i16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = (int16_t)(src0 >> (src1 * 16));
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = (int16_t)(src0 >> (src1 * 16));
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = (int16_t)(src0 >> (src1 * 16));
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = (int16_t)(src0 >> (src1 * 16));
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_extract_i8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = (int8_t)(src0 >> (src1 * 8));
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = (int8_t)(src0 >> (src1 * 8));
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = (int8_t)(src0 >> (src1 * 8));
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = (int8_t)(src0 >> (src1 * 8));
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_extract_u16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = (uint16_t)(src0 >> (src1 * 16));
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = (uint16_t)(src0 >> (src1 * 16));
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = (uint16_t)(src0 >> (src1 * 16));
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = (uint16_t)(src0 >> (src1 * 16));
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_extract_u8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = (uint8_t)(src0 >> (src1 * 8));
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = (uint8_t)(src0 >> (src1 * 8));
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = (uint8_t)(src0 >> (src1 * 8));
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = (uint8_t)(src0 >> (src1 * 8));
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2b(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ bool32_t dst = src0 != 0.0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ bool32_t dst = src0 != 0.0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ bool32_t dst = src0 != 0.0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2f16_rtne(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2f16_rtz(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2f16_undef(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2f32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2f64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2i16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2i32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2i64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2i8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2u16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2u32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2u64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_f2u8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fabs(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = fabs(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = fabs(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = fabs(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fadd(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 + src1;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 + src1;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 + src1;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fall_equal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fall_equal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fall_equal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x == src1.x) && (src0.y == src1.y) && (src0.z == src1.z) && (src0.w == src1.w)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fand(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = ((src0 != 0.0f) && (src1 != 0.0f)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fany_nequal2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fany_nequal3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fany_nequal4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x != src1.x) || (src0.y != src1.y) || (src0.z != src1.z) || (src0.w != src1.w)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fceil(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? ceil(src0) : ceilf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? ceil(src0) : ceilf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? ceil(src0) : ceilf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fcos(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? cos(src0) : cosf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? cos(src0) : cosf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? cos(src0) : cosf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fcsel(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+ const float32_t src2 =
+ _src[2].f32[_i];
+
+ float32_t dst = (src0 != 0.0f) ? src1 : src2;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddx(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddx_coarse(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddx_fine(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddy(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddy_coarse(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fddy_fine(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float16_t dst = 0.0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float32_t dst = 0.0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+
+ float64_t dst = 0.0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 / src1;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 / src1;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 / src1;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ 0,
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ 0,
+ 0,
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ 0,
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ 0,
+ 0,
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ 0,
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ 0,
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ _mesa_half_to_float(_src[0].u16[3]),
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ _src[0].f64[3],
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot_replicated2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ 0,
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ 0,
+ 0,
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ 0,
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ 0,
+ 0,
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y));
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot_replicated3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ 0,
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ 0,
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z));
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdot_replicated4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ _mesa_half_to_float(_src[0].u16[3]),
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ _src[0].f64[3],
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = ((src0.x * src1.x) + (src0.y * src1.y) + (src0.z * src1.z) + (src0.w * src1.w));
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdph(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fdph_replicated(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ const struct float16_vec src0 = {
+ _mesa_half_to_float(_src[0].u16[0]),
+ _mesa_half_to_float(_src[0].u16[1]),
+ _mesa_half_to_float(_src[0].u16[2]),
+ 0,
+ };
+
+ const struct float16_vec src1 = {
+ _mesa_half_to_float(_src[1].u16[0]),
+ _mesa_half_to_float(_src[1].u16[1]),
+ _mesa_half_to_float(_src[1].u16[2]),
+ _mesa_half_to_float(_src[1].u16[3]),
+ };
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ _src[1].f32[1],
+ _src[1].f32[2],
+ _src[1].f32[3],
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct float64_vec src0 = {
+ _src[0].f64[0],
+ _src[0].f64[1],
+ _src[0].f64[2],
+ 0,
+ };
+
+ const struct float64_vec src1 = {
+ _src[1].f64[0],
+ _src[1].f64[1],
+ _src[1].f64[2],
+ _src[1].f64[3],
+ };
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = src0.x * src1.x + src0.y * src1.y + src0.z * src1.z + src1.w;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_feq(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fexp2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = exp2f(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = exp2f(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = exp2f(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ffloor(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? floor(src0) : floorf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? floor(src0) : floorf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? floor(src0) : floorf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ffma(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+ const float src2 =
+ _mesa_half_to_float(_src[2].u16[_i]);
+
+ float16_t dst = src0 * src1 + src2;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+ const float32_t src2 =
+ _src[2].f32[_i];
+
+ float32_t dst = src0 * src1 + src2;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+ const float64_t src2 =
+ _src[2].f64[_i];
+
+ float64_t dst = src0 * src1 + src2;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ffract(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = src0 - (bit_size == 64 ? floor(src0) : floorf(src0));
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = src0 - (bit_size == 64 ? floor(src0) : floorf(src0));
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = src0 - (bit_size == 64 ? floor(src0) : floorf(src0));
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fge(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_find_lsb(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst;
+
+
+dst = -1;
+for (unsigned bit = 0; bit < 32; bit++) {
+ if ((src0 >> bit) & 1) {
+ dst = bit;
+ break;
+ }
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_flog2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = log2f(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = log2f(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = log2f(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_flrp(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+ const float src2 =
+ _mesa_half_to_float(_src[2].u16[_i]);
+
+ float16_t dst = src0 * (1 - src2) + src1 * src2;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+ const float32_t src2 =
+ _src[2].f32[_i];
+
+ float32_t dst = src0 * (1 - src2) + src1 * src2;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+ const float64_t src2 =
+ _src[2].f64[_i];
+
+ float64_t dst = src0 * (1 - src2) + src1 * src2;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_flt(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fmax(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = fmaxf(src0, src1);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = fmaxf(src0, src1);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = fmaxf(src0, src1);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fmin(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = fminf(src0, src1);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = fminf(src0, src1);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = fminf(src0, src1);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fmod(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 - src1 * floorf(src0 / src1);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 - src1 * floorf(src0 / src1);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 - src1 * floorf(src0 / src1);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fmov(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fmul(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 * src1;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 * src1;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 * src1;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fne(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fneg(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = -src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = -src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = -src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise1_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise1_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise1_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise1_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise2_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise2_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise2_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise2_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise3_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise3_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise3_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise3_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise4_1(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise4_2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise4_3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnoise4_4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ struct float16_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.u16[0] = _mesa_float_to_half(dst.x);
+ _dst_val.u16[1] = _mesa_float_to_half(dst.y);
+ _dst_val.u16[2] = _mesa_float_to_half(dst.z);
+ _dst_val.u16[3] = _mesa_float_to_half(dst.w);
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ struct float64_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = 0.0f;
+
+ _dst_val.f64[0] = dst.x;
+ _dst_val.f64[1] = dst.y;
+ _dst_val.f64[2] = dst.z;
+ _dst_val.f64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fnot(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : ((src0 == 0.0f) ? 1.0f : 0.0f);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : ((src0 == 0.0f) ? 1.0f : 0.0f);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? ((src0 == 0.0) ? 1.0 : 0.0f) : ((src0 == 0.0f) ? 1.0f : 0.0f);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_for(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = ((src0 != 0.0f) || (src1 != 0.0f)) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fpow(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? powf(src0, src1) : pow(src0, src1);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = bit_size == 64 ? powf(src0, src1) : pow(src0, src1);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = bit_size == 64 ? powf(src0, src1) : pow(src0, src1);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fquantize2f16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = (fabs(src0) < ldexpf(1.0, -14)) ? copysignf(0.0f, src0) : _mesa_half_to_float(_mesa_float_to_half(src0));
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = (fabs(src0) < ldexpf(1.0, -14)) ? copysignf(0.0f, src0) : _mesa_half_to_float(_mesa_float_to_half(src0));
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = (fabs(src0) < ldexpf(1.0, -14)) ? copysignf(0.0f, src0) : _mesa_half_to_float(_mesa_float_to_half(src0));
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_frcp(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? 1.0 / src0 : 1.0f / src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? 1.0 / src0 : 1.0f / src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? 1.0 / src0 : 1.0f / src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_frem(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 - src1 * truncf(src0 / src1);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 - src1 * truncf(src0 / src1);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 - src1 * truncf(src0 / src1);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fround_even(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? _mesa_roundeven(src0) : _mesa_roundevenf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_frsq(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? 1.0 / sqrt(src0) : 1.0f / sqrtf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? 1.0 / sqrt(src0) : 1.0f / sqrtf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? 1.0 / sqrt(src0) : 1.0f / sqrtf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fsat(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? ((src0 > 1.0) ? 1.0 : ((src0 <= 0.0) ? 0.0 : src0)) : ((src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0));
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? ((src0 > 1.0) ? 1.0 : ((src0 <= 0.0) ? 0.0 : src0)) : ((src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0));
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? ((src0 > 1.0) ? 1.0 : ((src0 <= 0.0) ? 0.0 : src0)) : ((src0 > 1.0f) ? 1.0f : ((src0 <= 0.0f) ? 0.0f : src0));
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fsign(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? ((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : ((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f));
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? ((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : ((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f));
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? ((src0 == 0.0) ? 0.0 : ((src0 > 0.0) ? 1.0 : -1.0)) : ((src0 == 0.0f) ? 0.0f : ((src0 > 0.0f) ? 1.0f : -1.0f));
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fsin(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? sin(src0) : sinf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? sin(src0) : sinf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? sin(src0) : sinf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fsqrt(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? sqrt(src0) : sqrtf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? sqrt(src0) : sqrtf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? sqrt(src0) : sqrtf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fsub(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = src0 - src1;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = src0 - src1;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = src0 - src1;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ftrunc(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+
+ float16_t dst = bit_size == 64 ? trunc(src0) : truncf(src0);
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+
+ float32_t dst = bit_size == 64 ? trunc(src0) : truncf(src0);
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+
+ float64_t dst = bit_size == 64 ? trunc(src0) : truncf(src0);
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_fxor(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = (src0 != 0.0f && src1 == 0.0f) || (src0 == 0.0f && src1 != 0.0f) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2b(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ bool32_t dst = src0 != 0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ bool32_t dst = src0 != 0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ bool32_t dst = src0 != 0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ bool32_t dst = src0 != 0;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2f16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2f32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2f64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2i16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2i32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2i64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_i2i8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_iabs(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = (src0 < 0) ? -src0 : src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = (src0 < 0) ? -src0 : src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = (src0 < 0) ? -src0 : src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = (src0 < 0) ? -src0 : src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_iadd(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src0 + src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src0 + src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src0 + src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src0 + src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_iand(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src0 & src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src0 & src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 & src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src0 & src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ibfe(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+ const int32_t src2 =
+ _src[2].i32[_i];
+
+ int32_t dst;
+
+
+int base = src0;
+int offset = src1, bits = src2;
+if (bits == 0) {
+ dst = 0;
+} else if (bits < 0 || offset < 0) {
+ dst = 0; /* undefined */
+} else if (offset + bits < 32) {
+ dst = (base << (32 - bits - offset)) >> (32 - bits);
+} else {
+ dst = base >> offset;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ibitfield_extract(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+ const int32_t src2 =
+ _src[2].i32[_i];
+
+ int32_t dst;
+
+
+int base = src0;
+int offset = src1, bits = src2;
+if (bits == 0) {
+ dst = 0;
+} else if (offset < 0 || bits < 0 || offset + bits > 32) {
+ dst = 0;
+} else {
+ dst = (base << (32 - offset - bits)) >> offset; /* use sign-extending shift */
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_idiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ieq(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ bool32_t dst = src0 == src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ifind_msb(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst;
+
+
+dst = -1;
+for (int bit = 31; bit >= 0; bit--) {
+ /* If src0 < 0, we're looking for the first 0 bit.
+ * if src0 >= 0, we're looking for the first 1 bit.
+ */
+ if ((((src0 >> bit) & 1) && (src0 >= 0)) ||
+ (!((src0 >> bit) & 1) && (src0 < 0))) {
+ dst = bit;
+ break;
+ }
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ige(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ilt(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imax(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imin(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imod(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1);
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1);
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1);
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src1 == 0 ? 0 : ((src0 % src1 == 0 || (src0 >= 0) == (src1 >= 0)) ? src0 % src1 : src0 % src1 + src1);
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imov(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imul(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src0 * src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src0 * src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src0 * src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src0 * src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_imul_high(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = (int32_t)(((int64_t) src0 * (int64_t) src1) >> 32);
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ine(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ bool32_t dst = src0 != src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ineg(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = -src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = -src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = -src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = -src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_inot(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = ~src0;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = ~src0;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = ~src0;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = ~src0;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ior(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src0 | src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src0 | src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 | src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src0 | src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_irem(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ishl(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int8_t dst = src0 << src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int16_t dst = src0 << src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int32_t dst = src0 << src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int64_t dst = src0 << src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ishr(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int8_t dst = src0 >> src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int16_t dst = src0 >> src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int32_t dst = src0 >> src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ int64_t dst = src0 >> src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_isign(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+
+ int8_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1);
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+
+ int16_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1);
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+
+ int32_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1);
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+
+ int64_t dst = (src0 == 0) ? 0 : ((src0 > 0) ? 1 : -1);
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_isub(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int8_t src0 =
+ _src[0].i8[_i];
+ const int8_t src1 =
+ _src[1].i8[_i];
+
+ int8_t dst = src0 - src1;
+
+ _dst_val.i8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int16_t src0 =
+ _src[0].i16[_i];
+ const int16_t src1 =
+ _src[1].i16[_i];
+
+ int16_t dst = src0 - src1;
+
+ _dst_val.i16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst = src0 - src1;
+
+ _dst_val.i32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int64_t src0 =
+ _src[0].i64[_i];
+ const int64_t src1 =
+ _src[1].i64[_i];
+
+ int64_t dst = src0 - src1;
+
+ _dst_val.i64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ixor(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src0 ^ src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src0 ^ src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 ^ src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src0 ^ src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ldexp(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ float16_t dst;
+
+
+dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1);
+/* flush denormals to zero. */
+if (!isnormal(dst))
+ dst = copysignf(0.0f, src0);
+
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ float32_t dst;
+
+
+dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1);
+/* flush denormals to zero. */
+if (!isnormal(dst))
+ dst = copysignf(0.0f, src0);
+
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ float64_t dst;
+
+
+dst = (bit_size == 64) ? ldexp(src0, src1) : ldexpf(src0, src1);
+/* flush denormals to zero. */
+if (!isnormal(dst))
+ dst = copysignf(0.0f, src0);
+
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_64_2x32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ _src[0].u32[1],
+ 0,
+ 0,
+ };
+
+ struct uint64_vec dst;
+
+ dst.x = src0.x | ((uint64_t)src0.y << 32);
+
+ _dst_val.u64[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_64_2x32_split(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint64_t dst = src0 | ((uint64_t)src1 << 32);
+
+ _dst_val.u64[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_half_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (uint32_t) pack_half_1x16(src0.x);
+dst.x |= ((uint32_t) pack_half_1x16(src0.y)) << 16;
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_half_2x16_split(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct float32_vec src1 = {
+ _src[1].f32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = pack_half_1x16(src0.x) | (pack_half_1x16(src1.x) << 16);
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_snorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (uint32_t) pack_snorm_1x16(src0.x);
+dst.x |= ((uint32_t) pack_snorm_1x16(src0.y)) << 16;
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_snorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (uint32_t) pack_snorm_1x8(src0.x);
+dst.x |= ((uint32_t) pack_snorm_1x8(src0.y)) << 8;
+dst.x |= ((uint32_t) pack_snorm_1x8(src0.z)) << 16;
+dst.x |= ((uint32_t) pack_snorm_1x8(src0.w)) << 24;
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_unorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (uint32_t) pack_unorm_1x16(src0.x);
+dst.x |= ((uint32_t) pack_unorm_1x16(src0.y)) << 16;
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct float32_vec src0 = {
+ _src[0].f32[0],
+ _src[0].f32[1],
+ _src[0].f32[2],
+ _src[0].f32[3],
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (uint32_t) pack_unorm_1x8(src0.x);
+dst.x |= ((uint32_t) pack_unorm_1x8(src0.y)) << 8;
+dst.x |= ((uint32_t) pack_unorm_1x8(src0.z)) << 16;
+dst.x |= ((uint32_t) pack_unorm_1x8(src0.w)) << 24;
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_uvec2_to_uint(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ _src[0].u32[1],
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (src0.x & 0xffff) | (src0.y << 16);
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_pack_uvec4_to_uint(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ _src[0].u32[1],
+ _src[0].u32[2],
+ _src[0].u32[3],
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = (src0.x << 0) |
+ (src0.y << 8) |
+ (src0.z << 16) |
+ (src0.w << 24);
+
+
+ _dst_val.u32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_seq(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = (src0 == src1) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_sge(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float src0 =
+ _mesa_half_to_float(_src[0].u16[_i]);
+ const float src1 =
+ _mesa_half_to_float(_src[1].u16[_i]);
+
+ float16_t dst = (src0 >= src1) ? 1.0f : 0.0f;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = (src0 >= src1) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float64_t src0 =
+ _src[0].f64[_i];
+ const float64_t src1 =
+ _src[1].f64[_i];
+
+ float64_t dst = (src0 >= src1) ? 1.0f : 0.0f;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_slt(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = (src0 < src1) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_sne(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const float32_t src0 =
+ _src[0].f32[_i];
+ const float32_t src1 =
+ _src[1].f32[_i];
+
+ float32_t dst = (src0 != src1) ? 1.0f : 0.0f;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2f16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ float16_t dst = src0;
+
+ _dst_val.u16[_i] = _mesa_float_to_half(dst);
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2f32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ float32_t dst = src0;
+
+ _dst_val.f32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2f64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ float64_t dst = src0;
+
+ _dst_val.f64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2u16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint16_t dst = src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2u32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2u64(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint64_t dst = src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_u2u8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint8_t dst = src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_uadd_carry(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src0 + src1 < src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src0 + src1 < src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 + src1 < src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src0 + src1 < src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ubfe(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+ const int32_t src2 =
+ _src[2].i32[_i];
+
+ uint32_t dst;
+
+
+unsigned base = src0;
+int offset = src1, bits = src2;
+if (bits == 0) {
+ dst = 0;
+} else if (bits < 0 || offset < 0) {
+ dst = 0; /* undefined */
+} else if (offset + bits < 32) {
+ dst = (base << (32 - bits - offset)) >> (32 - bits);
+} else {
+ dst = base >> offset;
+}
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ubitfield_extract(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+ const int32_t src2 =
+ _src[2].i32[_i];
+
+ uint32_t dst;
+
+
+unsigned base = src0;
+int offset = src1, bits = src2;
+if (bits == 0) {
+ dst = 0;
+} else if (bits < 0 || offset < 0 || offset + bits > 32) {
+ dst = 0; /* undefined per the spec */
+} else {
+ dst = (base >> offset) & ((1ull << bits) - 1);
+}
+
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_udiv(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src1 == 0 ? 0 : (src0 / src1);
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ufind_msb(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+
+ int32_t dst;
+
+
+dst = -1;
+for (int bit = 31; bit >= 0; bit--) {
+ if ((src0 >> bit) & 1) {
+ dst = bit;
+ break;
+ }
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_uge(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ bool32_t dst = src0 >= src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ult(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ bool32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst ? NIR_TRUE : NIR_FALSE;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umax(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src1 > src0 ? src1 : src0;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umax_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst;
+
+
+dst = 0;
+for (int i = 0; i < 32; i += 8) {
+ dst |= MAX2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umin(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src1 > src0 ? src0 : src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umin_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst;
+
+
+dst = 0;
+for (int i = 0; i < 32; i += 8) {
+ dst |= MIN2((src0 >> i) & 0xff, (src1 >> i) & 0xff) << i;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umod(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src1 == 0 ? 0 : src0 % src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umul_high(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = (uint32_t)(((uint64_t) src0 * (uint64_t) src1) >> 32);
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_umul_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst;
+
+
+dst = 0;
+for (int i = 0; i < 32; i += 8) {
+ int src0_chan = (src0 >> i) & 0xff;
+ int src1_chan = (src1 >> i) & 0xff;
+ dst |= ((src0_chan * src1_chan) / 255) << i;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_64_2x32(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint64_vec src0 = {
+ _src[0].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+ dst.x = src0.x; dst.y = src0.x >> 32;
+
+ _dst_val.u32[0] = dst.x;
+ _dst_val.u32[1] = dst.y;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_64_2x32_split_x(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint32_t dst = src0;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_64_2x32_split_y(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+
+ uint32_t dst = src0 >> 32;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_half_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+
+dst.x = unpack_half_1x16((uint16_t)(src0.x & 0xffff));
+dst.y = unpack_half_1x16((uint16_t)(src0.x << 16));
+
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_half_2x16_split_x(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = unpack_half_1x16((uint16_t)(src0.x & 0xffff));
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_half_2x16_split_y(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+ dst.x = dst.y = dst.z = dst.w = unpack_half_1x16((uint16_t)(src0.x >> 16));
+
+ _dst_val.f32[0] = dst.x;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_snorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+
+dst.x = unpack_snorm_1x16((uint16_t)(src0.x & 0xffff));
+dst.y = unpack_snorm_1x16((uint16_t)(src0.x << 16));
+
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_snorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+
+dst.x = unpack_snorm_1x8((uint8_t)(src0.x & 0xff));
+dst.y = unpack_snorm_1x8((uint8_t)((src0.x >> 8) & 0xff));
+dst.z = unpack_snorm_1x8((uint8_t)((src0.x >> 16) & 0xff));
+dst.w = unpack_snorm_1x8((uint8_t)(src0.x >> 24));
+
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_unorm_2x16(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+
+dst.x = unpack_unorm_1x16((uint16_t)(src0.x & 0xffff));
+dst.y = unpack_unorm_1x16((uint16_t)(src0.x << 16));
+
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_unpack_unorm_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct float32_vec dst;
+
+
+dst.x = unpack_unorm_1x8((uint8_t)(src0.x & 0xff));
+dst.y = unpack_unorm_1x8((uint8_t)((src0.x >> 8) & 0xff));
+dst.z = unpack_unorm_1x8((uint8_t)((src0.x >> 16) & 0xff));
+dst.w = unpack_unorm_1x8((uint8_t)(src0.x >> 24));
+
+
+ _dst_val.f32[0] = dst.x;
+ _dst_val.f32[1] = dst.y;
+ _dst_val.f32[2] = dst.z;
+ _dst_val.f32[3] = dst.w;
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_usadd_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst;
+
+
+dst = 0;
+for (int i = 0; i < 32; i += 8) {
+ dst |= MIN2(((src0 >> i) & 0xff) + ((src1 >> i) & 0xff), 0xff) << i;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ushr(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint8_t dst = src0 >> src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint16_t dst = src0 >> src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 >> src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint64_t dst = src0 >> src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_ussub_4x8(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const int32_t src0 =
+ _src[0].i32[_i];
+ const int32_t src1 =
+ _src[1].i32[_i];
+
+ int32_t dst;
+
+
+dst = 0;
+for (int i = 0; i < 32; i += 8) {
+ int src0_chan = (src0 >> i) & 0xff;
+ int src1_chan = (src1 >> i) & 0xff;
+ if (src0_chan > src1_chan)
+ dst |= (src0_chan - src1_chan) << i;
+}
+
+
+ _dst_val.i32[_i] = dst;
+ }
+
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_usub_borrow(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint8_t src0 =
+ _src[0].u8[_i];
+ const uint8_t src1 =
+ _src[1].u8[_i];
+
+ uint8_t dst = src0 < src1;
+
+ _dst_val.u8[_i] = dst;
+ }
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint16_t src0 =
+ _src[0].u16[_i];
+ const uint16_t src1 =
+ _src[1].u16[_i];
+
+ uint16_t dst = src0 < src1;
+
+ _dst_val.u16[_i] = dst;
+ }
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint32_t src0 =
+ _src[0].u32[_i];
+ const uint32_t src1 =
+ _src[1].u32[_i];
+
+ uint32_t dst = src0 < src1;
+
+ _dst_val.u32[_i] = dst;
+ }
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ for (unsigned _i = 0; _i < num_components; _i++) {
+ const uint64_t src0 =
+ _src[0].u64[_i];
+ const uint64_t src1 =
+ _src[1].u64[_i];
+
+ uint64_t dst = src0 < src1;
+
+ _dst_val.u64[_i] = dst;
+ }
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_vec2(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct uint8_vec src0 = {
+ _src[0].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src1 = {
+ _src[1].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint8_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+
+
+ _dst_val.u8[0] = dst.x;
+ _dst_val.u8[1] = dst.y;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct uint16_vec src0 = {
+ _src[0].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src1 = {
+ _src[1].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint16_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+
+
+ _dst_val.u16[0] = dst.x;
+ _dst_val.u16[1] = dst.y;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src1 = {
+ _src[1].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+
+
+ _dst_val.u32[0] = dst.x;
+ _dst_val.u32[1] = dst.y;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct uint64_vec src0 = {
+ _src[0].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src1 = {
+ _src[1].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint64_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+
+
+ _dst_val.u64[0] = dst.x;
+ _dst_val.u64[1] = dst.y;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_vec3(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct uint8_vec src0 = {
+ _src[0].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src1 = {
+ _src[1].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src2 = {
+ _src[2].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint8_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+
+
+ _dst_val.u8[0] = dst.x;
+ _dst_val.u8[1] = dst.y;
+ _dst_val.u8[2] = dst.z;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct uint16_vec src0 = {
+ _src[0].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src1 = {
+ _src[1].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src2 = {
+ _src[2].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint16_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+
+
+ _dst_val.u16[0] = dst.x;
+ _dst_val.u16[1] = dst.y;
+ _dst_val.u16[2] = dst.z;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src1 = {
+ _src[1].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src2 = {
+ _src[2].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+
+
+ _dst_val.u32[0] = dst.x;
+ _dst_val.u32[1] = dst.y;
+ _dst_val.u32[2] = dst.z;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct uint64_vec src0 = {
+ _src[0].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src1 = {
+ _src[1].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src2 = {
+ _src[2].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint64_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+
+
+ _dst_val.u64[0] = dst.x;
+ _dst_val.u64[1] = dst.y;
+ _dst_val.u64[2] = dst.z;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+static nir_const_value
+evaluate_vec4(MAYBE_UNUSED unsigned num_components, unsigned bit_size,
+ MAYBE_UNUSED nir_const_value *_src)
+{
+ nir_const_value _dst_val = { {0, } };
+
+ switch (bit_size) {
+ case 8: {
+
+
+
+
+ const struct uint8_vec src0 = {
+ _src[0].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src1 = {
+ _src[1].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src2 = {
+ _src[2].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint8_vec src3 = {
+ _src[3].u8[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint8_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+dst.w = src3.x;
+
+
+ _dst_val.u8[0] = dst.x;
+ _dst_val.u8[1] = dst.y;
+ _dst_val.u8[2] = dst.z;
+ _dst_val.u8[3] = dst.w;
+
+ break;
+ }
+ case 16: {
+
+
+
+
+ const struct uint16_vec src0 = {
+ _src[0].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src1 = {
+ _src[1].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src2 = {
+ _src[2].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint16_vec src3 = {
+ _src[3].u16[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint16_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+dst.w = src3.x;
+
+
+ _dst_val.u16[0] = dst.x;
+ _dst_val.u16[1] = dst.y;
+ _dst_val.u16[2] = dst.z;
+ _dst_val.u16[3] = dst.w;
+
+ break;
+ }
+ case 32: {
+
+
+
+
+ const struct uint32_vec src0 = {
+ _src[0].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src1 = {
+ _src[1].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src2 = {
+ _src[2].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint32_vec src3 = {
+ _src[3].u32[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint32_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+dst.w = src3.x;
+
+
+ _dst_val.u32[0] = dst.x;
+ _dst_val.u32[1] = dst.y;
+ _dst_val.u32[2] = dst.z;
+ _dst_val.u32[3] = dst.w;
+
+ break;
+ }
+ case 64: {
+
+
+
+
+ const struct uint64_vec src0 = {
+ _src[0].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src1 = {
+ _src[1].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src2 = {
+ _src[2].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ const struct uint64_vec src3 = {
+ _src[3].u64[0],
+ 0,
+ 0,
+ 0,
+ };
+
+ struct uint64_vec dst;
+
+
+dst.x = src0.x;
+dst.y = src1.x;
+dst.z = src2.x;
+dst.w = src3.x;
+
+
+ _dst_val.u64[0] = dst.x;
+ _dst_val.u64[1] = dst.y;
+ _dst_val.u64[2] = dst.z;
+ _dst_val.u64[3] = dst.w;
+
+ break;
+ }
+
+ default:
+ unreachable("unknown bit width");
+ }
+
+ return _dst_val;
+}
+
+nir_const_value
+nir_eval_const_opcode(nir_op op, unsigned num_components,
+ unsigned bit_width, nir_const_value *src)
+{
+ switch (op) {
+ case nir_op_b2f:
+ return evaluate_b2f(num_components, bit_width, src);
+ case nir_op_b2i:
+ return evaluate_b2i(num_components, bit_width, src);
+ case nir_op_ball_fequal2:
+ return evaluate_ball_fequal2(num_components, bit_width, src);
+ case nir_op_ball_fequal3:
+ return evaluate_ball_fequal3(num_components, bit_width, src);
+ case nir_op_ball_fequal4:
+ return evaluate_ball_fequal4(num_components, bit_width, src);
+ case nir_op_ball_iequal2:
+ return evaluate_ball_iequal2(num_components, bit_width, src);
+ case nir_op_ball_iequal3:
+ return evaluate_ball_iequal3(num_components, bit_width, src);
+ case nir_op_ball_iequal4:
+ return evaluate_ball_iequal4(num_components, bit_width, src);
+ case nir_op_bany_fnequal2:
+ return evaluate_bany_fnequal2(num_components, bit_width, src);
+ case nir_op_bany_fnequal3:
+ return evaluate_bany_fnequal3(num_components, bit_width, src);
+ case nir_op_bany_fnequal4:
+ return evaluate_bany_fnequal4(num_components, bit_width, src);
+ case nir_op_bany_inequal2:
+ return evaluate_bany_inequal2(num_components, bit_width, src);
+ case nir_op_bany_inequal3:
+ return evaluate_bany_inequal3(num_components, bit_width, src);
+ case nir_op_bany_inequal4:
+ return evaluate_bany_inequal4(num_components, bit_width, src);
+ case nir_op_bcsel:
+ return evaluate_bcsel(num_components, bit_width, src);
+ case nir_op_bfi:
+ return evaluate_bfi(num_components, bit_width, src);
+ case nir_op_bfm:
+ return evaluate_bfm(num_components, bit_width, src);
+ case nir_op_bit_count:
+ return evaluate_bit_count(num_components, bit_width, src);
+ case nir_op_bitfield_insert:
+ return evaluate_bitfield_insert(num_components, bit_width, src);
+ case nir_op_bitfield_reverse:
+ return evaluate_bitfield_reverse(num_components, bit_width, src);
+ case nir_op_extract_i16:
+ return evaluate_extract_i16(num_components, bit_width, src);
+ case nir_op_extract_i8:
+ return evaluate_extract_i8(num_components, bit_width, src);
+ case nir_op_extract_u16:
+ return evaluate_extract_u16(num_components, bit_width, src);
+ case nir_op_extract_u8:
+ return evaluate_extract_u8(num_components, bit_width, src);
+ case nir_op_f2b:
+ return evaluate_f2b(num_components, bit_width, src);
+ case nir_op_f2f16_rtne:
+ return evaluate_f2f16_rtne(num_components, bit_width, src);
+ case nir_op_f2f16_rtz:
+ return evaluate_f2f16_rtz(num_components, bit_width, src);
+ case nir_op_f2f16_undef:
+ return evaluate_f2f16_undef(num_components, bit_width, src);
+ case nir_op_f2f32:
+ return evaluate_f2f32(num_components, bit_width, src);
+ case nir_op_f2f64:
+ return evaluate_f2f64(num_components, bit_width, src);
+ case nir_op_f2i16:
+ return evaluate_f2i16(num_components, bit_width, src);
+ case nir_op_f2i32:
+ return evaluate_f2i32(num_components, bit_width, src);
+ case nir_op_f2i64:
+ return evaluate_f2i64(num_components, bit_width, src);
+ case nir_op_f2i8:
+ return evaluate_f2i8(num_components, bit_width, src);
+ case nir_op_f2u16:
+ return evaluate_f2u16(num_components, bit_width, src);
+ case nir_op_f2u32:
+ return evaluate_f2u32(num_components, bit_width, src);
+ case nir_op_f2u64:
+ return evaluate_f2u64(num_components, bit_width, src);
+ case nir_op_f2u8:
+ return evaluate_f2u8(num_components, bit_width, src);
+ case nir_op_fabs:
+ return evaluate_fabs(num_components, bit_width, src);
+ case nir_op_fadd:
+ return evaluate_fadd(num_components, bit_width, src);
+ case nir_op_fall_equal2:
+ return evaluate_fall_equal2(num_components, bit_width, src);
+ case nir_op_fall_equal3:
+ return evaluate_fall_equal3(num_components, bit_width, src);
+ case nir_op_fall_equal4:
+ return evaluate_fall_equal4(num_components, bit_width, src);
+ case nir_op_fand:
+ return evaluate_fand(num_components, bit_width, src);
+ case nir_op_fany_nequal2:
+ return evaluate_fany_nequal2(num_components, bit_width, src);
+ case nir_op_fany_nequal3:
+ return evaluate_fany_nequal3(num_components, bit_width, src);
+ case nir_op_fany_nequal4:
+ return evaluate_fany_nequal4(num_components, bit_width, src);
+ case nir_op_fceil:
+ return evaluate_fceil(num_components, bit_width, src);
+ case nir_op_fcos:
+ return evaluate_fcos(num_components, bit_width, src);
+ case nir_op_fcsel:
+ return evaluate_fcsel(num_components, bit_width, src);
+ case nir_op_fddx:
+ return evaluate_fddx(num_components, bit_width, src);
+ case nir_op_fddx_coarse:
+ return evaluate_fddx_coarse(num_components, bit_width, src);
+ case nir_op_fddx_fine:
+ return evaluate_fddx_fine(num_components, bit_width, src);
+ case nir_op_fddy:
+ return evaluate_fddy(num_components, bit_width, src);
+ case nir_op_fddy_coarse:
+ return evaluate_fddy_coarse(num_components, bit_width, src);
+ case nir_op_fddy_fine:
+ return evaluate_fddy_fine(num_components, bit_width, src);
+ case nir_op_fdiv:
+ return evaluate_fdiv(num_components, bit_width, src);
+ case nir_op_fdot2:
+ return evaluate_fdot2(num_components, bit_width, src);
+ case nir_op_fdot3:
+ return evaluate_fdot3(num_components, bit_width, src);
+ case nir_op_fdot4:
+ return evaluate_fdot4(num_components, bit_width, src);
+ case nir_op_fdot_replicated2:
+ return evaluate_fdot_replicated2(num_components, bit_width, src);
+ case nir_op_fdot_replicated3:
+ return evaluate_fdot_replicated3(num_components, bit_width, src);
+ case nir_op_fdot_replicated4:
+ return evaluate_fdot_replicated4(num_components, bit_width, src);
+ case nir_op_fdph:
+ return evaluate_fdph(num_components, bit_width, src);
+ case nir_op_fdph_replicated:
+ return evaluate_fdph_replicated(num_components, bit_width, src);
+ case nir_op_feq:
+ return evaluate_feq(num_components, bit_width, src);
+ case nir_op_fexp2:
+ return evaluate_fexp2(num_components, bit_width, src);
+ case nir_op_ffloor:
+ return evaluate_ffloor(num_components, bit_width, src);
+ case nir_op_ffma:
+ return evaluate_ffma(num_components, bit_width, src);
+ case nir_op_ffract:
+ return evaluate_ffract(num_components, bit_width, src);
+ case nir_op_fge:
+ return evaluate_fge(num_components, bit_width, src);
+ case nir_op_find_lsb:
+ return evaluate_find_lsb(num_components, bit_width, src);
+ case nir_op_flog2:
+ return evaluate_flog2(num_components, bit_width, src);
+ case nir_op_flrp:
+ return evaluate_flrp(num_components, bit_width, src);
+ case nir_op_flt:
+ return evaluate_flt(num_components, bit_width, src);
+ case nir_op_fmax:
+ return evaluate_fmax(num_components, bit_width, src);
+ case nir_op_fmin:
+ return evaluate_fmin(num_components, bit_width, src);
+ case nir_op_fmod:
+ return evaluate_fmod(num_components, bit_width, src);
+ case nir_op_fmov:
+ return evaluate_fmov(num_components, bit_width, src);
+ case nir_op_fmul:
+ return evaluate_fmul(num_components, bit_width, src);
+ case nir_op_fne:
+ return evaluate_fne(num_components, bit_width, src);
+ case nir_op_fneg:
+ return evaluate_fneg(num_components, bit_width, src);
+ case nir_op_fnoise1_1:
+ return evaluate_fnoise1_1(num_components, bit_width, src);
+ case nir_op_fnoise1_2:
+ return evaluate_fnoise1_2(num_components, bit_width, src);
+ case nir_op_fnoise1_3:
+ return evaluate_fnoise1_3(num_components, bit_width, src);
+ case nir_op_fnoise1_4:
+ return evaluate_fnoise1_4(num_components, bit_width, src);
+ case nir_op_fnoise2_1:
+ return evaluate_fnoise2_1(num_components, bit_width, src);
+ case nir_op_fnoise2_2:
+ return evaluate_fnoise2_2(num_components, bit_width, src);
+ case nir_op_fnoise2_3:
+ return evaluate_fnoise2_3(num_components, bit_width, src);
+ case nir_op_fnoise2_4:
+ return evaluate_fnoise2_4(num_components, bit_width, src);
+ case nir_op_fnoise3_1:
+ return evaluate_fnoise3_1(num_components, bit_width, src);
+ case nir_op_fnoise3_2:
+ return evaluate_fnoise3_2(num_components, bit_width, src);
+ case nir_op_fnoise3_3:
+ return evaluate_fnoise3_3(num_components, bit_width, src);
+ case nir_op_fnoise3_4:
+ return evaluate_fnoise3_4(num_components, bit_width, src);
+ case nir_op_fnoise4_1:
+ return evaluate_fnoise4_1(num_components, bit_width, src);
+ case nir_op_fnoise4_2:
+ return evaluate_fnoise4_2(num_components, bit_width, src);
+ case nir_op_fnoise4_3:
+ return evaluate_fnoise4_3(num_components, bit_width, src);
+ case nir_op_fnoise4_4:
+ return evaluate_fnoise4_4(num_components, bit_width, src);
+ case nir_op_fnot:
+ return evaluate_fnot(num_components, bit_width, src);
+ case nir_op_for:
+ return evaluate_for(num_components, bit_width, src);
+ case nir_op_fpow:
+ return evaluate_fpow(num_components, bit_width, src);
+ case nir_op_fquantize2f16:
+ return evaluate_fquantize2f16(num_components, bit_width, src);
+ case nir_op_frcp:
+ return evaluate_frcp(num_components, bit_width, src);
+ case nir_op_frem:
+ return evaluate_frem(num_components, bit_width, src);
+ case nir_op_fround_even:
+ return evaluate_fround_even(num_components, bit_width, src);
+ case nir_op_frsq:
+ return evaluate_frsq(num_components, bit_width, src);
+ case nir_op_fsat:
+ return evaluate_fsat(num_components, bit_width, src);
+ case nir_op_fsign:
+ return evaluate_fsign(num_components, bit_width, src);
+ case nir_op_fsin:
+ return evaluate_fsin(num_components, bit_width, src);
+ case nir_op_fsqrt:
+ return evaluate_fsqrt(num_components, bit_width, src);
+ case nir_op_fsub:
+ return evaluate_fsub(num_components, bit_width, src);
+ case nir_op_ftrunc:
+ return evaluate_ftrunc(num_components, bit_width, src);
+ case nir_op_fxor:
+ return evaluate_fxor(num_components, bit_width, src);
+ case nir_op_i2b:
+ return evaluate_i2b(num_components, bit_width, src);
+ case nir_op_i2f16:
+ return evaluate_i2f16(num_components, bit_width, src);
+ case nir_op_i2f32:
+ return evaluate_i2f32(num_components, bit_width, src);
+ case nir_op_i2f64:
+ return evaluate_i2f64(num_components, bit_width, src);
+ case nir_op_i2i16:
+ return evaluate_i2i16(num_components, bit_width, src);
+ case nir_op_i2i32:
+ return evaluate_i2i32(num_components, bit_width, src);
+ case nir_op_i2i64:
+ return evaluate_i2i64(num_components, bit_width, src);
+ case nir_op_i2i8:
+ return evaluate_i2i8(num_components, bit_width, src);
+ case nir_op_iabs:
+ return evaluate_iabs(num_components, bit_width, src);
+ case nir_op_iadd:
+ return evaluate_iadd(num_components, bit_width, src);
+ case nir_op_iand:
+ return evaluate_iand(num_components, bit_width, src);
+ case nir_op_ibfe:
+ return evaluate_ibfe(num_components, bit_width, src);
+ case nir_op_ibitfield_extract:
+ return evaluate_ibitfield_extract(num_components, bit_width, src);
+ case nir_op_idiv:
+ return evaluate_idiv(num_components, bit_width, src);
+ case nir_op_ieq:
+ return evaluate_ieq(num_components, bit_width, src);
+ case nir_op_ifind_msb:
+ return evaluate_ifind_msb(num_components, bit_width, src);
+ case nir_op_ige:
+ return evaluate_ige(num_components, bit_width, src);
+ case nir_op_ilt:
+ return evaluate_ilt(num_components, bit_width, src);
+ case nir_op_imax:
+ return evaluate_imax(num_components, bit_width, src);
+ case nir_op_imin:
+ return evaluate_imin(num_components, bit_width, src);
+ case nir_op_imod:
+ return evaluate_imod(num_components, bit_width, src);
+ case nir_op_imov:
+ return evaluate_imov(num_components, bit_width, src);
+ case nir_op_imul:
+ return evaluate_imul(num_components, bit_width, src);
+ case nir_op_imul_high:
+ return evaluate_imul_high(num_components, bit_width, src);
+ case nir_op_ine:
+ return evaluate_ine(num_components, bit_width, src);
+ case nir_op_ineg:
+ return evaluate_ineg(num_components, bit_width, src);
+ case nir_op_inot:
+ return evaluate_inot(num_components, bit_width, src);
+ case nir_op_ior:
+ return evaluate_ior(num_components, bit_width, src);
+ case nir_op_irem:
+ return evaluate_irem(num_components, bit_width, src);
+ case nir_op_ishl:
+ return evaluate_ishl(num_components, bit_width, src);
+ case nir_op_ishr:
+ return evaluate_ishr(num_components, bit_width, src);
+ case nir_op_isign:
+ return evaluate_isign(num_components, bit_width, src);
+ case nir_op_isub:
+ return evaluate_isub(num_components, bit_width, src);
+ case nir_op_ixor:
+ return evaluate_ixor(num_components, bit_width, src);
+ case nir_op_ldexp:
+ return evaluate_ldexp(num_components, bit_width, src);
+ case nir_op_pack_64_2x32:
+ return evaluate_pack_64_2x32(num_components, bit_width, src);
+ case nir_op_pack_64_2x32_split:
+ return evaluate_pack_64_2x32_split(num_components, bit_width, src);
+ case nir_op_pack_half_2x16:
+ return evaluate_pack_half_2x16(num_components, bit_width, src);
+ case nir_op_pack_half_2x16_split:
+ return evaluate_pack_half_2x16_split(num_components, bit_width, src);
+ case nir_op_pack_snorm_2x16:
+ return evaluate_pack_snorm_2x16(num_components, bit_width, src);
+ case nir_op_pack_snorm_4x8:
+ return evaluate_pack_snorm_4x8(num_components, bit_width, src);
+ case nir_op_pack_unorm_2x16:
+ return evaluate_pack_unorm_2x16(num_components, bit_width, src);
+ case nir_op_pack_unorm_4x8:
+ return evaluate_pack_unorm_4x8(num_components, bit_width, src);
+ case nir_op_pack_uvec2_to_uint:
+ return evaluate_pack_uvec2_to_uint(num_components, bit_width, src);
+ case nir_op_pack_uvec4_to_uint:
+ return evaluate_pack_uvec4_to_uint(num_components, bit_width, src);
+ case nir_op_seq:
+ return evaluate_seq(num_components, bit_width, src);
+ case nir_op_sge:
+ return evaluate_sge(num_components, bit_width, src);
+ case nir_op_slt:
+ return evaluate_slt(num_components, bit_width, src);
+ case nir_op_sne:
+ return evaluate_sne(num_components, bit_width, src);
+ case nir_op_u2f16:
+ return evaluate_u2f16(num_components, bit_width, src);
+ case nir_op_u2f32:
+ return evaluate_u2f32(num_components, bit_width, src);
+ case nir_op_u2f64:
+ return evaluate_u2f64(num_components, bit_width, src);
+ case nir_op_u2u16:
+ return evaluate_u2u16(num_components, bit_width, src);
+ case nir_op_u2u32:
+ return evaluate_u2u32(num_components, bit_width, src);
+ case nir_op_u2u64:
+ return evaluate_u2u64(num_components, bit_width, src);
+ case nir_op_u2u8:
+ return evaluate_u2u8(num_components, bit_width, src);
+ case nir_op_uadd_carry:
+ return evaluate_uadd_carry(num_components, bit_width, src);
+ case nir_op_ubfe:
+ return evaluate_ubfe(num_components, bit_width, src);
+ case nir_op_ubitfield_extract:
+ return evaluate_ubitfield_extract(num_components, bit_width, src);
+ case nir_op_udiv:
+ return evaluate_udiv(num_components, bit_width, src);
+ case nir_op_ufind_msb:
+ return evaluate_ufind_msb(num_components, bit_width, src);
+ case nir_op_uge:
+ return evaluate_uge(num_components, bit_width, src);
+ case nir_op_ult:
+ return evaluate_ult(num_components, bit_width, src);
+ case nir_op_umax:
+ return evaluate_umax(num_components, bit_width, src);
+ case nir_op_umax_4x8:
+ return evaluate_umax_4x8(num_components, bit_width, src);
+ case nir_op_umin:
+ return evaluate_umin(num_components, bit_width, src);
+ case nir_op_umin_4x8:
+ return evaluate_umin_4x8(num_components, bit_width, src);
+ case nir_op_umod:
+ return evaluate_umod(num_components, bit_width, src);
+ case nir_op_umul_high:
+ return evaluate_umul_high(num_components, bit_width, src);
+ case nir_op_umul_unorm_4x8:
+ return evaluate_umul_unorm_4x8(num_components, bit_width, src);
+ case nir_op_unpack_64_2x32:
+ return evaluate_unpack_64_2x32(num_components, bit_width, src);
+ case nir_op_unpack_64_2x32_split_x:
+ return evaluate_unpack_64_2x32_split_x(num_components, bit_width, src);
+ case nir_op_unpack_64_2x32_split_y:
+ return evaluate_unpack_64_2x32_split_y(num_components, bit_width, src);
+ case nir_op_unpack_half_2x16:
+ return evaluate_unpack_half_2x16(num_components, bit_width, src);
+ case nir_op_unpack_half_2x16_split_x:
+ return evaluate_unpack_half_2x16_split_x(num_components, bit_width, src);
+ case nir_op_unpack_half_2x16_split_y:
+ return evaluate_unpack_half_2x16_split_y(num_components, bit_width, src);
+ case nir_op_unpack_snorm_2x16:
+ return evaluate_unpack_snorm_2x16(num_components, bit_width, src);
+ case nir_op_unpack_snorm_4x8:
+ return evaluate_unpack_snorm_4x8(num_components, bit_width, src);
+ case nir_op_unpack_unorm_2x16:
+ return evaluate_unpack_unorm_2x16(num_components, bit_width, src);
+ case nir_op_unpack_unorm_4x8:
+ return evaluate_unpack_unorm_4x8(num_components, bit_width, src);
+ case nir_op_usadd_4x8:
+ return evaluate_usadd_4x8(num_components, bit_width, src);
+ case nir_op_ushr:
+ return evaluate_ushr(num_components, bit_width, src);
+ case nir_op_ussub_4x8:
+ return evaluate_ussub_4x8(num_components, bit_width, src);
+ case nir_op_usub_borrow:
+ return evaluate_usub_borrow(num_components, bit_width, src);
+ case nir_op_vec2:
+ return evaluate_vec2(num_components, bit_width, src);
+ case nir_op_vec3:
+ return evaluate_vec3(num_components, bit_width, src);
+ case nir_op_vec4:
+ return evaluate_vec4(num_components, bit_width, src);
+ default:
+ unreachable("shouldn't get here");
+ }
+}
diff --git a/prebuilt-intermediates/nir/nir_opcodes.c b/prebuilt-intermediates/nir/nir_opcodes.c
new file mode 100644
index 0000000..a0a32f6
--- /dev/null
+++ b/prebuilt-intermediates/nir/nir_opcodes.c
@@ -0,0 +1,2972 @@
+
+#include "nir.h"
+
+nir_op
+nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd)
+{
+ nir_alu_type src_base = (nir_alu_type) nir_alu_type_get_base_type(src);
+ nir_alu_type dst_base = (nir_alu_type) nir_alu_type_get_base_type(dst);
+ unsigned src_bit_size = nir_alu_type_get_type_size(src);
+ unsigned dst_bit_size = nir_alu_type_get_type_size(dst);
+
+ if (src == dst && src_base == nir_type_float) {
+ return nir_op_fmov;
+ } else if ((src_base == nir_type_int || src_base == nir_type_uint) &&
+ (dst_base == nir_type_int || dst_base == nir_type_uint) &&
+ src_bit_size == dst_bit_size) {
+ /* Integer <-> integer conversions with the same bit-size on both
+ * ends are just no-op moves.
+ */
+ return nir_op_imov;
+ }
+
+ switch (src_base) {
+ case nir_type_int:
+ switch (dst_base) {
+ case nir_type_int:
+ case nir_type_uint:
+
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2i16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2i32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2i64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_float:
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2f16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2f32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_i2f64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_bool:
+ return nir_op_i2b;
+ default:
+ unreachable("Invalid nir alu base type");
+ }
+ case nir_type_uint:
+ switch (dst_base) {
+ case nir_type_int:
+ case nir_type_uint:
+
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2u16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2u32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2u64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_float:
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2f16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2f32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_u2f64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_bool:
+ return nir_op_i2b;
+ default:
+ unreachable("Invalid nir alu base type");
+ }
+ case nir_type_float:
+ switch (dst_base) {
+ case nir_type_int:
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2i16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2i32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2i64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_uint:
+ switch (dst_bit_size) {
+ case 16:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2u16;
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2u32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2u64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_float:
+ switch (dst_bit_size) {
+ case 16:
+ switch(rnd) {
+ case nir_rounding_mode_rtne:
+ return nir_op_f2f16_rtne;
+ case nir_rounding_mode_rtz:
+ return nir_op_f2f16_rtz;
+ case nir_rounding_mode_undef:
+ return nir_op_f2f16_undef;
+ default:
+ unreachable("Invalid 16-bit nir rounding mode");
+ }
+ case 32:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2f32;
+ case 64:
+ assert(rnd == nir_rounding_mode_undef);
+ return nir_op_f2f64;
+ default:
+ unreachable("Invalid nir alu bit size");
+ }
+ case nir_type_bool:
+ return nir_op_f2b;
+ default:
+ unreachable("Invalid nir alu base type");
+ }
+ case nir_type_bool:
+ switch (dst_base) {
+ case nir_type_int:
+ case nir_type_uint:
+ return nir_op_b2i;
+ case nir_type_float:
+ return nir_op_b2f;
+ default:
+ unreachable("Invalid nir alu base type");
+ }
+ default:
+ unreachable("Invalid nir alu base type");
+ }
+}
+
+const nir_op_info nir_op_infos[nir_num_opcodes] = {
+{
+ .name = "b2f",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_float,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_bool32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "b2i",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_int,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_bool32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "ball_fequal2",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 2, 2
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ball_fequal3",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 3, 3
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ball_fequal4",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 4, 4
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ball_iequal2",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 2, 2
+ },
+ .input_types = {
+ nir_type_int, nir_type_int
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ball_iequal3",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 3, 3
+ },
+ .input_types = {
+ nir_type_int, nir_type_int
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ball_iequal4",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 4, 4
+ },
+ .input_types = {
+ nir_type_int, nir_type_int
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "bany_fnequal2",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 2, 2
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "bany_fnequal3",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 3, 3
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "bany_fnequal4",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 4, 4
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "bany_inequal2",
+ .num_inputs = 2,
+ .output_size = 1,
+ .output_type = nir_type_bool32,
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+ .name = "pack_snorm_2x16",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 2
+ },
+ .input_types = {
+ nir_type_float32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "pack_snorm_4x8",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 4
+ },
+ .input_types = {
+ nir_type_float32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "pack_unorm_2x16",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 2
+ },
+ .input_types = {
+ nir_type_float32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "pack_unorm_4x8",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 4
+ },
+ .input_types = {
+ nir_type_float32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "pack_uvec2_to_uint",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 2
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "pack_uvec4_to_uint",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 4
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "seq",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_float32, nir_type_float32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "sge",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_float,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_float, nir_type_float
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "slt",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_float32, nir_type_float32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "sne",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_float32, nir_type_float32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "u2f16",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_float16,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2f32",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2f64",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_float64,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2u16",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint16,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2u32",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2u64",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint64,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "u2u8",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint8,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "uadd_carry",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "ubfe",
+ .num_inputs = 3,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0, 0, 0
+ },
+ .input_types = {
+ nir_type_uint32, nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "ubitfield_extract",
+ .num_inputs = 3,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0, 0, 0
+ },
+ .input_types = {
+ nir_type_uint32, nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "udiv",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "ufind_msb",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "uge",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "ult",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_bool32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "umax",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "umax_4x8",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "umin",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "umin_4x8",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "umod",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "umul_high",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint32, nir_type_uint32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE
+},
+{
+ .name = "umul_unorm_4x8",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "unpack_64_2x32",
+ .num_inputs = 1,
+ .output_size = 2,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint64
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_64_2x32_split_x",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint64
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_64_2x32_split_y",
+ .num_inputs = 1,
+ .output_size = 0,
+ .output_type = nir_type_uint32,
+ .input_sizes = {
+ 0
+ },
+ .input_types = {
+ nir_type_uint64
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_half_2x16",
+ .num_inputs = 1,
+ .output_size = 2,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_half_2x16_split_x",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_half_2x16_split_y",
+ .num_inputs = 1,
+ .output_size = 1,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_snorm_2x16",
+ .num_inputs = 1,
+ .output_size = 2,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_snorm_4x8",
+ .num_inputs = 1,
+ .output_size = 4,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_unorm_2x16",
+ .num_inputs = 1,
+ .output_size = 2,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "unpack_unorm_4x8",
+ .num_inputs = 1,
+ .output_size = 4,
+ .output_type = nir_type_float32,
+ .input_sizes = {
+ 1
+ },
+ .input_types = {
+ nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "usadd_4x8",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ NIR_OP_IS_COMMUTATIVE | NIR_OP_IS_ASSOCIATIVE
+},
+{
+ .name = "ushr",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "ussub_4x8",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_int32,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_int32, nir_type_int32
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "usub_borrow",
+ .num_inputs = 2,
+ .output_size = 0,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 0, 0
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "vec2",
+ .num_inputs = 2,
+ .output_size = 2,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 1, 1
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "vec3",
+ .num_inputs = 3,
+ .output_size = 3,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 1, 1, 1
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+{
+ .name = "vec4",
+ .num_inputs = 4,
+ .output_size = 4,
+ .output_type = nir_type_uint,
+ .input_sizes = {
+ 1, 1, 1, 1
+ },
+ .input_types = {
+ nir_type_uint, nir_type_uint, nir_type_uint, nir_type_uint
+ },
+ .algebraic_properties =
+ 0
+},
+};
+
diff --git a/prebuilt-intermediates/nir/nir_opcodes.h b/prebuilt-intermediates/nir/nir_opcodes.h
new file mode 100644
index 0000000..b8e8653
--- /dev/null
+++ b/prebuilt-intermediates/nir/nir_opcodes.h
@@ -0,0 +1,236 @@
+/* Copyright (C) 2014 Connor Abbott
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Connor Abbott (cwabbott0@gmail.com)
+ */
+
+#ifndef _NIR_OPCODES_
+#define _NIR_OPCODES_
+
+
+
+typedef enum {
+ nir_op_b2f,
+ nir_op_b2i,
+ nir_op_ball_fequal2,
+ nir_op_ball_fequal3,
+ nir_op_ball_fequal4,
+ nir_op_ball_iequal2,
+ nir_op_ball_iequal3,
+ nir_op_ball_iequal4,
+ nir_op_bany_fnequal2,
+ nir_op_bany_fnequal3,
+ nir_op_bany_fnequal4,
+ nir_op_bany_inequal2,
+ nir_op_bany_inequal3,
+ nir_op_bany_inequal4,
+ nir_op_bcsel,
+ nir_op_bfi,
+ nir_op_bfm,
+ nir_op_bit_count,
+ nir_op_bitfield_insert,
+ nir_op_bitfield_reverse,
+ nir_op_extract_i16,
+ nir_op_extract_i8,
+ nir_op_extract_u16,
+ nir_op_extract_u8,
+ nir_op_f2b,
+ nir_op_f2f16_rtne,
+ nir_op_f2f16_rtz,
+ nir_op_f2f16_undef,
+ nir_op_f2f32,
+ nir_op_f2f64,
+ nir_op_f2i16,
+ nir_op_f2i32,
+ nir_op_f2i64,
+ nir_op_f2i8,
+ nir_op_f2u16,
+ nir_op_f2u32,
+ nir_op_f2u64,
+ nir_op_f2u8,
+ nir_op_fabs,
+ nir_op_fadd,
+ nir_op_fall_equal2,
+ nir_op_fall_equal3,
+ nir_op_fall_equal4,
+ nir_op_fand,
+ nir_op_fany_nequal2,
+ nir_op_fany_nequal3,
+ nir_op_fany_nequal4,
+ nir_op_fceil,
+ nir_op_fcos,
+ nir_op_fcsel,
+ nir_op_fddx,
+ nir_op_fddx_coarse,
+ nir_op_fddx_fine,
+ nir_op_fddy,
+ nir_op_fddy_coarse,
+ nir_op_fddy_fine,
+ nir_op_fdiv,
+ nir_op_fdot2,
+ nir_op_fdot3,
+ nir_op_fdot4,
+ nir_op_fdot_replicated2,
+ nir_op_fdot_replicated3,
+ nir_op_fdot_replicated4,
+ nir_op_fdph,
+ nir_op_fdph_replicated,
+ nir_op_feq,
+ nir_op_fexp2,
+ nir_op_ffloor,
+ nir_op_ffma,
+ nir_op_ffract,
+ nir_op_fge,
+ nir_op_find_lsb,
+ nir_op_flog2,
+ nir_op_flrp,
+ nir_op_flt,
+ nir_op_fmax,
+ nir_op_fmin,
+ nir_op_fmod,
+ nir_op_fmov,
+ nir_op_fmul,
+ nir_op_fne,
+ nir_op_fneg,
+ nir_op_fnoise1_1,
+ nir_op_fnoise1_2,
+ nir_op_fnoise1_3,
+ nir_op_fnoise1_4,
+ nir_op_fnoise2_1,
+ nir_op_fnoise2_2,
+ nir_op_fnoise2_3,
+ nir_op_fnoise2_4,
+ nir_op_fnoise3_1,
+ nir_op_fnoise3_2,
+ nir_op_fnoise3_3,
+ nir_op_fnoise3_4,
+ nir_op_fnoise4_1,
+ nir_op_fnoise4_2,
+ nir_op_fnoise4_3,
+ nir_op_fnoise4_4,
+ nir_op_fnot,
+ nir_op_for,
+ nir_op_fpow,
+ nir_op_fquantize2f16,
+ nir_op_frcp,
+ nir_op_frem,
+ nir_op_fround_even,
+ nir_op_frsq,
+ nir_op_fsat,
+ nir_op_fsign,
+ nir_op_fsin,
+ nir_op_fsqrt,
+ nir_op_fsub,
+ nir_op_ftrunc,
+ nir_op_fxor,
+ nir_op_i2b,
+ nir_op_i2f16,
+ nir_op_i2f32,
+ nir_op_i2f64,
+ nir_op_i2i16,
+ nir_op_i2i32,
+ nir_op_i2i64,
+ nir_op_i2i8,
+ nir_op_iabs,
+ nir_op_iadd,
+ nir_op_iand,
+ nir_op_ibfe,
+ nir_op_ibitfield_extract,
+ nir_op_idiv,
+ nir_op_ieq,
+ nir_op_ifind_msb,
+ nir_op_ige,
+ nir_op_ilt,
+ nir_op_imax,
+ nir_op_imin,
+ nir_op_imod,
+ nir_op_imov,
+ nir_op_imul,
+ nir_op_imul_high,
+ nir_op_ine,
+ nir_op_ineg,
+ nir_op_inot,
+ nir_op_ior,
+ nir_op_irem,
+ nir_op_ishl,
+ nir_op_ishr,
+ nir_op_isign,
+ nir_op_isub,
+ nir_op_ixor,
+ nir_op_ldexp,
+ nir_op_pack_64_2x32,
+ nir_op_pack_64_2x32_split,
+ nir_op_pack_half_2x16,
+ nir_op_pack_half_2x16_split,
+ nir_op_pack_snorm_2x16,
+ nir_op_pack_snorm_4x8,
+ nir_op_pack_unorm_2x16,
+ nir_op_pack_unorm_4x8,
+ nir_op_pack_uvec2_to_uint,
+ nir_op_pack_uvec4_to_uint,
+ nir_op_seq,
+ nir_op_sge,
+ nir_op_slt,
+ nir_op_sne,
+ nir_op_u2f16,
+ nir_op_u2f32,
+ nir_op_u2f64,
+ nir_op_u2u16,
+ nir_op_u2u32,
+ nir_op_u2u64,
+ nir_op_u2u8,
+ nir_op_uadd_carry,
+ nir_op_ubfe,
+ nir_op_ubitfield_extract,
+ nir_op_udiv,
+ nir_op_ufind_msb,
+ nir_op_uge,
+ nir_op_ult,
+ nir_op_umax,
+ nir_op_umax_4x8,
+ nir_op_umin,
+ nir_op_umin_4x8,
+ nir_op_umod,
+ nir_op_umul_high,
+ nir_op_umul_unorm_4x8,
+ nir_op_unpack_64_2x32,
+ nir_op_unpack_64_2x32_split_x,
+ nir_op_unpack_64_2x32_split_y,
+ nir_op_unpack_half_2x16,
+ nir_op_unpack_half_2x16_split_x,
+ nir_op_unpack_half_2x16_split_y,
+ nir_op_unpack_snorm_2x16,
+ nir_op_unpack_snorm_4x8,
+ nir_op_unpack_unorm_2x16,
+ nir_op_unpack_unorm_4x8,
+ nir_op_usadd_4x8,
+ nir_op_ushr,
+ nir_op_ussub_4x8,
+ nir_op_usub_borrow,
+ nir_op_vec2,
+ nir_op_vec3,
+ nir_op_vec4,
+ nir_last_opcode = nir_op_vec4,
+ nir_num_opcodes = nir_last_opcode + 1
+} nir_op;
+
+#endif /* _NIR_OPCODES_ */
diff --git a/prebuilt-intermediates/nir/nir_opt_algebraic.c b/prebuilt-intermediates/nir/nir_opt_algebraic.c
new file mode 100644
index 0000000..f46a79d
--- /dev/null
+++ b/prebuilt-intermediates/nir/nir_opt_algebraic.c
@@ -0,0 +1,21967 @@
+
+#include "nir.h"
+#include "nir_search.h"
+#include "nir_search_helpers.h"
+
+#ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+#define NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+
+struct transform {
+ const nir_search_expression *search;
+ const nir_search_value *replace;
+ unsigned condition_offset;
+};
+
+#endif
+
+
+static const nir_search_variable search124_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* a */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+
+static const nir_search_constant search124_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search124 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search124_0.value, &search124_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace124_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace124 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace124_0.value },
+ NULL,
+};
+
+static const nir_search_variable search135_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search135_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search135 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search135_0.value, &search135_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace135 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search136_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search136_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search136 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search136_0.value, &search136_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace136 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search137_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search137_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search137 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search137_0.value, &search137_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace137 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search145_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search145_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search145_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search145_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search145_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search145_1_0.value },
+ NULL,
+};
+static const nir_search_expression search145 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search145_0.value, &search145_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace145_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace145_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace145_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &replace145_0_0.value, &replace145_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace145 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace145_0.value },
+ NULL,
+};
+
+static const nir_search_constant search153_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+
+static const nir_search_variable search153_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search153_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x18 /* 24 */ },
+};
+static const nir_search_expression search153_1 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_ushr,
+ { &search153_1_0.value, &search153_1_1.value },
+ NULL,
+};
+static const nir_search_expression search153 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search153_0.value, &search153_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace153_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace153_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x18 /* 24 */ },
+};
+static const nir_search_expression replace153 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace153_0.value, &replace153_1.value },
+ NULL,
+};
+
+static const nir_search_constant search154_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xffff /* 65535 */ },
+};
+
+static const nir_search_variable search154_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search154_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search154_1 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_ushr,
+ { &search154_1_0.value, &search154_1_1.value },
+ NULL,
+};
+static const nir_search_expression search154 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search154_0.value, &search154_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace154_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace154_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression replace154 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace154_0.value, &replace154_1.value },
+ NULL,
+};
+
+static const nir_search_constant search206_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+
+static const nir_search_variable search206_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search206_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search206_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search206_1_0.value, &search206_1_1.value },
+ NULL,
+};
+static const nir_search_expression search206 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search206_0.value, &search206_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace206_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace206_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression replace206 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace206_0.value, &replace206_1.value },
+ NULL,
+};
+
+static const nir_search_constant search207_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+
+static const nir_search_variable search207_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search207_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search207_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search207_1_0.value, &search207_1_1.value },
+ NULL,
+};
+static const nir_search_expression search207 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search207_0.value, &search207_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace207_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace207_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace207 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace207_0.value, &replace207_1.value },
+ NULL,
+};
+
+static const nir_search_constant search208_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+
+static const nir_search_variable search208_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search208 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search208_0.value, &search208_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace208_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace208_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace208 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace208_0.value, &replace208_1.value },
+ NULL,
+};
+
+static const nir_search_constant search210_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xffff /* 65535 */ },
+};
+
+static const nir_search_variable search210_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search210 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search210_0.value, &search210_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace210_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace210_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace210 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u16,
+ { &replace210_0.value, &replace210_1.value },
+ NULL,
+};
+
+static const nir_search_variable search263_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search263_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search263_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search263_0_0.value, &search263_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search263_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search263_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search263_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search263_1_0.value, &search263_1_1.value },
+ NULL,
+};
+static const nir_search_expression search263 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search263_0.value, &search263_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace263_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace263_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace263 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace263_0.value, &replace263_1.value },
+ NULL,
+};
+
+static const nir_search_variable search264_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search264_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search264_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search264_0_0.value, &search264_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search264_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search264_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search264_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search264_1_0.value, &search264_1_1.value },
+ NULL,
+};
+static const nir_search_expression search264 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search264_0.value, &search264_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace264_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace264_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace264 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace264_0.value, &replace264_1.value },
+ NULL,
+};
+
+static const nir_search_variable search265_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search265_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search265_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search265_0_0.value, &search265_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search265_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search265_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search265_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search265_1_0.value, &search265_1_1.value },
+ NULL,
+};
+static const nir_search_expression search265 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search265_0.value, &search265_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace265_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace265_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace265 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace265_0.value, &replace265_1.value },
+ NULL,
+};
+
+static const nir_search_variable search266_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search266_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search266_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search266_0_0.value, &search266_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search266_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search266_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search266_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search266_1_0.value, &search266_1_1.value },
+ NULL,
+};
+static const nir_search_expression search266 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search266_0.value, &search266_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace266_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace266_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace266 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace266_0.value, &replace266_1.value },
+ NULL,
+};
+
+static const nir_search_variable search267_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search267_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search267_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search267_0_0.value, &search267_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search267_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search267_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search267_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search267_1_0.value, &search267_1_1.value },
+ NULL,
+};
+static const nir_search_expression search267 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search267_0.value, &search267_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace267_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace267_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace267 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace267_0.value, &replace267_1.value },
+ NULL,
+};
+
+static const nir_search_variable search268_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search268_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search268_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search268_0_0.value, &search268_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search268_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search268_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search268_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search268_1_0.value, &search268_1_1.value },
+ NULL,
+};
+static const nir_search_expression search268 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search268_0.value, &search268_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace268_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace268_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace268 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace268_0.value, &replace268_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_iand_xforms[] = {
+ { &search124, &replace124.value, 0 },
+ { &search135, &replace135.value, 0 },
+ { &search136, &replace136.value, 0 },
+ { &search137, &replace137.value, 0 },
+ { &search145, &replace145.value, 0 },
+ { &search153, &replace153.value, 0 },
+ { &search154, &replace154.value, 0 },
+ { &search206, &replace206.value, 17 },
+ { &search207, &replace207.value, 17 },
+ { &search208, &replace208.value, 17 },
+ { &search210, &replace210.value, 18 },
+ { &search263, &replace263.value, 0 },
+ { &search264, &replace264.value, 0 },
+ { &search265, &replace265.value, 0 },
+ { &search266, &replace266.value, 0 },
+ { &search267, &replace267.value, 0 },
+ { &search268, &replace268.value, 0 },
+};
+
+static const nir_search_variable search195_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search195_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &search195_0_0.value },
+ NULL,
+};
+static const nir_search_expression search195 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2b,
+ { &search195_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace195 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search198_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search198_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search198_0_0.value },
+ NULL,
+};
+static const nir_search_expression search198 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2b,
+ { &search198_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace198_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace198 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2b,
+ { &replace198_0.value },
+ NULL,
+};
+
+static const nir_search_variable search199_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search199_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search199_0_0.value },
+ NULL,
+};
+static const nir_search_expression search199 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2b,
+ { &search199_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace199_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace199 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2b,
+ { &replace199_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_i2b_xforms[] = {
+ { &search195, &replace195.value, 0 },
+ { &search198, &replace198.value, 0 },
+ { &search199, &replace199.value, 0 },
+};
+
+static const nir_search_variable search142_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search142_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search142 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ixor,
+ { &search142_0.value, &search142_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace142 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search143_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search143_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search143 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ixor,
+ { &search143_0.value, &search143_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace143 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ixor_xforms[] = {
+ { &search142, &replace142.value, 0 },
+ { &search143, &replace143.value, 0 },
+};
+
+static const nir_search_variable search117_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search117_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search117 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_seq,
+ { &search117_0.value, &search117_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace117_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace117_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace117_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace117_0_0.value, &replace117_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace117 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace117_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_seq_xforms[] = {
+ { &search117, &replace117.value, 11 },
+};
+
+static const nir_search_variable search128_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search128_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search128 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &search128_0.value, &search128_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace128 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+
+static const nir_search_variable search277_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search277_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search277_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search277_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search277_0_0.value, &search277_0_1.value, &search277_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search277_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search277 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &search277_0.value, &search277_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace277_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace277_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace277_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace277_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace277_1_0.value, &replace277_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace277_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace277_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace277_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace277_2_0.value, &replace277_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace277 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace277_0.value, &replace277_1.value, &replace277_2.value },
+ NULL,
+};
+
+static const nir_search_variable search278_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search278_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search278_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search278_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search278_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search278_1_0.value, &search278_1_1.value, &search278_1_2.value },
+ NULL,
+};
+static const nir_search_expression search278 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &search278_0.value, &search278_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace278_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace278_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace278_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace278_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace278_1_0.value, &replace278_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace278_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace278_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace278_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace278_2_0.value, &replace278_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace278 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace278_0.value, &replace278_1.value, &replace278_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ilt_xforms[] = {
+ { &search128, &replace128.value, 0 },
+ { &search277, &replace277.value, 0 },
+ { &search278, &replace278.value, 0 },
+};
+
+static const nir_search_variable search4_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search4_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search4 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umod,
+ { &search4_0.value, &search4_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace4 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search9_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search9_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_pos_power_of_two),
+};
+static const nir_search_expression search9 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umod,
+ { &search9_0.value, &search9_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace9_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace9_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace9_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace9_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace9_1_0.value, &replace9_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace9 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace9_0.value, &replace9_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_umod_xforms[] = {
+ { &search4, &replace4.value, 0 },
+ { &search9, &replace9.value, 0 },
+};
+
+static const nir_search_variable search0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search0_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_pos_power_of_two),
+};
+static const nir_search_expression search0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search0_0.value, &search0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace0_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace0_0.value, &replace0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search1_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_neg_power_of_two),
+};
+static const nir_search_expression search1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search1_0.value, &search1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace1_0_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace1_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace1_0_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace1_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace1_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace1_0_0.value, &replace1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace1_0.value },
+ NULL,
+};
+
+static const nir_search_variable search30_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search30_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search30 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search30_0.value, &search30_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace30 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search34_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search34_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search34 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search34_0.value, &search34_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace34 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search36_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search36_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search36 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search36_0.value, &search36_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace36_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace36 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace36_0.value },
+ NULL,
+};
+
+static const nir_search_variable search121_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search121_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &search121_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search121_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search121_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &search121_1_0.value },
+ NULL,
+};
+static const nir_search_expression search121 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search121_0.value, &search121_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace121_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace121_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace121_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace121_0_0.value, &replace121_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace121 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &replace121_0.value },
+ NULL,
+};
+
+static const nir_search_variable search224_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search224_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search224_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search224_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search224 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search224_0.value, &search224_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace224_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace224_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace224_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace224_0_0.value, &replace224_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace224 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace224_0.value },
+ NULL,
+};
+
+static const nir_search_variable search226_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search226_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search226_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search226_0_0.value, &search226_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search226_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search226 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search226_0.value, &search226_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace226_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace226_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace226_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace226_0_0.value, &replace226_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace226_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace226 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace226_0.value, &replace226_1.value },
+ NULL,
+};
+
+static const nir_search_variable search230_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search230_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search230_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search230_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search230_1_0.value, &search230_1_1.value },
+ NULL,
+};
+static const nir_search_expression search230 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search230_0.value, &search230_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace230_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace230_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace230_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace230_0_0.value, &replace230_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace230_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace230 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace230_0.value, &replace230_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_imul_xforms[] = {
+ { &search0, &replace0.value, 0 },
+ { &search1, &replace1.value, 0 },
+ { &search30, &replace30.value, 0 },
+ { &search34, &replace34.value, 0 },
+ { &search36, &replace36.value, 0 },
+ { &search121, &replace121.value, 0 },
+ { &search224, &replace224.value, 0 },
+ { &search226, &replace226.value, 0 },
+ { &search230, &replace230.value, 0 },
+};
+
+static const nir_search_variable search133_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search133_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search133 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &search133_0.value, &search133_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace133 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search287_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search287_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search287_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search287_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search287_0_0.value, &search287_0_1.value, &search287_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search287_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search287 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &search287_0.value, &search287_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace287_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace287_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace287_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace287_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &replace287_1_0.value, &replace287_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace287_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace287_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace287_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &replace287_2_0.value, &replace287_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace287 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace287_0.value, &replace287_1.value, &replace287_2.value },
+ NULL,
+};
+
+static const nir_search_variable search288_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search288_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search288_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search288_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search288_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search288_1_0.value, &search288_1_1.value, &search288_1_2.value },
+ NULL,
+};
+static const nir_search_expression search288 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &search288_0.value, &search288_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace288_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace288_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace288_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace288_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &replace288_1_0.value, &replace288_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace288_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace288_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace288_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_uge,
+ { &replace288_2_0.value, &replace288_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace288 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace288_0.value, &replace288_1.value, &replace288_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_uge_xforms[] = {
+ { &search133, &replace133.value, 0 },
+ { &search287, &replace287.value, 0 },
+ { &search288, &replace288.value, 0 },
+};
+
+static const nir_search_variable search11_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search11_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search11_0_0.value },
+ NULL,
+};
+static const nir_search_expression search11 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search11_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace11 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search125_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search125_0 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_b2i,
+ { &search125_0_0.value },
+ NULL,
+};
+static const nir_search_expression search125 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search125_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace125 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search218_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search218 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search218_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace218_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable replace218_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace218 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace218_0.value, &replace218_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ineg_xforms[] = {
+ { &search11, &replace11.value, 0 },
+ { &search125, &replace125.value, 0 },
+ { &search218, &replace218.value, 20 },
+};
+
+static const nir_search_variable search29_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search29_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search29 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &search29_0.value, &search29_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace29 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search33_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search33_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search33 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search33_0.value, &search33_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace33 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search35_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search35_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+static const nir_search_expression search35 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search35_0.value, &search35_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace35_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace35 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace35_0.value },
+ NULL,
+};
+
+static const nir_search_variable search122_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search122_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search122_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search122_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search122_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search122_1_0.value },
+ NULL,
+};
+static const nir_search_expression search122 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search122_0.value, &search122_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace122_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace122_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace122_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace122_0_0.value, &replace122_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace122 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace122_0.value },
+ NULL,
+};
+
+static const nir_search_variable search173_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search173_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search173_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search173_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search173_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search173_1_0.value },
+ NULL,
+};
+static const nir_search_expression search173 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &search173_0.value, &search173_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace173_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace173_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace173_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace173_0_0.value, &replace173_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace173 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace173_0.value },
+ NULL,
+};
+
+static const nir_search_variable search223_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search223_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search223_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search223_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search223 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search223_0.value, &search223_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace223_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace223_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace223_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace223_0_0.value, &replace223_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace223 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace223_0.value },
+ NULL,
+};
+
+static const nir_search_variable search225_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search225_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search225_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search225_0_0.value, &search225_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search225_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search225 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &search225_0.value, &search225_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace225_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace225_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace225_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace225_0_0.value, &replace225_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace225_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace225 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace225_0.value, &replace225_1.value },
+ NULL,
+};
+
+static const nir_search_variable search229_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search229_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search229_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search229_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search229_1_0.value, &search229_1_1.value },
+ NULL,
+};
+static const nir_search_expression search229 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &search229_0.value, &search229_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace229_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace229_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace229_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace229_0_0.value, &replace229_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace229_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace229 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace229_0.value, &replace229_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fmul_xforms[] = {
+ { &search29, &replace29.value, 0 },
+ { &search33, &replace33.value, 0 },
+ { &search35, &replace35.value, 0 },
+ { &search122, &replace122.value, 0 },
+ { &search173, &replace173.value, 0 },
+ { &search223, &replace223.value, 0 },
+ { &search225, &replace225.value, 0 },
+ { &search229, &replace229.value, 0 },
+};
+
+static const nir_search_variable search202_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search202_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search202_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_64_2x32_split,
+ { &search202_0_0.value, &search202_0_1.value },
+ NULL,
+};
+static const nir_search_expression search202 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_64_2x32_split_x,
+ { &search202_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace202 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_64_2x32_split_x_xforms[] = {
+ { &search202, &replace202.value, 0 },
+};
+
+static const nir_search_constant search37_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search37_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search37_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search37 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ffma,
+ { &search37_0.value, &search37_1.value, &search37_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace37 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search38_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search38_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search38_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search38 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ffma,
+ { &search38_0.value, &search38_1.value, &search38_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace38 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search39_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search39_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search39_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search39 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ffma,
+ { &search39_0.value, &search39_1.value, &search39_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace39_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace39_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace39 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace39_0.value, &replace39_1.value },
+ NULL,
+};
+
+static const nir_search_variable search40_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search40_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search40_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search40 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffma,
+ { &search40_0.value, &search40_1.value, &search40_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace40_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace40_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace40 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace40_0.value, &replace40_1.value },
+ NULL,
+};
+
+static const nir_search_constant search41_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search41_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search41_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search41 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffma,
+ { &search41_0.value, &search41_1.value, &search41_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace41_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace41_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace41 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace41_0.value, &replace41_1.value },
+ NULL,
+};
+
+static const nir_search_variable search57_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search57_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search57_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search57 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffma,
+ { &search57_0.value, &search57_1.value, &search57_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace57_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace57_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace57_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace57_0_0.value, &replace57_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace57_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace57 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace57_0.value, &replace57_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ffma_xforms[] = {
+ { &search37, &replace37.value, 0 },
+ { &search38, &replace38.value, 0 },
+ { &search39, &replace39.value, 0 },
+ { &search40, &replace40.value, 0 },
+ { &search41, &replace41.value, 0 },
+ { &search57, &replace57.value, 7 },
+};
+
+static const nir_search_variable search83_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search83_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search83 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umin,
+ { &search83_0.value, &search83_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace83 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search103_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search103_0_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search103_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umax,
+ { &search103_0_0_0_0.value, &search103_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search103_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search103_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umin,
+ { &search103_0_0_0.value, &search103_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search103_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search103_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umax,
+ { &search103_0_0.value, &search103_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search103_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search103 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umin,
+ { &search103_0.value, &search103_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace103_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace103_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace103_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umax,
+ { &replace103_0_0.value, &replace103_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace103_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace103 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umin,
+ { &replace103_0.value, &replace103_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_umin_xforms[] = {
+ { &search83, &replace83.value, 0 },
+ { &search103, &replace103.value, 0 },
+};
+
+static const nir_search_variable search84_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search84_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search84 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umax,
+ { &search84_0.value, &search84_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace84 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_umax_xforms[] = {
+ { &search84, &replace84.value, 0 },
+};
+
+static const nir_search_variable search74_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search74_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search74_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search74_0_0.value, &search74_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search74_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search74_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search74 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search74_0.value, &search74_1.value, &search74_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace74_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace74_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace74 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace74_0.value, &replace74_1.value },
+ NULL,
+};
+
+static const nir_search_variable search75_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search75_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search75_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search75_0_0.value, &search75_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search75_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search75_2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search75 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search75_0.value, &search75_1.value, &search75_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace75_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace75_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace75 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace75_0.value, &replace75_1.value },
+ NULL,
+};
+
+static const nir_search_variable search76_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search76_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search76_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search76_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search76_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search76 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search76_0.value, &search76_1.value, &search76_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace76_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace76_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace76_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace76 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace76_0.value, &replace76_1.value, &replace76_2.value },
+ NULL,
+};
+
+static const nir_search_variable search77_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search77_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search77_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search77_1_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search77_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search77_1_0.value, &search77_1_1.value, &search77_1_2.value },
+ NULL,
+};
+
+static const nir_search_variable search77_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search77 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search77_0.value, &search77_1.value, &search77_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace77_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace77_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace77_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace77 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace77_0.value, &replace77_1.value, &replace77_2.value },
+ NULL,
+};
+
+static const nir_search_variable search78_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search78_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search78_2 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+static const nir_search_expression search78 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search78_0.value, &search78_1.value, &search78_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace78_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace78_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace78 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &replace78_0.value, &replace78_1.value },
+ NULL,
+};
+
+static const nir_search_variable search184_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search184_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_constant search184_2 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+static const nir_search_expression search184 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search184_0.value, &search184_1.value, &search184_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace184 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search185_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search185_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+
+static const nir_search_constant search185_2 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+static const nir_search_expression search185 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search185_0.value, &search185_1.value, &search185_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace185_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace185 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace185_0.value },
+ NULL,
+};
+
+static const nir_search_variable search186_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search186_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_constant search186_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search186 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_bcsel,
+ { &search186_0.value, &search186_1.value, &search186_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace186_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace186 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace186_0.value },
+ NULL,
+};
+
+static const nir_search_variable search187_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search187_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_constant search187_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search187 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_bcsel,
+ { &search187_0.value, &search187_1.value, &search187_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace187_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace187_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace187_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace187 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace187_0.value },
+ NULL,
+};
+
+static const nir_search_variable search188_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search188_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+
+static const nir_search_constant search188_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x8000000000000000L /* -0.0 */ },
+};
+static const nir_search_expression search188 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_bcsel,
+ { &search188_0.value, &search188_1.value, &search188_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace188_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace188_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace188_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace188 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace188_0.value },
+ NULL,
+};
+
+static const nir_search_variable search189_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search189_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x8000000000000000L /* -0.0 */ },
+};
+
+static const nir_search_constant search189_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+static const nir_search_expression search189 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_bcsel,
+ { &search189_0.value, &search189_1.value, &search189_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace189_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace189_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace189_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace189_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace189_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace189 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace189_0.value },
+ NULL,
+};
+
+static const nir_search_constant search190_0 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search190_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search190_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search190 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search190_0.value, &search190_1.value, &search190_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace190 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search191_0 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+
+static const nir_search_variable search191_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search191_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search191 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search191_0.value, &search191_1.value, &search191_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace191 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search192_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search192_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search192_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search192 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search192_0.value, &search192_1.value, &search192_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace192_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace192_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace192_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace192_0_0.value, &replace192_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace192_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace192_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace192 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace192_0.value, &replace192_1.value, &replace192_2.value },
+ NULL,
+};
+
+static const nir_search_variable search193_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search193_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search193_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search193 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search193_0.value, &search193_1.value, &search193_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace193 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search233_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search233_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &search233_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search233_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search233_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search233_0_0.value, &search233_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search233_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search233_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &search233_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search233_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search233 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search233_0.value, &search233_1.value, &search233_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace233_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace233 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace233_0.value },
+ NULL,
+};
+
+static const nir_search_variable search234_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search234_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &search234_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search234_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search234_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search234_0_0.value, &search234_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search234_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search234_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &search234_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search234_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search234 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search234_0.value, &search234_1.value, &search234_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace234_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace234 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &replace234_0.value },
+ NULL,
+};
+
+static const nir_search_variable search235_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search235_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ufind_msb,
+ { &search235_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search235_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search235_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search235_0_0.value, &search235_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search235_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search235_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ufind_msb,
+ { &search235_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search235_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search235 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search235_0.value, &search235_1.value, &search235_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace235_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace235 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ufind_msb,
+ { &replace235_0.value },
+ NULL,
+};
+
+static const nir_search_variable search236_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search236_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search236_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search236_0_0.value, &search236_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search236_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search236_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &search236_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search236_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search236 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search236_0.value, &search236_1.value, &search236_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace236_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace236 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace236_0.value },
+ NULL,
+};
+
+static const nir_search_variable search237_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search237_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search237_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search237_0_0.value, &search237_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search237_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search237_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &search237_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search237_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search237 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search237_0.value, &search237_1.value, &search237_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace237_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace237 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &replace237_0.value },
+ NULL,
+};
+
+static const nir_search_variable search238_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search238_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search238_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search238_0_0.value, &search238_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search238_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search238_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ufind_msb,
+ { &search238_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search238_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search238 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search238_0.value, &search238_1.value, &search238_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace238_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace238 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ufind_msb,
+ { &replace238_0.value },
+ NULL,
+};
+
+static const nir_search_variable search239_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search239_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search239_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search239_0_0.value, &search239_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search239_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search239_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &search239_1_0.value },
+ NULL,
+};
+
+static const nir_search_constant search239_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search239 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search239_0.value, &search239_1.value, &search239_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace239_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace239 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ifind_msb,
+ { &replace239_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_bcsel_xforms[] = {
+ { &search74, &replace74.value, 0 },
+ { &search75, &replace75.value, 0 },
+ { &search76, &replace76.value, 0 },
+ { &search77, &replace77.value, 0 },
+ { &search78, &replace78.value, 0 },
+ { &search184, &replace184.value, 0 },
+ { &search185, &replace185.value, 0 },
+ { &search186, &replace186.value, 0 },
+ { &search187, &replace187.value, 0 },
+ { &search188, &replace188.value, 0 },
+ { &search189, &replace189.value, 0 },
+ { &search190, &replace190.value, 0 },
+ { &search191, &replace191.value, 0 },
+ { &search192, &replace192.value, 0 },
+ { &search193, &replace193.value, 0 },
+ { &search233, &replace233.value, 0 },
+ { &search234, &replace234.value, 0 },
+ { &search235, &replace235.value, 0 },
+ { &search236, &replace236.value, 0 },
+ { &search237, &replace237.value, 0 },
+ { &search238, &replace238.value, 0 },
+ { &search239, &replace239.value, 0 },
+};
+
+static const nir_search_variable search116_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search116_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search116 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sge,
+ { &search116_0.value, &search116_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace116_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace116_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace116_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace116_0_0.value, &replace116_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace116 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace116_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_sge_xforms[] = {
+ { &search116, &replace116.value, 11 },
+};
+
+static const nir_search_variable search166_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search166_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search166_0_0.value },
+ NULL,
+};
+static const nir_search_expression search166 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fsqrt,
+ { &search166_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace166_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fe0000000000000 /* 0.5 */ },
+};
+
+static const nir_search_variable replace166_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace166_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace166_0_0.value, &replace166_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace166 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace166_0.value },
+ NULL,
+};
+
+static const nir_search_variable search178_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search178 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsqrt,
+ { &search178_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace178_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace178_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frsq,
+ { &replace178_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace178 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frcp,
+ { &replace178_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fsqrt_xforms[] = {
+ { &search166, &replace166.value, 0 },
+ { &search178, &replace178.value, 15 },
+};
+
+static const nir_search_variable search18_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search18_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search18 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search18_0.value, &search18_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace18 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search22_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search22_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search22_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search22_0_0.value, &search22_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search22_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search22_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search22_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search22_1_0.value, &search22_1_1.value },
+ NULL,
+};
+static const nir_search_expression search22 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search22_0.value, &search22_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace22_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace22_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace22_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace22_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace22_1_0.value, &replace22_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace22 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace22_0.value, &replace22_1.value },
+ NULL,
+};
+
+static const nir_search_variable search24_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search24_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search24_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search24_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search24 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search24_0.value, &search24_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace24 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search25_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search25_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search25_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search25_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search25_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search25_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search25_1_0.value, &search25_1_1.value },
+ NULL,
+};
+static const nir_search_expression search25 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search25_0.value, &search25_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace25 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search26_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search26_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search26_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search26_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search26_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search26_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search26_1_0.value, &search26_1_1.value },
+ NULL,
+};
+static const nir_search_expression search26 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search26_0.value, &search26_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace26 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search220_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search220_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search220_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search220_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &search220_1_0.value, &search220_1_1.value },
+ NULL,
+};
+static const nir_search_expression search220 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search220_0.value, &search220_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace220_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace220_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace220 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace220_0.value, &replace220_1.value },
+ NULL,
+};
+
+static const nir_search_variable search228_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search228_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search228_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search228_0_0.value, &search228_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search228_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search228 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search228_0.value, &search228_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace228_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace228_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace228_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace228_0_0.value, &replace228_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace228_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace228 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace228_0.value, &replace228_1.value },
+ NULL,
+};
+
+static const nir_search_variable search232_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search232_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search232_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search232_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search232_1_0.value, &search232_1_1.value },
+ NULL,
+};
+static const nir_search_expression search232 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search232_0.value, &search232_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace232_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace232_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace232_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace232_0_0.value, &replace232_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace232_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace232 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace232_0.value, &replace232_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_iadd_xforms[] = {
+ { &search18, &replace18.value, 0 },
+ { &search22, &replace22.value, 0 },
+ { &search24, &replace24.value, 0 },
+ { &search25, &replace25.value, 0 },
+ { &search26, &replace26.value, 0 },
+ { &search220, &replace220.value, 0 },
+ { &search228, &replace228.value, 0 },
+ { &search232, &replace232.value, 0 },
+};
+
+static const nir_search_variable search252_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search252 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_unorm_2x16,
+ { &search252_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace252_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace252_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace252_0_0_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace252_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x40efffe000000000 /* 65535.0 */ },
+};
+static const nir_search_expression replace252_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace252_0_0_0_0.value, &replace252_0_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace252_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fround_even,
+ { &replace252_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace252_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2u32,
+ { &replace252_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace252 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_uvec2_to_uint,
+ { &replace252_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_pack_unorm_2x16_xforms[] = {
+ { &search252, &replace252.value, 29 },
+};
+
+static const nir_search_variable search253_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search253 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_unorm_4x8,
+ { &search253_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace253_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace253_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace253_0_0_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace253_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x406fe00000000000 /* 255.0 */ },
+};
+static const nir_search_expression replace253_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace253_0_0_0_0.value, &replace253_0_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace253_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fround_even,
+ { &replace253_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace253_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2u32,
+ { &replace253_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace253 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_uvec4_to_uint,
+ { &replace253_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_pack_unorm_4x8_xforms[] = {
+ { &search253, &replace253.value, 30 },
+};
+
+static const nir_search_variable search255_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search255 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_snorm_4x8,
+ { &search255_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace255_0_0_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_constant replace255_0_0_0_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+
+static const nir_search_variable replace255_0_0_0_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace255_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace255_0_0_0_0_1_0.value, &replace255_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace255_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace255_0_0_0_0_0.value, &replace255_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace255_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x405fc00000000000 /* 127.0 */ },
+};
+static const nir_search_expression replace255_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace255_0_0_0_0.value, &replace255_0_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace255_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fround_even,
+ { &replace255_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace255_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2i32,
+ { &replace255_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace255 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_uvec4_to_uint,
+ { &replace255_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_pack_snorm_4x8_xforms[] = {
+ { &search255, &replace255.value, 32 },
+};
+
+static const nir_search_variable search134_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search134_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search134 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fand,
+ { &search134_0.value, &search134_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace134 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const struct transform nir_opt_algebraic_fand_xforms[] = {
+ { &search134, &replace134.value, 0 },
+};
+
+static const nir_search_variable search12_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search12_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search12_0_0.value },
+ NULL,
+};
+static const nir_search_expression search12 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search12_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace12_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace12 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace12_0.value },
+ NULL,
+};
+
+static const nir_search_variable search13_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search13_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search13_0_0.value },
+ NULL,
+};
+static const nir_search_expression search13 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search13_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace13_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace13 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace13_0.value },
+ NULL,
+};
+
+static const nir_search_variable search14_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search14_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_u2f32,
+ { &search14_0_0.value },
+ NULL,
+};
+static const nir_search_expression search14 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search14_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace14_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace14 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_u2f32,
+ { &replace14_0.value },
+ NULL,
+};
+
+static const nir_search_variable search111_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search111_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search111_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_slt,
+ { &search111_0_0.value, &search111_0_1.value },
+ NULL,
+};
+static const nir_search_expression search111 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search111_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace111_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace111_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace111 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_slt,
+ { &replace111_0.value, &replace111_1.value },
+ NULL,
+};
+
+static const nir_search_variable search112_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search112_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search112_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sge,
+ { &search112_0_0.value, &search112_0_1.value },
+ NULL,
+};
+static const nir_search_expression search112 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search112_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace112_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace112_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace112 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sge,
+ { &replace112_0.value, &replace112_1.value },
+ NULL,
+};
+
+static const nir_search_variable search113_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search113_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search113_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_seq,
+ { &search113_0_0.value, &search113_0_1.value },
+ NULL,
+};
+static const nir_search_expression search113 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search113_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace113_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace113_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace113 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_seq,
+ { &replace113_0.value, &replace113_1.value },
+ NULL,
+};
+
+static const nir_search_variable search114_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search114_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search114_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sne,
+ { &search114_0_0.value, &search114_0_1.value },
+ NULL,
+};
+static const nir_search_expression search114 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search114_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace114_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace114_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace114 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sne,
+ { &replace114_0.value, &replace114_1.value },
+ NULL,
+};
+
+static const nir_search_variable search200_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search200_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search200_0_0.value },
+ NULL,
+};
+static const nir_search_expression search200 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search200_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace200_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace200 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace200_0.value },
+ NULL,
+};
+
+static const nir_search_constant search221_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search221_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search221_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &search221_0_0.value, &search221_0_1.value },
+ NULL,
+};
+static const nir_search_expression search221 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search221_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace221_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace221 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace221_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fabs_xforms[] = {
+ { &search12, &replace12.value, 0 },
+ { &search13, &replace13.value, 0 },
+ { &search14, &replace14.value, 0 },
+ { &search111, &replace111.value, 0 },
+ { &search112, &replace112.value, 0 },
+ { &search113, &replace113.value, 0 },
+ { &search114, &replace114.value, 0 },
+ { &search200, &replace200.value, 0 },
+ { &search221, &replace221.value, 0 },
+};
+
+static const nir_search_variable search5_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search5_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search5 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imod,
+ { &search5_0.value, &search5_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace5 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const struct transform nir_opt_algebraic_imod_xforms[] = {
+ { &search5, &replace5.value, 0 },
+};
+
+static const nir_search_variable search130_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search130_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search130 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search130_0.value, &search130_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace130 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search180_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* a */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+
+static const nir_search_constant search180_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+static const nir_search_expression search180 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search180_0.value, &search180_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace180 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search183_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* a */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+
+static const nir_search_constant search183_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+static const nir_search_expression search183 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search183_0.value, &search183_1.value },
+ (is_not_used_by_if),
+};
+
+static const nir_search_variable replace183_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace183 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace183_0.value },
+ NULL,
+};
+
+static const nir_search_variable search281_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search281_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search281_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search281_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search281_0_0.value, &search281_0_1.value, &search281_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search281_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search281 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search281_0.value, &search281_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace281_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace281_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace281_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace281_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &replace281_1_0.value, &replace281_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace281_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace281_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace281_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &replace281_2_0.value, &replace281_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace281 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace281_0.value, &replace281_1.value, &replace281_2.value },
+ NULL,
+};
+
+static const nir_search_variable search282_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search282_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search282_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search282_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search282_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search282_1_0.value, &search282_1_1.value, &search282_1_2.value },
+ NULL,
+};
+static const nir_search_expression search282 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search282_0.value, &search282_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace282_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace282_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace282_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace282_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &replace282_1_0.value, &replace282_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace282_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace282_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace282_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &replace282_2_0.value, &replace282_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace282 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace282_0.value, &replace282_1.value, &replace282_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ieq_xforms[] = {
+ { &search130, &replace130.value, 0 },
+ { &search180, &replace180.value, 0 },
+ { &search183, &replace183.value, 0 },
+ { &search281, &replace281.value, 0 },
+ { &search282, &replace282.value, 0 },
+};
+
+static const nir_search_variable search244_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search244_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search244 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_usub_borrow,
+ { &search244_0.value, &search244_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace244_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace244_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace244_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace244_0_0.value, &replace244_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace244 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &replace244_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_usub_borrow_xforms[] = {
+ { &search244, &replace244.value, 24 },
+};
+
+static const nir_search_variable search81_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search81_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search81 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search81_0.value, &search81_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace81 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search86_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search86_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search86_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search86_1_0.value },
+ NULL,
+};
+static const nir_search_expression search86 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search86_0.value, &search86_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace86_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace86_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace86_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace86 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace86_0.value },
+ NULL,
+};
+
+static const nir_search_variable search88_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search88_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search88_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search88_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression search88_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search88_1_0.value },
+ NULL,
+};
+static const nir_search_expression search88 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search88_0.value, &search88_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace88_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace88_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace88_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace88 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace88_0.value },
+ NULL,
+};
+
+static const nir_search_variable search90_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search90_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search90_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search90_1_0.value },
+ NULL,
+};
+static const nir_search_expression search90 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search90_0.value, &search90_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace90 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search102_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search102_0_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search102_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search102_0_0_0_0.value, &search102_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search102_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search102_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search102_0_0_0.value, &search102_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search102_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search102_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search102_0_0.value, &search102_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search102_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search102 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search102_0.value, &search102_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace102_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace102_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace102_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace102_0_0.value, &replace102_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace102_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace102 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace102_0.value, &replace102_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_imin_xforms[] = {
+ { &search81, &replace81.value, 0 },
+ { &search86, &replace86.value, 0 },
+ { &search88, &replace88.value, 0 },
+ { &search90, &replace90.value, 0 },
+ { &search102, &replace102.value, 0 },
+};
+
+static const nir_search_variable search168_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search168_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search168_0_0.value },
+ NULL,
+};
+static const nir_search_expression search168 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_frsq,
+ { &search168_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace168_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbfe0000000000000L /* -0.5 */ },
+};
+
+static const nir_search_variable replace168_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace168_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace168_0_0.value, &replace168_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace168 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace168_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_frsq_xforms[] = {
+ { &search168, &replace168.value, 0 },
+};
+
+static const nir_search_variable search19_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search19_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search19 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_usadd_4x8,
+ { &search19_0.value, &search19_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace19 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search20_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search20_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search20 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_usadd_4x8,
+ { &search20_0.value, &search20_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace20 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+
+static const struct transform nir_opt_algebraic_usadd_4x8_xforms[] = {
+ { &search19, &replace19.value, 0 },
+ { &search20, &replace20.value, 0 },
+};
+
+static const nir_search_variable search3_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search3_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search3 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_idiv,
+ { &search3_0.value, &search3_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace3 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search7_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search7_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_pos_power_of_two),
+};
+static const nir_search_expression search7 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_idiv,
+ { &search7_0.value, &search7_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace7_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace7_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isign,
+ { &replace7_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace7_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace7_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace7_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace7_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace7_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace7_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace7_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace7_1_0.value, &replace7_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace7 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace7_0.value, &replace7_1.value },
+ NULL,
+};
+
+static const nir_search_variable search8_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search8_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_neg_power_of_two),
+};
+static const nir_search_expression search8 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_idiv,
+ { &search8_0.value, &search8_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace8_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace8_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isign,
+ { &replace8_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace8_0_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace8_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace8_0_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace8_0_1_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace8_0_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace8_0_1_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace8_0_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace8_0_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace8_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace8_0_1_0.value, &replace8_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace8_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace8_0_0.value, &replace8_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace8 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace8_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_idiv_xforms[] = {
+ { &search3, &replace3.value, 0 },
+ { &search7, &replace7.value, 1 },
+ { &search8, &replace8.value, 1 },
+};
+
+static const nir_search_variable search106_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search106_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search106_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search106_0_0_0.value, &search106_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search106_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+static const nir_search_expression search106_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &search106_0_0.value, &search106_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search106_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search106 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &search106_0.value, &search106_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace106_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace106_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace106_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace106_0_0.value, &replace106_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace106_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+static const nir_search_expression replace106 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace106_0.value, &replace106_1.value },
+ NULL,
+};
+
+static const nir_search_variable search249_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search249_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search249 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &search249_0.value, &search249_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace249_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace249_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace249_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression replace249_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace249_0_1_0.value, &replace249_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace249_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace249_0_0.value, &replace249_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace249_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff /* 255 */ },
+};
+static const nir_search_expression replace249 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace249_0.value, &replace249_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_extract_u8_xforms[] = {
+ { &search106, &replace106.value, 0 },
+ { &search249, &replace249.value, 27 },
+};
+
+static const nir_search_variable search254_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search254 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_snorm_2x16,
+ { &search254_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace254_0_0_0_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_constant replace254_0_0_0_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+
+static const nir_search_variable replace254_0_0_0_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace254_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace254_0_0_0_0_1_0.value, &replace254_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace254_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace254_0_0_0_0_0.value, &replace254_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace254_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x40dfffc000000000 /* 32767.0 */ },
+};
+static const nir_search_expression replace254_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace254_0_0_0_0.value, &replace254_0_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace254_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fround_even,
+ { &replace254_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace254_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2i32,
+ { &replace254_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace254 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_uvec2_to_uint,
+ { &replace254_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_pack_snorm_2x16_xforms[] = {
+ { &search254, &replace254.value, 31 },
+};
+
+static const nir_search_variable search157_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search157_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search157 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &search157_0.value, &search157_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace157_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace157_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &replace157_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace157_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace157_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace157_0_0.value, &replace157_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace157 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace157_0.value },
+ NULL,
+};
+
+static const nir_search_variable search160_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search160_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search160 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search160_0.value, &search160_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace160 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search161_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search161_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x4000000000000000 /* 2.0 */ },
+};
+static const nir_search_expression search161 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search161_0.value, &search161_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace161_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace161_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace161 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace161_0.value, &replace161_1.value },
+ NULL,
+};
+
+static const nir_search_variable search162_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search162_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x4010000000000000 /* 4.0 */ },
+};
+static const nir_search_expression search162 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search162_0.value, &search162_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace162_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace162_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace162_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace162_0_0.value, &replace162_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace162_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace162_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace162_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace162_1_0.value, &replace162_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace162 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace162_0.value, &replace162_1.value },
+ NULL,
+};
+
+static const nir_search_constant search163_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x4000000000000000 /* 2.0 */ },
+};
+
+static const nir_search_variable search163_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search163 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search163_0.value, &search163_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace163_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace163 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace163_0.value },
+ NULL,
+};
+
+static const nir_search_variable search164_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search164_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x400199999999999a /* 2.2 */ },
+};
+static const nir_search_expression search164_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &search164_0_0.value, &search164_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search164_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fdd1743e963dc48 /* 0.454545 */ },
+};
+static const nir_search_expression search164 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search164_0.value, &search164_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace164 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search165_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search165_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x400199999999999a /* 2.2 */ },
+};
+static const nir_search_expression search165_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &search165_0_0_0.value, &search165_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression search165_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search165_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search165_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fdd1743e963dc48 /* 0.454545 */ },
+};
+static const nir_search_expression search165 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fpow,
+ { &search165_0.value, &search165_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace165_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace165 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace165_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fpow_xforms[] = {
+ { &search157, &replace157.value, 12 },
+ { &search160, &replace160.value, 0 },
+ { &search161, &replace161.value, 0 },
+ { &search162, &replace162.value, 0 },
+ { &search163, &replace163.value, 0 },
+ { &search164, &replace164.value, 0 },
+ { &search165, &replace165.value, 0 },
+};
+
+static const nir_search_variable search129_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search129_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search129 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search129_0.value, &search129_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace129 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search279_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search279_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search279_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search279_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search279_0_0.value, &search279_0_1.value, &search279_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search279_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search279 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search279_0.value, &search279_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace279_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace279_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace279_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace279_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &replace279_1_0.value, &replace279_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace279_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace279_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace279_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &replace279_2_0.value, &replace279_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace279 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace279_0.value, &replace279_1.value, &replace279_2.value },
+ NULL,
+};
+
+static const nir_search_variable search280_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search280_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search280_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search280_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search280_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search280_1_0.value, &search280_1_1.value, &search280_1_2.value },
+ NULL,
+};
+static const nir_search_expression search280 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search280_0.value, &search280_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace280_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace280_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace280_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace280_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &replace280_1_0.value, &replace280_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace280_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace280_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace280_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &replace280_2_0.value, &replace280_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace280 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace280_0.value, &replace280_1.value, &replace280_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ige_xforms[] = {
+ { &search129, &replace129.value, 0 },
+ { &search279, &replace279.value, 0 },
+ { &search280, &replace280.value, 0 },
+};
+
+static const nir_search_constant search174_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search174_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search174 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fdiv,
+ { &search174_0.value, &search174_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace174_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace174 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frcp,
+ { &replace174_0.value },
+ NULL,
+};
+
+static const nir_search_variable search175_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search175_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search175 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &search175_0.value, &search175_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace175_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace175_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace175_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frcp,
+ { &replace175_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace175 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace175_0.value, &replace175_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fdiv_xforms[] = {
+ { &search174, &replace174.value, 0 },
+ { &search175, &replace175.value, 14 },
+};
+
+static const nir_search_variable search50_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search50 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffract,
+ { &search50_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace50_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace50_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace50_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffloor,
+ { &replace50_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace50 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace50_0.value, &replace50_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ffract_xforms[] = {
+ { &search50, &replace50.value, 4 },
+};
+
+static const nir_search_variable search17_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search17_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search17 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search17_0.value, &search17_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace17 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search21_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search21_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search21_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search21_0_0.value, &search21_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search21_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search21_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search21_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search21_1_0.value, &search21_1_1.value },
+ NULL,
+};
+static const nir_search_expression search21 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search21_0.value, &search21_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace21_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace21_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace21_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace21_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace21_1_0.value, &replace21_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace21 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace21_0.value, &replace21_1.value },
+ NULL,
+};
+
+static const nir_search_variable search23_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search23_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search23_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search23_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search23 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search23_0.value, &search23_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace23 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search27_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search27_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search27_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search27_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search27_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search27_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search27_1_0.value, &search27_1_1.value },
+ NULL,
+};
+static const nir_search_expression search27 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search27_0.value, &search27_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace27 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search28_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search28_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search28_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search28_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search28_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search28_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search28_1_0.value, &search28_1_1.value },
+ NULL,
+};
+static const nir_search_expression search28 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search28_0.value, &search28_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace28 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search51_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search51_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search51_0_1_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search51_0_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search51_0_1_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression search51_0_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search51_0_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search51_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search51_0_1_0.value, &search51_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search51_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search51_0_0.value, &search51_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search51_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search51_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search51_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search51_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search51_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search51_1_0.value, &search51_1_1.value },
+ NULL,
+};
+static const nir_search_expression search51 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search51_0.value, &search51_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace51_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace51_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace51_2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace51 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace51_0.value, &replace51_1.value, &replace51_2.value },
+ NULL,
+};
+
+static const nir_search_variable search52_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search52_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search52_0_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search52_0_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search52_0_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search52_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search52_0_1_0.value, &search52_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search52_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search52_0_0.value, &search52_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search52_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search52_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search52_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search52_1_0.value, &search52_1_1.value },
+ NULL,
+};
+static const nir_search_expression search52 = {
+ { nir_search_value_expression, 32 },
+ true,
+ nir_op_fadd,
+ { &search52_0.value, &search52_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace52_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace52_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace52_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace52 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flrp,
+ { &replace52_0.value, &replace52_1.value, &replace52_2.value },
+ NULL,
+};
+
+static const nir_search_variable search53_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search53_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_variable search53_0_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search53_0_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search53_0_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search53_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search53_0_1_0.value, &search53_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search53_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search53_0_0.value, &search53_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search53_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search53_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search53_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search53_1_0.value, &search53_1_1.value },
+ NULL,
+};
+static const nir_search_expression search53 = {
+ { nir_search_value_expression, 64 },
+ true,
+ nir_op_fadd,
+ { &search53_0.value, &search53_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace53_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace53_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace53_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace53 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flrp,
+ { &replace53_0.value, &replace53_1.value, &replace53_2.value },
+ NULL,
+};
+
+static const nir_search_variable search54_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search54_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search54_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search54_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search54_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search54_1_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search54_1_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search54_1_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search54_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search54_1_1_0.value, &search54_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression search54_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search54_1_0.value, &search54_1_1.value },
+ NULL,
+};
+static const nir_search_expression search54 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search54_0.value, &search54_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace54_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace54_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace54_2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace54 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace54_0.value, &replace54_1.value, &replace54_2.value },
+ NULL,
+};
+
+static const nir_search_variable search55_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search55_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search55_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search55_1_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search55_1_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search55_1_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search55_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search55_1_1_0.value, &search55_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression search55_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search55_1_0.value, &search55_1_1.value },
+ NULL,
+};
+static const nir_search_expression search55 = {
+ { nir_search_value_expression, 32 },
+ true,
+ nir_op_fadd,
+ { &search55_0.value, &search55_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace55_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace55_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace55_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace55 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flrp,
+ { &replace55_0.value, &replace55_1.value, &replace55_2.value },
+ NULL,
+};
+
+static const nir_search_variable search56_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search56_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search56_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search56_1_1_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search56_1_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search56_1_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression search56_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search56_1_1_0.value, &search56_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression search56_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search56_1_0.value, &search56_1_1.value },
+ NULL,
+};
+static const nir_search_expression search56 = {
+ { nir_search_value_expression, 64 },
+ true,
+ nir_op_fadd,
+ { &search56_0.value, &search56_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace56_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace56_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace56_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace56 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flrp,
+ { &replace56_0.value, &replace56_1.value, &replace56_2.value },
+ NULL,
+};
+
+static const nir_search_variable search58_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search58_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search58_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search58_0_0.value, &search58_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search58_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search58 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search58_0.value, &search58_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace58_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace58_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace58_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace58 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffma,
+ { &replace58_0.value, &replace58_1.value, &replace58_2.value },
+ NULL,
+};
+
+static const nir_search_variable search219_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search219_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search219_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search219_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &search219_1_0.value, &search219_1_1.value },
+ NULL,
+};
+static const nir_search_expression search219 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search219_0.value, &search219_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace219_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace219_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace219 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace219_0.value, &replace219_1.value },
+ NULL,
+};
+
+static const nir_search_variable search227_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search227_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search227_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search227_0_0.value, &search227_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search227_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search227 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search227_0.value, &search227_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace227_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace227_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace227_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace227_0_0.value, &replace227_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace227_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace227 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace227_0.value, &replace227_1.value },
+ NULL,
+};
+
+static const nir_search_variable search231_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search231_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search231_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search231_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search231_1_0.value, &search231_1_1.value },
+ NULL,
+};
+static const nir_search_expression search231 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search231_0.value, &search231_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace231_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace231_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace231_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace231_0_0.value, &replace231_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace231_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace231 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace231_0.value, &replace231_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fadd_xforms[] = {
+ { &search17, &replace17.value, 0 },
+ { &search21, &replace21.value, 0 },
+ { &search23, &replace23.value, 0 },
+ { &search27, &replace27.value, 0 },
+ { &search28, &replace28.value, 0 },
+ { &search51, &replace51.value, 2 },
+ { &search52, &replace52.value, 5 },
+ { &search53, &replace53.value, 6 },
+ { &search54, &replace54.value, 2 },
+ { &search55, &replace55.value, 5 },
+ { &search56, &replace56.value, 6 },
+ { &search58, &replace58.value, 8 },
+ { &search219, &replace219.value, 0 },
+ { &search227, &replace227.value, 0 },
+ { &search231, &replace231.value, 0 },
+};
+
+static const nir_search_variable search59_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search59_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search59_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search59_0_0_0.value, &search59_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search59_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search59_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search59_0_0.value, &search59_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search59_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search59 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search59_0.value, &search59_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace59_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace59_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace59_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace59_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace59_0_1_0.value, &replace59_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace59_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace59_0_0.value, &replace59_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace59_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace59_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace59_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace59_1_0.value, &replace59_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace59 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace59_0.value, &replace59_1.value },
+ NULL,
+};
+
+static const nir_search_variable search60_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search60_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search60_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search60_0_0.value, &search60_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search60_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search60 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search60_0.value, &search60_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace60_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace60_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace60_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace60_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace60_1_0.value, &replace60_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace60 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace60_0.value, &replace60_1.value },
+ NULL,
+};
+
+static const nir_search_constant search147_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search147_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search147 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search147_0.value, &search147_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace147 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search148_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search148_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search148 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search148_0.value, &search148_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace148 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ishl_xforms[] = {
+ { &search59, &replace59.value, 0 },
+ { &search60, &replace60.value, 0 },
+ { &search147, &replace147.value, 0 },
+ { &search148, &replace148.value, 0 },
+};
+
+static const nir_search_variable search197_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search197_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ftrunc,
+ { &search197_0_0.value },
+ NULL,
+};
+static const nir_search_expression search197 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2u32,
+ { &search197_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace197_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace197 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2u32,
+ { &replace197_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_f2u32_xforms[] = {
+ { &search197, &replace197.value, 0 },
+};
+
+static const nir_search_variable search156_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search156_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search156_0_0.value },
+ NULL,
+};
+static const nir_search_expression search156 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flog2,
+ { &search156_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace156 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search169_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search169_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsqrt,
+ { &search169_0_0.value },
+ NULL,
+};
+static const nir_search_expression search169 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flog2,
+ { &search169_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace169_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3fe0000000000000 /* 0.5 */ },
+};
+
+static const nir_search_variable replace169_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace169_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &replace169_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace169 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace169_0.value, &replace169_1.value },
+ NULL,
+};
+
+static const nir_search_variable search170_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search170_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frcp,
+ { &search170_0_0.value },
+ NULL,
+};
+static const nir_search_expression search170 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flog2,
+ { &search170_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace170_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace170_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &replace170_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace170 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace170_0.value },
+ NULL,
+};
+
+static const nir_search_variable search171_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search171_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frsq,
+ { &search171_0_0.value },
+ NULL,
+};
+static const nir_search_expression search171 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flog2,
+ { &search171_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace171_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbfe0000000000000L /* -0.5 */ },
+};
+
+static const nir_search_variable replace171_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace171_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &replace171_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace171 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace171_0.value, &replace171_1.value },
+ NULL,
+};
+
+static const nir_search_variable search172_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search172_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search172_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &search172_0_0.value, &search172_0_1.value },
+ NULL,
+};
+static const nir_search_expression search172 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flog2,
+ { &search172_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace172_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace172_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace172_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &replace172_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace172 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace172_0.value, &replace172_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_flog2_xforms[] = {
+ { &search156, &replace156.value, 0 },
+ { &search169, &replace169.value, 0 },
+ { &search170, &replace170.value, 0 },
+ { &search171, &replace171.value, 0 },
+ { &search172, &replace172.value, 0 },
+};
+
+static const nir_search_variable search61_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search61_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search61_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search61_0_0.value, &search61_0_1.value },
+ NULL,
+};
+static const nir_search_expression search61 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_inot,
+ { &search61_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace61_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace61_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace61 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace61_0.value, &replace61_1.value },
+ NULL,
+};
+
+static const nir_search_variable search62_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search62_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search62_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search62_0_0.value, &search62_0_1.value },
+ NULL,
+};
+static const nir_search_expression search62 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_inot,
+ { &search62_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace62_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace62_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace62 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace62_0.value, &replace62_1.value },
+ NULL,
+};
+
+static const nir_search_variable search63_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search63_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search63_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search63_0_0.value, &search63_0_1.value },
+ NULL,
+};
+static const nir_search_expression search63 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_inot,
+ { &search63_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace63_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace63_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace63 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace63_0.value, &replace63_1.value },
+ NULL,
+};
+
+static const nir_search_variable search64_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search64_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search64_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &search64_0_0.value, &search64_0_1.value },
+ NULL,
+};
+static const nir_search_expression search64 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_inot,
+ { &search64_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace64_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace64_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace64 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace64_0.value, &replace64_1.value },
+ NULL,
+};
+
+static const nir_search_variable search65_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search65_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search65_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &search65_0_0.value, &search65_0_1.value },
+ NULL,
+};
+static const nir_search_expression search65 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search65_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace65_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace65_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace65 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &replace65_0.value, &replace65_1.value },
+ NULL,
+};
+
+static const nir_search_variable search66_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search66_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search66_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ige,
+ { &search66_0_0.value, &search66_0_1.value },
+ NULL,
+};
+static const nir_search_expression search66 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search66_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace66_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace66_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace66 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace66_0.value, &replace66_1.value },
+ NULL,
+};
+
+static const nir_search_variable search67_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search67_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search67_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &search67_0_0.value, &search67_0_1.value },
+ NULL,
+};
+static const nir_search_expression search67 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search67_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace67_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace67_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace67 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace67_0.value, &replace67_1.value },
+ NULL,
+};
+
+static const nir_search_variable search68_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search68_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search68_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search68_0_0.value, &search68_0_1.value },
+ NULL,
+};
+static const nir_search_expression search68 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search68_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace68_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace68_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace68 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ieq,
+ { &replace68_0.value, &replace68_1.value },
+ NULL,
+};
+
+static const nir_search_variable search144_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search144_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search144_0_0.value },
+ NULL,
+};
+static const nir_search_expression search144 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search144_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace144 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_inot_xforms[] = {
+ { &search61, &replace61.value, 0 },
+ { &search62, &replace62.value, 0 },
+ { &search63, &replace63.value, 0 },
+ { &search64, &replace64.value, 0 },
+ { &search65, &replace65.value, 0 },
+ { &search66, &replace66.value, 0 },
+ { &search67, &replace67.value, 0 },
+ { &search68, &replace68.value, 0 },
+ { &search144, &replace144.value, 0 },
+};
+
+static const nir_search_variable search118_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search118_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search118 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_sne,
+ { &search118_0.value, &search118_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace118_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace118_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace118_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace118_0_0.value, &replace118_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace118 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace118_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_sne_xforms[] = {
+ { &search118, &replace118.value, 11 },
+};
+
+static const nir_search_variable search240_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search240_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search240 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_fmod,
+ { &search240_0.value, &search240_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace240_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace240_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace240_1_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace240_1_1_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace240_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace240_1_1_0_0.value, &replace240_1_1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace240_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffloor,
+ { &replace240_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace240_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace240_1_0.value, &replace240_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace240 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace240_0.value, &replace240_1.value },
+ NULL,
+};
+
+static const nir_search_variable search241_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search241_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search241 = {
+ { nir_search_value_expression, 64 },
+ false,
+ nir_op_fmod,
+ { &search241_0.value, &search241_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace241_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace241_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace241_1_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace241_1_1_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace241_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace241_1_1_0_0.value, &replace241_1_1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace241_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ffloor,
+ { &replace241_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace241_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace241_1_0.value, &replace241_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace241 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace241_0.value, &replace241_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fmod_xforms[] = {
+ { &search240, &replace240.value, 21 },
+ { &search241, &replace241.value, 22 },
+};
+
+static const nir_search_variable search204_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search204_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_64_2x32_split_x,
+ { &search204_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search204_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search204_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_64_2x32_split_y,
+ { &search204_1_0.value },
+ NULL,
+};
+static const nir_search_expression search204 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_64_2x32_split,
+ { &search204_0.value, &search204_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace204 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_pack_64_2x32_split_xforms[] = {
+ { &search204, &replace204.value, 0 },
+};
+
+static const nir_search_variable search194_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search194_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search194_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search194 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fcsel,
+ { &search194_0.value, &search194_1.value, &search194_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace194 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fcsel_xforms[] = {
+ { &search194, &replace194.value, 0 },
+};
+
+static const nir_search_variable search212_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search212_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search212_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search212_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &search212_1_0.value, &search212_1_1.value },
+ NULL,
+};
+static const nir_search_expression search212 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &search212_0.value, &search212_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace212_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace212_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace212 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace212_0.value, &replace212_1.value },
+ NULL,
+};
+
+static const nir_search_variable search216_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search216_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search216 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &search216_0.value, &search216_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace216_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace216_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace216_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &replace216_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace216 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace216_0.value, &replace216_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_isub_xforms[] = {
+ { &search212, &replace212.value, 0 },
+ { &search216, &replace216.value, 19 },
+};
+
+static const nir_search_variable search80_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search80_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search80 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search80_0.value, &search80_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace80 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search91_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search91_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search91_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search91_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression search91_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search91_1_0.value },
+ NULL,
+};
+static const nir_search_expression search91 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search91_0.value, &search91_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace91 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search93_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search93_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search93_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search93_1_0.value },
+ NULL,
+};
+static const nir_search_expression search93 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search93_0.value, &search93_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace93_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace93 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace93_0.value },
+ NULL,
+};
+
+static const nir_search_variable search95_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search95_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search95_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search95_1_0.value },
+ NULL,
+};
+static const nir_search_expression search95 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search95_0.value, &search95_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace95_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace95 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace95_0.value },
+ NULL,
+};
+
+static const nir_search_variable search98_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search98_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search98_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search98_0_0.value, &search98_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search98_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search98 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmax,
+ { &search98_0.value, &search98_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace98_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace98 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace98_0.value },
+ NULL,
+};
+
+static const nir_search_variable search104_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search104_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search104_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search104_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_zero_to_one),
+};
+static const nir_search_expression search104 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search104_0.value, &search104_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace104_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace104_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace104_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace104_0_0.value, &replace104_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace104 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace104_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fmax_xforms[] = {
+ { &search80, &replace80.value, 0 },
+ { &search91, &replace91.value, 0 },
+ { &search93, &replace93.value, 0 },
+ { &search95, &replace95.value, 0 },
+ { &search98, &replace98.value, 9 },
+ { &search104, &replace104.value, 0 },
+};
+
+static const nir_search_variable search31_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search31_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search31 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umul_unorm_4x8,
+ { &search31_0.value, &search31_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace31 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search32_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search32_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search32 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_umul_unorm_4x8,
+ { &search32_0.value, &search32_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace32 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_umul_unorm_4x8_xforms[] = {
+ { &search31, &replace31.value, 0 },
+ { &search32, &replace32.value, 0 },
+};
+
+static const nir_search_variable search245_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* base */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search245_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* insert */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search245_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search245_3 = {
+ { nir_search_value_variable, 0 },
+ 3, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search245 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bitfield_insert,
+ { &search245_0.value, &search245_1.value, &search245_2.value, &search245_3.value },
+ NULL,
+};
+
+static const nir_search_constant replace245_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1f /* 31 */ },
+};
+
+static const nir_search_variable replace245_0_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace245_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace245_0_0.value, &replace245_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace245_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* insert */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace245_2_0_0 = {
+ { nir_search_value_variable, 0 },
+ 3, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace245_2_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace245_2_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bfm,
+ { &replace245_2_0_0.value, &replace245_2_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace245_2_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* insert */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace245_2_2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* base */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace245_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bfi,
+ { &replace245_2_0.value, &replace245_2_1.value, &replace245_2_2.value },
+ NULL,
+};
+static const nir_search_expression replace245 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace245_0.value, &replace245_1.value, &replace245_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_bitfield_insert_xforms[] = {
+ { &search245, &replace245.value, 25 },
+};
+
+static const nir_search_variable search120_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search120_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search120_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search120_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search120 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search120_0.value, &search120_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace120_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace120_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression replace120 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace120_0.value, &replace120_1.value },
+ NULL,
+};
+
+static const nir_search_variable search273_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search273_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search273_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search273_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search273_0_0.value, &search273_0_1.value, &search273_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search273_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search273 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search273_0.value, &search273_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace273_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace273_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace273_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace273_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace273_1_0.value, &replace273_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace273_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace273_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace273_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace273_2_0.value, &replace273_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace273 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace273_0.value, &replace273_1.value, &replace273_2.value },
+ NULL,
+};
+
+static const nir_search_variable search274_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search274_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search274_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search274_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search274_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search274_1_0.value, &search274_1_1.value, &search274_1_2.value },
+ NULL,
+};
+static const nir_search_expression search274 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &search274_0.value, &search274_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace274_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace274_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace274_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace274_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace274_1_0.value, &replace274_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace274_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace274_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace274_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace274_2_0.value, &replace274_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace274 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace274_0.value, &replace274_1.value, &replace274_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_feq_xforms[] = {
+ { &search120, &replace120.value, 0 },
+ { &search273, &replace273.value, 0 },
+ { &search274, &replace274.value, 0 },
+};
+
+static const nir_search_variable search42_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search42_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search42_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search42 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search42_0.value, &search42_1.value, &search42_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace42 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search43_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search43_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search43_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search43 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search43_0.value, &search43_1.value, &search43_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace43 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search44_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search44_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search44_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search44 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search44_0.value, &search44_1.value, &search44_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace44 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search45_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search45_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search45_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search45 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search45_0.value, &search45_1.value, &search45_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace45_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace45_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace45 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace45_0.value, &replace45_1.value },
+ NULL,
+};
+
+static const nir_search_variable search46_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search46_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search46_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search46_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search46_2_0.value },
+ NULL,
+};
+static const nir_search_expression search46 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search46_0.value, &search46_1.value, &search46_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace46_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace46_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace46_2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace46 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace46_0.value, &replace46_1.value, &replace46_2.value },
+ NULL,
+};
+
+static const nir_search_variable search47_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search47_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search47_2 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search47 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_flrp,
+ { &search47_0.value, &search47_1.value, &search47_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace47_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace47_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace47_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace47_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace47_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace47_0_0.value, &replace47_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace47_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace47 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace47_0.value, &replace47_1.value },
+ NULL,
+};
+
+static const nir_search_variable search48_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search48_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search48_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search48 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_flrp,
+ { &search48_0.value, &search48_1.value, &search48_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace48_0_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace48_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace48_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace48_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace48_0_1_0.value, &replace48_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace48_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace48_0_0.value, &replace48_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace48_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace48 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace48_0.value, &replace48_1.value },
+ NULL,
+};
+
+static const nir_search_variable search49_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search49_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search49_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search49 = {
+ { nir_search_value_expression, 64 },
+ false,
+ nir_op_flrp,
+ { &search49_0.value, &search49_1.value, &search49_2.value },
+ NULL,
+};
+
+static const nir_search_variable replace49_0_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace49_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace49_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace49_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace49_0_1_0.value, &replace49_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace49_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace49_0_0.value, &replace49_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace49_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace49 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace49_0.value, &replace49_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_flrp_xforms[] = {
+ { &search42, &replace42.value, 0 },
+ { &search43, &replace43.value, 0 },
+ { &search44, &replace44.value, 0 },
+ { &search45, &replace45.value, 0 },
+ { &search46, &replace46.value, 2 },
+ { &search47, &replace47.value, 0 },
+ { &search48, &replace48.value, 2 },
+ { &search49, &replace49.value, 3 },
+};
+
+static const nir_search_variable search107_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search107_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search107_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search107_0_0.value, &search107_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search107_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search107_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search107_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search107_1_0.value, &search107_1_1.value },
+ NULL,
+};
+static const nir_search_expression search107 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ior,
+ { &search107_0.value, &search107_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace107_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace107_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace107_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace107_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace107_1_0.value, &replace107_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace107 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace107_0.value, &replace107_1.value },
+ NULL,
+};
+
+static const nir_search_variable search108_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search108_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search108_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search108_0_0.value, &search108_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search108_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search108_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search108_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search108_1_0.value, &search108_1_1.value },
+ NULL,
+};
+static const nir_search_expression search108 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ior,
+ { &search108_0.value, &search108_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace108_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace108_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace108_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace108_0_0.value, &replace108_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace108_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace108 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace108_0.value, &replace108_1.value },
+ NULL,
+};
+
+static const nir_search_variable search109_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search109_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search109_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search109_0_0.value, &search109_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search109_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search109_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search109_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search109_1_0.value, &search109_1_1.value },
+ NULL,
+};
+static const nir_search_expression search109 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ior,
+ { &search109_0.value, &search109_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace109_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace109_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace109_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace109_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace109_1_0.value, &replace109_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace109 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace109_0.value, &replace109_1.value },
+ NULL,
+};
+
+static const nir_search_variable search110_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search110_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search110_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search110_0_0.value, &search110_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search110_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search110_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search110_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search110_1_0.value, &search110_1_1.value },
+ NULL,
+};
+static const nir_search_expression search110 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_ior,
+ { &search110_0.value, &search110_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace110_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace110_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace110_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace110_0_0.value, &replace110_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace110_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace110 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace110_0.value, &replace110_1.value },
+ NULL,
+};
+
+static const nir_search_variable search138_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search138_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search138 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search138_0.value, &search138_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace138 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search139_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search139_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search139 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search139_0.value, &search139_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace139 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search140_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search140_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+static const nir_search_expression search140 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search140_0.value, &search140_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace140 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+
+static const nir_search_variable search146_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search146_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search146_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search146_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search146_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search146_1_0.value },
+ NULL,
+};
+static const nir_search_expression search146 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search146_0.value, &search146_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace146_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace146_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace146_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace146_0_0.value, &replace146_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace146 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace146_0.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search262_0_0_0_0_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search262_0_0_0_0_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_0_0_0_1_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_0_0_0_1_0_0.value, &search262_0_0_0_0_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_0_0_0_1_0.value, &search262_0_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f /* 252645135 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search262_0_0_0_0_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_1_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_1_0_0_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_1_0_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_0_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search262_0_0_0_0_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_1_0_0_1_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_1_0_0_1_0_0.value, &search262_0_0_0_0_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_1_0_0_1_0.value, &search262_0_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_1_0_0_0.value, &search262_0_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0_1_0_0.value, &search262_0_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_0_0_0_1_0.value, &search262_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0_0_0_0.value, &search262_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x33333333 /* 858993459 */ },
+};
+static const nir_search_expression search262_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_0_0_0.value, &search262_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression search262_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_0_0.value, &search262_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search262_0_0_0_1_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_0_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search262_0_0_0_1_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_0_0_0_1_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_0_0_0_1_0_0.value, &search262_0_0_0_1_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_0_0_0_1_0.value, &search262_0_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f /* 252645135 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_0_0_0.value, &search262_0_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_0_0.value, &search262_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search262_0_0_0_1_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_1_0_0_0_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_1_0_0_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_1_0_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_0_0_0_1_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search262_0_0_0_1_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_1_0_0_1_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_1_0_0_1_0_0.value, &search262_0_0_0_1_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_1_0_0_1_0.value, &search262_0_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_1_0_0_0.value, &search262_0_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0_1_0_0.value, &search262_0_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0_0_1_0.value, &search262_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_1_0_0_0.value, &search262_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xcccccccc /* 3435973836 */ },
+};
+static const nir_search_expression search262_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0_1_0_0.value, &search262_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression search262_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_0_0_0_1_0.value, &search262_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0_0_0_0.value, &search262_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x55555555 /* 1431655765 */ },
+};
+static const nir_search_expression search262_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_0_0_0.value, &search262_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search262_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_0_0.value, &search262_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_0_0_0_0_0_0_1_0.value, &search262_1_0_0_0_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_0_0_0_1_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_0_0_0_1_0_0_1_0.value, &search262_1_0_0_0_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_0_0_0_1_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_0_0_0_1_0_0.value, &search262_1_0_0_0_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_0_0_0_1_0.value, &search262_1_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f /* 252645135 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_1_0_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_1_0_0_0_0_0_1_0.value, &search262_1_0_0_0_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_1_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_1_0_0_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_1_0_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0_0_1_0_0_1_0_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_0_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_1_0_0_1_0_0_1_0.value, &search262_1_0_0_0_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_1_0_0_1_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_1_0_0_1_0_0.value, &search262_1_0_0_0_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_1_0_0_1_0.value, &search262_1_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_1_0_0_0.value, &search262_1_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0_1_0_0.value, &search262_1_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_0_0_0_1_0.value, &search262_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0_0_0_0.value, &search262_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x33333333 /* 858993459 */ },
+};
+static const nir_search_expression search262_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_0_0_0.value, &search262_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression search262_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_0_0.value, &search262_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_0_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_0_0_0_0_0_0_1_0.value, &search262_1_0_0_1_0_0_0_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_0_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_0_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_0_0_0_1_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_0_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_0_0_0_1_0_0_1_0.value, &search262_1_0_0_1_0_0_0_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_0_0_0_1_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_0_0_0_1_0_0.value, &search262_1_0_0_1_0_0_0_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_0_0_0_1_0.value, &search262_1_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f /* 252645135 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_0_0_0.value, &search262_1_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_0_0.value, &search262_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_1_0_0_0_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_1_0_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_1_0_0_0_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_0_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_0_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_1_0_0_0_0_0_1_0.value, &search262_1_0_0_1_0_0_1_0_0_0_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_1_0_0_0_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff /* 16711935 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_1_0_0_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_1_0_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_1_0_0_1_0_0_0_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &search262_1_0_0_1_0_0_1_0_0_1_0_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search262_1_0_0_1_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_1_0_0_1_0_0_1_0.value, &search262_1_0_0_1_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_1_0_0_1_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xff00ff00 /* 4278255360 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_1_0_0_1_0_0.value, &search262_1_0_0_1_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_1_0_0_1_0.value, &search262_1_0_0_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_1_0_0_0.value, &search262_1_0_0_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xf0f0f0f0 /* 4042322160 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0_1_0_0.value, &search262_1_0_0_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x4 /* 4 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0_0_1_0.value, &search262_1_0_0_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_1_0_0_0.value, &search262_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xcccccccc /* 3435973836 */ },
+};
+static const nir_search_expression search262_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0_1_0_0.value, &search262_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression search262_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0_0_1_0.value, &search262_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_1_0_0_0.value, &search262_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xaaaaaaaa /* 2863311530 */ },
+};
+static const nir_search_expression search262_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &search262_1_0_0.value, &search262_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search262_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search262_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search262_1_0.value, &search262_1_1.value },
+ NULL,
+};
+static const nir_search_expression search262 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &search262_0.value, &search262_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace262_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace262 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bitfield_reverse,
+ { &replace262_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ior_xforms[] = {
+ { &search107, &replace107.value, 0 },
+ { &search108, &replace108.value, 0 },
+ { &search109, &replace109.value, 0 },
+ { &search110, &replace110.value, 0 },
+ { &search138, &replace138.value, 0 },
+ { &search139, &replace139.value, 0 },
+ { &search140, &replace140.value, 0 },
+ { &search146, &replace146.value, 0 },
+ { &search262, &replace262.value, 0 },
+};
+
+static const nir_search_variable search213_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search213_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search213 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ussub_4x8,
+ { &search213_0.value, &search213_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace213 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search214_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search214_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x1 /* -1 */ },
+};
+static const nir_search_expression search214 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ussub_4x8,
+ { &search214_0.value, &search214_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace214 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const struct transform nir_opt_algebraic_ussub_4x8_xforms[] = {
+ { &search213, &replace213.value, 0 },
+ { &search214, &replace214.value, 0 },
+};
+
+static const nir_search_variable search259_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search259 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_snorm_4x8,
+ { &search259_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace259_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_constant replace259_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+
+static const nir_search_variable replace259_1_1_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace259_1_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace259_1_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i8,
+ { &replace259_1_1_0_0_0_0.value, &replace259_1_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace259_1_1_0_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace259_1_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace259_1_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i8,
+ { &replace259_1_1_0_0_1_0.value, &replace259_1_1_0_0_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace259_1_1_0_0_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace259_1_1_0_0_2_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression replace259_1_1_0_0_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i8,
+ { &replace259_1_1_0_0_2_0.value, &replace259_1_1_0_0_2_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace259_1_1_0_0_3_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace259_1_1_0_0_3_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3 /* 3 */ },
+};
+static const nir_search_expression replace259_1_1_0_0_3 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i8,
+ { &replace259_1_1_0_0_3_0.value, &replace259_1_1_0_0_3_1.value },
+ NULL,
+};
+static const nir_search_expression replace259_1_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_vec4,
+ { &replace259_1_1_0_0_0.value, &replace259_1_1_0_0_1.value, &replace259_1_1_0_0_2.value, &replace259_1_1_0_0_3.value },
+ NULL,
+};
+static const nir_search_expression replace259_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2f32,
+ { &replace259_1_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace259_1_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x405fc00000000000 /* 127.0 */ },
+};
+static const nir_search_expression replace259_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace259_1_1_0.value, &replace259_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace259_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace259_1_0.value, &replace259_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace259 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace259_0.value, &replace259_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_snorm_4x8_xforms[] = {
+ { &search259, &replace259.value, 36 },
+};
+
+static const nir_search_variable search242_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search242_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search242 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frem,
+ { &search242_0.value, &search242_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace242_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace242_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace242_1_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace242_1_1_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace242_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace242_1_1_0_0.value, &replace242_1_1_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace242_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ftrunc,
+ { &replace242_1_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace242_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace242_1_0.value, &replace242_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace242 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace242_0.value, &replace242_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_frem_xforms[] = {
+ { &search242, &replace242.value, 21 },
+};
+
+static const nir_search_variable search203_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search203_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search203_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_64_2x32_split,
+ { &search203_0_0.value, &search203_0_1.value },
+ NULL,
+};
+static const nir_search_expression search203 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_64_2x32_split_y,
+ { &search203_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace203 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_64_2x32_split_y_xforms[] = {
+ { &search203, &replace203.value, 0 },
+};
+
+static const nir_search_variable search256_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search256 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_unorm_2x16,
+ { &search256_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace256_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace256_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace256_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u16,
+ { &replace256_0_0_0_0.value, &replace256_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace256_0_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace256_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace256_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u16,
+ { &replace256_0_0_1_0.value, &replace256_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace256_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_vec2,
+ { &replace256_0_0_0.value, &replace256_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace256_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_u2f32,
+ { &replace256_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace256_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x40efffe000000000 /* 65535.0 */ },
+};
+static const nir_search_expression replace256 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace256_0.value, &replace256_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_unorm_2x16_xforms[] = {
+ { &search256, &replace256.value, 33 },
+};
+
+static const nir_search_variable search258_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search258 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_snorm_2x16,
+ { &search258_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace258_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+
+static const nir_search_constant replace258_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+
+static const nir_search_variable replace258_1_1_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace258_1_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace258_1_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i16,
+ { &replace258_1_1_0_0_0_0.value, &replace258_1_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace258_1_1_0_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace258_1_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace258_1_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i16,
+ { &replace258_1_1_0_0_1_0.value, &replace258_1_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace258_1_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_vec2,
+ { &replace258_1_1_0_0_0.value, &replace258_1_1_0_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace258_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_i2f32,
+ { &replace258_1_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace258_1_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x40dfffc000000000 /* 32767.0 */ },
+};
+static const nir_search_expression replace258_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace258_1_1_0.value, &replace258_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace258_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace258_1_0.value, &replace258_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace258 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace258_0.value, &replace258_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_snorm_2x16_xforms[] = {
+ { &search258, &replace258.value, 35 },
+};
+
+static const nir_search_variable search82_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search82_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search82 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search82_0.value, &search82_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace82 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search92_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search92_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search92_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search92_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression search92_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search92_1_0.value },
+ NULL,
+};
+static const nir_search_expression search92 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search92_0.value, &search92_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace92 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search94_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search94_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search94_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search94_1_0.value },
+ NULL,
+};
+static const nir_search_expression search94 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search94_0.value, &search94_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace94_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace94 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace94_0.value },
+ NULL,
+};
+
+static const nir_search_variable search96_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search96_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search96_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search96_1_0.value },
+ NULL,
+};
+static const nir_search_expression search96 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &search96_0.value, &search96_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace96_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace96 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace96_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_imax_xforms[] = {
+ { &search82, &replace82.value, 0 },
+ { &search92, &replace92.value, 0 },
+ { &search94, &replace94.value, 0 },
+ { &search96, &replace96.value, 0 },
+};
+
+static const nir_search_variable search99_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search99 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search99_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace99_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace99_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression replace99_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace99_0_0.value, &replace99_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace99_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression replace99 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace99_0.value, &replace99_1.value },
+ NULL,
+};
+
+static const nir_search_variable search100_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search100_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search100_0_0.value },
+ NULL,
+};
+static const nir_search_expression search100 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search100_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace100_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace100 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace100_0.value },
+ NULL,
+};
+
+static const nir_search_variable search123_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search123_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search123_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search123_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search123_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search123_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression search123_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search123_0_0.value, &search123_0_1.value },
+ NULL,
+};
+static const nir_search_expression search123 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search123_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace123_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace123_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace123_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ior,
+ { &replace123_0_0.value, &replace123_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace123 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace123_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fsat_xforms[] = {
+ { &search99, &replace99.value, 10 },
+ { &search100, &replace100.value, 0 },
+ { &search123, &replace123.value, 0 },
+};
+
+static const nir_search_variable search251_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search251_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search251 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u16,
+ { &search251_0.value, &search251_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace251_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace251_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace251_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression replace251_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace251_0_1_0.value, &replace251_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace251_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace251_0_0.value, &replace251_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace251_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xffff /* 65535 */ },
+};
+static const nir_search_expression replace251 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iand,
+ { &replace251_0.value, &replace251_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_extract_u16_xforms[] = {
+ { &search251, &replace251.value, 28 },
+};
+
+static const nir_search_constant search69_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search69_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search69_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search69_1_0.value },
+ NULL,
+};
+static const nir_search_expression search69 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search69_0.value, &search69_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace69_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace69 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace69_0.value },
+ NULL,
+};
+
+static const nir_search_variable search70_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search70_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search70_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression search70_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search70_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search70_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search70 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search70_0.value, &search70_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace70_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace70 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace70_0.value },
+ NULL,
+};
+
+static const nir_search_variable search73_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search73_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search73_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression search73_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search73_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search73_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search73 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search73_0.value, &search73_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace73_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace73_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression replace73 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace73_0.value, &replace73_1.value },
+ NULL,
+};
+
+static const nir_search_variable search271_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search271_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search271_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search271_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search271_0_0.value, &search271_0_1.value, &search271_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search271_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search271 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search271_0.value, &search271_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace271_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace271_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace271_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace271_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace271_1_0.value, &replace271_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace271_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace271_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace271_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace271_2_0.value, &replace271_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace271 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace271_0.value, &replace271_1.value, &replace271_2.value },
+ NULL,
+};
+
+static const nir_search_variable search272_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search272_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search272_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search272_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search272_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search272_1_0.value, &search272_1_1.value, &search272_1_2.value },
+ NULL,
+};
+static const nir_search_expression search272 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &search272_0.value, &search272_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace272_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace272_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace272_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace272_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace272_1_0.value, &replace272_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace272_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace272_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace272_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace272_2_0.value, &replace272_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace272 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace272_0.value, &replace272_1.value, &replace272_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fge_xforms[] = {
+ { &search69, &replace69.value, 0 },
+ { &search70, &replace70.value, 0 },
+ { &search73, &replace73.value, 0 },
+ { &search271, &replace271.value, 0 },
+ { &search272, &replace272.value, 0 },
+};
+
+static const nir_search_variable search167_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search167_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &search167_0_0.value },
+ NULL,
+};
+static const nir_search_expression search167 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_frcp,
+ { &search167_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace167_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace167_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace167_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace167 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fexp2,
+ { &replace167_0.value },
+ NULL,
+};
+
+static const nir_search_variable search176_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search176_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frcp,
+ { &search176_0_0.value },
+ NULL,
+};
+static const nir_search_expression search176 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_frcp,
+ { &search176_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace176 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search177_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search177_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsqrt,
+ { &search177_0_0.value },
+ NULL,
+};
+static const nir_search_expression search177 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_frcp,
+ { &search177_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace177_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace177 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frsq,
+ { &replace177_0.value },
+ NULL,
+};
+
+static const nir_search_variable search179_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search179_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_frsq,
+ { &search179_0_0.value },
+ NULL,
+};
+static const nir_search_expression search179 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_frcp,
+ { &search179_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace179_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace179 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsqrt,
+ { &replace179_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_frcp_xforms[] = {
+ { &search167, &replace167.value, 0 },
+ { &search176, &replace176.value, 0 },
+ { &search177, &replace177.value, 0 },
+ { &search179, &replace179.value, 16 },
+};
+
+static const nir_search_variable search141_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search141_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search141 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fxor,
+ { &search141_0.value, &search141_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace141 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const struct transform nir_opt_algebraic_fxor_xforms[] = {
+ { &search141, &replace141.value, 0 },
+};
+
+static const nir_search_constant search151_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search151_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search151 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search151_0.value, &search151_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace151 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search152_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search152_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search152 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search152_0.value, &search152_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace152 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search205_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search205_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x18 /* 24 */ },
+};
+static const nir_search_expression search205 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search205_0.value, &search205_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace205_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace205_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3 /* 3 */ },
+};
+static const nir_search_expression replace205 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace205_0.value, &replace205_1.value },
+ NULL,
+};
+
+static const nir_search_variable search209_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search209_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression search209 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &search209_0.value, &search209_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace209_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace209_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace209 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u16,
+ { &replace209_0.value, &replace209_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ushr_xforms[] = {
+ { &search151, &replace151.value, 0 },
+ { &search152, &replace152.value, 0 },
+ { &search205, &replace205.value, 17 },
+ { &search209, &replace209.value, 18 },
+};
+
+static const nir_search_variable search155_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search155_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &search155_0_0.value },
+ NULL,
+};
+static const nir_search_expression search155 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fexp2,
+ { &search155_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace155 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search158_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search158_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &search158_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search158_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search158_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search158_0_0.value, &search158_0_1.value },
+ NULL,
+};
+static const nir_search_expression search158 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fexp2,
+ { &search158_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace158_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace158_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace158 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &replace158_0.value, &replace158_1.value },
+ NULL,
+};
+
+static const nir_search_variable search159_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search159_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &search159_0_0_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search159_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search159_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search159_0_0_0.value, &search159_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search159_0_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search159_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flog2,
+ { &search159_0_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search159_0_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search159_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search159_0_1_0.value, &search159_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression search159_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search159_0_0.value, &search159_0_1.value },
+ NULL,
+};
+static const nir_search_expression search159 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fexp2,
+ { &search159_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace159_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace159_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace159_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &replace159_0_0.value, &replace159_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace159_1_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace159_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace159_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fpow,
+ { &replace159_1_0.value, &replace159_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace159 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &replace159_0.value, &replace159_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fexp2_xforms[] = {
+ { &search155, &replace155.value, 0 },
+ { &search158, &replace158.value, 13 },
+ { &search159, &replace159.value, 13 },
+};
+
+static const nir_search_constant search149_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search149_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search149 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &search149_0.value, &search149_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace149 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search150_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search150_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search150 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &search150_0.value, &search150_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace150 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ishr_xforms[] = {
+ { &search149, &replace149.value, 0 },
+ { &search150, &replace150.value, 0 },
+};
+
+static const nir_search_variable search247_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search247_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search247_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search247 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ubitfield_extract,
+ { &search247_0.value, &search247_1.value, &search247_2.value },
+ NULL,
+};
+
+static const nir_search_constant replace247_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1f /* 31 */ },
+};
+
+static const nir_search_variable replace247_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace247_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace247_0_0.value, &replace247_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace247_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace247_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace247_2_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace247_2_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace247_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ubfe,
+ { &replace247_2_0.value, &replace247_2_1.value, &replace247_2_2.value },
+ NULL,
+};
+static const nir_search_expression replace247 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace247_0.value, &replace247_1.value, &replace247_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ubitfield_extract_xforms[] = {
+ { &search247, &replace247.value, 26 },
+};
+
+static const nir_search_variable search115_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search115_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search115 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_slt,
+ { &search115_0.value, &search115_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace115_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace115_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace115_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace115_0_0.value, &replace115_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace115 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &replace115_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_slt_xforms[] = {
+ { &search115, &replace115.value, 11 },
+};
+
+static const nir_search_constant search71_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search71_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search71_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search71_1_0.value },
+ NULL,
+};
+static const nir_search_expression search71 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search71_0.value, &search71_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace71_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace71_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression replace71 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace71_0.value, &replace71_1.value },
+ NULL,
+};
+
+static const nir_search_variable search72_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search72_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search72_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search72_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression search72_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search72_0_0.value, &search72_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_constant search72_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search72 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search72_0.value, &search72_1.value },
+ (is_not_used_by_conditional),
+};
+
+static const nir_search_variable replace72_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace72_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace72 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace72_0.value, &replace72_1.value },
+ NULL,
+};
+
+static const nir_search_variable search126_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search126_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search126_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression search126_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search126_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant search126_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search126 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search126_0.value, &search126_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace126 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search127_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search127_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search127_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search127_0_1_0.value },
+ NULL,
+};
+static const nir_search_expression search127_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &search127_0_0.value, &search127_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search127_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression search127 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search127_0.value, &search127_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace127 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search269_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search269_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search269_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search269_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search269_0_0.value, &search269_0_1.value, &search269_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search269_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search269 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search269_0.value, &search269_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace269_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace269_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace269_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace269_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace269_1_0.value, &replace269_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace269_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace269_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace269_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace269_2_0.value, &replace269_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace269 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace269_0.value, &replace269_1.value, &replace269_2.value },
+ NULL,
+};
+
+static const nir_search_variable search270_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search270_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search270_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search270_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search270_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search270_1_0.value, &search270_1_1.value, &search270_1_2.value },
+ NULL,
+};
+static const nir_search_expression search270 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search270_0.value, &search270_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace270_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace270_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace270_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace270_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace270_1_0.value, &replace270_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace270_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace270_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace270_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace270_2_0.value, &replace270_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace270 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace270_0.value, &replace270_1.value, &replace270_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_flt_xforms[] = {
+ { &search71, &replace71.value, 0 },
+ { &search72, &replace72.value, 0 },
+ { &search126, &replace126.value, 0 },
+ { &search127, &replace127.value, 0 },
+ { &search269, &replace269.value, 0 },
+ { &search270, &replace270.value, 0 },
+};
+
+static const nir_search_variable search132_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search132_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search132 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &search132_0.value, &search132_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace132 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+
+static const nir_search_variable search285_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search285_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search285_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search285_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search285_0_0.value, &search285_0_1.value, &search285_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search285_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search285 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &search285_0.value, &search285_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace285_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace285_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace285_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace285_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace285_1_0.value, &replace285_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace285_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace285_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace285_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace285_2_0.value, &replace285_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace285 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace285_0.value, &replace285_1.value, &replace285_2.value },
+ NULL,
+};
+
+static const nir_search_variable search286_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search286_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search286_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search286_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search286_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search286_1_0.value, &search286_1_1.value, &search286_1_2.value },
+ NULL,
+};
+static const nir_search_expression search286 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &search286_0.value, &search286_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace286_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace286_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace286_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace286_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace286_1_0.value, &replace286_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace286_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace286_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace286_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace286_2_0.value, &replace286_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace286 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace286_0.value, &replace286_1.value, &replace286_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ult_xforms[] = {
+ { &search132, &replace132.value, 0 },
+ { &search285, &replace285.value, 0 },
+ { &search286, &replace286.value, 0 },
+};
+
+static const nir_search_variable search196_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search196_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ftrunc,
+ { &search196_0_0.value },
+ NULL,
+};
+static const nir_search_expression search196 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2i32,
+ { &search196_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace196_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace196 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_f2i32,
+ { &replace196_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_f2i32_xforms[] = {
+ { &search196, &replace196.value, 0 },
+};
+
+static const nir_search_variable search10_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search10_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search10_0_0.value },
+ NULL,
+};
+static const nir_search_expression search10 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search10_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace10 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search217_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search217 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search217_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace217_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable replace217_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace217 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &replace217_0.value, &replace217_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fneg_xforms[] = {
+ { &search10, &replace10.value, 0 },
+ { &search217, &replace217.value, 20 },
+};
+
+static const nir_search_variable search211_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search211_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search211_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search211_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &search211_1_0.value, &search211_1_1.value },
+ NULL,
+};
+static const nir_search_expression search211 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fsub,
+ { &search211_0.value, &search211_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace211_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace211_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace211 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace211_0.value, &replace211_1.value },
+ NULL,
+};
+
+static const nir_search_variable search215_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search215_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search215 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsub,
+ { &search215_0.value, &search215_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace215_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace215_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace215_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace215_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace215 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace215_0.value, &replace215_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fsub_xforms[] = {
+ { &search211, &replace211.value, 0 },
+ { &search215, &replace215.value, 19 },
+};
+
+static const nir_search_variable search119_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search119_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search119_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search119_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search119 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &search119_0.value, &search119_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace119_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace119_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression replace119 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace119_0.value, &replace119_1.value },
+ NULL,
+};
+
+static const nir_search_variable search275_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search275_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search275_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search275_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search275_0_0.value, &search275_0_1.value, &search275_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search275_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search275 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &search275_0.value, &search275_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace275_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace275_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace275_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace275_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace275_1_0.value, &replace275_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace275_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace275_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace275_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace275_2_0.value, &replace275_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace275 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace275_0.value, &replace275_1.value, &replace275_2.value },
+ NULL,
+};
+
+static const nir_search_variable search276_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search276_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search276_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search276_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search276_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search276_1_0.value, &search276_1_1.value, &search276_1_2.value },
+ NULL,
+};
+static const nir_search_expression search276 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &search276_0.value, &search276_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace276_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace276_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace276_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace276_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace276_1_0.value, &replace276_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace276_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace276_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace276_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace276_2_0.value, &replace276_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace276 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace276_0.value, &replace276_1.value, &replace276_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fne_xforms[] = {
+ { &search119, &replace119.value, 0 },
+ { &search275, &replace275.value, 0 },
+ { &search276, &replace276.value, 0 },
+};
+
+static const nir_search_variable search15_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search15_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search15_0_0.value },
+ NULL,
+};
+static const nir_search_expression search15 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search15_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace15_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace15 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace15_0.value },
+ NULL,
+};
+
+static const nir_search_variable search16_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search16_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search16_0_0.value },
+ NULL,
+};
+static const nir_search_expression search16 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search16_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace16_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace16 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace16_0.value },
+ NULL,
+};
+
+static const nir_search_variable search201_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search201_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &search201_0_0.value },
+ NULL,
+};
+static const nir_search_expression search201 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search201_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace201_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace201 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &replace201_0.value },
+ NULL,
+};
+
+static const nir_search_constant search222_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search222_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search222_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &search222_0_0.value, &search222_0_1.value },
+ NULL,
+};
+static const nir_search_expression search222 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &search222_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace222_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace222 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iabs,
+ { &replace222_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_iabs_xforms[] = {
+ { &search15, &replace15.value, 0 },
+ { &search16, &replace16.value, 0 },
+ { &search201, &replace201.value, 0 },
+ { &search222, &replace222.value, 0 },
+};
+
+static const nir_search_variable search257_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search257 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_unpack_unorm_4x8,
+ { &search257_0.value },
+ NULL,
+};
+
+static const nir_search_variable replace257_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace257_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+static const nir_search_expression replace257_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace257_0_0_0_0.value, &replace257_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace257_0_0_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace257_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace257_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace257_0_0_1_0.value, &replace257_0_0_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace257_0_0_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace257_0_0_2_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x2 /* 2 */ },
+};
+static const nir_search_expression replace257_0_0_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace257_0_0_2_0.value, &replace257_0_0_2_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace257_0_0_3_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* v */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace257_0_0_3_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3 /* 3 */ },
+};
+static const nir_search_expression replace257_0_0_3 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_u8,
+ { &replace257_0_0_3_0.value, &replace257_0_0_3_1.value },
+ NULL,
+};
+static const nir_search_expression replace257_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_vec4,
+ { &replace257_0_0_0.value, &replace257_0_0_1.value, &replace257_0_0_2.value, &replace257_0_0_3.value },
+ NULL,
+};
+static const nir_search_expression replace257_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_u2f32,
+ { &replace257_0_0.value },
+ NULL,
+};
+
+static const nir_search_constant replace257_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x406fe00000000000 /* 255.0 */ },
+};
+static const nir_search_expression replace257 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdiv,
+ { &replace257_0.value, &replace257_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_unpack_unorm_4x8_xforms[] = {
+ { &search257, &replace257.value, 34 },
+};
+
+static const nir_search_variable search79_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search79_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search79 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search79_0.value, &search79_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace79 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search85_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search85_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search85_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search85_1_0.value },
+ NULL,
+};
+static const nir_search_expression search85 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search85_0.value, &search85_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace85_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace85_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace85_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace85 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace85_0.value },
+ NULL,
+};
+
+static const nir_search_variable search87_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search87_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search87_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search87_1_0_0.value },
+ NULL,
+};
+static const nir_search_expression search87_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search87_1_0.value },
+ NULL,
+};
+static const nir_search_expression search87 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search87_0.value, &search87_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace87_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace87_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &replace87_0_0.value },
+ NULL,
+};
+static const nir_search_expression replace87 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace87_0.value },
+ NULL,
+};
+
+static const nir_search_variable search89_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search89_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search89_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fabs,
+ { &search89_1_0.value },
+ NULL,
+};
+static const nir_search_expression search89 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search89_0.value, &search89_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace89 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search97_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search97_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search97_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search97_0_0.value, &search97_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search97_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression search97 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmin,
+ { &search97_0.value, &search97_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace97_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace97 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace97_0.value },
+ NULL,
+};
+
+static const nir_search_variable search101_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search101_0_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search101_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search101_0_0_0_0.value, &search101_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search101_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search101_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search101_0_0_0.value, &search101_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search101_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search101_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search101_0_0.value, &search101_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search101_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search101 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search101_0.value, &search101_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace101_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace101_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace101_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace101_0_0.value, &replace101_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace101_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace101 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace101_0.value, &replace101_1.value },
+ NULL,
+};
+
+static const nir_search_variable search105_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search105_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &search105_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search105_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_zero_to_one),
+};
+static const nir_search_expression search105 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search105_0.value, &search105_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace105_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace105_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace105_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace105_0_0.value, &replace105_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace105 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fsat,
+ { &replace105_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_fmin_xforms[] = {
+ { &search79, &replace79.value, 0 },
+ { &search85, &replace85.value, 0 },
+ { &search87, &replace87.value, 0 },
+ { &search89, &replace89.value, 0 },
+ { &search97, &replace97.value, 9 },
+ { &search101, &replace101.value, 0 },
+ { &search105, &replace105.value, 0 },
+};
+
+static const nir_search_variable search131_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search131_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search131 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search131_0.value, &search131_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace131 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+
+static const nir_search_variable search181_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* a */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+
+static const nir_search_constant search181_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_TRUE /* True */ },
+};
+static const nir_search_expression search181 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search181_0.value, &search181_1.value },
+ (is_not_used_by_if),
+};
+
+static const nir_search_variable replace181_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace181 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &replace181_0.value },
+ NULL,
+};
+
+static const nir_search_variable search182_0 = {
+ { nir_search_value_variable, 32 },
+ 0, /* a */
+ false,
+ nir_type_bool32,
+ NULL,
+};
+
+static const nir_search_constant search182_1 = {
+ { nir_search_value_constant, 32 },
+ nir_type_bool32, { NIR_FALSE /* False */ },
+};
+static const nir_search_expression search182 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search182_0.value, &search182_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace182 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search283_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search283_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search283_0_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search283_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search283_0_0.value, &search283_0_1.value, &search283_0_2.value },
+ NULL,
+};
+
+static const nir_search_variable search283_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search283 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search283_0.value, &search283_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace283_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace283_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace283_1_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace283_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace283_1_0.value, &replace283_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace283_2_0 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace283_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace283_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace283_2_0.value, &replace283_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace283 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace283_0.value, &replace283_1.value, &replace283_2.value },
+ NULL,
+};
+
+static const nir_search_variable search284_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search284_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search284_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search284_1_2 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search284_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &search284_1_0.value, &search284_1_1.value, &search284_1_2.value },
+ NULL,
+};
+static const nir_search_expression search284 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &search284_0.value, &search284_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace284_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace284_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace284_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace284_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace284_1_0.value, &replace284_1_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace284_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* d */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace284_2_1 = {
+ { nir_search_value_variable, 0 },
+ 3, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace284_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ine,
+ { &replace284_2_0.value, &replace284_2_1.value },
+ NULL,
+};
+static const nir_search_expression replace284 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace284_0.value, &replace284_1.value, &replace284_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ine_xforms[] = {
+ { &search131, &replace131.value, 0 },
+ { &search181, &replace181.value, 0 },
+ { &search182, &replace182.value, 0 },
+ { &search283, &replace283.value, 0 },
+ { &search284, &replace284.value, 0 },
+};
+
+static const nir_search_variable search2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant search2_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression search2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_udiv,
+ { &search2_0.value, &search2_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace2 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search6_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search6_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ (is_pos_power_of_two),
+};
+static const nir_search_expression search6 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_udiv,
+ { &search6_0.value, &search6_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace6_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace6_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace6_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_find_lsb,
+ { &replace6_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace6 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ushr,
+ { &replace6_0.value, &replace6_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_udiv_xforms[] = {
+ { &search2, &replace2.value, 0 },
+ { &search6, &replace6.value, 0 },
+};
+
+static const nir_search_variable search248_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search248_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search248 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i8,
+ { &search248_0.value, &search248_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace248_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace248_0_1_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3 /* 3 */ },
+};
+
+static const nir_search_variable replace248_0_1_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace248_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace248_0_1_0_0.value, &replace248_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace248_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x8 /* 8 */ },
+};
+static const nir_search_expression replace248_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace248_0_1_0.value, &replace248_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace248_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace248_0_0.value, &replace248_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace248_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x18 /* 24 */ },
+};
+static const nir_search_expression replace248 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace248_0.value, &replace248_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_extract_i8_xforms[] = {
+ { &search248, &replace248.value, 27 },
+};
+
+static const nir_search_variable search243_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search243_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search243 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_uadd_carry,
+ { &search243_0.value, &search243_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace243_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace243_0_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace243_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace243_0_0_0.value, &replace243_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace243_0_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace243_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ult,
+ { &replace243_0_0.value, &replace243_0_1.value },
+ NULL,
+};
+static const nir_search_expression replace243 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2i,
+ { &replace243_0.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_uadd_carry_xforms[] = {
+ { &search243, &replace243.value, 23 },
+};
+
+static const nir_search_variable search246_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search246_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search246_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search246 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ibitfield_extract,
+ { &search246_0.value, &search246_1.value, &search246_2.value },
+ NULL,
+};
+
+static const nir_search_constant replace246_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1f /* 31 */ },
+};
+
+static const nir_search_variable replace246_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace246_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ilt,
+ { &replace246_0_0.value, &replace246_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace246_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace246_2_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* value */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace246_2_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* offset */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace246_2_2 = {
+ { nir_search_value_variable, 0 },
+ 2, /* bits */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace246_2 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ibfe,
+ { &replace246_2_0.value, &replace246_2_1.value, &replace246_2_2.value },
+ NULL,
+};
+static const nir_search_expression replace246 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace246_0.value, &replace246_1.value, &replace246_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ibitfield_extract_xforms[] = {
+ { &search246, &replace246.value, 26 },
+};
+
+static const nir_search_variable search260_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search260_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search260 = {
+ { nir_search_value_expression, 32 },
+ false,
+ nir_op_ldexp,
+ { &search260_0.value, &search260_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace260_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace260_0_1_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace260_0_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0xfc /* -252 */ },
+};
+static const nir_search_expression replace260_0_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace260_0_1_0_0_0_0_0.value, &replace260_0_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_0_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xfe /* 254 */ },
+};
+static const nir_search_expression replace260_0_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace260_0_1_0_0_0_0.value, &replace260_0_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_0_1_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace260_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace260_0_1_0_0_0.value, &replace260_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x7f /* 127 */ },
+};
+static const nir_search_expression replace260_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace260_0_1_0_0.value, &replace260_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x17 /* 23 */ },
+};
+static const nir_search_expression replace260_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace260_0_1_0.value, &replace260_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace260_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace260_0_0.value, &replace260_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace260_1_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0xfc /* -252 */ },
+};
+static const nir_search_expression replace260_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace260_1_0_0_0_0_0.value, &replace260_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xfe /* 254 */ },
+};
+static const nir_search_expression replace260_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace260_1_0_0_0_0.value, &replace260_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace260_1_0_0_1_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_0_1_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0xfc /* -252 */ },
+};
+static const nir_search_expression replace260_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace260_1_0_0_1_0_0_0.value, &replace260_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0xfe /* 254 */ },
+};
+static const nir_search_expression replace260_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace260_1_0_0_1_0_0.value, &replace260_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace260_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace260_1_0_0_1_0.value, &replace260_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace260_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace260_1_0_0_0.value, &replace260_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x7f /* 127 */ },
+};
+static const nir_search_expression replace260_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace260_1_0_0.value, &replace260_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace260_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x17 /* 23 */ },
+};
+static const nir_search_expression replace260_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace260_1_0.value, &replace260_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace260 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace260_0.value, &replace260_1.value },
+ NULL,
+};
+
+static const nir_search_variable search261_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search261_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search261 = {
+ { nir_search_value_expression, 64 },
+ false,
+ nir_op_ldexp,
+ { &search261_0.value, &search261_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace261_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* x */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable replace261_0_1_1_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x7fc /* -2044 */ },
+};
+static const nir_search_expression replace261_0_1_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace261_0_1_1_0_0_0_0_0.value, &replace261_0_1_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x7fe /* 2046 */ },
+};
+static const nir_search_expression replace261_0_1_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace261_0_1_1_0_0_0_0.value, &replace261_0_1_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_1_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace261_0_1_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace261_0_1_1_0_0_0.value, &replace261_0_1_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3ff /* 1023 */ },
+};
+static const nir_search_expression replace261_0_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace261_0_1_1_0_0.value, &replace261_0_1_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_0_1_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x14 /* 20 */ },
+};
+static const nir_search_expression replace261_0_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace261_0_1_1_0.value, &replace261_0_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace261_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_64_2x32_split,
+ { &replace261_0_1_0.value, &replace261_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace261_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace261_0_0.value, &replace261_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable replace261_1_1_0_0_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x7fc /* -2044 */ },
+};
+static const nir_search_expression replace261_1_1_0_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace261_1_1_0_0_0_0_0.value, &replace261_1_1_0_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x7fe /* 2046 */ },
+};
+static const nir_search_expression replace261_1_1_0_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace261_1_1_0_0_0_0.value, &replace261_1_1_0_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace261_1_1_0_0_1_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* exp */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_0_1_0_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { -0x7fc /* -2044 */ },
+};
+static const nir_search_expression replace261_1_1_0_0_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imax,
+ { &replace261_1_1_0_0_1_0_0_0.value, &replace261_1_1_0_0_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_0_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x7fe /* 2046 */ },
+};
+static const nir_search_expression replace261_1_1_0_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imin,
+ { &replace261_1_1_0_0_1_0_0.value, &replace261_1_1_0_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+static const nir_search_expression replace261_1_1_0_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace261_1_1_0_0_1_0.value, &replace261_1_1_0_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace261_1_1_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace261_1_1_0_0_0.value, &replace261_1_1_0_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_0_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x3ff /* 1023 */ },
+};
+static const nir_search_expression replace261_1_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace261_1_1_0_0.value, &replace261_1_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace261_1_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x14 /* 20 */ },
+};
+static const nir_search_expression replace261_1_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace261_1_1_0.value, &replace261_1_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace261_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_pack_64_2x32_split,
+ { &replace261_1_0.value, &replace261_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace261 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace261_0.value, &replace261_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_ldexp_xforms[] = {
+ { &search260, &replace260.value, 0 },
+ { &search261, &replace261.value, 0 },
+};
+
+static const nir_search_variable search250_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search250_1 = {
+ { nir_search_value_variable, 32 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search250 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_extract_i16,
+ { &search250_0.value, &search250_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace250_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace250_0_1_0_0 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x1 /* 1 */ },
+};
+
+static const nir_search_variable replace250_0_1_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace250_0_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_isub,
+ { &replace250_0_1_0_0.value, &replace250_0_1_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace250_0_1_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression replace250_0_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace250_0_1_0.value, &replace250_0_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace250_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishl,
+ { &replace250_0_0.value, &replace250_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace250_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x10 /* 16 */ },
+};
+static const nir_search_expression replace250 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ishr,
+ { &replace250_0.value, &replace250_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_extract_i16_xforms[] = {
+ { &search250, &replace250.value, 28 },
+};
+
+static bool
+nir_opt_algebraic_block(nir_block *block, const bool *condition_flags,
+ void *mem_ctx)
+{
+ bool progress = false;
+
+ nir_foreach_instr_reverse_safe(instr, block) {
+ if (instr->type != nir_instr_type_alu)
+ continue;
+
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+ if (!alu->dest.dest.is_ssa)
+ continue;
+
+ switch (alu->op) {
+ case nir_op_iand:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_iand_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_iand_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_i2b:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_i2b_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_i2b_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ixor:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ixor_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ixor_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_seq:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_seq_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_seq_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ilt:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ilt_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ilt_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_umod:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_umod_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_umod_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_imul:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imul_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_imul_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_uge:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_uge_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_uge_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ineg:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ineg_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ineg_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmul:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fmul_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fmul_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_64_2x32_split_x:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_64_2x32_split_x_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_64_2x32_split_x_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ffma:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ffma_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ffma_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_umin:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_umin_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_umin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_umax:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_umax_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_umax_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_bcsel:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_bcsel_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_bcsel_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_sge:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_sge_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_sge_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fsqrt:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fsqrt_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fsqrt_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_iadd:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_iadd_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_iadd_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_pack_unorm_2x16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_pack_unorm_2x16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_pack_unorm_2x16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_pack_unorm_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_pack_unorm_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_pack_unorm_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_pack_snorm_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_pack_snorm_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_pack_snorm_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fand:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fand_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fand_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fabs:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fabs_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fabs_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_imod:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imod_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_imod_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ieq:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ieq_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ieq_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_usub_borrow:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_usub_borrow_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_usub_borrow_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_imin:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imin_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_imin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_frsq:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_frsq_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_frsq_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_usadd_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_usadd_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_usadd_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_idiv:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_idiv_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_idiv_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_extract_u8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_extract_u8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_extract_u8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_pack_snorm_2x16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_pack_snorm_2x16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_pack_snorm_2x16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fpow:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fpow_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fpow_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ige:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ige_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ige_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fdiv:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fdiv_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fdiv_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ffract:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ffract_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ffract_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fadd:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fadd_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fadd_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ishl:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ishl_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ishl_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_f2u32:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_f2u32_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_f2u32_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_flog2:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_flog2_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_flog2_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_inot:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_inot_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_inot_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_sne:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_sne_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_sne_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmod:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fmod_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fmod_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_pack_64_2x32_split:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_pack_64_2x32_split_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_pack_64_2x32_split_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fcsel:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fcsel_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fcsel_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_isub:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_isub_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_isub_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmax:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fmax_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fmax_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_umul_unorm_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_umul_unorm_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_umul_unorm_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_bitfield_insert:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_bitfield_insert_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_bitfield_insert_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_feq:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_feq_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_feq_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_flrp:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_flrp_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_flrp_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ior:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ior_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ior_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ussub_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ussub_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ussub_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_snorm_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_snorm_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_snorm_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_frem:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_frem_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_frem_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_64_2x32_split_y:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_64_2x32_split_y_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_64_2x32_split_y_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_unorm_2x16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_unorm_2x16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_unorm_2x16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_snorm_2x16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_snorm_2x16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_snorm_2x16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_imax:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_imax_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_imax_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fsat:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fsat_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fsat_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_extract_u16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_extract_u16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_extract_u16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fge:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fge_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fge_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_frcp:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_frcp_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_frcp_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fxor:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fxor_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fxor_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ushr:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ushr_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ushr_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fexp2:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fexp2_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fexp2_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ishr:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ishr_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ishr_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ubitfield_extract:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ubitfield_extract_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ubitfield_extract_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_slt:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_slt_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_slt_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_flt:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_flt_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_flt_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ult:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ult_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ult_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_f2i32:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_f2i32_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_f2i32_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fneg:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fneg_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fneg_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fsub:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fsub_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fsub_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fne:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fne_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fne_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_iabs:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_iabs_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_iabs_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_unpack_unorm_4x8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_unpack_unorm_4x8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_unpack_unorm_4x8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmin:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_fmin_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_fmin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ine:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ine_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ine_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_udiv:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_udiv_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_udiv_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_extract_i8:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_extract_i8_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_extract_i8_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_uadd_carry:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_uadd_carry_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_uadd_carry_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ibitfield_extract:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ibitfield_extract_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ibitfield_extract_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_ldexp:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_ldexp_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_ldexp_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_extract_i16:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_extract_i16_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_extract_i16_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return progress;
+}
+
+static bool
+nir_opt_algebraic_impl(nir_function_impl *impl, const bool *condition_flags)
+{
+ void *mem_ctx = ralloc_parent(impl);
+ bool progress = false;
+
+ nir_foreach_block_reverse(block, impl) {
+ progress |= nir_opt_algebraic_block(block, condition_flags, mem_ctx);
+ }
+
+ if (progress)
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+
+ return progress;
+}
+
+
+bool
+nir_opt_algebraic(nir_shader *shader)
+{
+ bool progress = false;
+ bool condition_flags[37];
+ const nir_shader_compiler_options *options = shader->options;
+ (void) options;
+
+ condition_flags[0] = true;
+ condition_flags[1] = options->lower_idiv;
+ condition_flags[2] = options->lower_flrp32;
+ condition_flags[3] = options->lower_flrp64;
+ condition_flags[4] = options->lower_ffract;
+ condition_flags[5] = !options->lower_flrp32;
+ condition_flags[6] = !options->lower_flrp64;
+ condition_flags[7] = options->lower_ffma;
+ condition_flags[8] = options->fuse_ffma;
+ condition_flags[9] = !options->lower_fsat;
+ condition_flags[10] = options->lower_fsat;
+ condition_flags[11] = options->lower_scmp;
+ condition_flags[12] = options->lower_fpow;
+ condition_flags[13] = !options->lower_fpow;
+ condition_flags[14] = options->lower_fdiv;
+ condition_flags[15] = options->lower_fsqrt;
+ condition_flags[16] = !options->lower_fsqrt;
+ condition_flags[17] = !options->lower_extract_byte;
+ condition_flags[18] = !options->lower_extract_word;
+ condition_flags[19] = options->lower_sub;
+ condition_flags[20] = options->lower_negate;
+ condition_flags[21] = options->lower_fmod32;
+ condition_flags[22] = options->lower_fmod64;
+ condition_flags[23] = options->lower_uadd_carry;
+ condition_flags[24] = options->lower_usub_borrow;
+ condition_flags[25] = options->lower_bitfield_insert;
+ condition_flags[26] = options->lower_bitfield_extract;
+ condition_flags[27] = options->lower_extract_byte;
+ condition_flags[28] = options->lower_extract_word;
+ condition_flags[29] = options->lower_pack_unorm_2x16;
+ condition_flags[30] = options->lower_pack_unorm_4x8;
+ condition_flags[31] = options->lower_pack_snorm_2x16;
+ condition_flags[32] = options->lower_pack_snorm_4x8;
+ condition_flags[33] = options->lower_unpack_unorm_2x16;
+ condition_flags[34] = options->lower_unpack_unorm_4x8;
+ condition_flags[35] = options->lower_unpack_snorm_2x16;
+ condition_flags[36] = options->lower_unpack_snorm_4x8;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl)
+ progress |= nir_opt_algebraic_impl(function->impl, condition_flags);
+ }
+
+ return progress;
+}
+
+
+#include "nir.h"
+#include "nir_search.h"
+#include "nir_search_helpers.h"
+
+#ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+#define NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+
+struct transform {
+ const nir_search_expression *search;
+ const nir_search_value *replace;
+ unsigned condition_offset;
+};
+
+#endif
+
+
+static const nir_search_variable search289_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search289_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search289_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search289_0_0.value, &search289_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search289_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search289 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fmul,
+ { &search289_0.value, &search289_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace289_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace289_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace289_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace289_0_0.value, &replace289_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace289_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace289 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace289_0.value, &replace289_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_before_ffma_fmul_xforms[] = {
+ { &search289, &replace289.value, 0 },
+};
+
+static const nir_search_variable search290_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search290_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search290_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search290_0_0.value, &search290_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search290_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search290 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search290_0.value, &search290_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace290_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace290_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace290_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace290_0_0.value, &replace290_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace290_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace290 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace290_0.value, &replace290_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_before_ffma_imul_xforms[] = {
+ { &search290, &replace290.value, 0 },
+};
+
+static const nir_search_variable search292_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search292_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search292_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search292_0_0.value, &search292_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search292_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search292 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search292_0.value, &search292_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace292_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace292_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace292_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace292_0_0.value, &replace292_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace292_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace292 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace292_0.value, &replace292_1.value },
+ NULL,
+};
+
+static const nir_search_variable search294_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search294_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search294_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search294_0_0.value, &search294_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search294_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search294_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search294_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &search294_1_0.value, &search294_1_1.value },
+ NULL,
+};
+static const nir_search_expression search294 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search294_0.value, &search294_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace294_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace294_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace294_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace294_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &replace294_1_0.value, &replace294_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace294 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_imul,
+ { &replace294_0.value, &replace294_1.value },
+ NULL,
+};
+
+static const nir_search_variable search296_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search296_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search296_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search296_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search296 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search296_0.value, &search296_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace296 = {
+ { nir_search_value_constant, 0 },
+ nir_type_int, { 0x0 /* 0 */ },
+};
+
+static const nir_search_variable search297_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search297_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search297_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search297_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search297_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search297_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search297_1_0.value, &search297_1_1.value },
+ NULL,
+};
+static const nir_search_expression search297 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search297_0.value, &search297_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace297 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search298_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search298_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search298_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_ineg,
+ { &search298_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search298_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search298_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search298_1_0.value, &search298_1_1.value },
+ NULL,
+};
+static const nir_search_expression search298 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_iadd,
+ { &search298_0.value, &search298_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace298 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_before_ffma_iadd_xforms[] = {
+ { &search292, &replace292.value, 0 },
+ { &search294, &replace294.value, 0 },
+ { &search296, &replace296.value, 0 },
+ { &search297, &replace297.value, 0 },
+ { &search298, &replace298.value, 0 },
+};
+
+static const nir_search_variable search291_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+
+static const nir_search_variable search291_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search291_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search291_0_0.value, &search291_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search291_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ (is_not_const),
+};
+static const nir_search_expression search291 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search291_0.value, &search291_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable replace291_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace291_0_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace291_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace291_0_0.value, &replace291_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace291_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace291 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace291_0.value, &replace291_1.value },
+ NULL,
+};
+
+static const nir_search_variable search293_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search293_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search293_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search293_0_0.value, &search293_0_1.value },
+ NULL,
+};
+
+static const nir_search_variable search293_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search293_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search293_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &search293_1_0.value, &search293_1_1.value },
+ NULL,
+};
+static const nir_search_expression search293 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search293_0.value, &search293_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace293_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace293_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace293_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace293_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace293_1_0.value, &replace293_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace293 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmul,
+ { &replace293_0.value, &replace293_1.value },
+ NULL,
+};
+
+static const nir_search_variable search295_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search295_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search295_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search295_1 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search295 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search295_0.value, &search295_1.value },
+ NULL,
+};
+
+static const nir_search_constant replace295 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_variable search299_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search299_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search299_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search299_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search299_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search299_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search299_1_0.value, &search299_1_1.value },
+ NULL,
+};
+static const nir_search_expression search299 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search299_0.value, &search299_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace299 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search300_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search300_1_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search300_1_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search300_1_0_0.value },
+ NULL,
+};
+
+static const nir_search_variable search300_1_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search300_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search300_1_0.value, &search300_1_1.value },
+ NULL,
+};
+static const nir_search_expression search300 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fadd,
+ { &search300_0.value, &search300_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace300 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_before_ffma_fadd_xforms[] = {
+ { &search291, &replace291.value, 0 },
+ { &search293, &replace293.value, 0 },
+ { &search295, &replace295.value, 0 },
+ { &search299, &replace299.value, 0 },
+ { &search300, &replace300.value, 0 },
+};
+
+static bool
+nir_opt_algebraic_before_ffma_block(nir_block *block, const bool *condition_flags,
+ void *mem_ctx)
+{
+ bool progress = false;
+
+ nir_foreach_instr_reverse_safe(instr, block) {
+ if (instr->type != nir_instr_type_alu)
+ continue;
+
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+ if (!alu->dest.dest.is_ssa)
+ continue;
+
+ switch (alu->op) {
+ case nir_op_fmul:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_before_ffma_fmul_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_before_ffma_fmul_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_imul:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_before_ffma_imul_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_before_ffma_imul_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_iadd:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_before_ffma_iadd_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_before_ffma_iadd_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fadd:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_before_ffma_fadd_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_before_ffma_fadd_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return progress;
+}
+
+static bool
+nir_opt_algebraic_before_ffma_impl(nir_function_impl *impl, const bool *condition_flags)
+{
+ void *mem_ctx = ralloc_parent(impl);
+ bool progress = false;
+
+ nir_foreach_block_reverse(block, impl) {
+ progress |= nir_opt_algebraic_before_ffma_block(block, condition_flags, mem_ctx);
+ }
+
+ if (progress)
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+
+ return progress;
+}
+
+
+bool
+nir_opt_algebraic_before_ffma(nir_shader *shader)
+{
+ bool progress = false;
+ bool condition_flags[37];
+ const nir_shader_compiler_options *options = shader->options;
+ (void) options;
+
+ condition_flags[0] = true;
+ condition_flags[1] = options->lower_idiv;
+ condition_flags[2] = options->lower_flrp32;
+ condition_flags[3] = options->lower_flrp64;
+ condition_flags[4] = options->lower_ffract;
+ condition_flags[5] = !options->lower_flrp32;
+ condition_flags[6] = !options->lower_flrp64;
+ condition_flags[7] = options->lower_ffma;
+ condition_flags[8] = options->fuse_ffma;
+ condition_flags[9] = !options->lower_fsat;
+ condition_flags[10] = options->lower_fsat;
+ condition_flags[11] = options->lower_scmp;
+ condition_flags[12] = options->lower_fpow;
+ condition_flags[13] = !options->lower_fpow;
+ condition_flags[14] = options->lower_fdiv;
+ condition_flags[15] = options->lower_fsqrt;
+ condition_flags[16] = !options->lower_fsqrt;
+ condition_flags[17] = !options->lower_extract_byte;
+ condition_flags[18] = !options->lower_extract_word;
+ condition_flags[19] = options->lower_sub;
+ condition_flags[20] = options->lower_negate;
+ condition_flags[21] = options->lower_fmod32;
+ condition_flags[22] = options->lower_fmod64;
+ condition_flags[23] = options->lower_uadd_carry;
+ condition_flags[24] = options->lower_usub_borrow;
+ condition_flags[25] = options->lower_bitfield_insert;
+ condition_flags[26] = options->lower_bitfield_extract;
+ condition_flags[27] = options->lower_extract_byte;
+ condition_flags[28] = options->lower_extract_word;
+ condition_flags[29] = options->lower_pack_unorm_2x16;
+ condition_flags[30] = options->lower_pack_unorm_4x8;
+ condition_flags[31] = options->lower_pack_snorm_2x16;
+ condition_flags[32] = options->lower_pack_snorm_4x8;
+ condition_flags[33] = options->lower_unpack_unorm_2x16;
+ condition_flags[34] = options->lower_unpack_unorm_4x8;
+ condition_flags[35] = options->lower_unpack_snorm_2x16;
+ condition_flags[36] = options->lower_unpack_snorm_4x8;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl)
+ progress |= nir_opt_algebraic_before_ffma_impl(function->impl, condition_flags);
+ }
+
+ return progress;
+}
+
+
+#include "nir.h"
+#include "nir_search.h"
+#include "nir_search_helpers.h"
+
+#ifndef NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+#define NIR_OPT_ALGEBRAIC_STRUCT_DEFS
+
+struct transform {
+ const nir_search_expression *search;
+ const nir_search_value *replace;
+ unsigned condition_offset;
+};
+
+#endif
+
+
+static const nir_search_variable search309_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search309_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search309_0_0.value },
+ NULL,
+};
+static const nir_search_expression search309 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search309_0.value },
+ (is_used_more_than_once),
+};
+
+static const nir_search_variable replace309_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace309_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+
+static const nir_search_constant replace309_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x3ff0000000000000 /* 1.0 */ },
+};
+static const nir_search_expression replace309 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace309_0.value, &replace309_1.value, &replace309_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_b2f_xforms[] = {
+ { &search309, &replace309.value, 0 },
+};
+
+static const nir_search_variable search307_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search307_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search307 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot4,
+ { &search307_0.value, &search307_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace307_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace307_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace307 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot_replicated4,
+ { &replace307_0.value, &replace307_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fdot4_xforms[] = {
+ { &search307, &replace307.value, 37 },
+};
+
+static const nir_search_variable search301_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search301_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search301_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search301_0_0.value, &search301_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search301_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search301 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &search301_0.value, &search301_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace301_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace301_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace301_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace301_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace301 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_flt,
+ { &replace301_0.value, &replace301_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_flt_xforms[] = {
+ { &search301, &replace301.value, 0 },
+};
+
+static const nir_search_variable search305_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search305_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search305 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot2,
+ { &search305_0.value, &search305_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace305_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace305_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace305 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot_replicated2,
+ { &replace305_0.value, &replace305_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fdot2_xforms[] = {
+ { &search305, &replace305.value, 37 },
+};
+
+static const nir_search_variable search306_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search306_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search306 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot3,
+ { &search306_0.value, &search306_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace306_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace306_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace306 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdot_replicated3,
+ { &replace306_0.value, &replace306_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fdot3_xforms[] = {
+ { &search306, &replace306.value, 37 },
+};
+
+static const nir_search_variable search310_0_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search310_0_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_inot,
+ { &search310_0_0_0.value },
+ NULL,
+};
+static const nir_search_expression search310_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_b2f,
+ { &search310_0_0.value },
+ NULL,
+};
+static const nir_search_expression search310 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &search310_0.value },
+ (is_used_more_than_once),
+};
+
+static const nir_search_variable replace310_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_constant replace310_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x8000000000000000L /* -0.0 */ },
+};
+
+static const nir_search_constant replace310_2 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0xbff0000000000000L /* -1.0 */ },
+};
+static const nir_search_expression replace310 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_bcsel,
+ { &replace310_0.value, &replace310_1.value, &replace310_2.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fneg_xforms[] = {
+ { &search310, &replace310.value, 0 },
+};
+
+static const nir_search_variable search312_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search312_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search312_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search312_0_0.value, &search312_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search312_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search312_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search312_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search312_1_0.value, &search312_1_1.value },
+ (is_used_once),
+};
+static const nir_search_expression search312 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &search312_0.value, &search312_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace312_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace312_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace312_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace312_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmax,
+ { &replace312_1_0.value, &replace312_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace312 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace312_0.value, &replace312_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fmax_xforms[] = {
+ { &search312, &replace312.value, 0 },
+};
+
+static const nir_search_variable search304_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search304_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search304_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search304_0_0.value, &search304_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search304_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search304 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fne,
+ { &search304_0.value, &search304_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace304_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace304_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace304_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace304_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace304 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fne,
+ { &replace304_0.value, &replace304_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fne_xforms[] = {
+ { &search304, &replace304.value, 0 },
+};
+
+static const nir_search_variable search311_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search311_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search311_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search311_0_0.value, &search311_0_1.value },
+ (is_used_once),
+};
+
+static const nir_search_variable search311_1_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ true,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search311_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search311_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search311_1_0.value, &search311_1_1.value },
+ (is_used_once),
+};
+static const nir_search_expression search311 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &search311_0.value, &search311_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace311_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* c */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace311_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace311_1_1 = {
+ { nir_search_value_variable, 0 },
+ 2, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace311_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fmin,
+ { &replace311_1_0.value, &replace311_1_1.value },
+ NULL,
+};
+static const nir_search_expression replace311 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &replace311_0.value, &replace311_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fmin_xforms[] = {
+ { &search311, &replace311.value, 0 },
+};
+
+static const nir_search_variable search303_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search303_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search303_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search303_0_0.value, &search303_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search303_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search303 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_feq,
+ { &search303_0.value, &search303_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace303_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace303_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace303_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace303_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace303 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_feq,
+ { &replace303_0.value, &replace303_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_feq_xforms[] = {
+ { &search303, &replace303.value, 0 },
+};
+
+static const nir_search_variable search302_0_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search302_0_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search302_0 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fadd,
+ { &search302_0_0.value, &search302_0_1.value },
+ NULL,
+};
+
+static const nir_search_constant search302_1 = {
+ { nir_search_value_constant, 0 },
+ nir_type_float, { 0x0 /* 0.0 */ },
+};
+static const nir_search_expression search302 = {
+ { nir_search_value_expression, 0 },
+ true,
+ nir_op_fge,
+ { &search302_0.value, &search302_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace302_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace302_1_0 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace302_1 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fneg,
+ { &replace302_1_0.value },
+ NULL,
+};
+static const nir_search_expression replace302 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fge,
+ { &replace302_0.value, &replace302_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fge_xforms[] = {
+ { &search302, &replace302.value, 0 },
+};
+
+static const nir_search_variable search308_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable search308_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression search308 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdph,
+ { &search308_0.value, &search308_1.value },
+ NULL,
+};
+
+static const nir_search_variable replace308_0 = {
+ { nir_search_value_variable, 0 },
+ 0, /* a */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+
+static const nir_search_variable replace308_1 = {
+ { nir_search_value_variable, 0 },
+ 1, /* b */
+ false,
+ nir_type_invalid,
+ NULL,
+};
+static const nir_search_expression replace308 = {
+ { nir_search_value_expression, 0 },
+ false,
+ nir_op_fdph_replicated,
+ { &replace308_0.value, &replace308_1.value },
+ NULL,
+};
+
+static const struct transform nir_opt_algebraic_late_fdph_xforms[] = {
+ { &search308, &replace308.value, 37 },
+};
+
+static bool
+nir_opt_algebraic_late_block(nir_block *block, const bool *condition_flags,
+ void *mem_ctx)
+{
+ bool progress = false;
+
+ nir_foreach_instr_reverse_safe(instr, block) {
+ if (instr->type != nir_instr_type_alu)
+ continue;
+
+ nir_alu_instr *alu = nir_instr_as_alu(instr);
+ if (!alu->dest.dest.is_ssa)
+ continue;
+
+ switch (alu->op) {
+ case nir_op_b2f:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_b2f_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_b2f_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fdot4:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fdot4_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fdot4_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_flt:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_flt_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_flt_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fdot2:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fdot2_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fdot2_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fdot3:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fdot3_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fdot3_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fneg:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fneg_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fneg_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmax:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fmax_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fmax_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fne:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fne_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fne_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fmin:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fmin_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fmin_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_feq:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_feq_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_feq_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fge:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fge_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fge_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ case nir_op_fdph:
+ for (unsigned i = 0; i < ARRAY_SIZE(nir_opt_algebraic_late_fdph_xforms); i++) {
+ const struct transform *xform = &nir_opt_algebraic_late_fdph_xforms[i];
+ if (condition_flags[xform->condition_offset] &&
+ nir_replace_instr(alu, xform->search, xform->replace,
+ mem_ctx)) {
+ progress = true;
+ break;
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ }
+
+ return progress;
+}
+
+static bool
+nir_opt_algebraic_late_impl(nir_function_impl *impl, const bool *condition_flags)
+{
+ void *mem_ctx = ralloc_parent(impl);
+ bool progress = false;
+
+ nir_foreach_block_reverse(block, impl) {
+ progress |= nir_opt_algebraic_late_block(block, condition_flags, mem_ctx);
+ }
+
+ if (progress)
+ nir_metadata_preserve(impl, nir_metadata_block_index |
+ nir_metadata_dominance);
+
+ return progress;
+}
+
+
+bool
+nir_opt_algebraic_late(nir_shader *shader)
+{
+ bool progress = false;
+ bool condition_flags[38];
+ const nir_shader_compiler_options *options = shader->options;
+ (void) options;
+
+ condition_flags[0] = true;
+ condition_flags[1] = options->lower_idiv;
+ condition_flags[2] = options->lower_flrp32;
+ condition_flags[3] = options->lower_flrp64;
+ condition_flags[4] = options->lower_ffract;
+ condition_flags[5] = !options->lower_flrp32;
+ condition_flags[6] = !options->lower_flrp64;
+ condition_flags[7] = options->lower_ffma;
+ condition_flags[8] = options->fuse_ffma;
+ condition_flags[9] = !options->lower_fsat;
+ condition_flags[10] = options->lower_fsat;
+ condition_flags[11] = options->lower_scmp;
+ condition_flags[12] = options->lower_fpow;
+ condition_flags[13] = !options->lower_fpow;
+ condition_flags[14] = options->lower_fdiv;
+ condition_flags[15] = options->lower_fsqrt;
+ condition_flags[16] = !options->lower_fsqrt;
+ condition_flags[17] = !options->lower_extract_byte;
+ condition_flags[18] = !options->lower_extract_word;
+ condition_flags[19] = options->lower_sub;
+ condition_flags[20] = options->lower_negate;
+ condition_flags[21] = options->lower_fmod32;
+ condition_flags[22] = options->lower_fmod64;
+ condition_flags[23] = options->lower_uadd_carry;
+ condition_flags[24] = options->lower_usub_borrow;
+ condition_flags[25] = options->lower_bitfield_insert;
+ condition_flags[26] = options->lower_bitfield_extract;
+ condition_flags[27] = options->lower_extract_byte;
+ condition_flags[28] = options->lower_extract_word;
+ condition_flags[29] = options->lower_pack_unorm_2x16;
+ condition_flags[30] = options->lower_pack_unorm_4x8;
+ condition_flags[31] = options->lower_pack_snorm_2x16;
+ condition_flags[32] = options->lower_pack_snorm_4x8;
+ condition_flags[33] = options->lower_unpack_unorm_2x16;
+ condition_flags[34] = options->lower_unpack_unorm_4x8;
+ condition_flags[35] = options->lower_unpack_snorm_2x16;
+ condition_flags[36] = options->lower_unpack_snorm_4x8;
+ condition_flags[37] = options->fdot_replicates;
+
+ nir_foreach_function(function, shader) {
+ if (function->impl)
+ progress |= nir_opt_algebraic_late_impl(function->impl, condition_flags);
+ }
+
+ return progress;
+}
+
diff --git a/prebuilt-intermediates/spirv/spirv_info.c b/prebuilt-intermediates/spirv/spirv_info.c
new file mode 100644
index 0000000..b0a0368
--- /dev/null
+++ b/prebuilt-intermediates/spirv/spirv_info.c
@@ -0,0 +1,522 @@
+/* DO NOT EDIT - This file is generated automatically by spirv_info_c.py script */
+
+/*
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#include "spirv_info.h"
+
+const char *
+spirv_capability_to_string(SpvCapability v)
+{
+ switch (v) {
+ case SpvCapabilityMatrix: return "SpvCapabilityMatrix";
+ case SpvCapabilityShader: return "SpvCapabilityShader";
+ case SpvCapabilityGeometry: return "SpvCapabilityGeometry";
+ case SpvCapabilityTessellation: return "SpvCapabilityTessellation";
+ case SpvCapabilityAddresses: return "SpvCapabilityAddresses";
+ case SpvCapabilityLinkage: return "SpvCapabilityLinkage";
+ case SpvCapabilityKernel: return "SpvCapabilityKernel";
+ case SpvCapabilityVector16: return "SpvCapabilityVector16";
+ case SpvCapabilityFloat16Buffer: return "SpvCapabilityFloat16Buffer";
+ case SpvCapabilityFloat16: return "SpvCapabilityFloat16";
+ case SpvCapabilityFloat64: return "SpvCapabilityFloat64";
+ case SpvCapabilityInt64: return "SpvCapabilityInt64";
+ case SpvCapabilityInt64Atomics: return "SpvCapabilityInt64Atomics";
+ case SpvCapabilityImageBasic: return "SpvCapabilityImageBasic";
+ case SpvCapabilityImageReadWrite: return "SpvCapabilityImageReadWrite";
+ case SpvCapabilityImageMipmap: return "SpvCapabilityImageMipmap";
+ case SpvCapabilityPipes: return "SpvCapabilityPipes";
+ case SpvCapabilityGroups: return "SpvCapabilityGroups";
+ case SpvCapabilityDeviceEnqueue: return "SpvCapabilityDeviceEnqueue";
+ case SpvCapabilityLiteralSampler: return "SpvCapabilityLiteralSampler";
+ case SpvCapabilityAtomicStorage: return "SpvCapabilityAtomicStorage";
+ case SpvCapabilityInt16: return "SpvCapabilityInt16";
+ case SpvCapabilityTessellationPointSize: return "SpvCapabilityTessellationPointSize";
+ case SpvCapabilityGeometryPointSize: return "SpvCapabilityGeometryPointSize";
+ case SpvCapabilityImageGatherExtended: return "SpvCapabilityImageGatherExtended";
+ case SpvCapabilityStorageImageMultisample: return "SpvCapabilityStorageImageMultisample";
+ case SpvCapabilityUniformBufferArrayDynamicIndexing: return "SpvCapabilityUniformBufferArrayDynamicIndexing";
+ case SpvCapabilitySampledImageArrayDynamicIndexing: return "SpvCapabilitySampledImageArrayDynamicIndexing";
+ case SpvCapabilityStorageBufferArrayDynamicIndexing: return "SpvCapabilityStorageBufferArrayDynamicIndexing";
+ case SpvCapabilityStorageImageArrayDynamicIndexing: return "SpvCapabilityStorageImageArrayDynamicIndexing";
+ case SpvCapabilityClipDistance: return "SpvCapabilityClipDistance";
+ case SpvCapabilityCullDistance: return "SpvCapabilityCullDistance";
+ case SpvCapabilityImageCubeArray: return "SpvCapabilityImageCubeArray";
+ case SpvCapabilitySampleRateShading: return "SpvCapabilitySampleRateShading";
+ case SpvCapabilityImageRect: return "SpvCapabilityImageRect";
+ case SpvCapabilitySampledRect: return "SpvCapabilitySampledRect";
+ case SpvCapabilityGenericPointer: return "SpvCapabilityGenericPointer";
+ case SpvCapabilityInt8: return "SpvCapabilityInt8";
+ case SpvCapabilityInputAttachment: return "SpvCapabilityInputAttachment";
+ case SpvCapabilitySparseResidency: return "SpvCapabilitySparseResidency";
+ case SpvCapabilityMinLod: return "SpvCapabilityMinLod";
+ case SpvCapabilitySampled1D: return "SpvCapabilitySampled1D";
+ case SpvCapabilityImage1D: return "SpvCapabilityImage1D";
+ case SpvCapabilitySampledCubeArray: return "SpvCapabilitySampledCubeArray";
+ case SpvCapabilitySampledBuffer: return "SpvCapabilitySampledBuffer";
+ case SpvCapabilityImageBuffer: return "SpvCapabilityImageBuffer";
+ case SpvCapabilityImageMSArray: return "SpvCapabilityImageMSArray";
+ case SpvCapabilityStorageImageExtendedFormats: return "SpvCapabilityStorageImageExtendedFormats";
+ case SpvCapabilityImageQuery: return "SpvCapabilityImageQuery";
+ case SpvCapabilityDerivativeControl: return "SpvCapabilityDerivativeControl";
+ case SpvCapabilityInterpolationFunction: return "SpvCapabilityInterpolationFunction";
+ case SpvCapabilityTransformFeedback: return "SpvCapabilityTransformFeedback";
+ case SpvCapabilityGeometryStreams: return "SpvCapabilityGeometryStreams";
+ case SpvCapabilityStorageImageReadWithoutFormat: return "SpvCapabilityStorageImageReadWithoutFormat";
+ case SpvCapabilityStorageImageWriteWithoutFormat: return "SpvCapabilityStorageImageWriteWithoutFormat";
+ case SpvCapabilityMultiViewport: return "SpvCapabilityMultiViewport";
+ case SpvCapabilitySubgroupDispatch: return "SpvCapabilitySubgroupDispatch";
+ case SpvCapabilityNamedBarrier: return "SpvCapabilityNamedBarrier";
+ case SpvCapabilityPipeStorage: return "SpvCapabilityPipeStorage";
+ case SpvCapabilitySubgroupBallotKHR: return "SpvCapabilitySubgroupBallotKHR";
+ case SpvCapabilityDrawParameters: return "SpvCapabilityDrawParameters";
+ case SpvCapabilitySubgroupVoteKHR: return "SpvCapabilitySubgroupVoteKHR";
+ case SpvCapabilityStorageBuffer16BitAccess: return "SpvCapabilityStorageBuffer16BitAccess";
+ case SpvCapabilityUniformAndStorageBuffer16BitAccess: return "SpvCapabilityUniformAndStorageBuffer16BitAccess";
+ case SpvCapabilityStoragePushConstant16: return "SpvCapabilityStoragePushConstant16";
+ case SpvCapabilityStorageInputOutput16: return "SpvCapabilityStorageInputOutput16";
+ case SpvCapabilityDeviceGroup: return "SpvCapabilityDeviceGroup";
+ case SpvCapabilityMultiView: return "SpvCapabilityMultiView";
+ case SpvCapabilityVariablePointersStorageBuffer: return "SpvCapabilityVariablePointersStorageBuffer";
+ case SpvCapabilityVariablePointers: return "SpvCapabilityVariablePointers";
+ case SpvCapabilityAtomicStorageOps: return "SpvCapabilityAtomicStorageOps";
+ case SpvCapabilitySampleMaskPostDepthCoverage: return "SpvCapabilitySampleMaskPostDepthCoverage";
+ case SpvCapabilityImageGatherBiasLodAMD: return "SpvCapabilityImageGatherBiasLodAMD";
+ case SpvCapabilityFragmentMaskAMD: return "SpvCapabilityFragmentMaskAMD";
+ case SpvCapabilityStencilExportEXT: return "SpvCapabilityStencilExportEXT";
+ case SpvCapabilityImageReadWriteLodAMD: return "SpvCapabilityImageReadWriteLodAMD";
+ case SpvCapabilitySampleMaskOverrideCoverageNV: return "SpvCapabilitySampleMaskOverrideCoverageNV";
+ case SpvCapabilityGeometryShaderPassthroughNV: return "SpvCapabilityGeometryShaderPassthroughNV";
+ case SpvCapabilityShaderViewportIndexLayerEXT: return "SpvCapabilityShaderViewportIndexLayerEXT";
+ case SpvCapabilityShaderViewportMaskNV: return "SpvCapabilityShaderViewportMaskNV";
+ case SpvCapabilityShaderStereoViewNV: return "SpvCapabilityShaderStereoViewNV";
+ case SpvCapabilityPerViewAttributesNV: return "SpvCapabilityPerViewAttributesNV";
+ case SpvCapabilityFragmentFullyCoveredEXT: return "SpvCapabilityFragmentFullyCoveredEXT";
+ case SpvCapabilitySubgroupShuffleINTEL: return "SpvCapabilitySubgroupShuffleINTEL";
+ case SpvCapabilitySubgroupBufferBlockIOINTEL: return "SpvCapabilitySubgroupBufferBlockIOINTEL";
+ case SpvCapabilitySubgroupImageBlockIOINTEL: return "SpvCapabilitySubgroupImageBlockIOINTEL";
+ case SpvCapabilityMax: break; /* silence warnings about unhandled enums. */
+ }
+
+ return "unknown";
+}
+
+const char *
+spirv_decoration_to_string(SpvDecoration v)
+{
+ switch (v) {
+ case SpvDecorationRelaxedPrecision: return "SpvDecorationRelaxedPrecision";
+ case SpvDecorationSpecId: return "SpvDecorationSpecId";
+ case SpvDecorationBlock: return "SpvDecorationBlock";
+ case SpvDecorationBufferBlock: return "SpvDecorationBufferBlock";
+ case SpvDecorationRowMajor: return "SpvDecorationRowMajor";
+ case SpvDecorationColMajor: return "SpvDecorationColMajor";
+ case SpvDecorationArrayStride: return "SpvDecorationArrayStride";
+ case SpvDecorationMatrixStride: return "SpvDecorationMatrixStride";
+ case SpvDecorationGLSLShared: return "SpvDecorationGLSLShared";
+ case SpvDecorationGLSLPacked: return "SpvDecorationGLSLPacked";
+ case SpvDecorationCPacked: return "SpvDecorationCPacked";
+ case SpvDecorationBuiltIn: return "SpvDecorationBuiltIn";
+ case SpvDecorationNoPerspective: return "SpvDecorationNoPerspective";
+ case SpvDecorationFlat: return "SpvDecorationFlat";
+ case SpvDecorationPatch: return "SpvDecorationPatch";
+ case SpvDecorationCentroid: return "SpvDecorationCentroid";
+ case SpvDecorationSample: return "SpvDecorationSample";
+ case SpvDecorationInvariant: return "SpvDecorationInvariant";
+ case SpvDecorationRestrict: return "SpvDecorationRestrict";
+ case SpvDecorationAliased: return "SpvDecorationAliased";
+ case SpvDecorationVolatile: return "SpvDecorationVolatile";
+ case SpvDecorationConstant: return "SpvDecorationConstant";
+ case SpvDecorationCoherent: return "SpvDecorationCoherent";
+ case SpvDecorationNonWritable: return "SpvDecorationNonWritable";
+ case SpvDecorationNonReadable: return "SpvDecorationNonReadable";
+ case SpvDecorationUniform: return "SpvDecorationUniform";
+ case SpvDecorationSaturatedConversion: return "SpvDecorationSaturatedConversion";
+ case SpvDecorationStream: return "SpvDecorationStream";
+ case SpvDecorationLocation: return "SpvDecorationLocation";
+ case SpvDecorationComponent: return "SpvDecorationComponent";
+ case SpvDecorationIndex: return "SpvDecorationIndex";
+ case SpvDecorationBinding: return "SpvDecorationBinding";
+ case SpvDecorationDescriptorSet: return "SpvDecorationDescriptorSet";
+ case SpvDecorationOffset: return "SpvDecorationOffset";
+ case SpvDecorationXfbBuffer: return "SpvDecorationXfbBuffer";
+ case SpvDecorationXfbStride: return "SpvDecorationXfbStride";
+ case SpvDecorationFuncParamAttr: return "SpvDecorationFuncParamAttr";
+ case SpvDecorationFPRoundingMode: return "SpvDecorationFPRoundingMode";
+ case SpvDecorationFPFastMathMode: return "SpvDecorationFPFastMathMode";
+ case SpvDecorationLinkageAttributes: return "SpvDecorationLinkageAttributes";
+ case SpvDecorationNoContraction: return "SpvDecorationNoContraction";
+ case SpvDecorationInputAttachmentIndex: return "SpvDecorationInputAttachmentIndex";
+ case SpvDecorationAlignment: return "SpvDecorationAlignment";
+ case SpvDecorationMaxByteOffset: return "SpvDecorationMaxByteOffset";
+ case SpvDecorationAlignmentId: return "SpvDecorationAlignmentId";
+ case SpvDecorationMaxByteOffsetId: return "SpvDecorationMaxByteOffsetId";
+ case SpvDecorationExplicitInterpAMD: return "SpvDecorationExplicitInterpAMD";
+ case SpvDecorationOverrideCoverageNV: return "SpvDecorationOverrideCoverageNV";
+ case SpvDecorationPassthroughNV: return "SpvDecorationPassthroughNV";
+ case SpvDecorationViewportRelativeNV: return "SpvDecorationViewportRelativeNV";
+ case SpvDecorationSecondaryViewportRelativeNV: return "SpvDecorationSecondaryViewportRelativeNV";
+ case SpvDecorationMax: break; /* silence warnings about unhandled enums. */
+ }
+
+ return "unknown";
+}
+
+const char *
+spirv_op_to_string(SpvOp v)
+{
+ switch (v) {
+ case SpvOpNop: return "SpvOpNop";
+ case SpvOpUndef: return "SpvOpUndef";
+ case SpvOpSourceContinued: return "SpvOpSourceContinued";
+ case SpvOpSource: return "SpvOpSource";
+ case SpvOpSourceExtension: return "SpvOpSourceExtension";
+ case SpvOpName: return "SpvOpName";
+ case SpvOpMemberName: return "SpvOpMemberName";
+ case SpvOpString: return "SpvOpString";
+ case SpvOpLine: return "SpvOpLine";
+ case SpvOpExtension: return "SpvOpExtension";
+ case SpvOpExtInstImport: return "SpvOpExtInstImport";
+ case SpvOpExtInst: return "SpvOpExtInst";
+ case SpvOpMemoryModel: return "SpvOpMemoryModel";
+ case SpvOpEntryPoint: return "SpvOpEntryPoint";
+ case SpvOpExecutionMode: return "SpvOpExecutionMode";
+ case SpvOpCapability: return "SpvOpCapability";
+ case SpvOpTypeVoid: return "SpvOpTypeVoid";
+ case SpvOpTypeBool: return "SpvOpTypeBool";
+ case SpvOpTypeInt: return "SpvOpTypeInt";
+ case SpvOpTypeFloat: return "SpvOpTypeFloat";
+ case SpvOpTypeVector: return "SpvOpTypeVector";
+ case SpvOpTypeMatrix: return "SpvOpTypeMatrix";
+ case SpvOpTypeImage: return "SpvOpTypeImage";
+ case SpvOpTypeSampler: return "SpvOpTypeSampler";
+ case SpvOpTypeSampledImage: return "SpvOpTypeSampledImage";
+ case SpvOpTypeArray: return "SpvOpTypeArray";
+ case SpvOpTypeRuntimeArray: return "SpvOpTypeRuntimeArray";
+ case SpvOpTypeStruct: return "SpvOpTypeStruct";
+ case SpvOpTypeOpaque: return "SpvOpTypeOpaque";
+ case SpvOpTypePointer: return "SpvOpTypePointer";
+ case SpvOpTypeFunction: return "SpvOpTypeFunction";
+ case SpvOpTypeEvent: return "SpvOpTypeEvent";
+ case SpvOpTypeDeviceEvent: return "SpvOpTypeDeviceEvent";
+ case SpvOpTypeReserveId: return "SpvOpTypeReserveId";
+ case SpvOpTypeQueue: return "SpvOpTypeQueue";
+ case SpvOpTypePipe: return "SpvOpTypePipe";
+ case SpvOpTypeForwardPointer: return "SpvOpTypeForwardPointer";
+ case SpvOpConstantTrue: return "SpvOpConstantTrue";
+ case SpvOpConstantFalse: return "SpvOpConstantFalse";
+ case SpvOpConstant: return "SpvOpConstant";
+ case SpvOpConstantComposite: return "SpvOpConstantComposite";
+ case SpvOpConstantSampler: return "SpvOpConstantSampler";
+ case SpvOpConstantNull: return "SpvOpConstantNull";
+ case SpvOpSpecConstantTrue: return "SpvOpSpecConstantTrue";
+ case SpvOpSpecConstantFalse: return "SpvOpSpecConstantFalse";
+ case SpvOpSpecConstant: return "SpvOpSpecConstant";
+ case SpvOpSpecConstantComposite: return "SpvOpSpecConstantComposite";
+ case SpvOpSpecConstantOp: return "SpvOpSpecConstantOp";
+ case SpvOpFunction: return "SpvOpFunction";
+ case SpvOpFunctionParameter: return "SpvOpFunctionParameter";
+ case SpvOpFunctionEnd: return "SpvOpFunctionEnd";
+ case SpvOpFunctionCall: return "SpvOpFunctionCall";
+ case SpvOpVariable: return "SpvOpVariable";
+ case SpvOpImageTexelPointer: return "SpvOpImageTexelPointer";
+ case SpvOpLoad: return "SpvOpLoad";
+ case SpvOpStore: return "SpvOpStore";
+ case SpvOpCopyMemory: return "SpvOpCopyMemory";
+ case SpvOpCopyMemorySized: return "SpvOpCopyMemorySized";
+ case SpvOpAccessChain: return "SpvOpAccessChain";
+ case SpvOpInBoundsAccessChain: return "SpvOpInBoundsAccessChain";
+ case SpvOpPtrAccessChain: return "SpvOpPtrAccessChain";
+ case SpvOpArrayLength: return "SpvOpArrayLength";
+ case SpvOpGenericPtrMemSemantics: return "SpvOpGenericPtrMemSemantics";
+ case SpvOpInBoundsPtrAccessChain: return "SpvOpInBoundsPtrAccessChain";
+ case SpvOpDecorate: return "SpvOpDecorate";
+ case SpvOpMemberDecorate: return "SpvOpMemberDecorate";
+ case SpvOpDecorationGroup: return "SpvOpDecorationGroup";
+ case SpvOpGroupDecorate: return "SpvOpGroupDecorate";
+ case SpvOpGroupMemberDecorate: return "SpvOpGroupMemberDecorate";
+ case SpvOpVectorExtractDynamic: return "SpvOpVectorExtractDynamic";
+ case SpvOpVectorInsertDynamic: return "SpvOpVectorInsertDynamic";
+ case SpvOpVectorShuffle: return "SpvOpVectorShuffle";
+ case SpvOpCompositeConstruct: return "SpvOpCompositeConstruct";
+ case SpvOpCompositeExtract: return "SpvOpCompositeExtract";
+ case SpvOpCompositeInsert: return "SpvOpCompositeInsert";
+ case SpvOpCopyObject: return "SpvOpCopyObject";
+ case SpvOpTranspose: return "SpvOpTranspose";
+ case SpvOpSampledImage: return "SpvOpSampledImage";
+ case SpvOpImageSampleImplicitLod: return "SpvOpImageSampleImplicitLod";
+ case SpvOpImageSampleExplicitLod: return "SpvOpImageSampleExplicitLod";
+ case SpvOpImageSampleDrefImplicitLod: return "SpvOpImageSampleDrefImplicitLod";
+ case SpvOpImageSampleDrefExplicitLod: return "SpvOpImageSampleDrefExplicitLod";
+ case SpvOpImageSampleProjImplicitLod: return "SpvOpImageSampleProjImplicitLod";
+ case SpvOpImageSampleProjExplicitLod: return "SpvOpImageSampleProjExplicitLod";
+ case SpvOpImageSampleProjDrefImplicitLod: return "SpvOpImageSampleProjDrefImplicitLod";
+ case SpvOpImageSampleProjDrefExplicitLod: return "SpvOpImageSampleProjDrefExplicitLod";
+ case SpvOpImageFetch: return "SpvOpImageFetch";
+ case SpvOpImageGather: return "SpvOpImageGather";
+ case SpvOpImageDrefGather: return "SpvOpImageDrefGather";
+ case SpvOpImageRead: return "SpvOpImageRead";
+ case SpvOpImageWrite: return "SpvOpImageWrite";
+ case SpvOpImage: return "SpvOpImage";
+ case SpvOpImageQueryFormat: return "SpvOpImageQueryFormat";
+ case SpvOpImageQueryOrder: return "SpvOpImageQueryOrder";
+ case SpvOpImageQuerySizeLod: return "SpvOpImageQuerySizeLod";
+ case SpvOpImageQuerySize: return "SpvOpImageQuerySize";
+ case SpvOpImageQueryLod: return "SpvOpImageQueryLod";
+ case SpvOpImageQueryLevels: return "SpvOpImageQueryLevels";
+ case SpvOpImageQuerySamples: return "SpvOpImageQuerySamples";
+ case SpvOpConvertFToU: return "SpvOpConvertFToU";
+ case SpvOpConvertFToS: return "SpvOpConvertFToS";
+ case SpvOpConvertSToF: return "SpvOpConvertSToF";
+ case SpvOpConvertUToF: return "SpvOpConvertUToF";
+ case SpvOpUConvert: return "SpvOpUConvert";
+ case SpvOpSConvert: return "SpvOpSConvert";
+ case SpvOpFConvert: return "SpvOpFConvert";
+ case SpvOpQuantizeToF16: return "SpvOpQuantizeToF16";
+ case SpvOpConvertPtrToU: return "SpvOpConvertPtrToU";
+ case SpvOpSatConvertSToU: return "SpvOpSatConvertSToU";
+ case SpvOpSatConvertUToS: return "SpvOpSatConvertUToS";
+ case SpvOpConvertUToPtr: return "SpvOpConvertUToPtr";
+ case SpvOpPtrCastToGeneric: return "SpvOpPtrCastToGeneric";
+ case SpvOpGenericCastToPtr: return "SpvOpGenericCastToPtr";
+ case SpvOpGenericCastToPtrExplicit: return "SpvOpGenericCastToPtrExplicit";
+ case SpvOpBitcast: return "SpvOpBitcast";
+ case SpvOpSNegate: return "SpvOpSNegate";
+ case SpvOpFNegate: return "SpvOpFNegate";
+ case SpvOpIAdd: return "SpvOpIAdd";
+ case SpvOpFAdd: return "SpvOpFAdd";
+ case SpvOpISub: return "SpvOpISub";
+ case SpvOpFSub: return "SpvOpFSub";
+ case SpvOpIMul: return "SpvOpIMul";
+ case SpvOpFMul: return "SpvOpFMul";
+ case SpvOpUDiv: return "SpvOpUDiv";
+ case SpvOpSDiv: return "SpvOpSDiv";
+ case SpvOpFDiv: return "SpvOpFDiv";
+ case SpvOpUMod: return "SpvOpUMod";
+ case SpvOpSRem: return "SpvOpSRem";
+ case SpvOpSMod: return "SpvOpSMod";
+ case SpvOpFRem: return "SpvOpFRem";
+ case SpvOpFMod: return "SpvOpFMod";
+ case SpvOpVectorTimesScalar: return "SpvOpVectorTimesScalar";
+ case SpvOpMatrixTimesScalar: return "SpvOpMatrixTimesScalar";
+ case SpvOpVectorTimesMatrix: return "SpvOpVectorTimesMatrix";
+ case SpvOpMatrixTimesVector: return "SpvOpMatrixTimesVector";
+ case SpvOpMatrixTimesMatrix: return "SpvOpMatrixTimesMatrix";
+ case SpvOpOuterProduct: return "SpvOpOuterProduct";
+ case SpvOpDot: return "SpvOpDot";
+ case SpvOpIAddCarry: return "SpvOpIAddCarry";
+ case SpvOpISubBorrow: return "SpvOpISubBorrow";
+ case SpvOpUMulExtended: return "SpvOpUMulExtended";
+ case SpvOpSMulExtended: return "SpvOpSMulExtended";
+ case SpvOpAny: return "SpvOpAny";
+ case SpvOpAll: return "SpvOpAll";
+ case SpvOpIsNan: return "SpvOpIsNan";
+ case SpvOpIsInf: return "SpvOpIsInf";
+ case SpvOpIsFinite: return "SpvOpIsFinite";
+ case SpvOpIsNormal: return "SpvOpIsNormal";
+ case SpvOpSignBitSet: return "SpvOpSignBitSet";
+ case SpvOpLessOrGreater: return "SpvOpLessOrGreater";
+ case SpvOpOrdered: return "SpvOpOrdered";
+ case SpvOpUnordered: return "SpvOpUnordered";
+ case SpvOpLogicalEqual: return "SpvOpLogicalEqual";
+ case SpvOpLogicalNotEqual: return "SpvOpLogicalNotEqual";
+ case SpvOpLogicalOr: return "SpvOpLogicalOr";
+ case SpvOpLogicalAnd: return "SpvOpLogicalAnd";
+ case SpvOpLogicalNot: return "SpvOpLogicalNot";
+ case SpvOpSelect: return "SpvOpSelect";
+ case SpvOpIEqual: return "SpvOpIEqual";
+ case SpvOpINotEqual: return "SpvOpINotEqual";
+ case SpvOpUGreaterThan: return "SpvOpUGreaterThan";
+ case SpvOpSGreaterThan: return "SpvOpSGreaterThan";
+ case SpvOpUGreaterThanEqual: return "SpvOpUGreaterThanEqual";
+ case SpvOpSGreaterThanEqual: return "SpvOpSGreaterThanEqual";
+ case SpvOpULessThan: return "SpvOpULessThan";
+ case SpvOpSLessThan: return "SpvOpSLessThan";
+ case SpvOpULessThanEqual: return "SpvOpULessThanEqual";
+ case SpvOpSLessThanEqual: return "SpvOpSLessThanEqual";
+ case SpvOpFOrdEqual: return "SpvOpFOrdEqual";
+ case SpvOpFUnordEqual: return "SpvOpFUnordEqual";
+ case SpvOpFOrdNotEqual: return "SpvOpFOrdNotEqual";
+ case SpvOpFUnordNotEqual: return "SpvOpFUnordNotEqual";
+ case SpvOpFOrdLessThan: return "SpvOpFOrdLessThan";
+ case SpvOpFUnordLessThan: return "SpvOpFUnordLessThan";
+ case SpvOpFOrdGreaterThan: return "SpvOpFOrdGreaterThan";
+ case SpvOpFUnordGreaterThan: return "SpvOpFUnordGreaterThan";
+ case SpvOpFOrdLessThanEqual: return "SpvOpFOrdLessThanEqual";
+ case SpvOpFUnordLessThanEqual: return "SpvOpFUnordLessThanEqual";
+ case SpvOpFOrdGreaterThanEqual: return "SpvOpFOrdGreaterThanEqual";
+ case SpvOpFUnordGreaterThanEqual: return "SpvOpFUnordGreaterThanEqual";
+ case SpvOpShiftRightLogical: return "SpvOpShiftRightLogical";
+ case SpvOpShiftRightArithmetic: return "SpvOpShiftRightArithmetic";
+ case SpvOpShiftLeftLogical: return "SpvOpShiftLeftLogical";
+ case SpvOpBitwiseOr: return "SpvOpBitwiseOr";
+ case SpvOpBitwiseXor: return "SpvOpBitwiseXor";
+ case SpvOpBitwiseAnd: return "SpvOpBitwiseAnd";
+ case SpvOpNot: return "SpvOpNot";
+ case SpvOpBitFieldInsert: return "SpvOpBitFieldInsert";
+ case SpvOpBitFieldSExtract: return "SpvOpBitFieldSExtract";
+ case SpvOpBitFieldUExtract: return "SpvOpBitFieldUExtract";
+ case SpvOpBitReverse: return "SpvOpBitReverse";
+ case SpvOpBitCount: return "SpvOpBitCount";
+ case SpvOpDPdx: return "SpvOpDPdx";
+ case SpvOpDPdy: return "SpvOpDPdy";
+ case SpvOpFwidth: return "SpvOpFwidth";
+ case SpvOpDPdxFine: return "SpvOpDPdxFine";
+ case SpvOpDPdyFine: return "SpvOpDPdyFine";
+ case SpvOpFwidthFine: return "SpvOpFwidthFine";
+ case SpvOpDPdxCoarse: return "SpvOpDPdxCoarse";
+ case SpvOpDPdyCoarse: return "SpvOpDPdyCoarse";
+ case SpvOpFwidthCoarse: return "SpvOpFwidthCoarse";
+ case SpvOpEmitVertex: return "SpvOpEmitVertex";
+ case SpvOpEndPrimitive: return "SpvOpEndPrimitive";
+ case SpvOpEmitStreamVertex: return "SpvOpEmitStreamVertex";
+ case SpvOpEndStreamPrimitive: return "SpvOpEndStreamPrimitive";
+ case SpvOpControlBarrier: return "SpvOpControlBarrier";
+ case SpvOpMemoryBarrier: return "SpvOpMemoryBarrier";
+ case SpvOpAtomicLoad: return "SpvOpAtomicLoad";
+ case SpvOpAtomicStore: return "SpvOpAtomicStore";
+ case SpvOpAtomicExchange: return "SpvOpAtomicExchange";
+ case SpvOpAtomicCompareExchange: return "SpvOpAtomicCompareExchange";
+ case SpvOpAtomicCompareExchangeWeak: return "SpvOpAtomicCompareExchangeWeak";
+ case SpvOpAtomicIIncrement: return "SpvOpAtomicIIncrement";
+ case SpvOpAtomicIDecrement: return "SpvOpAtomicIDecrement";
+ case SpvOpAtomicIAdd: return "SpvOpAtomicIAdd";
+ case SpvOpAtomicISub: return "SpvOpAtomicISub";
+ case SpvOpAtomicSMin: return "SpvOpAtomicSMin";
+ case SpvOpAtomicUMin: return "SpvOpAtomicUMin";
+ case SpvOpAtomicSMax: return "SpvOpAtomicSMax";
+ case SpvOpAtomicUMax: return "SpvOpAtomicUMax";
+ case SpvOpAtomicAnd: return "SpvOpAtomicAnd";
+ case SpvOpAtomicOr: return "SpvOpAtomicOr";
+ case SpvOpAtomicXor: return "SpvOpAtomicXor";
+ case SpvOpPhi: return "SpvOpPhi";
+ case SpvOpLoopMerge: return "SpvOpLoopMerge";
+ case SpvOpSelectionMerge: return "SpvOpSelectionMerge";
+ case SpvOpLabel: return "SpvOpLabel";
+ case SpvOpBranch: return "SpvOpBranch";
+ case SpvOpBranchConditional: return "SpvOpBranchConditional";
+ case SpvOpSwitch: return "SpvOpSwitch";
+ case SpvOpKill: return "SpvOpKill";
+ case SpvOpReturn: return "SpvOpReturn";
+ case SpvOpReturnValue: return "SpvOpReturnValue";
+ case SpvOpUnreachable: return "SpvOpUnreachable";
+ case SpvOpLifetimeStart: return "SpvOpLifetimeStart";
+ case SpvOpLifetimeStop: return "SpvOpLifetimeStop";
+ case SpvOpGroupAsyncCopy: return "SpvOpGroupAsyncCopy";
+ case SpvOpGroupWaitEvents: return "SpvOpGroupWaitEvents";
+ case SpvOpGroupAll: return "SpvOpGroupAll";
+ case SpvOpGroupAny: return "SpvOpGroupAny";
+ case SpvOpGroupBroadcast: return "SpvOpGroupBroadcast";
+ case SpvOpGroupIAdd: return "SpvOpGroupIAdd";
+ case SpvOpGroupFAdd: return "SpvOpGroupFAdd";
+ case SpvOpGroupFMin: return "SpvOpGroupFMin";
+ case SpvOpGroupUMin: return "SpvOpGroupUMin";
+ case SpvOpGroupSMin: return "SpvOpGroupSMin";
+ case SpvOpGroupFMax: return "SpvOpGroupFMax";
+ case SpvOpGroupUMax: return "SpvOpGroupUMax";
+ case SpvOpGroupSMax: return "SpvOpGroupSMax";
+ case SpvOpReadPipe: return "SpvOpReadPipe";
+ case SpvOpWritePipe: return "SpvOpWritePipe";
+ case SpvOpReservedReadPipe: return "SpvOpReservedReadPipe";
+ case SpvOpReservedWritePipe: return "SpvOpReservedWritePipe";
+ case SpvOpReserveReadPipePackets: return "SpvOpReserveReadPipePackets";
+ case SpvOpReserveWritePipePackets: return "SpvOpReserveWritePipePackets";
+ case SpvOpCommitReadPipe: return "SpvOpCommitReadPipe";
+ case SpvOpCommitWritePipe: return "SpvOpCommitWritePipe";
+ case SpvOpIsValidReserveId: return "SpvOpIsValidReserveId";
+ case SpvOpGetNumPipePackets: return "SpvOpGetNumPipePackets";
+ case SpvOpGetMaxPipePackets: return "SpvOpGetMaxPipePackets";
+ case SpvOpGroupReserveReadPipePackets: return "SpvOpGroupReserveReadPipePackets";
+ case SpvOpGroupReserveWritePipePackets: return "SpvOpGroupReserveWritePipePackets";
+ case SpvOpGroupCommitReadPipe: return "SpvOpGroupCommitReadPipe";
+ case SpvOpGroupCommitWritePipe: return "SpvOpGroupCommitWritePipe";
+ case SpvOpEnqueueMarker: return "SpvOpEnqueueMarker";
+ case SpvOpEnqueueKernel: return "SpvOpEnqueueKernel";
+ case SpvOpGetKernelNDrangeSubGroupCount: return "SpvOpGetKernelNDrangeSubGroupCount";
+ case SpvOpGetKernelNDrangeMaxSubGroupSize: return "SpvOpGetKernelNDrangeMaxSubGroupSize";
+ case SpvOpGetKernelWorkGroupSize: return "SpvOpGetKernelWorkGroupSize";
+ case SpvOpGetKernelPreferredWorkGroupSizeMultiple: return "SpvOpGetKernelPreferredWorkGroupSizeMultiple";
+ case SpvOpRetainEvent: return "SpvOpRetainEvent";
+ case SpvOpReleaseEvent: return "SpvOpReleaseEvent";
+ case SpvOpCreateUserEvent: return "SpvOpCreateUserEvent";
+ case SpvOpIsValidEvent: return "SpvOpIsValidEvent";
+ case SpvOpSetUserEventStatus: return "SpvOpSetUserEventStatus";
+ case SpvOpCaptureEventProfilingInfo: return "SpvOpCaptureEventProfilingInfo";
+ case SpvOpGetDefaultQueue: return "SpvOpGetDefaultQueue";
+ case SpvOpBuildNDRange: return "SpvOpBuildNDRange";
+ case SpvOpImageSparseSampleImplicitLod: return "SpvOpImageSparseSampleImplicitLod";
+ case SpvOpImageSparseSampleExplicitLod: return "SpvOpImageSparseSampleExplicitLod";
+ case SpvOpImageSparseSampleDrefImplicitLod: return "SpvOpImageSparseSampleDrefImplicitLod";
+ case SpvOpImageSparseSampleDrefExplicitLod: return "SpvOpImageSparseSampleDrefExplicitLod";
+ case SpvOpImageSparseSampleProjImplicitLod: return "SpvOpImageSparseSampleProjImplicitLod";
+ case SpvOpImageSparseSampleProjExplicitLod: return "SpvOpImageSparseSampleProjExplicitLod";
+ case SpvOpImageSparseSampleProjDrefImplicitLod: return "SpvOpImageSparseSampleProjDrefImplicitLod";
+ case SpvOpImageSparseSampleProjDrefExplicitLod: return "SpvOpImageSparseSampleProjDrefExplicitLod";
+ case SpvOpImageSparseFetch: return "SpvOpImageSparseFetch";
+ case SpvOpImageSparseGather: return "SpvOpImageSparseGather";
+ case SpvOpImageSparseDrefGather: return "SpvOpImageSparseDrefGather";
+ case SpvOpImageSparseTexelsResident: return "SpvOpImageSparseTexelsResident";
+ case SpvOpNoLine: return "SpvOpNoLine";
+ case SpvOpAtomicFlagTestAndSet: return "SpvOpAtomicFlagTestAndSet";
+ case SpvOpAtomicFlagClear: return "SpvOpAtomicFlagClear";
+ case SpvOpImageSparseRead: return "SpvOpImageSparseRead";
+ case SpvOpSizeOf: return "SpvOpSizeOf";
+ case SpvOpTypePipeStorage: return "SpvOpTypePipeStorage";
+ case SpvOpConstantPipeStorage: return "SpvOpConstantPipeStorage";
+ case SpvOpCreatePipeFromPipeStorage: return "SpvOpCreatePipeFromPipeStorage";
+ case SpvOpGetKernelLocalSizeForSubgroupCount: return "SpvOpGetKernelLocalSizeForSubgroupCount";
+ case SpvOpGetKernelMaxNumSubgroups: return "SpvOpGetKernelMaxNumSubgroups";
+ case SpvOpTypeNamedBarrier: return "SpvOpTypeNamedBarrier";
+ case SpvOpNamedBarrierInitialize: return "SpvOpNamedBarrierInitialize";
+ case SpvOpMemoryNamedBarrier: return "SpvOpMemoryNamedBarrier";
+ case SpvOpModuleProcessed: return "SpvOpModuleProcessed";
+ case SpvOpExecutionModeId: return "SpvOpExecutionModeId";
+ case SpvOpDecorateId: return "SpvOpDecorateId";
+ case SpvOpSubgroupBallotKHR: return "SpvOpSubgroupBallotKHR";
+ case SpvOpSubgroupFirstInvocationKHR: return "SpvOpSubgroupFirstInvocationKHR";
+ case SpvOpSubgroupAllKHR: return "SpvOpSubgroupAllKHR";
+ case SpvOpSubgroupAnyKHR: return "SpvOpSubgroupAnyKHR";
+ case SpvOpSubgroupAllEqualKHR: return "SpvOpSubgroupAllEqualKHR";
+ case SpvOpSubgroupReadInvocationKHR: return "SpvOpSubgroupReadInvocationKHR";
+ case SpvOpGroupIAddNonUniformAMD: return "SpvOpGroupIAddNonUniformAMD";
+ case SpvOpGroupFAddNonUniformAMD: return "SpvOpGroupFAddNonUniformAMD";
+ case SpvOpGroupFMinNonUniformAMD: return "SpvOpGroupFMinNonUniformAMD";
+ case SpvOpGroupUMinNonUniformAMD: return "SpvOpGroupUMinNonUniformAMD";
+ case SpvOpGroupSMinNonUniformAMD: return "SpvOpGroupSMinNonUniformAMD";
+ case SpvOpGroupFMaxNonUniformAMD: return "SpvOpGroupFMaxNonUniformAMD";
+ case SpvOpGroupUMaxNonUniformAMD: return "SpvOpGroupUMaxNonUniformAMD";
+ case SpvOpGroupSMaxNonUniformAMD: return "SpvOpGroupSMaxNonUniformAMD";
+ case SpvOpFragmentMaskFetchAMD: return "SpvOpFragmentMaskFetchAMD";
+ case SpvOpFragmentFetchAMD: return "SpvOpFragmentFetchAMD";
+ case SpvOpSubgroupShuffleINTEL: return "SpvOpSubgroupShuffleINTEL";
+ case SpvOpSubgroupShuffleDownINTEL: return "SpvOpSubgroupShuffleDownINTEL";
+ case SpvOpSubgroupShuffleUpINTEL: return "SpvOpSubgroupShuffleUpINTEL";
+ case SpvOpSubgroupShuffleXorINTEL: return "SpvOpSubgroupShuffleXorINTEL";
+ case SpvOpSubgroupBlockReadINTEL: return "SpvOpSubgroupBlockReadINTEL";
+ case SpvOpSubgroupBlockWriteINTEL: return "SpvOpSubgroupBlockWriteINTEL";
+ case SpvOpSubgroupImageBlockReadINTEL: return "SpvOpSubgroupImageBlockReadINTEL";
+ case SpvOpSubgroupImageBlockWriteINTEL: return "SpvOpSubgroupImageBlockWriteINTEL";
+ case SpvOpMax: break; /* silence warnings about unhandled enums. */
+ }
+
+ return "unknown";
+}
diff --git a/prebuilt-intermediates/spirv/vtn_gather_types.c b/prebuilt-intermediates/spirv/vtn_gather_types.c
new file mode 100644
index 0000000..5be5407
--- /dev/null
+++ b/prebuilt-intermediates/spirv/vtn_gather_types.c
@@ -0,0 +1,330 @@
+/*
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/* DO NOT EDIT - This file is generated automatically by the
+ * vtn_gather_types_c.py script
+ */
+
+#include "vtn_private.h"
+
+struct type_args {
+ int res_idx;
+ int res_type_idx;
+};
+
+static struct type_args
+result_type_args_for_opcode(SpvOp opcode)
+{
+ switch (opcode) {
+ case SpvOpUndef: return (struct type_args){ 1, 0 };
+ case SpvOpString: return (struct type_args){ 0, -1 };
+ case SpvOpExtInstImport: return (struct type_args){ 0, -1 };
+ case SpvOpExtInst: return (struct type_args){ 1, 0 };
+ case SpvOpTypeVoid: return (struct type_args){ 0, -1 };
+ case SpvOpTypeBool: return (struct type_args){ 0, -1 };
+ case SpvOpTypeInt: return (struct type_args){ 0, -1 };
+ case SpvOpTypeFloat: return (struct type_args){ 0, -1 };
+ case SpvOpTypeVector: return (struct type_args){ 0, -1 };
+ case SpvOpTypeMatrix: return (struct type_args){ 0, -1 };
+ case SpvOpTypeImage: return (struct type_args){ 0, -1 };
+ case SpvOpTypeSampler: return (struct type_args){ 0, -1 };
+ case SpvOpTypeSampledImage: return (struct type_args){ 0, -1 };
+ case SpvOpTypeArray: return (struct type_args){ 0, -1 };
+ case SpvOpTypeRuntimeArray: return (struct type_args){ 0, -1 };
+ case SpvOpTypeStruct: return (struct type_args){ 0, -1 };
+ case SpvOpTypeOpaque: return (struct type_args){ 0, -1 };
+ case SpvOpTypePointer: return (struct type_args){ 0, -1 };
+ case SpvOpTypeFunction: return (struct type_args){ 0, -1 };
+ case SpvOpTypeEvent: return (struct type_args){ 0, -1 };
+ case SpvOpTypeDeviceEvent: return (struct type_args){ 0, -1 };
+ case SpvOpTypeReserveId: return (struct type_args){ 0, -1 };
+ case SpvOpTypeQueue: return (struct type_args){ 0, -1 };
+ case SpvOpTypePipe: return (struct type_args){ 0, -1 };
+ case SpvOpConstantTrue: return (struct type_args){ 1, 0 };
+ case SpvOpConstantFalse: return (struct type_args){ 1, 0 };
+ case SpvOpConstant: return (struct type_args){ 1, 0 };
+ case SpvOpConstantComposite: return (struct type_args){ 1, 0 };
+ case SpvOpConstantSampler: return (struct type_args){ 1, 0 };
+ case SpvOpConstantNull: return (struct type_args){ 1, 0 };
+ case SpvOpSpecConstantTrue: return (struct type_args){ 1, 0 };
+ case SpvOpSpecConstantFalse: return (struct type_args){ 1, 0 };
+ case SpvOpSpecConstant: return (struct type_args){ 1, 0 };
+ case SpvOpSpecConstantComposite: return (struct type_args){ 1, 0 };
+ case SpvOpSpecConstantOp: return (struct type_args){ 1, 0 };
+ case SpvOpFunction: return (struct type_args){ 1, 0 };
+ case SpvOpFunctionParameter: return (struct type_args){ 1, 0 };
+ case SpvOpFunctionCall: return (struct type_args){ 1, 0 };
+ case SpvOpVariable: return (struct type_args){ 1, 0 };
+ case SpvOpImageTexelPointer: return (struct type_args){ 1, 0 };
+ case SpvOpLoad: return (struct type_args){ 1, 0 };
+ case SpvOpAccessChain: return (struct type_args){ 1, 0 };
+ case SpvOpInBoundsAccessChain: return (struct type_args){ 1, 0 };
+ case SpvOpPtrAccessChain: return (struct type_args){ 1, 0 };
+ case SpvOpArrayLength: return (struct type_args){ 1, 0 };
+ case SpvOpGenericPtrMemSemantics: return (struct type_args){ 1, 0 };
+ case SpvOpInBoundsPtrAccessChain: return (struct type_args){ 1, 0 };
+ case SpvOpDecorationGroup: return (struct type_args){ 0, -1 };
+ case SpvOpVectorExtractDynamic: return (struct type_args){ 1, 0 };
+ case SpvOpVectorInsertDynamic: return (struct type_args){ 1, 0 };
+ case SpvOpVectorShuffle: return (struct type_args){ 1, 0 };
+ case SpvOpCompositeConstruct: return (struct type_args){ 1, 0 };
+ case SpvOpCompositeExtract: return (struct type_args){ 1, 0 };
+ case SpvOpCompositeInsert: return (struct type_args){ 1, 0 };
+ case SpvOpCopyObject: return (struct type_args){ 1, 0 };
+ case SpvOpTranspose: return (struct type_args){ 1, 0 };
+ case SpvOpSampledImage: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleDrefImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleDrefExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleProjImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleProjExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleProjDrefImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSampleProjDrefExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageFetch: return (struct type_args){ 1, 0 };
+ case SpvOpImageGather: return (struct type_args){ 1, 0 };
+ case SpvOpImageDrefGather: return (struct type_args){ 1, 0 };
+ case SpvOpImageRead: return (struct type_args){ 1, 0 };
+ case SpvOpImage: return (struct type_args){ 1, 0 };
+ case SpvOpImageQueryFormat: return (struct type_args){ 1, 0 };
+ case SpvOpImageQueryOrder: return (struct type_args){ 1, 0 };
+ case SpvOpImageQuerySizeLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageQuerySize: return (struct type_args){ 1, 0 };
+ case SpvOpImageQueryLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageQueryLevels: return (struct type_args){ 1, 0 };
+ case SpvOpImageQuerySamples: return (struct type_args){ 1, 0 };
+ case SpvOpConvertFToU: return (struct type_args){ 1, 0 };
+ case SpvOpConvertFToS: return (struct type_args){ 1, 0 };
+ case SpvOpConvertSToF: return (struct type_args){ 1, 0 };
+ case SpvOpConvertUToF: return (struct type_args){ 1, 0 };
+ case SpvOpUConvert: return (struct type_args){ 1, 0 };
+ case SpvOpSConvert: return (struct type_args){ 1, 0 };
+ case SpvOpFConvert: return (struct type_args){ 1, 0 };
+ case SpvOpQuantizeToF16: return (struct type_args){ 1, 0 };
+ case SpvOpConvertPtrToU: return (struct type_args){ 1, 0 };
+ case SpvOpSatConvertSToU: return (struct type_args){ 1, 0 };
+ case SpvOpSatConvertUToS: return (struct type_args){ 1, 0 };
+ case SpvOpConvertUToPtr: return (struct type_args){ 1, 0 };
+ case SpvOpPtrCastToGeneric: return (struct type_args){ 1, 0 };
+ case SpvOpGenericCastToPtr: return (struct type_args){ 1, 0 };
+ case SpvOpGenericCastToPtrExplicit: return (struct type_args){ 1, 0 };
+ case SpvOpBitcast: return (struct type_args){ 1, 0 };
+ case SpvOpSNegate: return (struct type_args){ 1, 0 };
+ case SpvOpFNegate: return (struct type_args){ 1, 0 };
+ case SpvOpIAdd: return (struct type_args){ 1, 0 };
+ case SpvOpFAdd: return (struct type_args){ 1, 0 };
+ case SpvOpISub: return (struct type_args){ 1, 0 };
+ case SpvOpFSub: return (struct type_args){ 1, 0 };
+ case SpvOpIMul: return (struct type_args){ 1, 0 };
+ case SpvOpFMul: return (struct type_args){ 1, 0 };
+ case SpvOpUDiv: return (struct type_args){ 1, 0 };
+ case SpvOpSDiv: return (struct type_args){ 1, 0 };
+ case SpvOpFDiv: return (struct type_args){ 1, 0 };
+ case SpvOpUMod: return (struct type_args){ 1, 0 };
+ case SpvOpSRem: return (struct type_args){ 1, 0 };
+ case SpvOpSMod: return (struct type_args){ 1, 0 };
+ case SpvOpFRem: return (struct type_args){ 1, 0 };
+ case SpvOpFMod: return (struct type_args){ 1, 0 };
+ case SpvOpVectorTimesScalar: return (struct type_args){ 1, 0 };
+ case SpvOpMatrixTimesScalar: return (struct type_args){ 1, 0 };
+ case SpvOpVectorTimesMatrix: return (struct type_args){ 1, 0 };
+ case SpvOpMatrixTimesVector: return (struct type_args){ 1, 0 };
+ case SpvOpMatrixTimesMatrix: return (struct type_args){ 1, 0 };
+ case SpvOpOuterProduct: return (struct type_args){ 1, 0 };
+ case SpvOpDot: return (struct type_args){ 1, 0 };
+ case SpvOpIAddCarry: return (struct type_args){ 1, 0 };
+ case SpvOpISubBorrow: return (struct type_args){ 1, 0 };
+ case SpvOpUMulExtended: return (struct type_args){ 1, 0 };
+ case SpvOpSMulExtended: return (struct type_args){ 1, 0 };
+ case SpvOpAny: return (struct type_args){ 1, 0 };
+ case SpvOpAll: return (struct type_args){ 1, 0 };
+ case SpvOpIsNan: return (struct type_args){ 1, 0 };
+ case SpvOpIsInf: return (struct type_args){ 1, 0 };
+ case SpvOpIsFinite: return (struct type_args){ 1, 0 };
+ case SpvOpIsNormal: return (struct type_args){ 1, 0 };
+ case SpvOpSignBitSet: return (struct type_args){ 1, 0 };
+ case SpvOpLessOrGreater: return (struct type_args){ 1, 0 };
+ case SpvOpOrdered: return (struct type_args){ 1, 0 };
+ case SpvOpUnordered: return (struct type_args){ 1, 0 };
+ case SpvOpLogicalEqual: return (struct type_args){ 1, 0 };
+ case SpvOpLogicalNotEqual: return (struct type_args){ 1, 0 };
+ case SpvOpLogicalOr: return (struct type_args){ 1, 0 };
+ case SpvOpLogicalAnd: return (struct type_args){ 1, 0 };
+ case SpvOpLogicalNot: return (struct type_args){ 1, 0 };
+ case SpvOpSelect: return (struct type_args){ 1, 0 };
+ case SpvOpIEqual: return (struct type_args){ 1, 0 };
+ case SpvOpINotEqual: return (struct type_args){ 1, 0 };
+ case SpvOpUGreaterThan: return (struct type_args){ 1, 0 };
+ case SpvOpSGreaterThan: return (struct type_args){ 1, 0 };
+ case SpvOpUGreaterThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpSGreaterThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpULessThan: return (struct type_args){ 1, 0 };
+ case SpvOpSLessThan: return (struct type_args){ 1, 0 };
+ case SpvOpULessThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpSLessThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdNotEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordNotEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdLessThan: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordLessThan: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdGreaterThan: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordGreaterThan: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdLessThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordLessThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFOrdGreaterThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpFUnordGreaterThanEqual: return (struct type_args){ 1, 0 };
+ case SpvOpShiftRightLogical: return (struct type_args){ 1, 0 };
+ case SpvOpShiftRightArithmetic: return (struct type_args){ 1, 0 };
+ case SpvOpShiftLeftLogical: return (struct type_args){ 1, 0 };
+ case SpvOpBitwiseOr: return (struct type_args){ 1, 0 };
+ case SpvOpBitwiseXor: return (struct type_args){ 1, 0 };
+ case SpvOpBitwiseAnd: return (struct type_args){ 1, 0 };
+ case SpvOpNot: return (struct type_args){ 1, 0 };
+ case SpvOpBitFieldInsert: return (struct type_args){ 1, 0 };
+ case SpvOpBitFieldSExtract: return (struct type_args){ 1, 0 };
+ case SpvOpBitFieldUExtract: return (struct type_args){ 1, 0 };
+ case SpvOpBitReverse: return (struct type_args){ 1, 0 };
+ case SpvOpBitCount: return (struct type_args){ 1, 0 };
+ case SpvOpDPdx: return (struct type_args){ 1, 0 };
+ case SpvOpDPdy: return (struct type_args){ 1, 0 };
+ case SpvOpFwidth: return (struct type_args){ 1, 0 };
+ case SpvOpDPdxFine: return (struct type_args){ 1, 0 };
+ case SpvOpDPdyFine: return (struct type_args){ 1, 0 };
+ case SpvOpFwidthFine: return (struct type_args){ 1, 0 };
+ case SpvOpDPdxCoarse: return (struct type_args){ 1, 0 };
+ case SpvOpDPdyCoarse: return (struct type_args){ 1, 0 };
+ case SpvOpFwidthCoarse: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicLoad: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicExchange: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicCompareExchange: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicCompareExchangeWeak: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicIIncrement: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicIDecrement: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicIAdd: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicISub: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicSMin: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicUMin: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicSMax: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicUMax: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicAnd: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicOr: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicXor: return (struct type_args){ 1, 0 };
+ case SpvOpPhi: return (struct type_args){ 1, 0 };
+ case SpvOpLabel: return (struct type_args){ 0, -1 };
+ case SpvOpGroupAsyncCopy: return (struct type_args){ 1, 0 };
+ case SpvOpGroupAll: return (struct type_args){ 1, 0 };
+ case SpvOpGroupAny: return (struct type_args){ 1, 0 };
+ case SpvOpGroupBroadcast: return (struct type_args){ 1, 0 };
+ case SpvOpGroupIAdd: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFAdd: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFMin: return (struct type_args){ 1, 0 };
+ case SpvOpGroupUMin: return (struct type_args){ 1, 0 };
+ case SpvOpGroupSMin: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFMax: return (struct type_args){ 1, 0 };
+ case SpvOpGroupUMax: return (struct type_args){ 1, 0 };
+ case SpvOpGroupSMax: return (struct type_args){ 1, 0 };
+ case SpvOpReadPipe: return (struct type_args){ 1, 0 };
+ case SpvOpWritePipe: return (struct type_args){ 1, 0 };
+ case SpvOpReservedReadPipe: return (struct type_args){ 1, 0 };
+ case SpvOpReservedWritePipe: return (struct type_args){ 1, 0 };
+ case SpvOpReserveReadPipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpReserveWritePipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpIsValidReserveId: return (struct type_args){ 1, 0 };
+ case SpvOpGetNumPipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpGetMaxPipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpGroupReserveReadPipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpGroupReserveWritePipePackets: return (struct type_args){ 1, 0 };
+ case SpvOpEnqueueMarker: return (struct type_args){ 1, 0 };
+ case SpvOpEnqueueKernel: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelNDrangeSubGroupCount: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelNDrangeMaxSubGroupSize: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelWorkGroupSize: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelPreferredWorkGroupSizeMultiple: return (struct type_args){ 1, 0 };
+ case SpvOpCreateUserEvent: return (struct type_args){ 1, 0 };
+ case SpvOpIsValidEvent: return (struct type_args){ 1, 0 };
+ case SpvOpGetDefaultQueue: return (struct type_args){ 1, 0 };
+ case SpvOpBuildNDRange: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleDrefImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleDrefExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleProjImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleProjExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleProjDrefImplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseSampleProjDrefExplicitLod: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseFetch: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseGather: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseDrefGather: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseTexelsResident: return (struct type_args){ 1, 0 };
+ case SpvOpAtomicFlagTestAndSet: return (struct type_args){ 1, 0 };
+ case SpvOpImageSparseRead: return (struct type_args){ 1, 0 };
+ case SpvOpSizeOf: return (struct type_args){ 1, 0 };
+ case SpvOpTypePipeStorage: return (struct type_args){ 0, -1 };
+ case SpvOpConstantPipeStorage: return (struct type_args){ 1, 0 };
+ case SpvOpCreatePipeFromPipeStorage: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelLocalSizeForSubgroupCount: return (struct type_args){ 1, 0 };
+ case SpvOpGetKernelMaxNumSubgroups: return (struct type_args){ 1, 0 };
+ case SpvOpTypeNamedBarrier: return (struct type_args){ 0, -1 };
+ case SpvOpNamedBarrierInitialize: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupBallotKHR: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupFirstInvocationKHR: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupAllKHR: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupAnyKHR: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupAllEqualKHR: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupReadInvocationKHR: return (struct type_args){ 1, 0 };
+ case SpvOpGroupIAddNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFAddNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFMinNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupUMinNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupSMinNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupFMaxNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupUMaxNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpGroupSMaxNonUniformAMD: return (struct type_args){ 1, 0 };
+ case SpvOpFragmentMaskFetchAMD: return (struct type_args){ 1, 0 };
+ case SpvOpFragmentFetchAMD: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupShuffleINTEL: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupShuffleDownINTEL: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupShuffleUpINTEL: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupShuffleXorINTEL: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupBlockReadINTEL: return (struct type_args){ 1, 0 };
+ case SpvOpSubgroupImageBlockReadINTEL: return (struct type_args){ 1, 0 };
+ default: return (struct type_args){ -1, -1 };
+ }
+}
+
+bool
+vtn_set_instruction_result_type(struct vtn_builder *b, SpvOp opcode,
+ const uint32_t *w, unsigned count)
+{
+ struct type_args args = result_type_args_for_opcode(opcode);
+
+ if (args.res_idx >= 0 && args.res_type_idx >= 0) {
+ struct vtn_value *val = vtn_untyped_value(b, w[1 + args.res_idx]);
+ val->type = vtn_value(b, w[1 + args.res_type_idx],
+ vtn_value_type_type)->type;
+ }
+
+ return true;
+}
+
diff --git a/prebuilt-intermediates/util/vk_enum_to_str.c b/prebuilt-intermediates/util/vk_enum_to_str.c
new file mode 100644
index 0000000..3bd0ca1
--- /dev/null
+++ b/prebuilt-intermediates/util/vk_enum_to_str.c
@@ -0,0 +1,2252 @@
+/* Autogenerated file -- do not edit
+ * generated by gen_enum_to_str.py
+ *
+ * Copyright © 2017 Intel Corporation
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+ */
+
+#include <vulkan/vulkan.h>
+#include <vulkan/vk_android_native_buffer.h>
+#include "util/macros.h"
+#include "vk_enum_to_str.h"
+
+
+const char *
+vk_AttachmentLoadOp_to_str(VkAttachmentLoadOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_ATTACHMENT_LOAD_OP_LOAD";
+ case 1:
+ return "VK_ATTACHMENT_LOAD_OP_CLEAR";
+ case 2:
+ return "VK_ATTACHMENT_LOAD_OP_DONT_CARE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_AttachmentStoreOp_to_str(VkAttachmentStoreOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_ATTACHMENT_STORE_OP_STORE";
+ case 1:
+ return "VK_ATTACHMENT_STORE_OP_DONT_CARE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_BlendFactor_to_str(VkBlendFactor input)
+{
+ switch(input) {
+ case 0:
+ return "VK_BLEND_FACTOR_ZERO";
+ case 1:
+ return "VK_BLEND_FACTOR_ONE";
+ case 2:
+ return "VK_BLEND_FACTOR_SRC_COLOR";
+ case 3:
+ return "VK_BLEND_FACTOR_ONE_MINUS_SRC_COLOR";
+ case 4:
+ return "VK_BLEND_FACTOR_DST_COLOR";
+ case 5:
+ return "VK_BLEND_FACTOR_ONE_MINUS_DST_COLOR";
+ case 6:
+ return "VK_BLEND_FACTOR_SRC_ALPHA";
+ case 7:
+ return "VK_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA";
+ case 8:
+ return "VK_BLEND_FACTOR_DST_ALPHA";
+ case 9:
+ return "VK_BLEND_FACTOR_ONE_MINUS_DST_ALPHA";
+ case 10:
+ return "VK_BLEND_FACTOR_CONSTANT_COLOR";
+ case 11:
+ return "VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR";
+ case 12:
+ return "VK_BLEND_FACTOR_CONSTANT_ALPHA";
+ case 13:
+ return "VK_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA";
+ case 14:
+ return "VK_BLEND_FACTOR_SRC_ALPHA_SATURATE";
+ case 15:
+ return "VK_BLEND_FACTOR_SRC1_COLOR";
+ case 16:
+ return "VK_BLEND_FACTOR_ONE_MINUS_SRC1_COLOR";
+ case 17:
+ return "VK_BLEND_FACTOR_SRC1_ALPHA";
+ case 18:
+ return "VK_BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_BlendOp_to_str(VkBlendOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_BLEND_OP_ADD";
+ case 1:
+ return "VK_BLEND_OP_SUBTRACT";
+ case 2:
+ return "VK_BLEND_OP_REVERSE_SUBTRACT";
+ case 3:
+ return "VK_BLEND_OP_MIN";
+ case 4:
+ return "VK_BLEND_OP_MAX";
+ case 1000148000:
+ return "VK_BLEND_OP_ZERO_EXT";
+ case 1000148001:
+ return "VK_BLEND_OP_SRC_EXT";
+ case 1000148002:
+ return "VK_BLEND_OP_DST_EXT";
+ case 1000148003:
+ return "VK_BLEND_OP_SRC_OVER_EXT";
+ case 1000148004:
+ return "VK_BLEND_OP_DST_OVER_EXT";
+ case 1000148005:
+ return "VK_BLEND_OP_SRC_IN_EXT";
+ case 1000148006:
+ return "VK_BLEND_OP_DST_IN_EXT";
+ case 1000148007:
+ return "VK_BLEND_OP_SRC_OUT_EXT";
+ case 1000148008:
+ return "VK_BLEND_OP_DST_OUT_EXT";
+ case 1000148009:
+ return "VK_BLEND_OP_SRC_ATOP_EXT";
+ case 1000148010:
+ return "VK_BLEND_OP_DST_ATOP_EXT";
+ case 1000148011:
+ return "VK_BLEND_OP_XOR_EXT";
+ case 1000148012:
+ return "VK_BLEND_OP_MULTIPLY_EXT";
+ case 1000148013:
+ return "VK_BLEND_OP_SCREEN_EXT";
+ case 1000148014:
+ return "VK_BLEND_OP_OVERLAY_EXT";
+ case 1000148015:
+ return "VK_BLEND_OP_DARKEN_EXT";
+ case 1000148016:
+ return "VK_BLEND_OP_LIGHTEN_EXT";
+ case 1000148017:
+ return "VK_BLEND_OP_COLORDODGE_EXT";
+ case 1000148018:
+ return "VK_BLEND_OP_COLORBURN_EXT";
+ case 1000148019:
+ return "VK_BLEND_OP_HARDLIGHT_EXT";
+ case 1000148020:
+ return "VK_BLEND_OP_SOFTLIGHT_EXT";
+ case 1000148021:
+ return "VK_BLEND_OP_DIFFERENCE_EXT";
+ case 1000148022:
+ return "VK_BLEND_OP_EXCLUSION_EXT";
+ case 1000148023:
+ return "VK_BLEND_OP_INVERT_EXT";
+ case 1000148024:
+ return "VK_BLEND_OP_INVERT_RGB_EXT";
+ case 1000148025:
+ return "VK_BLEND_OP_LINEARDODGE_EXT";
+ case 1000148026:
+ return "VK_BLEND_OP_LINEARBURN_EXT";
+ case 1000148027:
+ return "VK_BLEND_OP_VIVIDLIGHT_EXT";
+ case 1000148028:
+ return "VK_BLEND_OP_LINEARLIGHT_EXT";
+ case 1000148029:
+ return "VK_BLEND_OP_PINLIGHT_EXT";
+ case 1000148030:
+ return "VK_BLEND_OP_HARDMIX_EXT";
+ case 1000148031:
+ return "VK_BLEND_OP_HSL_HUE_EXT";
+ case 1000148032:
+ return "VK_BLEND_OP_HSL_SATURATION_EXT";
+ case 1000148033:
+ return "VK_BLEND_OP_HSL_COLOR_EXT";
+ case 1000148034:
+ return "VK_BLEND_OP_HSL_LUMINOSITY_EXT";
+ case 1000148035:
+ return "VK_BLEND_OP_PLUS_EXT";
+ case 1000148036:
+ return "VK_BLEND_OP_PLUS_CLAMPED_EXT";
+ case 1000148037:
+ return "VK_BLEND_OP_PLUS_CLAMPED_ALPHA_EXT";
+ case 1000148038:
+ return "VK_BLEND_OP_PLUS_DARKER_EXT";
+ case 1000148039:
+ return "VK_BLEND_OP_MINUS_EXT";
+ case 1000148040:
+ return "VK_BLEND_OP_MINUS_CLAMPED_EXT";
+ case 1000148041:
+ return "VK_BLEND_OP_CONTRAST_EXT";
+ case 1000148042:
+ return "VK_BLEND_OP_INVERT_OVG_EXT";
+ case 1000148043:
+ return "VK_BLEND_OP_RED_EXT";
+ case 1000148044:
+ return "VK_BLEND_OP_GREEN_EXT";
+ case 1000148045:
+ return "VK_BLEND_OP_BLUE_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_BlendOverlapEXT_to_str(VkBlendOverlapEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_BLEND_OVERLAP_UNCORRELATED_EXT";
+ case 1:
+ return "VK_BLEND_OVERLAP_DISJOINT_EXT";
+ case 2:
+ return "VK_BLEND_OVERLAP_CONJOINT_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_BorderColor_to_str(VkBorderColor input)
+{
+ switch(input) {
+ case 0:
+ return "VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK";
+ case 1:
+ return "VK_BORDER_COLOR_INT_TRANSPARENT_BLACK";
+ case 2:
+ return "VK_BORDER_COLOR_FLOAT_OPAQUE_BLACK";
+ case 3:
+ return "VK_BORDER_COLOR_INT_OPAQUE_BLACK";
+ case 4:
+ return "VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE";
+ case 5:
+ return "VK_BORDER_COLOR_INT_OPAQUE_WHITE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ChromaLocationKHR_to_str(VkChromaLocationKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_CHROMA_LOCATION_COSITED_EVEN_KHR";
+ case 1:
+ return "VK_CHROMA_LOCATION_MIDPOINT_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ColorSpaceKHR_to_str(VkColorSpaceKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_COLOR_SPACE_SRGB_NONLINEAR_KHR";
+ case 1000104001:
+ return "VK_COLOR_SPACE_DISPLAY_P3_NONLINEAR_EXT";
+ case 1000104002:
+ return "VK_COLOR_SPACE_EXTENDED_SRGB_LINEAR_EXT";
+ case 1000104003:
+ return "VK_COLOR_SPACE_DCI_P3_LINEAR_EXT";
+ case 1000104004:
+ return "VK_COLOR_SPACE_DCI_P3_NONLINEAR_EXT";
+ case 1000104005:
+ return "VK_COLOR_SPACE_BT709_LINEAR_EXT";
+ case 1000104006:
+ return "VK_COLOR_SPACE_BT709_NONLINEAR_EXT";
+ case 1000104007:
+ return "VK_COLOR_SPACE_BT2020_LINEAR_EXT";
+ case 1000104008:
+ return "VK_COLOR_SPACE_HDR10_ST2084_EXT";
+ case 1000104009:
+ return "VK_COLOR_SPACE_DOLBYVISION_EXT";
+ case 1000104010:
+ return "VK_COLOR_SPACE_HDR10_HLG_EXT";
+ case 1000104011:
+ return "VK_COLOR_SPACE_ADOBERGB_LINEAR_EXT";
+ case 1000104012:
+ return "VK_COLOR_SPACE_ADOBERGB_NONLINEAR_EXT";
+ case 1000104013:
+ return "VK_COLOR_SPACE_PASS_THROUGH_EXT";
+ case 1000104014:
+ return "VK_COLOR_SPACE_EXTENDED_SRGB_NONLINEAR_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_CommandBufferLevel_to_str(VkCommandBufferLevel input)
+{
+ switch(input) {
+ case 0:
+ return "VK_COMMAND_BUFFER_LEVEL_PRIMARY";
+ case 1:
+ return "VK_COMMAND_BUFFER_LEVEL_SECONDARY";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_CompareOp_to_str(VkCompareOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_COMPARE_OP_NEVER";
+ case 1:
+ return "VK_COMPARE_OP_LESS";
+ case 2:
+ return "VK_COMPARE_OP_EQUAL";
+ case 3:
+ return "VK_COMPARE_OP_LESS_OR_EQUAL";
+ case 4:
+ return "VK_COMPARE_OP_GREATER";
+ case 5:
+ return "VK_COMPARE_OP_NOT_EQUAL";
+ case 6:
+ return "VK_COMPARE_OP_GREATER_OR_EQUAL";
+ case 7:
+ return "VK_COMPARE_OP_ALWAYS";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ComponentSwizzle_to_str(VkComponentSwizzle input)
+{
+ switch(input) {
+ case 0:
+ return "VK_COMPONENT_SWIZZLE_IDENTITY";
+ case 1:
+ return "VK_COMPONENT_SWIZZLE_ZERO";
+ case 2:
+ return "VK_COMPONENT_SWIZZLE_ONE";
+ case 3:
+ return "VK_COMPONENT_SWIZZLE_R";
+ case 4:
+ return "VK_COMPONENT_SWIZZLE_G";
+ case 5:
+ return "VK_COMPONENT_SWIZZLE_B";
+ case 6:
+ return "VK_COMPONENT_SWIZZLE_A";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_CoverageModulationModeNV_to_str(VkCoverageModulationModeNV input)
+{
+ switch(input) {
+ case 0:
+ return "VK_COVERAGE_MODULATION_MODE_NONE_NV";
+ case 1:
+ return "VK_COVERAGE_MODULATION_MODE_RGB_NV";
+ case 2:
+ return "VK_COVERAGE_MODULATION_MODE_ALPHA_NV";
+ case 3:
+ return "VK_COVERAGE_MODULATION_MODE_RGBA_NV";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DebugReportObjectTypeEXT_to_str(VkDebugReportObjectTypeEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT";
+ case 1:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_INSTANCE_EXT";
+ case 2:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_PHYSICAL_DEVICE_EXT";
+ case 3:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_EXT";
+ case 4:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_QUEUE_EXT";
+ case 5:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SEMAPHORE_EXT";
+ case 6:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_BUFFER_EXT";
+ case 7:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_FENCE_EXT";
+ case 8:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_MEMORY_EXT";
+ case 9:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_EXT";
+ case 10:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_EXT";
+ case 11:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_EVENT_EXT";
+ case 12:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_QUERY_POOL_EXT";
+ case 13:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_VIEW_EXT";
+ case 14:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_VIEW_EXT";
+ case 15:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SHADER_MODULE_EXT";
+ case 16:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_CACHE_EXT";
+ case 17:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_LAYOUT_EXT";
+ case 18:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_RENDER_PASS_EXT";
+ case 19:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_EXT";
+ case 20:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT_EXT";
+ case 21:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_EXT";
+ case 22:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_POOL_EXT";
+ case 23:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_EXT";
+ case 24:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_FRAMEBUFFER_EXT";
+ case 25:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_POOL_EXT";
+ case 26:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SURFACE_KHR_EXT";
+ case 27:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SWAPCHAIN_KHR_EXT";
+ case 28:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT";
+ case 29:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_KHR_EXT";
+ case 30:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DISPLAY_MODE_KHR_EXT";
+ case 31:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_OBJECT_TABLE_NVX_EXT";
+ case 32:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX_EXT";
+ case 33:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_VALIDATION_CACHE_EXT";
+ case 1000085000:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_KHR_EXT";
+ case 1000156000:
+ return "VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_KHR_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DescriptorType_to_str(VkDescriptorType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DESCRIPTOR_TYPE_SAMPLER";
+ case 1:
+ return "VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER";
+ case 2:
+ return "VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE";
+ case 3:
+ return "VK_DESCRIPTOR_TYPE_STORAGE_IMAGE";
+ case 4:
+ return "VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER";
+ case 5:
+ return "VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER";
+ case 6:
+ return "VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER";
+ case 7:
+ return "VK_DESCRIPTOR_TYPE_STORAGE_BUFFER";
+ case 8:
+ return "VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC";
+ case 9:
+ return "VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC";
+ case 10:
+ return "VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DescriptorUpdateTemplateTypeKHR_to_str(VkDescriptorUpdateTemplateTypeKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR";
+ case 1:
+ return "VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_PUSH_DESCRIPTORS_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DeviceEventTypeEXT_to_str(VkDeviceEventTypeEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DEVICE_EVENT_TYPE_DISPLAY_HOTPLUG_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DiscardRectangleModeEXT_to_str(VkDiscardRectangleModeEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DISCARD_RECTANGLE_MODE_INCLUSIVE_EXT";
+ case 1:
+ return "VK_DISCARD_RECTANGLE_MODE_EXCLUSIVE_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DisplayEventTypeEXT_to_str(VkDisplayEventTypeEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DISPLAY_EVENT_TYPE_FIRST_PIXEL_OUT_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DisplayPowerStateEXT_to_str(VkDisplayPowerStateEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DISPLAY_POWER_STATE_OFF_EXT";
+ case 1:
+ return "VK_DISPLAY_POWER_STATE_SUSPEND_EXT";
+ case 2:
+ return "VK_DISPLAY_POWER_STATE_ON_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_DynamicState_to_str(VkDynamicState input)
+{
+ switch(input) {
+ case 0:
+ return "VK_DYNAMIC_STATE_VIEWPORT";
+ case 1:
+ return "VK_DYNAMIC_STATE_SCISSOR";
+ case 2:
+ return "VK_DYNAMIC_STATE_LINE_WIDTH";
+ case 3:
+ return "VK_DYNAMIC_STATE_DEPTH_BIAS";
+ case 4:
+ return "VK_DYNAMIC_STATE_BLEND_CONSTANTS";
+ case 5:
+ return "VK_DYNAMIC_STATE_DEPTH_BOUNDS";
+ case 6:
+ return "VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK";
+ case 7:
+ return "VK_DYNAMIC_STATE_STENCIL_WRITE_MASK";
+ case 8:
+ return "VK_DYNAMIC_STATE_STENCIL_REFERENCE";
+ case 1000087000:
+ return "VK_DYNAMIC_STATE_VIEWPORT_W_SCALING_NV";
+ case 1000099000:
+ return "VK_DYNAMIC_STATE_DISCARD_RECTANGLE_EXT";
+ case 1000143000:
+ return "VK_DYNAMIC_STATE_SAMPLE_LOCATIONS_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_Filter_to_str(VkFilter input)
+{
+ switch(input) {
+ case 0:
+ return "VK_FILTER_NEAREST";
+ case 1:
+ return "VK_FILTER_LINEAR";
+ case 1000015000:
+ return "VK_FILTER_CUBIC_IMG";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_Format_to_str(VkFormat input)
+{
+ switch(input) {
+ case 0:
+ return "VK_FORMAT_UNDEFINED";
+ case 1:
+ return "VK_FORMAT_R4G4_UNORM_PACK8";
+ case 2:
+ return "VK_FORMAT_R4G4B4A4_UNORM_PACK16";
+ case 3:
+ return "VK_FORMAT_B4G4R4A4_UNORM_PACK16";
+ case 4:
+ return "VK_FORMAT_R5G6B5_UNORM_PACK16";
+ case 5:
+ return "VK_FORMAT_B5G6R5_UNORM_PACK16";
+ case 6:
+ return "VK_FORMAT_R5G5B5A1_UNORM_PACK16";
+ case 7:
+ return "VK_FORMAT_B5G5R5A1_UNORM_PACK16";
+ case 8:
+ return "VK_FORMAT_A1R5G5B5_UNORM_PACK16";
+ case 9:
+ return "VK_FORMAT_R8_UNORM";
+ case 10:
+ return "VK_FORMAT_R8_SNORM";
+ case 11:
+ return "VK_FORMAT_R8_USCALED";
+ case 12:
+ return "VK_FORMAT_R8_SSCALED";
+ case 13:
+ return "VK_FORMAT_R8_UINT";
+ case 14:
+ return "VK_FORMAT_R8_SINT";
+ case 15:
+ return "VK_FORMAT_R8_SRGB";
+ case 16:
+ return "VK_FORMAT_R8G8_UNORM";
+ case 17:
+ return "VK_FORMAT_R8G8_SNORM";
+ case 18:
+ return "VK_FORMAT_R8G8_USCALED";
+ case 19:
+ return "VK_FORMAT_R8G8_SSCALED";
+ case 20:
+ return "VK_FORMAT_R8G8_UINT";
+ case 21:
+ return "VK_FORMAT_R8G8_SINT";
+ case 22:
+ return "VK_FORMAT_R8G8_SRGB";
+ case 23:
+ return "VK_FORMAT_R8G8B8_UNORM";
+ case 24:
+ return "VK_FORMAT_R8G8B8_SNORM";
+ case 25:
+ return "VK_FORMAT_R8G8B8_USCALED";
+ case 26:
+ return "VK_FORMAT_R8G8B8_SSCALED";
+ case 27:
+ return "VK_FORMAT_R8G8B8_UINT";
+ case 28:
+ return "VK_FORMAT_R8G8B8_SINT";
+ case 29:
+ return "VK_FORMAT_R8G8B8_SRGB";
+ case 30:
+ return "VK_FORMAT_B8G8R8_UNORM";
+ case 31:
+ return "VK_FORMAT_B8G8R8_SNORM";
+ case 32:
+ return "VK_FORMAT_B8G8R8_USCALED";
+ case 33:
+ return "VK_FORMAT_B8G8R8_SSCALED";
+ case 34:
+ return "VK_FORMAT_B8G8R8_UINT";
+ case 35:
+ return "VK_FORMAT_B8G8R8_SINT";
+ case 36:
+ return "VK_FORMAT_B8G8R8_SRGB";
+ case 37:
+ return "VK_FORMAT_R8G8B8A8_UNORM";
+ case 38:
+ return "VK_FORMAT_R8G8B8A8_SNORM";
+ case 39:
+ return "VK_FORMAT_R8G8B8A8_USCALED";
+ case 40:
+ return "VK_FORMAT_R8G8B8A8_SSCALED";
+ case 41:
+ return "VK_FORMAT_R8G8B8A8_UINT";
+ case 42:
+ return "VK_FORMAT_R8G8B8A8_SINT";
+ case 43:
+ return "VK_FORMAT_R8G8B8A8_SRGB";
+ case 44:
+ return "VK_FORMAT_B8G8R8A8_UNORM";
+ case 45:
+ return "VK_FORMAT_B8G8R8A8_SNORM";
+ case 46:
+ return "VK_FORMAT_B8G8R8A8_USCALED";
+ case 47:
+ return "VK_FORMAT_B8G8R8A8_SSCALED";
+ case 48:
+ return "VK_FORMAT_B8G8R8A8_UINT";
+ case 49:
+ return "VK_FORMAT_B8G8R8A8_SINT";
+ case 50:
+ return "VK_FORMAT_B8G8R8A8_SRGB";
+ case 51:
+ return "VK_FORMAT_A8B8G8R8_UNORM_PACK32";
+ case 52:
+ return "VK_FORMAT_A8B8G8R8_SNORM_PACK32";
+ case 53:
+ return "VK_FORMAT_A8B8G8R8_USCALED_PACK32";
+ case 54:
+ return "VK_FORMAT_A8B8G8R8_SSCALED_PACK32";
+ case 55:
+ return "VK_FORMAT_A8B8G8R8_UINT_PACK32";
+ case 56:
+ return "VK_FORMAT_A8B8G8R8_SINT_PACK32";
+ case 57:
+ return "VK_FORMAT_A8B8G8R8_SRGB_PACK32";
+ case 58:
+ return "VK_FORMAT_A2R10G10B10_UNORM_PACK32";
+ case 59:
+ return "VK_FORMAT_A2R10G10B10_SNORM_PACK32";
+ case 60:
+ return "VK_FORMAT_A2R10G10B10_USCALED_PACK32";
+ case 61:
+ return "VK_FORMAT_A2R10G10B10_SSCALED_PACK32";
+ case 62:
+ return "VK_FORMAT_A2R10G10B10_UINT_PACK32";
+ case 63:
+ return "VK_FORMAT_A2R10G10B10_SINT_PACK32";
+ case 64:
+ return "VK_FORMAT_A2B10G10R10_UNORM_PACK32";
+ case 65:
+ return "VK_FORMAT_A2B10G10R10_SNORM_PACK32";
+ case 66:
+ return "VK_FORMAT_A2B10G10R10_USCALED_PACK32";
+ case 67:
+ return "VK_FORMAT_A2B10G10R10_SSCALED_PACK32";
+ case 68:
+ return "VK_FORMAT_A2B10G10R10_UINT_PACK32";
+ case 69:
+ return "VK_FORMAT_A2B10G10R10_SINT_PACK32";
+ case 70:
+ return "VK_FORMAT_R16_UNORM";
+ case 71:
+ return "VK_FORMAT_R16_SNORM";
+ case 72:
+ return "VK_FORMAT_R16_USCALED";
+ case 73:
+ return "VK_FORMAT_R16_SSCALED";
+ case 74:
+ return "VK_FORMAT_R16_UINT";
+ case 75:
+ return "VK_FORMAT_R16_SINT";
+ case 76:
+ return "VK_FORMAT_R16_SFLOAT";
+ case 77:
+ return "VK_FORMAT_R16G16_UNORM";
+ case 78:
+ return "VK_FORMAT_R16G16_SNORM";
+ case 79:
+ return "VK_FORMAT_R16G16_USCALED";
+ case 80:
+ return "VK_FORMAT_R16G16_SSCALED";
+ case 81:
+ return "VK_FORMAT_R16G16_UINT";
+ case 82:
+ return "VK_FORMAT_R16G16_SINT";
+ case 83:
+ return "VK_FORMAT_R16G16_SFLOAT";
+ case 84:
+ return "VK_FORMAT_R16G16B16_UNORM";
+ case 85:
+ return "VK_FORMAT_R16G16B16_SNORM";
+ case 86:
+ return "VK_FORMAT_R16G16B16_USCALED";
+ case 87:
+ return "VK_FORMAT_R16G16B16_SSCALED";
+ case 88:
+ return "VK_FORMAT_R16G16B16_UINT";
+ case 89:
+ return "VK_FORMAT_R16G16B16_SINT";
+ case 90:
+ return "VK_FORMAT_R16G16B16_SFLOAT";
+ case 91:
+ return "VK_FORMAT_R16G16B16A16_UNORM";
+ case 92:
+ return "VK_FORMAT_R16G16B16A16_SNORM";
+ case 93:
+ return "VK_FORMAT_R16G16B16A16_USCALED";
+ case 94:
+ return "VK_FORMAT_R16G16B16A16_SSCALED";
+ case 95:
+ return "VK_FORMAT_R16G16B16A16_UINT";
+ case 96:
+ return "VK_FORMAT_R16G16B16A16_SINT";
+ case 97:
+ return "VK_FORMAT_R16G16B16A16_SFLOAT";
+ case 98:
+ return "VK_FORMAT_R32_UINT";
+ case 99:
+ return "VK_FORMAT_R32_SINT";
+ case 100:
+ return "VK_FORMAT_R32_SFLOAT";
+ case 101:
+ return "VK_FORMAT_R32G32_UINT";
+ case 102:
+ return "VK_FORMAT_R32G32_SINT";
+ case 103:
+ return "VK_FORMAT_R32G32_SFLOAT";
+ case 104:
+ return "VK_FORMAT_R32G32B32_UINT";
+ case 105:
+ return "VK_FORMAT_R32G32B32_SINT";
+ case 106:
+ return "VK_FORMAT_R32G32B32_SFLOAT";
+ case 107:
+ return "VK_FORMAT_R32G32B32A32_UINT";
+ case 108:
+ return "VK_FORMAT_R32G32B32A32_SINT";
+ case 109:
+ return "VK_FORMAT_R32G32B32A32_SFLOAT";
+ case 110:
+ return "VK_FORMAT_R64_UINT";
+ case 111:
+ return "VK_FORMAT_R64_SINT";
+ case 112:
+ return "VK_FORMAT_R64_SFLOAT";
+ case 113:
+ return "VK_FORMAT_R64G64_UINT";
+ case 114:
+ return "VK_FORMAT_R64G64_SINT";
+ case 115:
+ return "VK_FORMAT_R64G64_SFLOAT";
+ case 116:
+ return "VK_FORMAT_R64G64B64_UINT";
+ case 117:
+ return "VK_FORMAT_R64G64B64_SINT";
+ case 118:
+ return "VK_FORMAT_R64G64B64_SFLOAT";
+ case 119:
+ return "VK_FORMAT_R64G64B64A64_UINT";
+ case 120:
+ return "VK_FORMAT_R64G64B64A64_SINT";
+ case 121:
+ return "VK_FORMAT_R64G64B64A64_SFLOAT";
+ case 122:
+ return "VK_FORMAT_B10G11R11_UFLOAT_PACK32";
+ case 123:
+ return "VK_FORMAT_E5B9G9R9_UFLOAT_PACK32";
+ case 124:
+ return "VK_FORMAT_D16_UNORM";
+ case 125:
+ return "VK_FORMAT_X8_D24_UNORM_PACK32";
+ case 126:
+ return "VK_FORMAT_D32_SFLOAT";
+ case 127:
+ return "VK_FORMAT_S8_UINT";
+ case 128:
+ return "VK_FORMAT_D16_UNORM_S8_UINT";
+ case 129:
+ return "VK_FORMAT_D24_UNORM_S8_UINT";
+ case 130:
+ return "VK_FORMAT_D32_SFLOAT_S8_UINT";
+ case 131:
+ return "VK_FORMAT_BC1_RGB_UNORM_BLOCK";
+ case 132:
+ return "VK_FORMAT_BC1_RGB_SRGB_BLOCK";
+ case 133:
+ return "VK_FORMAT_BC1_RGBA_UNORM_BLOCK";
+ case 134:
+ return "VK_FORMAT_BC1_RGBA_SRGB_BLOCK";
+ case 135:
+ return "VK_FORMAT_BC2_UNORM_BLOCK";
+ case 136:
+ return "VK_FORMAT_BC2_SRGB_BLOCK";
+ case 137:
+ return "VK_FORMAT_BC3_UNORM_BLOCK";
+ case 138:
+ return "VK_FORMAT_BC3_SRGB_BLOCK";
+ case 139:
+ return "VK_FORMAT_BC4_UNORM_BLOCK";
+ case 140:
+ return "VK_FORMAT_BC4_SNORM_BLOCK";
+ case 141:
+ return "VK_FORMAT_BC5_UNORM_BLOCK";
+ case 142:
+ return "VK_FORMAT_BC5_SNORM_BLOCK";
+ case 143:
+ return "VK_FORMAT_BC6H_UFLOAT_BLOCK";
+ case 144:
+ return "VK_FORMAT_BC6H_SFLOAT_BLOCK";
+ case 145:
+ return "VK_FORMAT_BC7_UNORM_BLOCK";
+ case 146:
+ return "VK_FORMAT_BC7_SRGB_BLOCK";
+ case 147:
+ return "VK_FORMAT_ETC2_R8G8B8_UNORM_BLOCK";
+ case 148:
+ return "VK_FORMAT_ETC2_R8G8B8_SRGB_BLOCK";
+ case 149:
+ return "VK_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK";
+ case 150:
+ return "VK_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK";
+ case 151:
+ return "VK_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK";
+ case 152:
+ return "VK_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK";
+ case 153:
+ return "VK_FORMAT_EAC_R11_UNORM_BLOCK";
+ case 154:
+ return "VK_FORMAT_EAC_R11_SNORM_BLOCK";
+ case 155:
+ return "VK_FORMAT_EAC_R11G11_UNORM_BLOCK";
+ case 156:
+ return "VK_FORMAT_EAC_R11G11_SNORM_BLOCK";
+ case 157:
+ return "VK_FORMAT_ASTC_4x4_UNORM_BLOCK";
+ case 158:
+ return "VK_FORMAT_ASTC_4x4_SRGB_BLOCK";
+ case 159:
+ return "VK_FORMAT_ASTC_5x4_UNORM_BLOCK";
+ case 160:
+ return "VK_FORMAT_ASTC_5x4_SRGB_BLOCK";
+ case 161:
+ return "VK_FORMAT_ASTC_5x5_UNORM_BLOCK";
+ case 162:
+ return "VK_FORMAT_ASTC_5x5_SRGB_BLOCK";
+ case 163:
+ return "VK_FORMAT_ASTC_6x5_UNORM_BLOCK";
+ case 164:
+ return "VK_FORMAT_ASTC_6x5_SRGB_BLOCK";
+ case 165:
+ return "VK_FORMAT_ASTC_6x6_UNORM_BLOCK";
+ case 166:
+ return "VK_FORMAT_ASTC_6x6_SRGB_BLOCK";
+ case 167:
+ return "VK_FORMAT_ASTC_8x5_UNORM_BLOCK";
+ case 168:
+ return "VK_FORMAT_ASTC_8x5_SRGB_BLOCK";
+ case 169:
+ return "VK_FORMAT_ASTC_8x6_UNORM_BLOCK";
+ case 170:
+ return "VK_FORMAT_ASTC_8x6_SRGB_BLOCK";
+ case 171:
+ return "VK_FORMAT_ASTC_8x8_UNORM_BLOCK";
+ case 172:
+ return "VK_FORMAT_ASTC_8x8_SRGB_BLOCK";
+ case 173:
+ return "VK_FORMAT_ASTC_10x5_UNORM_BLOCK";
+ case 174:
+ return "VK_FORMAT_ASTC_10x5_SRGB_BLOCK";
+ case 175:
+ return "VK_FORMAT_ASTC_10x6_UNORM_BLOCK";
+ case 176:
+ return "VK_FORMAT_ASTC_10x6_SRGB_BLOCK";
+ case 177:
+ return "VK_FORMAT_ASTC_10x8_UNORM_BLOCK";
+ case 178:
+ return "VK_FORMAT_ASTC_10x8_SRGB_BLOCK";
+ case 179:
+ return "VK_FORMAT_ASTC_10x10_UNORM_BLOCK";
+ case 180:
+ return "VK_FORMAT_ASTC_10x10_SRGB_BLOCK";
+ case 181:
+ return "VK_FORMAT_ASTC_12x10_UNORM_BLOCK";
+ case 182:
+ return "VK_FORMAT_ASTC_12x10_SRGB_BLOCK";
+ case 183:
+ return "VK_FORMAT_ASTC_12x12_UNORM_BLOCK";
+ case 184:
+ return "VK_FORMAT_ASTC_12x12_SRGB_BLOCK";
+ case 1000054000:
+ return "VK_FORMAT_PVRTC1_2BPP_UNORM_BLOCK_IMG";
+ case 1000054001:
+ return "VK_FORMAT_PVRTC1_4BPP_UNORM_BLOCK_IMG";
+ case 1000054002:
+ return "VK_FORMAT_PVRTC2_2BPP_UNORM_BLOCK_IMG";
+ case 1000054003:
+ return "VK_FORMAT_PVRTC2_4BPP_UNORM_BLOCK_IMG";
+ case 1000054004:
+ return "VK_FORMAT_PVRTC1_2BPP_SRGB_BLOCK_IMG";
+ case 1000054005:
+ return "VK_FORMAT_PVRTC1_4BPP_SRGB_BLOCK_IMG";
+ case 1000054006:
+ return "VK_FORMAT_PVRTC2_2BPP_SRGB_BLOCK_IMG";
+ case 1000054007:
+ return "VK_FORMAT_PVRTC2_4BPP_SRGB_BLOCK_IMG";
+ case 1000156000:
+ return "VK_FORMAT_G8B8G8R8_422_UNORM_KHR";
+ case 1000156001:
+ return "VK_FORMAT_B8G8R8G8_422_UNORM_KHR";
+ case 1000156002:
+ return "VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM_KHR";
+ case 1000156003:
+ return "VK_FORMAT_G8_B8R8_2PLANE_420_UNORM_KHR";
+ case 1000156004:
+ return "VK_FORMAT_G8_B8_R8_3PLANE_422_UNORM_KHR";
+ case 1000156005:
+ return "VK_FORMAT_G8_B8R8_2PLANE_422_UNORM_KHR";
+ case 1000156006:
+ return "VK_FORMAT_G8_B8_R8_3PLANE_444_UNORM_KHR";
+ case 1000156007:
+ return "VK_FORMAT_R10X6_UNORM_PACK16_KHR";
+ case 1000156008:
+ return "VK_FORMAT_R10X6G10X6_UNORM_2PACK16_KHR";
+ case 1000156009:
+ return "VK_FORMAT_R10X6G10X6B10X6A10X6_UNORM_4PACK16_KHR";
+ case 1000156010:
+ return "VK_FORMAT_G10X6B10X6G10X6R10X6_422_UNORM_4PACK16_KHR";
+ case 1000156011:
+ return "VK_FORMAT_B10X6G10X6R10X6G10X6_422_UNORM_4PACK16_KHR";
+ case 1000156012:
+ return "VK_FORMAT_G10X6_B10X6_R10X6_3PLANE_420_UNORM_3PACK16_KHR";
+ case 1000156013:
+ return "VK_FORMAT_G10X6_B10X6R10X6_2PLANE_420_UNORM_3PACK16_KHR";
+ case 1000156014:
+ return "VK_FORMAT_G10X6_B10X6_R10X6_3PLANE_422_UNORM_3PACK16_KHR";
+ case 1000156015:
+ return "VK_FORMAT_G10X6_B10X6R10X6_2PLANE_422_UNORM_3PACK16_KHR";
+ case 1000156016:
+ return "VK_FORMAT_G10X6_B10X6_R10X6_3PLANE_444_UNORM_3PACK16_KHR";
+ case 1000156017:
+ return "VK_FORMAT_R12X4_UNORM_PACK16_KHR";
+ case 1000156018:
+ return "VK_FORMAT_R12X4G12X4_UNORM_2PACK16_KHR";
+ case 1000156019:
+ return "VK_FORMAT_R12X4G12X4B12X4A12X4_UNORM_4PACK16_KHR";
+ case 1000156020:
+ return "VK_FORMAT_G12X4B12X4G12X4R12X4_422_UNORM_4PACK16_KHR";
+ case 1000156021:
+ return "VK_FORMAT_B12X4G12X4R12X4G12X4_422_UNORM_4PACK16_KHR";
+ case 1000156022:
+ return "VK_FORMAT_G12X4_B12X4_R12X4_3PLANE_420_UNORM_3PACK16_KHR";
+ case 1000156023:
+ return "VK_FORMAT_G12X4_B12X4R12X4_2PLANE_420_UNORM_3PACK16_KHR";
+ case 1000156024:
+ return "VK_FORMAT_G12X4_B12X4_R12X4_3PLANE_422_UNORM_3PACK16_KHR";
+ case 1000156025:
+ return "VK_FORMAT_G12X4_B12X4R12X4_2PLANE_422_UNORM_3PACK16_KHR";
+ case 1000156026:
+ return "VK_FORMAT_G12X4_B12X4_R12X4_3PLANE_444_UNORM_3PACK16_KHR";
+ case 1000156027:
+ return "VK_FORMAT_G16B16G16R16_422_UNORM_KHR";
+ case 1000156028:
+ return "VK_FORMAT_B16G16R16G16_422_UNORM_KHR";
+ case 1000156029:
+ return "VK_FORMAT_G16_B16_R16_3PLANE_420_UNORM_KHR";
+ case 1000156030:
+ return "VK_FORMAT_G16_B16R16_2PLANE_420_UNORM_KHR";
+ case 1000156031:
+ return "VK_FORMAT_G16_B16_R16_3PLANE_422_UNORM_KHR";
+ case 1000156032:
+ return "VK_FORMAT_G16_B16R16_2PLANE_422_UNORM_KHR";
+ case 1000156033:
+ return "VK_FORMAT_G16_B16_R16_3PLANE_444_UNORM_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_FrontFace_to_str(VkFrontFace input)
+{
+ switch(input) {
+ case 0:
+ return "VK_FRONT_FACE_COUNTER_CLOCKWISE";
+ case 1:
+ return "VK_FRONT_FACE_CLOCKWISE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ImageLayout_to_str(VkImageLayout input)
+{
+ switch(input) {
+ case 0:
+ return "VK_IMAGE_LAYOUT_UNDEFINED";
+ case 1:
+ return "VK_IMAGE_LAYOUT_GENERAL";
+ case 2:
+ return "VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL";
+ case 3:
+ return "VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL";
+ case 4:
+ return "VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL";
+ case 5:
+ return "VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL";
+ case 6:
+ return "VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL";
+ case 7:
+ return "VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL";
+ case 8:
+ return "VK_IMAGE_LAYOUT_PREINITIALIZED";
+ case 1000001002:
+ return "VK_IMAGE_LAYOUT_PRESENT_SRC_KHR";
+ case 1000111000:
+ return "VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR";
+ case 1000117000:
+ return "VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR";
+ case 1000117001:
+ return "VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ImageTiling_to_str(VkImageTiling input)
+{
+ switch(input) {
+ case 0:
+ return "VK_IMAGE_TILING_OPTIMAL";
+ case 1:
+ return "VK_IMAGE_TILING_LINEAR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ImageType_to_str(VkImageType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_IMAGE_TYPE_1D";
+ case 1:
+ return "VK_IMAGE_TYPE_2D";
+ case 2:
+ return "VK_IMAGE_TYPE_3D";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ImageViewType_to_str(VkImageViewType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_IMAGE_VIEW_TYPE_1D";
+ case 1:
+ return "VK_IMAGE_VIEW_TYPE_2D";
+ case 2:
+ return "VK_IMAGE_VIEW_TYPE_3D";
+ case 3:
+ return "VK_IMAGE_VIEW_TYPE_CUBE";
+ case 4:
+ return "VK_IMAGE_VIEW_TYPE_1D_ARRAY";
+ case 5:
+ return "VK_IMAGE_VIEW_TYPE_2D_ARRAY";
+ case 6:
+ return "VK_IMAGE_VIEW_TYPE_CUBE_ARRAY";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_IndexType_to_str(VkIndexType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_INDEX_TYPE_UINT16";
+ case 1:
+ return "VK_INDEX_TYPE_UINT32";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_IndirectCommandsTokenTypeNVX_to_str(VkIndirectCommandsTokenTypeNVX input)
+{
+ switch(input) {
+ case 0:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_PIPELINE_NVX";
+ case 1:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_DESCRIPTOR_SET_NVX";
+ case 2:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_INDEX_BUFFER_NVX";
+ case 3:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_VERTEX_BUFFER_NVX";
+ case 4:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_PUSH_CONSTANT_NVX";
+ case 5:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_INDEXED_NVX";
+ case 6:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_NVX";
+ case 7:
+ return "VK_INDIRECT_COMMANDS_TOKEN_TYPE_DISPATCH_NVX";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_InternalAllocationType_to_str(VkInternalAllocationType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_INTERNAL_ALLOCATION_TYPE_EXECUTABLE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_LogicOp_to_str(VkLogicOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_LOGIC_OP_CLEAR";
+ case 1:
+ return "VK_LOGIC_OP_AND";
+ case 2:
+ return "VK_LOGIC_OP_AND_REVERSE";
+ case 3:
+ return "VK_LOGIC_OP_COPY";
+ case 4:
+ return "VK_LOGIC_OP_AND_INVERTED";
+ case 5:
+ return "VK_LOGIC_OP_NO_OP";
+ case 6:
+ return "VK_LOGIC_OP_XOR";
+ case 7:
+ return "VK_LOGIC_OP_OR";
+ case 8:
+ return "VK_LOGIC_OP_NOR";
+ case 9:
+ return "VK_LOGIC_OP_EQUIVALENT";
+ case 10:
+ return "VK_LOGIC_OP_INVERT";
+ case 11:
+ return "VK_LOGIC_OP_OR_REVERSE";
+ case 12:
+ return "VK_LOGIC_OP_COPY_INVERTED";
+ case 13:
+ return "VK_LOGIC_OP_OR_INVERTED";
+ case 14:
+ return "VK_LOGIC_OP_NAND";
+ case 15:
+ return "VK_LOGIC_OP_SET";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ObjectEntryTypeNVX_to_str(VkObjectEntryTypeNVX input)
+{
+ switch(input) {
+ case 0:
+ return "VK_OBJECT_ENTRY_TYPE_DESCRIPTOR_SET_NVX";
+ case 1:
+ return "VK_OBJECT_ENTRY_TYPE_PIPELINE_NVX";
+ case 2:
+ return "VK_OBJECT_ENTRY_TYPE_INDEX_BUFFER_NVX";
+ case 3:
+ return "VK_OBJECT_ENTRY_TYPE_VERTEX_BUFFER_NVX";
+ case 4:
+ return "VK_OBJECT_ENTRY_TYPE_PUSH_CONSTANT_NVX";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ObjectType_to_str(VkObjectType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_OBJECT_TYPE_UNKNOWN";
+ case 1:
+ return "VK_OBJECT_TYPE_INSTANCE";
+ case 2:
+ return "VK_OBJECT_TYPE_PHYSICAL_DEVICE";
+ case 3:
+ return "VK_OBJECT_TYPE_DEVICE";
+ case 4:
+ return "VK_OBJECT_TYPE_QUEUE";
+ case 5:
+ return "VK_OBJECT_TYPE_SEMAPHORE";
+ case 6:
+ return "VK_OBJECT_TYPE_COMMAND_BUFFER";
+ case 7:
+ return "VK_OBJECT_TYPE_FENCE";
+ case 8:
+ return "VK_OBJECT_TYPE_DEVICE_MEMORY";
+ case 9:
+ return "VK_OBJECT_TYPE_BUFFER";
+ case 10:
+ return "VK_OBJECT_TYPE_IMAGE";
+ case 11:
+ return "VK_OBJECT_TYPE_EVENT";
+ case 12:
+ return "VK_OBJECT_TYPE_QUERY_POOL";
+ case 13:
+ return "VK_OBJECT_TYPE_BUFFER_VIEW";
+ case 14:
+ return "VK_OBJECT_TYPE_IMAGE_VIEW";
+ case 15:
+ return "VK_OBJECT_TYPE_SHADER_MODULE";
+ case 16:
+ return "VK_OBJECT_TYPE_PIPELINE_CACHE";
+ case 17:
+ return "VK_OBJECT_TYPE_PIPELINE_LAYOUT";
+ case 18:
+ return "VK_OBJECT_TYPE_RENDER_PASS";
+ case 19:
+ return "VK_OBJECT_TYPE_PIPELINE";
+ case 20:
+ return "VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT";
+ case 21:
+ return "VK_OBJECT_TYPE_SAMPLER";
+ case 22:
+ return "VK_OBJECT_TYPE_DESCRIPTOR_POOL";
+ case 23:
+ return "VK_OBJECT_TYPE_DESCRIPTOR_SET";
+ case 24:
+ return "VK_OBJECT_TYPE_FRAMEBUFFER";
+ case 25:
+ return "VK_OBJECT_TYPE_COMMAND_POOL";
+ case 1000000000:
+ return "VK_OBJECT_TYPE_SURFACE_KHR";
+ case 1000001000:
+ return "VK_OBJECT_TYPE_SWAPCHAIN_KHR";
+ case 1000002000:
+ return "VK_OBJECT_TYPE_DISPLAY_KHR";
+ case 1000002001:
+ return "VK_OBJECT_TYPE_DISPLAY_MODE_KHR";
+ case 1000011000:
+ return "VK_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT";
+ case 1000085000:
+ return "VK_OBJECT_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_KHR";
+ case 1000086000:
+ return "VK_OBJECT_TYPE_OBJECT_TABLE_NVX";
+ case 1000086001:
+ return "VK_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_NVX";
+ case 1000156000:
+ return "VK_OBJECT_TYPE_SAMPLER_YCBCR_CONVERSION_KHR";
+ case 1000160000:
+ return "VK_OBJECT_TYPE_VALIDATION_CACHE_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PhysicalDeviceType_to_str(VkPhysicalDeviceType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_PHYSICAL_DEVICE_TYPE_OTHER";
+ case 1:
+ return "VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU";
+ case 2:
+ return "VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU";
+ case 3:
+ return "VK_PHYSICAL_DEVICE_TYPE_VIRTUAL_GPU";
+ case 4:
+ return "VK_PHYSICAL_DEVICE_TYPE_CPU";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PipelineBindPoint_to_str(VkPipelineBindPoint input)
+{
+ switch(input) {
+ case 0:
+ return "VK_PIPELINE_BIND_POINT_GRAPHICS";
+ case 1:
+ return "VK_PIPELINE_BIND_POINT_COMPUTE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PipelineCacheHeaderVersion_to_str(VkPipelineCacheHeaderVersion input)
+{
+ switch(input) {
+ case 1:
+ return "VK_PIPELINE_CACHE_HEADER_VERSION_ONE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PointClippingBehaviorKHR_to_str(VkPointClippingBehaviorKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_POINT_CLIPPING_BEHAVIOR_ALL_CLIP_PLANES_KHR";
+ case 1:
+ return "VK_POINT_CLIPPING_BEHAVIOR_USER_CLIP_PLANES_ONLY_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PolygonMode_to_str(VkPolygonMode input)
+{
+ switch(input) {
+ case 0:
+ return "VK_POLYGON_MODE_FILL";
+ case 1:
+ return "VK_POLYGON_MODE_LINE";
+ case 2:
+ return "VK_POLYGON_MODE_POINT";
+ case 1000153000:
+ return "VK_POLYGON_MODE_FILL_RECTANGLE_NV";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PresentModeKHR_to_str(VkPresentModeKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_PRESENT_MODE_IMMEDIATE_KHR";
+ case 1:
+ return "VK_PRESENT_MODE_MAILBOX_KHR";
+ case 2:
+ return "VK_PRESENT_MODE_FIFO_KHR";
+ case 3:
+ return "VK_PRESENT_MODE_FIFO_RELAXED_KHR";
+ case 1000111000:
+ return "VK_PRESENT_MODE_SHARED_DEMAND_REFRESH_KHR";
+ case 1000111001:
+ return "VK_PRESENT_MODE_SHARED_CONTINUOUS_REFRESH_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_PrimitiveTopology_to_str(VkPrimitiveTopology input)
+{
+ switch(input) {
+ case 0:
+ return "VK_PRIMITIVE_TOPOLOGY_POINT_LIST";
+ case 1:
+ return "VK_PRIMITIVE_TOPOLOGY_LINE_LIST";
+ case 2:
+ return "VK_PRIMITIVE_TOPOLOGY_LINE_STRIP";
+ case 3:
+ return "VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST";
+ case 4:
+ return "VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP";
+ case 5:
+ return "VK_PRIMITIVE_TOPOLOGY_TRIANGLE_FAN";
+ case 6:
+ return "VK_PRIMITIVE_TOPOLOGY_LINE_LIST_WITH_ADJACENCY";
+ case 7:
+ return "VK_PRIMITIVE_TOPOLOGY_LINE_STRIP_WITH_ADJACENCY";
+ case 8:
+ return "VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST_WITH_ADJACENCY";
+ case 9:
+ return "VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP_WITH_ADJACENCY";
+ case 10:
+ return "VK_PRIMITIVE_TOPOLOGY_PATCH_LIST";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_QueryType_to_str(VkQueryType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_QUERY_TYPE_OCCLUSION";
+ case 1:
+ return "VK_QUERY_TYPE_PIPELINE_STATISTICS";
+ case 2:
+ return "VK_QUERY_TYPE_TIMESTAMP";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_QueueGlobalPriorityEXT_to_str(VkQueueGlobalPriorityEXT input)
+{
+ switch(input) {
+ case 128:
+ return "VK_QUEUE_GLOBAL_PRIORITY_LOW_EXT";
+ case 256:
+ return "VK_QUEUE_GLOBAL_PRIORITY_MEDIUM_EXT";
+ case 512:
+ return "VK_QUEUE_GLOBAL_PRIORITY_HIGH_EXT";
+ case 1024:
+ return "VK_QUEUE_GLOBAL_PRIORITY_REALTIME_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_RasterizationOrderAMD_to_str(VkRasterizationOrderAMD input)
+{
+ switch(input) {
+ case 0:
+ return "VK_RASTERIZATION_ORDER_STRICT_AMD";
+ case 1:
+ return "VK_RASTERIZATION_ORDER_RELAXED_AMD";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_Result_to_str(VkResult input)
+{
+ switch(input) {
+ case -1000174001:
+ return "VK_ERROR_NOT_PERMITTED_EXT";
+ case -1000072003:
+ return "VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR";
+ case -1000069000:
+ return "VK_ERROR_OUT_OF_POOL_MEMORY_KHR";
+ case -1000012000:
+ return "VK_ERROR_INVALID_SHADER_NV";
+ case -1000011001:
+ return "VK_ERROR_VALIDATION_FAILED_EXT";
+ case -1000003001:
+ return "VK_ERROR_INCOMPATIBLE_DISPLAY_KHR";
+ case -1000001004:
+ return "VK_ERROR_OUT_OF_DATE_KHR";
+ case -1000000001:
+ return "VK_ERROR_NATIVE_WINDOW_IN_USE_KHR";
+ case -1000000000:
+ return "VK_ERROR_SURFACE_LOST_KHR";
+ case -12:
+ return "VK_ERROR_FRAGMENTED_POOL";
+ case -11:
+ return "VK_ERROR_FORMAT_NOT_SUPPORTED";
+ case -10:
+ return "VK_ERROR_TOO_MANY_OBJECTS";
+ case -9:
+ return "VK_ERROR_INCOMPATIBLE_DRIVER";
+ case -8:
+ return "VK_ERROR_FEATURE_NOT_PRESENT";
+ case -7:
+ return "VK_ERROR_EXTENSION_NOT_PRESENT";
+ case -6:
+ return "VK_ERROR_LAYER_NOT_PRESENT";
+ case -5:
+ return "VK_ERROR_MEMORY_MAP_FAILED";
+ case -4:
+ return "VK_ERROR_DEVICE_LOST";
+ case -3:
+ return "VK_ERROR_INITIALIZATION_FAILED";
+ case -2:
+ return "VK_ERROR_OUT_OF_DEVICE_MEMORY";
+ case -1:
+ return "VK_ERROR_OUT_OF_HOST_MEMORY";
+ case 0:
+ return "VK_SUCCESS";
+ case 1:
+ return "VK_NOT_READY";
+ case 2:
+ return "VK_TIMEOUT";
+ case 3:
+ return "VK_EVENT_SET";
+ case 4:
+ return "VK_EVENT_RESET";
+ case 5:
+ return "VK_INCOMPLETE";
+ case 1000001003:
+ return "VK_SUBOPTIMAL_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SamplerAddressMode_to_str(VkSamplerAddressMode input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SAMPLER_ADDRESS_MODE_REPEAT";
+ case 1:
+ return "VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT";
+ case 2:
+ return "VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE";
+ case 3:
+ return "VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER";
+ case 4:
+ return "VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SamplerMipmapMode_to_str(VkSamplerMipmapMode input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SAMPLER_MIPMAP_MODE_NEAREST";
+ case 1:
+ return "VK_SAMPLER_MIPMAP_MODE_LINEAR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SamplerReductionModeEXT_to_str(VkSamplerReductionModeEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SAMPLER_REDUCTION_MODE_WEIGHTED_AVERAGE_EXT";
+ case 1:
+ return "VK_SAMPLER_REDUCTION_MODE_MIN_EXT";
+ case 2:
+ return "VK_SAMPLER_REDUCTION_MODE_MAX_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SamplerYcbcrModelConversionKHR_to_str(VkSamplerYcbcrModelConversionKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SAMPLER_YCBCR_MODEL_CONVERSION_RGB_IDENTITY_KHR";
+ case 1:
+ return "VK_SAMPLER_YCBCR_MODEL_CONVERSION_YCBCR_IDENTITY_KHR";
+ case 2:
+ return "VK_SAMPLER_YCBCR_MODEL_CONVERSION_YCBCR_709_KHR";
+ case 3:
+ return "VK_SAMPLER_YCBCR_MODEL_CONVERSION_YCBCR_601_KHR";
+ case 4:
+ return "VK_SAMPLER_YCBCR_MODEL_CONVERSION_YCBCR_2020_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SamplerYcbcrRangeKHR_to_str(VkSamplerYcbcrRangeKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SAMPLER_YCBCR_RANGE_ITU_FULL_KHR";
+ case 1:
+ return "VK_SAMPLER_YCBCR_RANGE_ITU_NARROW_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ShaderInfoTypeAMD_to_str(VkShaderInfoTypeAMD input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SHADER_INFO_TYPE_STATISTICS_AMD";
+ case 1:
+ return "VK_SHADER_INFO_TYPE_BINARY_AMD";
+ case 2:
+ return "VK_SHADER_INFO_TYPE_DISASSEMBLY_AMD";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SharingMode_to_str(VkSharingMode input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SHARING_MODE_EXCLUSIVE";
+ case 1:
+ return "VK_SHARING_MODE_CONCURRENT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_StencilOp_to_str(VkStencilOp input)
+{
+ switch(input) {
+ case 0:
+ return "VK_STENCIL_OP_KEEP";
+ case 1:
+ return "VK_STENCIL_OP_ZERO";
+ case 2:
+ return "VK_STENCIL_OP_REPLACE";
+ case 3:
+ return "VK_STENCIL_OP_INCREMENT_AND_CLAMP";
+ case 4:
+ return "VK_STENCIL_OP_DECREMENT_AND_CLAMP";
+ case 5:
+ return "VK_STENCIL_OP_INVERT";
+ case 6:
+ return "VK_STENCIL_OP_INCREMENT_AND_WRAP";
+ case 7:
+ return "VK_STENCIL_OP_DECREMENT_AND_WRAP";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_StructureType_to_str(VkStructureType input)
+{
+ switch(input) {
+ case 0:
+ return "VK_STRUCTURE_TYPE_APPLICATION_INFO";
+ case 1:
+ return "VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO";
+ case 2:
+ return "VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO";
+ case 3:
+ return "VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO";
+ case 4:
+ return "VK_STRUCTURE_TYPE_SUBMIT_INFO";
+ case 5:
+ return "VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_INFO";
+ case 6:
+ return "VK_STRUCTURE_TYPE_MAPPED_MEMORY_RANGE";
+ case 7:
+ return "VK_STRUCTURE_TYPE_BIND_SPARSE_INFO";
+ case 8:
+ return "VK_STRUCTURE_TYPE_FENCE_CREATE_INFO";
+ case 9:
+ return "VK_STRUCTURE_TYPE_SEMAPHORE_CREATE_INFO";
+ case 10:
+ return "VK_STRUCTURE_TYPE_EVENT_CREATE_INFO";
+ case 11:
+ return "VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO";
+ case 12:
+ return "VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO";
+ case 13:
+ return "VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO";
+ case 14:
+ return "VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO";
+ case 15:
+ return "VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO";
+ case 16:
+ return "VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO";
+ case 17:
+ return "VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO";
+ case 18:
+ return "VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO";
+ case 19:
+ return "VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO";
+ case 20:
+ return "VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO";
+ case 21:
+ return "VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_STATE_CREATE_INFO";
+ case 22:
+ return "VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO";
+ case 23:
+ return "VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO";
+ case 24:
+ return "VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO";
+ case 25:
+ return "VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO";
+ case 26:
+ return "VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO";
+ case 27:
+ return "VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO";
+ case 28:
+ return "VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO";
+ case 29:
+ return "VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO";
+ case 30:
+ return "VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO";
+ case 31:
+ return "VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO";
+ case 32:
+ return "VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO";
+ case 33:
+ return "VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO";
+ case 34:
+ return "VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO";
+ case 35:
+ return "VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET";
+ case 36:
+ return "VK_STRUCTURE_TYPE_COPY_DESCRIPTOR_SET";
+ case 37:
+ return "VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO";
+ case 38:
+ return "VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO";
+ case 39:
+ return "VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO";
+ case 40:
+ return "VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO";
+ case 41:
+ return "VK_STRUCTURE_TYPE_COMMAND_BUFFER_INHERITANCE_INFO";
+ case 42:
+ return "VK_STRUCTURE_TYPE_COMMAND_BUFFER_BEGIN_INFO";
+ case 43:
+ return "VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO";
+ case 44:
+ return "VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER";
+ case 45:
+ return "VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER";
+ case 46:
+ return "VK_STRUCTURE_TYPE_MEMORY_BARRIER";
+ case 47:
+ return "VK_STRUCTURE_TYPE_LOADER_INSTANCE_CREATE_INFO";
+ case 48:
+ return "VK_STRUCTURE_TYPE_LOADER_DEVICE_CREATE_INFO";
+ case 1000001000:
+ return "VK_STRUCTURE_TYPE_SWAPCHAIN_CREATE_INFO_KHR";
+ case 1000001001:
+ return "VK_STRUCTURE_TYPE_PRESENT_INFO_KHR";
+ case 1000002000:
+ return "VK_STRUCTURE_TYPE_DISPLAY_MODE_CREATE_INFO_KHR";
+ case 1000002001:
+ return "VK_STRUCTURE_TYPE_DISPLAY_SURFACE_CREATE_INFO_KHR";
+ case 1000003000:
+ return "VK_STRUCTURE_TYPE_DISPLAY_PRESENT_INFO_KHR";
+ case 1000004000:
+ return "VK_STRUCTURE_TYPE_XLIB_SURFACE_CREATE_INFO_KHR";
+ case 1000005000:
+ return "VK_STRUCTURE_TYPE_XCB_SURFACE_CREATE_INFO_KHR";
+ case 1000006000:
+ return "VK_STRUCTURE_TYPE_WAYLAND_SURFACE_CREATE_INFO_KHR";
+ case 1000007000:
+ return "VK_STRUCTURE_TYPE_MIR_SURFACE_CREATE_INFO_KHR";
+ case 1000008000:
+ return "VK_STRUCTURE_TYPE_ANDROID_SURFACE_CREATE_INFO_KHR";
+ case 1000009000:
+ return "VK_STRUCTURE_TYPE_WIN32_SURFACE_CREATE_INFO_KHR";
+
+ #pragma GCC diagnostic push
+ #pragma GCC diagnostic ignored "-Wswitch"
+ case 1000010000:
+ return "VK_STRUCTURE_TYPE_NATIVE_BUFFER_ANDROID";
+ #pragma GCC diagnostic pop
+
+ case 1000011000:
+ return "VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT";
+ case 1000018000:
+ return "VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_RASTERIZATION_ORDER_AMD";
+ case 1000022000:
+ return "VK_STRUCTURE_TYPE_DEBUG_MARKER_OBJECT_NAME_INFO_EXT";
+ case 1000022001:
+ return "VK_STRUCTURE_TYPE_DEBUG_MARKER_OBJECT_TAG_INFO_EXT";
+ case 1000022002:
+ return "VK_STRUCTURE_TYPE_DEBUG_MARKER_MARKER_INFO_EXT";
+ case 1000026000:
+ return "VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_IMAGE_CREATE_INFO_NV";
+ case 1000026001:
+ return "VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_BUFFER_CREATE_INFO_NV";
+ case 1000026002:
+ return "VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_MEMORY_ALLOCATE_INFO_NV";
+ case 1000041000:
+ return "VK_STRUCTURE_TYPE_TEXTURE_LOD_GATHER_FORMAT_PROPERTIES_AMD";
+ case 1000053000:
+ return "VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO_KHX";
+ case 1000053001:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHX";
+ case 1000053002:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PROPERTIES_KHX";
+ case 1000056000:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_NV";
+ case 1000056001:
+ return "VK_STRUCTURE_TYPE_EXPORT_MEMORY_ALLOCATE_INFO_NV";
+ case 1000057000:
+ return "VK_STRUCTURE_TYPE_IMPORT_MEMORY_WIN32_HANDLE_INFO_NV";
+ case 1000057001:
+ return "VK_STRUCTURE_TYPE_EXPORT_MEMORY_WIN32_HANDLE_INFO_NV";
+ case 1000058000:
+ return "VK_STRUCTURE_TYPE_WIN32_KEYED_MUTEX_ACQUIRE_RELEASE_INFO_NV";
+ case 1000059000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FEATURES_2_KHR";
+ case 1000059001:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PROPERTIES_2_KHR";
+ case 1000059002:
+ return "VK_STRUCTURE_TYPE_FORMAT_PROPERTIES_2_KHR";
+ case 1000059003:
+ return "VK_STRUCTURE_TYPE_IMAGE_FORMAT_PROPERTIES_2_KHR";
+ case 1000059004:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_FORMAT_INFO_2_KHR";
+ case 1000059005:
+ return "VK_STRUCTURE_TYPE_QUEUE_FAMILY_PROPERTIES_2_KHR";
+ case 1000059006:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MEMORY_PROPERTIES_2_KHR";
+ case 1000059007:
+ return "VK_STRUCTURE_TYPE_SPARSE_IMAGE_FORMAT_PROPERTIES_2_KHR";
+ case 1000059008:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SPARSE_IMAGE_FORMAT_INFO_2_KHR";
+ case 1000060000:
+ return "VK_STRUCTURE_TYPE_MEMORY_ALLOCATE_FLAGS_INFO_KHX";
+ case 1000060003:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_RENDER_PASS_BEGIN_INFO_KHX";
+ case 1000060004:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_COMMAND_BUFFER_BEGIN_INFO_KHX";
+ case 1000060005:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_SUBMIT_INFO_KHX";
+ case 1000060006:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_BIND_SPARSE_INFO_KHX";
+ case 1000060007:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_PRESENT_CAPABILITIES_KHX";
+ case 1000060008:
+ return "VK_STRUCTURE_TYPE_IMAGE_SWAPCHAIN_CREATE_INFO_KHX";
+ case 1000060009:
+ return "VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHX";
+ case 1000060010:
+ return "VK_STRUCTURE_TYPE_ACQUIRE_NEXT_IMAGE_INFO_KHX";
+ case 1000060011:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_PRESENT_INFO_KHX";
+ case 1000060012:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_SWAPCHAIN_CREATE_INFO_KHX";
+ case 1000060013:
+ return "VK_STRUCTURE_TYPE_BIND_BUFFER_MEMORY_DEVICE_GROUP_INFO_KHX";
+ case 1000060014:
+ return "VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_DEVICE_GROUP_INFO_KHX";
+ case 1000061000:
+ return "VK_STRUCTURE_TYPE_VALIDATION_FLAGS_EXT";
+ case 1000062000:
+ return "VK_STRUCTURE_TYPE_VI_SURFACE_CREATE_INFO_NN";
+ case 1000070000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_GROUP_PROPERTIES_KHX";
+ case 1000070001:
+ return "VK_STRUCTURE_TYPE_DEVICE_GROUP_DEVICE_CREATE_INFO_KHX";
+ case 1000071000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_IMAGE_FORMAT_INFO_KHR";
+ case 1000071001:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_IMAGE_FORMAT_PROPERTIES_KHR";
+ case 1000071002:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_BUFFER_INFO_KHR";
+ case 1000071003:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_BUFFER_PROPERTIES_KHR";
+ case 1000071004:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_ID_PROPERTIES_KHR";
+ case 1000072000:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_BUFFER_CREATE_INFO_KHR";
+ case 1000072001:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_KHR";
+ case 1000072002:
+ return "VK_STRUCTURE_TYPE_EXPORT_MEMORY_ALLOCATE_INFO_KHR";
+ case 1000073000:
+ return "VK_STRUCTURE_TYPE_IMPORT_MEMORY_WIN32_HANDLE_INFO_KHR";
+ case 1000073001:
+ return "VK_STRUCTURE_TYPE_EXPORT_MEMORY_WIN32_HANDLE_INFO_KHR";
+ case 1000073002:
+ return "VK_STRUCTURE_TYPE_MEMORY_WIN32_HANDLE_PROPERTIES_KHR";
+ case 1000073003:
+ return "VK_STRUCTURE_TYPE_MEMORY_GET_WIN32_HANDLE_INFO_KHR";
+ case 1000074000:
+ return "VK_STRUCTURE_TYPE_IMPORT_MEMORY_FD_INFO_KHR";
+ case 1000074001:
+ return "VK_STRUCTURE_TYPE_MEMORY_FD_PROPERTIES_KHR";
+ case 1000074002:
+ return "VK_STRUCTURE_TYPE_MEMORY_GET_FD_INFO_KHR";
+ case 1000075000:
+ return "VK_STRUCTURE_TYPE_WIN32_KEYED_MUTEX_ACQUIRE_RELEASE_INFO_KHR";
+ case 1000076000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_SEMAPHORE_INFO_KHR";
+ case 1000076001:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_SEMAPHORE_PROPERTIES_KHR";
+ case 1000077000:
+ return "VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_CREATE_INFO_KHR";
+ case 1000078000:
+ return "VK_STRUCTURE_TYPE_IMPORT_SEMAPHORE_WIN32_HANDLE_INFO_KHR";
+ case 1000078001:
+ return "VK_STRUCTURE_TYPE_EXPORT_SEMAPHORE_WIN32_HANDLE_INFO_KHR";
+ case 1000078002:
+ return "VK_STRUCTURE_TYPE_D3D12_FENCE_SUBMIT_INFO_KHR";
+ case 1000078003:
+ return "VK_STRUCTURE_TYPE_SEMAPHORE_GET_WIN32_HANDLE_INFO_KHR";
+ case 1000079000:
+ return "VK_STRUCTURE_TYPE_IMPORT_SEMAPHORE_FD_INFO_KHR";
+ case 1000079001:
+ return "VK_STRUCTURE_TYPE_SEMAPHORE_GET_FD_INFO_KHR";
+ case 1000080000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PUSH_DESCRIPTOR_PROPERTIES_KHR";
+ case 1000083000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_16BIT_STORAGE_FEATURES_KHR";
+ case 1000084000:
+ return "VK_STRUCTURE_TYPE_PRESENT_REGIONS_KHR";
+ case 1000085000:
+ return "VK_STRUCTURE_TYPE_DESCRIPTOR_UPDATE_TEMPLATE_CREATE_INFO_KHR";
+ case 1000086000:
+ return "VK_STRUCTURE_TYPE_OBJECT_TABLE_CREATE_INFO_NVX";
+ case 1000086001:
+ return "VK_STRUCTURE_TYPE_INDIRECT_COMMANDS_LAYOUT_CREATE_INFO_NVX";
+ case 1000086002:
+ return "VK_STRUCTURE_TYPE_CMD_PROCESS_COMMANDS_INFO_NVX";
+ case 1000086003:
+ return "VK_STRUCTURE_TYPE_CMD_RESERVE_SPACE_FOR_COMMANDS_INFO_NVX";
+ case 1000086004:
+ return "VK_STRUCTURE_TYPE_DEVICE_GENERATED_COMMANDS_LIMITS_NVX";
+ case 1000086005:
+ return "VK_STRUCTURE_TYPE_DEVICE_GENERATED_COMMANDS_FEATURES_NVX";
+ case 1000087000:
+ return "VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_W_SCALING_STATE_CREATE_INFO_NV";
+ case 1000090000:
+ return "VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_EXT";
+ case 1000091000:
+ return "VK_STRUCTURE_TYPE_DISPLAY_POWER_INFO_EXT";
+ case 1000091001:
+ return "VK_STRUCTURE_TYPE_DEVICE_EVENT_INFO_EXT";
+ case 1000091002:
+ return "VK_STRUCTURE_TYPE_DISPLAY_EVENT_INFO_EXT";
+ case 1000091003:
+ return "VK_STRUCTURE_TYPE_SWAPCHAIN_COUNTER_CREATE_INFO_EXT";
+ case 1000092000:
+ return "VK_STRUCTURE_TYPE_PRESENT_TIMES_INFO_GOOGLE";
+ case 1000097000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_PER_VIEW_ATTRIBUTES_PROPERTIES_NVX";
+ case 1000098000:
+ return "VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_SWIZZLE_STATE_CREATE_INFO_NV";
+ case 1000099000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DISCARD_RECTANGLE_PROPERTIES_EXT";
+ case 1000099001:
+ return "VK_STRUCTURE_TYPE_PIPELINE_DISCARD_RECTANGLE_STATE_CREATE_INFO_EXT";
+ case 1000105000:
+ return "VK_STRUCTURE_TYPE_HDR_METADATA_EXT";
+ case 1000111000:
+ return "VK_STRUCTURE_TYPE_SHARED_PRESENT_SURFACE_CAPABILITIES_KHR";
+ case 1000112000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_FENCE_INFO_KHR";
+ case 1000112001:
+ return "VK_STRUCTURE_TYPE_EXTERNAL_FENCE_PROPERTIES_KHR";
+ case 1000113000:
+ return "VK_STRUCTURE_TYPE_EXPORT_FENCE_CREATE_INFO_KHR";
+ case 1000114000:
+ return "VK_STRUCTURE_TYPE_IMPORT_FENCE_WIN32_HANDLE_INFO_KHR";
+ case 1000114001:
+ return "VK_STRUCTURE_TYPE_EXPORT_FENCE_WIN32_HANDLE_INFO_KHR";
+ case 1000114002:
+ return "VK_STRUCTURE_TYPE_FENCE_GET_WIN32_HANDLE_INFO_KHR";
+ case 1000115000:
+ return "VK_STRUCTURE_TYPE_IMPORT_FENCE_FD_INFO_KHR";
+ case 1000115001:
+ return "VK_STRUCTURE_TYPE_FENCE_GET_FD_INFO_KHR";
+ case 1000117000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_POINT_CLIPPING_PROPERTIES_KHR";
+ case 1000117001:
+ return "VK_STRUCTURE_TYPE_RENDER_PASS_INPUT_ATTACHMENT_ASPECT_CREATE_INFO_KHR";
+ case 1000117002:
+ return "VK_STRUCTURE_TYPE_IMAGE_VIEW_USAGE_CREATE_INFO_KHR";
+ case 1000117003:
+ return "VK_STRUCTURE_TYPE_PIPELINE_TESSELLATION_DOMAIN_ORIGIN_STATE_CREATE_INFO_KHR";
+ case 1000119000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SURFACE_INFO_2_KHR";
+ case 1000119001:
+ return "VK_STRUCTURE_TYPE_SURFACE_CAPABILITIES_2_KHR";
+ case 1000119002:
+ return "VK_STRUCTURE_TYPE_SURFACE_FORMAT_2_KHR";
+ case 1000120000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTER_FEATURES_KHR";
+ case 1000122000:
+ return "VK_STRUCTURE_TYPE_IOS_SURFACE_CREATE_INFO_MVK";
+ case 1000123000:
+ return "VK_STRUCTURE_TYPE_MACOS_SURFACE_CREATE_INFO_MVK";
+ case 1000127000:
+ return "VK_STRUCTURE_TYPE_MEMORY_DEDICATED_REQUIREMENTS_KHR";
+ case 1000127001:
+ return "VK_STRUCTURE_TYPE_MEMORY_DEDICATED_ALLOCATE_INFO_KHR";
+ case 1000130000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_FILTER_MINMAX_PROPERTIES_EXT";
+ case 1000130001:
+ return "VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO_EXT";
+ case 1000143000:
+ return "VK_STRUCTURE_TYPE_SAMPLE_LOCATIONS_INFO_EXT";
+ case 1000143001:
+ return "VK_STRUCTURE_TYPE_RENDER_PASS_SAMPLE_LOCATIONS_BEGIN_INFO_EXT";
+ case 1000143002:
+ return "VK_STRUCTURE_TYPE_PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT";
+ case 1000143003:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLE_LOCATIONS_PROPERTIES_EXT";
+ case 1000143004:
+ return "VK_STRUCTURE_TYPE_MULTISAMPLE_PROPERTIES_EXT";
+ case 1000146000:
+ return "VK_STRUCTURE_TYPE_BUFFER_MEMORY_REQUIREMENTS_INFO_2_KHR";
+ case 1000146001:
+ return "VK_STRUCTURE_TYPE_IMAGE_MEMORY_REQUIREMENTS_INFO_2_KHR";
+ case 1000146002:
+ return "VK_STRUCTURE_TYPE_IMAGE_SPARSE_MEMORY_REQUIREMENTS_INFO_2_KHR";
+ case 1000146003:
+ return "VK_STRUCTURE_TYPE_MEMORY_REQUIREMENTS_2_KHR";
+ case 1000146004:
+ return "VK_STRUCTURE_TYPE_SPARSE_IMAGE_MEMORY_REQUIREMENTS_2_KHR";
+ case 1000147000:
+ return "VK_STRUCTURE_TYPE_IMAGE_FORMAT_LIST_CREATE_INFO_KHR";
+ case 1000148000:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BLEND_OPERATION_ADVANCED_FEATURES_EXT";
+ case 1000148001:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BLEND_OPERATION_ADVANCED_PROPERTIES_EXT";
+ case 1000148002:
+ return "VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_ADVANCED_STATE_CREATE_INFO_EXT";
+ case 1000149000:
+ return "VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_TO_COLOR_STATE_CREATE_INFO_NV";
+ case 1000152000:
+ return "VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_MODULATION_STATE_CREATE_INFO_NV";
+ case 1000156000:
+ return "VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_CREATE_INFO_KHR";
+ case 1000156001:
+ return "VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_INFO_KHR";
+ case 1000156002:
+ return "VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO_KHR";
+ case 1000156003:
+ return "VK_STRUCTURE_TYPE_IMAGE_PLANE_MEMORY_REQUIREMENTS_INFO_KHR";
+ case 1000156004:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_YCBCR_CONVERSION_FEATURES_KHR";
+ case 1000156005:
+ return "VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_IMAGE_FORMAT_PROPERTIES_KHR";
+ case 1000157000:
+ return "VK_STRUCTURE_TYPE_BIND_BUFFER_MEMORY_INFO_KHR";
+ case 1000157001:
+ return "VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_INFO_KHR";
+ case 1000160000:
+ return "VK_STRUCTURE_TYPE_VALIDATION_CACHE_CREATE_INFO_EXT";
+ case 1000160001:
+ return "VK_STRUCTURE_TYPE_SHADER_MODULE_VALIDATION_CACHE_CREATE_INFO_EXT";
+ case 1000174000:
+ return "VK_STRUCTURE_TYPE_DEVICE_QUEUE_GLOBAL_PRIORITY_CREATE_INFO_EXT";
+ case 1000178000:
+ return "VK_STRUCTURE_TYPE_IMPORT_MEMORY_HOST_POINTER_INFO_EXT";
+ case 1000178001:
+ return "VK_STRUCTURE_TYPE_MEMORY_HOST_POINTER_PROPERTIES_EXT";
+ case 1000178002:
+ return "VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_MEMORY_HOST_PROPERTIES_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SubpassContents_to_str(VkSubpassContents input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SUBPASS_CONTENTS_INLINE";
+ case 1:
+ return "VK_SUBPASS_CONTENTS_SECONDARY_COMMAND_BUFFERS";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_SystemAllocationScope_to_str(VkSystemAllocationScope input)
+{
+ switch(input) {
+ case 0:
+ return "VK_SYSTEM_ALLOCATION_SCOPE_COMMAND";
+ case 1:
+ return "VK_SYSTEM_ALLOCATION_SCOPE_OBJECT";
+ case 2:
+ return "VK_SYSTEM_ALLOCATION_SCOPE_CACHE";
+ case 3:
+ return "VK_SYSTEM_ALLOCATION_SCOPE_DEVICE";
+ case 4:
+ return "VK_SYSTEM_ALLOCATION_SCOPE_INSTANCE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_TessellationDomainOriginKHR_to_str(VkTessellationDomainOriginKHR input)
+{
+ switch(input) {
+ case 0:
+ return "VK_TESSELLATION_DOMAIN_ORIGIN_UPPER_LEFT_KHR";
+ case 1:
+ return "VK_TESSELLATION_DOMAIN_ORIGIN_LOWER_LEFT_KHR";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ValidationCacheHeaderVersionEXT_to_str(VkValidationCacheHeaderVersionEXT input)
+{
+ switch(input) {
+ case 1:
+ return "VK_VALIDATION_CACHE_HEADER_VERSION_ONE_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ValidationCheckEXT_to_str(VkValidationCheckEXT input)
+{
+ switch(input) {
+ case 0:
+ return "VK_VALIDATION_CHECK_ALL_EXT";
+ case 1:
+ return "VK_VALIDATION_CHECK_SHADERS_EXT";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_VertexInputRate_to_str(VkVertexInputRate input)
+{
+ switch(input) {
+ case 0:
+ return "VK_VERTEX_INPUT_RATE_VERTEX";
+ case 1:
+ return "VK_VERTEX_INPUT_RATE_INSTANCE";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
+
+const char *
+vk_ViewportCoordinateSwizzleNV_to_str(VkViewportCoordinateSwizzleNV input)
+{
+ switch(input) {
+ case 0:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_POSITIVE_X_NV";
+ case 1:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_NEGATIVE_X_NV";
+ case 2:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_POSITIVE_Y_NV";
+ case 3:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_NEGATIVE_Y_NV";
+ case 4:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_POSITIVE_Z_NV";
+ case 5:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_NEGATIVE_Z_NV";
+ case 6:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_POSITIVE_W_NV";
+ case 7:
+ return "VK_VIEWPORT_COORDINATE_SWIZZLE_NEGATIVE_W_NV";
+ default:
+ unreachable("Undefined enum value.");
+ }
+}
diff --git a/prebuilt-intermediates/util/vk_enum_to_str.h b/prebuilt-intermediates/util/vk_enum_to_str.h
new file mode 100644
index 0000000..48c585f
--- /dev/null
+++ b/prebuilt-intermediates/util/vk_enum_to_str.h
@@ -0,0 +1,199 @@
+/* Autogenerated file -- do not edit
+ * generated by gen_enum_to_str.py
+ *
+ * Copyright © 2017 Intel Corporation
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+ */
+
+#ifndef MESA_VK_ENUM_TO_STR_H
+#define MESA_VK_ENUM_TO_STR_H
+
+#include <vulkan/vulkan.h>
+#include <vulkan/vk_android_native_buffer.h>
+
+#define _VK_AMD_draw_indirect_count_number (34)
+#define _VK_AMD_gcn_shader_number (26)
+#define _VK_AMD_gpu_shader_half_float_number (37)
+#define _VK_AMD_gpu_shader_int16_number (133)
+#define _VK_AMD_mixed_attachment_samples_number (137)
+#define _VK_AMD_negative_viewport_height_number (36)
+#define _VK_AMD_rasterization_order_number (19)
+#define _VK_AMD_shader_ballot_number (38)
+#define _VK_AMD_shader_explicit_vertex_parameter_number (22)
+#define _VK_AMD_shader_fragment_mask_number (138)
+#define _VK_AMD_shader_image_load_store_lod_number (47)
+#define _VK_AMD_shader_info_number (43)
+#define _VK_AMD_shader_trinary_minmax_number (21)
+#define _VK_AMD_texture_gather_bias_lod_number (42)
+#define _VK_ANDROID_native_buffer_number (11)
+#define _VK_EXT_acquire_xlib_display_number (90)
+#define _VK_EXT_blend_operation_advanced_number (149)
+#define _VK_EXT_debug_marker_number (23)
+#define _VK_EXT_debug_report_number (12)
+#define _VK_EXT_depth_range_unrestricted_number (14)
+#define _VK_EXT_direct_mode_display_number (89)
+#define _VK_EXT_discard_rectangles_number (100)
+#define _VK_EXT_display_control_number (92)
+#define _VK_EXT_display_surface_counter_number (91)
+#define _VK_EXT_external_memory_dma_buf_number (126)
+#define _VK_EXT_external_memory_host_number (179)
+#define _VK_EXT_global_priority_number (175)
+#define _VK_EXT_hdr_metadata_number (106)
+#define _VK_EXT_post_depth_coverage_number (156)
+#define _VK_EXT_queue_family_foreign_number (127)
+#define _VK_EXT_sample_locations_number (144)
+#define _VK_EXT_sampler_filter_minmax_number (131)
+#define _VK_EXT_shader_stencil_export_number (141)
+#define _VK_EXT_shader_subgroup_ballot_number (65)
+#define _VK_EXT_shader_subgroup_vote_number (66)
+#define _VK_EXT_shader_viewport_index_layer_number (163)
+#define _VK_EXT_swapchain_colorspace_number (105)
+#define _VK_EXT_validation_cache_number (161)
+#define _VK_EXT_validation_flags_number (62)
+#define _VK_GOOGLE_display_timing_number (93)
+#define _VK_IMG_filter_cubic_number (16)
+#define _VK_IMG_format_pvrtc_number (55)
+#define _VK_KHR_16bit_storage_number (84)
+#define _VK_KHR_android_surface_number (9)
+#define _VK_KHR_bind_memory2_number (158)
+#define _VK_KHR_dedicated_allocation_number (128)
+#define _VK_KHR_descriptor_update_template_number (86)
+#define _VK_KHR_display_number (3)
+#define _VK_KHR_display_swapchain_number (4)
+#define _VK_KHR_external_fence_number (114)
+#define _VK_KHR_external_fence_capabilities_number (113)
+#define _VK_KHR_external_fence_fd_number (116)
+#define _VK_KHR_external_fence_win32_number (115)
+#define _VK_KHR_external_memory_number (73)
+#define _VK_KHR_external_memory_capabilities_number (72)
+#define _VK_KHR_external_memory_fd_number (75)
+#define _VK_KHR_external_memory_win32_number (74)
+#define _VK_KHR_external_semaphore_number (78)
+#define _VK_KHR_external_semaphore_capabilities_number (77)
+#define _VK_KHR_external_semaphore_fd_number (80)
+#define _VK_KHR_external_semaphore_win32_number (79)
+#define _VK_KHR_get_memory_requirements2_number (147)
+#define _VK_KHR_get_physical_device_properties2_number (60)
+#define _VK_KHR_get_surface_capabilities2_number (120)
+#define _VK_KHR_image_format_list_number (148)
+#define _VK_KHR_incremental_present_number (85)
+#define _VK_KHR_maintenance1_number (70)
+#define _VK_KHR_maintenance2_number (118)
+#define _VK_KHR_mir_surface_number (8)
+#define _VK_KHR_push_descriptor_number (81)
+#define _VK_KHR_relaxed_block_layout_number (145)
+#define _VK_KHR_sampler_mirror_clamp_to_edge_number (15)
+#define _VK_KHR_sampler_ycbcr_conversion_number (157)
+#define _VK_KHR_shader_draw_parameters_number (64)
+#define _VK_KHR_shared_presentable_image_number (112)
+#define _VK_KHR_storage_buffer_storage_class_number (132)
+#define _VK_KHR_surface_number (1)
+#define _VK_KHR_swapchain_number (2)
+#define _VK_KHR_variable_pointers_number (121)
+#define _VK_KHR_wayland_surface_number (7)
+#define _VK_KHR_win32_keyed_mutex_number (76)
+#define _VK_KHR_win32_surface_number (10)
+#define _VK_KHR_xcb_surface_number (6)
+#define _VK_KHR_xlib_surface_number (5)
+#define _VK_KHX_device_group_number (61)
+#define _VK_KHX_device_group_creation_number (71)
+#define _VK_KHX_multiview_number (54)
+#define _VK_MVK_ios_surface_number (123)
+#define _VK_MVK_macos_surface_number (124)
+#define _VK_NN_vi_surface_number (63)
+#define _VK_NVX_device_generated_commands_number (87)
+#define _VK_NVX_multiview_per_view_attributes_number (98)
+#define _VK_NV_clip_space_w_scaling_number (88)
+#define _VK_NV_dedicated_allocation_number (27)
+#define _VK_NV_external_memory_number (57)
+#define _VK_NV_external_memory_capabilities_number (56)
+#define _VK_NV_external_memory_win32_number (58)
+#define _VK_NV_fill_rectangle_number (154)
+#define _VK_NV_fragment_coverage_to_color_number (150)
+#define _VK_NV_framebuffer_mixed_samples_number (153)
+#define _VK_NV_geometry_shader_passthrough_number (96)
+#define _VK_NV_glsl_shader_number (13)
+#define _VK_NV_sample_mask_override_coverage_number (95)
+#define _VK_NV_viewport_array2_number (97)
+#define _VK_NV_viewport_swizzle_number (99)
+#define _VK_NV_win32_keyed_mutex_number (59)
+
+const char * vk_AttachmentLoadOp_to_str(VkAttachmentLoadOp input);
+const char * vk_AttachmentStoreOp_to_str(VkAttachmentStoreOp input);
+const char * vk_BlendFactor_to_str(VkBlendFactor input);
+const char * vk_BlendOp_to_str(VkBlendOp input);
+const char * vk_BlendOverlapEXT_to_str(VkBlendOverlapEXT input);
+const char * vk_BorderColor_to_str(VkBorderColor input);
+const char * vk_ChromaLocationKHR_to_str(VkChromaLocationKHR input);
+const char * vk_ColorSpaceKHR_to_str(VkColorSpaceKHR input);
+const char * vk_CommandBufferLevel_to_str(VkCommandBufferLevel input);
+const char * vk_CompareOp_to_str(VkCompareOp input);
+const char * vk_ComponentSwizzle_to_str(VkComponentSwizzle input);
+const char * vk_CoverageModulationModeNV_to_str(VkCoverageModulationModeNV input);
+const char * vk_DebugReportObjectTypeEXT_to_str(VkDebugReportObjectTypeEXT input);
+const char * vk_DescriptorType_to_str(VkDescriptorType input);
+const char * vk_DescriptorUpdateTemplateTypeKHR_to_str(VkDescriptorUpdateTemplateTypeKHR input);
+const char * vk_DeviceEventTypeEXT_to_str(VkDeviceEventTypeEXT input);
+const char * vk_DiscardRectangleModeEXT_to_str(VkDiscardRectangleModeEXT input);
+const char * vk_DisplayEventTypeEXT_to_str(VkDisplayEventTypeEXT input);
+const char * vk_DisplayPowerStateEXT_to_str(VkDisplayPowerStateEXT input);
+const char * vk_DynamicState_to_str(VkDynamicState input);
+const char * vk_Filter_to_str(VkFilter input);
+const char * vk_Format_to_str(VkFormat input);
+const char * vk_FrontFace_to_str(VkFrontFace input);
+const char * vk_ImageLayout_to_str(VkImageLayout input);
+const char * vk_ImageTiling_to_str(VkImageTiling input);
+const char * vk_ImageType_to_str(VkImageType input);
+const char * vk_ImageViewType_to_str(VkImageViewType input);
+const char * vk_IndexType_to_str(VkIndexType input);
+const char * vk_IndirectCommandsTokenTypeNVX_to_str(VkIndirectCommandsTokenTypeNVX input);
+const char * vk_InternalAllocationType_to_str(VkInternalAllocationType input);
+const char * vk_LogicOp_to_str(VkLogicOp input);
+const char * vk_ObjectEntryTypeNVX_to_str(VkObjectEntryTypeNVX input);
+const char * vk_ObjectType_to_str(VkObjectType input);
+const char * vk_PhysicalDeviceType_to_str(VkPhysicalDeviceType input);
+const char * vk_PipelineBindPoint_to_str(VkPipelineBindPoint input);
+const char * vk_PipelineCacheHeaderVersion_to_str(VkPipelineCacheHeaderVersion input);
+const char * vk_PointClippingBehaviorKHR_to_str(VkPointClippingBehaviorKHR input);
+const char * vk_PolygonMode_to_str(VkPolygonMode input);
+const char * vk_PresentModeKHR_to_str(VkPresentModeKHR input);
+const char * vk_PrimitiveTopology_to_str(VkPrimitiveTopology input);
+const char * vk_QueryType_to_str(VkQueryType input);
+const char * vk_QueueGlobalPriorityEXT_to_str(VkQueueGlobalPriorityEXT input);
+const char * vk_RasterizationOrderAMD_to_str(VkRasterizationOrderAMD input);
+const char * vk_Result_to_str(VkResult input);
+const char * vk_SamplerAddressMode_to_str(VkSamplerAddressMode input);
+const char * vk_SamplerMipmapMode_to_str(VkSamplerMipmapMode input);
+const char * vk_SamplerReductionModeEXT_to_str(VkSamplerReductionModeEXT input);
+const char * vk_SamplerYcbcrModelConversionKHR_to_str(VkSamplerYcbcrModelConversionKHR input);
+const char * vk_SamplerYcbcrRangeKHR_to_str(VkSamplerYcbcrRangeKHR input);
+const char * vk_ShaderInfoTypeAMD_to_str(VkShaderInfoTypeAMD input);
+const char * vk_SharingMode_to_str(VkSharingMode input);
+const char * vk_StencilOp_to_str(VkStencilOp input);
+const char * vk_StructureType_to_str(VkStructureType input);
+const char * vk_SubpassContents_to_str(VkSubpassContents input);
+const char * vk_SystemAllocationScope_to_str(VkSystemAllocationScope input);
+const char * vk_TessellationDomainOriginKHR_to_str(VkTessellationDomainOriginKHR input);
+const char * vk_ValidationCacheHeaderVersionEXT_to_str(VkValidationCacheHeaderVersionEXT input);
+const char * vk_ValidationCheckEXT_to_str(VkValidationCheckEXT input);
+const char * vk_VertexInputRate_to_str(VkVertexInputRate input);
+const char * vk_ViewportCoordinateSwizzleNV_to_str(VkViewportCoordinateSwizzleNV input);
+
+#endif
\ No newline at end of file
diff --git a/prebuilt-intermediates/vulkan/anv_entrypoints.c b/prebuilt-intermediates/vulkan/anv_entrypoints.c
new file mode 100644
index 0000000..e73bdb6
--- /dev/null
+++ b/prebuilt-intermediates/vulkan/anv_entrypoints.c
@@ -0,0 +1,4724 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/* This file generated from anv_entrypoints_gen.py, don't edit directly. */
+
+#include "anv_private.h"
+
+struct anv_entrypoint {
+ uint32_t name;
+ uint32_t hash;
+};
+
+/* We use a big string constant to avoid lots of reloctions from the entry
+ * point table to lots of little strings. The entries in the entry point table
+ * store the index into this big string.
+ */
+
+static const char strings[] =
+ "vkCreateInstance\0"
+ "vkDestroyInstance\0"
+ "vkEnumeratePhysicalDevices\0"
+ "vkGetDeviceProcAddr\0"
+ "vkGetInstanceProcAddr\0"
+ "vkGetPhysicalDeviceProperties\0"
+ "vkGetPhysicalDeviceQueueFamilyProperties\0"
+ "vkGetPhysicalDeviceMemoryProperties\0"
+ "vkGetPhysicalDeviceFeatures\0"
+ "vkGetPhysicalDeviceFormatProperties\0"
+ "vkGetPhysicalDeviceImageFormatProperties\0"
+ "vkCreateDevice\0"
+ "vkDestroyDevice\0"
+ "vkEnumerateInstanceLayerProperties\0"
+ "vkEnumerateInstanceExtensionProperties\0"
+ "vkEnumerateDeviceLayerProperties\0"
+ "vkEnumerateDeviceExtensionProperties\0"
+ "vkGetDeviceQueue\0"
+ "vkQueueSubmit\0"
+ "vkQueueWaitIdle\0"
+ "vkDeviceWaitIdle\0"
+ "vkAllocateMemory\0"
+ "vkFreeMemory\0"
+ "vkMapMemory\0"
+ "vkUnmapMemory\0"
+ "vkFlushMappedMemoryRanges\0"
+ "vkInvalidateMappedMemoryRanges\0"
+ "vkGetDeviceMemoryCommitment\0"
+ "vkGetBufferMemoryRequirements\0"
+ "vkBindBufferMemory\0"
+ "vkGetImageMemoryRequirements\0"
+ "vkBindImageMemory\0"
+ "vkGetImageSparseMemoryRequirements\0"
+ "vkGetPhysicalDeviceSparseImageFormatProperties\0"
+ "vkQueueBindSparse\0"
+ "vkCreateFence\0"
+ "vkDestroyFence\0"
+ "vkResetFences\0"
+ "vkGetFenceStatus\0"
+ "vkWaitForFences\0"
+ "vkCreateSemaphore\0"
+ "vkDestroySemaphore\0"
+ "vkCreateEvent\0"
+ "vkDestroyEvent\0"
+ "vkGetEventStatus\0"
+ "vkSetEvent\0"
+ "vkResetEvent\0"
+ "vkCreateQueryPool\0"
+ "vkDestroyQueryPool\0"
+ "vkGetQueryPoolResults\0"
+ "vkCreateBuffer\0"
+ "vkDestroyBuffer\0"
+ "vkCreateBufferView\0"
+ "vkDestroyBufferView\0"
+ "vkCreateImage\0"
+ "vkDestroyImage\0"
+ "vkGetImageSubresourceLayout\0"
+ "vkCreateImageView\0"
+ "vkDestroyImageView\0"
+ "vkCreateShaderModule\0"
+ "vkDestroyShaderModule\0"
+ "vkCreatePipelineCache\0"
+ "vkDestroyPipelineCache\0"
+ "vkGetPipelineCacheData\0"
+ "vkMergePipelineCaches\0"
+ "vkCreateGraphicsPipelines\0"
+ "vkCreateComputePipelines\0"
+ "vkDestroyPipeline\0"
+ "vkCreatePipelineLayout\0"
+ "vkDestroyPipelineLayout\0"
+ "vkCreateSampler\0"
+ "vkDestroySampler\0"
+ "vkCreateDescriptorSetLayout\0"
+ "vkDestroyDescriptorSetLayout\0"
+ "vkCreateDescriptorPool\0"
+ "vkDestroyDescriptorPool\0"
+ "vkResetDescriptorPool\0"
+ "vkAllocateDescriptorSets\0"
+ "vkFreeDescriptorSets\0"
+ "vkUpdateDescriptorSets\0"
+ "vkCreateFramebuffer\0"
+ "vkDestroyFramebuffer\0"
+ "vkCreateRenderPass\0"
+ "vkDestroyRenderPass\0"
+ "vkGetRenderAreaGranularity\0"
+ "vkCreateCommandPool\0"
+ "vkDestroyCommandPool\0"
+ "vkResetCommandPool\0"
+ "vkAllocateCommandBuffers\0"
+ "vkFreeCommandBuffers\0"
+ "vkBeginCommandBuffer\0"
+ "vkEndCommandBuffer\0"
+ "vkResetCommandBuffer\0"
+ "vkCmdBindPipeline\0"
+ "vkCmdSetViewport\0"
+ "vkCmdSetScissor\0"
+ "vkCmdSetLineWidth\0"
+ "vkCmdSetDepthBias\0"
+ "vkCmdSetBlendConstants\0"
+ "vkCmdSetDepthBounds\0"
+ "vkCmdSetStencilCompareMask\0"
+ "vkCmdSetStencilWriteMask\0"
+ "vkCmdSetStencilReference\0"
+ "vkCmdBindDescriptorSets\0"
+ "vkCmdBindIndexBuffer\0"
+ "vkCmdBindVertexBuffers\0"
+ "vkCmdDraw\0"
+ "vkCmdDrawIndexed\0"
+ "vkCmdDrawIndirect\0"
+ "vkCmdDrawIndexedIndirect\0"
+ "vkCmdDispatch\0"
+ "vkCmdDispatchIndirect\0"
+ "vkCmdCopyBuffer\0"
+ "vkCmdCopyImage\0"
+ "vkCmdBlitImage\0"
+ "vkCmdCopyBufferToImage\0"
+ "vkCmdCopyImageToBuffer\0"
+ "vkCmdUpdateBuffer\0"
+ "vkCmdFillBuffer\0"
+ "vkCmdClearColorImage\0"
+ "vkCmdClearDepthStencilImage\0"
+ "vkCmdClearAttachments\0"
+ "vkCmdResolveImage\0"
+ "vkCmdSetEvent\0"
+ "vkCmdResetEvent\0"
+ "vkCmdWaitEvents\0"
+ "vkCmdPipelineBarrier\0"
+ "vkCmdBeginQuery\0"
+ "vkCmdEndQuery\0"
+ "vkCmdResetQueryPool\0"
+ "vkCmdWriteTimestamp\0"
+ "vkCmdCopyQueryPoolResults\0"
+ "vkCmdPushConstants\0"
+ "vkCmdBeginRenderPass\0"
+ "vkCmdNextSubpass\0"
+ "vkCmdEndRenderPass\0"
+ "vkCmdExecuteCommands\0"
+ "vkDestroySurfaceKHR\0"
+ "vkGetPhysicalDeviceSurfaceSupportKHR\0"
+ "vkGetPhysicalDeviceSurfaceCapabilitiesKHR\0"
+ "vkGetPhysicalDeviceSurfaceFormatsKHR\0"
+ "vkGetPhysicalDeviceSurfacePresentModesKHR\0"
+ "vkCreateSwapchainKHR\0"
+ "vkDestroySwapchainKHR\0"
+ "vkGetSwapchainImagesKHR\0"
+ "vkAcquireNextImageKHR\0"
+ "vkQueuePresentKHR\0"
+ "vkCreateWaylandSurfaceKHR\0"
+ "vkGetPhysicalDeviceWaylandPresentationSupportKHR\0"
+ "vkCreateXlibSurfaceKHR\0"
+ "vkGetPhysicalDeviceXlibPresentationSupportKHR\0"
+ "vkCreateXcbSurfaceKHR\0"
+ "vkGetPhysicalDeviceXcbPresentationSupportKHR\0"
+ "vkCreateDebugReportCallbackEXT\0"
+ "vkDestroyDebugReportCallbackEXT\0"
+ "vkDebugReportMessageEXT\0"
+ "vkGetPhysicalDeviceFeatures2KHR\0"
+ "vkGetPhysicalDeviceProperties2KHR\0"
+ "vkGetPhysicalDeviceFormatProperties2KHR\0"
+ "vkGetPhysicalDeviceImageFormatProperties2KHR\0"
+ "vkGetPhysicalDeviceQueueFamilyProperties2KHR\0"
+ "vkGetPhysicalDeviceMemoryProperties2KHR\0"
+ "vkGetPhysicalDeviceSparseImageFormatProperties2KHR\0"
+ "vkCmdPushDescriptorSetKHR\0"
+ "vkTrimCommandPoolKHR\0"
+ "vkGetPhysicalDeviceExternalBufferPropertiesKHR\0"
+ "vkGetMemoryFdKHR\0"
+ "vkGetMemoryFdPropertiesKHR\0"
+ "vkGetPhysicalDeviceExternalSemaphorePropertiesKHR\0"
+ "vkGetSemaphoreFdKHR\0"
+ "vkImportSemaphoreFdKHR\0"
+ "vkGetPhysicalDeviceExternalFencePropertiesKHR\0"
+ "vkGetFenceFdKHR\0"
+ "vkImportFenceFdKHR\0"
+ "vkBindBufferMemory2KHR\0"
+ "vkBindImageMemory2KHR\0"
+ "vkCreateDescriptorUpdateTemplateKHR\0"
+ "vkDestroyDescriptorUpdateTemplateKHR\0"
+ "vkUpdateDescriptorSetWithTemplateKHR\0"
+ "vkCmdPushDescriptorSetWithTemplateKHR\0"
+ "vkGetPhysicalDeviceSurfaceCapabilities2KHR\0"
+ "vkGetPhysicalDeviceSurfaceFormats2KHR\0"
+ "vkGetBufferMemoryRequirements2KHR\0"
+ "vkGetImageMemoryRequirements2KHR\0"
+ "vkGetImageSparseMemoryRequirements2KHR\0"
+ "vkCreateSamplerYcbcrConversionKHR\0"
+ "vkDestroySamplerYcbcrConversionKHR\0"
+ "vkGetSwapchainGrallocUsageANDROID\0"
+ "vkAcquireImageANDROID\0"
+ "vkQueueSignalReleaseImageANDROID\0"
+ "vkCreateDmaBufImageINTEL\0"
+;
+
+static const struct anv_entrypoint entrypoints[] = {
+ [0] = { 0, 0x38a581a6 }, /* vkCreateInstance */
+ [1] = { 17, 0x9bd21af2 }, /* vkDestroyInstance */
+ [2] = { 35, 0x5787c327 }, /* vkEnumeratePhysicalDevices */
+ [3] = { 62, 0xba013486 }, /* vkGetDeviceProcAddr */
+ [4] = { 82, 0x3d2ae9ad }, /* vkGetInstanceProcAddr */
+ [5] = { 104, 0x52fe22c9 }, /* vkGetPhysicalDeviceProperties */
+ [6] = { 134, 0x4e5fc88a }, /* vkGetPhysicalDeviceQueueFamilyProperties */
+ [7] = { 175, 0xa90da4da }, /* vkGetPhysicalDeviceMemoryProperties */
+ [8] = { 211, 0x113e2f33 }, /* vkGetPhysicalDeviceFeatures */
+ [9] = { 239, 0x3e54b398 }, /* vkGetPhysicalDeviceFormatProperties */
+ [10] = { 275, 0xdd36a867 }, /* vkGetPhysicalDeviceImageFormatProperties */
+ [11] = { 316, 0x85ed23f }, /* vkCreateDevice */
+ [12] = { 331, 0x1fbcc9cb }, /* vkDestroyDevice */
+ [13] = { 347, 0x81f69d8 }, /* vkEnumerateInstanceLayerProperties */
+ [14] = { 382, 0xeb27627e }, /* vkEnumerateInstanceExtensionProperties */
+ [15] = { 421, 0x2f8566e7 }, /* vkEnumerateDeviceLayerProperties */
+ [16] = { 454, 0x5fd13eed }, /* vkEnumerateDeviceExtensionProperties */
+ [17] = { 491, 0xcc920d9a }, /* vkGetDeviceQueue */
+ [18] = { 508, 0xfa4713ec }, /* vkQueueSubmit */
+ [19] = { 522, 0x6f8fc2a5 }, /* vkQueueWaitIdle */
+ [20] = { 538, 0xd46c5f24 }, /* vkDeviceWaitIdle */
+ [21] = { 555, 0x522b85d3 }, /* vkAllocateMemory */
+ [22] = { 572, 0x8f6f838a }, /* vkFreeMemory */
+ [23] = { 585, 0xcb977bd8 }, /* vkMapMemory */
+ [24] = { 597, 0x1a1a0e2f }, /* vkUnmapMemory */
+ [25] = { 611, 0xff52f051 }, /* vkFlushMappedMemoryRanges */
+ [26] = { 637, 0x1e115cca }, /* vkInvalidateMappedMemoryRanges */
+ [27] = { 668, 0x46e38db5 }, /* vkGetDeviceMemoryCommitment */
+ [28] = { 696, 0xab98422a }, /* vkGetBufferMemoryRequirements */
+ [29] = { 726, 0x6bcbdcb }, /* vkBindBufferMemory */
+ [30] = { 745, 0x916f1e63 }, /* vkGetImageMemoryRequirements */
+ [31] = { 774, 0x5caaae4a }, /* vkBindImageMemory */
+ [32] = { 792, 0x15855f5b }, /* vkGetImageSparseMemoryRequirements */
+ [33] = { 827, 0x272ef8ef }, /* vkGetPhysicalDeviceSparseImageFormatProperties */
+ [34] = { 874, 0xc3628a09 }, /* vkQueueBindSparse */
+ [35] = { 892, 0x958af968 }, /* vkCreateFence */
+ [36] = { 906, 0xfc64ee3c }, /* vkDestroyFence */
+ [37] = { 921, 0x684781dc }, /* vkResetFences */
+ [38] = { 935, 0x5f391892 }, /* vkGetFenceStatus */
+ [39] = { 952, 0x19d64c81 }, /* vkWaitForFences */
+ [40] = { 968, 0xf2065e5b }, /* vkCreateSemaphore */
+ [41] = { 986, 0xcaab1faf }, /* vkDestroySemaphore */
+ [42] = { 1005, 0xe7188731 }, /* vkCreateEvent */
+ [43] = { 1019, 0x4df27c05 }, /* vkDestroyEvent */
+ [44] = { 1034, 0x96d834b }, /* vkGetEventStatus */
+ [45] = { 1051, 0x592ae5f5 }, /* vkSetEvent */
+ [46] = { 1062, 0x6d373ba8 }, /* vkResetEvent */
+ [47] = { 1075, 0x5edcd92b }, /* vkCreateQueryPool */
+ [48] = { 1093, 0x37819a7f }, /* vkDestroyQueryPool */
+ [49] = { 1112, 0xbf3f2cb3 }, /* vkGetQueryPoolResults */
+ [50] = { 1134, 0x7d4282b9 }, /* vkCreateBuffer */
+ [51] = { 1149, 0x94a07a45 }, /* vkDestroyBuffer */
+ [52] = { 1165, 0x925bd256 }, /* vkCreateBufferView */
+ [53] = { 1184, 0x98b27962 }, /* vkDestroyBufferView */
+ [54] = { 1204, 0x652128c2 }, /* vkCreateImage */
+ [55] = { 1218, 0xcbfb1d96 }, /* vkDestroyImage */
+ [56] = { 1233, 0x9163b686 }, /* vkGetImageSubresourceLayout */
+ [57] = { 1261, 0xdce077ff }, /* vkCreateImageView */
+ [58] = { 1279, 0xb5853953 }, /* vkDestroyImageView */
+ [59] = { 1298, 0xa0d3cea2 }, /* vkCreateShaderModule */
+ [60] = { 1319, 0x2d77af6e }, /* vkDestroyShaderModule */
+ [61] = { 1341, 0xcbf6489f }, /* vkCreatePipelineCache */
+ [62] = { 1363, 0x4112a673 }, /* vkDestroyPipelineCache */
+ [63] = { 1386, 0x2092a349 }, /* vkGetPipelineCacheData */
+ [64] = { 1409, 0xc3499606 }, /* vkMergePipelineCaches */
+ [65] = { 1431, 0x4b59f96d }, /* vkCreateGraphicsPipelines */
+ [66] = { 1457, 0xf70c85eb }, /* vkCreateComputePipelines */
+ [67] = { 1482, 0x6aac68af }, /* vkDestroyPipeline */
+ [68] = { 1500, 0x451ef1ed }, /* vkCreatePipelineLayout */
+ [69] = { 1523, 0x9146f879 }, /* vkDestroyPipelineLayout */
+ [70] = { 1547, 0x13cf03f }, /* vkCreateSampler */
+ [71] = { 1563, 0x3b645153 }, /* vkDestroySampler */
+ [72] = { 1580, 0x3c14cc74 }, /* vkCreateDescriptorSetLayout */
+ [73] = { 1608, 0xa4227b08 }, /* vkDestroyDescriptorSetLayout */
+ [74] = { 1637, 0xfb95a8a4 }, /* vkCreateDescriptorPool */
+ [75] = { 1660, 0x47bdaf30 }, /* vkDestroyDescriptorPool */
+ [76] = { 1684, 0x9bd85f5 }, /* vkResetDescriptorPool */
+ [77] = { 1706, 0x4c449d3a }, /* vkAllocateDescriptorSets */
+ [78] = { 1731, 0x7a1347b1 }, /* vkFreeDescriptorSets */
+ [79] = { 1752, 0xbfd090ae }, /* vkUpdateDescriptorSets */
+ [80] = { 1775, 0x887a38c4 }, /* vkCreateFramebuffer */
+ [81] = { 1795, 0xdc428e58 }, /* vkDestroyFramebuffer */
+ [82] = { 1816, 0x109a9c18 }, /* vkCreateRenderPass */
+ [83] = { 1835, 0x16f14324 }, /* vkDestroyRenderPass */
+ [84] = { 1855, 0xa9820d22 }, /* vkGetRenderAreaGranularity */
+ [85] = { 1882, 0x820fe476 }, /* vkCreateCommandPool */
+ [86] = { 1902, 0xd5d83a0a }, /* vkDestroyCommandPool */
+ [87] = { 1923, 0x6da9f7fd }, /* vkResetCommandPool */
+ [88] = { 1942, 0x8c0c811a }, /* vkAllocateCommandBuffers */
+ [89] = { 1967, 0xb9db2b91 }, /* vkFreeCommandBuffers */
+ [90] = { 1988, 0xc54f7327 }, /* vkBeginCommandBuffer */
+ [91] = { 2009, 0xaffb5725 }, /* vkEndCommandBuffer */
+ [92] = { 2028, 0x847dc731 }, /* vkResetCommandBuffer */
+ [93] = { 2049, 0x3af9fd84 }, /* vkCmdBindPipeline */
+ [94] = { 2067, 0x53d6c2b }, /* vkCmdSetViewport */
+ [95] = { 2084, 0x48f28c7f }, /* vkCmdSetScissor */
+ [96] = { 2100, 0x32282165 }, /* vkCmdSetLineWidth */
+ [97] = { 2118, 0x30f14d07 }, /* vkCmdSetDepthBias */
+ [98] = { 2136, 0x1c989dfb }, /* vkCmdSetBlendConstants */
+ [99] = { 2159, 0x7b3a8a63 }, /* vkCmdSetDepthBounds */
+ [100] = { 2179, 0xa8f534e2 }, /* vkCmdSetStencilCompareMask */
+ [101] = { 2206, 0xe7c4b134 }, /* vkCmdSetStencilWriteMask */
+ [102] = { 2231, 0x83e2b024 }, /* vkCmdSetStencilReference */
+ [103] = { 2256, 0x28c7a5da }, /* vkCmdBindDescriptorSets */
+ [104] = { 2280, 0x4c22d870 }, /* vkCmdBindIndexBuffer */
+ [105] = { 2301, 0xa9c83f1d }, /* vkCmdBindVertexBuffers */
+ [106] = { 2324, 0x9912c1a1 }, /* vkCmdDraw */
+ [107] = { 2334, 0xbe5a8058 }, /* vkCmdDrawIndexed */
+ [108] = { 2351, 0xe9ac41bf }, /* vkCmdDrawIndirect */
+ [109] = { 2369, 0x94e7ed36 }, /* vkCmdDrawIndexedIndirect */
+ [110] = { 2394, 0xbd58e867 }, /* vkCmdDispatch */
+ [111] = { 2408, 0xd6353005 }, /* vkCmdDispatchIndirect */
+ [112] = { 2430, 0xc939a0da }, /* vkCmdCopyBuffer */
+ [113] = { 2446, 0x278effa9 }, /* vkCmdCopyImage */
+ [114] = { 2461, 0x331ebf89 }, /* vkCmdBlitImage */
+ [115] = { 2476, 0x929847e }, /* vkCmdCopyBufferToImage */
+ [116] = { 2499, 0x68cddbac }, /* vkCmdCopyImageToBuffer */
+ [117] = { 2522, 0xd2986b5e }, /* vkCmdUpdateBuffer */
+ [118] = { 2540, 0x5bdd2ae0 }, /* vkCmdFillBuffer */
+ [119] = { 2556, 0xb4bc8d08 }, /* vkCmdClearColorImage */
+ [120] = { 2577, 0x4f88e4ba }, /* vkCmdClearDepthStencilImage */
+ [121] = { 2605, 0x93cb5cb8 }, /* vkCmdClearAttachments */
+ [122] = { 2627, 0x671bb594 }, /* vkCmdResolveImage */
+ [123] = { 2645, 0xe257f075 }, /* vkCmdSetEvent */
+ [124] = { 2659, 0x4fccce28 }, /* vkCmdResetEvent */
+ [125] = { 2675, 0x3b9346b3 }, /* vkCmdWaitEvents */
+ [126] = { 2691, 0x97fccfe8 }, /* vkCmdPipelineBarrier */
+ [127] = { 2712, 0xf5064ea4 }, /* vkCmdBeginQuery */
+ [128] = { 2728, 0xd556fd22 }, /* vkCmdEndQuery */
+ [129] = { 2742, 0x2f614082 }, /* vkCmdResetQueryPool */
+ [130] = { 2762, 0xec4d324c }, /* vkCmdWriteTimestamp */
+ [131] = { 2782, 0xdee8c6d4 }, /* vkCmdCopyQueryPoolResults */
+ [132] = { 2808, 0xb1c6b468 }, /* vkCmdPushConstants */
+ [133] = { 2827, 0xcb7a58e3 }, /* vkCmdBeginRenderPass */
+ [134] = { 2848, 0x2eeec2f9 }, /* vkCmdNextSubpass */
+ [135] = { 2865, 0xdcdb0235 }, /* vkCmdEndRenderPass */
+ [136] = { 2884, 0x9eaabe40 }, /* vkCmdExecuteCommands */
+ [137] = { 2905, 0xf204ce7d }, /* vkDestroySurfaceKHR */
+ [138] = { 2925, 0x1a687885 }, /* vkGetPhysicalDeviceSurfaceSupportKHR */
+ [139] = { 2962, 0x77890558 }, /* vkGetPhysicalDeviceSurfaceCapabilitiesKHR */
+ [140] = { 3004, 0xe32227c8 }, /* vkGetPhysicalDeviceSurfaceFormatsKHR */
+ [141] = { 3041, 0x31c3cbd1 }, /* vkGetPhysicalDeviceSurfacePresentModesKHR */
+ [142] = { 3083, 0xcdefcaa8 }, /* vkCreateSwapchainKHR */
+ [143] = { 3104, 0x5a93ab74 }, /* vkDestroySwapchainKHR */
+ [144] = { 3126, 0x57695f28 }, /* vkGetSwapchainImagesKHR */
+ [145] = { 3150, 0xc3fedb2e }, /* vkAcquireNextImageKHR */
+ [146] = { 3172, 0xfc5fb6ce }, /* vkQueuePresentKHR */
+ [147] = { 3190, 0x2b2a4b79 }, /* vkCreateWaylandSurfaceKHR */
+ [148] = { 3216, 0x84e085ac }, /* vkGetPhysicalDeviceWaylandPresentationSupportKHR */
+ [149] = { 3265, 0xa693bc66 }, /* vkCreateXlibSurfaceKHR */
+ [150] = { 3288, 0x34a063ab }, /* vkGetPhysicalDeviceXlibPresentationSupportKHR */
+ [151] = { 3334, 0xc5e5b106 }, /* vkCreateXcbSurfaceKHR */
+ [152] = { 3356, 0x41782cb9 }, /* vkGetPhysicalDeviceXcbPresentationSupportKHR */
+ [153] = { 3401, 0x987ef56 }, /* vkCreateDebugReportCallbackEXT */
+ [154] = { 3432, 0x43d4c4e2 }, /* vkDestroyDebugReportCallbackEXT */
+ [155] = { 3464, 0xa4e75334 }, /* vkDebugReportMessageEXT */
+ [156] = { 3488, 0x6a9a3636 }, /* vkGetPhysicalDeviceFeatures2KHR */
+ [157] = { 3520, 0xcd15838c }, /* vkGetPhysicalDeviceProperties2KHR */
+ [158] = { 3554, 0x9099cbbb }, /* vkGetPhysicalDeviceFormatProperties2KHR */
+ [159] = { 3594, 0x102ff7ea }, /* vkGetPhysicalDeviceImageFormatProperties2KHR */
+ [160] = { 3639, 0x5ceb2bed }, /* vkGetPhysicalDeviceQueueFamilyProperties2KHR */
+ [161] = { 3684, 0xc8c3da3d }, /* vkGetPhysicalDeviceMemoryProperties2KHR */
+ [162] = { 3724, 0x8746ed72 }, /* vkGetPhysicalDeviceSparseImageFormatProperties2KHR */
+ [163] = { 3775, 0xf17232a1 }, /* vkCmdPushDescriptorSetKHR */
+ [164] = { 3801, 0x51177c8d }, /* vkTrimCommandPoolKHR */
+ [165] = { 3822, 0xee68b389 }, /* vkGetPhysicalDeviceExternalBufferPropertiesKHR */
+ [166] = { 3869, 0x503c14c5 }, /* vkGetMemoryFdKHR */
+ [167] = { 3886, 0xb028a792 }, /* vkGetMemoryFdPropertiesKHR */
+ [168] = { 3913, 0x984c3fa7 }, /* vkGetPhysicalDeviceExternalSemaphorePropertiesKHR */
+ [169] = { 3963, 0x3e0e9884 }, /* vkGetSemaphoreFdKHR */
+ [170] = { 3983, 0x36337c05 }, /* vkImportSemaphoreFdKHR */
+ [171] = { 4006, 0x99b35492 }, /* vkGetPhysicalDeviceExternalFencePropertiesKHR */
+ [172] = { 4052, 0x69a5d6af }, /* vkGetFenceFdKHR */
+ [173] = { 4068, 0x51df0390 }, /* vkImportFenceFdKHR */
+ [174] = { 4087, 0x6878d3ce }, /* vkBindBufferMemory2KHR */
+ [175] = { 4110, 0xf18729ad }, /* vkBindImageMemory2KHR */
+ [176] = { 4132, 0x5189488a }, /* vkCreateDescriptorUpdateTemplateKHR */
+ [177] = { 4168, 0xaa83901e }, /* vkDestroyDescriptorUpdateTemplateKHR */
+ [178] = { 4205, 0x214ad230 }, /* vkUpdateDescriptorSetWithTemplateKHR */
+ [179] = { 4242, 0x3d528981 }, /* vkCmdPushDescriptorSetWithTemplateKHR */
+ [180] = { 4280, 0x9497e378 }, /* vkGetPhysicalDeviceSurfaceCapabilities2KHR */
+ [181] = { 4323, 0xd00b7188 }, /* vkGetPhysicalDeviceSurfaceFormats2KHR */
+ [182] = { 4361, 0x78dbe98d }, /* vkGetBufferMemoryRequirements2KHR */
+ [183] = { 4395, 0x8de28366 }, /* vkGetImageMemoryRequirements2KHR */
+ [184] = { 4428, 0x3df40f5e }, /* vkGetImageSparseMemoryRequirements2KHR */
+ [185] = { 4467, 0x7482104f }, /* vkCreateSamplerYcbcrConversionKHR */
+ [186] = { 4501, 0xaaa623a3 }, /* vkDestroySamplerYcbcrConversionKHR */
+ [187] = { 4536, 0x4979c9a3 }, /* vkGetSwapchainGrallocUsageANDROID */
+ [188] = { 4570, 0x6bf780dd }, /* vkAcquireImageANDROID */
+ [189] = { 4592, 0xa0313eef }, /* vkQueueSignalReleaseImageANDROID */
+ [190] = { 4625, 0x6392dfa7 }, /* vkCreateDmaBufImageINTEL */
+};
+
+/* Weak aliases for all potential implementations. These will resolve to
+ * NULL if they're not defined, which lets the resolve_entrypoint() function
+ * either pick the correct entry point.
+ */
+
+ VkResult anv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void anv_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult anv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void anv_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult anv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void anv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult anv_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult anv_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult anv_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult anv_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void anv_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void anv_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult anv_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult anv_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void anv_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void anv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void anv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void anv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult anv_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult anv_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void anv_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult anv_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult anv_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult anv_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void anv_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void anv_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult anv_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult anv_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult anv_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void anv_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult anv_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void anv_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void anv_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void anv_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void anv_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult anv_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void anv_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void anv_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void anv_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult anv_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult anv_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult anv_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void anv_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void anv_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void anv_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void anv_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void anv_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult anv_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult anv_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void anv_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult anv_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void anv_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void anv_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void anv_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult anv_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void anv_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult anv_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void anv_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult anv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult anv_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult anv_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void anv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void anv_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void anv_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void anv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void anv_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void anv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void anv_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void anv_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void anv_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void anv_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void anv_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void anv_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void anv_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void anv_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void anv_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void anv_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void anv_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void anv_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void anv_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void anv_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void anv_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void anv_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void anv_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void anv_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void anv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void anv_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void anv_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void anv_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void anv_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void anv_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void anv_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void anv_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void anv_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void anv_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void anv_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void anv_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void anv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void anv_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void anv_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void anv_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void anv_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void anv_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void anv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void anv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult anv_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void anv_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult anv_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult anv_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult anv_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult anv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 anv_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult anv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 anv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult anv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void anv_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void anv_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void anv_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void anv_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult anv_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult anv_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult anv_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult anv_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void anv_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult anv_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult anv_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult anv_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult anv_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult anv_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void anv_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void anv_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void anv_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult anv_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void anv_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void anv_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void anv_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult anv_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void anv_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult anv_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult anv_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult anv_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table anv_dispatch_table = {
+ .vkCreateInstance = anv_CreateInstance,
+ .vkDestroyInstance = anv_DestroyInstance,
+ .vkEnumeratePhysicalDevices = anv_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = anv_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = anv_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = anv_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = anv_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = anv_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = anv_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = anv_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = anv_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = anv_CreateDevice,
+ .vkDestroyDevice = anv_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = anv_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = anv_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = anv_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = anv_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = anv_GetDeviceQueue,
+ .vkQueueSubmit = anv_QueueSubmit,
+ .vkQueueWaitIdle = anv_QueueWaitIdle,
+ .vkDeviceWaitIdle = anv_DeviceWaitIdle,
+ .vkAllocateMemory = anv_AllocateMemory,
+ .vkFreeMemory = anv_FreeMemory,
+ .vkMapMemory = anv_MapMemory,
+ .vkUnmapMemory = anv_UnmapMemory,
+ .vkFlushMappedMemoryRanges = anv_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = anv_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = anv_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = anv_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = anv_BindBufferMemory,
+ .vkGetImageMemoryRequirements = anv_GetImageMemoryRequirements,
+ .vkBindImageMemory = anv_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = anv_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = anv_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = anv_QueueBindSparse,
+ .vkCreateFence = anv_CreateFence,
+ .vkDestroyFence = anv_DestroyFence,
+ .vkResetFences = anv_ResetFences,
+ .vkGetFenceStatus = anv_GetFenceStatus,
+ .vkWaitForFences = anv_WaitForFences,
+ .vkCreateSemaphore = anv_CreateSemaphore,
+ .vkDestroySemaphore = anv_DestroySemaphore,
+ .vkCreateEvent = anv_CreateEvent,
+ .vkDestroyEvent = anv_DestroyEvent,
+ .vkGetEventStatus = anv_GetEventStatus,
+ .vkSetEvent = anv_SetEvent,
+ .vkResetEvent = anv_ResetEvent,
+ .vkCreateQueryPool = anv_CreateQueryPool,
+ .vkDestroyQueryPool = anv_DestroyQueryPool,
+ .vkGetQueryPoolResults = anv_GetQueryPoolResults,
+ .vkCreateBuffer = anv_CreateBuffer,
+ .vkDestroyBuffer = anv_DestroyBuffer,
+ .vkCreateBufferView = anv_CreateBufferView,
+ .vkDestroyBufferView = anv_DestroyBufferView,
+ .vkCreateImage = anv_CreateImage,
+ .vkDestroyImage = anv_DestroyImage,
+ .vkGetImageSubresourceLayout = anv_GetImageSubresourceLayout,
+ .vkCreateImageView = anv_CreateImageView,
+ .vkDestroyImageView = anv_DestroyImageView,
+ .vkCreateShaderModule = anv_CreateShaderModule,
+ .vkDestroyShaderModule = anv_DestroyShaderModule,
+ .vkCreatePipelineCache = anv_CreatePipelineCache,
+ .vkDestroyPipelineCache = anv_DestroyPipelineCache,
+ .vkGetPipelineCacheData = anv_GetPipelineCacheData,
+ .vkMergePipelineCaches = anv_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = anv_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = anv_CreateComputePipelines,
+ .vkDestroyPipeline = anv_DestroyPipeline,
+ .vkCreatePipelineLayout = anv_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = anv_DestroyPipelineLayout,
+ .vkCreateSampler = anv_CreateSampler,
+ .vkDestroySampler = anv_DestroySampler,
+ .vkCreateDescriptorSetLayout = anv_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = anv_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = anv_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = anv_DestroyDescriptorPool,
+ .vkResetDescriptorPool = anv_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = anv_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = anv_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = anv_UpdateDescriptorSets,
+ .vkCreateFramebuffer = anv_CreateFramebuffer,
+ .vkDestroyFramebuffer = anv_DestroyFramebuffer,
+ .vkCreateRenderPass = anv_CreateRenderPass,
+ .vkDestroyRenderPass = anv_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = anv_GetRenderAreaGranularity,
+ .vkCreateCommandPool = anv_CreateCommandPool,
+ .vkDestroyCommandPool = anv_DestroyCommandPool,
+ .vkResetCommandPool = anv_ResetCommandPool,
+ .vkAllocateCommandBuffers = anv_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = anv_FreeCommandBuffers,
+ .vkBeginCommandBuffer = anv_BeginCommandBuffer,
+ .vkEndCommandBuffer = anv_EndCommandBuffer,
+ .vkResetCommandBuffer = anv_ResetCommandBuffer,
+ .vkCmdBindPipeline = anv_CmdBindPipeline,
+ .vkCmdSetViewport = anv_CmdSetViewport,
+ .vkCmdSetScissor = anv_CmdSetScissor,
+ .vkCmdSetLineWidth = anv_CmdSetLineWidth,
+ .vkCmdSetDepthBias = anv_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = anv_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = anv_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = anv_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = anv_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = anv_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = anv_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = anv_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = anv_CmdBindVertexBuffers,
+ .vkCmdDraw = anv_CmdDraw,
+ .vkCmdDrawIndexed = anv_CmdDrawIndexed,
+ .vkCmdDrawIndirect = anv_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = anv_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = anv_CmdDispatch,
+ .vkCmdDispatchIndirect = anv_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = anv_CmdCopyBuffer,
+ .vkCmdCopyImage = anv_CmdCopyImage,
+ .vkCmdBlitImage = anv_CmdBlitImage,
+ .vkCmdCopyBufferToImage = anv_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = anv_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = anv_CmdUpdateBuffer,
+ .vkCmdFillBuffer = anv_CmdFillBuffer,
+ .vkCmdClearColorImage = anv_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = anv_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = anv_CmdClearAttachments,
+ .vkCmdResolveImage = anv_CmdResolveImage,
+ .vkCmdSetEvent = anv_CmdSetEvent,
+ .vkCmdResetEvent = anv_CmdResetEvent,
+ .vkCmdWaitEvents = anv_CmdWaitEvents,
+ .vkCmdPipelineBarrier = anv_CmdPipelineBarrier,
+ .vkCmdBeginQuery = anv_CmdBeginQuery,
+ .vkCmdEndQuery = anv_CmdEndQuery,
+ .vkCmdResetQueryPool = anv_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = anv_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = anv_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = anv_CmdPushConstants,
+ .vkCmdBeginRenderPass = anv_CmdBeginRenderPass,
+ .vkCmdNextSubpass = anv_CmdNextSubpass,
+ .vkCmdEndRenderPass = anv_CmdEndRenderPass,
+ .vkCmdExecuteCommands = anv_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = anv_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = anv_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = anv_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = anv_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = anv_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = anv_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = anv_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = anv_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = anv_AcquireNextImageKHR,
+ .vkQueuePresentKHR = anv_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = anv_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = anv_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = anv_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = anv_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = anv_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = anv_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = anv_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = anv_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = anv_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = anv_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = anv_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = anv_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = anv_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = anv_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = anv_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = anv_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = anv_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = anv_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = anv_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = anv_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = anv_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = anv_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = anv_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = anv_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = anv_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = anv_GetFenceFdKHR,
+ .vkImportFenceFdKHR = anv_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = anv_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = anv_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = anv_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = anv_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = anv_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = anv_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = anv_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = anv_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = anv_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = anv_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = anv_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = anv_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = anv_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = anv_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = anv_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = anv_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = anv_CreateDmaBufImageINTEL,
+ };
+ VkResult gen7_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void gen7_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult gen7_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void gen7_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult gen7_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void gen7_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult gen7_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult gen7_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult gen7_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult gen7_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void gen7_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void gen7_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult gen7_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult gen7_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void gen7_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void gen7_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen7_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen7_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult gen7_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult gen7_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void gen7_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult gen7_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult gen7_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult gen7_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void gen7_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void gen7_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen7_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen7_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen7_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void gen7_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult gen7_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void gen7_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void gen7_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void gen7_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen7_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult gen7_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void gen7_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void gen7_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void gen7_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult gen7_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult gen7_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult gen7_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void gen7_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void gen7_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void gen7_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void gen7_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void gen7_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen7_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult gen7_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void gen7_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult gen7_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void gen7_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void gen7_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen7_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult gen7_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void gen7_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen7_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen7_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult gen7_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult gen7_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult gen7_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void gen7_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void gen7_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void gen7_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void gen7_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void gen7_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void gen7_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void gen7_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void gen7_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void gen7_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void gen7_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void gen7_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void gen7_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void gen7_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void gen7_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void gen7_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void gen7_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen7_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen7_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void gen7_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void gen7_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void gen7_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void gen7_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void gen7_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen7_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void gen7_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void gen7_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen7_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen7_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void gen7_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void gen7_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen7_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen7_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen7_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen7_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void gen7_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen7_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void gen7_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen7_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void gen7_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void gen7_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void gen7_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void gen7_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void gen7_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen7_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult gen7_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void gen7_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen7_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult gen7_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult gen7_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult gen7_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 gen7_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult gen7_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 gen7_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult gen7_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void gen7_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen7_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen7_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void gen7_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult gen7_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen7_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult gen7_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen7_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void gen7_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult gen7_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen7_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult gen7_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen7_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen7_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void gen7_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen7_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void gen7_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen7_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void gen7_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen7_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen7_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult gen7_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void gen7_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult gen7_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen7_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen7_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table gen7_dispatch_table = {
+ .vkCreateInstance = gen7_CreateInstance,
+ .vkDestroyInstance = gen7_DestroyInstance,
+ .vkEnumeratePhysicalDevices = gen7_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = gen7_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = gen7_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = gen7_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = gen7_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = gen7_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = gen7_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = gen7_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = gen7_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = gen7_CreateDevice,
+ .vkDestroyDevice = gen7_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = gen7_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = gen7_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = gen7_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = gen7_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = gen7_GetDeviceQueue,
+ .vkQueueSubmit = gen7_QueueSubmit,
+ .vkQueueWaitIdle = gen7_QueueWaitIdle,
+ .vkDeviceWaitIdle = gen7_DeviceWaitIdle,
+ .vkAllocateMemory = gen7_AllocateMemory,
+ .vkFreeMemory = gen7_FreeMemory,
+ .vkMapMemory = gen7_MapMemory,
+ .vkUnmapMemory = gen7_UnmapMemory,
+ .vkFlushMappedMemoryRanges = gen7_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = gen7_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = gen7_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = gen7_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = gen7_BindBufferMemory,
+ .vkGetImageMemoryRequirements = gen7_GetImageMemoryRequirements,
+ .vkBindImageMemory = gen7_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = gen7_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = gen7_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = gen7_QueueBindSparse,
+ .vkCreateFence = gen7_CreateFence,
+ .vkDestroyFence = gen7_DestroyFence,
+ .vkResetFences = gen7_ResetFences,
+ .vkGetFenceStatus = gen7_GetFenceStatus,
+ .vkWaitForFences = gen7_WaitForFences,
+ .vkCreateSemaphore = gen7_CreateSemaphore,
+ .vkDestroySemaphore = gen7_DestroySemaphore,
+ .vkCreateEvent = gen7_CreateEvent,
+ .vkDestroyEvent = gen7_DestroyEvent,
+ .vkGetEventStatus = gen7_GetEventStatus,
+ .vkSetEvent = gen7_SetEvent,
+ .vkResetEvent = gen7_ResetEvent,
+ .vkCreateQueryPool = gen7_CreateQueryPool,
+ .vkDestroyQueryPool = gen7_DestroyQueryPool,
+ .vkGetQueryPoolResults = gen7_GetQueryPoolResults,
+ .vkCreateBuffer = gen7_CreateBuffer,
+ .vkDestroyBuffer = gen7_DestroyBuffer,
+ .vkCreateBufferView = gen7_CreateBufferView,
+ .vkDestroyBufferView = gen7_DestroyBufferView,
+ .vkCreateImage = gen7_CreateImage,
+ .vkDestroyImage = gen7_DestroyImage,
+ .vkGetImageSubresourceLayout = gen7_GetImageSubresourceLayout,
+ .vkCreateImageView = gen7_CreateImageView,
+ .vkDestroyImageView = gen7_DestroyImageView,
+ .vkCreateShaderModule = gen7_CreateShaderModule,
+ .vkDestroyShaderModule = gen7_DestroyShaderModule,
+ .vkCreatePipelineCache = gen7_CreatePipelineCache,
+ .vkDestroyPipelineCache = gen7_DestroyPipelineCache,
+ .vkGetPipelineCacheData = gen7_GetPipelineCacheData,
+ .vkMergePipelineCaches = gen7_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = gen7_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = gen7_CreateComputePipelines,
+ .vkDestroyPipeline = gen7_DestroyPipeline,
+ .vkCreatePipelineLayout = gen7_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = gen7_DestroyPipelineLayout,
+ .vkCreateSampler = gen7_CreateSampler,
+ .vkDestroySampler = gen7_DestroySampler,
+ .vkCreateDescriptorSetLayout = gen7_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = gen7_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = gen7_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = gen7_DestroyDescriptorPool,
+ .vkResetDescriptorPool = gen7_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = gen7_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = gen7_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = gen7_UpdateDescriptorSets,
+ .vkCreateFramebuffer = gen7_CreateFramebuffer,
+ .vkDestroyFramebuffer = gen7_DestroyFramebuffer,
+ .vkCreateRenderPass = gen7_CreateRenderPass,
+ .vkDestroyRenderPass = gen7_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = gen7_GetRenderAreaGranularity,
+ .vkCreateCommandPool = gen7_CreateCommandPool,
+ .vkDestroyCommandPool = gen7_DestroyCommandPool,
+ .vkResetCommandPool = gen7_ResetCommandPool,
+ .vkAllocateCommandBuffers = gen7_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = gen7_FreeCommandBuffers,
+ .vkBeginCommandBuffer = gen7_BeginCommandBuffer,
+ .vkEndCommandBuffer = gen7_EndCommandBuffer,
+ .vkResetCommandBuffer = gen7_ResetCommandBuffer,
+ .vkCmdBindPipeline = gen7_CmdBindPipeline,
+ .vkCmdSetViewport = gen7_CmdSetViewport,
+ .vkCmdSetScissor = gen7_CmdSetScissor,
+ .vkCmdSetLineWidth = gen7_CmdSetLineWidth,
+ .vkCmdSetDepthBias = gen7_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = gen7_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = gen7_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = gen7_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = gen7_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = gen7_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = gen7_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = gen7_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = gen7_CmdBindVertexBuffers,
+ .vkCmdDraw = gen7_CmdDraw,
+ .vkCmdDrawIndexed = gen7_CmdDrawIndexed,
+ .vkCmdDrawIndirect = gen7_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = gen7_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = gen7_CmdDispatch,
+ .vkCmdDispatchIndirect = gen7_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = gen7_CmdCopyBuffer,
+ .vkCmdCopyImage = gen7_CmdCopyImage,
+ .vkCmdBlitImage = gen7_CmdBlitImage,
+ .vkCmdCopyBufferToImage = gen7_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = gen7_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = gen7_CmdUpdateBuffer,
+ .vkCmdFillBuffer = gen7_CmdFillBuffer,
+ .vkCmdClearColorImage = gen7_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = gen7_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = gen7_CmdClearAttachments,
+ .vkCmdResolveImage = gen7_CmdResolveImage,
+ .vkCmdSetEvent = gen7_CmdSetEvent,
+ .vkCmdResetEvent = gen7_CmdResetEvent,
+ .vkCmdWaitEvents = gen7_CmdWaitEvents,
+ .vkCmdPipelineBarrier = gen7_CmdPipelineBarrier,
+ .vkCmdBeginQuery = gen7_CmdBeginQuery,
+ .vkCmdEndQuery = gen7_CmdEndQuery,
+ .vkCmdResetQueryPool = gen7_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = gen7_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = gen7_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = gen7_CmdPushConstants,
+ .vkCmdBeginRenderPass = gen7_CmdBeginRenderPass,
+ .vkCmdNextSubpass = gen7_CmdNextSubpass,
+ .vkCmdEndRenderPass = gen7_CmdEndRenderPass,
+ .vkCmdExecuteCommands = gen7_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = gen7_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = gen7_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = gen7_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = gen7_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = gen7_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = gen7_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = gen7_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = gen7_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = gen7_AcquireNextImageKHR,
+ .vkQueuePresentKHR = gen7_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = gen7_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = gen7_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = gen7_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = gen7_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = gen7_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = gen7_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = gen7_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = gen7_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = gen7_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = gen7_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = gen7_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = gen7_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = gen7_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = gen7_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = gen7_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = gen7_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = gen7_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = gen7_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = gen7_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = gen7_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = gen7_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = gen7_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = gen7_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = gen7_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = gen7_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = gen7_GetFenceFdKHR,
+ .vkImportFenceFdKHR = gen7_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = gen7_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = gen7_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = gen7_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = gen7_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = gen7_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = gen7_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = gen7_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = gen7_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = gen7_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = gen7_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = gen7_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = gen7_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = gen7_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = gen7_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = gen7_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = gen7_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = gen7_CreateDmaBufImageINTEL,
+ };
+ VkResult gen75_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void gen75_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult gen75_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void gen75_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult gen75_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void gen75_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult gen75_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult gen75_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult gen75_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult gen75_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void gen75_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void gen75_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult gen75_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult gen75_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void gen75_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void gen75_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen75_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen75_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult gen75_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult gen75_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void gen75_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult gen75_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult gen75_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult gen75_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void gen75_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void gen75_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen75_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen75_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen75_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void gen75_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult gen75_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void gen75_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void gen75_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void gen75_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen75_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult gen75_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void gen75_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void gen75_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void gen75_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult gen75_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult gen75_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult gen75_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void gen75_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void gen75_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void gen75_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void gen75_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void gen75_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen75_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult gen75_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void gen75_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult gen75_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void gen75_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void gen75_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen75_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult gen75_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void gen75_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen75_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen75_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult gen75_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult gen75_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult gen75_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void gen75_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void gen75_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void gen75_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void gen75_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void gen75_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void gen75_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void gen75_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void gen75_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void gen75_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void gen75_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void gen75_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void gen75_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void gen75_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void gen75_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void gen75_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void gen75_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen75_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen75_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void gen75_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void gen75_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void gen75_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void gen75_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void gen75_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen75_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void gen75_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void gen75_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen75_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen75_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void gen75_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void gen75_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen75_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen75_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen75_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen75_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void gen75_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen75_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void gen75_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen75_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void gen75_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void gen75_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void gen75_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void gen75_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void gen75_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen75_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult gen75_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void gen75_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen75_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult gen75_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult gen75_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult gen75_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 gen75_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult gen75_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 gen75_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult gen75_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void gen75_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen75_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen75_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void gen75_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult gen75_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen75_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult gen75_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen75_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void gen75_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult gen75_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen75_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult gen75_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen75_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen75_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void gen75_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen75_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void gen75_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen75_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void gen75_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen75_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen75_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult gen75_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void gen75_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult gen75_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen75_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen75_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table gen75_dispatch_table = {
+ .vkCreateInstance = gen75_CreateInstance,
+ .vkDestroyInstance = gen75_DestroyInstance,
+ .vkEnumeratePhysicalDevices = gen75_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = gen75_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = gen75_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = gen75_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = gen75_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = gen75_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = gen75_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = gen75_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = gen75_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = gen75_CreateDevice,
+ .vkDestroyDevice = gen75_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = gen75_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = gen75_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = gen75_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = gen75_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = gen75_GetDeviceQueue,
+ .vkQueueSubmit = gen75_QueueSubmit,
+ .vkQueueWaitIdle = gen75_QueueWaitIdle,
+ .vkDeviceWaitIdle = gen75_DeviceWaitIdle,
+ .vkAllocateMemory = gen75_AllocateMemory,
+ .vkFreeMemory = gen75_FreeMemory,
+ .vkMapMemory = gen75_MapMemory,
+ .vkUnmapMemory = gen75_UnmapMemory,
+ .vkFlushMappedMemoryRanges = gen75_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = gen75_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = gen75_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = gen75_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = gen75_BindBufferMemory,
+ .vkGetImageMemoryRequirements = gen75_GetImageMemoryRequirements,
+ .vkBindImageMemory = gen75_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = gen75_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = gen75_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = gen75_QueueBindSparse,
+ .vkCreateFence = gen75_CreateFence,
+ .vkDestroyFence = gen75_DestroyFence,
+ .vkResetFences = gen75_ResetFences,
+ .vkGetFenceStatus = gen75_GetFenceStatus,
+ .vkWaitForFences = gen75_WaitForFences,
+ .vkCreateSemaphore = gen75_CreateSemaphore,
+ .vkDestroySemaphore = gen75_DestroySemaphore,
+ .vkCreateEvent = gen75_CreateEvent,
+ .vkDestroyEvent = gen75_DestroyEvent,
+ .vkGetEventStatus = gen75_GetEventStatus,
+ .vkSetEvent = gen75_SetEvent,
+ .vkResetEvent = gen75_ResetEvent,
+ .vkCreateQueryPool = gen75_CreateQueryPool,
+ .vkDestroyQueryPool = gen75_DestroyQueryPool,
+ .vkGetQueryPoolResults = gen75_GetQueryPoolResults,
+ .vkCreateBuffer = gen75_CreateBuffer,
+ .vkDestroyBuffer = gen75_DestroyBuffer,
+ .vkCreateBufferView = gen75_CreateBufferView,
+ .vkDestroyBufferView = gen75_DestroyBufferView,
+ .vkCreateImage = gen75_CreateImage,
+ .vkDestroyImage = gen75_DestroyImage,
+ .vkGetImageSubresourceLayout = gen75_GetImageSubresourceLayout,
+ .vkCreateImageView = gen75_CreateImageView,
+ .vkDestroyImageView = gen75_DestroyImageView,
+ .vkCreateShaderModule = gen75_CreateShaderModule,
+ .vkDestroyShaderModule = gen75_DestroyShaderModule,
+ .vkCreatePipelineCache = gen75_CreatePipelineCache,
+ .vkDestroyPipelineCache = gen75_DestroyPipelineCache,
+ .vkGetPipelineCacheData = gen75_GetPipelineCacheData,
+ .vkMergePipelineCaches = gen75_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = gen75_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = gen75_CreateComputePipelines,
+ .vkDestroyPipeline = gen75_DestroyPipeline,
+ .vkCreatePipelineLayout = gen75_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = gen75_DestroyPipelineLayout,
+ .vkCreateSampler = gen75_CreateSampler,
+ .vkDestroySampler = gen75_DestroySampler,
+ .vkCreateDescriptorSetLayout = gen75_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = gen75_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = gen75_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = gen75_DestroyDescriptorPool,
+ .vkResetDescriptorPool = gen75_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = gen75_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = gen75_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = gen75_UpdateDescriptorSets,
+ .vkCreateFramebuffer = gen75_CreateFramebuffer,
+ .vkDestroyFramebuffer = gen75_DestroyFramebuffer,
+ .vkCreateRenderPass = gen75_CreateRenderPass,
+ .vkDestroyRenderPass = gen75_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = gen75_GetRenderAreaGranularity,
+ .vkCreateCommandPool = gen75_CreateCommandPool,
+ .vkDestroyCommandPool = gen75_DestroyCommandPool,
+ .vkResetCommandPool = gen75_ResetCommandPool,
+ .vkAllocateCommandBuffers = gen75_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = gen75_FreeCommandBuffers,
+ .vkBeginCommandBuffer = gen75_BeginCommandBuffer,
+ .vkEndCommandBuffer = gen75_EndCommandBuffer,
+ .vkResetCommandBuffer = gen75_ResetCommandBuffer,
+ .vkCmdBindPipeline = gen75_CmdBindPipeline,
+ .vkCmdSetViewport = gen75_CmdSetViewport,
+ .vkCmdSetScissor = gen75_CmdSetScissor,
+ .vkCmdSetLineWidth = gen75_CmdSetLineWidth,
+ .vkCmdSetDepthBias = gen75_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = gen75_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = gen75_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = gen75_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = gen75_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = gen75_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = gen75_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = gen75_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = gen75_CmdBindVertexBuffers,
+ .vkCmdDraw = gen75_CmdDraw,
+ .vkCmdDrawIndexed = gen75_CmdDrawIndexed,
+ .vkCmdDrawIndirect = gen75_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = gen75_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = gen75_CmdDispatch,
+ .vkCmdDispatchIndirect = gen75_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = gen75_CmdCopyBuffer,
+ .vkCmdCopyImage = gen75_CmdCopyImage,
+ .vkCmdBlitImage = gen75_CmdBlitImage,
+ .vkCmdCopyBufferToImage = gen75_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = gen75_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = gen75_CmdUpdateBuffer,
+ .vkCmdFillBuffer = gen75_CmdFillBuffer,
+ .vkCmdClearColorImage = gen75_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = gen75_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = gen75_CmdClearAttachments,
+ .vkCmdResolveImage = gen75_CmdResolveImage,
+ .vkCmdSetEvent = gen75_CmdSetEvent,
+ .vkCmdResetEvent = gen75_CmdResetEvent,
+ .vkCmdWaitEvents = gen75_CmdWaitEvents,
+ .vkCmdPipelineBarrier = gen75_CmdPipelineBarrier,
+ .vkCmdBeginQuery = gen75_CmdBeginQuery,
+ .vkCmdEndQuery = gen75_CmdEndQuery,
+ .vkCmdResetQueryPool = gen75_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = gen75_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = gen75_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = gen75_CmdPushConstants,
+ .vkCmdBeginRenderPass = gen75_CmdBeginRenderPass,
+ .vkCmdNextSubpass = gen75_CmdNextSubpass,
+ .vkCmdEndRenderPass = gen75_CmdEndRenderPass,
+ .vkCmdExecuteCommands = gen75_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = gen75_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = gen75_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = gen75_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = gen75_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = gen75_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = gen75_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = gen75_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = gen75_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = gen75_AcquireNextImageKHR,
+ .vkQueuePresentKHR = gen75_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = gen75_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = gen75_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = gen75_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = gen75_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = gen75_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = gen75_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = gen75_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = gen75_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = gen75_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = gen75_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = gen75_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = gen75_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = gen75_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = gen75_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = gen75_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = gen75_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = gen75_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = gen75_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = gen75_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = gen75_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = gen75_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = gen75_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = gen75_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = gen75_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = gen75_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = gen75_GetFenceFdKHR,
+ .vkImportFenceFdKHR = gen75_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = gen75_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = gen75_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = gen75_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = gen75_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = gen75_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = gen75_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = gen75_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = gen75_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = gen75_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = gen75_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = gen75_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = gen75_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = gen75_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = gen75_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = gen75_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = gen75_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = gen75_CreateDmaBufImageINTEL,
+ };
+ VkResult gen8_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void gen8_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult gen8_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void gen8_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult gen8_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void gen8_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult gen8_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult gen8_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult gen8_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult gen8_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void gen8_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void gen8_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult gen8_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult gen8_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void gen8_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void gen8_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen8_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen8_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult gen8_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult gen8_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void gen8_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult gen8_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult gen8_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult gen8_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void gen8_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void gen8_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen8_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen8_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen8_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void gen8_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult gen8_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void gen8_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void gen8_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void gen8_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen8_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult gen8_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void gen8_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void gen8_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void gen8_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult gen8_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult gen8_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult gen8_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void gen8_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void gen8_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void gen8_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void gen8_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void gen8_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen8_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult gen8_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void gen8_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult gen8_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void gen8_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void gen8_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen8_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult gen8_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void gen8_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen8_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen8_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult gen8_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult gen8_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult gen8_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void gen8_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void gen8_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void gen8_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void gen8_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void gen8_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void gen8_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void gen8_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void gen8_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void gen8_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void gen8_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void gen8_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void gen8_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void gen8_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void gen8_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void gen8_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void gen8_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen8_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen8_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void gen8_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void gen8_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void gen8_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void gen8_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void gen8_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen8_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void gen8_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void gen8_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen8_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen8_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void gen8_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void gen8_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen8_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen8_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen8_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen8_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void gen8_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen8_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void gen8_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen8_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void gen8_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void gen8_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void gen8_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void gen8_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void gen8_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen8_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult gen8_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void gen8_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen8_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult gen8_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult gen8_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult gen8_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 gen8_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult gen8_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 gen8_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult gen8_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void gen8_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen8_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen8_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void gen8_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult gen8_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen8_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult gen8_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen8_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void gen8_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult gen8_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen8_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult gen8_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen8_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen8_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void gen8_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen8_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void gen8_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen8_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void gen8_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen8_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen8_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult gen8_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void gen8_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult gen8_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen8_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen8_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table gen8_dispatch_table = {
+ .vkCreateInstance = gen8_CreateInstance,
+ .vkDestroyInstance = gen8_DestroyInstance,
+ .vkEnumeratePhysicalDevices = gen8_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = gen8_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = gen8_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = gen8_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = gen8_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = gen8_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = gen8_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = gen8_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = gen8_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = gen8_CreateDevice,
+ .vkDestroyDevice = gen8_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = gen8_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = gen8_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = gen8_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = gen8_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = gen8_GetDeviceQueue,
+ .vkQueueSubmit = gen8_QueueSubmit,
+ .vkQueueWaitIdle = gen8_QueueWaitIdle,
+ .vkDeviceWaitIdle = gen8_DeviceWaitIdle,
+ .vkAllocateMemory = gen8_AllocateMemory,
+ .vkFreeMemory = gen8_FreeMemory,
+ .vkMapMemory = gen8_MapMemory,
+ .vkUnmapMemory = gen8_UnmapMemory,
+ .vkFlushMappedMemoryRanges = gen8_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = gen8_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = gen8_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = gen8_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = gen8_BindBufferMemory,
+ .vkGetImageMemoryRequirements = gen8_GetImageMemoryRequirements,
+ .vkBindImageMemory = gen8_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = gen8_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = gen8_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = gen8_QueueBindSparse,
+ .vkCreateFence = gen8_CreateFence,
+ .vkDestroyFence = gen8_DestroyFence,
+ .vkResetFences = gen8_ResetFences,
+ .vkGetFenceStatus = gen8_GetFenceStatus,
+ .vkWaitForFences = gen8_WaitForFences,
+ .vkCreateSemaphore = gen8_CreateSemaphore,
+ .vkDestroySemaphore = gen8_DestroySemaphore,
+ .vkCreateEvent = gen8_CreateEvent,
+ .vkDestroyEvent = gen8_DestroyEvent,
+ .vkGetEventStatus = gen8_GetEventStatus,
+ .vkSetEvent = gen8_SetEvent,
+ .vkResetEvent = gen8_ResetEvent,
+ .vkCreateQueryPool = gen8_CreateQueryPool,
+ .vkDestroyQueryPool = gen8_DestroyQueryPool,
+ .vkGetQueryPoolResults = gen8_GetQueryPoolResults,
+ .vkCreateBuffer = gen8_CreateBuffer,
+ .vkDestroyBuffer = gen8_DestroyBuffer,
+ .vkCreateBufferView = gen8_CreateBufferView,
+ .vkDestroyBufferView = gen8_DestroyBufferView,
+ .vkCreateImage = gen8_CreateImage,
+ .vkDestroyImage = gen8_DestroyImage,
+ .vkGetImageSubresourceLayout = gen8_GetImageSubresourceLayout,
+ .vkCreateImageView = gen8_CreateImageView,
+ .vkDestroyImageView = gen8_DestroyImageView,
+ .vkCreateShaderModule = gen8_CreateShaderModule,
+ .vkDestroyShaderModule = gen8_DestroyShaderModule,
+ .vkCreatePipelineCache = gen8_CreatePipelineCache,
+ .vkDestroyPipelineCache = gen8_DestroyPipelineCache,
+ .vkGetPipelineCacheData = gen8_GetPipelineCacheData,
+ .vkMergePipelineCaches = gen8_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = gen8_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = gen8_CreateComputePipelines,
+ .vkDestroyPipeline = gen8_DestroyPipeline,
+ .vkCreatePipelineLayout = gen8_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = gen8_DestroyPipelineLayout,
+ .vkCreateSampler = gen8_CreateSampler,
+ .vkDestroySampler = gen8_DestroySampler,
+ .vkCreateDescriptorSetLayout = gen8_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = gen8_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = gen8_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = gen8_DestroyDescriptorPool,
+ .vkResetDescriptorPool = gen8_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = gen8_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = gen8_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = gen8_UpdateDescriptorSets,
+ .vkCreateFramebuffer = gen8_CreateFramebuffer,
+ .vkDestroyFramebuffer = gen8_DestroyFramebuffer,
+ .vkCreateRenderPass = gen8_CreateRenderPass,
+ .vkDestroyRenderPass = gen8_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = gen8_GetRenderAreaGranularity,
+ .vkCreateCommandPool = gen8_CreateCommandPool,
+ .vkDestroyCommandPool = gen8_DestroyCommandPool,
+ .vkResetCommandPool = gen8_ResetCommandPool,
+ .vkAllocateCommandBuffers = gen8_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = gen8_FreeCommandBuffers,
+ .vkBeginCommandBuffer = gen8_BeginCommandBuffer,
+ .vkEndCommandBuffer = gen8_EndCommandBuffer,
+ .vkResetCommandBuffer = gen8_ResetCommandBuffer,
+ .vkCmdBindPipeline = gen8_CmdBindPipeline,
+ .vkCmdSetViewport = gen8_CmdSetViewport,
+ .vkCmdSetScissor = gen8_CmdSetScissor,
+ .vkCmdSetLineWidth = gen8_CmdSetLineWidth,
+ .vkCmdSetDepthBias = gen8_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = gen8_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = gen8_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = gen8_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = gen8_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = gen8_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = gen8_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = gen8_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = gen8_CmdBindVertexBuffers,
+ .vkCmdDraw = gen8_CmdDraw,
+ .vkCmdDrawIndexed = gen8_CmdDrawIndexed,
+ .vkCmdDrawIndirect = gen8_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = gen8_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = gen8_CmdDispatch,
+ .vkCmdDispatchIndirect = gen8_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = gen8_CmdCopyBuffer,
+ .vkCmdCopyImage = gen8_CmdCopyImage,
+ .vkCmdBlitImage = gen8_CmdBlitImage,
+ .vkCmdCopyBufferToImage = gen8_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = gen8_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = gen8_CmdUpdateBuffer,
+ .vkCmdFillBuffer = gen8_CmdFillBuffer,
+ .vkCmdClearColorImage = gen8_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = gen8_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = gen8_CmdClearAttachments,
+ .vkCmdResolveImage = gen8_CmdResolveImage,
+ .vkCmdSetEvent = gen8_CmdSetEvent,
+ .vkCmdResetEvent = gen8_CmdResetEvent,
+ .vkCmdWaitEvents = gen8_CmdWaitEvents,
+ .vkCmdPipelineBarrier = gen8_CmdPipelineBarrier,
+ .vkCmdBeginQuery = gen8_CmdBeginQuery,
+ .vkCmdEndQuery = gen8_CmdEndQuery,
+ .vkCmdResetQueryPool = gen8_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = gen8_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = gen8_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = gen8_CmdPushConstants,
+ .vkCmdBeginRenderPass = gen8_CmdBeginRenderPass,
+ .vkCmdNextSubpass = gen8_CmdNextSubpass,
+ .vkCmdEndRenderPass = gen8_CmdEndRenderPass,
+ .vkCmdExecuteCommands = gen8_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = gen8_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = gen8_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = gen8_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = gen8_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = gen8_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = gen8_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = gen8_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = gen8_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = gen8_AcquireNextImageKHR,
+ .vkQueuePresentKHR = gen8_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = gen8_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = gen8_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = gen8_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = gen8_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = gen8_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = gen8_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = gen8_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = gen8_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = gen8_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = gen8_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = gen8_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = gen8_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = gen8_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = gen8_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = gen8_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = gen8_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = gen8_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = gen8_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = gen8_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = gen8_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = gen8_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = gen8_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = gen8_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = gen8_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = gen8_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = gen8_GetFenceFdKHR,
+ .vkImportFenceFdKHR = gen8_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = gen8_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = gen8_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = gen8_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = gen8_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = gen8_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = gen8_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = gen8_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = gen8_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = gen8_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = gen8_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = gen8_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = gen8_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = gen8_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = gen8_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = gen8_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = gen8_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = gen8_CreateDmaBufImageINTEL,
+ };
+ VkResult gen9_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void gen9_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult gen9_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void gen9_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult gen9_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void gen9_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult gen9_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult gen9_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult gen9_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult gen9_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void gen9_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void gen9_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult gen9_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult gen9_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void gen9_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void gen9_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen9_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen9_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult gen9_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult gen9_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void gen9_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult gen9_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult gen9_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult gen9_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void gen9_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void gen9_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen9_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen9_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen9_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void gen9_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult gen9_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void gen9_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void gen9_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void gen9_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen9_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult gen9_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void gen9_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void gen9_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void gen9_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult gen9_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult gen9_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult gen9_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void gen9_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void gen9_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void gen9_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void gen9_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void gen9_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen9_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult gen9_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void gen9_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult gen9_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void gen9_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void gen9_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen9_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult gen9_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void gen9_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen9_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen9_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult gen9_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult gen9_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult gen9_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void gen9_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void gen9_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void gen9_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void gen9_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void gen9_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void gen9_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void gen9_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void gen9_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void gen9_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void gen9_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void gen9_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void gen9_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void gen9_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void gen9_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void gen9_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void gen9_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen9_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen9_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void gen9_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void gen9_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void gen9_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void gen9_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void gen9_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen9_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void gen9_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void gen9_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen9_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen9_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void gen9_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void gen9_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen9_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen9_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen9_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen9_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void gen9_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen9_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void gen9_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen9_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void gen9_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void gen9_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void gen9_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void gen9_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void gen9_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen9_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult gen9_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void gen9_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen9_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult gen9_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult gen9_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult gen9_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 gen9_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult gen9_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 gen9_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult gen9_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void gen9_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen9_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen9_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void gen9_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult gen9_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen9_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult gen9_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen9_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void gen9_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult gen9_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen9_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult gen9_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen9_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen9_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void gen9_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen9_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void gen9_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen9_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void gen9_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen9_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen9_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult gen9_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void gen9_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult gen9_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen9_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen9_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table gen9_dispatch_table = {
+ .vkCreateInstance = gen9_CreateInstance,
+ .vkDestroyInstance = gen9_DestroyInstance,
+ .vkEnumeratePhysicalDevices = gen9_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = gen9_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = gen9_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = gen9_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = gen9_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = gen9_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = gen9_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = gen9_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = gen9_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = gen9_CreateDevice,
+ .vkDestroyDevice = gen9_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = gen9_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = gen9_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = gen9_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = gen9_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = gen9_GetDeviceQueue,
+ .vkQueueSubmit = gen9_QueueSubmit,
+ .vkQueueWaitIdle = gen9_QueueWaitIdle,
+ .vkDeviceWaitIdle = gen9_DeviceWaitIdle,
+ .vkAllocateMemory = gen9_AllocateMemory,
+ .vkFreeMemory = gen9_FreeMemory,
+ .vkMapMemory = gen9_MapMemory,
+ .vkUnmapMemory = gen9_UnmapMemory,
+ .vkFlushMappedMemoryRanges = gen9_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = gen9_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = gen9_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = gen9_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = gen9_BindBufferMemory,
+ .vkGetImageMemoryRequirements = gen9_GetImageMemoryRequirements,
+ .vkBindImageMemory = gen9_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = gen9_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = gen9_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = gen9_QueueBindSparse,
+ .vkCreateFence = gen9_CreateFence,
+ .vkDestroyFence = gen9_DestroyFence,
+ .vkResetFences = gen9_ResetFences,
+ .vkGetFenceStatus = gen9_GetFenceStatus,
+ .vkWaitForFences = gen9_WaitForFences,
+ .vkCreateSemaphore = gen9_CreateSemaphore,
+ .vkDestroySemaphore = gen9_DestroySemaphore,
+ .vkCreateEvent = gen9_CreateEvent,
+ .vkDestroyEvent = gen9_DestroyEvent,
+ .vkGetEventStatus = gen9_GetEventStatus,
+ .vkSetEvent = gen9_SetEvent,
+ .vkResetEvent = gen9_ResetEvent,
+ .vkCreateQueryPool = gen9_CreateQueryPool,
+ .vkDestroyQueryPool = gen9_DestroyQueryPool,
+ .vkGetQueryPoolResults = gen9_GetQueryPoolResults,
+ .vkCreateBuffer = gen9_CreateBuffer,
+ .vkDestroyBuffer = gen9_DestroyBuffer,
+ .vkCreateBufferView = gen9_CreateBufferView,
+ .vkDestroyBufferView = gen9_DestroyBufferView,
+ .vkCreateImage = gen9_CreateImage,
+ .vkDestroyImage = gen9_DestroyImage,
+ .vkGetImageSubresourceLayout = gen9_GetImageSubresourceLayout,
+ .vkCreateImageView = gen9_CreateImageView,
+ .vkDestroyImageView = gen9_DestroyImageView,
+ .vkCreateShaderModule = gen9_CreateShaderModule,
+ .vkDestroyShaderModule = gen9_DestroyShaderModule,
+ .vkCreatePipelineCache = gen9_CreatePipelineCache,
+ .vkDestroyPipelineCache = gen9_DestroyPipelineCache,
+ .vkGetPipelineCacheData = gen9_GetPipelineCacheData,
+ .vkMergePipelineCaches = gen9_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = gen9_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = gen9_CreateComputePipelines,
+ .vkDestroyPipeline = gen9_DestroyPipeline,
+ .vkCreatePipelineLayout = gen9_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = gen9_DestroyPipelineLayout,
+ .vkCreateSampler = gen9_CreateSampler,
+ .vkDestroySampler = gen9_DestroySampler,
+ .vkCreateDescriptorSetLayout = gen9_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = gen9_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = gen9_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = gen9_DestroyDescriptorPool,
+ .vkResetDescriptorPool = gen9_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = gen9_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = gen9_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = gen9_UpdateDescriptorSets,
+ .vkCreateFramebuffer = gen9_CreateFramebuffer,
+ .vkDestroyFramebuffer = gen9_DestroyFramebuffer,
+ .vkCreateRenderPass = gen9_CreateRenderPass,
+ .vkDestroyRenderPass = gen9_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = gen9_GetRenderAreaGranularity,
+ .vkCreateCommandPool = gen9_CreateCommandPool,
+ .vkDestroyCommandPool = gen9_DestroyCommandPool,
+ .vkResetCommandPool = gen9_ResetCommandPool,
+ .vkAllocateCommandBuffers = gen9_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = gen9_FreeCommandBuffers,
+ .vkBeginCommandBuffer = gen9_BeginCommandBuffer,
+ .vkEndCommandBuffer = gen9_EndCommandBuffer,
+ .vkResetCommandBuffer = gen9_ResetCommandBuffer,
+ .vkCmdBindPipeline = gen9_CmdBindPipeline,
+ .vkCmdSetViewport = gen9_CmdSetViewport,
+ .vkCmdSetScissor = gen9_CmdSetScissor,
+ .vkCmdSetLineWidth = gen9_CmdSetLineWidth,
+ .vkCmdSetDepthBias = gen9_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = gen9_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = gen9_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = gen9_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = gen9_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = gen9_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = gen9_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = gen9_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = gen9_CmdBindVertexBuffers,
+ .vkCmdDraw = gen9_CmdDraw,
+ .vkCmdDrawIndexed = gen9_CmdDrawIndexed,
+ .vkCmdDrawIndirect = gen9_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = gen9_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = gen9_CmdDispatch,
+ .vkCmdDispatchIndirect = gen9_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = gen9_CmdCopyBuffer,
+ .vkCmdCopyImage = gen9_CmdCopyImage,
+ .vkCmdBlitImage = gen9_CmdBlitImage,
+ .vkCmdCopyBufferToImage = gen9_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = gen9_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = gen9_CmdUpdateBuffer,
+ .vkCmdFillBuffer = gen9_CmdFillBuffer,
+ .vkCmdClearColorImage = gen9_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = gen9_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = gen9_CmdClearAttachments,
+ .vkCmdResolveImage = gen9_CmdResolveImage,
+ .vkCmdSetEvent = gen9_CmdSetEvent,
+ .vkCmdResetEvent = gen9_CmdResetEvent,
+ .vkCmdWaitEvents = gen9_CmdWaitEvents,
+ .vkCmdPipelineBarrier = gen9_CmdPipelineBarrier,
+ .vkCmdBeginQuery = gen9_CmdBeginQuery,
+ .vkCmdEndQuery = gen9_CmdEndQuery,
+ .vkCmdResetQueryPool = gen9_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = gen9_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = gen9_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = gen9_CmdPushConstants,
+ .vkCmdBeginRenderPass = gen9_CmdBeginRenderPass,
+ .vkCmdNextSubpass = gen9_CmdNextSubpass,
+ .vkCmdEndRenderPass = gen9_CmdEndRenderPass,
+ .vkCmdExecuteCommands = gen9_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = gen9_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = gen9_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = gen9_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = gen9_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = gen9_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = gen9_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = gen9_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = gen9_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = gen9_AcquireNextImageKHR,
+ .vkQueuePresentKHR = gen9_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = gen9_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = gen9_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = gen9_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = gen9_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = gen9_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = gen9_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = gen9_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = gen9_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = gen9_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = gen9_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = gen9_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = gen9_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = gen9_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = gen9_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = gen9_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = gen9_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = gen9_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = gen9_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = gen9_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = gen9_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = gen9_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = gen9_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = gen9_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = gen9_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = gen9_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = gen9_GetFenceFdKHR,
+ .vkImportFenceFdKHR = gen9_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = gen9_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = gen9_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = gen9_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = gen9_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = gen9_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = gen9_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = gen9_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = gen9_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = gen9_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = gen9_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = gen9_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = gen9_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = gen9_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = gen9_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = gen9_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = gen9_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = gen9_CreateDmaBufImageINTEL,
+ };
+ VkResult gen10_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance) __attribute__ ((weak));
+ void gen10_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices) __attribute__ ((weak));
+ PFN_vkVoidFunction gen10_GetDeviceProcAddr(VkDevice device, const char* pName) __attribute__ ((weak));
+ PFN_vkVoidFunction gen10_GetInstanceProcAddr(VkInstance instance, const char* pName) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties) __attribute__ ((weak));
+ VkResult gen10_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice) __attribute__ ((weak));
+ void gen10_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen10_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ VkResult gen10_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties) __attribute__ ((weak));
+ VkResult gen10_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties) __attribute__ ((weak));
+ void gen10_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue) __attribute__ ((weak));
+ VkResult gen10_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence) __attribute__ ((weak));
+ VkResult gen10_QueueWaitIdle(VkQueue queue) __attribute__ ((weak));
+ VkResult gen10_DeviceWaitIdle(VkDevice device) __attribute__ ((weak));
+ VkResult gen10_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory) __attribute__ ((weak));
+ void gen10_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData) __attribute__ ((weak));
+ void gen10_UnmapMemory(VkDevice device, VkDeviceMemory memory) __attribute__ ((weak));
+ VkResult gen10_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ VkResult gen10_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges) __attribute__ ((weak));
+ void gen10_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes) __attribute__ ((weak));
+ void gen10_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen10_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen10_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements) __attribute__ ((weak));
+ VkResult gen10_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset) __attribute__ ((weak));
+ void gen10_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties) __attribute__ ((weak));
+ VkResult gen10_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence) __attribute__ ((weak));
+ VkResult gen10_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence) __attribute__ ((weak));
+ void gen10_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences) __attribute__ ((weak));
+ VkResult gen10_GetFenceStatus(VkDevice device, VkFence fence) __attribute__ ((weak));
+ VkResult gen10_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout) __attribute__ ((weak));
+ VkResult gen10_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore) __attribute__ ((weak));
+ void gen10_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent) __attribute__ ((weak));
+ void gen10_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_GetEventStatus(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen10_SetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen10_ResetEvent(VkDevice device, VkEvent event) __attribute__ ((weak));
+ VkResult gen10_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool) __attribute__ ((weak));
+ void gen10_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ VkResult gen10_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer) __attribute__ ((weak));
+ void gen10_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView) __attribute__ ((weak));
+ void gen10_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage) __attribute__ ((weak));
+ void gen10_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen10_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout) __attribute__ ((weak));
+ VkResult gen10_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView) __attribute__ ((weak));
+ void gen10_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule) __attribute__ ((weak));
+ void gen10_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache) __attribute__ ((weak));
+ void gen10_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData) __attribute__ ((weak));
+ VkResult gen10_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches) __attribute__ ((weak));
+ VkResult gen10_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ VkResult gen10_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines) __attribute__ ((weak));
+ void gen10_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout) __attribute__ ((weak));
+ void gen10_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler) __attribute__ ((weak));
+ void gen10_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout) __attribute__ ((weak));
+ void gen10_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool) __attribute__ ((weak));
+ void gen10_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen10_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ VkResult gen10_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets) __attribute__ ((weak));
+ void gen10_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies) __attribute__ ((weak));
+ VkResult gen10_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer) __attribute__ ((weak));
+ void gen10_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass) __attribute__ ((weak));
+ void gen10_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen10_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity) __attribute__ ((weak));
+ VkResult gen10_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool) __attribute__ ((weak));
+ void gen10_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags) __attribute__ ((weak));
+ VkResult gen10_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen10_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ VkResult gen10_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo) __attribute__ ((weak));
+ VkResult gen10_EndCommandBuffer(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ VkResult gen10_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags) __attribute__ ((weak));
+ void gen10_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline) __attribute__ ((weak));
+ void gen10_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports) __attribute__ ((weak));
+ void gen10_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors) __attribute__ ((weak));
+ void gen10_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth) __attribute__ ((weak));
+ void gen10_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor) __attribute__ ((weak));
+ void gen10_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]) __attribute__ ((weak));
+ void gen10_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds) __attribute__ ((weak));
+ void gen10_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask) __attribute__ ((weak));
+ void gen10_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask) __attribute__ ((weak));
+ void gen10_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference) __attribute__ ((weak));
+ void gen10_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets) __attribute__ ((weak));
+ void gen10_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType) __attribute__ ((weak));
+ void gen10_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets) __attribute__ ((weak));
+ void gen10_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance) __attribute__ ((weak));
+ void gen10_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance) __attribute__ ((weak));
+ void gen10_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen10_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride) __attribute__ ((weak));
+ void gen10_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ) __attribute__ ((weak));
+ void gen10_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset) __attribute__ ((weak));
+ void gen10_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions) __attribute__ ((weak));
+ void gen10_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions) __attribute__ ((weak));
+ void gen10_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter) __attribute__ ((weak));
+ void gen10_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen10_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions) __attribute__ ((weak));
+ void gen10_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData) __attribute__ ((weak));
+ void gen10_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data) __attribute__ ((weak));
+ void gen10_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen10_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges) __attribute__ ((weak));
+ void gen10_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects) __attribute__ ((weak));
+ void gen10_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions) __attribute__ ((weak));
+ void gen10_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen10_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask) __attribute__ ((weak));
+ void gen10_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen10_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers) __attribute__ ((weak));
+ void gen10_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags) __attribute__ ((weak));
+ void gen10_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen10_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount) __attribute__ ((weak));
+ void gen10_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query) __attribute__ ((weak));
+ void gen10_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags) __attribute__ ((weak));
+ void gen10_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues) __attribute__ ((weak));
+ void gen10_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents) __attribute__ ((weak));
+ void gen10_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents) __attribute__ ((weak));
+ void gen10_CmdEndRenderPass(VkCommandBuffer commandBuffer) __attribute__ ((weak));
+ void gen10_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers) __attribute__ ((weak));
+ void gen10_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes) __attribute__ ((weak));
+ VkResult gen10_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain) __attribute__ ((weak));
+ void gen10_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ VkResult gen10_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages) __attribute__ ((weak));
+ VkResult gen10_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex) __attribute__ ((weak));
+ VkResult gen10_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo) __attribute__ ((weak));
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult gen10_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 gen10_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult gen10_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 gen10_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult gen10_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 gen10_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id) __attribute__ ((weak));
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult gen10_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback) __attribute__ ((weak));
+ void gen10_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen10_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties) __attribute__ ((weak));
+ void gen10_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites) __attribute__ ((weak));
+ void gen10_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties) __attribute__ ((weak));
+ VkResult gen10_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen10_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties) __attribute__ ((weak));
+ VkResult gen10_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen10_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo) __attribute__ ((weak));
+ void gen10_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties) __attribute__ ((weak));
+ VkResult gen10_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd) __attribute__ ((weak));
+ VkResult gen10_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo) __attribute__ ((weak));
+ VkResult gen10_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen10_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos) __attribute__ ((weak));
+ VkResult gen10_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate) __attribute__ ((weak));
+ void gen10_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+ void gen10_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData) __attribute__ ((weak));
+ void gen10_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities) __attribute__ ((weak));
+ VkResult gen10_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats) __attribute__ ((weak));
+ void gen10_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen10_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements) __attribute__ ((weak));
+ void gen10_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements) __attribute__ ((weak));
+ VkResult gen10_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion) __attribute__ ((weak));
+ void gen10_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator) __attribute__ ((weak));
+#ifdef ANDROID
+ VkResult gen10_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen10_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence) __attribute__ ((weak));
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult gen10_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd) __attribute__ ((weak));
+#endif // ANDROID
+ VkResult gen10_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage) __attribute__ ((weak));
+
+ const struct anv_dispatch_table gen10_dispatch_table = {
+ .vkCreateInstance = gen10_CreateInstance,
+ .vkDestroyInstance = gen10_DestroyInstance,
+ .vkEnumeratePhysicalDevices = gen10_EnumeratePhysicalDevices,
+ .vkGetDeviceProcAddr = gen10_GetDeviceProcAddr,
+ .vkGetInstanceProcAddr = gen10_GetInstanceProcAddr,
+ .vkGetPhysicalDeviceProperties = gen10_GetPhysicalDeviceProperties,
+ .vkGetPhysicalDeviceQueueFamilyProperties = gen10_GetPhysicalDeviceQueueFamilyProperties,
+ .vkGetPhysicalDeviceMemoryProperties = gen10_GetPhysicalDeviceMemoryProperties,
+ .vkGetPhysicalDeviceFeatures = gen10_GetPhysicalDeviceFeatures,
+ .vkGetPhysicalDeviceFormatProperties = gen10_GetPhysicalDeviceFormatProperties,
+ .vkGetPhysicalDeviceImageFormatProperties = gen10_GetPhysicalDeviceImageFormatProperties,
+ .vkCreateDevice = gen10_CreateDevice,
+ .vkDestroyDevice = gen10_DestroyDevice,
+ .vkEnumerateInstanceLayerProperties = gen10_EnumerateInstanceLayerProperties,
+ .vkEnumerateInstanceExtensionProperties = gen10_EnumerateInstanceExtensionProperties,
+ .vkEnumerateDeviceLayerProperties = gen10_EnumerateDeviceLayerProperties,
+ .vkEnumerateDeviceExtensionProperties = gen10_EnumerateDeviceExtensionProperties,
+ .vkGetDeviceQueue = gen10_GetDeviceQueue,
+ .vkQueueSubmit = gen10_QueueSubmit,
+ .vkQueueWaitIdle = gen10_QueueWaitIdle,
+ .vkDeviceWaitIdle = gen10_DeviceWaitIdle,
+ .vkAllocateMemory = gen10_AllocateMemory,
+ .vkFreeMemory = gen10_FreeMemory,
+ .vkMapMemory = gen10_MapMemory,
+ .vkUnmapMemory = gen10_UnmapMemory,
+ .vkFlushMappedMemoryRanges = gen10_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = gen10_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = gen10_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = gen10_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = gen10_BindBufferMemory,
+ .vkGetImageMemoryRequirements = gen10_GetImageMemoryRequirements,
+ .vkBindImageMemory = gen10_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = gen10_GetImageSparseMemoryRequirements,
+ .vkGetPhysicalDeviceSparseImageFormatProperties = gen10_GetPhysicalDeviceSparseImageFormatProperties,
+ .vkQueueBindSparse = gen10_QueueBindSparse,
+ .vkCreateFence = gen10_CreateFence,
+ .vkDestroyFence = gen10_DestroyFence,
+ .vkResetFences = gen10_ResetFences,
+ .vkGetFenceStatus = gen10_GetFenceStatus,
+ .vkWaitForFences = gen10_WaitForFences,
+ .vkCreateSemaphore = gen10_CreateSemaphore,
+ .vkDestroySemaphore = gen10_DestroySemaphore,
+ .vkCreateEvent = gen10_CreateEvent,
+ .vkDestroyEvent = gen10_DestroyEvent,
+ .vkGetEventStatus = gen10_GetEventStatus,
+ .vkSetEvent = gen10_SetEvent,
+ .vkResetEvent = gen10_ResetEvent,
+ .vkCreateQueryPool = gen10_CreateQueryPool,
+ .vkDestroyQueryPool = gen10_DestroyQueryPool,
+ .vkGetQueryPoolResults = gen10_GetQueryPoolResults,
+ .vkCreateBuffer = gen10_CreateBuffer,
+ .vkDestroyBuffer = gen10_DestroyBuffer,
+ .vkCreateBufferView = gen10_CreateBufferView,
+ .vkDestroyBufferView = gen10_DestroyBufferView,
+ .vkCreateImage = gen10_CreateImage,
+ .vkDestroyImage = gen10_DestroyImage,
+ .vkGetImageSubresourceLayout = gen10_GetImageSubresourceLayout,
+ .vkCreateImageView = gen10_CreateImageView,
+ .vkDestroyImageView = gen10_DestroyImageView,
+ .vkCreateShaderModule = gen10_CreateShaderModule,
+ .vkDestroyShaderModule = gen10_DestroyShaderModule,
+ .vkCreatePipelineCache = gen10_CreatePipelineCache,
+ .vkDestroyPipelineCache = gen10_DestroyPipelineCache,
+ .vkGetPipelineCacheData = gen10_GetPipelineCacheData,
+ .vkMergePipelineCaches = gen10_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = gen10_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = gen10_CreateComputePipelines,
+ .vkDestroyPipeline = gen10_DestroyPipeline,
+ .vkCreatePipelineLayout = gen10_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = gen10_DestroyPipelineLayout,
+ .vkCreateSampler = gen10_CreateSampler,
+ .vkDestroySampler = gen10_DestroySampler,
+ .vkCreateDescriptorSetLayout = gen10_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = gen10_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = gen10_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = gen10_DestroyDescriptorPool,
+ .vkResetDescriptorPool = gen10_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = gen10_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = gen10_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = gen10_UpdateDescriptorSets,
+ .vkCreateFramebuffer = gen10_CreateFramebuffer,
+ .vkDestroyFramebuffer = gen10_DestroyFramebuffer,
+ .vkCreateRenderPass = gen10_CreateRenderPass,
+ .vkDestroyRenderPass = gen10_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = gen10_GetRenderAreaGranularity,
+ .vkCreateCommandPool = gen10_CreateCommandPool,
+ .vkDestroyCommandPool = gen10_DestroyCommandPool,
+ .vkResetCommandPool = gen10_ResetCommandPool,
+ .vkAllocateCommandBuffers = gen10_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = gen10_FreeCommandBuffers,
+ .vkBeginCommandBuffer = gen10_BeginCommandBuffer,
+ .vkEndCommandBuffer = gen10_EndCommandBuffer,
+ .vkResetCommandBuffer = gen10_ResetCommandBuffer,
+ .vkCmdBindPipeline = gen10_CmdBindPipeline,
+ .vkCmdSetViewport = gen10_CmdSetViewport,
+ .vkCmdSetScissor = gen10_CmdSetScissor,
+ .vkCmdSetLineWidth = gen10_CmdSetLineWidth,
+ .vkCmdSetDepthBias = gen10_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = gen10_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = gen10_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = gen10_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = gen10_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = gen10_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = gen10_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = gen10_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = gen10_CmdBindVertexBuffers,
+ .vkCmdDraw = gen10_CmdDraw,
+ .vkCmdDrawIndexed = gen10_CmdDrawIndexed,
+ .vkCmdDrawIndirect = gen10_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = gen10_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = gen10_CmdDispatch,
+ .vkCmdDispatchIndirect = gen10_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = gen10_CmdCopyBuffer,
+ .vkCmdCopyImage = gen10_CmdCopyImage,
+ .vkCmdBlitImage = gen10_CmdBlitImage,
+ .vkCmdCopyBufferToImage = gen10_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = gen10_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = gen10_CmdUpdateBuffer,
+ .vkCmdFillBuffer = gen10_CmdFillBuffer,
+ .vkCmdClearColorImage = gen10_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = gen10_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = gen10_CmdClearAttachments,
+ .vkCmdResolveImage = gen10_CmdResolveImage,
+ .vkCmdSetEvent = gen10_CmdSetEvent,
+ .vkCmdResetEvent = gen10_CmdResetEvent,
+ .vkCmdWaitEvents = gen10_CmdWaitEvents,
+ .vkCmdPipelineBarrier = gen10_CmdPipelineBarrier,
+ .vkCmdBeginQuery = gen10_CmdBeginQuery,
+ .vkCmdEndQuery = gen10_CmdEndQuery,
+ .vkCmdResetQueryPool = gen10_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = gen10_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = gen10_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = gen10_CmdPushConstants,
+ .vkCmdBeginRenderPass = gen10_CmdBeginRenderPass,
+ .vkCmdNextSubpass = gen10_CmdNextSubpass,
+ .vkCmdEndRenderPass = gen10_CmdEndRenderPass,
+ .vkCmdExecuteCommands = gen10_CmdExecuteCommands,
+ .vkDestroySurfaceKHR = gen10_DestroySurfaceKHR,
+ .vkGetPhysicalDeviceSurfaceSupportKHR = gen10_GetPhysicalDeviceSurfaceSupportKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilitiesKHR = gen10_GetPhysicalDeviceSurfaceCapabilitiesKHR,
+ .vkGetPhysicalDeviceSurfaceFormatsKHR = gen10_GetPhysicalDeviceSurfaceFormatsKHR,
+ .vkGetPhysicalDeviceSurfacePresentModesKHR = gen10_GetPhysicalDeviceSurfacePresentModesKHR,
+ .vkCreateSwapchainKHR = gen10_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = gen10_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = gen10_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = gen10_AcquireNextImageKHR,
+ .vkQueuePresentKHR = gen10_QueuePresentKHR,
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkCreateWaylandSurfaceKHR = gen10_CreateWaylandSurfaceKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ .vkGetPhysicalDeviceWaylandPresentationSupportKHR = gen10_GetPhysicalDeviceWaylandPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkCreateXlibSurfaceKHR = gen10_CreateXlibSurfaceKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ .vkGetPhysicalDeviceXlibPresentationSupportKHR = gen10_GetPhysicalDeviceXlibPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkCreateXcbSurfaceKHR = gen10_CreateXcbSurfaceKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ .vkGetPhysicalDeviceXcbPresentationSupportKHR = gen10_GetPhysicalDeviceXcbPresentationSupportKHR,
+#endif // VK_USE_PLATFORM_XCB_KHR
+ .vkCreateDebugReportCallbackEXT = gen10_CreateDebugReportCallbackEXT,
+ .vkDestroyDebugReportCallbackEXT = gen10_DestroyDebugReportCallbackEXT,
+ .vkDebugReportMessageEXT = gen10_DebugReportMessageEXT,
+ .vkGetPhysicalDeviceFeatures2KHR = gen10_GetPhysicalDeviceFeatures2KHR,
+ .vkGetPhysicalDeviceProperties2KHR = gen10_GetPhysicalDeviceProperties2KHR,
+ .vkGetPhysicalDeviceFormatProperties2KHR = gen10_GetPhysicalDeviceFormatProperties2KHR,
+ .vkGetPhysicalDeviceImageFormatProperties2KHR = gen10_GetPhysicalDeviceImageFormatProperties2KHR,
+ .vkGetPhysicalDeviceQueueFamilyProperties2KHR = gen10_GetPhysicalDeviceQueueFamilyProperties2KHR,
+ .vkGetPhysicalDeviceMemoryProperties2KHR = gen10_GetPhysicalDeviceMemoryProperties2KHR,
+ .vkGetPhysicalDeviceSparseImageFormatProperties2KHR = gen10_GetPhysicalDeviceSparseImageFormatProperties2KHR,
+ .vkCmdPushDescriptorSetKHR = gen10_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = gen10_TrimCommandPoolKHR,
+ .vkGetPhysicalDeviceExternalBufferPropertiesKHR = gen10_GetPhysicalDeviceExternalBufferPropertiesKHR,
+ .vkGetMemoryFdKHR = gen10_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = gen10_GetMemoryFdPropertiesKHR,
+ .vkGetPhysicalDeviceExternalSemaphorePropertiesKHR = gen10_GetPhysicalDeviceExternalSemaphorePropertiesKHR,
+ .vkGetSemaphoreFdKHR = gen10_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = gen10_ImportSemaphoreFdKHR,
+ .vkGetPhysicalDeviceExternalFencePropertiesKHR = gen10_GetPhysicalDeviceExternalFencePropertiesKHR,
+ .vkGetFenceFdKHR = gen10_GetFenceFdKHR,
+ .vkImportFenceFdKHR = gen10_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = gen10_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = gen10_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = gen10_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = gen10_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = gen10_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = gen10_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetPhysicalDeviceSurfaceCapabilities2KHR = gen10_GetPhysicalDeviceSurfaceCapabilities2KHR,
+ .vkGetPhysicalDeviceSurfaceFormats2KHR = gen10_GetPhysicalDeviceSurfaceFormats2KHR,
+ .vkGetBufferMemoryRequirements2KHR = gen10_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = gen10_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = gen10_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = gen10_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = gen10_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = gen10_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = gen10_AcquireImageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkQueueSignalReleaseImageANDROID = gen10_QueueSignalReleaseImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = gen10_CreateDmaBufImageINTEL,
+ };
+
+
+/** Trampoline entrypoints for all device functions */
+
+ static PFN_vkVoidFunction
+ anv_tramp_GetDeviceProcAddr(VkDevice device, const char* pName)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetDeviceProcAddr(device, pName);
+ }
+ static void
+ anv_tramp_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyDevice(device, pAllocator);
+ }
+ static void
+ anv_tramp_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetDeviceQueue(device, queueFamilyIndex, queueIndex, pQueue);
+ }
+ static VkResult
+ anv_tramp_DeviceWaitIdle(VkDevice device)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDeviceWaitIdle(device);
+ }
+ static VkResult
+ anv_tramp_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkAllocateMemory(device, pAllocateInfo, pAllocator, pMemory);
+ }
+ static void
+ anv_tramp_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkFreeMemory(device, memory, pAllocator);
+ }
+ static VkResult
+ anv_tramp_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkMapMemory(device, memory, offset, size, flags, ppData);
+ }
+ static void
+ anv_tramp_UnmapMemory(VkDevice device, VkDeviceMemory memory)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkUnmapMemory(device, memory);
+ }
+ static VkResult
+ anv_tramp_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkFlushMappedMemoryRanges(device, memoryRangeCount, pMemoryRanges);
+ }
+ static VkResult
+ anv_tramp_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkInvalidateMappedMemoryRanges(device, memoryRangeCount, pMemoryRanges);
+ }
+ static void
+ anv_tramp_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetDeviceMemoryCommitment(device, memory, pCommittedMemoryInBytes);
+ }
+ static void
+ anv_tramp_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetBufferMemoryRequirements(device, buffer, pMemoryRequirements);
+ }
+ static VkResult
+ anv_tramp_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkBindBufferMemory(device, buffer, memory, memoryOffset);
+ }
+ static void
+ anv_tramp_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetImageMemoryRequirements(device, image, pMemoryRequirements);
+ }
+ static VkResult
+ anv_tramp_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkBindImageMemory(device, image, memory, memoryOffset);
+ }
+ static void
+ anv_tramp_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetImageSparseMemoryRequirements(device, image, pSparseMemoryRequirementCount, pSparseMemoryRequirements);
+ }
+ static VkResult
+ anv_tramp_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateFence(device, pCreateInfo, pAllocator, pFence);
+ }
+ static void
+ anv_tramp_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyFence(device, fence, pAllocator);
+ }
+ static VkResult
+ anv_tramp_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkResetFences(device, fenceCount, pFences);
+ }
+ static VkResult
+ anv_tramp_GetFenceStatus(VkDevice device, VkFence fence)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetFenceStatus(device, fence);
+ }
+ static VkResult
+ anv_tramp_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkWaitForFences(device, fenceCount, pFences, waitAll, timeout);
+ }
+ static VkResult
+ anv_tramp_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateSemaphore(device, pCreateInfo, pAllocator, pSemaphore);
+ }
+ static void
+ anv_tramp_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroySemaphore(device, semaphore, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateEvent(device, pCreateInfo, pAllocator, pEvent);
+ }
+ static void
+ anv_tramp_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyEvent(device, event, pAllocator);
+ }
+ static VkResult
+ anv_tramp_GetEventStatus(VkDevice device, VkEvent event)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetEventStatus(device, event);
+ }
+ static VkResult
+ anv_tramp_SetEvent(VkDevice device, VkEvent event)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkSetEvent(device, event);
+ }
+ static VkResult
+ anv_tramp_ResetEvent(VkDevice device, VkEvent event)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkResetEvent(device, event);
+ }
+ static VkResult
+ anv_tramp_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateQueryPool(device, pCreateInfo, pAllocator, pQueryPool);
+ }
+ static void
+ anv_tramp_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyQueryPool(device, queryPool, pAllocator);
+ }
+ static VkResult
+ anv_tramp_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetQueryPoolResults(device, queryPool, firstQuery, queryCount, dataSize, pData, stride, flags);
+ }
+ static VkResult
+ anv_tramp_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateBuffer(device, pCreateInfo, pAllocator, pBuffer);
+ }
+ static void
+ anv_tramp_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyBuffer(device, buffer, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateBufferView(device, pCreateInfo, pAllocator, pView);
+ }
+ static void
+ anv_tramp_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyBufferView(device, bufferView, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateImage(device, pCreateInfo, pAllocator, pImage);
+ }
+ static void
+ anv_tramp_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyImage(device, image, pAllocator);
+ }
+ static void
+ anv_tramp_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetImageSubresourceLayout(device, image, pSubresource, pLayout);
+ }
+ static VkResult
+ anv_tramp_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateImageView(device, pCreateInfo, pAllocator, pView);
+ }
+ static void
+ anv_tramp_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyImageView(device, imageView, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateShaderModule(device, pCreateInfo, pAllocator, pShaderModule);
+ }
+ static void
+ anv_tramp_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyShaderModule(device, shaderModule, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreatePipelineCache(device, pCreateInfo, pAllocator, pPipelineCache);
+ }
+ static void
+ anv_tramp_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyPipelineCache(device, pipelineCache, pAllocator);
+ }
+ static VkResult
+ anv_tramp_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetPipelineCacheData(device, pipelineCache, pDataSize, pData);
+ }
+ static VkResult
+ anv_tramp_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkMergePipelineCaches(device, dstCache, srcCacheCount, pSrcCaches);
+ }
+ static VkResult
+ anv_tramp_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateGraphicsPipelines(device, pipelineCache, createInfoCount, pCreateInfos, pAllocator, pPipelines);
+ }
+ static VkResult
+ anv_tramp_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateComputePipelines(device, pipelineCache, createInfoCount, pCreateInfos, pAllocator, pPipelines);
+ }
+ static void
+ anv_tramp_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyPipeline(device, pipeline, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreatePipelineLayout(device, pCreateInfo, pAllocator, pPipelineLayout);
+ }
+ static void
+ anv_tramp_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyPipelineLayout(device, pipelineLayout, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateSampler(device, pCreateInfo, pAllocator, pSampler);
+ }
+ static void
+ anv_tramp_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroySampler(device, sampler, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateDescriptorSetLayout(device, pCreateInfo, pAllocator, pSetLayout);
+ }
+ static void
+ anv_tramp_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyDescriptorSetLayout(device, descriptorSetLayout, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateDescriptorPool(device, pCreateInfo, pAllocator, pDescriptorPool);
+ }
+ static void
+ anv_tramp_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyDescriptorPool(device, descriptorPool, pAllocator);
+ }
+ static VkResult
+ anv_tramp_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkResetDescriptorPool(device, descriptorPool, flags);
+ }
+ static VkResult
+ anv_tramp_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkAllocateDescriptorSets(device, pAllocateInfo, pDescriptorSets);
+ }
+ static VkResult
+ anv_tramp_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkFreeDescriptorSets(device, descriptorPool, descriptorSetCount, pDescriptorSets);
+ }
+ static void
+ anv_tramp_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkUpdateDescriptorSets(device, descriptorWriteCount, pDescriptorWrites, descriptorCopyCount, pDescriptorCopies);
+ }
+ static VkResult
+ anv_tramp_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateFramebuffer(device, pCreateInfo, pAllocator, pFramebuffer);
+ }
+ static void
+ anv_tramp_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyFramebuffer(device, framebuffer, pAllocator);
+ }
+ static VkResult
+ anv_tramp_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateRenderPass(device, pCreateInfo, pAllocator, pRenderPass);
+ }
+ static void
+ anv_tramp_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyRenderPass(device, renderPass, pAllocator);
+ }
+ static void
+ anv_tramp_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetRenderAreaGranularity(device, renderPass, pGranularity);
+ }
+ static VkResult
+ anv_tramp_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateCommandPool(device, pCreateInfo, pAllocator, pCommandPool);
+ }
+ static void
+ anv_tramp_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyCommandPool(device, commandPool, pAllocator);
+ }
+ static VkResult
+ anv_tramp_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkResetCommandPool(device, commandPool, flags);
+ }
+ static VkResult
+ anv_tramp_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkAllocateCommandBuffers(device, pAllocateInfo, pCommandBuffers);
+ }
+ static void
+ anv_tramp_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkFreeCommandBuffers(device, commandPool, commandBufferCount, pCommandBuffers);
+ }
+ static VkResult
+ anv_tramp_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkBeginCommandBuffer(commandBuffer, pBeginInfo);
+ }
+ static VkResult
+ anv_tramp_EndCommandBuffer(VkCommandBuffer commandBuffer)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkEndCommandBuffer(commandBuffer);
+ }
+ static VkResult
+ anv_tramp_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkResetCommandBuffer(commandBuffer, flags);
+ }
+ static void
+ anv_tramp_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBindPipeline(commandBuffer, pipelineBindPoint, pipeline);
+ }
+ static void
+ anv_tramp_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetViewport(commandBuffer, firstViewport, viewportCount, pViewports);
+ }
+ static void
+ anv_tramp_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetScissor(commandBuffer, firstScissor, scissorCount, pScissors);
+ }
+ static void
+ anv_tramp_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetLineWidth(commandBuffer, lineWidth);
+ }
+ static void
+ anv_tramp_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetDepthBias(commandBuffer, depthBiasConstantFactor, depthBiasClamp, depthBiasSlopeFactor);
+ }
+ static void
+ anv_tramp_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4])
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetBlendConstants(commandBuffer, blendConstants);
+ }
+ static void
+ anv_tramp_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetDepthBounds(commandBuffer, minDepthBounds, maxDepthBounds);
+ }
+ static void
+ anv_tramp_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetStencilCompareMask(commandBuffer, faceMask, compareMask);
+ }
+ static void
+ anv_tramp_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetStencilWriteMask(commandBuffer, faceMask, writeMask);
+ }
+ static void
+ anv_tramp_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetStencilReference(commandBuffer, faceMask, reference);
+ }
+ static void
+ anv_tramp_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBindDescriptorSets(commandBuffer, pipelineBindPoint, layout, firstSet, descriptorSetCount, pDescriptorSets, dynamicOffsetCount, pDynamicOffsets);
+ }
+ static void
+ anv_tramp_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBindIndexBuffer(commandBuffer, buffer, offset, indexType);
+ }
+ static void
+ anv_tramp_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBindVertexBuffers(commandBuffer, firstBinding, bindingCount, pBuffers, pOffsets);
+ }
+ static void
+ anv_tramp_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDraw(commandBuffer, vertexCount, instanceCount, firstVertex, firstInstance);
+ }
+ static void
+ anv_tramp_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDrawIndexed(commandBuffer, indexCount, instanceCount, firstIndex, vertexOffset, firstInstance);
+ }
+ static void
+ anv_tramp_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDrawIndirect(commandBuffer, buffer, offset, drawCount, stride);
+ }
+ static void
+ anv_tramp_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDrawIndexedIndirect(commandBuffer, buffer, offset, drawCount, stride);
+ }
+ static void
+ anv_tramp_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDispatch(commandBuffer, groupCountX, groupCountY, groupCountZ);
+ }
+ static void
+ anv_tramp_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdDispatchIndirect(commandBuffer, buffer, offset);
+ }
+ static void
+ anv_tramp_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdCopyBuffer(commandBuffer, srcBuffer, dstBuffer, regionCount, pRegions);
+ }
+ static void
+ anv_tramp_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdCopyImage(commandBuffer, srcImage, srcImageLayout, dstImage, dstImageLayout, regionCount, pRegions);
+ }
+ static void
+ anv_tramp_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBlitImage(commandBuffer, srcImage, srcImageLayout, dstImage, dstImageLayout, regionCount, pRegions, filter);
+ }
+ static void
+ anv_tramp_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdCopyBufferToImage(commandBuffer, srcBuffer, dstImage, dstImageLayout, regionCount, pRegions);
+ }
+ static void
+ anv_tramp_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdCopyImageToBuffer(commandBuffer, srcImage, srcImageLayout, dstBuffer, regionCount, pRegions);
+ }
+ static void
+ anv_tramp_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdUpdateBuffer(commandBuffer, dstBuffer, dstOffset, dataSize, pData);
+ }
+ static void
+ anv_tramp_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdFillBuffer(commandBuffer, dstBuffer, dstOffset, size, data);
+ }
+ static void
+ anv_tramp_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdClearColorImage(commandBuffer, image, imageLayout, pColor, rangeCount, pRanges);
+ }
+ static void
+ anv_tramp_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdClearDepthStencilImage(commandBuffer, image, imageLayout, pDepthStencil, rangeCount, pRanges);
+ }
+ static void
+ anv_tramp_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdClearAttachments(commandBuffer, attachmentCount, pAttachments, rectCount, pRects);
+ }
+ static void
+ anv_tramp_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdResolveImage(commandBuffer, srcImage, srcImageLayout, dstImage, dstImageLayout, regionCount, pRegions);
+ }
+ static void
+ anv_tramp_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdSetEvent(commandBuffer, event, stageMask);
+ }
+ static void
+ anv_tramp_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdResetEvent(commandBuffer, event, stageMask);
+ }
+ static void
+ anv_tramp_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdWaitEvents(commandBuffer, eventCount, pEvents, srcStageMask, dstStageMask, memoryBarrierCount, pMemoryBarriers, bufferMemoryBarrierCount, pBufferMemoryBarriers, imageMemoryBarrierCount, pImageMemoryBarriers);
+ }
+ static void
+ anv_tramp_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdPipelineBarrier(commandBuffer, srcStageMask, dstStageMask, dependencyFlags, memoryBarrierCount, pMemoryBarriers, bufferMemoryBarrierCount, pBufferMemoryBarriers, imageMemoryBarrierCount, pImageMemoryBarriers);
+ }
+ static void
+ anv_tramp_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBeginQuery(commandBuffer, queryPool, query, flags);
+ }
+ static void
+ anv_tramp_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdEndQuery(commandBuffer, queryPool, query);
+ }
+ static void
+ anv_tramp_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdResetQueryPool(commandBuffer, queryPool, firstQuery, queryCount);
+ }
+ static void
+ anv_tramp_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdWriteTimestamp(commandBuffer, pipelineStage, queryPool, query);
+ }
+ static void
+ anv_tramp_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdCopyQueryPoolResults(commandBuffer, queryPool, firstQuery, queryCount, dstBuffer, dstOffset, stride, flags);
+ }
+ static void
+ anv_tramp_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdPushConstants(commandBuffer, layout, stageFlags, offset, size, pValues);
+ }
+ static void
+ anv_tramp_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdBeginRenderPass(commandBuffer, pRenderPassBegin, contents);
+ }
+ static void
+ anv_tramp_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdNextSubpass(commandBuffer, contents);
+ }
+ static void
+ anv_tramp_CmdEndRenderPass(VkCommandBuffer commandBuffer)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdEndRenderPass(commandBuffer);
+ }
+ static void
+ anv_tramp_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdExecuteCommands(commandBuffer, commandBufferCount, pCommandBuffers);
+ }
+ static VkResult
+ anv_tramp_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateSwapchainKHR(device, pCreateInfo, pAllocator, pSwapchain);
+ }
+ static void
+ anv_tramp_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroySwapchainKHR(device, swapchain, pAllocator);
+ }
+ static VkResult
+ anv_tramp_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetSwapchainImagesKHR(device, swapchain, pSwapchainImageCount, pSwapchainImages);
+ }
+ static VkResult
+ anv_tramp_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkAcquireNextImageKHR(device, swapchain, timeout, semaphore, fence, pImageIndex);
+ }
+ static void
+ anv_tramp_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdPushDescriptorSetKHR(commandBuffer, pipelineBindPoint, layout, set, descriptorWriteCount, pDescriptorWrites);
+ }
+ static void
+ anv_tramp_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkTrimCommandPoolKHR(device, commandPool, flags);
+ }
+ static VkResult
+ anv_tramp_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetMemoryFdKHR(device, pGetFdInfo, pFd);
+ }
+ static VkResult
+ anv_tramp_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetMemoryFdPropertiesKHR(device, handleType, fd, pMemoryFdProperties);
+ }
+ static VkResult
+ anv_tramp_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetSemaphoreFdKHR(device, pGetFdInfo, pFd);
+ }
+ static VkResult
+ anv_tramp_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkImportSemaphoreFdKHR(device, pImportSemaphoreFdInfo);
+ }
+ static VkResult
+ anv_tramp_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetFenceFdKHR(device, pGetFdInfo, pFd);
+ }
+ static VkResult
+ anv_tramp_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkImportFenceFdKHR(device, pImportFenceFdInfo);
+ }
+ static VkResult
+ anv_tramp_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkBindBufferMemory2KHR(device, bindInfoCount, pBindInfos);
+ }
+ static VkResult
+ anv_tramp_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkBindImageMemory2KHR(device, bindInfoCount, pBindInfos);
+ }
+ static VkResult
+ anv_tramp_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateDescriptorUpdateTemplateKHR(device, pCreateInfo, pAllocator, pDescriptorUpdateTemplate);
+ }
+ static void
+ anv_tramp_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroyDescriptorUpdateTemplateKHR(device, descriptorUpdateTemplate, pAllocator);
+ }
+ static void
+ anv_tramp_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkUpdateDescriptorSetWithTemplateKHR(device, descriptorSet, descriptorUpdateTemplate, pData);
+ }
+ static void
+ anv_tramp_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData)
+ {
+ ANV_FROM_HANDLE(anv_cmd_buffer, anv_cmd_buffer, commandBuffer);
+ return anv_cmd_buffer->device->dispatch.vkCmdPushDescriptorSetWithTemplateKHR(commandBuffer, descriptorUpdateTemplate, layout, set, pData);
+ }
+ static void
+ anv_tramp_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetBufferMemoryRequirements2KHR(device, pInfo, pMemoryRequirements);
+ }
+ static void
+ anv_tramp_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetImageMemoryRequirements2KHR(device, pInfo, pMemoryRequirements);
+ }
+ static void
+ anv_tramp_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetImageSparseMemoryRequirements2KHR(device, pInfo, pSparseMemoryRequirementCount, pSparseMemoryRequirements);
+ }
+ static VkResult
+ anv_tramp_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateSamplerYcbcrConversionKHR(device, pCreateInfo, pAllocator, pYcbcrConversion);
+ }
+ static void
+ anv_tramp_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkDestroySamplerYcbcrConversionKHR(device, ycbcrConversion, pAllocator);
+ }
+#ifdef ANDROID
+ static VkResult
+ anv_tramp_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkGetSwapchainGrallocUsageANDROID(device, format, imageUsage, grallocUsage);
+ }
+#endif // ANDROID
+#ifdef ANDROID
+ static VkResult
+ anv_tramp_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkAcquireImageANDROID(device, image, nativeFenceFd, semaphore, fence);
+ }
+#endif // ANDROID
+ static VkResult
+ anv_tramp_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage)
+ {
+ ANV_FROM_HANDLE(anv_device, anv_device, device);
+ return anv_device->dispatch.vkCreateDmaBufImageINTEL(device, pCreateInfo, pAllocator, pMem, pImage);
+ }
+
+const struct anv_dispatch_table anv_tramp_dispatch_table = {
+ .vkGetDeviceProcAddr = anv_tramp_GetDeviceProcAddr,
+ .vkDestroyDevice = anv_tramp_DestroyDevice,
+ .vkGetDeviceQueue = anv_tramp_GetDeviceQueue,
+ .vkDeviceWaitIdle = anv_tramp_DeviceWaitIdle,
+ .vkAllocateMemory = anv_tramp_AllocateMemory,
+ .vkFreeMemory = anv_tramp_FreeMemory,
+ .vkMapMemory = anv_tramp_MapMemory,
+ .vkUnmapMemory = anv_tramp_UnmapMemory,
+ .vkFlushMappedMemoryRanges = anv_tramp_FlushMappedMemoryRanges,
+ .vkInvalidateMappedMemoryRanges = anv_tramp_InvalidateMappedMemoryRanges,
+ .vkGetDeviceMemoryCommitment = anv_tramp_GetDeviceMemoryCommitment,
+ .vkGetBufferMemoryRequirements = anv_tramp_GetBufferMemoryRequirements,
+ .vkBindBufferMemory = anv_tramp_BindBufferMemory,
+ .vkGetImageMemoryRequirements = anv_tramp_GetImageMemoryRequirements,
+ .vkBindImageMemory = anv_tramp_BindImageMemory,
+ .vkGetImageSparseMemoryRequirements = anv_tramp_GetImageSparseMemoryRequirements,
+ .vkCreateFence = anv_tramp_CreateFence,
+ .vkDestroyFence = anv_tramp_DestroyFence,
+ .vkResetFences = anv_tramp_ResetFences,
+ .vkGetFenceStatus = anv_tramp_GetFenceStatus,
+ .vkWaitForFences = anv_tramp_WaitForFences,
+ .vkCreateSemaphore = anv_tramp_CreateSemaphore,
+ .vkDestroySemaphore = anv_tramp_DestroySemaphore,
+ .vkCreateEvent = anv_tramp_CreateEvent,
+ .vkDestroyEvent = anv_tramp_DestroyEvent,
+ .vkGetEventStatus = anv_tramp_GetEventStatus,
+ .vkSetEvent = anv_tramp_SetEvent,
+ .vkResetEvent = anv_tramp_ResetEvent,
+ .vkCreateQueryPool = anv_tramp_CreateQueryPool,
+ .vkDestroyQueryPool = anv_tramp_DestroyQueryPool,
+ .vkGetQueryPoolResults = anv_tramp_GetQueryPoolResults,
+ .vkCreateBuffer = anv_tramp_CreateBuffer,
+ .vkDestroyBuffer = anv_tramp_DestroyBuffer,
+ .vkCreateBufferView = anv_tramp_CreateBufferView,
+ .vkDestroyBufferView = anv_tramp_DestroyBufferView,
+ .vkCreateImage = anv_tramp_CreateImage,
+ .vkDestroyImage = anv_tramp_DestroyImage,
+ .vkGetImageSubresourceLayout = anv_tramp_GetImageSubresourceLayout,
+ .vkCreateImageView = anv_tramp_CreateImageView,
+ .vkDestroyImageView = anv_tramp_DestroyImageView,
+ .vkCreateShaderModule = anv_tramp_CreateShaderModule,
+ .vkDestroyShaderModule = anv_tramp_DestroyShaderModule,
+ .vkCreatePipelineCache = anv_tramp_CreatePipelineCache,
+ .vkDestroyPipelineCache = anv_tramp_DestroyPipelineCache,
+ .vkGetPipelineCacheData = anv_tramp_GetPipelineCacheData,
+ .vkMergePipelineCaches = anv_tramp_MergePipelineCaches,
+ .vkCreateGraphicsPipelines = anv_tramp_CreateGraphicsPipelines,
+ .vkCreateComputePipelines = anv_tramp_CreateComputePipelines,
+ .vkDestroyPipeline = anv_tramp_DestroyPipeline,
+ .vkCreatePipelineLayout = anv_tramp_CreatePipelineLayout,
+ .vkDestroyPipelineLayout = anv_tramp_DestroyPipelineLayout,
+ .vkCreateSampler = anv_tramp_CreateSampler,
+ .vkDestroySampler = anv_tramp_DestroySampler,
+ .vkCreateDescriptorSetLayout = anv_tramp_CreateDescriptorSetLayout,
+ .vkDestroyDescriptorSetLayout = anv_tramp_DestroyDescriptorSetLayout,
+ .vkCreateDescriptorPool = anv_tramp_CreateDescriptorPool,
+ .vkDestroyDescriptorPool = anv_tramp_DestroyDescriptorPool,
+ .vkResetDescriptorPool = anv_tramp_ResetDescriptorPool,
+ .vkAllocateDescriptorSets = anv_tramp_AllocateDescriptorSets,
+ .vkFreeDescriptorSets = anv_tramp_FreeDescriptorSets,
+ .vkUpdateDescriptorSets = anv_tramp_UpdateDescriptorSets,
+ .vkCreateFramebuffer = anv_tramp_CreateFramebuffer,
+ .vkDestroyFramebuffer = anv_tramp_DestroyFramebuffer,
+ .vkCreateRenderPass = anv_tramp_CreateRenderPass,
+ .vkDestroyRenderPass = anv_tramp_DestroyRenderPass,
+ .vkGetRenderAreaGranularity = anv_tramp_GetRenderAreaGranularity,
+ .vkCreateCommandPool = anv_tramp_CreateCommandPool,
+ .vkDestroyCommandPool = anv_tramp_DestroyCommandPool,
+ .vkResetCommandPool = anv_tramp_ResetCommandPool,
+ .vkAllocateCommandBuffers = anv_tramp_AllocateCommandBuffers,
+ .vkFreeCommandBuffers = anv_tramp_FreeCommandBuffers,
+ .vkBeginCommandBuffer = anv_tramp_BeginCommandBuffer,
+ .vkEndCommandBuffer = anv_tramp_EndCommandBuffer,
+ .vkResetCommandBuffer = anv_tramp_ResetCommandBuffer,
+ .vkCmdBindPipeline = anv_tramp_CmdBindPipeline,
+ .vkCmdSetViewport = anv_tramp_CmdSetViewport,
+ .vkCmdSetScissor = anv_tramp_CmdSetScissor,
+ .vkCmdSetLineWidth = anv_tramp_CmdSetLineWidth,
+ .vkCmdSetDepthBias = anv_tramp_CmdSetDepthBias,
+ .vkCmdSetBlendConstants = anv_tramp_CmdSetBlendConstants,
+ .vkCmdSetDepthBounds = anv_tramp_CmdSetDepthBounds,
+ .vkCmdSetStencilCompareMask = anv_tramp_CmdSetStencilCompareMask,
+ .vkCmdSetStencilWriteMask = anv_tramp_CmdSetStencilWriteMask,
+ .vkCmdSetStencilReference = anv_tramp_CmdSetStencilReference,
+ .vkCmdBindDescriptorSets = anv_tramp_CmdBindDescriptorSets,
+ .vkCmdBindIndexBuffer = anv_tramp_CmdBindIndexBuffer,
+ .vkCmdBindVertexBuffers = anv_tramp_CmdBindVertexBuffers,
+ .vkCmdDraw = anv_tramp_CmdDraw,
+ .vkCmdDrawIndexed = anv_tramp_CmdDrawIndexed,
+ .vkCmdDrawIndirect = anv_tramp_CmdDrawIndirect,
+ .vkCmdDrawIndexedIndirect = anv_tramp_CmdDrawIndexedIndirect,
+ .vkCmdDispatch = anv_tramp_CmdDispatch,
+ .vkCmdDispatchIndirect = anv_tramp_CmdDispatchIndirect,
+ .vkCmdCopyBuffer = anv_tramp_CmdCopyBuffer,
+ .vkCmdCopyImage = anv_tramp_CmdCopyImage,
+ .vkCmdBlitImage = anv_tramp_CmdBlitImage,
+ .vkCmdCopyBufferToImage = anv_tramp_CmdCopyBufferToImage,
+ .vkCmdCopyImageToBuffer = anv_tramp_CmdCopyImageToBuffer,
+ .vkCmdUpdateBuffer = anv_tramp_CmdUpdateBuffer,
+ .vkCmdFillBuffer = anv_tramp_CmdFillBuffer,
+ .vkCmdClearColorImage = anv_tramp_CmdClearColorImage,
+ .vkCmdClearDepthStencilImage = anv_tramp_CmdClearDepthStencilImage,
+ .vkCmdClearAttachments = anv_tramp_CmdClearAttachments,
+ .vkCmdResolveImage = anv_tramp_CmdResolveImage,
+ .vkCmdSetEvent = anv_tramp_CmdSetEvent,
+ .vkCmdResetEvent = anv_tramp_CmdResetEvent,
+ .vkCmdWaitEvents = anv_tramp_CmdWaitEvents,
+ .vkCmdPipelineBarrier = anv_tramp_CmdPipelineBarrier,
+ .vkCmdBeginQuery = anv_tramp_CmdBeginQuery,
+ .vkCmdEndQuery = anv_tramp_CmdEndQuery,
+ .vkCmdResetQueryPool = anv_tramp_CmdResetQueryPool,
+ .vkCmdWriteTimestamp = anv_tramp_CmdWriteTimestamp,
+ .vkCmdCopyQueryPoolResults = anv_tramp_CmdCopyQueryPoolResults,
+ .vkCmdPushConstants = anv_tramp_CmdPushConstants,
+ .vkCmdBeginRenderPass = anv_tramp_CmdBeginRenderPass,
+ .vkCmdNextSubpass = anv_tramp_CmdNextSubpass,
+ .vkCmdEndRenderPass = anv_tramp_CmdEndRenderPass,
+ .vkCmdExecuteCommands = anv_tramp_CmdExecuteCommands,
+ .vkCreateSwapchainKHR = anv_tramp_CreateSwapchainKHR,
+ .vkDestroySwapchainKHR = anv_tramp_DestroySwapchainKHR,
+ .vkGetSwapchainImagesKHR = anv_tramp_GetSwapchainImagesKHR,
+ .vkAcquireNextImageKHR = anv_tramp_AcquireNextImageKHR,
+ .vkCmdPushDescriptorSetKHR = anv_tramp_CmdPushDescriptorSetKHR,
+ .vkTrimCommandPoolKHR = anv_tramp_TrimCommandPoolKHR,
+ .vkGetMemoryFdKHR = anv_tramp_GetMemoryFdKHR,
+ .vkGetMemoryFdPropertiesKHR = anv_tramp_GetMemoryFdPropertiesKHR,
+ .vkGetSemaphoreFdKHR = anv_tramp_GetSemaphoreFdKHR,
+ .vkImportSemaphoreFdKHR = anv_tramp_ImportSemaphoreFdKHR,
+ .vkGetFenceFdKHR = anv_tramp_GetFenceFdKHR,
+ .vkImportFenceFdKHR = anv_tramp_ImportFenceFdKHR,
+ .vkBindBufferMemory2KHR = anv_tramp_BindBufferMemory2KHR,
+ .vkBindImageMemory2KHR = anv_tramp_BindImageMemory2KHR,
+ .vkCreateDescriptorUpdateTemplateKHR = anv_tramp_CreateDescriptorUpdateTemplateKHR,
+ .vkDestroyDescriptorUpdateTemplateKHR = anv_tramp_DestroyDescriptorUpdateTemplateKHR,
+ .vkUpdateDescriptorSetWithTemplateKHR = anv_tramp_UpdateDescriptorSetWithTemplateKHR,
+ .vkCmdPushDescriptorSetWithTemplateKHR = anv_tramp_CmdPushDescriptorSetWithTemplateKHR,
+ .vkGetBufferMemoryRequirements2KHR = anv_tramp_GetBufferMemoryRequirements2KHR,
+ .vkGetImageMemoryRequirements2KHR = anv_tramp_GetImageMemoryRequirements2KHR,
+ .vkGetImageSparseMemoryRequirements2KHR = anv_tramp_GetImageSparseMemoryRequirements2KHR,
+ .vkCreateSamplerYcbcrConversionKHR = anv_tramp_CreateSamplerYcbcrConversionKHR,
+ .vkDestroySamplerYcbcrConversionKHR = anv_tramp_DestroySamplerYcbcrConversionKHR,
+#ifdef ANDROID
+ .vkGetSwapchainGrallocUsageANDROID = anv_tramp_GetSwapchainGrallocUsageANDROID,
+#endif // ANDROID
+#ifdef ANDROID
+ .vkAcquireImageANDROID = anv_tramp_AcquireImageANDROID,
+#endif // ANDROID
+ .vkCreateDmaBufImageINTEL = anv_tramp_CreateDmaBufImageINTEL,
+};
+
+
+/** Return true if the core version or extension in which the given entrypoint
+ * is defined is enabled.
+ *
+ * If device is NULL, all device extensions are considered enabled.
+ */
+bool
+anv_entrypoint_is_enabled(int index, uint32_t core_version,
+ const struct anv_instance_extension_table *instance,
+ const struct anv_device_extension_table *device)
+{
+ switch (index) {
+ case 0:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 1:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 2:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 3:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 4:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 5:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 6:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 7:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 8:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 9:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 10:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 11:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 12:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 13:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 14:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 15:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 16:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 17:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 18:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 19:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 20:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 21:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 22:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 23:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 24:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 25:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 26:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 27:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 28:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 29:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 30:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 31:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 32:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 33:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 34:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 35:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 36:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 37:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 38:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 39:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 40:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 41:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 42:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 43:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 44:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 45:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 46:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 47:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 48:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 49:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 50:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 51:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 52:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 53:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 54:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 55:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 56:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 57:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 58:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 59:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 60:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 61:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 62:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 63:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 64:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 65:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 66:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 67:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 68:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 69:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 70:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 71:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 72:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 73:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 74:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 75:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 76:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 77:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 78:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 79:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 80:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 81:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 82:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 83:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 84:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 85:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 86:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 87:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 88:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 89:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 90:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 91:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 92:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 93:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 94:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 95:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 96:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 97:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 98:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 99:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 100:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 101:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 102:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 103:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 104:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 105:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 106:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 107:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 108:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 109:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 110:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 111:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 112:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 113:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 114:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 115:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 116:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 117:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 118:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 119:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 120:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 121:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 122:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 123:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 124:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 125:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 126:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 127:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 128:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 129:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 130:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 131:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 132:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 133:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 134:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 135:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 136:
+ return VK_MAKE_VERSION(1, 0, 0) <= core_version;
+ case 137:
+ return instance->KHR_surface;
+ case 138:
+ return instance->KHR_surface;
+ case 139:
+ return instance->KHR_surface;
+ case 140:
+ return instance->KHR_surface;
+ case 141:
+ return instance->KHR_surface;
+ case 142:
+ return !device || device->KHR_swapchain;
+ case 143:
+ return !device || device->KHR_swapchain;
+ case 144:
+ return !device || device->KHR_swapchain;
+ case 145:
+ return !device || device->KHR_swapchain;
+ case 146:
+ return !device || device->KHR_swapchain;
+ case 147:
+ return instance->KHR_wayland_surface;
+ case 148:
+ return instance->KHR_wayland_surface;
+ case 149:
+ return instance->KHR_xlib_surface;
+ case 150:
+ return instance->KHR_xlib_surface;
+ case 151:
+ return instance->KHR_xcb_surface;
+ case 152:
+ return instance->KHR_xcb_surface;
+ case 153:
+ return instance->EXT_debug_report;
+ case 154:
+ return instance->EXT_debug_report;
+ case 155:
+ return instance->EXT_debug_report;
+ case 156:
+ return instance->KHR_get_physical_device_properties2;
+ case 157:
+ return instance->KHR_get_physical_device_properties2;
+ case 158:
+ return instance->KHR_get_physical_device_properties2;
+ case 159:
+ return instance->KHR_get_physical_device_properties2;
+ case 160:
+ return instance->KHR_get_physical_device_properties2;
+ case 161:
+ return instance->KHR_get_physical_device_properties2;
+ case 162:
+ return instance->KHR_get_physical_device_properties2;
+ case 163:
+ return !device || device->KHR_push_descriptor;
+ case 164:
+ return !device || device->KHR_maintenance1;
+ case 165:
+ return instance->KHR_external_memory_capabilities;
+ case 166:
+ return !device || device->KHR_external_memory_fd;
+ case 167:
+ return !device || device->KHR_external_memory_fd;
+ case 168:
+ return instance->KHR_external_semaphore_capabilities;
+ case 169:
+ return !device || device->KHR_external_semaphore_fd;
+ case 170:
+ return !device || device->KHR_external_semaphore_fd;
+ case 171:
+ return instance->KHR_external_fence_capabilities;
+ case 172:
+ return !device || device->KHR_external_fence_fd;
+ case 173:
+ return !device || device->KHR_external_fence_fd;
+ case 174:
+ return !device || device->KHR_bind_memory2;
+ case 175:
+ return !device || device->KHR_bind_memory2;
+ case 176:
+ return !device || device->KHR_descriptor_update_template;
+ case 177:
+ return !device || device->KHR_descriptor_update_template;
+ case 178:
+ return !device || device->KHR_descriptor_update_template;
+ case 179:
+ return !device || device->KHR_descriptor_update_template;
+ case 180:
+ return instance->KHR_get_surface_capabilities2;
+ case 181:
+ return instance->KHR_get_surface_capabilities2;
+ case 182:
+ return !device || device->KHR_get_memory_requirements2;
+ case 183:
+ return !device || device->KHR_get_memory_requirements2;
+ case 184:
+ return !device || device->KHR_get_memory_requirements2;
+ case 185:
+ return !device || device->KHR_sampler_ycbcr_conversion;
+ case 186:
+ return !device || device->KHR_sampler_ycbcr_conversion;
+ case 187:
+ return !device || device->ANDROID_native_buffer;
+ case 188:
+ return !device || device->ANDROID_native_buffer;
+ case 189:
+ return !device || device->ANDROID_native_buffer;
+ case 190:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static void * __attribute__ ((noinline))
+anv_resolve_entrypoint(const struct gen_device_info *devinfo, uint32_t index)
+{
+ if (devinfo == NULL) {
+ return anv_dispatch_table.entrypoints[index];
+ }
+
+ const struct anv_dispatch_table *genX_table;
+ switch (devinfo->gen) {
+ case 10:
+ genX_table = &gen10_dispatch_table;
+ break;
+ case 9:
+ genX_table = &gen9_dispatch_table;
+ break;
+ case 8:
+ genX_table = &gen8_dispatch_table;
+ break;
+ case 7:
+ if (devinfo->is_haswell)
+ genX_table = &gen75_dispatch_table;
+ else
+ genX_table = &gen7_dispatch_table;
+ break;
+ default:
+ unreachable("unsupported gen\n");
+ }
+
+ if (genX_table->entrypoints[index])
+ return genX_table->entrypoints[index];
+ else
+ return anv_dispatch_table.entrypoints[index];
+}
+
+/* Hash table stats:
+ * size 256 entries
+ * collisions entries:
+ * 0 119
+ * 1 37
+ * 2 13
+ * 3 7
+ * 4 4
+ * 5 1
+ * 6 5
+ * 7 3
+ * 8 1
+ * 9+ 1
+ */
+
+#define none 0xffff
+static const uint16_t map[] = {
+ 0x0044,
+ none,
+ 0x00bd,
+ 0x00bc,
+ 0x00a7,
+ 0x002b,
+ 0x0040,
+ 0x0061,
+ 0x0049,
+ 0x0022,
+ 0x0056,
+ none,
+ none,
+ none,
+ 0x00a5,
+ none,
+ none,
+ 0x00a6,
+ none,
+ 0x0067,
+ none,
+ none,
+ none,
+ 0x00ab,
+ 0x0052,
+ 0x0097,
+ 0x0058,
+ 0x004c,
+ none,
+ 0x0069,
+ 0x00b1,
+ none,
+ none,
+ 0x00ac,
+ 0x0054,
+ none,
+ 0x0014,
+ 0x005b,
+ 0x0070,
+ 0x0002,
+ 0x007c,
+ none,
+ 0x001c,
+ 0x002f,
+ 0x00be,
+ none,
+ 0x0077,
+ 0x0018,
+ 0x004b,
+ 0x002a,
+ none,
+ 0x0008,
+ 0x0065,
+ 0x0080,
+ 0x006d,
+ 0x0053,
+ none,
+ 0x00a0,
+ 0x004d,
+ 0x0090,
+ 0x0024,
+ 0x00a1,
+ 0x005e,
+ 0x000b,
+ 0x0088,
+ 0x0091,
+ none,
+ 0x00b2,
+ 0x005c,
+ 0x0033,
+ none,
+ 0x009b,
+ 0x0087,
+ 0x003f,
+ 0x001f,
+ 0x002c,
+ 0x0082,
+ 0x005a,
+ none,
+ 0x00b9,
+ none,
+ 0x0019,
+ 0x0046,
+ 0x003a,
+ 0x009a,
+ none,
+ 0x0034,
+ none,
+ 0x0051,
+ none,
+ none,
+ 0x0020,
+ 0x009c,
+ 0x0066,
+ 0x0075,
+ none,
+ none,
+ none,
+ 0x0035,
+ 0x001e,
+ 0x006f,
+ 0x0060,
+ 0x0047,
+ 0x000a,
+ 0x0023,
+ 0x0099,
+ none,
+ 0x006b,
+ none,
+ 0x0041,
+ 0x0028,
+ none,
+ 0x0068,
+ 0x00b8,
+ 0x00a2,
+ 0x003e,
+ 0x0048,
+ 0x007b,
+ 0x0055,
+ 0x00aa,
+ 0x00b4,
+ 0x0045,
+ 0x006e,
+ 0x0084,
+ none,
+ 0x0089,
+ 0x000e,
+ 0x0030,
+ none,
+ 0x0027,
+ 0x0081,
+ 0x00b7,
+ 0x005d,
+ 0x008a,
+ 0x0003,
+ 0x008f,
+ 0x00b5,
+ 0x0063,
+ 0x0006,
+ none,
+ 0x0093,
+ 0x00a4,
+ none,
+ none,
+ 0x00ad,
+ 0x0059,
+ 0x0026,
+ none,
+ 0x003c,
+ none,
+ 0x0037,
+ 0x00a9,
+ 0x0009,
+ 0x0038,
+ 0x0011,
+ none,
+ 0x0072,
+ 0x0016,
+ none,
+ 0x003d,
+ 0x00b6,
+ 0x006a,
+ 0x003b,
+ 0x00ba,
+ 0x004a,
+ 0x0013,
+ 0x0000,
+ 0x007a,
+ 0x002e,
+ 0x0071,
+ none,
+ 0x0096,
+ 0x0074,
+ 0x0004,
+ 0x004f,
+ 0x0029,
+ 0x00b0,
+ 0x004e,
+ 0x0095,
+ 0x0031,
+ 0x00a3,
+ 0x001b,
+ 0x00bb,
+ 0x0073,
+ 0x005f,
+ 0x0032,
+ 0x0078,
+ 0x008e,
+ none,
+ none,
+ none,
+ 0x006c,
+ 0x00af,
+ none,
+ 0x0036,
+ none,
+ 0x0050,
+ 0x009d,
+ 0x007d,
+ none,
+ 0x008c,
+ 0x0005,
+ 0x001a,
+ 0x000c,
+ 0x0098,
+ 0x00a8,
+ 0x0092,
+ none,
+ none,
+ 0x008d,
+ 0x0094,
+ 0x0015,
+ 0x0083,
+ 0x0043,
+ none,
+ none,
+ 0x000d,
+ none,
+ 0x0007,
+ none,
+ 0x0025,
+ 0x007f,
+ 0x001d,
+ none,
+ 0x0076,
+ 0x009e,
+ 0x0064,
+ 0x0085,
+ none,
+ none,
+ none,
+ 0x000f,
+ 0x007e,
+ none,
+ 0x009f,
+ 0x0017,
+ 0x0012,
+ 0x0010,
+ none,
+ 0x0021,
+ 0x008b,
+ 0x0079,
+ 0x0001,
+ 0x00b3,
+ 0x00ae,
+ 0x002d,
+ none,
+ none,
+ none,
+ 0x0086,
+ none,
+ 0x0062,
+ none,
+ 0x0057,
+ 0x0042,
+ 0x0039,
+};
+
+int
+anv_get_entrypoint_index(const char *name)
+{
+ static const uint32_t prime_factor = 5024183;
+ static const uint32_t prime_step = 19;
+ const struct anv_entrypoint *e;
+ uint32_t hash, h, i;
+ const char *p;
+
+ hash = 0;
+ for (p = name; *p; p++)
+ hash = hash * prime_factor + *p;
+
+ h = hash;
+ do {
+ i = map[h & 255];
+ if (i == none)
+ return -1;
+ e = &entrypoints[i];
+ h += prime_step;
+ } while (e->hash != hash);
+
+ if (strcmp(name, strings + e->name) != 0)
+ return -1;
+
+ return i;
+}
+
+void *
+anv_lookup_entrypoint(const struct gen_device_info *devinfo, const char *name)
+{
+ int idx = anv_get_entrypoint_index(name);
+ if (idx < 0)
+ return NULL;
+ return anv_resolve_entrypoint(devinfo, idx);
+}
\ No newline at end of file
diff --git a/prebuilt-intermediates/vulkan/anv_entrypoints.h b/prebuilt-intermediates/vulkan/anv_entrypoints.h
new file mode 100644
index 0000000..ff499b1
--- /dev/null
+++ b/prebuilt-intermediates/vulkan/anv_entrypoints.h
@@ -0,0 +1,1409 @@
+/* This file generated from anv_entrypoints_gen.py, don't edit directly. */
+
+struct anv_dispatch_table {
+ union {
+ void *entrypoints[191];
+ struct {
+ PFN_vkCreateInstance vkCreateInstance;
+ PFN_vkDestroyInstance vkDestroyInstance;
+ PFN_vkEnumeratePhysicalDevices vkEnumeratePhysicalDevices;
+ PFN_vkGetDeviceProcAddr vkGetDeviceProcAddr;
+ PFN_vkGetInstanceProcAddr vkGetInstanceProcAddr;
+ PFN_vkGetPhysicalDeviceProperties vkGetPhysicalDeviceProperties;
+ PFN_vkGetPhysicalDeviceQueueFamilyProperties vkGetPhysicalDeviceQueueFamilyProperties;
+ PFN_vkGetPhysicalDeviceMemoryProperties vkGetPhysicalDeviceMemoryProperties;
+ PFN_vkGetPhysicalDeviceFeatures vkGetPhysicalDeviceFeatures;
+ PFN_vkGetPhysicalDeviceFormatProperties vkGetPhysicalDeviceFormatProperties;
+ PFN_vkGetPhysicalDeviceImageFormatProperties vkGetPhysicalDeviceImageFormatProperties;
+ PFN_vkCreateDevice vkCreateDevice;
+ PFN_vkDestroyDevice vkDestroyDevice;
+ PFN_vkEnumerateInstanceLayerProperties vkEnumerateInstanceLayerProperties;
+ PFN_vkEnumerateInstanceExtensionProperties vkEnumerateInstanceExtensionProperties;
+ PFN_vkEnumerateDeviceLayerProperties vkEnumerateDeviceLayerProperties;
+ PFN_vkEnumerateDeviceExtensionProperties vkEnumerateDeviceExtensionProperties;
+ PFN_vkGetDeviceQueue vkGetDeviceQueue;
+ PFN_vkQueueSubmit vkQueueSubmit;
+ PFN_vkQueueWaitIdle vkQueueWaitIdle;
+ PFN_vkDeviceWaitIdle vkDeviceWaitIdle;
+ PFN_vkAllocateMemory vkAllocateMemory;
+ PFN_vkFreeMemory vkFreeMemory;
+ PFN_vkMapMemory vkMapMemory;
+ PFN_vkUnmapMemory vkUnmapMemory;
+ PFN_vkFlushMappedMemoryRanges vkFlushMappedMemoryRanges;
+ PFN_vkInvalidateMappedMemoryRanges vkInvalidateMappedMemoryRanges;
+ PFN_vkGetDeviceMemoryCommitment vkGetDeviceMemoryCommitment;
+ PFN_vkGetBufferMemoryRequirements vkGetBufferMemoryRequirements;
+ PFN_vkBindBufferMemory vkBindBufferMemory;
+ PFN_vkGetImageMemoryRequirements vkGetImageMemoryRequirements;
+ PFN_vkBindImageMemory vkBindImageMemory;
+ PFN_vkGetImageSparseMemoryRequirements vkGetImageSparseMemoryRequirements;
+ PFN_vkGetPhysicalDeviceSparseImageFormatProperties vkGetPhysicalDeviceSparseImageFormatProperties;
+ PFN_vkQueueBindSparse vkQueueBindSparse;
+ PFN_vkCreateFence vkCreateFence;
+ PFN_vkDestroyFence vkDestroyFence;
+ PFN_vkResetFences vkResetFences;
+ PFN_vkGetFenceStatus vkGetFenceStatus;
+ PFN_vkWaitForFences vkWaitForFences;
+ PFN_vkCreateSemaphore vkCreateSemaphore;
+ PFN_vkDestroySemaphore vkDestroySemaphore;
+ PFN_vkCreateEvent vkCreateEvent;
+ PFN_vkDestroyEvent vkDestroyEvent;
+ PFN_vkGetEventStatus vkGetEventStatus;
+ PFN_vkSetEvent vkSetEvent;
+ PFN_vkResetEvent vkResetEvent;
+ PFN_vkCreateQueryPool vkCreateQueryPool;
+ PFN_vkDestroyQueryPool vkDestroyQueryPool;
+ PFN_vkGetQueryPoolResults vkGetQueryPoolResults;
+ PFN_vkCreateBuffer vkCreateBuffer;
+ PFN_vkDestroyBuffer vkDestroyBuffer;
+ PFN_vkCreateBufferView vkCreateBufferView;
+ PFN_vkDestroyBufferView vkDestroyBufferView;
+ PFN_vkCreateImage vkCreateImage;
+ PFN_vkDestroyImage vkDestroyImage;
+ PFN_vkGetImageSubresourceLayout vkGetImageSubresourceLayout;
+ PFN_vkCreateImageView vkCreateImageView;
+ PFN_vkDestroyImageView vkDestroyImageView;
+ PFN_vkCreateShaderModule vkCreateShaderModule;
+ PFN_vkDestroyShaderModule vkDestroyShaderModule;
+ PFN_vkCreatePipelineCache vkCreatePipelineCache;
+ PFN_vkDestroyPipelineCache vkDestroyPipelineCache;
+ PFN_vkGetPipelineCacheData vkGetPipelineCacheData;
+ PFN_vkMergePipelineCaches vkMergePipelineCaches;
+ PFN_vkCreateGraphicsPipelines vkCreateGraphicsPipelines;
+ PFN_vkCreateComputePipelines vkCreateComputePipelines;
+ PFN_vkDestroyPipeline vkDestroyPipeline;
+ PFN_vkCreatePipelineLayout vkCreatePipelineLayout;
+ PFN_vkDestroyPipelineLayout vkDestroyPipelineLayout;
+ PFN_vkCreateSampler vkCreateSampler;
+ PFN_vkDestroySampler vkDestroySampler;
+ PFN_vkCreateDescriptorSetLayout vkCreateDescriptorSetLayout;
+ PFN_vkDestroyDescriptorSetLayout vkDestroyDescriptorSetLayout;
+ PFN_vkCreateDescriptorPool vkCreateDescriptorPool;
+ PFN_vkDestroyDescriptorPool vkDestroyDescriptorPool;
+ PFN_vkResetDescriptorPool vkResetDescriptorPool;
+ PFN_vkAllocateDescriptorSets vkAllocateDescriptorSets;
+ PFN_vkFreeDescriptorSets vkFreeDescriptorSets;
+ PFN_vkUpdateDescriptorSets vkUpdateDescriptorSets;
+ PFN_vkCreateFramebuffer vkCreateFramebuffer;
+ PFN_vkDestroyFramebuffer vkDestroyFramebuffer;
+ PFN_vkCreateRenderPass vkCreateRenderPass;
+ PFN_vkDestroyRenderPass vkDestroyRenderPass;
+ PFN_vkGetRenderAreaGranularity vkGetRenderAreaGranularity;
+ PFN_vkCreateCommandPool vkCreateCommandPool;
+ PFN_vkDestroyCommandPool vkDestroyCommandPool;
+ PFN_vkResetCommandPool vkResetCommandPool;
+ PFN_vkAllocateCommandBuffers vkAllocateCommandBuffers;
+ PFN_vkFreeCommandBuffers vkFreeCommandBuffers;
+ PFN_vkBeginCommandBuffer vkBeginCommandBuffer;
+ PFN_vkEndCommandBuffer vkEndCommandBuffer;
+ PFN_vkResetCommandBuffer vkResetCommandBuffer;
+ PFN_vkCmdBindPipeline vkCmdBindPipeline;
+ PFN_vkCmdSetViewport vkCmdSetViewport;
+ PFN_vkCmdSetScissor vkCmdSetScissor;
+ PFN_vkCmdSetLineWidth vkCmdSetLineWidth;
+ PFN_vkCmdSetDepthBias vkCmdSetDepthBias;
+ PFN_vkCmdSetBlendConstants vkCmdSetBlendConstants;
+ PFN_vkCmdSetDepthBounds vkCmdSetDepthBounds;
+ PFN_vkCmdSetStencilCompareMask vkCmdSetStencilCompareMask;
+ PFN_vkCmdSetStencilWriteMask vkCmdSetStencilWriteMask;
+ PFN_vkCmdSetStencilReference vkCmdSetStencilReference;
+ PFN_vkCmdBindDescriptorSets vkCmdBindDescriptorSets;
+ PFN_vkCmdBindIndexBuffer vkCmdBindIndexBuffer;
+ PFN_vkCmdBindVertexBuffers vkCmdBindVertexBuffers;
+ PFN_vkCmdDraw vkCmdDraw;
+ PFN_vkCmdDrawIndexed vkCmdDrawIndexed;
+ PFN_vkCmdDrawIndirect vkCmdDrawIndirect;
+ PFN_vkCmdDrawIndexedIndirect vkCmdDrawIndexedIndirect;
+ PFN_vkCmdDispatch vkCmdDispatch;
+ PFN_vkCmdDispatchIndirect vkCmdDispatchIndirect;
+ PFN_vkCmdCopyBuffer vkCmdCopyBuffer;
+ PFN_vkCmdCopyImage vkCmdCopyImage;
+ PFN_vkCmdBlitImage vkCmdBlitImage;
+ PFN_vkCmdCopyBufferToImage vkCmdCopyBufferToImage;
+ PFN_vkCmdCopyImageToBuffer vkCmdCopyImageToBuffer;
+ PFN_vkCmdUpdateBuffer vkCmdUpdateBuffer;
+ PFN_vkCmdFillBuffer vkCmdFillBuffer;
+ PFN_vkCmdClearColorImage vkCmdClearColorImage;
+ PFN_vkCmdClearDepthStencilImage vkCmdClearDepthStencilImage;
+ PFN_vkCmdClearAttachments vkCmdClearAttachments;
+ PFN_vkCmdResolveImage vkCmdResolveImage;
+ PFN_vkCmdSetEvent vkCmdSetEvent;
+ PFN_vkCmdResetEvent vkCmdResetEvent;
+ PFN_vkCmdWaitEvents vkCmdWaitEvents;
+ PFN_vkCmdPipelineBarrier vkCmdPipelineBarrier;
+ PFN_vkCmdBeginQuery vkCmdBeginQuery;
+ PFN_vkCmdEndQuery vkCmdEndQuery;
+ PFN_vkCmdResetQueryPool vkCmdResetQueryPool;
+ PFN_vkCmdWriteTimestamp vkCmdWriteTimestamp;
+ PFN_vkCmdCopyQueryPoolResults vkCmdCopyQueryPoolResults;
+ PFN_vkCmdPushConstants vkCmdPushConstants;
+ PFN_vkCmdBeginRenderPass vkCmdBeginRenderPass;
+ PFN_vkCmdNextSubpass vkCmdNextSubpass;
+ PFN_vkCmdEndRenderPass vkCmdEndRenderPass;
+ PFN_vkCmdExecuteCommands vkCmdExecuteCommands;
+ PFN_vkDestroySurfaceKHR vkDestroySurfaceKHR;
+ PFN_vkGetPhysicalDeviceSurfaceSupportKHR vkGetPhysicalDeviceSurfaceSupportKHR;
+ PFN_vkGetPhysicalDeviceSurfaceCapabilitiesKHR vkGetPhysicalDeviceSurfaceCapabilitiesKHR;
+ PFN_vkGetPhysicalDeviceSurfaceFormatsKHR vkGetPhysicalDeviceSurfaceFormatsKHR;
+ PFN_vkGetPhysicalDeviceSurfacePresentModesKHR vkGetPhysicalDeviceSurfacePresentModesKHR;
+ PFN_vkCreateSwapchainKHR vkCreateSwapchainKHR;
+ PFN_vkDestroySwapchainKHR vkDestroySwapchainKHR;
+ PFN_vkGetSwapchainImagesKHR vkGetSwapchainImagesKHR;
+ PFN_vkAcquireNextImageKHR vkAcquireNextImageKHR;
+ PFN_vkQueuePresentKHR vkQueuePresentKHR;
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ PFN_vkCreateWaylandSurfaceKHR vkCreateWaylandSurfaceKHR;
+#else
+ void *vkCreateWaylandSurfaceKHR;
+# endif
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ PFN_vkGetPhysicalDeviceWaylandPresentationSupportKHR vkGetPhysicalDeviceWaylandPresentationSupportKHR;
+#else
+ void *vkGetPhysicalDeviceWaylandPresentationSupportKHR;
+# endif
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ PFN_vkCreateXlibSurfaceKHR vkCreateXlibSurfaceKHR;
+#else
+ void *vkCreateXlibSurfaceKHR;
+# endif
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ PFN_vkGetPhysicalDeviceXlibPresentationSupportKHR vkGetPhysicalDeviceXlibPresentationSupportKHR;
+#else
+ void *vkGetPhysicalDeviceXlibPresentationSupportKHR;
+# endif
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ PFN_vkCreateXcbSurfaceKHR vkCreateXcbSurfaceKHR;
+#else
+ void *vkCreateXcbSurfaceKHR;
+# endif
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ PFN_vkGetPhysicalDeviceXcbPresentationSupportKHR vkGetPhysicalDeviceXcbPresentationSupportKHR;
+#else
+ void *vkGetPhysicalDeviceXcbPresentationSupportKHR;
+# endif
+ PFN_vkCreateDebugReportCallbackEXT vkCreateDebugReportCallbackEXT;
+ PFN_vkDestroyDebugReportCallbackEXT vkDestroyDebugReportCallbackEXT;
+ PFN_vkDebugReportMessageEXT vkDebugReportMessageEXT;
+ PFN_vkGetPhysicalDeviceFeatures2KHR vkGetPhysicalDeviceFeatures2KHR;
+ PFN_vkGetPhysicalDeviceProperties2KHR vkGetPhysicalDeviceProperties2KHR;
+ PFN_vkGetPhysicalDeviceFormatProperties2KHR vkGetPhysicalDeviceFormatProperties2KHR;
+ PFN_vkGetPhysicalDeviceImageFormatProperties2KHR vkGetPhysicalDeviceImageFormatProperties2KHR;
+ PFN_vkGetPhysicalDeviceQueueFamilyProperties2KHR vkGetPhysicalDeviceQueueFamilyProperties2KHR;
+ PFN_vkGetPhysicalDeviceMemoryProperties2KHR vkGetPhysicalDeviceMemoryProperties2KHR;
+ PFN_vkGetPhysicalDeviceSparseImageFormatProperties2KHR vkGetPhysicalDeviceSparseImageFormatProperties2KHR;
+ PFN_vkCmdPushDescriptorSetKHR vkCmdPushDescriptorSetKHR;
+ PFN_vkTrimCommandPoolKHR vkTrimCommandPoolKHR;
+ PFN_vkGetPhysicalDeviceExternalBufferPropertiesKHR vkGetPhysicalDeviceExternalBufferPropertiesKHR;
+ PFN_vkGetMemoryFdKHR vkGetMemoryFdKHR;
+ PFN_vkGetMemoryFdPropertiesKHR vkGetMemoryFdPropertiesKHR;
+ PFN_vkGetPhysicalDeviceExternalSemaphorePropertiesKHR vkGetPhysicalDeviceExternalSemaphorePropertiesKHR;
+ PFN_vkGetSemaphoreFdKHR vkGetSemaphoreFdKHR;
+ PFN_vkImportSemaphoreFdKHR vkImportSemaphoreFdKHR;
+ PFN_vkGetPhysicalDeviceExternalFencePropertiesKHR vkGetPhysicalDeviceExternalFencePropertiesKHR;
+ PFN_vkGetFenceFdKHR vkGetFenceFdKHR;
+ PFN_vkImportFenceFdKHR vkImportFenceFdKHR;
+ PFN_vkBindBufferMemory2KHR vkBindBufferMemory2KHR;
+ PFN_vkBindImageMemory2KHR vkBindImageMemory2KHR;
+ PFN_vkCreateDescriptorUpdateTemplateKHR vkCreateDescriptorUpdateTemplateKHR;
+ PFN_vkDestroyDescriptorUpdateTemplateKHR vkDestroyDescriptorUpdateTemplateKHR;
+ PFN_vkUpdateDescriptorSetWithTemplateKHR vkUpdateDescriptorSetWithTemplateKHR;
+ PFN_vkCmdPushDescriptorSetWithTemplateKHR vkCmdPushDescriptorSetWithTemplateKHR;
+ PFN_vkGetPhysicalDeviceSurfaceCapabilities2KHR vkGetPhysicalDeviceSurfaceCapabilities2KHR;
+ PFN_vkGetPhysicalDeviceSurfaceFormats2KHR vkGetPhysicalDeviceSurfaceFormats2KHR;
+ PFN_vkGetBufferMemoryRequirements2KHR vkGetBufferMemoryRequirements2KHR;
+ PFN_vkGetImageMemoryRequirements2KHR vkGetImageMemoryRequirements2KHR;
+ PFN_vkGetImageSparseMemoryRequirements2KHR vkGetImageSparseMemoryRequirements2KHR;
+ PFN_vkCreateSamplerYcbcrConversionKHR vkCreateSamplerYcbcrConversionKHR;
+ PFN_vkDestroySamplerYcbcrConversionKHR vkDestroySamplerYcbcrConversionKHR;
+#ifdef ANDROID
+ PFN_vkGetSwapchainGrallocUsageANDROID vkGetSwapchainGrallocUsageANDROID;
+#else
+ void *vkGetSwapchainGrallocUsageANDROID;
+# endif
+#ifdef ANDROID
+ PFN_vkAcquireImageANDROID vkAcquireImageANDROID;
+#else
+ void *vkAcquireImageANDROID;
+# endif
+#ifdef ANDROID
+ PFN_vkQueueSignalReleaseImageANDROID vkQueueSignalReleaseImageANDROID;
+#else
+ void *vkQueueSignalReleaseImageANDROID;
+# endif
+ PFN_vkCreateDmaBufImageINTEL vkCreateDmaBufImageINTEL;
+ };
+ };
+};
+
+extern const struct anv_dispatch_table anv_dispatch_table;
+extern const struct anv_dispatch_table gen7_dispatch_table;
+extern const struct anv_dispatch_table gen75_dispatch_table;
+extern const struct anv_dispatch_table gen8_dispatch_table;
+extern const struct anv_dispatch_table gen9_dispatch_table;
+extern const struct anv_dispatch_table gen10_dispatch_table;
+extern const struct anv_dispatch_table anv_tramp_dispatch_table;
+
+ VkResult anv_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ VkResult gen7_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ VkResult gen75_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ VkResult gen8_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ VkResult gen9_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ VkResult gen10_CreateInstance(const VkInstanceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkInstance* pInstance);
+ void anv_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyInstance(VkInstance instance, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ VkResult gen7_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ VkResult gen75_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ VkResult gen8_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ VkResult gen9_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ VkResult gen10_EnumeratePhysicalDevices(VkInstance instance, uint32_t* pPhysicalDeviceCount, VkPhysicalDevice* pPhysicalDevices);
+ PFN_vkVoidFunction anv_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction gen7_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction gen75_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction gen8_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction gen9_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction gen10_GetDeviceProcAddr(VkDevice device, const char* pName);
+ PFN_vkVoidFunction anv_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ PFN_vkVoidFunction gen7_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ PFN_vkVoidFunction gen75_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ PFN_vkVoidFunction gen8_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ PFN_vkVoidFunction gen9_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ PFN_vkVoidFunction gen10_GetInstanceProcAddr(VkInstance instance, const char* pName);
+ void anv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void gen7_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void gen75_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void gen8_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void gen9_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void gen10_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties* pProperties);
+ void anv_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void gen7_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void gen75_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void gen8_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void gen9_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void gen10_GetPhysicalDeviceQueueFamilyProperties(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties* pQueueFamilyProperties);
+ void anv_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void gen7_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void gen75_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void gen8_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void gen9_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void gen10_GetPhysicalDeviceMemoryProperties(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties* pMemoryProperties);
+ void anv_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void gen7_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void gen75_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void gen8_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void gen9_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void gen10_GetPhysicalDeviceFeatures(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures* pFeatures);
+ void anv_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ void gen7_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ void gen75_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ void gen8_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ void gen9_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ void gen10_GetPhysicalDeviceFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties* pFormatProperties);
+ VkResult anv_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult gen7_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult gen75_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult gen8_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult gen9_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult gen10_GetPhysicalDeviceImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkImageTiling tiling, VkImageUsageFlags usage, VkImageCreateFlags flags, VkImageFormatProperties* pImageFormatProperties);
+ VkResult anv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ VkResult gen7_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ VkResult gen75_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ VkResult gen8_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ VkResult gen9_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ VkResult gen10_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDevice* pDevice);
+ void anv_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyDevice(VkDevice device, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen7_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen75_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen8_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen9_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen10_EnumerateInstanceLayerProperties(uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult anv_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen7_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen75_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen8_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen9_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen10_EnumerateInstanceExtensionProperties(const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult anv_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen7_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen75_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen8_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen9_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult gen10_EnumerateDeviceLayerProperties(VkPhysicalDevice physicalDevice, uint32_t* pPropertyCount, VkLayerProperties* pProperties);
+ VkResult anv_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen7_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen75_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen8_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen9_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ VkResult gen10_EnumerateDeviceExtensionProperties(VkPhysicalDevice physicalDevice, const char* pLayerName, uint32_t* pPropertyCount, VkExtensionProperties* pProperties);
+ void anv_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ void gen7_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ void gen75_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ void gen8_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ void gen9_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ void gen10_GetDeviceQueue(VkDevice device, uint32_t queueFamilyIndex, uint32_t queueIndex, VkQueue* pQueue);
+ VkResult anv_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult gen7_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult gen75_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult gen8_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult gen9_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult gen10_QueueSubmit(VkQueue queue, uint32_t submitCount, const VkSubmitInfo* pSubmits, VkFence fence);
+ VkResult anv_QueueWaitIdle(VkQueue queue);
+ VkResult gen7_QueueWaitIdle(VkQueue queue);
+ VkResult gen75_QueueWaitIdle(VkQueue queue);
+ VkResult gen8_QueueWaitIdle(VkQueue queue);
+ VkResult gen9_QueueWaitIdle(VkQueue queue);
+ VkResult gen10_QueueWaitIdle(VkQueue queue);
+ VkResult anv_DeviceWaitIdle(VkDevice device);
+ VkResult gen7_DeviceWaitIdle(VkDevice device);
+ VkResult gen75_DeviceWaitIdle(VkDevice device);
+ VkResult gen8_DeviceWaitIdle(VkDevice device);
+ VkResult gen9_DeviceWaitIdle(VkDevice device);
+ VkResult gen10_DeviceWaitIdle(VkDevice device);
+ VkResult anv_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ VkResult gen7_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ VkResult gen75_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ VkResult gen8_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ VkResult gen9_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ VkResult gen10_AllocateMemory(VkDevice device, const VkMemoryAllocateInfo* pAllocateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMemory);
+ void anv_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ void gen7_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ void gen75_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ void gen8_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ void gen9_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ void gen10_FreeMemory(VkDevice device, VkDeviceMemory memory, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ VkResult gen7_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ VkResult gen75_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ VkResult gen8_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ VkResult gen9_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ VkResult gen10_MapMemory(VkDevice device, VkDeviceMemory memory, VkDeviceSize offset, VkDeviceSize size, VkMemoryMapFlags flags, void** ppData);
+ void anv_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ void gen7_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ void gen75_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ void gen8_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ void gen9_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ void gen10_UnmapMemory(VkDevice device, VkDeviceMemory memory);
+ VkResult anv_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen7_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen75_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen8_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen9_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen10_FlushMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult anv_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen7_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen75_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen8_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen9_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ VkResult gen10_InvalidateMappedMemoryRanges(VkDevice device, uint32_t memoryRangeCount, const VkMappedMemoryRange* pMemoryRanges);
+ void anv_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void gen7_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void gen75_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void gen8_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void gen9_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void gen10_GetDeviceMemoryCommitment(VkDevice device, VkDeviceMemory memory, VkDeviceSize* pCommittedMemoryInBytes);
+ void anv_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ void gen7_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ void gen75_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ void gen8_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ void gen9_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ void gen10_GetBufferMemoryRequirements(VkDevice device, VkBuffer buffer, VkMemoryRequirements* pMemoryRequirements);
+ VkResult anv_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen7_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen75_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen8_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen9_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen10_BindBufferMemory(VkDevice device, VkBuffer buffer, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ void anv_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ void gen7_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ void gen75_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ void gen8_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ void gen9_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ void gen10_GetImageMemoryRequirements(VkDevice device, VkImage image, VkMemoryRequirements* pMemoryRequirements);
+ VkResult anv_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen7_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen75_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen8_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen9_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ VkResult gen10_BindImageMemory(VkDevice device, VkImage image, VkDeviceMemory memory, VkDeviceSize memoryOffset);
+ void anv_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void gen7_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void gen75_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void gen8_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void gen9_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void gen10_GetImageSparseMemoryRequirements(VkDevice device, VkImage image, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements* pSparseMemoryRequirements);
+ void anv_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ void gen7_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ void gen75_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ void gen8_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ void gen9_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ void gen10_GetPhysicalDeviceSparseImageFormatProperties(VkPhysicalDevice physicalDevice, VkFormat format, VkImageType type, VkSampleCountFlagBits samples, VkImageUsageFlags usage, VkImageTiling tiling, uint32_t* pPropertyCount, VkSparseImageFormatProperties* pProperties);
+ VkResult anv_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult gen7_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult gen75_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult gen8_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult gen9_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult gen10_QueueBindSparse(VkQueue queue, uint32_t bindInfoCount, const VkBindSparseInfo* pBindInfo, VkFence fence);
+ VkResult anv_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ VkResult gen7_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ VkResult gen75_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ VkResult gen8_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ VkResult gen9_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ VkResult gen10_CreateFence(VkDevice device, const VkFenceCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFence* pFence);
+ void anv_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyFence(VkDevice device, VkFence fence, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult gen7_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult gen75_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult gen8_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult gen9_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult gen10_ResetFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences);
+ VkResult anv_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult gen7_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult gen75_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult gen8_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult gen9_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult gen10_GetFenceStatus(VkDevice device, VkFence fence);
+ VkResult anv_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult gen7_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult gen75_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult gen8_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult gen9_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult gen10_WaitForFences(VkDevice device, uint32_t fenceCount, const VkFence* pFences, VkBool32 waitAll, uint64_t timeout);
+ VkResult anv_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ VkResult gen7_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ VkResult gen75_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ VkResult gen8_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ VkResult gen9_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ VkResult gen10_CreateSemaphore(VkDevice device, const VkSemaphoreCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSemaphore* pSemaphore);
+ void anv_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroySemaphore(VkDevice device, VkSemaphore semaphore, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ VkResult gen7_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ VkResult gen75_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ VkResult gen8_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ VkResult gen9_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ VkResult gen10_CreateEvent(VkDevice device, const VkEventCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkEvent* pEvent);
+ void anv_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyEvent(VkDevice device, VkEvent event, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult gen7_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult gen75_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult gen8_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult gen9_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult gen10_GetEventStatus(VkDevice device, VkEvent event);
+ VkResult anv_SetEvent(VkDevice device, VkEvent event);
+ VkResult gen7_SetEvent(VkDevice device, VkEvent event);
+ VkResult gen75_SetEvent(VkDevice device, VkEvent event);
+ VkResult gen8_SetEvent(VkDevice device, VkEvent event);
+ VkResult gen9_SetEvent(VkDevice device, VkEvent event);
+ VkResult gen10_SetEvent(VkDevice device, VkEvent event);
+ VkResult anv_ResetEvent(VkDevice device, VkEvent event);
+ VkResult gen7_ResetEvent(VkDevice device, VkEvent event);
+ VkResult gen75_ResetEvent(VkDevice device, VkEvent event);
+ VkResult gen8_ResetEvent(VkDevice device, VkEvent event);
+ VkResult gen9_ResetEvent(VkDevice device, VkEvent event);
+ VkResult gen10_ResetEvent(VkDevice device, VkEvent event);
+ VkResult anv_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ VkResult gen7_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ VkResult gen75_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ VkResult gen8_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ VkResult gen9_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ VkResult gen10_CreateQueryPool(VkDevice device, const VkQueryPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkQueryPool* pQueryPool);
+ void anv_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyQueryPool(VkDevice device, VkQueryPool queryPool, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult gen7_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult gen75_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult gen8_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult gen9_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult gen10_GetQueryPoolResults(VkDevice device, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, size_t dataSize, void* pData, VkDeviceSize stride, VkQueryResultFlags flags);
+ VkResult anv_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ VkResult gen7_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ VkResult gen75_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ VkResult gen8_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ VkResult gen9_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ VkResult gen10_CreateBuffer(VkDevice device, const VkBufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBuffer* pBuffer);
+ void anv_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyBuffer(VkDevice device, VkBuffer buffer, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ VkResult gen7_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ VkResult gen75_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ VkResult gen8_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ VkResult gen9_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ VkResult gen10_CreateBufferView(VkDevice device, const VkBufferViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkBufferView* pView);
+ void anv_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyBufferView(VkDevice device, VkBufferView bufferView, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ VkResult gen7_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ VkResult gen75_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ VkResult gen8_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ VkResult gen9_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ VkResult gen10_CreateImage(VkDevice device, const VkImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImage* pImage);
+ void anv_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyImage(VkDevice device, VkImage image, const VkAllocationCallbacks* pAllocator);
+ void anv_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ void gen7_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ void gen75_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ void gen8_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ void gen9_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ void gen10_GetImageSubresourceLayout(VkDevice device, VkImage image, const VkImageSubresource* pSubresource, VkSubresourceLayout* pLayout);
+ VkResult anv_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ VkResult gen7_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ VkResult gen75_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ VkResult gen8_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ VkResult gen9_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ VkResult gen10_CreateImageView(VkDevice device, const VkImageViewCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkImageView* pView);
+ void anv_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyImageView(VkDevice device, VkImageView imageView, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ VkResult gen7_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ VkResult gen75_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ VkResult gen8_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ VkResult gen9_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ VkResult gen10_CreateShaderModule(VkDevice device, const VkShaderModuleCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkShaderModule* pShaderModule);
+ void anv_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyShaderModule(VkDevice device, VkShaderModule shaderModule, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ VkResult gen7_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ VkResult gen75_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ VkResult gen8_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ VkResult gen9_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ VkResult gen10_CreatePipelineCache(VkDevice device, const VkPipelineCacheCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineCache* pPipelineCache);
+ void anv_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyPipelineCache(VkDevice device, VkPipelineCache pipelineCache, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult gen7_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult gen75_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult gen8_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult gen9_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult gen10_GetPipelineCacheData(VkDevice device, VkPipelineCache pipelineCache, size_t* pDataSize, void* pData);
+ VkResult anv_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult gen7_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult gen75_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult gen8_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult gen9_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult gen10_MergePipelineCaches(VkDevice device, VkPipelineCache dstCache, uint32_t srcCacheCount, const VkPipelineCache* pSrcCaches);
+ VkResult anv_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen7_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen75_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen8_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen9_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen10_CreateGraphicsPipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkGraphicsPipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult anv_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen7_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen75_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen8_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen9_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ VkResult gen10_CreateComputePipelines(VkDevice device, VkPipelineCache pipelineCache, uint32_t createInfoCount, const VkComputePipelineCreateInfo* pCreateInfos, const VkAllocationCallbacks* pAllocator, VkPipeline* pPipelines);
+ void anv_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyPipeline(VkDevice device, VkPipeline pipeline, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ VkResult gen7_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ VkResult gen75_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ VkResult gen8_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ VkResult gen9_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ VkResult gen10_CreatePipelineLayout(VkDevice device, const VkPipelineLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkPipelineLayout* pPipelineLayout);
+ void anv_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyPipelineLayout(VkDevice device, VkPipelineLayout pipelineLayout, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ VkResult gen7_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ VkResult gen75_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ VkResult gen8_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ VkResult gen9_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ VkResult gen10_CreateSampler(VkDevice device, const VkSamplerCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSampler* pSampler);
+ void anv_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroySampler(VkDevice device, VkSampler sampler, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ VkResult gen7_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ VkResult gen75_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ VkResult gen8_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ VkResult gen9_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ VkResult gen10_CreateDescriptorSetLayout(VkDevice device, const VkDescriptorSetLayoutCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorSetLayout* pSetLayout);
+ void anv_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyDescriptorSetLayout(VkDevice device, VkDescriptorSetLayout descriptorSetLayout, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ VkResult gen7_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ VkResult gen75_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ VkResult gen8_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ VkResult gen9_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ VkResult gen10_CreateDescriptorPool(VkDevice device, const VkDescriptorPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorPool* pDescriptorPool);
+ void anv_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult gen7_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult gen75_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult gen8_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult gen9_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult gen10_ResetDescriptorPool(VkDevice device, VkDescriptorPool descriptorPool, VkDescriptorPoolResetFlags flags);
+ VkResult anv_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult gen7_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult gen75_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult gen8_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult gen9_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult gen10_AllocateDescriptorSets(VkDevice device, const VkDescriptorSetAllocateInfo* pAllocateInfo, VkDescriptorSet* pDescriptorSets);
+ VkResult anv_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ VkResult gen7_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ VkResult gen75_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ VkResult gen8_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ VkResult gen9_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ VkResult gen10_FreeDescriptorSets(VkDevice device, VkDescriptorPool descriptorPool, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets);
+ void anv_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ void gen7_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ void gen75_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ void gen8_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ void gen9_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ void gen10_UpdateDescriptorSets(VkDevice device, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites, uint32_t descriptorCopyCount, const VkCopyDescriptorSet* pDescriptorCopies);
+ VkResult anv_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ VkResult gen7_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ VkResult gen75_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ VkResult gen8_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ VkResult gen9_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ VkResult gen10_CreateFramebuffer(VkDevice device, const VkFramebufferCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkFramebuffer* pFramebuffer);
+ void anv_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyFramebuffer(VkDevice device, VkFramebuffer framebuffer, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ VkResult gen7_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ VkResult gen75_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ VkResult gen8_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ VkResult gen9_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ VkResult gen10_CreateRenderPass(VkDevice device, const VkRenderPassCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkRenderPass* pRenderPass);
+ void anv_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyRenderPass(VkDevice device, VkRenderPass renderPass, const VkAllocationCallbacks* pAllocator);
+ void anv_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ void gen7_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ void gen75_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ void gen8_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ void gen9_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ void gen10_GetRenderAreaGranularity(VkDevice device, VkRenderPass renderPass, VkExtent2D* pGranularity);
+ VkResult anv_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ VkResult gen7_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ VkResult gen75_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ VkResult gen8_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ VkResult gen9_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ VkResult gen10_CreateCommandPool(VkDevice device, const VkCommandPoolCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkCommandPool* pCommandPool);
+ void anv_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyCommandPool(VkDevice device, VkCommandPool commandPool, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult gen7_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult gen75_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult gen8_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult gen9_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult gen10_ResetCommandPool(VkDevice device, VkCommandPool commandPool, VkCommandPoolResetFlags flags);
+ VkResult anv_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ VkResult gen7_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ VkResult gen75_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ VkResult gen8_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ VkResult gen9_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ VkResult gen10_AllocateCommandBuffers(VkDevice device, const VkCommandBufferAllocateInfo* pAllocateInfo, VkCommandBuffer* pCommandBuffers);
+ void anv_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen7_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen75_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen8_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen9_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen10_FreeCommandBuffers(VkDevice device, VkCommandPool commandPool, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ VkResult anv_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult gen7_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult gen75_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult gen8_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult gen9_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult gen10_BeginCommandBuffer(VkCommandBuffer commandBuffer, const VkCommandBufferBeginInfo* pBeginInfo);
+ VkResult anv_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult gen7_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult gen75_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult gen8_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult gen9_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult gen10_EndCommandBuffer(VkCommandBuffer commandBuffer);
+ VkResult anv_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ VkResult gen7_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ VkResult gen75_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ VkResult gen8_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ VkResult gen9_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ VkResult gen10_ResetCommandBuffer(VkCommandBuffer commandBuffer, VkCommandBufferResetFlags flags);
+ void anv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void gen7_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void gen75_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void gen8_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void gen9_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void gen10_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipeline pipeline);
+ void anv_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void gen7_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void gen75_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void gen8_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void gen9_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void gen10_CmdSetViewport(VkCommandBuffer commandBuffer, uint32_t firstViewport, uint32_t viewportCount, const VkViewport* pViewports);
+ void anv_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void gen7_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void gen75_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void gen8_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void gen9_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void gen10_CmdSetScissor(VkCommandBuffer commandBuffer, uint32_t firstScissor, uint32_t scissorCount, const VkRect2D* pScissors);
+ void anv_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void gen7_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void gen75_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void gen8_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void gen9_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void gen10_CmdSetLineWidth(VkCommandBuffer commandBuffer, float lineWidth);
+ void anv_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void gen7_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void gen75_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void gen8_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void gen9_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void gen10_CmdSetDepthBias(VkCommandBuffer commandBuffer, float depthBiasConstantFactor, float depthBiasClamp, float depthBiasSlopeFactor);
+ void anv_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void gen7_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void gen75_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void gen8_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void gen9_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void gen10_CmdSetBlendConstants(VkCommandBuffer commandBuffer, const float blendConstants[4]);
+ void anv_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void gen7_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void gen75_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void gen8_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void gen9_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void gen10_CmdSetDepthBounds(VkCommandBuffer commandBuffer, float minDepthBounds, float maxDepthBounds);
+ void anv_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void gen7_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void gen75_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void gen8_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void gen9_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void gen10_CmdSetStencilCompareMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t compareMask);
+ void anv_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void gen7_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void gen75_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void gen8_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void gen9_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void gen10_CmdSetStencilWriteMask(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t writeMask);
+ void anv_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void gen7_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void gen75_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void gen8_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void gen9_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void gen10_CmdSetStencilReference(VkCommandBuffer commandBuffer, VkStencilFaceFlags faceMask, uint32_t reference);
+ void anv_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void gen7_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void gen75_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void gen8_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void gen9_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void gen10_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t firstSet, uint32_t descriptorSetCount, const VkDescriptorSet* pDescriptorSets, uint32_t dynamicOffsetCount, const uint32_t* pDynamicOffsets);
+ void anv_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void gen7_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void gen75_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void gen8_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void gen9_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void gen10_CmdBindIndexBuffer(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, VkIndexType indexType);
+ void anv_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void gen7_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void gen75_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void gen8_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void gen9_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void gen10_CmdBindVertexBuffers(VkCommandBuffer commandBuffer, uint32_t firstBinding, uint32_t bindingCount, const VkBuffer* pBuffers, const VkDeviceSize* pOffsets);
+ void anv_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void gen7_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void gen75_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void gen8_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void gen9_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void gen10_CmdDraw(VkCommandBuffer commandBuffer, uint32_t vertexCount, uint32_t instanceCount, uint32_t firstVertex, uint32_t firstInstance);
+ void anv_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void gen7_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void gen75_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void gen8_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void gen9_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void gen10_CmdDrawIndexed(VkCommandBuffer commandBuffer, uint32_t indexCount, uint32_t instanceCount, uint32_t firstIndex, int32_t vertexOffset, uint32_t firstInstance);
+ void anv_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen7_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen75_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen8_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen9_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen10_CmdDrawIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void anv_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen7_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen75_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen8_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen9_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void gen10_CmdDrawIndexedIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset, uint32_t drawCount, uint32_t stride);
+ void anv_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void gen7_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void gen75_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void gen8_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void gen9_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void gen10_CmdDispatch(VkCommandBuffer commandBuffer, uint32_t groupCountX, uint32_t groupCountY, uint32_t groupCountZ);
+ void anv_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void gen7_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void gen75_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void gen8_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void gen9_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void gen10_CmdDispatchIndirect(VkCommandBuffer commandBuffer, VkBuffer buffer, VkDeviceSize offset);
+ void anv_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void gen7_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void gen75_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void gen8_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void gen9_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void gen10_CmdCopyBuffer(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferCopy* pRegions);
+ void anv_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void gen7_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void gen75_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void gen8_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void gen9_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void gen10_CmdCopyImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageCopy* pRegions);
+ void anv_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void gen7_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void gen75_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void gen8_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void gen9_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void gen10_CmdBlitImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageBlit* pRegions, VkFilter filter);
+ void anv_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen7_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen75_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen8_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen9_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen10_CmdCopyBufferToImage(VkCommandBuffer commandBuffer, VkBuffer srcBuffer, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void anv_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen7_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen75_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen8_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen9_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void gen10_CmdCopyImageToBuffer(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkBuffer dstBuffer, uint32_t regionCount, const VkBufferImageCopy* pRegions);
+ void anv_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void gen7_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void gen75_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void gen8_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void gen9_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void gen10_CmdUpdateBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize dataSize, const void* pData);
+ void anv_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void gen7_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void gen75_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void gen8_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void gen9_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void gen10_CmdFillBuffer(VkCommandBuffer commandBuffer, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize size, uint32_t data);
+ void anv_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen7_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen75_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen8_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen9_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen10_CmdClearColorImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearColorValue* pColor, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void anv_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen7_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen75_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen8_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen9_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void gen10_CmdClearDepthStencilImage(VkCommandBuffer commandBuffer, VkImage image, VkImageLayout imageLayout, const VkClearDepthStencilValue* pDepthStencil, uint32_t rangeCount, const VkImageSubresourceRange* pRanges);
+ void anv_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void gen7_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void gen75_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void gen8_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void gen9_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void gen10_CmdClearAttachments(VkCommandBuffer commandBuffer, uint32_t attachmentCount, const VkClearAttachment* pAttachments, uint32_t rectCount, const VkClearRect* pRects);
+ void anv_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void gen7_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void gen75_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void gen8_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void gen9_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void gen10_CmdResolveImage(VkCommandBuffer commandBuffer, VkImage srcImage, VkImageLayout srcImageLayout, VkImage dstImage, VkImageLayout dstImageLayout, uint32_t regionCount, const VkImageResolve* pRegions);
+ void anv_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen7_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen75_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen8_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen9_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen10_CmdSetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void anv_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen7_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen75_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen8_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen9_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void gen10_CmdResetEvent(VkCommandBuffer commandBuffer, VkEvent event, VkPipelineStageFlags stageMask);
+ void anv_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen7_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen75_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen8_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen9_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen10_CmdWaitEvents(VkCommandBuffer commandBuffer, uint32_t eventCount, const VkEvent* pEvents, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void anv_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen7_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen75_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen8_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen9_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void gen10_CmdPipelineBarrier(VkCommandBuffer commandBuffer, VkPipelineStageFlags srcStageMask, VkPipelineStageFlags dstStageMask, VkDependencyFlags dependencyFlags, uint32_t memoryBarrierCount, const VkMemoryBarrier* pMemoryBarriers, uint32_t bufferMemoryBarrierCount, const VkBufferMemoryBarrier* pBufferMemoryBarriers, uint32_t imageMemoryBarrierCount, const VkImageMemoryBarrier* pImageMemoryBarriers);
+ void anv_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void gen7_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void gen75_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void gen8_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void gen9_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void gen10_CmdBeginQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query, VkQueryControlFlags flags);
+ void anv_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void gen7_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void gen75_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void gen8_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void gen9_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void gen10_CmdEndQuery(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t query);
+ void anv_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void gen7_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void gen75_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void gen8_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void gen9_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void gen10_CmdResetQueryPool(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount);
+ void anv_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void gen7_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void gen75_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void gen8_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void gen9_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void gen10_CmdWriteTimestamp(VkCommandBuffer commandBuffer, VkPipelineStageFlagBits pipelineStage, VkQueryPool queryPool, uint32_t query);
+ void anv_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void gen7_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void gen75_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void gen8_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void gen9_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void gen10_CmdCopyQueryPoolResults(VkCommandBuffer commandBuffer, VkQueryPool queryPool, uint32_t firstQuery, uint32_t queryCount, VkBuffer dstBuffer, VkDeviceSize dstOffset, VkDeviceSize stride, VkQueryResultFlags flags);
+ void anv_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void gen7_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void gen75_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void gen8_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void gen9_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void gen10_CmdPushConstants(VkCommandBuffer commandBuffer, VkPipelineLayout layout, VkShaderStageFlags stageFlags, uint32_t offset, uint32_t size, const void* pValues);
+ void anv_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void gen7_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void gen75_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void gen8_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void gen9_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void gen10_CmdBeginRenderPass(VkCommandBuffer commandBuffer, const VkRenderPassBeginInfo* pRenderPassBegin, VkSubpassContents contents);
+ void anv_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void gen7_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void gen75_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void gen8_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void gen9_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void gen10_CmdNextSubpass(VkCommandBuffer commandBuffer, VkSubpassContents contents);
+ void anv_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void gen7_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void gen75_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void gen8_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void gen9_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void gen10_CmdEndRenderPass(VkCommandBuffer commandBuffer);
+ void anv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen7_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen75_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen8_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen9_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void gen10_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCount, const VkCommandBuffer* pCommandBuffers);
+ void anv_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroySurfaceKHR(VkInstance instance, VkSurfaceKHR surface, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult gen7_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult gen75_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult gen8_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult gen9_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult gen10_GetPhysicalDeviceSurfaceSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, VkSurfaceKHR surface, VkBool32* pSupported);
+ VkResult anv_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult gen7_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult gen75_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult gen8_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult gen9_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult gen10_GetPhysicalDeviceSurfaceCapabilitiesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, VkSurfaceCapabilitiesKHR* pSurfaceCapabilities);
+ VkResult anv_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult gen7_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult gen75_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult gen8_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult gen9_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult gen10_GetPhysicalDeviceSurfaceFormatsKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pSurfaceFormatCount, VkSurfaceFormatKHR* pSurfaceFormats);
+ VkResult anv_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult gen7_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult gen75_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult gen8_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult gen9_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult gen10_GetPhysicalDeviceSurfacePresentModesKHR(VkPhysicalDevice physicalDevice, VkSurfaceKHR surface, uint32_t* pPresentModeCount, VkPresentModeKHR* pPresentModes);
+ VkResult anv_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ VkResult gen7_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ VkResult gen75_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ VkResult gen8_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ VkResult gen9_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ VkResult gen10_CreateSwapchainKHR(VkDevice device, const VkSwapchainCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSwapchainKHR* pSwapchain);
+ void anv_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroySwapchainKHR(VkDevice device, VkSwapchainKHR swapchain, const VkAllocationCallbacks* pAllocator);
+ VkResult anv_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult gen7_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult gen75_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult gen8_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult gen9_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult gen10_GetSwapchainImagesKHR(VkDevice device, VkSwapchainKHR swapchain, uint32_t* pSwapchainImageCount, VkImage* pSwapchainImages);
+ VkResult anv_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult gen7_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult gen75_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult gen8_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult gen9_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult gen10_AcquireNextImageKHR(VkDevice device, VkSwapchainKHR swapchain, uint64_t timeout, VkSemaphore semaphore, VkFence fence, uint32_t* pImageIndex);
+ VkResult anv_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+ VkResult gen7_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+ VkResult gen75_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+ VkResult gen8_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+ VkResult gen9_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+ VkResult gen10_QueuePresentKHR(VkQueue queue, const VkPresentInfoKHR* pPresentInfo);
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkResult anv_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen7_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen75_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen8_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen9_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen10_CreateWaylandSurfaceKHR(VkInstance instance, const VkWaylandSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+ VkBool32 anv_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+ VkBool32 gen7_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+ VkBool32 gen75_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+ VkBool32 gen8_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+ VkBool32 gen9_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+ VkBool32 gen10_GetPhysicalDeviceWaylandPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, struct wl_display* display);
+#endif // VK_USE_PLATFORM_WAYLAND_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkResult anv_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen7_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen75_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen8_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen9_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen10_CreateXlibSurfaceKHR(VkInstance instance, const VkXlibSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+ VkBool32 anv_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+ VkBool32 gen7_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+ VkBool32 gen75_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+ VkBool32 gen8_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+ VkBool32 gen9_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+ VkBool32 gen10_GetPhysicalDeviceXlibPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, Display* dpy, VisualID visualID);
+#endif // VK_USE_PLATFORM_XLIB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkResult anv_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen7_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen75_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen8_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen9_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+ VkResult gen10_CreateXcbSurfaceKHR(VkInstance instance, const VkXcbSurfaceCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+#endif // VK_USE_PLATFORM_XCB_KHR
+#ifdef VK_USE_PLATFORM_XCB_KHR
+ VkBool32 anv_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+ VkBool32 gen7_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+ VkBool32 gen75_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+ VkBool32 gen8_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+ VkBool32 gen9_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+ VkBool32 gen10_GetPhysicalDeviceXcbPresentationSupportKHR(VkPhysicalDevice physicalDevice, uint32_t queueFamilyIndex, xcb_connection_t* connection, xcb_visualid_t visual_id);
+#endif // VK_USE_PLATFORM_XCB_KHR
+ VkResult anv_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ VkResult gen7_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ VkResult gen75_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ VkResult gen8_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ VkResult gen9_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ VkResult gen10_CreateDebugReportCallbackEXT(VkInstance instance, const VkDebugReportCallbackCreateInfoEXT* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDebugReportCallbackEXT* pCallback);
+ void anv_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyDebugReportCallbackEXT(VkInstance instance, VkDebugReportCallbackEXT callback, const VkAllocationCallbacks* pAllocator);
+ void anv_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void gen7_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void gen75_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void gen8_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void gen9_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void gen10_DebugReportMessageEXT(VkInstance instance, VkDebugReportFlagsEXT flags, VkDebugReportObjectTypeEXT objectType, uint64_t object, size_t location, int32_t messageCode, const char* pLayerPrefix, const char* pMessage);
+ void anv_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void gen7_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void gen75_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void gen8_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void gen9_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void gen10_GetPhysicalDeviceFeatures2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceFeatures2KHR* pFeatures);
+ void anv_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void gen7_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void gen75_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void gen8_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void gen9_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void gen10_GetPhysicalDeviceProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceProperties2KHR* pProperties);
+ void anv_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ void gen7_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ void gen75_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ void gen8_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ void gen9_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ void gen10_GetPhysicalDeviceFormatProperties2KHR(VkPhysicalDevice physicalDevice, VkFormat format, VkFormatProperties2KHR* pFormatProperties);
+ VkResult anv_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ VkResult gen7_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ VkResult gen75_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ VkResult gen8_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ VkResult gen9_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ VkResult gen10_GetPhysicalDeviceImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceImageFormatInfo2KHR* pImageFormatInfo, VkImageFormatProperties2KHR* pImageFormatProperties);
+ void anv_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void gen7_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void gen75_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void gen8_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void gen9_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void gen10_GetPhysicalDeviceQueueFamilyProperties2KHR(VkPhysicalDevice physicalDevice, uint32_t* pQueueFamilyPropertyCount, VkQueueFamilyProperties2KHR* pQueueFamilyProperties);
+ void anv_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void gen7_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void gen75_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void gen8_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void gen9_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void gen10_GetPhysicalDeviceMemoryProperties2KHR(VkPhysicalDevice physicalDevice, VkPhysicalDeviceMemoryProperties2KHR* pMemoryProperties);
+ void anv_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void gen7_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void gen75_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void gen8_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void gen9_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void gen10_GetPhysicalDeviceSparseImageFormatProperties2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSparseImageFormatInfo2KHR* pFormatInfo, uint32_t* pPropertyCount, VkSparseImageFormatProperties2KHR* pProperties);
+ void anv_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void gen7_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void gen75_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void gen8_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void gen9_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void gen10_CmdPushDescriptorSetKHR(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipelineBindPoint, VkPipelineLayout layout, uint32_t set, uint32_t descriptorWriteCount, const VkWriteDescriptorSet* pDescriptorWrites);
+ void anv_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void gen7_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void gen75_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void gen8_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void gen9_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void gen10_TrimCommandPoolKHR(VkDevice device, VkCommandPool commandPool, VkCommandPoolTrimFlagsKHR flags);
+ void anv_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ void gen7_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ void gen75_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ void gen8_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ void gen9_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ void gen10_GetPhysicalDeviceExternalBufferPropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalBufferInfoKHR* pExternalBufferInfo, VkExternalBufferPropertiesKHR* pExternalBufferProperties);
+ VkResult anv_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen7_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen75_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen8_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen9_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen10_GetMemoryFdKHR(VkDevice device, const VkMemoryGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult anv_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ VkResult gen7_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ VkResult gen75_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ VkResult gen8_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ VkResult gen9_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ VkResult gen10_GetMemoryFdPropertiesKHR(VkDevice device, VkExternalMemoryHandleTypeFlagBitsKHR handleType, int fd, VkMemoryFdPropertiesKHR* pMemoryFdProperties);
+ void anv_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ void gen7_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ void gen75_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ void gen8_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ void gen9_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ void gen10_GetPhysicalDeviceExternalSemaphorePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalSemaphoreInfoKHR* pExternalSemaphoreInfo, VkExternalSemaphorePropertiesKHR* pExternalSemaphoreProperties);
+ VkResult anv_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen7_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen75_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen8_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen9_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen10_GetSemaphoreFdKHR(VkDevice device, const VkSemaphoreGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult anv_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ VkResult gen7_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ VkResult gen75_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ VkResult gen8_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ VkResult gen9_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ VkResult gen10_ImportSemaphoreFdKHR(VkDevice device, const VkImportSemaphoreFdInfoKHR* pImportSemaphoreFdInfo);
+ void anv_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ void gen7_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ void gen75_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ void gen8_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ void gen9_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ void gen10_GetPhysicalDeviceExternalFencePropertiesKHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceExternalFenceInfoKHR* pExternalFenceInfo, VkExternalFencePropertiesKHR* pExternalFenceProperties);
+ VkResult anv_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen7_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen75_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen8_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen9_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult gen10_GetFenceFdKHR(VkDevice device, const VkFenceGetFdInfoKHR* pGetFdInfo, int* pFd);
+ VkResult anv_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult gen7_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult gen75_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult gen8_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult gen9_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult gen10_ImportFenceFdKHR(VkDevice device, const VkImportFenceFdInfoKHR* pImportFenceFdInfo);
+ VkResult anv_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult gen7_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult gen75_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult gen8_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult gen9_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult gen10_BindBufferMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindBufferMemoryInfoKHR* pBindInfos);
+ VkResult anv_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult gen7_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult gen75_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult gen8_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult gen9_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult gen10_BindImageMemory2KHR(VkDevice device, uint32_t bindInfoCount, const VkBindImageMemoryInfoKHR* pBindInfos);
+ VkResult anv_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ VkResult gen7_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ VkResult gen75_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ VkResult gen8_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ VkResult gen9_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ VkResult gen10_CreateDescriptorUpdateTemplateKHR(VkDevice device, const VkDescriptorUpdateTemplateCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDescriptorUpdateTemplateKHR* pDescriptorUpdateTemplate);
+ void anv_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroyDescriptorUpdateTemplateKHR(VkDevice device, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const VkAllocationCallbacks* pAllocator);
+ void anv_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void gen7_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void gen75_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void gen8_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void gen9_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void gen10_UpdateDescriptorSetWithTemplateKHR(VkDevice device, VkDescriptorSet descriptorSet, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, const void* pData);
+ void anv_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ void gen7_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ void gen75_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ void gen8_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ void gen9_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ void gen10_CmdPushDescriptorSetWithTemplateKHR(VkCommandBuffer commandBuffer, VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate, VkPipelineLayout layout, uint32_t set, const void* pData);
+ VkResult anv_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult gen7_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult gen75_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult gen8_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult gen9_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult gen10_GetPhysicalDeviceSurfaceCapabilities2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, VkSurfaceCapabilities2KHR* pSurfaceCapabilities);
+ VkResult anv_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ VkResult gen7_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ VkResult gen75_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ VkResult gen8_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ VkResult gen9_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ VkResult gen10_GetPhysicalDeviceSurfaceFormats2KHR(VkPhysicalDevice physicalDevice, const VkPhysicalDeviceSurfaceInfo2KHR* pSurfaceInfo, uint32_t* pSurfaceFormatCount, VkSurfaceFormat2KHR* pSurfaceFormats);
+ void anv_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen7_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen75_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen8_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen9_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen10_GetBufferMemoryRequirements2KHR(VkDevice device, const VkBufferMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void anv_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen7_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen75_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen8_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen9_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void gen10_GetImageMemoryRequirements2KHR(VkDevice device, const VkImageMemoryRequirementsInfo2KHR* pInfo, VkMemoryRequirements2KHR* pMemoryRequirements);
+ void anv_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ void gen7_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ void gen75_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ void gen8_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ void gen9_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ void gen10_GetImageSparseMemoryRequirements2KHR(VkDevice device, const VkImageSparseMemoryRequirementsInfo2KHR* pInfo, uint32_t* pSparseMemoryRequirementCount, VkSparseImageMemoryRequirements2KHR* pSparseMemoryRequirements);
+ VkResult anv_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ VkResult gen7_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ VkResult gen75_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ VkResult gen8_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ VkResult gen9_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ VkResult gen10_CreateSamplerYcbcrConversionKHR(VkDevice device, const VkSamplerYcbcrConversionCreateInfoKHR* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkSamplerYcbcrConversionKHR* pYcbcrConversion);
+ void anv_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+ void gen7_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+ void gen75_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+ void gen8_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+ void gen9_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+ void gen10_DestroySamplerYcbcrConversionKHR(VkDevice device, VkSamplerYcbcrConversionKHR ycbcrConversion, const VkAllocationCallbacks* pAllocator);
+#ifdef ANDROID
+ VkResult anv_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+ VkResult gen7_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+ VkResult gen75_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+ VkResult gen8_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+ VkResult gen9_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+ VkResult gen10_GetSwapchainGrallocUsageANDROID(VkDevice device, VkFormat format, VkImageUsageFlags imageUsage, int* grallocUsage);
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult anv_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+ VkResult gen7_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+ VkResult gen75_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+ VkResult gen8_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+ VkResult gen9_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+ VkResult gen10_AcquireImageANDROID(VkDevice device, VkImage image, int nativeFenceFd, VkSemaphore semaphore, VkFence fence);
+#endif // ANDROID
+#ifdef ANDROID
+ VkResult anv_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+ VkResult gen7_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+ VkResult gen75_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+ VkResult gen8_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+ VkResult gen9_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+ VkResult gen10_QueueSignalReleaseImageANDROID(VkQueue queue, uint32_t waitSemaphoreCount, const VkSemaphore* pWaitSemaphores, VkImage image, int* pNativeFenceFd);
+#endif // ANDROID
+ VkResult anv_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
+ VkResult gen7_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
+ VkResult gen75_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
+ VkResult gen8_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
+ VkResult gen9_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
+ VkResult gen10_CreateDmaBufImageINTEL(VkDevice device, const VkDmaBufImageCreateInfo* pCreateInfo, const VkAllocationCallbacks* pAllocator, VkDeviceMemory* pMem, VkImage* pImage);
diff --git a/prebuilt-intermediates/vulkan/anv_extensions.c b/prebuilt-intermediates/vulkan/anv_extensions.c
new file mode 100644
index 0000000..4c3f386
--- /dev/null
+++ b/prebuilt-intermediates/vulkan/anv_extensions.c
@@ -0,0 +1,158 @@
+/*
+ * Copyright 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "anv_private.h"
+
+#include "vk_util.h"
+
+/* Convert the VK_USE_PLATFORM_* defines to booleans */
+#ifdef VK_USE_PLATFORM_ANDROID_KHR
+# undef VK_USE_PLATFORM_ANDROID_KHR
+# define VK_USE_PLATFORM_ANDROID_KHR true
+#else
+# define VK_USE_PLATFORM_ANDROID_KHR false
+#endif
+#ifdef VK_USE_PLATFORM_WAYLAND_KHR
+# undef VK_USE_PLATFORM_WAYLAND_KHR
+# define VK_USE_PLATFORM_WAYLAND_KHR true
+#else
+# define VK_USE_PLATFORM_WAYLAND_KHR false
+#endif
+#ifdef VK_USE_PLATFORM_XCB_KHR
+# undef VK_USE_PLATFORM_XCB_KHR
+# define VK_USE_PLATFORM_XCB_KHR true
+#else
+# define VK_USE_PLATFORM_XCB_KHR false
+#endif
+#ifdef VK_USE_PLATFORM_XLIB_KHR
+# undef VK_USE_PLATFORM_XLIB_KHR
+# define VK_USE_PLATFORM_XLIB_KHR true
+#else
+# define VK_USE_PLATFORM_XLIB_KHR false
+#endif
+
+/* And ANDROID too */
+#ifdef ANDROID
+# undef ANDROID
+# define ANDROID true
+#else
+# define ANDROID false
+#endif
+
+#define ANV_HAS_SURFACE (VK_USE_PLATFORM_WAYLAND_KHR || VK_USE_PLATFORM_XCB_KHR || VK_USE_PLATFORM_XLIB_KHR)
+
+const VkExtensionProperties anv_instance_extensions[ANV_INSTANCE_EXTENSION_COUNT] = {
+ {"VK_KHR_external_fence_capabilities", 1},
+ {"VK_KHR_external_memory_capabilities", 1},
+ {"VK_KHR_external_semaphore_capabilities", 1},
+ {"VK_KHR_get_physical_device_properties2", 1},
+ {"VK_KHR_get_surface_capabilities2", 1},
+ {"VK_KHR_surface", 25},
+ {"VK_KHR_wayland_surface", 6},
+ {"VK_KHR_xcb_surface", 6},
+ {"VK_KHR_xlib_surface", 6},
+ {"VK_EXT_debug_report", 8},
+};
+
+const struct anv_instance_extension_table anv_instance_extensions_supported = {
+ .KHR_external_fence_capabilities = true,
+ .KHR_external_memory_capabilities = true,
+ .KHR_external_semaphore_capabilities = true,
+ .KHR_get_physical_device_properties2 = true,
+ .KHR_get_surface_capabilities2 = ANV_HAS_SURFACE,
+ .KHR_surface = ANV_HAS_SURFACE,
+ .KHR_wayland_surface = VK_USE_PLATFORM_WAYLAND_KHR,
+ .KHR_xcb_surface = VK_USE_PLATFORM_XCB_KHR,
+ .KHR_xlib_surface = VK_USE_PLATFORM_XLIB_KHR,
+ .EXT_debug_report = true,
+};
+
+uint32_t
+anv_physical_device_api_version(struct anv_physical_device *dev)
+{
+ return VK_MAKE_VERSION(1, 0, 57);
+}
+
+const VkExtensionProperties anv_device_extensions[ANV_DEVICE_EXTENSION_COUNT] = {
+ {"VK_ANDROID_native_buffer", 5},
+ {"VK_KHR_16bit_storage", 1},
+ {"VK_KHR_bind_memory2", 1},
+ {"VK_KHR_dedicated_allocation", 1},
+ {"VK_KHR_descriptor_update_template", 1},
+ {"VK_KHR_external_fence", 1},
+ {"VK_KHR_external_fence_fd", 1},
+ {"VK_KHR_external_memory", 1},
+ {"VK_KHR_external_memory_fd", 1},
+ {"VK_KHR_external_semaphore", 1},
+ {"VK_KHR_external_semaphore_fd", 1},
+ {"VK_KHR_get_memory_requirements2", 1},
+ {"VK_KHR_image_format_list", 1},
+ {"VK_KHR_incremental_present", 1},
+ {"VK_KHR_maintenance1", 1},
+ {"VK_KHR_maintenance2", 1},
+ {"VK_KHR_push_descriptor", 1},
+ {"VK_KHR_relaxed_block_layout", 1},
+ {"VK_KHR_sampler_mirror_clamp_to_edge", 1},
+ {"VK_KHR_sampler_ycbcr_conversion", 1},
+ {"VK_KHR_shader_draw_parameters", 1},
+ {"VK_KHR_storage_buffer_storage_class", 1},
+ {"VK_KHR_swapchain", 68},
+ {"VK_KHR_variable_pointers", 1},
+ {"VK_KHX_multiview", 1},
+ {"VK_EXT_external_memory_dma_buf", 1},
+};
+
+void
+anv_physical_device_get_supported_extensions(const struct anv_physical_device *device,
+ struct anv_device_extension_table *extensions)
+{
+ *extensions = (struct anv_device_extension_table) {
+ .ANDROID_native_buffer = ANDROID,
+ .KHR_16bit_storage = false,
+ .KHR_bind_memory2 = true,
+ .KHR_dedicated_allocation = true,
+ .KHR_descriptor_update_template = true,
+ .KHR_external_fence = device->has_syncobj_wait,
+ .KHR_external_fence_fd = device->has_syncobj_wait,
+ .KHR_external_memory = true,
+ .KHR_external_memory_fd = true,
+ .KHR_external_semaphore = true,
+ .KHR_external_semaphore_fd = true,
+ .KHR_get_memory_requirements2 = true,
+ .KHR_image_format_list = true,
+ .KHR_incremental_present = true,
+ .KHR_maintenance1 = true,
+ .KHR_maintenance2 = true,
+ .KHR_push_descriptor = true,
+ .KHR_relaxed_block_layout = true,
+ .KHR_sampler_mirror_clamp_to_edge = true,
+ .KHR_sampler_ycbcr_conversion = true,
+ .KHR_shader_draw_parameters = true,
+ .KHR_storage_buffer_storage_class = true,
+ .KHR_swapchain = ANV_HAS_SURFACE,
+ .KHR_variable_pointers = true,
+ .KHX_multiview = false,
+ .EXT_external_memory_dma_buf = true,
+ };
+}
diff --git a/prebuilt-intermediates/vulkan/anv_extensions.h b/prebuilt-intermediates/vulkan/anv_extensions.h
new file mode 100644
index 0000000..f10117e
--- /dev/null
+++ b/prebuilt-intermediates/vulkan/anv_extensions.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#ifndef ANV_EXTENSIONS_H
+#define ANV_EXTENSIONS_H
+
+#include "stdbool.h"
+
+#define ANV_INSTANCE_EXTENSION_COUNT 10
+
+extern const VkExtensionProperties anv_instance_extensions[];
+
+struct anv_instance_extension_table {
+ union {
+ bool extensions[ANV_INSTANCE_EXTENSION_COUNT];
+ struct {
+ bool KHR_external_fence_capabilities;
+ bool KHR_external_memory_capabilities;
+ bool KHR_external_semaphore_capabilities;
+ bool KHR_get_physical_device_properties2;
+ bool KHR_get_surface_capabilities2;
+ bool KHR_surface;
+ bool KHR_wayland_surface;
+ bool KHR_xcb_surface;
+ bool KHR_xlib_surface;
+ bool EXT_debug_report;
+ };
+ };
+};
+
+extern const struct anv_instance_extension_table anv_instance_extensions_supported;
+
+
+#define ANV_DEVICE_EXTENSION_COUNT 26
+
+extern const VkExtensionProperties anv_device_extensions[];
+
+struct anv_device_extension_table {
+ union {
+ bool extensions[ANV_DEVICE_EXTENSION_COUNT];
+ struct {
+ bool ANDROID_native_buffer;
+ bool KHR_16bit_storage;
+ bool KHR_bind_memory2;
+ bool KHR_dedicated_allocation;
+ bool KHR_descriptor_update_template;
+ bool KHR_external_fence;
+ bool KHR_external_fence_fd;
+ bool KHR_external_memory;
+ bool KHR_external_memory_fd;
+ bool KHR_external_semaphore;
+ bool KHR_external_semaphore_fd;
+ bool KHR_get_memory_requirements2;
+ bool KHR_image_format_list;
+ bool KHR_incremental_present;
+ bool KHR_maintenance1;
+ bool KHR_maintenance2;
+ bool KHR_push_descriptor;
+ bool KHR_relaxed_block_layout;
+ bool KHR_sampler_mirror_clamp_to_edge;
+ bool KHR_sampler_ycbcr_conversion;
+ bool KHR_shader_draw_parameters;
+ bool KHR_storage_buffer_storage_class;
+ bool KHR_swapchain;
+ bool KHR_variable_pointers;
+ bool KHX_multiview;
+ bool EXT_external_memory_dma_buf;
+ };
+ };
+};
+
+struct anv_physical_device;
+
+void
+anv_physical_device_get_supported_extensions(const struct anv_physical_device *device,
+ struct anv_device_extension_table *extensions);
+
+#endif /* ANV_EXTENSIONS_H */
diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index 4ef7f17..3270f7f 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -20,6 +20,8 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
+ifeq ($(MESA_ENABLE_LLVM),true)
+
# ---------------------------------------
# Build libmesa_amd_common
# ---------------------------------------
@@ -73,3 +75,5 @@
include $(MESA_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)
+
+endif # MESA_ENABLE_LLVM == true
diff --git a/src/broadcom/Android.genxml.mk b/src/broadcom/Android.genxml.mk
index 313de63..77b83ed 100644
--- a/src/broadcom/Android.genxml.mk
+++ b/src/broadcom/Android.genxml.mk
@@ -55,6 +55,11 @@
$(intermediates)/broadcom/cle/v3d_packet_v33_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v33.xml $(LOCAL_PATH)/cle/gen_pack_header.py
$(call header-gen)
+$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/cle/gen_pack_header.py
+$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: PRIVATE_XML := $(LOCAL_PATH)/cle/v3d_packet_v41.xml
+$(intermediates)/broadcom/cle/v3d_packet_v41_pack.h: $(LOCAL_PATH)/cle/v3d_packet_v41.xml $(LOCAL_PATH)/cle/gen_pack_header.py
+ $(call header-gen)
+
$(intermediates)/broadcom/cle/v3d_xml.h: $(addprefix $(MESA_TOP)/src/broadcom/,$(BROADCOM_GENXML_XML_FILES)) $(MESA_TOP)/src/intel/genxml/gen_zipped_file.py
@mkdir -p $(dir $@)
@echo "Gen Header: $(PRIVATE_MODULE) <= $(notdir $(@))"
diff --git a/src/compiler/Android.glsl.gen.mk b/src/compiler/Android.glsl.gen.mk
index cdd786a..cb716fa 100644
--- a/src/compiler/Android.glsl.gen.mk
+++ b/src/compiler/Android.glsl.gen.mk
@@ -28,6 +28,7 @@
endif
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_SRC_FILES := $(LOCAL_SRC_FILES)
@@ -92,14 +93,11 @@
$(LOCAL_PATH)/glsl/ir.h: $(intermediates)/glsl/ir_expression_operation.h
-$(intermediates)/glsl/ir_expression_operation.h: $(LOCAL_PATH)/glsl/ir_expression_operation.py
- @mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $< enum > $@
+$(intermediates)/glsl/ir_expression_operation.h: $(prebuilt_intermediates)/glsl/ir_expression_operation.h
+ cp -a $< $@
-$(intermediates)/glsl/ir_expression_operation_constant.h: $(LOCAL_PATH)/glsl/ir_expression_operation.py
- @mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $< constant > $@
+$(intermediates)/glsl/ir_expression_operation_constant.h: $(prebuilt_intermediates)/glsl/ir_expression_operation_constant.h
+ cp -a $< $@
-$(intermediates)/glsl/ir_expression_operation_strings.h: $(LOCAL_PATH)/glsl/ir_expression_operation.py
- @mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $< strings > $@
+$(intermediates)/glsl/ir_expression_operation_strings.h: $(prebuilt_intermediates)/glsl/ir_expression_operation_strings.h
+ cp -a $< $@
diff --git a/src/compiler/Android.nir.gen.mk b/src/compiler/Android.nir.gen.mk
index aaa2712..4e556e2 100644
--- a/src/compiler/Android.nir.gen.mk
+++ b/src/compiler/Android.nir.gen.mk
@@ -28,6 +28,7 @@
endif
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_SRC_FILES := $(LOCAL_SRC_FILES)
@@ -48,58 +49,32 @@
nir/nir_opcodes.h \
nir/nir_builder_opcodes.h)
-nir_builder_opcodes_gen := $(LOCAL_PATH)/nir/nir_builder_opcodes_h.py
-nir_builder_opcodes_deps := \
- $(LOCAL_PATH)/nir/nir_opcodes.py \
- $(LOCAL_PATH)/nir/nir_builder_opcodes_h.py
-
-$(intermediates)/nir/nir_builder_opcodes.h: $(nir_builder_opcodes_deps)
+$(intermediates)/nir/nir_builder_opcodes.h: $(prebuilt_intermediates)/nir/nir_builder_opcodes.h
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(nir_builder_opcodes_gen) $< > $@
+ @cp -f $< $@
-nir_constant_expressions_gen := $(LOCAL_PATH)/nir/nir_constant_expressions.py
-nir_constant_expressions_deps := \
- $(LOCAL_PATH)/nir/nir_opcodes.py \
- $(LOCAL_PATH)/nir/nir_constant_expressions.py
-
-$(intermediates)/nir/nir_constant_expressions.c: $(nir_constant_expressions_deps)
+$(intermediates)/nir/nir_constant_expressions.c: $(prebuilt_intermediates)/nir/nir_constant_expressions.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(nir_constant_expressions_gen) $< > $@
+ @cp -f $< $@
-nir_opcodes_h_gen := $(LOCAL_PATH)/nir/nir_opcodes_h.py
-nir_opcodes_h_deps := \
- $(LOCAL_PATH)/nir/nir_opcodes.py \
- $(LOCAL_PATH)/nir/nir_opcodes_h.py
-
-$(intermediates)/nir/nir_opcodes.h: $(nir_opcodes_h_deps)
+$(intermediates)/nir/nir_opcodes.h: $(prebuilt_intermediates)/nir/nir_opcodes.h
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(nir_opcodes_h_gen) $< > $@
+ @cp -f $< $@
$(LOCAL_PATH)/nir/nir.h: $(intermediates)/nir/nir_opcodes.h
-nir_opcodes_c_gen := $(LOCAL_PATH)/nir/nir_opcodes_c.py
-nir_opcodes_c_deps := \
- $(LOCAL_PATH)/nir/nir_opcodes.py \
- $(LOCAL_PATH)/nir/nir_opcodes_c.py
-
-$(intermediates)/nir/nir_opcodes.c: $(nir_opcodes_c_deps)
+$(intermediates)/nir/nir_opcodes.c: $(prebuilt_intermediates)/nir/nir_opcodes.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(nir_opcodes_c_gen) $< > $@
+ @cp -f $< $@
-nir_opt_algebraic_gen := $(LOCAL_PATH)/nir/nir_opt_algebraic.py
-nir_opt_algebraic_deps := \
- $(LOCAL_PATH)/nir/nir_opt_algebraic.py \
- $(LOCAL_PATH)/nir/nir_algebraic.py
-
-$(intermediates)/nir/nir_opt_algebraic.c: $(nir_opt_algebraic_deps)
+$(intermediates)/nir/nir_opt_algebraic.c: $(prebuilt_intermediates)/nir/nir_opt_algebraic.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(nir_opt_algebraic_gen) $< > $@
+ @cp -f $< $@
-$(intermediates)/spirv/spirv_info.c: $(LOCAL_PATH)/spirv/spirv_info_c.py $(LOCAL_PATH)/spirv/spirv.core.grammar.json
+$(intermediates)/spirv/spirv_info.c: $(prebuilt_intermediates)/spirv/spirv_info.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $^ $@ || ($(RM) $@; false)
+ @cp -f $< $@
-$(intermediates)/spirv/vtn_gather_types.c:: $(LOCAL_PATH)/spirv/vtn_gather_types_c.py $(LOCAL_PATH)/spirv/spirv.core.grammar.json
+$(intermediates)/spirv/vtn_gather_types.c: $(prebuilt_intermediates)/spirv/vtn_gather_types.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $^ $@ || ($(RM) $@; false)
-
+ @cp -f $< $@
diff --git a/src/egl/Android.mk b/src/egl/Android.mk
index 1181869..a500ef8 100644
--- a/src/egl/Android.mk
+++ b/src/egl/Android.mk
@@ -57,10 +57,16 @@
libhardware \
liblog \
libcutils \
- libgralloc_drm \
libsync
+ifeq ($(BOARD_USES_DRM_GRALLOC),true)
+ LOCAL_CFLAGS += -DHAVE_DRM_GRALLOC
+ LOCAL_SHARED_LIBRARIES += libgralloc_drm
+endif
+
ifeq ($(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5 6 7),)
+LOCAL_HEADER_LIBRARIES += libnativebase_headers
+LOCAL_STATIC_LIBRARIES += libarect
LOCAL_SHARED_LIBRARIES += libnativewindow
endif
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 195c132..e704696 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -61,8 +61,6 @@
#include <system/window.h>
#include <hardware/gralloc.h>
-#include <gralloc_drm_handle.h>
-
#endif /* HAVE_ANDROID_PLATFORM */
#include "eglconfig.h"
diff --git a/src/egl/drivers/dri2/platform_android.c b/src/egl/drivers/dri2/platform_android.c
index 4f25cb7..c5249da 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -27,6 +27,7 @@
* DEALINGS IN THE SOFTWARE.
*/
+#include <cutils/properties.h>
#include <errno.h>
#include <dlfcn.h>
#include <fcntl.h>
@@ -37,7 +38,11 @@
#include "loader.h"
#include "egl_dri2.h"
#include "egl_dri2_fallbacks.h"
+
+#ifdef HAVE_DRM_GRALLOC
+#include <gralloc_drm_handle.h>
#include "gralloc_drm.h"
+#endif /* HAVE_DRM_GRALLOC */
#define ALIGN(val, align) (((val) + (align) - 1) & ~((align) - 1))
@@ -164,11 +169,13 @@
return (handle && handle->numFds) ? handle->data[0] : -1;
}
+#ifdef HAVE_DRM_GRALLOC
static int
get_native_buffer_name(struct ANativeWindowBuffer *buf)
{
return gralloc_drm_get_gem_handle(buf->handle);
}
+#endif /* HAVE_DRM_GRALLOC */
static EGLBoolean
droid_window_dequeue_buffer(struct dri2_egl_surface *dri2_surf)
@@ -822,6 +829,7 @@
return dri2_create_image_dma_buf(disp, ctx, NULL, attr_list);
}
+#ifdef HAVE_DRM_GRALLOC
static _EGLImage *
droid_create_image_from_name(_EGLDisplay *disp, _EGLContext *ctx,
struct ANativeWindowBuffer *buf)
@@ -865,6 +873,7 @@
return &dri2_img->base;
}
+#endif /* HAVE_DRM_GRALLOC */
static EGLBoolean
droid_query_surface(_EGLDriver *drv, _EGLDisplay *dpy, _EGLSurface *surf,
@@ -921,7 +930,11 @@
if (fd >= 0)
return droid_create_image_from_prime_fd(disp, ctx, buf, fd);
+#ifdef HAVE_DRM_GRALLOC
return droid_create_image_from_name(disp, ctx, buf);
+#else
+ return NULL;
+#endif
}
static _EGLImage *
@@ -943,6 +956,7 @@
{
}
+#ifdef HAVE_DRM_GRALLOC
static int
droid_get_buffers_parse_attachments(struct dri2_egl_surface *dri2_surf,
unsigned int *attachments, int count)
@@ -1018,6 +1032,7 @@
return dri2_surf->buffers;
}
+#endif /* HAVE_DRM_GRALLOC */
static unsigned
droid_get_capability(void *loaderPrivate, enum dri_loader_cap cap)
@@ -1100,23 +1115,6 @@
return (config_count != 0);
}
-static int
-droid_open_device(struct dri2_egl_display *dri2_dpy)
-{
- int fd = -1, err = -EINVAL;
-
- if (dri2_dpy->gralloc->perform)
- err = dri2_dpy->gralloc->perform(dri2_dpy->gralloc,
- GRALLOC_MODULE_PERFORM_GET_DRM_FD,
- &fd);
- if (err || fd < 0) {
- _eglLog(_EGL_WARNING, "fail to get drm fd");
- fd = -1;
- }
-
- return (fd >= 0) ? fcntl(fd, F_DUPFD_CLOEXEC, 3) : -1;
-}
-
static const struct dri2_egl_display_vtbl droid_display_vtbl = {
.authenticate = NULL,
.create_window_surface = droid_create_window_surface,
@@ -1141,6 +1139,7 @@
.get_dri_drawable = dri2_surface_get_dri_drawable,
};
+#ifdef HAVE_DRM_GRALLOC
static const __DRIdri2LoaderExtension droid_dri2_loader_extension = {
.base = { __DRI_DRI2_LOADER, 4 },
@@ -1149,6 +1148,7 @@
.getBuffersWithFormat = droid_get_buffers_with_format,
.getCapability = droid_get_capability,
};
+#endif /* HAVE_DRM_GRALLOC */
static const __DRIimageLoaderExtension droid_image_loader_extension = {
.base = { __DRI_IMAGE_LOADER, 2 },
@@ -1158,12 +1158,14 @@
.getCapability = droid_get_capability,
};
+#ifdef HAVE_DRM_GRALLOC
static const __DRIextension *droid_dri2_loader_extensions[] = {
&droid_dri2_loader_extension.base,
&image_lookup_extension.base,
&use_invalidate.base,
NULL,
};
+#endif /* HAVE_DRM_GRALLOC */
static const __DRIextension *droid_image_loader_extensions[] = {
&droid_image_loader_extension.base,
@@ -1173,6 +1175,137 @@
};
EGLBoolean
+droid_load_driver(_EGLDisplay *disp)
+{
+ struct dri2_egl_display *dri2_dpy = disp->DriverData;
+ const char *err;
+
+ dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd);
+ if (dri2_dpy->driver_name == NULL) {
+ err = "DRI2: failed to get driver name";
+ goto error;
+ }
+
+ dri2_dpy->is_render_node = drmGetNodeTypeFromFd(dri2_dpy->fd) == DRM_NODE_RENDER;
+
+ if (!dri2_dpy->is_render_node) {
+#ifdef HAVE_DRM_GRALLOC
+ dri2_dpy->loader_extensions = droid_dri2_loader_extensions;
+ if (!dri2_load_driver(disp)) {
+ err = "DRI2: failed to load driver";
+ goto error;
+ }
+ } else {
+ /* render nodes cannot use Gem names, and thus do not support
+ * the __DRI_DRI2_LOADER extension */
+ dri2_dpy->loader_extensions = droid_image_loader_extensions;
+ if (!dri2_load_driver_dri3(disp)) {
+ err = "DRI3: failed to load driver";
+ goto error;
+ }
+#else
+ err = "DRI2: handle is not for a render node";
+ goto error;
+ }
+
+ dri2_dpy->loader_extensions = droid_image_loader_extensions;
+ if (!dri2_load_driver_dri3(disp)) {
+ err = "DRI3: failed to load driver";
+ goto error;
+#endif
+ }
+
+ return EGL_TRUE;
+
+error:
+ free(dri2_dpy->driver_name);
+ dri2_dpy->driver_name = NULL;
+ return _eglError(EGL_NOT_INITIALIZED, err);
+}
+
+static int
+droid_probe_driver(int fd, void *data)
+{
+ _EGLDisplay *disp = data;
+ struct dri2_egl_display *dri2_dpy = disp->DriverData;
+ dri2_dpy->fd = fd;
+
+ if (!droid_load_driver(disp))
+ return false;
+
+ /* Since this probe can succeed, but another filter may failed
+ this string needs to be deallocated either way.
+ Once an FD has been found, this string will be set a second time. */
+ free(dri2_dpy->driver_name);
+ dri2_dpy->driver_name = NULL;
+ return true;
+}
+
+static int
+droid_open_device(_EGLDisplay *disp)
+{
+ const int MAX_DRM_DEVICES = 32;
+ int prop_set, num_devices, ret;
+ int fd = -1, fallback_fd = -1;
+
+ char vendor_name[PROPERTY_VALUE_MAX];
+ property_get("drm.gpu.vendor_name", vendor_name, NULL);
+
+ drm_match_t filters[] = {
+ {DRM_MATCH_DRIVER_NAME, .str = vendor_name },
+ {DRM_MATCH_FUNCTION, .func = { .fp = droid_probe_driver,
+ .data = disp }},
+ };
+ const int nbr_filters = sizeof(filters)/sizeof(drm_match_t);
+
+ drmDevicePtr devices[MAX_DRM_DEVICES];
+ num_devices = drmGetDevices2(0, devices, MAX_DRM_DEVICES);
+
+ if (num_devices < 0) {
+ _eglLog(_EGL_WARNING, "Failed to find any DRM devices");
+ return -1;
+ }
+
+ for (int i = 0; i < num_devices; i++) {
+ char *dev_path = devices[i]->nodes[DRM_NODE_RENDER];
+ fd = loader_open_device(dev_path);
+ if (fd == -1) {
+ _eglLog(_EGL_WARNING, "%s() Failed to open DRM device %s",
+ __func__, dev_path);
+ continue;
+ }
+
+ if (drmHandleMatch(fd, filters, nbr_filters))
+ goto next;
+
+ break;
+
+next:
+ if (fallback_fd == -1) {
+ fallback_fd = fd;
+ fd = -1;
+ } else {
+ close(fd);
+ fd = -1;
+ }
+ continue;
+ }
+
+ if (fallback_fd < 0 && fd < 0) {
+ _eglLog(_EGL_WARNING, "Failed to open any DRM device");
+ return -1;
+ }
+
+ if (fd < 0) {
+ _eglLog(_EGL_WARNING, "Failed to open desired DRM device, using fallback");
+ return fallback_fd;
+ }
+
+ close(fallback_fd);
+ return fd;
+}
+
+EGLBoolean
dri2_initialize_android(_EGLDriver *drv, _EGLDisplay *disp)
{
struct dri2_egl_display *dri2_dpy;
@@ -1199,36 +1332,17 @@
disp->DriverData = (void *) dri2_dpy;
- dri2_dpy->fd = droid_open_device(dri2_dpy);
+ dri2_dpy->fd = droid_open_device(disp);
if (dri2_dpy->fd < 0) {
err = "DRI2: failed to open device";
goto cleanup;
}
- dri2_dpy->driver_name = loader_get_driver_for_fd(dri2_dpy->fd);
- if (dri2_dpy->driver_name == NULL) {
- err = "DRI2: failed to get driver name";
+ if (!droid_load_driver(disp)) {
+ err = "DRI2: failed to load driver";
goto cleanup;
}
- dri2_dpy->is_render_node = drmGetNodeTypeFromFd(dri2_dpy->fd) == DRM_NODE_RENDER;
-
- /* render nodes cannot use Gem names, and thus do not support
- * the __DRI_DRI2_LOADER extension */
- if (!dri2_dpy->is_render_node) {
- dri2_dpy->loader_extensions = droid_dri2_loader_extensions;
- if (!dri2_load_driver(disp)) {
- err = "DRI2: failed to load driver";
- goto cleanup;
- }
- } else {
- dri2_dpy->loader_extensions = droid_image_loader_extensions;
- if (!dri2_load_driver_dri3(disp)) {
- err = "DRI3: failed to load driver";
- goto cleanup;
- }
- }
-
if (!dri2_create_screen(disp)) {
err = "DRI2: failed to create screen";
goto cleanup;
diff --git a/src/gallium/drivers/freedreno/Android.gen.mk b/src/gallium/drivers/freedreno/Android.gen.mk
index 17b6fbe..ddf525f 100644
--- a/src/gallium/drivers/freedreno/Android.gen.mk
+++ b/src/gallium/drivers/freedreno/Android.gen.mk
@@ -24,15 +24,12 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
endif
-ir3_nir_trig_deps := \
- $(LOCAL_PATH)/ir3/ir3_nir_trig.py \
- $(MESA_TOP)/src/compiler/nir/nir_algebraic.py
-
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
-$(intermediates)/ir3/ir3_nir_trig.c: $(ir3_nir_trig_deps)
+$(intermediates)/ir3/ir3_nir_trig.c: $(prebuilt_intermediates)/ir3/ir3_nir_trig.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $< -p $(MESA_TOP)/src/compiler/nir > $@
+ @cp -f $< $@
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
$(ir3_GENERATED_FILES))
diff --git a/src/gallium/drivers/radeon/Android.mk b/src/gallium/drivers/radeon/Android.mk
index 5efc203..62bf365 100644
--- a/src/gallium/drivers/radeon/Android.mk
+++ b/src/gallium/drivers/radeon/Android.mk
@@ -21,6 +21,8 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
+ifeq ($(MESA_ENABLE_LLVM),true)
+
LOCAL_PATH := $(call my-dir)
# get C_SOURCES
@@ -34,10 +36,8 @@
LOCAL_SHARED_LIBRARIES := libdrm_radeon
LOCAL_MODULE := libmesa_pipe_radeon
-ifeq ($(MESA_ENABLE_LLVM),true)
LOCAL_CFLAGS += -DFORCE_BUILD_AMDGPU # instructs LLVM to declare LLVMInitializeAMDGPU* functions
$(call mesa-build-with-llvm)
-endif
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)
@@ -46,3 +46,5 @@
$(eval GALLIUM_LIBS += $(LOCAL_MODULE))
$(eval GALLIUM_SHARED_LIBS += $(LOCAL_SHARED_LIBRARIES))
endif
+
+endif # MESA_ENABLE_LLVM==true
diff --git a/src/gallium/drivers/radeonsi/Android.mk b/src/gallium/drivers/radeonsi/Android.mk
index e72b80c..b36ec45 100644
--- a/src/gallium/drivers/radeonsi/Android.mk
+++ b/src/gallium/drivers/radeonsi/Android.mk
@@ -21,6 +21,8 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
+ifeq ($(MESA_ENABLE_LLVM),true)
+
LOCAL_PATH := $(call my-dir)
# get C_SOURCES and GENERATED_SOURCES
@@ -75,3 +77,5 @@
libmesa_winsys_amdgpu)
$(eval GALLIUM_SHARED_LIBS += $(LOCAL_SHARED_LIBRARIES))
endif
+
+endif # MESA_ENABLE_LLVM==true
diff --git a/src/gallium/winsys/amdgpu/drm/Android.mk b/src/gallium/winsys/amdgpu/drm/Android.mk
index 6e84a0c..18adb6b 100644
--- a/src/gallium/winsys/amdgpu/drm/Android.mk
+++ b/src/gallium/winsys/amdgpu/drm/Android.mk
@@ -21,6 +21,8 @@
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
# DEALINGS IN THE SOFTWARE.
+ifeq ($(MESA_ENABLE_LLVM),true)
+
LOCAL_PATH := $(call my-dir)
# get C_SOURCES
@@ -46,3 +48,5 @@
$(eval GALLIUM_LIBS += $(LOCAL_MODULE) $(LOCAL_STATIC_LIBRARIES))
$(eval GALLIUM_SHARED_LIBS += $(LOCAL_SHARED_LIBRARIES))
endif
+
+endif # MESA_ENABLE_LLVM==true
diff --git a/src/intel/Android.common.mk b/src/intel/Android.common.mk
index 12cea6e..57c559e 100644
--- a/src/intel/Android.common.mk
+++ b/src/intel/Android.common.mk
@@ -38,7 +38,7 @@
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa
-LOCAL_SHARED_LIBRARIES := libexpat libz
+LOCAL_SHARED_LIBRARIES := libexpat liblog libz
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_genxml
diff --git a/src/intel/Android.compiler.mk b/src/intel/Android.compiler.mk
index c2b0122..a8fa458 100644
--- a/src/intel/Android.compiler.mk
+++ b/src/intel/Android.compiler.mk
@@ -46,15 +46,12 @@
$(MESA_TOP)/src/intel/compiler \
$(MESA_TOP)/src/compiler/nir
-brw_nir_trig_workarounds_deps := \
- $(LOCAL_PATH)/compiler/brw_nir_trig_workarounds.py \
- $(MESA_TOP)/src/compiler/nir/nir_algebraic.py
-
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
-$(intermediates)/compiler/brw_nir_trig_workarounds.c: $(brw_nir_trig_workarounds_deps)
+$(intermediates)/compiler/brw_nir_trig_workarounds.c: $(prebuilt_intermediates)/compiler/brw_nir_trig_workarounds.c
@mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $< -p $(MESA_TOP)/src/compiler/nir > $@
+ @cp -f $< $@
LOCAL_STATIC_LIBRARIES = libmesa_genxml
diff --git a/src/intel/Android.genxml.mk b/src/intel/Android.genxml.mk
index e4d8dd8..d597511 100644
--- a/src/intel/Android.genxml.mk
+++ b/src/intel/Android.genxml.mk
@@ -31,6 +31,7 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
# dummy.c source file is generated to meet the build system's rules.
LOCAL_GENERATED_SOURCES += $(intermediates)/dummy.c
@@ -49,12 +50,9 @@
$(hide) $(PRIVATE_SCRIPT) $(PRIVATE_SCRIPT_FLAGS) $(PRIVATE_XML) > $@
endef
-$(intermediates)/genxml/genX_bits.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/genxml/gen_bits_header.py
-$(intermediates)/genxml/genX_bits.h: PRIVATE_SCRIPT_FLAGS := --cpp-guard=GENX_BITS_H
-$(intermediates)/genxml/genX_bits.h: PRIVATE_XML := $(addprefix $(LOCAL_PATH)/,$(GENXML_XML_FILES))
-$(intermediates)/genxml/genX_bits.h: $(LOCAL_PATH)/genxml/gen_bits_header.py
-$(intermediates)/genxml/genX_bits.h: $(addprefix $(LOCAL_PATH)/,$(GENXML_XML_FILES))
- $(call header-gen)
+$(intermediates)/genxml/genX_bits.h: $(prebuilt_intermediates)/genxml/genX_bits.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
$(intermediates)/genxml/gen4_pack.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/genxml/gen_pack_header.py
$(intermediates)/genxml/gen4_pack.h: PRIVATE_XML := $(LOCAL_PATH)/genxml/gen4.xml
diff --git a/src/intel/Android.isl.mk b/src/intel/Android.isl.mk
index 516ac3a..90601f1 100644
--- a/src/intel/Android.isl.mk
+++ b/src/intel/Android.isl.mk
@@ -214,23 +214,13 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, $(ISL_GENERATED_FILES))
-define bash-gen
+$(intermediates)/isl/isl_format_layout.c: $(prebuilt_intermediates)/isl/isl_format_layout.c
@mkdir -p $(dir $@)
- @echo "Gen Bash: $(PRIVATE_MODULE) <= $(notdir $(@))"
- $(hide) $(PRIVATE_SCRIPT) --csv $(PRIVATE_CSV) --out $@
-endef
-
-isl_format_layout_deps := \
- $(LOCAL_PATH)/isl/gen_format_layout.py \
- $(LOCAL_PATH)/isl/isl_format_layout.csv
-
-$(intermediates)/isl/isl_format_layout.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/isl/gen_format_layout.py
-$(intermediates)/isl/isl_format_layout.c: PRIVATE_CSV := $(LOCAL_PATH)/isl/isl_format_layout.csv
-$(intermediates)/isl/isl_format_layout.c: $(isl_format_layout_deps)
- $(call bash-gen)
+ @cp -f $< $@
include $(MESA_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)
diff --git a/src/intel/Android.vulkan.mk b/src/intel/Android.vulkan.mk
index dfc78e5..a4642ef 100644
--- a/src/intel/Android.vulkan.mk
+++ b/src/intel/Android.vulkan.mk
@@ -23,10 +23,6 @@
include $(CLEAR_VARS)
include $(LOCAL_PATH)/Makefile.sources
-VK_ENTRYPOINTS_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/vulkan/anv_entrypoints_gen.py
-
-VK_EXTENSIONS_SCRIPT := $(MESA_PYTHON2) $(LOCAL_PATH)/vulkan/anv_extensions_gen.py
-
VULKAN_COMMON_INCLUDES := \
$(MESA_TOP)/include \
$(MESA_TOP)/src/mapi \
@@ -52,6 +48,7 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_C_INCLUDES := \
$(VULKAN_COMMON_INCLUDES)
@@ -64,11 +61,9 @@
@echo "Gen Dummy: $(PRIVATE_MODULE) <= $(notdir $(@))"
$(hide) touch $@
-$(intermediates)/vulkan/anv_entrypoints.h: $(intermediates)/vulkan/dummy.c
- $(VK_ENTRYPOINTS_SCRIPT) \
- --outdir $(dir $@) \
- --xml $(MESA_TOP)/src/vulkan/registry/vk.xml \
- --xml $(MESA_TOP)/src/vulkan/registry/vk_android_native_buffer.xml
+$(intermediates)/vulkan/anv_entrypoints.h: $(prebuilt_intermediates)/vulkan/anv_entrypoints.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(intermediates)
@@ -88,6 +83,8 @@
ANV_SHARED_LIBRARIES := libdrm
ifeq ($(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5 6 7),)
+ANV_HEADER_LIBRARIES += libcutils_headers libnativebase_headers libsystem_headers
+ANV_STATIC_LIBRARIES += libarect
ANV_SHARED_LIBRARIES += libnativewindow
endif
@@ -106,6 +103,8 @@
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
@@ -126,6 +125,8 @@
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
@@ -146,6 +147,8 @@
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
@@ -166,6 +169,8 @@
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
@@ -186,6 +191,8 @@
LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
@@ -200,6 +207,7 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_SRC_FILES := $(VULKAN_FILES)
@@ -221,32 +229,33 @@
LOCAL_GENERATED_SOURCES += $(intermediates)/vulkan/anv_extensions.c
LOCAL_GENERATED_SOURCES += $(intermediates)/vulkan/anv_extensions.h
-$(intermediates)/vulkan/anv_entrypoints.c:
+$(intermediates)/vulkan/anv_entrypoints.c: $(prebuilt_intermediates)/vulkan/anv_entrypoints.c
@mkdir -p $(dir $@)
- $(VK_ENTRYPOINTS_SCRIPT) \
- --xml $(MESA_TOP)/src/vulkan/registry/vk.xml \
- --xml $(MESA_TOP)/src/vulkan/registry/vk_android_native_buffer.xml \
- --outdir $(dir $@)
+ @cp -f $< $@
-$(intermediates)/vulkan/anv_extensions.c:
+$(intermediates)/vulkan/anv_extensions.c: $(prebuilt_intermediates)/vulkan/anv_extensions.c
@mkdir -p $(dir $@)
- $(VK_EXTENSIONS_SCRIPT) \
- --xml $(MESA_TOP)/src/vulkan/registry/vk.xml \
- --xml $(MESA_TOP)/src/vulkan/registry/vk_android_native_buffer.xml \
- --out-c $@
+ @cp -f $< $@
-$(intermediates)/vulkan/anv_extensions.h:
+$(intermediates)/vulkan/anv_extensions.h: $(prebuilt_intermediates)/vulkan/anv_extensions.h
@mkdir -p $(dir $@)
- $(VK_EXTENSIONS_SCRIPT) \
- --xml $(MESA_TOP)/src/vulkan/registry/vk.xml \
- --xml $(MESA_TOP)/src/vulkan/registry/vk_android_native_buffer.xml \
- --out-h $@
+ @cp -f $< $@
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES)
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES)
include $(MESA_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)
+#
+# FIXME: Defining a vulkan HAL for all TARGET_BOARD_PLATFORM, when it can
+# only work for Intel platforms, is just wrong. For now, just omit
+# module unless BOARD_GPU_DRIVERS contains i965. Even this is not
+# correct, but it's difficult to determine what the 'right' list of
+# TARGET_BOARD_PLATFORM to check really are..
+#
+ifneq ($(findstring i965,$(BOARD_GPU_DRIVERS)),)
#
# libvulkan_intel
@@ -289,7 +298,11 @@
libmesa_intel_compiler \
libmesa_anv_entrypoints
+LOCAL_HEADER_LIBRARIES := $(ANV_HEADER_LIBRARIES) libhardware_headers
+LOCAL_STATIC_LIBRARIES := $(ANV_STATIC_LIBRARIES)
LOCAL_SHARED_LIBRARIES := $(ANV_SHARED_LIBRARIES) libz libsync liblog
include $(MESA_COMMON_MK)
include $(BUILD_SHARED_LIBRARY)
+
+endif # BOARD_GPU_DRIVERS contains 'i965'
diff --git a/src/intel/common/gen_clflush.h b/src/intel/common/gen_clflush.h
index d39f158..35d2508 100644
--- a/src/intel/common/gen_clflush.h
+++ b/src/intel/common/gen_clflush.h
@@ -27,6 +27,12 @@
#define CACHELINE_SIZE 64
#define CACHELINE_MASK 63
+#if !defined(__i686__) && !defined(_x86_64__)
+#warning Unsupported architecture
+#define __builtin_ia32_mfence()
+#define __builtin_ia32_clflush(vaddr)
+#endif
+
static inline void
gen_clflush_range(void *start, size_t size)
{
diff --git a/src/mesa/Android.gen.mk b/src/mesa/Android.gen.mk
index ee2d1de..1dee164 100644
--- a/src/mesa/Android.gen.mk
+++ b/src/mesa/Android.gen.mk
@@ -28,6 +28,7 @@
endif
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
# This is the list of auto-generated files: sources and headers
sources := \
@@ -51,6 +52,14 @@
ifeq ($(TARGET_ARCH),x86)
sources += x86/matypes.h
LOCAL_C_INCLUDES += $(intermediates)/x86
+matypes_deps := \
+ $(BUILD_OUT_EXECUTABLES)/mesa_gen_matypes$(BUILD_EXECUTABLE_SUFFIX) \
+ $(LOCAL_PATH)/main/mtypes.h \
+ $(LOCAL_PATH)/tnl/t_context.h
+$(intermediates)/x86/matypes.h: $(matypes_deps)
+ @mkdir -p $(dir $@)
+ @echo "MATYPES: $(PRIVATE_MODULE) <= $(notdir $@)"
+ $(hide) $< > $@
endif
endif
@@ -58,112 +67,46 @@
LOCAL_GENERATED_SOURCES += $(sources)
-glapi := $(MESA_TOP)/src/mapi/glapi/gen
-
-dispatch_deps := \
- $(wildcard $(glapi)/*.py) \
- $(wildcard $(glapi)/*.xml)
-
-define es-gen
+$(intermediates)/main/dispatch.h: $(prebuilt_intermediates)/main/dispatch.h
@mkdir -p $(dir $@)
- @echo "Gen ES: $(PRIVATE_MODULE) <= $(notdir $(@))"
- $(hide) $(PRIVATE_SCRIPT) $(1) $(PRIVATE_XML) > $@
-endef
+ @cp -f $< $@
-matypes_deps := \
- $(BUILD_OUT_EXECUTABLES)/mesa_gen_matypes$(BUILD_EXECUTABLE_SUFFIX) \
- $(LOCAL_PATH)/main/mtypes.h \
- $(LOCAL_PATH)/tnl/t_context.h
-
-$(intermediates)/x86/matypes.h: $(matypes_deps)
+$(intermediates)/main/remap_helper.h: $(prebuilt_intermediates)/main/remap_helper.h
@mkdir -p $(dir $@)
- @echo "MATYPES: $(PRIVATE_MODULE) <= $(notdir $@)"
- $(hide) $< > $@
+ @cp -f $< $@
-$(intermediates)/main/dispatch.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(glapi)/gl_table.py
-$(intermediates)/main/dispatch.h: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
+$(intermediates)/main/enums.c: $(prebuilt_intermediates)/main/enums.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/dispatch.h: $(dispatch_deps)
- $(call es-gen, $* -m remap_table)
+$(intermediates)/main/api_exec.c: $(prebuilt_intermediates)/main/api_exec.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/remap_helper.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(glapi)/remap_helper.py
-$(intermediates)/main/remap_helper.h: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
+$(intermediates)/main/marshal_generated.c: $(prebuilt_intermediates)/main/marshal_generated.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/remap_helper.h: $(dispatch_deps)
- $(call es-gen, $*)
+$(intermediates)/main/marshal_generated.h: $(prebuilt_intermediates)/main/marshal_generated.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/enums.c: PRIVATE_SCRIPT :=$(MESA_PYTHON2) $(glapi)/gl_enums.py
-$(intermediates)/main/enums.c: PRIVATE_XML := -f $(glapi)/../registry/gl.xml
+$(intermediates)/main/get_hash.h: $(prebuilt_intermediates)/main/get_hash.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/enums.c: $(dispatch_deps)
- $(call es-gen)
+$(intermediates)/main/format_fallback.c: $(prebuilt_intermediates)/main/format_fallback.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/api_exec.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(glapi)/gl_genexec.py
-$(intermediates)/main/api_exec.c: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
+$(intermediates)/main/format_info.h: $(prebuilt_intermediates)/main/format_info.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/api_exec.c: $(dispatch_deps)
- $(call es-gen)
+$(intermediates)/main/format_pack.c: $(prebuilt_intermediates)/main/format_pack.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
-$(intermediates)/main/marshal_generated.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(glapi)/gl_marshal.py
-$(intermediates)/main/marshal_generated.c: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
-
-$(intermediates)/main/marshal_generated.c: $(dispatch_deps)
- $(call es-gen)
-
-$(intermediates)/main/marshal_generated.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(glapi)/gl_marshal_h.py
-$(intermediates)/main/marshal_generated.h: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
-
-$(intermediates)/main/marshal_generated.h: $(dispatch_deps)
- $(call es-gen)
-
-GET_HASH_GEN := $(LOCAL_PATH)/main/get_hash_generator.py
-
-$(intermediates)/main/get_hash.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(GET_HASH_GEN)
-$(intermediates)/main/get_hash.h: PRIVATE_XML := -f $(glapi)/gl_and_es_API.xml
-$(intermediates)/main/get_hash.h: $(glapi)/gl_and_es_API.xml \
- $(LOCAL_PATH)/main/get_hash_params.py $(GET_HASH_GEN)
- $(call es-gen)
-
-FORMAT_FALLBACK := $(LOCAL_PATH)/main/format_fallback.py
-format_fallback_deps := \
- $(LOCAL_PATH)/main/formats.csv \
- $(LOCAL_PATH)/main/format_parser.py \
- $(FORMAT_FALLBACK)
-
-$(intermediates)/main/format_fallback.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_FALLBACK)
-$(intermediates)/main/format_fallback.c: PRIVATE_XML :=
-$(intermediates)/main/format_fallback.c: $(format_fallback_deps)
- $(call es-gen, $< /dev/stdout)
-
-FORMAT_INFO := $(LOCAL_PATH)/main/format_info.py
-format_info_deps := \
- $(LOCAL_PATH)/main/formats.csv \
- $(LOCAL_PATH)/main/format_parser.py \
- $(FORMAT_INFO)
-
-$(intermediates)/main/format_info.h: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_INFO)
-$(intermediates)/main/format_info.h: PRIVATE_XML :=
-$(intermediates)/main/format_info.h: $(format_info_deps)
- $(call es-gen, $<)
-
-FORMAT_PACK := $(LOCAL_PATH)/main/format_pack.py
-format_pack_deps := \
- $(LOCAL_PATH)/main/formats.csv \
- $(LOCAL_PATH)/main/format_parser.py \
- $(FORMAT_PACK)
-
-$(intermediates)/main/format_pack.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_PACK)
-$(intermediates)/main/format_pack.c: PRIVATE_XML :=
-$(intermediates)/main/format_pack.c: $(format_pack_deps)
- $(call es-gen, $<)
-
-FORMAT_UNPACK := $(LOCAL_PATH)/main/format_unpack.py
-format_unpack_deps := \
- $(LOCAL_PATH)/main/formats.csv \
- $(LOCAL_PATH)/main/format_parser.py \
- $(FORMAT_UNPACK)
-
-$(intermediates)/main/format_unpack.c: PRIVATE_SCRIPT := $(MESA_PYTHON2) $(FORMAT_UNPACK)
-$(intermediates)/main/format_unpack.c: PRIVATE_XML :=
-$(intermediates)/main/format_unpack.c: $(format_unpack_deps)
- $(call es-gen, $<)
+$(intermediates)/main/format_unpack.c: $(prebuilt_intermediates)/main/format_unpack.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
diff --git a/src/mesa/Android.libmesa_git_sha1.mk b/src/mesa/Android.libmesa_git_sha1.mk
index d279230..7f5ed6b 100644
--- a/src/mesa/Android.libmesa_git_sha1.mk
+++ b/src/mesa/Android.libmesa_git_sha1.mk
@@ -43,10 +43,15 @@
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, git_sha1.h)
-$(intermediates)/git_sha1.h: $(MESA_TOP)/src/git_sha1.h.in $(wildcard $(MESA_TOP)/.git/logs/HEAD)
+$(intermediates)/git_sha1.h:
@mkdir -p $(dir $@)
@echo "GIT-SHA1: $(PRIVATE_MODULE) <= git"
- $(hide) $(MESA_PYTHON2) $(MESA_TOP)/bin/git_sha1_gen.py --output $@
+ $(hide) touch $@
+ $(hide) if which git > /dev/null; then \
+ git --git-dir $(PRIVATE_PATH)/../../.git log -n 1 --oneline | \
+ sed 's/^\([^ ]*\) .*/#define MESA_GIT_SHA1 "git-\1"/' \
+ > $@; \
+ fi
LOCAL_EXPORT_C_INCLUDE_DIRS := $(intermediates)
diff --git a/src/vulkan/Android.mk b/src/vulkan/Android.mk
index 70b23ea..2d1c62c 100644
--- a/src/vulkan/Android.mk
+++ b/src/vulkan/Android.mk
@@ -34,6 +34,7 @@
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
intermediates := $(call local-generated-sources-dir)
+prebuilt_intermediates := $(MESA_TOP)/prebuilt-intermediates
LOCAL_C_INCLUDES := \
$(MESA_TOP)/include/vulkan \
@@ -44,22 +45,20 @@
LOCAL_SRC_FILES := $(VULKAN_UTIL_FILES) $(VULKAN_WSI_FILES)
-vulkan_api_xml = $(MESA_TOP)/src/vulkan/registry/vk.xml
-vk_android_native_buffer_xml = $(MESA_TOP)/src/vulkan/registry/vk_android_native_buffer.xml
-
-$(LOCAL_GENERATED_SOURCES): $(MESA_TOP)/src/vulkan/util/gen_enum_to_str.py \
- $(vulkan_api_xml) $(vk_android_native_buffer_xml)
- @echo "target Generated: $(PRIVATE_MODULE) <= $(notdir $(@))"
- @mkdir -p $(dir $@)
- $(hide) $(MESA_PYTHON2) $(MESA_TOP)/src/vulkan/util/gen_enum_to_str.py \
- --xml $(vulkan_api_xml) \
- --xml $(vk_android_native_buffer_xml) \
- --outdir $(dir $@)
-
LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(intermediates)
+$(intermediates)/util/vk_enum_to_str.c: $(prebuilt_intermediates)/util/vk_enum_to_str.c
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
+
+$(intermediates)/util/vk_enum_to_str.h: $(prebuilt_intermediates)/util/vk_enum_to_str.h
+ @mkdir -p $(dir $@)
+ @cp -f $< $@
+
ifeq ($(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5 6 7),)
+LOCAL_HEADER_LIBRARIES += libcutils_headers libnativebase_headers libsystem_headers
+LOCAL_STATIC_LIBRARIES += libarect
LOCAL_SHARED_LIBRARIES += libnativewindow
endif
